A payment terminal antenna performance optimization apparatus

Abstract

The utility model relates to a kind of payment terminal antenna performance optimization device.The device includes control module, further includes: for detecting the card slot state of payment terminal card insertion detection module, its output end is connected with control module to output card insertion detection signal to control module.Multiple parameter measurement module, its input end is connected with antenna port for collecting the incident wave voltage, reflected wave voltage, actual output power and received signal of antenna, its output end is connected with control module to output the signal collected.Tuning circuit, its input end is connected with control module to receive the tuning control signal output by control module and realize antenna adaptive impedance matching accordingly.Radio frequency compensation circuit, its input end is connected with control module to receive the compensation control signal output by control module and realize radio frequency parameter compensation accordingly.The utility model can effectively inhibit the multi-band antenna performance deterioration caused by card insertion by hardware adaptive tuning and radio frequency parameter collaborative compensation.

Description

Technical Field

[0001] This utility model relates to the field of payment terminal technology, and in particular to a payment terminal antenna performance optimization device. Background Technology

[0002] The PICC card slot and antenna of a payment terminal are usually arranged close together. When a card with a metal coil chip is inserted into the card slot, it will cause electromagnetic field distortion, which will result in a decrease in the antenna's TRP (total radiated power) and a deterioration in TIS (total radiated sensitivity).

[0003] However, the antenna tuning schemes of related technologies have limitations due to static compensation: they rely on a fixed matching network and cannot adapt to time-varying impedance changes caused by card insertion. They also suffer from insufficient single-dimensional optimization: compensation is achieved only through capacitor tuning or antenna switching, failing to address the cross-layer coordination problem between PA / LNA link parameters and antenna tuning. Utility Model Content

[0004] The technical problem to be solved by this utility model is to provide a payment terminal antenna performance optimization device to address the above-mentioned defects.

[0005] The technical solution adopted by this utility model to solve its technical problem is: a payment terminal antenna performance optimization device, including a control module, and further including:

[0006] A card insertion detection module for detecting the card slot status of a payment terminal has its output connected to the control module to output a card insertion detection signal to the control module.

[0007] The multi-parameter measurement module has its input end connected to the antenna port to collect the incident wave voltage, reflected wave voltage, actual output power and received signal of the antenna, and its output end connected to the control module to output the collected signal.

[0008] A tuning circuit, the input of which is connected to the control module to receive the tuning control signal output by the control module and thereby realize antenna adaptive impedance matching;

[0009] The radio frequency compensation circuit has its input terminal connected to the control module to receive the compensation control signal output by the control module and thereby realize radio frequency parameter compensation.

[0010] Furthermore, in the payment terminal antenna performance optimization device of this utility model, the tuning circuit includes a coarse tuning unit and a fine tuning unit. The input terminals of the coarse tuning unit and the fine tuning unit are connected to the control module. The output terminals of the coarse tuning unit and the fine tuning unit are connected to the transmission channel between the antenna port and the radio frequency switch used to switch the radio frequency signal on and off. The coarse tuning unit and the fine tuning unit also have ground terminals. The coarse tuning unit achieves a precision step of 0.05pF, and the fine tuning unit achieves a precision step of 0.01pF.

[0011] Furthermore, in the payment terminal antenna performance optimization device described in this utility model, the coarse adjustment unit is a PE64907 digital tuning chip, and the fine adjustment unit is an SMV2019 varactor diode; the digital tuning chip controls four capacitor arrays through an SPI interface, and the capacitance value is adjustable from 0.85-2.4pF; the varactor diode outputs a 0-20V tuning voltage, and the capacitance value is adjustable from 0.3-2.22pF.

[0012] Furthermore, in the payment terminal antenna performance optimization device of this utility model, the tuning circuit further includes an inductor (L), a first capacitor (C1), and a DC blocking capacitor (C2); the inductor (L) is connected between the antenna port and the output terminal of the digital tuning chip, the first end of the first capacitor (C1) is connected to the output terminal of the varactor diode, the second end of the first capacitor (C1) is connected to the first end of the DC blocking capacitor (C2), and the second end of the DC blocking capacitor (C2) is connected to the radio frequency signal output port.

[0013] Furthermore, in the payment terminal antenna performance optimization device of this utility model, the radio frequency compensation circuit includes a radio frequency switch and a radio frequency front-end module; the radio frequency switch is connected between the tuning circuit and the radio frequency front-end module, and is used to switch the radio frequency signal on and off and to switch between multiple frequency bands; the radio frequency front-end module is connected to the control module to receive the compensation control signal output by the control module to adjust the PA bias voltage and LNA gain.

[0014] Furthermore, in the payment terminal antenna performance optimization device of this utility model, the radio frequency compensation circuit further includes a power management chip, the radio frequency front-end module includes a power amplifier and a low noise amplifier, the power management chip adjusts the PA bias voltage of the power amplifier according to the compensation control signal, and its adjustment range is 2.8-4.2V; the low noise amplifier adjusts the LNA gain according to the compensation control signal, and its gain supplement range is 10-30dB.

[0015] Furthermore, in the payment terminal antenna performance optimization device of this utility model, the multi-parameter measurement module includes a directional coupler, a detector, and a signal transceiver. The directional coupler is connected between the antenna port and the radio frequency switch. One end of the detector is connected to the directional coupler, and the other end of the detector is connected to the control module. The input end of the signal transceiver is connected to the radio frequency front-end module, and the output end of the signal transceiver is connected to the control module.

[0016] The directional coupler collects the incident wave, reflected wave, and actual output power of the antenna, and the detector converts the incident wave and reflected wave into DC voltages to obtain the incident wave voltage and the reflected wave voltage. The incident wave voltage, the reflected wave voltage, and the actual output power are then transmitted to the control module.

[0017] The transceiver is used to output the acquired received signal to the control module.

[0018] Furthermore, in the payment terminal antenna performance optimization device of this utility model, the card insertion detection module includes a Hall sensor and a capacitive sensor respectively connected to the control module;

[0019] The Hall sensor is installed on the edge of the card slot to detect whether a card is inserted into the card slot;

[0020] The capacitance sensor is installed at the bottom of the card slot and is used to collect the capacitance value of the inserted card and output it to the control module.

[0021] Furthermore, in the payment terminal antenna performance optimization device of this utility model, the card insertion detection module further includes an RC filtering unit;

[0022] The Hall sensor has a detection distance of 2mm, and its output signal is input to the ADC channel of the control module after passing through the RC filter unit; and / or

[0023] The capacitance sensor communicates with the control module via an I2C serial interface. It collects the capacitance value of the inserted PICC card between 0 and 13 pF, and its minimum detection limit is 1 fF.

[0024] Furthermore, in the payment terminal antenna performance optimization device described in this utility model, the payment terminal is a POS machine.

[0025] The payment terminal antenna performance optimization device of this utility model has the following beneficial effects: This utility model can effectively suppress the degradation of multi-band antenna performance caused by card insertion through hardware adaptive tuning and radio frequency parameter collaborative compensation without changing the internal PCB stacking layout of the payment terminal, while meeting relevant radiation standards. Attached Figure Description

[0026] The present invention will be further described below with reference to the accompanying drawings and embodiments. In the accompanying drawings:

[0027] Figure 1 This is a schematic diagram of the structure of the payment terminal antenna performance optimization device provided in this embodiment of the utility model;

[0028] Figure 2 These are schematic diagrams of the payment terminal antenna performance optimization device in some embodiments;

[0029] Figure 3 These are schematic diagrams of the tuning circuit in some embodiments;

[0030] Figure 4 These are schematic diagrams of the radio frequency compensation circuit and the multi-parameter measurement module in some embodiments;

[0031] Figure 5 These are logic flowcharts of the control module in some embodiments.

[0032] Explanation of reference numerals in the attached figures:

[0033] 10: Control module; 20: Card insertion detection module; 30: Multi-parameter measurement module; 40: Tuning circuit; 50: RF parameter compensation circuit;

[0034] 11: MCU controller; 12: CPU processor; 21: Hall sensor; 22: Capacitive sensor; 31: Directional coupler; 32: Detector; 33: Signal transceiver; 41: Digital tuning chip; 42: Varactor diode; 51: RF switch; 52: RF front-end module; 53: Power management chip; C1: First capacitor; C2: DC blocking capacitor; L: Inductor. Detailed Implementation

[0035] To provide a clearer understanding of the technical features, objectives, and effects of this utility model, the specific embodiments of this utility model are now described in detail with reference to the accompanying drawings. In the following description, it should be understood that the orientations or positional relationships indicated by terms such as "front," "rear," "upper," "lower," "left," "right," "longitudinal," "horizontal," "vertical," "horizontal," "top," "bottom," "inner," "outer," "head," and "tail" are based on the orientations or positional relationships shown in the accompanying drawings, and are constructed and operated in a specific orientation. They are only for the convenience of describing this technical solution and do not indicate that the device or component referred to must have a specific orientation; therefore, they should not be construed as limitations on this utility model.

[0036] It should also be noted that, unless otherwise explicitly specified and limited, terms such as "installation," "connection," "joining," "fixing," and "setting" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. When an component is referred to as being "on" or "below" another component, the component can be located "directly" or "indirectly" on the other component, or there may be one or more intermediary components. The terms "first," "second," "third," etc., are only for the convenience of describing this technical solution and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, features defined with "first," "second," "third," etc., may explicitly or implicitly include one or more of that feature. For those skilled in the art, the specific meaning of the above terms in this utility model can be understood according to the specific circumstances.

[0037] In the following description, specific details such as particular device structures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of the present invention. However, those skilled in the art will understand that the present invention can also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.

[0038] As you can understand, PICC (Proximity Integrated Circuit Card) is a card used for contactless communication, commonly used in payment and access control devices. A PICC card slot is a slot for inserting smart cards (such as SIM cards, bank cards, etc.), enabling the smart card to communicate with devices (such as mobile phones, POS machines, etc.). The PA / LNA link refers to the signal transmission path between the PA and LNA, including components such as radio frequency transmission lines and filters, used to optimize signal transmission efficiency and quality.

[0039] refer to Figure 1In one embodiment of this utility model, the payment terminal antenna performance optimization device includes a control module 10, and further includes: a card insertion detection module 20 for detecting the card slot status of the payment terminal, the output of which is connected to the control module 10 to output a card insertion detection signal to the control module 10; a multi-parameter measurement module 30, the input of which is connected to the antenna port for collecting the incident wave voltage, reflected wave voltage, actual output power, and received signal of the antenna, and the output of which is connected to the control module 10 to output the collected signals; a tuning circuit 40, the input of which is connected to the control module 10 to receive the tuning control signal output by the control module 10 and thereby realize adaptive impedance matching of the antenna; and a radio frequency compensation circuit 50, the input of which is connected to the control module 10 to receive the compensation control signal output by the control module 10 and thereby realize radio frequency parameter compensation.

[0040] It can be understood that the working principle of the control module 10 of this utility model is as follows:

[0041] refer to Figure 5 When the control module 10 determines that a card is inserted into the card slot and the S11 parameter, determined by the incident wave voltage and the reflected wave voltage, is greater than a preset threshold, it inputs a tuning control signal to the tuning circuit 40 to achieve adaptive impedance matching of the antenna. When the control module 10 determines that a card is inserted into the card slot and the S11 parameter is less than the preset threshold, it inputs a compensation control signal to the actual output power and the RSSI value corresponding to the received signal to achieve RF parameter compensation. Specifically, RF parameter compensation includes PA bias voltage adjustment and LNA gain adjustment. Regarding PA bias voltage adjustment, the control module 10 dynamically controls the PA bias voltage according to the difference between the actual output power and the target power to increase the output power so that the TRP meets the requirements. The control module 10 also compares the received signal strength indicator RSSI value with a preset weak RSSI threshold to determine the current signal strength. When the received signal strength indicator RSSI value is less than the preset weak RSSI threshold, it dynamically controls the LNA gain adjustment, with the adjustment step size inversely proportional to the signal strength, so that the TIS meets -102dBm.

[0042] The adjustment range of the optimal matching capacitor parameters and the RF parameter compensation range of the tuning circuit 40 are mainly determined based on a pre-stored optimal matching network parameter mapping table. In this embodiment, the optimal matching network parameter mapping table for the inserted / uninserted card states can be established through electromagnetic simulation (such as HFSS) or measured data. Specifically, capacitance sampling is performed on different PICC card materials to obtain different capacitance values / capacitance value ranges. For PICC card materials with different capacitance values / capacitance value ranges, the antenna can obtain the corresponding optimal matching capacitor parameters through debugging simulation. The control signal configuration for fine-tuning and coarse-tuning of the AMN adaptive matching circuit is completed based on the optimal matching capacitor parameters. The RF parameter compensation range and the compensation control signal configuration of the RF compensation circuit 50 can also be pre-stored. The established optimal matching network parameter mapping table is pre-stored in the memory of the control module 10 or the device for the control module 10 to call.

[0043] It should be noted that S11 is a parameter in the scattering parameter, representing the reflection coefficient. S11 is used to evaluate the matching performance of an antenna or circuit. The ideal matching state is S11 close to -10dB or lower, indicating that most of the energy is transmitted and there is little reflection. The calculation process of S11 refers to existing technology.

[0044] In some alternative embodiments, such as Figure 2 As shown, the control module 10 includes an MCU controller 11 and a CPU processor 12, both of which are based on the STM32L476RG model. The present invention will be further described in detail below using this as an example.

[0045] The tuning circuit 40 includes a coarse tuning unit and a fine tuning unit. The input terminals of the coarse and fine tuning units are connected to the control module 10. The output terminals of the coarse and fine tuning units are connected to the transmission channel between the antenna port and the RF switch 51 used to switch the RF signal on and off. Both the coarse and fine tuning units also have ground terminals. The coarse tuning unit implements a 0.05pF precision step, and the fine tuning unit implements a 0.01pF precision step. Figure 3 As shown, the coarse adjustment unit is a PE64907 digital tuning chip 41, and the fine adjustment unit is an SMV2019 varactor diode 42. The digital tuning chip 41 controls four capacitor arrays (the capacitor arrays are internal to the digital tuning chip) via an SPI interface, with capacitance values ​​adjustable from 0.85-2.4pF. The varactor diode 42 outputs a 0-20V tuning voltage, with capacitance values ​​adjustable from 0.3-2.22pF.

[0046] Optionally, such as Figure 3As shown, when the S11 parameter quality of the antenna is difficult to reach below -10dB, the tuning circuit 40 can further include an inductor L, a first capacitor C1, and a DC blocking capacitor C2. The inductor L is connected between the antenna port and the output terminal of the digital tuning chip 41. The first terminal of the first capacitor C1 is connected to the output terminal of the varactor diode 42, and the second terminal of the first capacitor C1 is connected to the first terminal of the DC blocking capacitor C2. The second terminal of the DC blocking capacitor C2 is connected to the RF signal output port. This embodiment, by adding the corresponding inductor and first capacitor, enables the S11 parameter quality used to evaluate antenna performance to reach below -10dB, further optimizing the tuning circuit 40.

[0047] refer to Figure 4 The RF compensation circuit 50 includes an RF switch 51 and an RF front-end module 52. The RF switch 51 is connected between the tuning circuit 40 and the RF front-end module 52 to switch the RF signal on and off. It is understood that the RF switch 51 can also be used for multi-band switching. The RF front-end module 52 is connected to the control module 10 to receive the compensation control signal output by the control module 10 to adjust the PA bias voltage and LNA gain. In one specific embodiment, the RF compensation circuit 50 also includes a power management chip 53. The RF front-end module 52 includes a power amplifier and a low-noise amplifier. The power management chip 53 adjusts the PA bias voltage of the power amplifier according to the compensation control signal, with an adjustment range of 2.8-4.2V. The low-noise amplifier adjusts the LNA gain according to the compensation control signal, with a gain compensation range of 10-30dB.

[0048] refer to Figure 4 The multi-parameter measurement module 30 includes a directional coupler 31, a detector 32, and a transceiver 33. The directional coupler 31 is connected between the antenna port and the RF switch 51. One end of the detector 32 is connected to the directional coupler 31, and the other end is connected to the control module 10. The input of the transceiver 33 is connected to the RF front-end module 52, and the output of the transceiver 33 is connected to the control module 10. The directional coupler 31 collects the incident wave, reflected wave, and actual output power of the antenna. The detector 32 converts the incident wave and reflected wave into DC voltages to obtain the incident wave voltage and reflected wave voltage, and transmits these voltages and the actual output power to the control module 10. The transceiver 33 outputs the collected received signal to the control module 10. Essentially, the received signal is first received by the antenna, then demodulated and converted into a baseband signal by the transceiver 33, and finally the RSSI value is calculated by the CPU processor 12. Specifically, the CPU processor 12 calculates the S11 parameter based on the incident wave voltage Vinc and the reflected wave voltage Vrefl. The formula for calculating the S11 parameter is: S11 (dB) = 20log10(Vrefl / Vinc).

[0049] like Figure 2As shown, the card insertion detection module 20 includes a Hall sensor 21 and a capacitance sensor 22, both connected to the control module 10. The Hall sensor 21 is mounted on the edge of the card slot to detect whether a card is inserted. The capacitance sensor 22 is mounted on the bottom of the card slot to collect the capacitance value of the inserted card and output it to the control module 10. The Hall sensor 21 can be of model A1120EUA-T, and the capacitance sensor 22 can be of model AD7151. Optionally, the sensor used by the card insertion detection module 20 to detect whether a card is inserted is not limited to the Hall sensor 21; other sensors such as a light sensor can also be used. Similarly, the sensor used to detect capacitance to determine the card material is not limited to the capacitance sensor 22; an inductive sensor can also be used.

[0050] It is understandable that the card slot is in close contact with the motherboard and has metal coupling, so there is usually a default capacitance value. Therefore, there is a capacitance value even when no card is inserted. This may cause the MCU controller 11 to sample the capacitance value and misjudge that a card is inserted. Therefore, in this embodiment, the card insertion detection module 20 needs to be equipped with a sensor that connects the user and the control module 10 to detect whether a card is inserted in the card slot, so as to avoid misjudgment of card insertion caused by using only the sensor for detecting capacitance.

[0051] In some optional embodiments, the card insertion detection module 20 further includes an RC filter unit (not shown). The Hall sensor 21 has a detection distance of 2mm, and its output signal is input to the ADC channel of the control module 10 after passing through the RC filter unit. The capacitance sensor 22 is connected to the control module 10 via an I2C serial interface, and it collects the capacitance value of the inserted PICC card between 0-13pF, with a minimum detection limit of 1fF. Optionally, in the RC filter unit (not shown), the resistor R can be a 1kΩ resistor, and the capacitor C can be a 100nF capacitor.

[0052] It is understood that in this utility model, the card insertion status detection uses Hall sensor 21 to monitor the PICC card slot status in real time, triggering dynamic tuning. Then, capacitive sensor 22 identifies different card materials, and the results are fed back to MCU controller 11. The hybrid tuning network uses an AMN (adaptive matching network) combining digital tuning chip 41 (coarse tuning) and varactor diode 42 (fine tuning) to achieve nanosecond-level impedance matching. RF parameter collaborative compensation adjusts the PA bias voltage and LNA gain synchronously based on real-time output power and RSSI to compensate for TRP / TIS losses caused by the load pulling effect of card insertion. The control module 10 integrates the card insertion detection of Hall sensor 21 (card insertion action) and capacitive sensor 22 (different card materials), and uses closed-loop control based on a pre-stored parameter mapping table and real-time S11 feedback to adapt to different frequency bands and card types to complete signal compensation. The present invention can achieve the following technical effects: (1) TRP improvement: When the card is inserted, the TRP fluctuation is ≤0.8dB, which is significantly improved compared with the 3-5dB deterioration when it is not compensated; (2) TIS improvement: When the card is inserted, the TIS deterioration is ≤1.5dB, which is significantly improved compared with the 4-6dB deterioration when it is not compensated.

[0053] It is understandable that a POS machine is preferred as the payment terminal. Of course, the payment terminal can also be other mobile payment terminals with card insertion functionality. This invention can reduce the impact on antenna performance during POS card insertion transactions by adaptively tuning the antenna to match the network and collaboratively adjusting radio frequency parameters, making it suitable for scenarios supporting multi-band cellular communication. This embodiment can effectively suppress the performance degradation of multi-band antennas caused by card insertion through hardware adaptive tuning and collaborative compensation of radio frequency parameters without changing the internal PCB stacking layout of the payment terminal, while meeting the 3GPP TS 36.101 radiation standard.

[0054] The tuning circuit and RF parameter compensation method of this utility model can also be replaced by an RF signal enhancement chip, that is, when the card insertion test is completed, the S11 is used to determine the performance degradation of TRP / TIS and adaptively complete the signal enhancement.

[0055] This utility model's payment terminal antenna performance optimization device solves the problems of multi-band sensitivity and time-varying interference caused by card insertion. It achieves hardware adaptive tuning and cross-layer coordination of radio frequency parameters, enabling precise performance optimization and compensation for application scenarios with different frequency bands and different PICC card types. The compact layout design for miniaturized mobile payment terminals ensures that the POS machine still meets 3GPP TS 36.101 certification requirements when a card is inserted, reducing product launch risks.

[0056] It should be understood that, in the embodiments of this application, the processor may be a Central Processing Unit (CPU), but it may also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor.

[0057] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this invention.

[0058] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.

[0059] It is understood that the above embodiments only illustrate preferred embodiments of the present utility model, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the present utility model patent. It should be noted that for those skilled in the art, the above technical features can be freely combined, and several modifications and improvements can be made without departing from the concept of the present utility model, all of which fall within the protection scope of the present utility model. Therefore, all equivalent transformations and modifications made within the scope of the claims of the present utility model should fall within the coverage of the claims of the present utility model.

Claims

1. A device for optimizing the antenna performance of a payment terminal, characterized in that, Including the control module (10), it also includes: The card insertion detection module (20) for detecting the card slot status of the payment terminal has its output end connected to the control module (10) to output a card insertion detection signal to the control module (10); The multi-parameter measurement module (30) has its input end connected to the antenna port for collecting the incident wave voltage, reflected wave voltage, actual output power and received signal of the antenna, and its output end connected to the control module (10) to output the collected signal. The tuning circuit (40) has its input terminal connected to the control module (10) to receive the tuning control signal output by the control module (10) and thereby realize the antenna adaptive impedance matching. The radio frequency compensation circuit (50) has its input terminal connected to the control module (10) to receive the compensation control signal output by the control module (10) and thereby realize radio frequency parameter compensation.

2. The payment terminal antenna performance optimization device according to claim 1, characterized in that, The tuning circuit (40) includes a coarse tuning unit and a fine tuning unit. The input terminals of the coarse tuning unit and the fine tuning unit are connected to the control module (10). The output terminals of the coarse tuning unit and the fine tuning unit are connected to the transmission channel between the antenna port and the radio frequency switch (51) used to switch the radio frequency signal on and off. The coarse tuning unit and the fine tuning unit also have ground terminals. The coarse tuning unit implements a 0.05pF precision step, and the fine tuning unit implements a 0.01pF precision step.

3. The payment terminal antenna performance optimization device according to claim 2, characterized in that, The coarse adjustment unit is a PE64907 digital tuning chip (41), and the fine adjustment unit is an SMV2019 varactor diode (42). The digital tuning chip (41) controls four capacitor arrays through the SPI interface, and the capacitance value is adjustable from 0.85 to 2.4 pF. The varactor diode (42) outputs a 0-20V tuning voltage, and the capacitance value is adjustable from 0.3 to 2.22 pF.

4. The payment terminal antenna performance optimization device according to claim 3, characterized in that, The tuning circuit (40) further includes an inductor (L), a first capacitor (C1), and a DC blocking capacitor (C2); the inductor (L) is connected between the antenna port and the output terminal of the digital tuning chip (41), the first end of the first capacitor (C1) is connected to the output terminal of the varactor diode (42), the second end of the first capacitor (C1) is connected to the first end of the DC blocking capacitor (C2), and the second end of the DC blocking capacitor (C2) is connected to the radio frequency signal output port.

5. The payment terminal antenna performance optimization device according to claim 1, characterized in that, The radio frequency compensation circuit (50) includes a radio frequency switch (51) and a radio frequency front-end module (52); the radio frequency switch (51) is connected between the tuning circuit (40) and the radio frequency front-end module (52) for switching on and off radio frequency signals and switching between multiple frequency bands; the radio frequency front-end module (52) is connected to the control module (10) to receive the compensation control signal output by the control module (10) to adjust the PA bias voltage and LNA gain.

6. The payment terminal antenna performance optimization device according to claim 5, characterized in that, The RF compensation circuit (50) also includes a power management chip (53). The RF front-end module (52) includes a power amplifier and a low-noise amplifier. The power management chip (53) adjusts the PA bias voltage of the power amplifier according to the compensation control signal, and its adjustment range is 2.8-4.2V. The low-noise amplifier adjusts the LNA gain according to the compensation control signal, and its gain supplement range is 10-30dB.

7. The payment terminal antenna performance optimization device according to claim 6, characterized in that, The multi-parameter measurement module (30) includes a directional coupler (31), a detector (32), and a signal transceiver (33). The directional coupler (31) is connected between the antenna port and the radio frequency switch (51). One end of the detector (32) is connected to the directional coupler (31), and the other end of the detector (32) is connected to the control module (10). The input end of the signal transceiver (33) is connected to the radio frequency front-end module (52), and the output end of the signal transceiver (33) is connected to the control module (10). The directional coupler (31) collects the incident wave, reflected wave and actual output power of the antenna, and the detector (32) converts the incident wave and reflected wave into DC voltage to obtain the incident wave voltage and reflected wave voltage, and transmits the incident wave voltage, the reflected wave voltage and the actual output power to the control module (10). The transceiver (33) is used to output the acquired received signal to the control module (10).

8. The payment terminal antenna performance optimization device according to claim 1, characterized in that, The card insertion detection module (20) includes a Hall sensor (21) and a capacitive sensor (22) that are respectively connected to the control module (10). The Hall sensor (21) is installed on the edge of the card slot to detect whether a card is inserted into the card slot; The capacitance sensor (22) is installed at the bottom of the card slot and is used to collect the capacitance value of the inserted card and output it to the control module (10).

9. The payment terminal antenna performance optimization device according to claim 8, characterized in that, The card insertion detection module (20) also includes an RC filter unit; The Hall sensor (21) has a detection distance of 2mm, and its output signal is input to the ADC channel of the control module (10) after passing through the RC filter unit; and / or The capacitance sensor (22) is connected to the control module (10) via an I2C serial interface. It collects the capacitance value of the inserted PICC card between 0-13pF, and its minimum detection limit is 1fF.

10. The payment terminal antenna performance optimization device according to claim 1, characterized in that, The payment terminal is a POS machine.

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