3D stacked package chip based on micro-led optical interconnection

The Micro-LED optical interconnect solution solves the bandwidth limitations and high power consumption problems of high-speed interconnection between chips, and realizes low-cost, high-stability and high-bandwidth optical signal transmission, which is suitable for high temperature and complex environments.

CN224556140UActive Publication Date: 2026-07-24CENT SOUTH UNIV
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
CENT SOUTH UNIV
Filing Date
2025-09-16
Publication Date
2026-07-24

AI Technical Summary

Technical Problem

Existing high-speed interconnects between chips rely on electrical signal transmission, which suffers from bandwidth limitations, electromagnetic interference, and high power consumption. VCSEL optical interconnect solutions are costly, have complex processes, and are difficult to integrate. Increased interconnect density between silicon-based chips leads to tight packaging space and increased manufacturing difficulty.

Method used

By adopting a Micro-LED optical interconnect solution, optical signal transmission between chips is achieved by setting up optical emission and reception units on the SoC chip and using waveguide structures and total internal reflection mirrors, reducing the dependence on silicon via density and constructing an independent optical signal transmission channel.

Benefits of technology

It reduces packaging costs and power consumption, increases data transmission bandwidth, reduces packaging process complexity, has natural immunity to electromagnetic interference, maintains signal integrity, and is suitable for high-temperature and complex environments.

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Abstract

The utility model provides a kind of 3D stacked package chip based on Micro-LED light interconnection belongs to optoelectronic technology field.3D stacked package chip includes SoC chip, photoelectric component, first substrate, second substrate, waveguide structure and storage chip. Photoelectric component includes light emitting unit and light receiving unit. Light emitting unit and light receiving unit are set on SoC chip and are located in the through slot of first substrate.Light emitting unit is reflected to the light receiving unit on another SoC chip adjacent to it by total internal reflection mirror TIR and waveguide block to realize the signal transmission of adjacent SoC chip. Multiple storage chips are stacked along z-axis direction. Photoelectric component is respectively arranged between adjacent two storage chips or between storage chip and SoC chip. The utility model can reduce the packaging volume, optimize power consumption, increase the bandwidth of data transmission between chips.
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