450 results about "Optical interconnect" patented technology

A system includes a housing and a first circuit board positioned inside the housing. The housing has a top panel, a bottom panel, a left side panel, a right side panel, a front panel, and a rear panel. The front panel is at an angle relative to the bottom panel in which the angle is in a range from 30 to 150°. The first circuit board has a length, a width, and a thickness, in which the length is at least twice the thickness, the width is at least twice the thickness, and the first circuit board has a first surface defined by the length and the width. The first surface of the first circuit board is at a first angle relative to the bottom panel in which the first angle is in a range from 30 to 150°. The first surface of the first circuit board is substantially parallel to the front panel or at a second angle relative to the front panel in which the second angle is less than 60°. The system includes a first data processing module and a first optical interconnect module both electrically coupled to the first circuit board. The optical interconnect module is configured to receive first optical signals from a first optical link, convert the first optical signals to first electrical signals, and transmit the first electrical signals to the first data processing module.

A system includes a housing and a first circuit board positioned inside the housing. The housing has a top panel, a bottom panel, a left side panel, a right side panel, a front panel, and a rear panel. The front panel is at an angle relative to the bottom panel in which the angle is in a range from 30 to 150°. The first circuit board has a length, a width, and a thickness, in which the length is at least twice the thickness, the width is at least twice the thickness, and the first circuit board has a first surface defined by the length and the width. The first surface of the first circuit board is at a first angle relative to the bottom panel in which the first angle is in a range from 30 to 150°. The first surface of the first circuit board is substantially parallel to the front panel or at a second angle relative to the front panel in which the second angle is less than 60°. The system includes a first data processing module and a first optical interconnect module both electrically coupled to the first circuit board. The optical interconnect module is configured to receive first optical signals from a first optical link, convert the first optical signals to first electrical signals, and transmit the first electrical signals to the first data processing module.

The invention provides a financial data analysis, identification and acquisition method and system. According to the method, firstly, a financial evolution graph is constructed based on cross-cycle financial revenue and expenditure data, multi-source heterogeneous financial data are integrated in real time through an optical interconnection storage device, time-space correlation characteristics are synchronously written in through a dynamic wavelength allocation protocol, and optical interconnection enhanced dynamic graph nodes are generated. A deviation early warning feature vector is generated by combining capital flow entropy change of an atlas node, after an atlas topology reconstruction rule is triggered, cross-department data consistency is verified through polarization state coding of an optical interconnection device, and policy effect lag parameters are extracted. And finally, correcting the weight of the atlas node based on a dynamic prediction mechanism, and outputting a cross-department financial traceability report. According to the technical scheme provided by the invention, through optical interconnection enhanced dynamic atlas and cross-department data fusion, the financial resource configuration abnormity monitoring capability is improved, and accurate traceability of a policy lag effect and a fund chain fracture risk is realized.

Silicon photonics technologies adds integrated optics functionality to CMOS integrated circuits thereby leveraging high volume manufacturing. Independent of geometry or technology these silicon photonic devices require packaging with single mode optical fibers to interface to the optical network and / or co-packaging with active semiconductor devices, discrete microoptoelectromechanical systems (MOEMS) s or monolithically integrated MOEMS. Stringent performance constraints and minimizing manufacturing costs / times are consistent demands on such photonic circuits. Accordingly, there is a demand for low-cost and low-loss optical coupling technologies for packaging that can easily be scaled for mass production that overcome limitations in the prior art. The inventors have established design methodologies, packaging schemes and component designs that leverage automated passive assembly techniques for speed / cost in combination with directly written optical interconnects that allow for offsetting the losses that would arise from the manufacturing tolerances of these passive assembly techniques.

The invention relates to the technical field of semiconductor photoelectronics, and discloses a multi-physics field coupling silicon-based optical interconnection chip degradation model construction method and application, and the method comprises the steps: firstly constructing a multi-physics field coupling analysis model, and quantitatively representing the coupling relation of thermodynamics, optics, electricity and material aging through an inter-field coupling equation and a material aging dynamic model; simulating field distribution of a chip key area under multi-environment stress through finite element analysis, and extracting data; then historical degradation data is collected by combining an accelerated aging test and long-term operation monitoring, and a degradation parameter prediction model is established after data processing based on machine learning; and finally, inputting a finite element result and a prediction result into a material aging dynamic model, and finally forming a multi-physics field coupling degradation model. The problems that the prior art depends on a single physical field, degradation mechanism analysis is incomplete, and service life evaluation is inaccurate are solved, and support can be provided for reliability evaluation, structure optimization and service life prediction of the silicon-based optical interconnection chip.

Provided is a device, including: an analog optical interconnect; an input array coupled to the analog optical interconnect; and an analog or mixed signal processor or a memory array coupled to the input array via the analog optical interconnect.

The invention discloses an optical interconnection system on an optical chip and the optical chip, relates to the technical field of communication, and aims to solve the technical problem of low system data capacity in the wavelength division multiplexing technology in the prior art. The system comprises a micro-ring modulation device, a polarization combiner and a demultiplexer, the output end of the micro-ring modulation device is connected with the input end of the polarization combiner; the input end of the demultiplexer is connected with the output end of the polarization combiner; the micro-ring modulation device is used for performing signal modulation on TE0 polarized light and TM0 polarized light in the light source; the polarization combiner is used for combining the TE0 polarized light and the TM0 polarized light output by the micro-ring modulation device and outputting combined light; and the demultiplexer is used for decomposing the combined light into signals corresponding to a plurality of wavelengths. By combining the polarization multiplexing technology and the wavelength division multiplexing technology, the number of multiplexing channels of the optical interconnection system is multiplied, and the data capacity of the optical interconnection system is improved.

The invention discloses an on-chip optical interconnection and switching chip and an application system thereof. Wherein the on-chip optical interconnection and exchange chip is integrated by a power divider, a bidirectional optical transceiver unit and an optical switch unit; the application system of the on-chip optical interconnection and switching chip comprises a multi-wavelength light source used for generating multi-wavelength optical carrier signals, a transceiving unit control and clock module used for bidirectional transceiving unit feedback / amplifier control and clock synchronization, and an optical switching control module used for switching an optical switching unit switching link. The chips and the modules are used for realizing optical interconnection and optical switching of the special electrical computing chip ASIC. According to the invention, bidirectional optical interconnection and exchange of special computing electric chips such as a CPU, a GPU, a DPU and the like can be realized by utilizing an on-chip optical interconnection and exchange technology, the interconnection rate is high, the exchange switching time is short, computing power cluster networking oriented to artificial intelligence application can be supported, and the application prospect is good.

The invention relates to a packaging structure and packaging method for an optical module and an optical chip, and the packaging structure comprises a receiving end assembly, a stepped metal heat sink, and a silicon-based optical interconnection assembly which is pasted on the stepped metal heat sink. The silicon-based optical interconnection assembly comprises a laser, a silicon light beam splitter, a lens group, a light transmission compensation gasket, a silicon light modulator and an optical fiber array; coplanar coupling is formed between the laser and the silicon light beam splitter. The silicon light beam splitter and at least part of the collimating lens in the lens group are fixed on the light transmission compensation gasket; the optical fiber array and the silicon light modulator realize waveguide matching in an active coupling mode; the silicon light modulator and the receiving end assembly are separately arranged at least at a preset interval, and the optical fiber array and / or the receiving end assembly are / is covered with a metal isolation cover. According to the invention, the problems of high cost of multiple light sources, easy pollution of an open light path and yield bottleneck caused by low-reliability glue in the prior art are solved, and finally, a packaging scheme which is compact in structure, stable in process and high in mass production is formed.

The utility model provides an adapter plate and an optical communication device, the main body structure of the adapter plate is a glass substrate and an optical waveguide, the glass substrate is provided with one or more conductive through holes, and the conductive through holes comprise through holes penetrating through the glass substrate and conductive materials filled in the through holes. The optical waveguide is arranged in the glass substrate, and the two ends of the optical waveguide extend out of the surface of the glass substrate and are used for carrying out optical interconnection on a plurality of optical chips packaged on the adapter plate. The glass substrate has a better electrifying effect, the optical waveguide can effectively improve the coupling efficiency of optical signals and improve higher data capacity and signal quality, and optical interconnection between different optical chips can be realized without additional optical fibers, so that the packaging size can be smaller.

The invention discloses a sensing integrated optical sensor and a preparation method thereof, and relates to the technical field of on-chip optical sensing. The device comprises a silicon substrate, an oxidation buried layer is deposited on the top of the silicon substrate, a first rectangular waveguide is installed above the oxidation buried layer, one end of the first rectangular waveguide is flush with the oxidation buried layer, a second rectangular waveguide is installed at the other end of the first rectangular waveguide, and a reverse tapering part is arranged at the end, facing the center of the oxidation buried layer, of the first rectangular waveguide. A forward tapering part is arranged at the end, away from the center of the oxidation buried layer, of the second rectangular waveguide. The hybrid integration of the metal plasma resonant cavity is realized based on on-chip optical interconnection, the quasi-continuous spectrum bound state is excited by strong coupling between resonance modes, the quality factor is greatly improved while high-sensitivity on-chip optical sensing is realized, the optical transmission loss is relatively low, and the application range is wide. The method has a practical application effect on the construction of a novel on-chip optical sensing system.

The present disclosure provides an integrated circuit (IC) structure. The IC structure includes an optical interposer having optical waveguides; a plurality of chip stacks disposed over the optical interposer, each of the plurality of chip stacks including a first photonic IC chip and a memory chip over the first photonic IC chip; and a plurality of first laser source chips disposed adjacent to the plurality of chip stacks, respectively, wherein the optical waveguides in the optical interposer are configured as an optical interconnect structure to couple with the memory chip through the first photonic IC chip.

In order to enable applications such as artificial intelligence (AI) and machine learning in a large scale, a large amount of information needs to be processed very fast. To improve the speed of the computation, not only faster graphical and central processors are required, but also the communication between processors and high bandwidth memories should be fast enough to reduce the latency. Optical interconnect can be a replacement for copper interconnect which is providing larger bandwidth and lower latency. As an efficient light source, micro-LEDs can be used as light source for chip-to-chip optical interconnect. Using a massively parallel memory-processor interconnect using low-power micro-LED, the computation speed will increase dramatically, and less amount of energy will be wasted through copper self-heating.

The invention discloses a polarization insensitive filter based on a sub-wavelength grating structure, and belongs to the technical field of integrated photonic devices. The filter comprises an input transition waveguide, a multimode waveguide grating and an output transition waveguide which are connected in sequence. The multimode waveguide grating is composed of a central sub-wavelength grating waveguide and Bragg gratings symmetrically distributed on the two sides, and the effective refractive indexes of TE polarization and TM polarization are equal by adjusting the waveguide width and duty ratio of the central sub-wavelength grating, so that the polarization sensitivity of the device is eliminated fundamentally. And the input / output transition waveguide adopts a transition mode of mixing a tapered waveguide and a sub-wavelength grating waveguide, so that low-loss mode transmission between a straight waveguide and a multimode grating is realized. According to the invention, the anisotropic equivalent medium characteristic of the sub-wavelength grating is utilized, a function of simultaneously and effectively filtering TE and TM polarization is realized, and the filter has the advantages of polarization insensitivity, flexible design, compact structure, simple process and compatibility with a CMOS (Complementary Metal Oxide Semiconductor) process, and has important application value in the fields of optical communication, optical interconnection and the like.

The invention discloses a link parameter processing method, an optical interconnection system, equipment, a medium and a product, relates to the technical field of data processing, and establishes a mapping relationship between preset identifiers of respective optical modules of a host end and an equipment end and a plurality of link positions of a whole link to realize index levels corresponding to different preset identifier parameters. And judging a target index level stored in the host side according to the configuration parameters stored in the host side and the index level corresponding to the mapping relationship. And refining link parameters required to be configured subsequently based on the link position. Therefore, the technical problem that the parameters of the optical module of the whole link are reconfigured when a conventional optical interconnection system configures the parameters is solved, the whole link is split into the link positions during matching each time, the specific link positions needing to be adapted are determined, and the matching efficiency is improved. And subsequent matching is carried out according to the link position needing to be adapted, so that unnecessary optical module matching operation steps are reduced, and the configuration rate is improved.

The invention provides a high-density photoelectric common connection pinboard based on a low-loss silicon nitride grating coupler. The invention aims to overcome the difficulty that the existing photoelectric heterogeneous chip is difficult to integrate, stack and package, and realizes high-density interconnection between the chip and the interposer by using a grating coupling structure and a silicon through hole technology, thereby realizing high-integration low-loss packaging of the heterogeneous chip on the interposer. According to the invention, high-efficiency optical interconnection between the heterogeneous chip and the photoelectric co-connection intermediate layer is realized through the high-efficiency grating coupler, and high-density electrical interconnection between the chip and the photoelectric co-connection intermediate layer is realized through the TSV technology and the RDL technology. Meanwhile, the optical interconnection efficiency between the interposer and the chip is improved by utilizing the electrode patterning advantage of the RDL technology, and the self-alignment between the chip and the interposer is realized. The method has extremely high compatibility to the packaging scene of the existing photoelectric heterogeneous chip, so that the method has great significance in improving the integration density and reducing the interconnection loss of a photoelectric heterogeneous integrated system and promoting the practicability of the photoelectric heterogeneous integrated system.

The invention discloses an optical interconnection system, an optical communication control method, device and equipment, a medium and a product, and relates to the technical field of communication, the optical interconnection system comprises first optical communication equipment and second optical communication equipment, the first optical communication equipment comprises a first chip, a first optical module and a first control module which are mutually connected, the second optical communication equipment comprises a second chip, a second optical module and a second control module which are connected with one another, and the first control module is used for detecting that the first optical module is in place through the first control signal and detecting the state of a driver chip in the first optical module through the second control signal so as to judge whether a driver in the first optical module works normally or not; and if yes, controlling a port corresponding to the first chip to exit from the electrical idle state through a third control signal, controlling the first chip to start link training, and after the link training is completed, establishing communication between the first chip and the second chip. According to the invention, the optical interconnection system is prevented from running in a speed reduction state.

According to the three-dimensional stacked photoelectric co-packaging structure and the packaging method thereof provided by the invention, the three-dimensional stacked structure is formed by bonding the optical chips with C2W of the adapter plate wafer, and the optical chips can be allowed to be processed separately and then bonded on the adapter plate wafer, so that the complexity of the packaging process is reduced, and the packaging reliability is improved; besides, a bonding pad of each layer of optical chip bonding pad region is in contact connection with a part of conductive via holes of the electric interconnection region, and an upper layer optical coupling region is arranged to shrink outwards relative to a lower layer optical coupling region to expose a first optical coupler in the lower layer optical coupling region, so that the areas of the optical chips are sequentially increased from bottom to top along the thickness stacking direction of the photoelectric switching structure; the electric interconnection structure is arranged on the outer side edge of the optical chip to form an inverted pyramid shape, the electric interconnection structure is distributed on the outer side edge of the optical chip, a conductive column structure can be effectively prevented from being manufactured on the optical chip, the process complexity is reduced, meanwhile, the optical interconnection structure is also distributed on the outer side edge of the optical chip, light in the optical chip can be directly coupled to a photoelectric transmission layer, and too high efficiency loss caused by too many optical coupling times is avoided.

The invention discloses a polarization rotation beam splitter structure based on a lithium niobate film, belongs to the technical field of optical waveguides, and particularly relates to an integrated optical device for realizing polarization rotation and beam splitting of optical signals. The main structure is two linear tapered waveguides and an asymmetric coupler, the structure utilizes the excellent electro-optical characteristics of a lithium niobate film, and through the design of the linear tapered waveguides and an asymmetric directional coupling unit, when light is transmitted along the tapered waveguides which are gradually increased, due to the hybridization between modes, the light transmission efficiency is improved, and the light transmission efficiency is improved. The TM0 mode of narrow band import emission is gradually converted into the high-order TE1 mode, the high-order TE1 mode is coupled through the asymmetric coupler and converted into the TE0 mode to be output, efficient polarization rotation and beam splitting functions between the TM mode and the TE mode are achieved, and potential application prospects are achieved. The polarization rotation beam splitter not only realizes simplification of a device structure, is expected to be applied to efficient polarization multiplexing and polarization modulation, but also provides flexibility for manufacturing a large-scale optical switch array and an optical interconnection network.

The invention belongs to the field of photoelectric co-packaging, and particularly relates to a photoelectric co-packaging temperature control framework based on an embedded glass-based micro-channel. Independent lower-layer heat dissipation is carried out on a heat-sensitive component optical interconnection chip through an embedded glass-based micro-channel technology, an electric interconnection heat dissipation channel continues to use existing upper-layer heat dissipation, mutual isolation of two heat dissipation channels in the whole common packaging body is achieved, heat dissipation partition is achieved from a new dimension, and thermal crosstalk is avoided; the whole common packaging body dissipates heat at the upper layer and the lower layer, so that the effective heat dissipation area is greatly increased, and the heat dissipation capability of the packaging body is greatly improved; and the guidance quality of the heat dissipation channel is better through material selection and additional arrangement of the heat insulation layer. And a metal film temperature sensor can be additionally arranged, so that the temperature of a component can be monitored in real time, heat management regulation and control can be performed in a targeted manner, the temperature rise of a heating device and the heat contact efficiency between the micro-channels are balanced, and more efficient heat dissipation is realized.

The invention relates to the technical field of chip packaging, in particular to a photoelectric co-packaging underfill isolation packaging framework and process. According to the invention, the underfill glue blocking hole is additionally designed in the underfill glue diffusion area at the outer edge of the optical fiber slot hole on the adapter plate, and through the resistance effect (interface difference and liquid tension) of the underfill glue blocking hole on the flowing of the underfill glue, the glue overflow range is accurately controlled, and the underfill glue is prevented from covering the optical fiber coupler of the optical chip. By optimizing the underfill isolation design, efficient coupling of the optical chip and the optical fiber is ensured in the pollution direction of the underfill, meanwhile, the packaging gap between the photoelectric chips is reduced, and the packaging density and compactness are improved; the process tolerance, the product yield and the system performance of photoelectric packaging are remarkably improved, and the method is particularly suitable for the application fields of high-density and high-performance calculation and optical interconnection.

In one embodiment, an optical transceiver includes: a photonic integrated circuit (PIC) formed on a semiconductor die having a first side and a second side opposite the first side, where the first side includes a first optical circuit and a second optical circuit and the second side is to electrically couple with a substrate. The PIC may further have one or more through silicon vias (TSVs) formed through the semiconductor die to electrically couple the first side with the second side, where at least one of the TSVs is to enable electrical coupling between a first other die adapted to the first side and a second other die. Other embodiments are described and claimed.

The invention provides a photoelectric chip common packaging piece, an optical communication module and a preparation method, the photoelectric chip common packaging piece comprises a carrier plate, an optical chip and an electric chip, one side of the carrier plate is provided with a mounting surface, the mounting surface is provided with an electric interconnection structure, the carrier plate is internally provided with a conductive through hole and an optical interconnection structure, and the conductive through hole is electrically connected with the electric interconnection structure; the optical chip and the electric chip are both arranged on the mounting surface of the carrier plate, the optical chip is electrically connected to the electric chip through an electric interconnection structure, one side, facing the mounting surface, of the optical chip comprises an optical device, and an optical signal emitted by the optical device penetrates through the carrier plate through the optical interconnection structure. Compared with the prior art, efficient conversion and transmission of optical signals and electric signals are achieved, the interconnection distance between chips is shortened to a large extent, signal transmission loss and delay are reduced, signal integrity is improved, and therefore reliable transmission of high-frequency signals is achieved.

The invention belongs to the technical field of integrated photonic devices, and discloses a total internal reflection light switch based on a phase change material and a use method thereof.The phase change material area is subjected to first pretreatment, the phase change material in the phase change material area is completely converted into an amorphous state from a crystalline state, and the phase change material in the phase change material area is subjected to second pretreatment; the difference value between the refractive index of the phase change material and the refractive index of the waveguide is greater than 0.6, and at the moment, the total internal reflection light switch is in a cross state; second pretreatment is carried out on the phase-change material area, the phase-change material in the phase-change material area is completely converted into a crystalline state from an amorphous state, the difference value between the refractive index of the phase-change material and the refractive index of the waveguide is 0-0.2, at the moment, the straight-through function of the total internal reflection optical switch is achieved, the power consumption of the optical switch is remarkably reduced, and the optical switch has a wide application prospect. Performance indexes of the optical switch are optimized, multi-mode optical signal transmission is achieved, and application of the optical switch in the fields of high-speed optical communication, optical interconnection and optical calculation is promoted.

The invention discloses a cascaded double-ring silicon optical modulator structure based on an Au1ter-Townes effect and a phase change material. The cascaded double-ring silicon optical modulator structure comprises a single-mode bus waveguide and two annular waveguides, a phase-change material is integrated on the surface of the annular waveguide to adjust the initial resonant wavelengths of the two micro-rings; pN junctions are integrated in the annular waveguide, and phase modulation of light is achieved through carrier injection. An Au1ter-Towns effect is utilized to enable a micro-ring transmission spectrum to form two split super-modes, and the extinction ratio corresponding to the two super-modes is changed by adjusting the resonant wavelengths of the double micro-rings; and meanwhile, the cascaded double-micro-ring structure can realize large modulation bandwidth and meet the high-speed transmission requirement. The micro-ring waveguide deposition phase-change material enables resonant wavelength tuning to have non-volatility, and compared with a traditional thermal tuning mode, the micro-ring waveguide deposition phase-change material can greatly reduce regulation and control power consumption. According to the invention, the technical bottleneck of the existing silicon optical modulator is overcome, and the practical application requirements of the fields of optical interconnection, optical communication, optical calculation and the like on the high-extinction-ratio high-speed modulator can be met.

Integrated optical waveguides, direct-bonded waveguide interface joints, optical routing and interconnects are provided. An example optical interconnect joins first and second optical conduits. A first direct oxide bond at room temperature joins outer claddings of the two optical conduits and a second direct bond joins the inner light-transmitting cores of the two conduits at an annealing temperature. The two low-temperature bonds allow photonics to coexist in an integrated circuit or microelectronics package without conventional high-temperatures detrimental to microelectronics. Direct-bonded square, rectangular, polygonal, and noncircular optical interfaces provide better matching with rectangular waveguides and better performance. Direct oxide-bonding processes can be applied to create running waveguides, photonic wires, and optical routing in an integrated circuit package or in chip-to-chip optical communications without need for conventional optical couplers. An example wafer-level process fabricates running waveguides, optical routing, and direct-bonded optical interconnects for silicon photonics and optoelectronics packages when two wafers are joined.

The invention relates to the technical field of chip reliability testing, and discloses a silicon-based optical interconnection chip dynamic life test system and method.The system comprises a stress loading module, a state monitoring module and a self-adaptive control module, and the stress loading module receives actual working load change characteristics of a chip to be tested; generating and applying dynamic stress matched with an actual scene; the state monitoring module monitors the real-time state of the loaded chip, and collects and outputs multi-dimensional data of optical loss, heat distribution and material deformation; and the adaptive control module analyzes the data to judge the degradation degree of the chip, dynamically adjusts stress parameters, returns the stress parameters to the stress loading module to optimize loading, outputs a service life evaluation result, and outputs a test stopping signal and records failure service life data when the data exceeds a safety range. The method corresponds to the system. According to the application, real simulation, comprehensive monitoring and accurate evaluation of the life test are realized, the test authenticity and the life evaluation accuracy are improved, and support is provided for chip reliability verification.

The invention discloses an optical interconnection link assembly, an optical interconnection link training method and an acceleration cluster system, and relates to the technical field of optical interconnection, and the method comprises the steps: allowing an optical interconnection link to enter a training process when a switching assembly successfully receives a detection character sequence sent by an opposite side, so as to guarantee the normal communication of the optical interconnection link, the success rate and the reliability of link establishment are improved, only when the bidirectional communication link of the optical interconnection link is successfully established, the actual data transmission function can be performed through the optical interconnection link, the limitation of traditional copper cable interconnection is solved, an efficient and stable data transmission link based on PCIe optical interconnection is provided, and the data transmission efficiency is improved. And low-loss and long-distance transmission is realized.

The present application relates to the technical field of signal transmission. Disclosed are a method and apparatus for establishing a peripheral component interconnect express (PCIe) optical interconnection link, and a device, a non-volatile readable storage medium and a system. The method comprises: acquiring an upstream data signal which is transmitted by means of an electrical path, and detecting whether there is an electrical idle ordered set in the upstream data signal (S11); if there is an electrical idle ordered set, recording the current link rate, and by means of counting the electrical idle ordered set, determining whether the current sending of the electrical idle ordered set has been completed (S12); and when the current sending of the electrical idle ordered set has been completed, generating a target signal sequence of a corresponding rate according to the link rate, and sending the target signal sequence to an opposite end by means of a PCIe optical interconnection link, such that the opposite end maintains stable operation on the basis of the target signal sequence (S13). A PCIe optical interconnection link can be established, and the success rate of establishing the PCIe optical interconnection link can be increased, thereby avoiding the problem of a link establishment failure caused by an electrical idle state during link establishment.

Embodiments described herein may be related to apparatuses, processes, and techniques related to incorporating photonics integrated circuitry into a base die, the base die including an optical interconnect at a bottom of the base die to transmit and to receive light signals from outside the base die. The top of the base die includes one or more electrical connectors that are electrically coupled with the photonics integrated circuitry. The base die may be referred to as the photonics die. A system-on-a-chip (SOC) may be electrically coupled with and stacked onto the top of the photonics die. Other embodiments may be described and / or claimed.