209 results about "Optical interconnect" patented technology

The invention relates to the technical field of semiconductor photoelectronics, and discloses a multi-physics field coupling silicon-based optical interconnection chip degradation model construction method and application, and the method comprises the steps: firstly constructing a multi-physics field coupling analysis model, and quantitatively representing the coupling relation of thermodynamics, optics, electricity and material aging through an inter-field coupling equation and a material aging dynamic model; simulating field distribution of a chip key area under multi-environment stress through finite element analysis, and extracting data; then historical degradation data is collected by combining an accelerated aging test and long-term operation monitoring, and a degradation parameter prediction model is established after data processing based on machine learning; and finally, inputting a finite element result and a prediction result into a material aging dynamic model, and finally forming a multi-physics field coupling degradation model. The problems that the prior art depends on a single physical field, degradation mechanism analysis is incomplete, and service life evaluation is inaccurate are solved, and support can be provided for reliability evaluation, structure optimization and service life prediction of the silicon-based optical interconnection chip.

The invention discloses an on-chip optical interconnection and switching chip and an application system thereof. Wherein the on-chip optical interconnection and exchange chip is integrated by a power divider, a bidirectional optical transceiver unit and an optical switch unit; the application system of the on-chip optical interconnection and switching chip comprises a multi-wavelength light source used for generating multi-wavelength optical carrier signals, a transceiving unit control and clock module used for bidirectional transceiving unit feedback / amplifier control and clock synchronization, and an optical switching control module used for switching an optical switching unit switching link. The chips and the modules are used for realizing optical interconnection and optical switching of the special electrical computing chip ASIC. According to the invention, bidirectional optical interconnection and exchange of special computing electric chips such as a CPU, a GPU, a DPU and the like can be realized by utilizing an on-chip optical interconnection and exchange technology, the interconnection rate is high, the exchange switching time is short, computing power cluster networking oriented to artificial intelligence application can be supported, and the application prospect is good.

The invention provides a high-density photoelectric common connection pinboard based on a low-loss silicon nitride grating coupler. The invention aims to overcome the difficulty that the existing photoelectric heterogeneous chip is difficult to integrate, stack and package, and realizes high-density interconnection between the chip and the interposer by using a grating coupling structure and a silicon through hole technology, thereby realizing high-integration low-loss packaging of the heterogeneous chip on the interposer. According to the invention, high-efficiency optical interconnection between the heterogeneous chip and the photoelectric co-connection intermediate layer is realized through the high-efficiency grating coupler, and high-density electrical interconnection between the chip and the photoelectric co-connection intermediate layer is realized through the TSV technology and the RDL technology. Meanwhile, the optical interconnection efficiency between the interposer and the chip is improved by utilizing the electrode patterning advantage of the RDL technology, and the self-alignment between the chip and the interposer is realized. The method has extremely high compatibility to the packaging scene of the existing photoelectric heterogeneous chip, so that the method has great significance in improving the integration density and reducing the interconnection loss of a photoelectric heterogeneous integrated system and promoting the practicability of the photoelectric heterogeneous integrated system.

According to the three-dimensional stacked photoelectric co-packaging structure and the packaging method thereof provided by the invention, the three-dimensional stacked structure is formed by bonding the optical chips with C2W of the adapter plate wafer, and the optical chips can be allowed to be processed separately and then bonded on the adapter plate wafer, so that the complexity of the packaging process is reduced, and the packaging reliability is improved; besides, a bonding pad of each layer of optical chip bonding pad region is in contact connection with a part of conductive via holes of the electric interconnection region, and an upper layer optical coupling region is arranged to shrink outwards relative to a lower layer optical coupling region to expose a first optical coupler in the lower layer optical coupling region, so that the areas of the optical chips are sequentially increased from bottom to top along the thickness stacking direction of the photoelectric switching structure; the electric interconnection structure is arranged on the outer side edge of the optical chip to form an inverted pyramid shape, the electric interconnection structure is distributed on the outer side edge of the optical chip, a conductive column structure can be effectively prevented from being manufactured on the optical chip, the process complexity is reduced, meanwhile, the optical interconnection structure is also distributed on the outer side edge of the optical chip, light in the optical chip can be directly coupled to a photoelectric transmission layer, and too high efficiency loss caused by too many optical coupling times is avoided.

The invention relates to the technical field of chip reliability testing, and discloses a silicon-based optical interconnection chip dynamic life test system and method.The system comprises a stress loading module, a state monitoring module and a self-adaptive control module, and the stress loading module receives actual working load change characteristics of a chip to be tested; generating and applying dynamic stress matched with an actual scene; the state monitoring module monitors the real-time state of the loaded chip, and collects and outputs multi-dimensional data of optical loss, heat distribution and material deformation; and the adaptive control module analyzes the data to judge the degradation degree of the chip, dynamically adjusts stress parameters, returns the stress parameters to the stress loading module to optimize loading, outputs a service life evaluation result, and outputs a test stopping signal and records failure service life data when the data exceeds a safety range. The method corresponds to the system. According to the application, real simulation, comprehensive monitoring and accurate evaluation of the life test are realized, the test authenticity and the life evaluation accuracy are improved, and support is provided for chip reliability verification.

The invention relates to a chip and a module for optical interconnection, and a device and a system using the optical interconnection module. The chip comprises photon integrated circuit sub-modules, each sub-module comprises a plurality of first optical switching units, and each first optical switching unit is configured to selectively output an optical signal input by a first optical input port of the first optical switching unit through any optical output port; an on-chip optical switch which is optically connected with the first optical switching unit and is configured to select an output port to output an optical signal input by any one optical input port of the on-chip optical switch; a plurality of modulators optically connected to the first optical switching unit; a plurality of detectors, at least a portion of which is optically connected to the on-chip optical switch; a plurality of first optical couplers configured to optically connect the first optical switching unit with a first external optical fiber array; and a second optical coupler in optical connection with at least a portion of the detector and configured to transmit the optical signal from the second external optical fiber array to the portion of the detector.

Provided is an interposer comprising: one or more photonic waveguide; one or more microwave circuit; one or more optical interconnect; and one or more electronic interconnect, further configured to support a quantum sensor, and methods of operating and fabricating thereof. Further provided is a the interposer containing one or more classical sensors. Further provided is a network of quantum sensors supported by said interposers.

The present invention relates to a computing system, comprising a plurality of computing devices. Each of the computing devices is configured with a plurality of computing modules and a plurality of optical interconnect expansion cards, and each of the optical interconnect expansion cards is provided with an on-chip optical switch and at least one first optical switching unit. The optical interconnect expansion cards of the plurality of computing devices communicate by means of optical fiber connections; moreover, by means of controlling the first optical switching units and / or the on-chip optical switches, a first part of the plurality of computing devices forms a first super node, with the topology of a communication link of the first super node comprising a two-dimensional torus topology. The two-dimensional torus topology may be configured to comprise first ring topologies, where the computing devices in the first part form a one-dimensional torus in a first direction; at least two first ring topologies are arranged in a second direction; and at least some of the computing devices in the at least two first ring topologies form second ring topologies with a one-dimensional torus in the second direction, where the second direction intersects the first direction.

The embodiment of the utility model relates to an optical emission module and an optical interconnection structure. The light emitting module comprises a first electric chip used for providing a driving signal; the laser is connected with the first electric chip and is used for emitting light under the action of the driving signal, and the light emitting direction of the laser deviates from the first electric chip; the light path adjusting unit is arranged on a light emitting path of the laser, and the light path adjusting unit is used for adjusting a light path of a light beam from the laser, so that a preset included angle is formed between emergent light and incident light of the light path adjusting unit.

The invention belongs to the technical field of optical fiber communication, and discloses an internal and external optical interconnection architecture of a chip. The chip internal and external optical interconnection framework comprises a printed circuit board, a glass substrate, a chip unit and an external optical interface. The glass substrate is arranged above the printed circuit board, the chip unit is arranged above the glass substrate, and the external optical interface is arranged on the side surface of the glass substrate; a rewiring layer and an optical waveguide are arranged in the glass substrate, and the rewiring layer is arranged below the chip unit; the chip unit comprises a main chip, a storage chip, an electronic integrated chip and a photonic integrated chip; the photonic integrated chip is optically coupled with an external optical interface through an optical waveguide. The invention further provides a manufacturing method of the chip internal and external optical interconnection architecture. The chip internal and external optical interconnection architecture is the chip internal and external optical interconnection architecture. According to the invention, the electrical interconnection distance of high-speed data transmission can be greatly shortened, the transmission rate and the signal quality are improved, and the device power consumption is reduced.

An electronic device may include a photonic integrated circuit (PIC) coupled with a substrate. The PIC may communicate a photonic signal with one or more optical fibers. The PIC may process the photonic signal into an electronic signal. The PIC may extend between a first end and a second end. An electronic integrated circuit (EIC) may be coupled with the substrate. The EIC may communicate with the PIC. The EIC may transmit the electronic signal to the PIC. The EIC may receive the electronic signal from the PIC. The electronic device may include a lens assembly. The lens assembly may be coupled with the first end of the PIC. In an example, optical interconnects of the PIC are aligned with the lens assembly such that the lens assembly is configured to transmit the photonic signal communicated between PIC and the optical fibers.

The invention discloses an on-chip fully-integrated optical circulator based on phase modulation. The on-chip fully-integrated optical circulator comprises a substrate, a buried oxide layer, an optical waveguide layer, an upper cladding and a metal layer used for manufacturing metal electrodes, the substrate, the buried oxide layer, the optical waveguide layer, the upper cladding and the metal layer are stacked, the optical waveguide layer comprises two input / output optical waveguide groups, a four-port resonant cavity and two metal electrode pairs, and the metal layer comprises four modulation areas; four ports of the resonant cavity are respectively connected with four interfaces of the modulation area, each input / output optical waveguide group is connected by a bent optical waveguide and coupled to the resonant cavity, the middle of the metal electrode pair is bent to form a coplanar waveguide electrode, and the middle of each two ends of the modulation area is connected by the coplanar waveguide electrode. The fully-integrated optical circulator is realized under the silicon-based substrate for the first time, is compatible with current mainstream optical integration platforms such as SOI, LNOI and LTOI, and can be widely applied to large-scale photonic integrated chips, such as the fields of optical communication, optical sensing, on-chip optical interconnection and the like.

This disclosure provides an optical interconnect module, an optical interconnect device, and a computing system. The optical interconnect module includes a photonic integrated circuit chip and a transceiver chip. The photonic integrated circuit chip includes a first optical switching section and a second optical switching section. The first optical switching section includes a plurality of first optical switching input ports, a plurality of first optical switching output ports, a plurality of second optical switching output ports, and a plurality of third optical switching output ports. An optical signal input from each first optical switching input port is selectively output from a corresponding one of the plurality of first optical switching output ports, a corresponding one of the plurality of second optical switching output ports, or a corresponding one of the plurality of third optical switching output ports. The second optical switching section includes a plurality of second optical switching input ports and a plurality of fourth optical switching output ports, each of the plurality of second optical switching input ports being connected to a corresponding one of the plurality of first optical switching output ports.

The present invention relates to a computing system, comprising a plurality of computing devices. Each computing device is configured with a plurality of computing modules and a plurality of optical interconnect expansion cards, and each optical interconnect expansion card is provided with an on-chip optical switch and at least one first optical switching unit. The optical interconnect expansion cards of the plurality of computing devices communicate by means of optical fiber connections. At least one computing device among the plurality of computing devices serves as a backup device, and the remaining computing devices are working devices that operate normally. When one or more working devices among the plurality of working devices fail, the connection topology of the plurality of computing devices is reconstructed by controlling the first optical switching units and / or the on-chip optical switches on the optical interconnect expansion cards of the plurality of computing devices, so that the backup devices as many as the failed working devices become the working devices that operate normally.

The embodiment of the invention provides a wafer-level chip packaging structure and electronic equipment, relates to the field of semiconductors, and aims to improve the transmission performance between chips. The wafer-level chip packaging structure comprises an adapter plate and a wafer-level chip. The adapter plate comprises a first rewiring layer and a second rewiring layer which are arranged in a stacked mode, the first rewiring layer comprises an optical interconnection channel, and the second rewiring layer comprises an electric interconnection channel. The wafer level chip is arranged on the adapter plate. The wafer level chip includes a plurality of device regions, each device region including at least one chip. Along a first direction parallel to the adapter plate, the chips in the two adjacent device regions are connected through an electric interconnection channel, and the chips in the two device regions at the two ends are connected through an optical interconnection channel. Along a second direction parallel to the adapter plate, the chips in the two adjacent device regions are connected through an electric interconnection channel, the chips in the two device regions at the two ends are connected through an optical interconnection channel, and the first direction and the second direction are crossed.

This invention belongs to the field of artificial intelligence hardware architecture design and discloses a method, system, device, and medium for cross-layer optimization of multi-core packaging and optical interconnect clusters for large language model training. The method includes: constructing a design space, including a core hardware architecture layer, an optical interconnect network layer, and a training parallel strategy layer; performing an outer-layer search to search for the architecture parameters of the multi-core modules within the core hardware architecture layer; for each outer-layer search sampling point, performing an inner-layer search to collaboratively optimize the optical interconnect network topology and training parallel strategy within the optical interconnect network layer and the training parallel strategy layer; and outputting the Pareto optimal design point on the training performance and cluster cost plane. The technical solution described in this invention can guide the design of related training clusters, thereby fully leveraging the advantages and potential of core technology and optical interconnect technology in large language model training.

The present invention is directed to heat dissipation of interconnected transceivers applied to a server system. The server rack includes a rack structure for supporting one or more rack servers and a switch box mechanically mounted on the rack structure. The switch box is configured to receive a removable optical interconnect and includes a transceiver module and a cooling structure coupled to the transceiver module. The transceiver module is configured to convert an input signal to an output signal and generate heat when converting the input signal. The cooling structure is configured to inject a coolant through the inlet and output the coolant through the outlet, thereby allowing the coolant to at least partially take away heat generated by the transceiver module. In some embodiments, the cooling structure includes a metal plate that contacts the transceiver module through a contact surface to absorb heat generated by the transceiver module.

A system includes an optical interconnect and a set of photonic integrated circuits (PICs) integrated within the optical interconnect. The optical interconnect includes a plurality of optical switches, a plurality of multiplexers, and a plurality of sets of optical splitters. Each multiplexer of the plurality of multiplexers is coupled to each optical switch of the set of optical switches, and each set of optical splitters of the plurality of sets of optical splitters is coupled to a respective multiplexer of the plurality of multiplexers.

An optical interconnect system comprising: at least one light source for emitting light, the light comprising a distribution pattern having a predefined divergence angle; at least one communication medium for transmitting the light, wherein the at least one communication medium comprises a numerical aperture, and wherein at least one of the numerical aperture, the at least one light source, the predefined divergence angle, and the at least one communication medium, is dimensioned to minimize loss of optical power coupling of the light into the at least one communication medium; at least one light detector for receiving the light from the at least one communication medium; at least one optomechanical alignment system configured to optimize collection of the light at the least one light detector.

Direct-bonded optoelectronic interconnects for high-density integrated photonics are provided. A combined electrical and optical interconnect enables direct-bonding of fully-processed optoelectronic dies or wafers to wafers with optoelectronic driver circuitry. The photonic devices may be III-V semiconductor devices. Direct-bonding to silicon or silicon-on-insulator (SOI) wafers enables the integration of photonics with high-density CMOS and other microelectronics packages. Each bonding surface has an optical window to be coupled by direct-bonding. Coplanar electrical contacts lie to the outside, or may circumscribe the respective optical windows and are also direct-bonded across the interface using metal-to-metal direct-bonding, without interfering with the optical windows. Direct hybrid bonding can accomplish both optical and electrical bonding in one overall operation, to mass-produce mLED video displays. The adhesive-free dielectric-to-dielectric direct bonding and solder-free metal-to-metal direct bonding creates high-density electrical interconnects on the same bonding interface as the bonded optical interconnect. Known-good-dies may be used, which is not possible conventionally, and photolithography over their top surfaces can scale to high density.

A stack of the optical ferrules, each of the optical ferrules including a top surface having attachment areas for optical waveguides, a light redirecting member, and a bottom surface having an exit window. When optical waveguides are attached to the attachment areas, central light rays emitted by the optical waveguides are redirected by the light redirecting member and exit the optical ferrule through the exit window. For each pair of adjacent stacked upper and lower optical ferrules, the exiting central light ray of the upper optical ferrule enters the lower optical ferrule through the top surface of the lower optical ferrule and exits the lower optical ferrule through the exit window of the lower optical ferrule. Each of the exiting central light rays of each of the optical ferrules exits the exit window of a lowermost optical ferrule at a different location.

The application relates to the technical field of laser packages, in particular to an in-situ optical shaping VCSEL array integration method and an optical interconnection module, which comprises the following steps: S1, a quartz substrate is used, a femtosecond laser pulse is focused and scanned in the quartz substrate, and a three-dimensional profile of a micro hole is defined in advance; S2, a VCSEL chip is precisely placed into the micro hole in an array arrangement with the VCSEL chip facing upwards, and epoxy resin is cured by heating; S3, a metal layer is sputtered on the quartz substrate, and an electrical interconnection track is formed through photolithography; S4, a two-photon polymerization direct writing system is used to initiate two-photon polymerization of photoresist, solidification is realized, and the production of a polymer lens is completed. The application selects fused quartz glass as the only passive integrated substrate; the substrate has four characteristics of optical transparency, electrical insulation, thermal stability and three-dimensional micro machining at the same time, replaces the multilayer composite substrate in a traditional scheme at one time, and realizes the original integration design basis of an optical path, an electrical circuit and a thermal path.

This invention discloses a three-dimensional waveguide glass chip based on CPO (Continuous Photonic Optical Array) with an integrated weak-reflection grating sensor array, relating to the field of integrated photonic sensors. The three-dimensional waveguide glass chip of this invention has a multi-core single-mode fiber array connection unit on the left end and a single-mode multi-core fiber optic connection unit on the right end, connected in the middle by a femtosecond laser direct-write multi-channel three-dimensional waveguide. The end directly connected to the optical chip also integrates a weak-reflection fiber grating for temperature measurement. Simultaneously, multiple three-dimensional waveguide glass chips connect to the optical chip, forming a grating temperature sensing array. The signal processing end uses host computer software to perform real-time online monitoring of optical loss and the periphery of the optoelectronic chip interface. This three-dimensional waveguide high-density optical connector with an integrated weak-reflection grating sensor array for CPO applications features low loss, low power consumption, high capacity, and multifunctionality, and can monitor chip temperature and interface quality using non-primary communication bands.

The application discloses a design method of an integrated multi-mode curved optical waveguide and the integrated multi-mode curved optical waveguide and belongs to the technical field of integrated optics. Aiming at the problem that a traditional multi-mode curved waveguide is difficult to consider low loss and low crosstalk at a compact size, a waveguide model formed by cascading multiple variable-width generalized Euler spiral curve elements is constructed. Through an iterative optimization algorithm based on mode field analysis, the curvature radius and the waveguide width of each curve element are controlled in double degrees of freedom to obtain optimal geometric parameters with the minimum full-mode loss as the target. The waveguide structure breaks through the limitation of the traditional fixed-width design, realizes low-loss and low-crosstalk transmission of multi-mode signals at a very small bending radius, significantly improves the tolerance of the device to manufacturing process deviation, and is suitable for a high-density on-chip optical interconnection system.

The invention discloses a method for installing an optical interconnector by using a sleeve, which comprises the following steps of: firstly, respectively designing a collimator shell for two aligned collimators based on the model of the used collimators, enabling the inner diameter of the shell to be larger than the diameter of the collimator, and then, pouring glue into a gap between the shell of one collimator and the collimator, the relative positions of the collimators and the shells are fixed, a sleeve is adopted and used for alignment adjustment between the two collimators, the inner surface of the sleeve can be accurately matched with the shells of the collimators, the two collimators with the shells are placed in the sleeve, the relative position of one collimator and the corresponding shell is determined, and the other collimator and the corresponding shell can be accurately matched. When the coupling efficiency between the two collimators is highest, the position of the shell and the position of the sleeve are relatively determined, the position of the shell of the other collimator and the position of the sleeve are relatively determined, the other collimator is adjusted through the multi-degree-of-freedom displacement table at the moment, and when the coupling efficiency between the two collimators is highest, glue is poured between the other collimator and the shell, so that the corresponding position between the other collimator and the shell is determined.

A parallel interconnect system for transmitting data comprising: a plurality of light sources for emitting light for use as a carrier for the data; a first optical transceiver array having at least one optical transmitter; at least one fiber array configured to transmit light emitted by the at least one optical transmitter; an first optical coupler configured to couple the plurality of light sources to one end of the at least one fiber array; a second optical transceiver array having at least one optical receiver; a second optical coupler configured to receive and direct the transmitted light from another end of at least one fiber array to the second optical transceiver array.

Backend optical interconnects may be formed in backend of line (BEOL) layers together with conductive interconnects, and may enable high data-rate communication in a dense and cost-effective manner. In one example, backend optical interconnects can be formed using existing structures in the process (e.g., vias and lines). For example, an IC structure may include an interconnect layer over a device region, where the interconnect layer includes both conductive interconnects and optical interconnects (e.g., wave guides). The optical interconnect includes a core material (e.g., a dielectric material) and may be parallel to metal lines or may be a via that is orthogonal to metal lines in the interconnect layer.

The invention discloses an optical interconnection link self-calibration method and device based on dynamic tensor reconstruction, equipment and a medium, and relates to the field of computers.The method comprises the steps that based on the tensor operation requirement of a multi-modal task, the hierarchical connection relation, the operation precision mode and the data interaction path of a calculation unit are adjusted; the dynamic tensor reconstruction of the calculation unit is realized; wherein the calculation unit adopts a hierarchical architecture design; an optical interconnection hardware system matched with the reconstructed computing unit is configured; the system comprises an optical interconnection link and a calibration unit. And dynamic self-calibration is carried out on optical signal parameters of the optical interconnection link by utilizing a calibration unit based on transmission characteristic data of the optical interconnection link acquired in real time in a tensor operation process. Therefore, the computing power utilization rate is effectively improved, synchronous error accumulation of large-scale tensor operation is avoided, meanwhile, a data conversion circuit does not need to be additionally arranged, conversion delay is eliminated, and waste of hardware resources is reduced.

Disclosed are a method and apparatus for establishing a Peripheral Component Interconnect Express (PCIe) optical interconnection link, a device, a non-volatile readable storage medium, and a system. The method includes: acquiring an upstream data signal transmitted through an electrical path, and detecting whether at least one Electrical Idle Ordered Set (EIOS) exists in the upstream data signal; recording a current link rate of the PCIe optical interconnection link, and determining whether the transmission of the at least one EIOS is completed by counting the at least one EIOS; and generating a target signal sequence of a corresponding rate according to the current link rate in a case where the transmission of the at least one EIOS is completed, and transmitting the target signal sequence to an opposite end through the PCIe optical interconnection link.

The application discloses an on-chip optical interconnection and exchange chip and an application system thereof. The on-chip optical interconnection and exchange chip is integrated by a power divider, a bidirectional optical transceiver unit and an optical switch unit. The application system of the on-chip optical interconnection and exchange chip comprises a multi-wavelength light source for generating a multi-wavelength optical carrier signal, a transceiver unit control and clock module for bidirectional transceiver unit feedback / amplifier control and clock synchronization, and an optical exchange control module for optical switch unit exchange link switching. The above chips and modules are used for realizing optical interconnection and optical exchange of an application-specific electrical computing chip ASIC. The on-chip optical interconnection and exchange technology can realize bidirectional optical interconnection and exchange of a CPU, a GPU, a DPU and other special computing electrical chips, has high interconnection rate, short exchange switching time, can support an algorithm cluster networking oriented to artificial intelligence application, and has a good application prospect.