An adjustable reference voltage source circuit for ATE testing

Abstract

The utility model discloses a kind of adjustable reference voltage source circuit for ATE test, including microcontroller, dual-mode voltage control circuit, closed-loop self-calibration circuit, power management circuit and real-time monitoring circuit.Power management circuit provides independent isolated power supply for each module;Microcontroller coordinates and controls each circuit, supports through GPI O combination fast output preset voltage or through serial output adjustable voltage;Closed-loop self-calibration circuit carries out buffering, collection and feedback to output voltage, and by microcontroller realizes dynamic compensation, forms high-precision closed-loop control;Real-time monitoring circuit shows setting and actual voltage value in real time.The circuit is designed through PCB partition, magnetic bead isolation, copper shielding and power supply pin filtering, effectively suppresses interference, with the advantages of high output voltage precision, strong anti-interference ability, support dual-mode flexible switching, suitable for ATE test and other high-precision measurement scene.

Description

Technical Field

[0001] This utility model relates to an adjustable reference voltage source circuit for ATE testing, belonging to the field of integrated circuit testing technology. Background Technology

[0002] ATE (Automatic Test Equipment) is a core piece of equipment in the electronics manufacturing industry, and its testing accuracy and efficiency directly affect product quality and production costs. As a key module of ATE, the reference voltage source provides a highly accurate and stable voltage reference for various precision measurements, and its performance indicators must meet the stringent requirements of high-end applications such as automotive electronics and industrial control.

[0003] However, existing reference voltage source circuits have many inherent defects, making it difficult to meet the dual requirements of high efficiency and high precision in modern ATE testing. These defects are manifested in the following aspects:

[0004] 1. Open-loop architecture design cannot guarantee output accuracy.

[0005] Most traditional circuits employ an open-loop design, lacking a real-time acquisition and feedback mechanism for the final output voltage. Core components such as digital-to-analog converters (DACs) and resistor networks experience parameter drift due to temperature changes, aging, and power supply fluctuations, causing the output voltage to deviate from the set value. When this deviation exceeds the accuracy tolerance, it can lead to false positives in testing, misclassifying qualified products as unqualified (increasing the false negative rate) and resulting in economic losses.

[0006] II. Insufficient anti-interference capability due to power supply design and layout

[0007] Existing designs often employ simple power supply schemes, with digital and analog circuits sharing the same power link. This causes high-frequency switching noise generated by digital devices such as MCUs (microcontrollers) to crosstalk to analog devices such as DACs and operational amplifiers through the power path, introducing ripple noise. In addition, the mixed digital and analog areas on the printed circuit board (PCB) layout, lacking effective isolation and shielding measures, further exacerbates the degradation of signal integrity, resulting in poor test repeatability and low consistency.

[0008] 3. Lack of system-level protection and real-time monitoring capabilities

[0009] Existing circuits often lack effective electrostatic discharge (ESD) protection measures. In complex industrial testing environments, interfaces are susceptible to damage from electrostatic shocks, leading to reduced equipment reliability and increased maintenance costs. Furthermore, operators cannot directly obtain the real-time operating status of the voltage source and must rely on external measuring equipment for monitoring, which is cumbersome and adds extra costs.

[0010] Chinese utility model patent CN204514995U discloses a high-precision voltage measurement circuit for chip ATE testing. It amplifies the difference between the voltage under test and the reference voltage through a reference voltage generation module and an error amplification processing module, aiming to improve measurement accuracy. However, this technical solution still fails to solve the aforementioned systemic problems such as control efficiency, closed-loop calibration, power supply isolation, and anti-interference. Summary of the Invention

[0011] The technical problem to be solved by this utility model is to provide an adjustable reference voltage source circuit for ATE testing.

[0012] To achieve the above technical objectives, the present invention adopts the following technical solution:

[0013] According to an embodiment of the present invention, an adjustable reference voltage source circuit for ATE testing is provided, including a microcontroller, a dual-mode voltage control circuit, a closed-loop self-calibration circuit, a power management circuit, and a real-time monitoring circuit.

[0014] The power management circuit is used to provide independent and isolated power supply for each circuit module, including outputting 3.3V voltage to the microcontroller, outputting 5V analog voltage, reference voltage and 3.3V digital voltage to the dual-mode voltage control circuit, outputting 5V analog voltage and 3.3V digital voltage to the closed-loop self-calibration circuit, and outputting 3.3V voltage to the real-time monitoring circuit.

[0015] The microcontroller coordinates and controls the entire circuit, sending GPIO level signals and serial control signals to the dual-mode voltage control circuit to configure the output voltage, and sending I / O signals to the real-time monitoring circuit. 2 C-interface control signals and set / actual voltage signals;

[0016] The dual-mode voltage control circuit is used to receive instructions from the microcontroller and can switch between operating in a first mode that outputs a preset fixed voltage by combining levels or in a second mode that receives instructions through a serial interface and outputs an adjustable voltage.

[0017] The closed-loop self-calibration circuit is used to receive the voltage signal output by the dual-mode voltage control circuit, buffer the voltage signal and provide a reference voltage for ATE testing, and at the same time collect the actual value of the voltage signal and feed it back to the microcontroller.

[0018] The microcontroller is also used to send a compensation signal to the dual-mode voltage control circuit based on the deviation between the actual value fed back by the closed-loop self-calibration circuit and the set value, so as to form closed-loop control; wherein,

[0019] The PCBs of each circuit adopt a physically separated layout, divided into digital and analog areas; the analog and digital areas are isolated by ferrite beads, and the analog area is shielded by copper plating; filter capacitors are placed close to the power supply pins of the chips in the microcontroller, the dual-mode voltage control circuit, the closed-loop self-calibration circuit, and the power management circuit.

[0020] Preferably, the dual-mode voltage control circuit includes a DAC chip and a level latch;

[0021] In this configuration, at least three sets of GPIO pins of the microcontroller are directly connected to the input of the level latch, and the output of the level latch is connected to the input of the microcontroller. The microcontroller then sends the control code corresponding to the combined level to the DAC chip through the serial interface of the DAC chip to implement the first mode.

[0022] The serial clock terminal, serial data output terminal, synchronization control terminal, and reset control terminal of the microcontroller are respectively connected to the SCLK terminal, DIN terminal, SYNC# terminal, and RST# terminal of the DAC chip to implement the second mode.

[0023] Preferably, the DAC chip is model DAC8565 IAPW.

[0024] Preferably, the closed-loop self-calibration circuit includes a buffer and an ADC chip;

[0025] The output terminal of the dual-mode voltage control circuit is connected to the non-inverting input terminal of the buffer.

[0026] The output of the buffer is divided into two paths: one path serves as the final output of the reference voltage source; the other path is connected to the analog input of the ADC chip.

[0027] The serial interface of the ADC chip is connected to the microcontroller to receive control commands and return the acquired voltage signals.

[0028] Preferably, the ADC chip is a 24-bit Δ-Σ analog-to-digital converter, model ADS1220IPWR.

[0029] Preferably, the power management circuit includes: a boost DC / DC module, an LDO chip, a reference voltage chip, and an ESD protection device;

[0030] The external input voltage is converted by the boost DC / DC module and then outputs an intermediate bus voltage to the LDO chip and the reference voltage chip.

[0031] The LDO chip converts the intermediate bus voltage into the 3.3V voltage and the 5V analog voltage;

[0032] The reference voltage chip is driven by the intermediate bus voltage and outputs a high-precision reference voltage to the dual-mode voltage control circuit.

[0033] The cathode of the ESD protection device is connected to the external power input terminal, and the anode is grounded.

[0034] Preferably, the boost DC / DC module is model TPS61252DSGR.

[0035] Preferably, the reference voltage chip is model REF5050AIDR.

[0036] Preferably, the ESD protection device is a TVS diode, model BZT5205V6.

[0037] Preferably, the real-time monitoring circuit includes an OLED display module, the OLED display module being connected via I... 2 The C interface communicates with the microcontroller and is used to display the set voltage signal and the actual voltage signal acquired by the closed-loop self-calibration circuit in real time.

[0038] Compared with existing technologies, this invention overcomes the shortcomings of traditional solutions, such as single control mode, heavy reliance on serial port protocols, and slow voltage switching, by introducing a dual-mode voltage control circuit, significantly improving efficiency in mass production testing. By constructing a closed-loop self-calibration circuit, real-time acquisition and dynamic compensation of the output voltage are achieved, effectively suppressing voltage deviations caused by temperature drift and component aging, thus ensuring high output accuracy. The design of a multi-level isolated power management circuit completely isolates noise crosstalk between digital and analog power supplies, significantly reducing output ripple. Furthermore, by adopting PCB partitioning isolation design and integrated ESD protection, the system's anti-interference capability is comprehensively enhanced, and local real-time display of voltage information is achieved, avoiding reliance on external monitoring equipment. Attached Figure Description

[0039] Figure 1 This is a schematic diagram of the overall structure of an adjustable reference voltage source circuit for ATE testing, as described in an embodiment of the present invention.

[0040] Figure 2 This is a schematic diagram of the dual-mode voltage control circuit and the closed-loop self-calibration circuit in an embodiment of the present invention.

[0041] Figure 3 This is a power supply diagram of the power management circuit in an embodiment of the present invention;

[0042] Figure 4 This is a schematic diagram of the boost DC / DC circuit in an embodiment of the present invention;

[0043] Figure 5 This is a schematic diagram of the DAC reference source circuit and LDO circuit in an embodiment of this utility model. Detailed Implementation

[0044] The technical content of this utility model will be described in detail below with reference to the accompanying drawings and specific embodiments.

[0045] like Figure 1 As shown in the figure, an adjustable reference voltage source circuit for ATE testing provided by this utility model includes a microcontroller (MCU), a dual-mode voltage control circuit, a closed-loop self-calibration circuit, a power management circuit, and a real-time monitoring circuit.

[0046] The power management circuit provides 3.3V to the MCU, 5V analog voltage, reference voltage, and 3.3V digital voltage to the dual-mode voltage control circuit, outputs 5V analog voltage and 3.3V digital voltage to the closed-loop self-calibration circuit, and provides 3.3V to the real-time monitoring circuit. The MCU sends GPIO level signals and serial control signals to the dual-mode voltage control circuit and sends I / O signals to the real-time monitoring circuit. 2 The C interface provides control signals and set / actual voltage data; the dual-mode voltage control circuit outputs a reference voltage signal to the closed-loop self-calibration circuit; the closed-loop self-calibration circuit feeds back the actual acquired voltage data to the MCU.

[0047] It should be noted that the PCBs of the above circuits adopt a physically separated layout, divided into digital and analog areas; the analog and digital areas are isolated by ferrite beads, and the analog area is shielded by copper plating; filter capacitors are placed close to the power supply pins of the chips in the microcontroller, the dual-mode voltage control circuit, the closed-loop self-calibration circuit, and the power management circuit.

[0048] In one embodiment of this utility model, the dual-mode voltage control circuit provides two switchable reference voltage output modes for ATE testing: it meets the requirement of mass production testing to quickly switch fixed voltages by combining levels without software interaction, and also supports flexible configuration of arbitrary voltage values ​​through a serial interface during testing. At the same time, it provides a stable initial voltage signal for the closed-loop self-calibration circuit, which significantly improves the practicality and environmental adaptability of the reference voltage source.

[0049] like Figure 2As shown, the dual-mode voltage control circuit mainly includes a DAC chip (model: DAC8565 IAPW) and a level latch. At least three GPIO pins of the MCU are directly connected to the input of the level latch, and the output of the level latch is connected to the input of the MCU. The MCU then sends the control code corresponding to the combined level to the DAC chip through the DAC chip's serial interface to configure the DAC chip to output a fixed voltage. The MCU's serial clock terminal (MCU_DAC_SCLK), serial data output terminal (MCU_DAC_MOSI), synchronization control terminal (MCU_DAC_SYNC), and reset control terminal (MCU_DAC_RST) are respectively connected to the SCLK, DIN, SYNC#, and RST# terminals of the DAC chip. This is used to transmit adjustable voltage configuration commands, DAC enable signals, and reset control signals. This link is also used by the MCU to send voltage compensation commands to achieve output calibration. The ENABLE# terminal of the DAC chip is grounded; its analog power supply terminal (5V-A) has a 10nF and a 100nF capacitor connected in parallel to ground to filter out high and low frequency noise; the digital power supply terminal (3V3) is also connected to a filter capacitor to enhance stability.

[0050] In one embodiment of this utility model, the closed-loop self-calibration circuit is used to overcome the voltage drift problem caused by temperature changes and load fluctuations. Through a hardware-implemented real-time feedback and compensation path, the output voltage is dynamically calibrated without relying on complex software algorithms, ensuring the high precision and high stability of the reference voltage source, meeting the core requirements of ATE testing for voltage accuracy, and making up for the shortcomings of traditional open-loop architectures that cannot correct deviations in real time.

[0051] The closed-loop self-calibration circuit mainly consists of a buffer (model: OPA350UA / 2K5) and an ADC chip (model: ADS1220IPWR, 24-bit Δ-Σ analog-to-digital converter). The output terminal (DAC_OUT) of the ADC chip is connected to the non-inverting input terminal of the buffer to achieve signal isolation and impedance matching. The buffer output is divided into two paths: one path serves as the final output of the reference voltage source for ATE testing; the other path is connected to the AIN1 terminal of the ADC chip for voltage acquisition.

[0052] The serial clock (SCLK), data input (MOSI), and data output (MISO) pins of the ADC chip are connected to the corresponding pins of the MCU (MCU_ADC_SCLK, MCU_ADC_MOSI, and MCU_ADC_MISO) to transmit control commands and return the acquired voltage data, forming the actual voltage feedback path. The analog power supply (5V-R) and digital power supply (DVDD) pins of the ADC chip are connected in parallel with 10nF and 100nF capacitors to ground, respectively. The DVDD pin is connected to a 3.3V digital power supply to ensure stable power supply and acquisition accuracy.

[0053] like Figure 3 As shown, in one embodiment of this utility model, the power management circuit is used to improve the system stability problems that may be caused by traditional single-stage power supply. It provides independent and clean power to the digital area, analog area and reference circuit through multi-stage isolated power supply to avoid mutual interference; at the same time, it provides low-noise and high-precision power supply conditions for DAC, ADC and reference voltage chips; it also integrates ESD protection mechanism to improve reliability in complex ATE test environment.

[0054] The power management circuit mainly includes a boost DC / DC module (model: TPS61252DSGR), an LDO chip (model: TPS73701DRBR), and a reference voltage chip (model: REF5050AIDR) (reference). Figure 4 , Figure 5 The device includes a TVS diode, model BZT5205V6, and ESD protection devices.

[0055] In one embodiment of this invention, an externally input 5V voltage is converted to a 5.5V intermediate voltage by a boost DC / DC module, which is then supplied to the LDO chip and the reference voltage chip. The LDO chip steps down the 5.5V voltage and outputs two paths: one is a 3.3V voltage, distributed to the digital area of ​​the PCB; the other is a 5V analog voltage, distributed to the analog area. The input terminal of the reference voltage chip is connected to a 5.5V voltage, and a 47μF / 10V capacitor and a 100nF capacitor are connected in parallel to filter out noise; a 1μF capacitor is connected in series at its TRIMNR terminal to further optimize stability; the reference output terminal (VOUT) is connected to the reference voltage pin of the DAC chip. The cathode of the ESD protection device is connected to the input terminal of the external 5V input and the boost DC / DC module, and the anode is grounded to suppress electrostatic discharge shock.

[0056] In one embodiment of this utility model, the real-time monitoring circuit includes an OLED display module (not shown in the figure), which is connected via I... 2 The C interface communicates with the MCU to display the set voltage value and the actual output voltage value acquired by the ADC in real time.

[0057] The working principle of the adjustable reference voltage source circuit provided by this utility model is explained as follows:

[0058] First, the power management circuit provides a stable power supply for the entire system. It converts the 5V voltage input from the ATE test equipment into a 5.5V intermediate bus voltage via a boost DC / DC module. This voltage is then sent to the LDO chip, which converts it to output 3.3V and 5V analog voltages to power the corresponding circuit areas. The other path powers the reference voltage chip, which generates a high-precision reference voltage and provides it to the DAC chip. The power management circuit also integrates ESD protection devices at the power input / output terminals to provide electrostatic protection.

[0059] Secondly, the dual-mode voltage control circuit can switch operating modes according to the MCU's instructions: In one mode, the combined level is sent to the input of the level latch through the MCU's three GPIO pins. The level latch feeds back the combined level to the MCU through its output. The MCU verifies the combined level and sends the control code corresponding to the verified combined level to the DAC chip through the DAC chip's serial interface. This code is used to control the DAC chip to output eight preset fixed reference voltages (the dual-mode voltage control circuit defaults to this mode). In the other mode, the DAC chip receives instructions from the MCU through the serial interface and controls the DAC chip to output any adjustable reference voltage less than 5V.

[0060] Subsequently, the initial voltage output by the DAC chip is divided into two paths after impedance transformation and signal conditioning by the buffer: one path is output as a reference voltage to the ATE test equipment, and the other path is sent to the ADC chip for acquisition; the ADC chip converts the acquired analog voltage signal into a digital signal and transmits it to the MCU through serial interfaces such as SPI.

[0061] The MCU compares the received actual voltage value with the set value, calculates the deviation, and sends a compensation command to the DAC chip through the serial control interface to dynamically adjust its output, thus forming a closed-loop self-calibration circuit of DAC-buffer-ADC-MCU-DAC, ultimately achieving a high-precision voltage reference with an output accuracy of no more than 0.1mV.

[0062] Meanwhile, the OLED display module in the real-time monitoring circuit uses I 2 The C interface communicates with the MCU to display the system-set voltage value and the actual output voltage value collected and fed back by the ADC in real time.

[0063] In addition, by physically separating the PCB into digital and analog areas, implementing copper shielding in the analog area and using ferrite beads to achieve inter-area isolation, and placing filter capacitors close to all chip power pins, the signal crosstalk and power supply noise are effectively suppressed, ensuring the stability and reliability of the entire circuit in complex testing environments.

[0064] It should be noted that the above embodiments are merely illustrative examples. The technical solutions of the various embodiments can be combined, and all are within the protection scope of this utility model.

[0065] The adjustable reference voltage source circuit for ATE testing provided by this utility model has been described in detail above. Any obvious modifications made to this utility model by those skilled in the art without departing from its essential content will constitute an infringement of the patent rights of this utility model and will incur corresponding legal liability.

Claims

1. An adjustable reference voltage source circuit for ATE testing, characterized in that... It includes a microcontroller, a dual-mode voltage control circuit, a closed-loop self-calibration circuit, a power management circuit, and a real-time monitoring circuit; The power management circuit is used to provide independent and isolated power supply for each circuit module, including outputting 3.3V voltage to the microcontroller, outputting 5V analog voltage, reference voltage and 3.3V digital voltage to the dual-mode voltage control circuit, outputting 5V analog voltage and 3.3V digital voltage to the closed-loop self-calibration circuit, and outputting 3.3V voltage to the real-time monitoring circuit. The microcontroller coordinates and controls the entire circuit, sending GPIO level signals and serial control signals to the dual-mode voltage control circuit to configure the output voltage, and sending I / O signals to the real-time monitoring circuit. 2 C-interface control signals and set / actual voltage signals; The dual-mode voltage control circuit is used to receive instructions from the microcontroller and can switch between operating in a first mode that outputs a preset fixed voltage by combining levels or in a second mode that receives instructions through a serial interface and outputs an adjustable voltage. The closed-loop self-calibration circuit is used to receive the voltage signal output by the dual-mode voltage control circuit, buffer the voltage signal and provide a reference voltage for ATE testing, and at the same time collect the actual value of the voltage signal and feed it back to the microcontroller. The microcontroller is also used to send a compensation signal to the dual-mode voltage control circuit based on the deviation between the actual value fed back by the closed-loop self-calibration circuit and the set value, so as to form closed-loop control; wherein, The PCBs of each circuit adopt a physically separated layout, divided into digital and analog areas; the analog and digital areas are isolated by ferrite beads, and the analog area is shielded by copper plating; filter capacitors are placed close to the power supply pins of the chips in the microcontroller, the dual-mode voltage control circuit, the closed-loop self-calibration circuit, and the power management circuit.

2. The adjustable reference voltage source circuit as described in claim 1, characterized in that... The dual-mode voltage control circuit includes a DAC chip and a level latch; In this configuration, at least three sets of GPIO pins of the microcontroller are directly connected to the input of the level latch, and the output of the level latch is connected to the input of the microcontroller. The microcontroller then sends the control code corresponding to the combined level to the DAC chip through the serial interface of the DAC chip to implement the first mode. The serial clock terminal, serial data output terminal, synchronization control terminal, and reset control terminal of the microcontroller are respectively connected to the SCLK terminal, DIN terminal, SYNC# terminal, and RST# terminal of the DAC chip to implement the second mode.

3. The adjustable reference voltage source circuit as described in claim 2, characterized in that: The DAC chip is model DAC8565 IAPW.

4. The adjustable reference voltage source circuit as described in claim 1, characterized in that: The closed-loop self-calibration circuit includes a buffer and an ADC chip; The output terminal of the dual-mode voltage control circuit is connected to the non-inverting input terminal of the buffer. The output of the buffer is divided into two paths: one path serves as the final output of the reference voltage source; the other path is connected to the analog input of the ADC chip. The serial interface of the ADC chip is connected to the microcontroller to receive control commands and return the acquired voltage signals.

5. The adjustable reference voltage source circuit as described in claim 4, characterized in that: The ADC chip is a 24-bit Δ-Σ analog-to-digital converter, model ADS1220IPWR.

6. The adjustable reference voltage source circuit as described in claim 1, characterized in that: The power management circuit includes: a boost DC / DC module, an LDO chip, a reference voltage chip, and ESD protection devices; The external input voltage is converted by the boost DC / DC module and then outputs an intermediate bus voltage to the LDO chip and the reference voltage chip. The LDO chip converts the intermediate bus voltage into the 3.3V voltage and the 5V analog voltage; The reference voltage chip is driven by the intermediate bus voltage and outputs a high-precision reference voltage to the dual-mode voltage control circuit. The cathode of the ESD protection device is connected to the external power input terminal, and the anode is grounded.

7. The adjustable reference voltage source circuit as described in claim 6, characterized in that: The boost DC / DC module is model TPS61252DSGR.

8. The adjustable reference voltage source circuit as described in claim 6, characterized in that: The reference voltage chip is model REF5050AIDR.

9. The adjustable reference voltage source circuit as described in claim 6, characterized in that: The ESD protection device is a TVS diode, model BZT5205V6.

10. The adjustable reference voltage source circuit as described in claim 1, characterized in that: The real-time monitoring circuit includes an OLED display module, which is connected via I... 2 The C interface communicates with the microcontroller and is used to display the set voltage signal and the actual voltage signal acquired by the closed-loop self-calibration circuit in real time.

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