A micro light emitting diode chip carrier for vehicle lamp

CN224611190UActive Publication Date: 2026-08-07JHETECH
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
JHETECH
Filing Date
2025-07-31
Publication Date
2026-08-07

AI Technical Summary

Technical Problem

相关技术中的载板,一般没有进行合理的区域划分和对称设计,接口的设置也较为随意,缺乏系统性,难以适应对高要求的电能和信号传输

Benefits of technology

1.对称设置的第一信号区、第二信号区、第一电源区及第二电源区提高了芯片与光源板之间的信号和电能的传输效率,同时统一规范的设计便于生产和制造;

✦ Generated by Eureka AI based on patent content.

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Abstract

The application relates to the technical field of electronic component connection, in particular to a micro light-emitting diode chip carrier for vehicle lamps, which comprises a carrier plate, a first surface and a second surface of the carrier plate are each provided with a first signal area and a second signal area which are symmetrically arranged relative to a first central axis of the carrier plate, and a first power area and a second power area which are symmetrically arranged relative to a second central axis of the carrier plate. A plurality of interfaces are arranged in the first signal area, the second signal area, the first power area and the second power area, the plurality of interfaces on the first surface are used for connecting chips, the plurality of interfaces on the second surface are used for connecting light source plates, and the plurality of interfaces on the first surface are correspondingly connected with the plurality of interfaces on the second surface to transmit signals and electric energy between the chips and the light source plates. The first signal area, the second signal area, the first power area and the second power area which are symmetrically arranged can improve the transmission efficiency of signals and electric energy between the chips and the light source plates, and the unified and standardized design facilitates production and manufacturing.
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Description

Technical Field

[0001] This application relates to the field of electronic component interconnection technology, and in particular to a micro light-emitting diode chip carrier board for automotive lights. Background Technology

[0002] In the automotive lighting field, light-emitting diodes (LEDs) are generally used as the light source, and some cutting-edge technologies have begun to use miniature LED array chips as the light source. The transmission of power and signals between the miniature LED array chip and the light source board is typically through a carrier board. Therefore, the layout of the interfaces on the carrier board has a significant impact on the signal and power transmission between the light source board and the chip. This is especially true for miniature LED arrays, where the brightness of each miniature LED needs to be individually controlled, resulting in very high requirements for signal and power transmission. The carrier boards used in related technologies generally lack reasonable area division and symmetrical design, and the interface settings are often arbitrary and lack a systematic approach, making them unsuitable for handling the demanding power and signal transmission requirements.

[0003] Regarding the aforementioned technologies, there are shortcomings such as the lack of reasonable area division and symmetrical design in the layout of interfaces on the carrier board, resulting in a lack of systematic design. Utility Model Content

[0004] In order to rationally divide the layout of the interfaces on the carrier board and improve the transmission efficiency of power and signals, this application provides a miniature light-emitting diode chip carrier board for automotive lights.

[0005] The miniature light-emitting diode chip carrier board for automotive lights provided in this application adopts the following technical solution: A carrier board has a first surface, a second surface, a first central axis, and a second central axis perpendicular to the first central axis. Functional areas are provided on both the first and second surfaces. Each functional area includes a first signal area, a second signal area, a first power area, and a second power area. The first and second signal areas are symmetrically arranged with respect to the first central axis, and the first and second power areas are symmetrically arranged with respect to the second central axis. Multiple interfaces are provided within each of the first, second, first, and second power areas. Multiple interfaces on the first surface are used to connect to a chip, and multiple interfaces on the second surface are used to connect to a light source board. The multiple interfaces on the second surface are connected to the multiple interfaces on the first surface to transmit signals and electrical energy between the chip and the light source board.

[0006] By adopting the above technical solution, the symmetrical arrangement of the first signal area, the second signal area, the first power supply area, and the second power supply area improves the signal and power transmission efficiency between the chip and the light source board, while the unified and standardized design facilitates production and manufacturing.

[0007] Optionally, the first signal area and the second signal area are provided with a power signal interface and a ground signal interface. The power signal interface is used to connect the power pin of the chip and the power interface of the light source board, and the ground signal interface is used to connect the ground pin of the chip and the ground interface of the light source board.

[0008] By adopting the above technical solution, the power signal interface and grounding interface in the first signal area and the second signal area ensure that the power connection and grounding connection between the chip and the light source board are more stable and reliable, thereby improving the stability of signal transmission.

[0009] Optionally, the first signal area and the second signal area are provided with a data communication signal interface and a test signal interface. The data communication signal interface is used to connect the data communication pins of the chip and the data communication interface of the light source board, and the test signal interface is used to connect the test pins of the chip and the test interface of the light source board.

[0010] By adopting the above technical solutions, the data communication signal interface facilitates data transmission between the chip and the light source board, and the test signal interface facilitates testing of the chip and the light source board during the production process, thereby improving production efficiency and product quality and reducing production costs.

[0011] Optionally, the first signal area and the second signal area are provided with a control signal interface and a receiving signal interface. The control signal interface is used to connect the control signal pins of the chip and the control signal interface of the light source board, and the receiving signal interface is used to connect the receiving signal pins of the chip and the receiving signal interface of the light source board.

[0012] By adopting the above technical solutions, the control signal interface can achieve precise control of the chip and the light source board, enabling the vehicle lights to be flexibly adjusted and controlled according to different needs, while the receiving signal interface can meet some signal receiving requirements.

[0013] Optionally, both the first power supply area and the second power supply area are provided with multiple analog power interfaces, which are used to connect the analog power pins of the chip and the light-emitting diode interface of the light source board.

[0014] By adopting the above technical solution, the analog power interface can provide a stable power connection between the analog power pins of the chip and the LED interface of the light source board, ensuring the normal operation of the chip and the light source board.

[0015] Optionally, both the first power supply area and the second power supply area are further provided with multiple grounding interfaces. The grounding interfaces are used to connect the analog ground pin of the chip to the grounding interface of the light source board, to connect the digital ground pin of the chip to the grounding interface of the light source board, and to connect the analog ground reference current pin of the chip to the grounding interface of the light source board.

[0016] By adopting the above technical solutions, the setting of multiple grounding interfaces can meet the different grounding requirements of chips and light source boards, further reduce electromagnetic interference, and improve the stability and reliability of signal transmission.

[0017] Optionally, the carrier board is further provided with a multi-layer circuit structure, and each interface on the first surface is connected to an interface on the second surface corresponding to the interface on the first surface through the multi-layer circuit structure.

[0018] By adopting the above technical solution, a multi-layer circuit structure is provided in the carrier board, so that each interface on the first side can be connected to the corresponding interface on the second side, which improves the flexibility and density of the carrier board wiring and can meet the complex circuit connection requirements.

[0019] Optionally, the first surface is provided with a chip mounting position for mounting the chip.

[0020] By adopting the above technical solution, the chip mounting position provides a stable mounting location for the chip, ensuring a tight connection between the chip and the carrier board, thereby achieving good electrical contact; at the same time, the chip mounting position also helps to improve the chip mounting efficiency and accuracy, facilitating production and manufacturing.

[0021] Optionally, the first surface is provided with multiple connecting wires, all of which are used to connect the pins of the chip to the interface on the first surface.

[0022] By adopting the above technical solution, multiple connecting wires are used to connect the chip's pins to the interface on the first surface, achieving an efficient connection between the chip and the interface. This helps improve the efficiency and quality of signal transmission and ensures the normal operation of the chip.

[0023] Optionally, the multiple interfaces on the first surface are staggered to avoid short circuits between adjacent connecting wires.

[0024] By adopting the above technical solution, the staggered interfaces prevent adjacent wires from short-circuiting, thus improving the safety and reliability of the carrier board. At the same time, the staggered interfaces also help optimize the spatial layout of the carrier board and improve space utilization.

[0025] In summary, this application includes at least one of the following beneficial technical effects: 1. The symmetrical arrangement of the first signal area, second signal area, first power supply area and second power supply area improves the efficiency of signal and power transmission between the chip and the light source board, while the standardized design facilitates production and manufacturing. 2. The power signal interface and grounding interface in the first signal area and the second signal area ensure that the power connection and grounding connection between the chip and the light source board are more stable and reliable, thereby improving the stability of signal transmission; 3. The data communication signal interface facilitates data transmission between the chip and the light source board, while the test signal interface facilitates testing of the chip and the light source board during the production process, thereby improving production efficiency and product quality and reducing production costs. 4. The carrier board has a multi-layer circuit structure, which allows each interface on the first surface to be connected to the corresponding interface on the second surface, improving the flexibility and density of the carrier board wiring and meeting complex circuit connection requirements. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of the first side of a micro light-emitting diode chip carrier board for automotive lights according to an embodiment of this application; Figure 2 This is a schematic diagram of the structure of the second side of a micro LED chip carrier for automotive lights, as described in an embodiment of this application, opposite to the first side. Figure 3 yes Figure 1 A magnified schematic diagram of the first signal region in the middle; Figure 4 yes Figure 1 A magnified schematic diagram of the second signal region in the middle; Figure 5 yes Figure 1 Enlarged schematic diagram of the first power supply region; Figure 6 yes Figure 1 An enlarged schematic diagram of the second power supply region.

[0027] Explanation of reference numerals in the attached diagram: 10. First signal area; 11. Power signal interface; 11a. Analog power interface; 11b. Analog power current reference interface; 11c. Digital power interface; 11d. Digital power interface; 12. Ground signal interface; 12a. Analog power current reference ground interface; 13. Data communication signal interface; 13a. Data input / output interface; 13b. Chip selection interface; 13c. Clock signal interface; 13d. Serial clock signal interface; 13e. Clock input interface; 13f. Crystal oscillator interface; 13g. Data transmission output status interface; 13h. Bit line interface; 13i. Word line interface; 14. Test signal interface; 14a. Word line test interface; 1 4b. Bit line test interface; 14c. LED test interface; 14d. Clock test interface; 15. Control signal interface; 15a. Enable current reference interface; 15b. Enable interface; 15c. Reset signal interface; 15d. Screen control signal interface; 15e. Global synchronization signal interface; 15f. Output enable synchronization signal interface; 15g. Cyclic redundancy check end interface; 15h. Write-full status interface; 16. Receive signal interface; 16a. Receive enable interface; 16b. External clock interface; 20. Second signal area; 30. First power supply area; 31. Analog power supply interface; 32. Ground interface; 40. Second power supply area; 50. Chip mounting position; 60. Connecting wire. Detailed Implementation

[0028] The following is in conjunction with the appendix Figure 1-6 This application will be described in further detail.

[0029] This application discloses a micro LED chip carrier board for automotive lights.

[0030] Reference Figure 1 and Figure 2 The micro LED chip carrier board for automotive lights includes a carrier board with a first side and a second side. Both the first and second sides have functional areas, including a first signal area 10, a second signal area 20, a first power supply area 30, and a second power supply area 40. Both the first and second sides have a first central axis (AA) and a second central axis (BB). The first signal area 10 and the second signal area 20 are symmetrically distributed with respect to the first central axis (AA), and the first power supply area 30 and the second power supply area 40 are symmetrically distributed with respect to the second central axis (BB).

[0031] The first signal area 10, the second signal area 20, the first power area 30, and the second power area 40 each have multiple interfaces. The first surface has chip mounting positions 50 and multiple connecting wires 60. The chip mounting positions 50 are used to mount chips, and the multiple connecting wires 60 are used to connect the pins of the chip to the multiple interfaces on the first surface. The multiple interfaces on the first surface are arranged in an interleaved layout to avoid short circuits between adjacent connecting wires 60. The carrier board has a multi-layer circuit structure, and each interface on the first surface is connected to the corresponding interface on the second surface through this multi-layer circuit structure. The multi-layer circuit structure ensures the passage of signals and current.

[0032] Reference Figure 3 and Figure 4 The multiple interfaces in the first signal area 10 and the second signal area 20 include multiple power signal interfaces 11, multiple ground signal interfaces 12, multiple data communication signal interfaces 13, multiple test signal interfaces 14, multiple control signal interfaces 15, and multiple receiving signal interfaces 16.

[0033] The power signal interface 11 includes multiple analog power interfaces 11a (AVDD), multiple analog power current reference interfaces 11b (AVDD5_IREF), multiple digital power interfaces 11c (VDD), and multiple digital power interfaces 11d (VDD5).

[0034] The analog power interface 11a (AVDD) is used to connect the analog power pin (AVDD) of the chip to the analog power interface (AVDD) of the light source board. The analog power current reference interface 11b (AVDD5_IREF) is used to connect the analog power current reference pin (AVDD5_IREF) of the chip to the analog power current reference interface (AVDD5_IREF) of the light source board. The digital power interface 11c (VDD) is used to connect the digital power pin (VDD) of the chip to the digital power interface (VDD) of the light source board. The digital power interface 11d (VDD5) is used to connect the digital power pin (VDD5) of the chip to the digital power interface (VDD5) of the light source board.

[0035] The grounding signal interface 12 includes an analog power current reference ground interface 12a (AVSS5_IREF). The analog power current reference ground interface 12a (AVSS5_IREF) is used to connect the analog power current reference ground pin (AVSS5_IREF) of the chip and the analog power current reference ground interface (AVSS5_IREF) of the light source board.

[0036] The data communication signal interface 13 includes multiple data input / output interfaces 13a (DIO), multiple chip select interfaces 13b (CSB), a clock signal interface 13c (SCK), multiple serial clock signal interfaces 13d (SCLK), a clock input interface 13e (XI_8M), a crystal oscillator interface 13f (XO), multiple data transmission output status interfaces 13g (DT_O_FG_5), a bit line interface 13h (BL_PAD_9), and a word line interface 13i (WL_PAD_8).

[0037] The data input / output interface 13a (DIO) is used to connect the data input / output pins (DIO) of the chip and the data input / output interface (DIO) of the light source board. The chip select interface 13b (CSB) is used to connect the chip select pin (CSB) of the chip and the chip select interface (CSB) of the light source board. The clock signal interface 13c (SCK) is used to connect the clock signal pin (SCK) of the chip and the clock signal interface (SCK) of the light source board. The serial clock signal interface 13d (SCLK) is used to connect the serial clock signal pin (SCLK) of the chip and the serial clock signal interface (SCLK) of the light source board. The clock input interface 13e (XI_8M) is used to connect the clock input pin (XI_8M) of the chip and the output interface (YOUT) of the light source board. The crystal oscillator interface 13f (XO) is used to connect the crystal oscillator pin (XO) of the chip and the crystal oscillator interface (XO) of the light source board. The data transmission status interface 13g (DT_O_FG_5) is used to connect the data transmission status pin (DT_O_FG_5) of the chip and the input data transmission status interface (IN_DT_O_FG_5) of the light source board. The bit line interface 13h (BL_PAD_9) is used to connect the bit line pin (BL_PAD_9) of the chip and the input bit line interface (IN_BL_PAD_9) of the light source board. The word line interface 13i (WL_PAD_8) is used to connect the word line pin (WL_PAD_8) of the chip and the input word line interface (IN_WL_PAD_8) of the light source board.

[0038] The test signal interface 14 includes a word line test interface 14a (WL_test), a bit line test interface 14b (BL_test), a light-emitting diode test interface 14c (LED_test), and a clock test interface 14d (CLK_TEST).

[0039] The word line test interface 14a (WL_test) is used to connect the word line test pin (WL_test) of the chip to the word line test interface (WL_test) of the light source board. The bit line test interface 14b (BL_test) is used to connect the bit line test pin (BL_test) of the chip to the bit line test interface (BL_test) of the light source board. The light-emitting diode test interface 14c (LED_test) is used to connect the light-emitting diode test pin (LED_test) of the chip to the light-emitting diode test interface (LED_test) of the light source board. The clock test interface 14d (CLK_TEST) is used to connect the clock test pin (CLK_TEST) of the chip to the clock test interface (CLK_TEST) of the light source board.

[0040] The control signal interface 15 includes multiple enable current reference interfaces 15a (EN_IREF), enable interface 15b (EN_1p8), reset signal interface 15c (RSTN), multiple screen control signal interfaces 15d (SCR), global synchronization interface 15e (GL_SYNC_PAD_6), output enable synchronization signal interface 15f (OEN_SYNC_PAD_7), cyclic redundancy check end interface 15g (crc_end), and write-full status interface 15h (WR_FULL_FG_4).

[0041] The enable current reference interface 15a (EN_IREF_9) is used to connect the enable current reference pin (EN_IREF_9) of the chip and the enable current reference interface (EN_IREF_9) of the light source board. The enable interface 15b (EN_1p8) is used to connect the enable pin (EN_1p8) of the chip and the enable interface (SW5) of the light source board. The reset signal interface 15c (RSTN) is used to connect the reset signal pin (RSTN) of the chip and the reset signal interface (RSTN) of the light source board. The screen control signal interface 15d (SCR) is used to connect the screen control signal pin (SCR) of the chip and the screen control signal interface (SCR) of the light source board. The global synchronization signal interface 15e (GL_SYNC_PAD_6) is used to connect the global synchronization signal pin (GL_SYNC_PAD_6) of the chip and the input global synchronization signal interface (IN_GL_SYNC_PAD_6) of the light source board. The output enable synchronization signal interface 15f (OEN_SYNC_PAD_7) is used to connect the output enable synchronization signal pin (OEN_SYNC_PAD_7) of the chip and the input / output enable synchronization signal interface (IN_OEN_SYNC_PAD_7) of the light source board. The cyclic redundancy check end interface 15g (crc_end) is used to connect the cyclic redundancy check end pin (crc_end) of the chip and the input / output cyclic redundancy check end interface (IN_crc_end_1) of the light source board. The write-full status interface 15h (WR_FULL_FG_4) is used to connect the write-full status pin (WR_FULL_FG_4) of the chip and the input write-full status interface (IN_WR_FULL_FG_4) of the light source board.

[0042] The receiving signal interface 16 includes multiple receive enable interfaces 16a (REN) and an external clock interface 16b (EXCLK). The receive enable interface 16a (REN) is used to connect the receive enable pin (REN) of the chip to the input receive enable interface (IN_REN) of the light source board. The external clock interface 16b (EXCLK) is used to connect the external clock pin (EXCLK) of the chip to the output external clock interface (OUT_EXCLK) of the light source board.

[0043] Reference Figure 5 and Figure 6The multiple interfaces within the first power supply area 30 and the second power supply area 40 include multiple analog power interfaces 31 (AVDD5) and multiple ground interfaces 32 (GND). The analog power interfaces 31 (AVDD5) are used to connect the analog power pins (AVDD5) of the chip to the LED+ interface of the light source board. The ground interfaces 32 (GND) are used to connect the analog ground pins (AVSS) of the chip to the ground interface (GND) of the light source board, to connect the digital ground pins (VSS) of the chip to the ground interface (GND) of the light source board, and to connect the analog ground reference current pins (AVSS_IREF) of the chip to the ground interface (GND) of the light source board.

[0044] The implementation principle of the micro LED chip carrier board for automotive lights in this application embodiment is as follows: the symmetrical arrangement of the first signal area 10, the second signal area 20, the first power area 30 and the second power area 40 improves the signal and power transmission efficiency between the chip and the light source board, while the unified and standardized design facilitates production and manufacturing.

[0045] The above are all preferred embodiments of this application, and are not intended to limit the scope of protection of this application. Therefore, all equivalent changes made in accordance with the structure, shape and principle of this application should be covered within the scope of protection of this application.

Claims

1. A miniature light-emitting diode chip carrier board for automotive lights, characterized in that, include: The carrier board has a first surface, a second surface, a first central axis, and a second central axis perpendicular to the first central axis. Functional areas are provided on both the first surface and the second surface. The functional areas include a first signal area (10), a second signal area (20), a first power area (30), and a second power area (40). The first signal area (10) and the second signal area (20) are symmetrically arranged with respect to the first central axis. The first power area (30) and the second power area (40) are symmetrically arranged with respect to the second central axis. Multiple interfaces are provided in each of the first signal area (10), the second signal area (20), the first power area (30), and the second power area (40). Multiple interfaces on the first surface are used to connect to a chip. Multiple interfaces on the second surface are used to connect to a light source board. Multiple interfaces on the second surface are connected to multiple interfaces on the first surface to transmit signals and power between the chip and the light source board.

2. The micro LED chip carrier board for automotive lights according to claim 1, characterized in that, The first signal area (10) and the second signal area (20) are provided with a power signal interface (11) and a ground signal interface (12). The power signal interface (11) is used to connect the power pin of the chip and the power interface of the light source board. The ground signal interface (12) is used to connect the ground pin of the chip and the ground interface of the light source board.

3. The micro LED chip carrier board for automotive lights according to claim 1, characterized in that, The first signal area (10) and the second signal area (20) are provided with a data communication signal interface (13) and a test signal interface (14). The data communication signal interface (13) is used to connect the data communication pin of the chip and the data communication interface of the light source board. The test signal interface (14) is used to connect the test pin of the chip and the test interface of the light source board.

4. The micro LED chip carrier board for automotive lights according to claim 1, characterized in that, The first signal area (10) and the second signal area (20) are provided with a control signal interface (15) and a receiving signal interface (16). The control signal interface (15) is used to connect the control signal pin of the chip and the control signal interface of the light source board. The receiving signal interface (16) is used to connect the receiving signal pin of the chip and the receiving signal interface of the light source board.

5. The micro LED chip carrier board for automotive lights according to claim 1, characterized in that, Both the first power supply area (30) and the second power supply area (40) are provided with multiple analog power interfaces (31), which are used to connect the analog power supply pins of the chip and the light-emitting diode interface of the light source board.

6. The micro LED chip carrier board for automotive lights according to claim 1, characterized in that, Both the first power supply area (30) and the second power supply area (40) are provided with multiple grounding interfaces (32). The grounding interface (32) is used to connect the analog ground pin of the chip to the grounding interface of the light source board, to connect the digital ground pin of the chip to the grounding interface of the light source board, and to connect the analog ground reference current pin of the chip to the grounding interface of the light source board.

7. The micro light-emitting diode chip carrier board for automotive lights according to claim 1, characterized in that, The carrier board also has a multi-layer circuit structure, and each interface on the first surface is connected to an interface on the second surface that corresponds to the interface on the first surface through the multi-layer circuit structure.

8. The micro LED chip carrier board for automotive lights according to claim 1, characterized in that, The first surface is provided with a chip mounting position (50), which is used to mount the chip.

9. The micro light-emitting diode chip carrier board for automotive lights according to claim 8, characterized in that, The first surface is provided with multiple connecting wires (60), and the multiple connecting wires (60) are used to connect the pins of the chip to the interface on the first surface.

10. The micro light-emitting diode chip carrier board for automotive lights according to claim 9, characterized in that, The multiple interfaces on the first surface are staggered to avoid short circuits between adjacent connecting wires (60).