Circuit board and terminal device

Abstract

A circuit board is divided into a main body area, a transition area and a thinning area connected in sequence, the thickness of the main body area is greater than the thickness of the transition area, and the thickness of the transition area is greater than the thickness of the thinning area. The circuit board comprises an inner layer circuit substrate, an outer layer circuit substrate, a cover layer and an electromagnetic shielding layer. The inner layer circuit substrate is located in the main body area, the transition area and the thinning area; the outer layer circuit substrate comprises an outer layer dielectric layer and an outer layer circuit layer, the outer layer dielectric layer is located in the main body area, the transition area and the thinning area, and the outer layer circuit layer is located in the main body area and on the surface of the outer layer dielectric layer away from the inner layer circuit substrate; the cover layer is located in the main body area and on the side of the outer layer circuit substrate away from the inner layer circuit substrate; and the electromagnetic shielding layer is located in the main body area, the transition area and the thinning area, and covers the cover layer and the outer layer dielectric layer in the thinning area. The application also provides a terminal device.

Description

Technical Field

[0001] This application relates to a circuit board and a terminal device. Background Technology

[0002] Circuit boards are crucial components in terminal devices. As terminal devices become thinner and lighter, circuit boards also need to be thinner and lighter to reduce the installation space required. However, existing circuit boards are quite thick, making it difficult to meet the demand for thinner and lighter terminal devices. Utility Model Content

[0003] In view of this, it is necessary to provide a thinner and lighter circuit board and terminal device to solve the above problems.

[0004] A circuit board is divided into a main body region, a transition region, and a thinning region connected in sequence. The thickness of the main body region is greater than the thickness of the transition region, and the thickness of the transition region is greater than the thickness of the thinning region. The circuit board includes an inner circuit board, an outer circuit board, a cover layer, and an electromagnetic shielding layer. The inner circuit board is located in the main body region, the transition region, and the thinning region. The outer circuit board includes an outer dielectric layer and an outer circuit layer. The outer dielectric layer is located in the main body region and on the surface of the outer dielectric layer opposite to the inner circuit board. The cover layer is located in the main body region and on the side of the outer circuit board opposite to the inner circuit board. The electromagnetic shielding layer is located in the main body region, the transition region, and the thinning region, and covers the cover layer and the outer dielectric layer located in the thinning region. This application also provides a terminal device.

[0005] In the circuit board provided in this embodiment, the outer dielectric layer can serve as part of the protective layer of the inner circuit board, replacing the second adhesive layer in related technologies. The outer dielectric layer does not need to compensate for the step difference, and its thickness can be set to be thinner, thereby reducing the overall thickness of the circuit board. In addition, the second adhesive layer in this embodiment is located in the main body area, and similarly, it does not need to compensate for the step difference. The second adhesive layer can be set to be thinner, thereby further reducing the overall thickness of the circuit board in the main body area. The step difference in this application is small, and the width of the transition area of ​​the circuit board is small, which facilitates the bending of the circuit board located in the thinning area and improves the fatigue resistance of the circuit board. Attached Figure Description

[0006] Figure 1 A cross-sectional flow diagram illustrating a circuit board manufacturing method provided for related technologies.

[0007] Figure 2 A schematic cross-sectional view of the circuit board provided in an embodiment of this application.

[0008] Figure 3 This is a top view of a circuit board provided in an embodiment of this application.

[0009] Figure 4 This is a cross-sectional schematic diagram of the inner layer circuit board provided in an embodiment of this application.

[0010] Figure 5 In order to be in Figure 4 The diagram shows a cross-sectional view of the first adhesive layer and the single-sided copper-clad laminate on the inner circuit board.

[0011] Figure 6 In order to be in Figure 5 A cross-sectional schematic diagram showing the electroplated layer formed on a portion of the surface of the single-sided copper-clad laminate.

[0012] Figure 7 To Figure 6 The diagram shows a cross-sectional view of the electroplated layer and single-sided copper-clad laminate used to fabricate the circuit to obtain the outer circuit substrate.

[0013] Figure 8 In order to be in Figure 7 The diagram shows a cross-sectional view of the outer circuit board with a cover layer and an electromagnetic shielding layer.

[0014] Explanation of main component symbols The following detailed description, in conjunction with the accompanying drawings, will further illustrate this application. Detailed Implementation

[0015] To better understand the above-mentioned objectives, features, and advantages of this application, the application will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. Many specific details are set forth in the following description to provide a thorough understanding of this application; the described embodiments are merely some, not all, of the embodiments described in this application.

[0016] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The term "and / or" as used herein includes all and any combination of one or more of the associated listed items.

[0017] In the various embodiments of this application, for ease of description and not limitation, the term "connection" used in the patent application specification and claims is not limited to physical or mechanical connections, whether direct or indirect. Terms such as "upper," "lower," "above," "below," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship also changes accordingly.

[0018] Please see Figure 1 , Figure 1 A cross-sectional flow diagram illustrating a method for manufacturing a circuit board 100' provided for related technologies. The method for manufacturing the circuit board 100' includes the following steps: Step S11: Provide an inner layer circuit board 10, and provide a first adhesive layer 20 and an outer layer circuit board 30 on a portion of the surface of the inner layer circuit board 10; expose the remaining portion of the surface of the inner layer circuit board 10 to the second adhesive layer 40' and the outer layer circuit board 30; provide a cover layer 50' and an electromagnetic shielding layer 60 on the surface of the outer layer circuit board 30, the lengths of the cover layer 50' and the electromagnetic shielding layer 60 being approximately matched to the length of the inner layer circuit board 10.

[0019] In this related art, the thickness of the inner circuit board 10 is 36 μm; the thickness of the first adhesive layer 20 is 15 μm; the thickness of the outer dielectric layer 31' of the outer circuit board 30 is 12 μm; the thickness of the outer circuit layer 32 of the outer circuit board 30 is 12 μm; the sum of the thicknesses of the first adhesive layer 20 and the outer circuit board 30 is 39 μm; therefore, the step difference H1 between the outer circuit board 30 and the inner circuit board 10 is 39 μm.

[0020] Step S12: Press the above structure together, and the second adhesive layer 40' bonds the inner circuit board 10 and the cover layer 50' to obtain the circuit board 100'.

[0021] The circuit board 100' has different thicknesses in different regions, and is divided into a main body region I, a transition region II, and a thinning region III that are connected in sequence and have progressively decreasing thicknesses. The inner layer circuit board 10 is located in the main body region I, the transition region II, and the thinning region III, and the outer layer circuit board 30 is located in the main body region I.

[0022] The outer dielectric layer 31' and outer circuit layer 32 of the outer circuit board 30 are both located in the main body region I. The second adhesive layer 40' needs to compensate for the step difference H1 between the outer circuit board 30, the first adhesive layer 20 and the inner circuit board 10, and fill the gaps between the inner circuit layers 12 on the inner circuit board 10. The thickness of the second adhesive layer 40' is typically not less than 20 μm. During the lamination process, the second adhesive layer 40' also overflows in the region of the step difference H1 between the outer circuit board 30 and the inner circuit board 10. The region corresponding to the overflow of the second adhesive layer 40' forms the transition region II of the circuit board 100'.

[0023] In this related art, without calculating the electromagnetic shielding layer 60, the overall thickness of the main body region I is 178 μm, and the overall thickness of the thinning region III is 100 μm.

[0024] Please see Figure 2 , Figure 2 This is a cross-sectional schematic diagram of the circuit board 100 provided in an embodiment of this application. The circuit board 100 can be divided into a main body region I, a transition region II, and a thinning region III connected in sequence. The thickness of the main body region I is greater than the thickness of the transition region II, and the thickness of the transition region II is greater than the thickness of the thinning region III.

[0025] The circuit board 100 may include an inner circuit board 10, an outer circuit board 30, a cover layer 50, and an electromagnetic shielding layer 60 stacked together. The inner circuit board 10 and the electromagnetic shielding layer 60 are both located in the main body region I, the transition region II, and the thinning region III. The outer circuit board 30 includes an outer dielectric layer 31 and an outer circuit layer 32. The outer dielectric layer 31 is located in the main body region I, the transition region II, and the thinning region III, while the outer circuit layer 32 and the cover layer 50 are located in the main body region I. The outer dielectric layer 31, located in the thinning region III, can serve as a protective layer for the inner circuit board 10.

[0026] The inner layer circuit board 10 may include an inner dielectric layer 11 and an inner circuit layer 12. The inner circuit layer 12 is located on the surface of the dielectric layer, and a portion of the surface of the inner dielectric layer 11 is exposed to the inner circuit layer 12. The number of inner dielectric layers 11 and inner circuit layers 12 is not limited; each may be one or more layers. In this embodiment, the inner layer circuit board 10 includes one inner dielectric layer 11 and two inner circuit layers 12, with the two inner circuit layers 12 located on opposite surfaces of the inner dielectric layer 11. The inner layer circuit board 10 may also include a first via 13, which penetrates the inner dielectric layer 11 and connects to the two inner circuit layers 12.

[0027] The inner dielectric layer 11 can be made of a flexible material selected from polyimide (PI), liquid crystal polymer (LCP), and modified polyimide (MPI). In this embodiment, the inner dielectric layer 11 is made of PI, and the inner circuit board 10 is flexible. The inner circuit board 10 is flexible and can be bent.

[0028] In this embodiment, the circuit board 100 includes two outer circuit boards 30, which are located on opposite sides of the inner circuit board 10. Each outer circuit board 30 includes an outer dielectric layer 31 and an outer circuit layer 32, with the outer circuit layer 32 located on the surface of the outer dielectric layer 31 facing away from the inner circuit board 10. The outer circuit layers 32 of both outer circuit boards 30 are located in the main body region I, and the outer dielectric layers 31 of both outer circuit boards 30 are located in the main body region I, the transition region II, and the thinning region III. The outer circuit layer 32 covers the surface of the outer dielectric layer 31 located in the main body region I, and the outer circuit layer 32 is not located in the transition region II and the thinning region III.

[0029] The material of the outer dielectric layer 31 can be selected from flexible materials such as polyimide (PI), liquid crystal polymer (LCP), and modified polyimide (MPI), or it can be selected from rigid materials such as polypropylene (PP) and polytetrafluoroethylene (PTFE).

[0030] The circuit board 100 may further include a first adhesive layer 20, which is located between the inner circuit board 10 and the outer circuit board 30. The first adhesive layer 20 is used to bond the inner circuit board 10 and the outer circuit board 30. The first adhesive layer 20 is located in the main body region I, the transition region II, and the thinning region III. The first adhesive layer 20 bonds the inner circuit board 10 and the outer dielectric layer 31. The first adhesive layer 20 also fills the gaps between the inner circuit layers 12 and bonds the inner dielectric layer 11.

[0031] The first adhesive layer 20 and the outer dielectric layer 31 located in the thinning region III can serve as protective layers for the inner circuit board 10 located in the thinning region III, protecting the inner circuit layer 12 located in the thinning region III. Therefore, there is no need to provide an additional protective layer for the inner circuit layer 12 located in the thinning region III. In this embodiment, the thickness of the first adhesive layer 20 is 15 μm, and the thickness of the outer dielectric layer 31 is 5 μm, meaning the sum of the thicknesses of the protective layers is 20 μm. In related technologies, the thickness of the protective layer is the sum of the thicknesses of the second adhesive layer 40' (20 μm) and the cover layer 50' (12 μm), totaling 32 μm. Compared to related technologies, the thickness of the thinning region III in this embodiment can be reduced by 12 μm on one side and by 24 μm on both sides.

[0032] The circuit board 100 may further include a second adhesive layer 40, which is located between the cover layer 50 and the outer circuit board 30. The second adhesive layer 40 is located in the main body region I and the thinning region III. The second adhesive layer 40 in the main body region I is used to bond the cover layer 50 and the outer circuit board 30. Since there is a step H2 between the outer circuit layer 32 and the outer dielectric layer 31, during the lamination step of manufacturing the circuit board 100, the second adhesive layer 40 located in the main body region I overflows onto the surface of the outer dielectric layer 31 and covers the outer dielectric layer 31. The area corresponding to the overflowing second adhesive layer 40 forms the transition region II of the circuit board 100. The second adhesive layer 40 and the cover layer 50 can serve as a protective layer for the outer circuit layer 32.

[0033] The second adhesive layer 40 does not need to extend into the thinning region III, nor does it need to compensate for the large step difference H2. The thickness of the second adhesive layer 40 can be reduced compared to related technologies. In this embodiment, the thickness of the second adhesive layer 40 is 15 μm, which is less than 20 μm in related technologies. Furthermore, the thickness of the first adhesive layer 20 in this embodiment is 5 μm, which is less than 12 μm in related technologies. Therefore, compared to related technologies, the thickness of the main body region I in this embodiment can be reduced by 12 μm on one side and by 24 μm on both sides.

[0034] In this embodiment, without considering the electromagnetic shielding layer 60, the overall thickness of the main body region I is 154 μm, and the overall thickness of the thinning region III is 76 μm. The thickness of the circuit layer can be increased or decreased according to the required thickness, thus altering the overall thickness of the main body region I and the thinning region III.

[0035] Furthermore, since the step difference H2 between the outer circuit layer 32 and the outer dielectric layer 31 in this application is small, the overflow area of ​​the second adhesive layer 40 is small during the lamination step. Therefore, the width of the transition area II of the circuit board 100 is also small, resulting in a longer width of the thinning area III compared to the related technologies. When the inner dielectric layer 11 is a flexible substrate, it is more conducive to the bending of the thinning area III.

[0036] The electromagnetic shielding layer 60 covers the cover layer 50 located in the main body region I, the second adhesive layer 40 located in the transition region II, and the outer dielectric layer 31 located in the thinning region III.

[0037] Please see Figure 3 The electromagnetic shielding layer 60 is provided with a first opening 61 and a second opening 62. The first opening 61 is located in the main body region I, and the second opening 62 is located in the thinning region III. The minimum size D1 of the first opening 61 is greater than the minimum size D2 of the second opening 62. The minimum size D1 of the first opening 61 located in the main body region I is greater than 0.4 mm. For example, in some embodiments, the size of the first opening 61 can be a square with a diameter greater than 0.4 mm * 0.4 mm, or a circle with a diameter greater than 0.6 mm. The size of the second opening 62 can be any combination of 0.05 mm to 0.2 mm.

[0038] Please see Figure 2 , Figures 4 to 8 A method for manufacturing a circuit board 100 may include the following steps: Step S21: Please refer to Figure 4 Provides inner layer circuit board 10.

[0039] The inner circuit board 10 includes an inner dielectric layer 11 and an inner circuit layer 12, with the inner circuit layer 12 located on the surface of the inner dielectric layer 11. The inner dielectric layer 11 can be made of a flexible material or a rigid material.

[0040] Step S22: Please refer to Figure 5 A first adhesive layer 20 and a single-sided copper clad laminate 35 are disposed on the surface of the inner circuit board 10 and laminated together. The single-sided copper clad laminate 35 includes an outer dielectric layer 31 and a bottom copper layer 321 located on the surface of the dielectric layer. The first adhesive layer 20 bonds the outer dielectric layer 31 and the inner circuit board 10.

[0041] After the lamination step, the first adhesive layer 20 fills the gap between the inner circuit layers 12 and bonds the inner dielectric layer 11 exposed on the surface of the inner circuit layers 12.

[0042] Step S23: Please refer to Figure 6 An electroplated layer 322 is formed on a portion of the surface of the single-sided copper-clad laminate 35, and the remaining portion of the bottom copper layer 321 is exposed to the electroplated layer 322.

[0043] Prior to the step of forming the electroplated layer 322, the fabrication method further includes forming blind vias 331 on the single-sided copper-clad laminate 35 and the first adhesive layer 20, with the surface of the inner circuit layer 12 exposed through the blind vias 331. During the step of forming the electroplated layer 322, the blind vias 331 are also filled to form a second via 33, which serves to connect the inner circuit layer 12 and the electroplated layer 322.

[0044] Step S24: Please refer to Figure 7 Remove the bottom copper layer 321 exposed to the electroplated layer 322, and fabricate circuits on the electroplated layer 322 and the remaining bottom copper layer 321 to obtain the outer circuit layer 32.

[0045] After the circuit is fabricated, the electroplated layer 322 and the bottom copper layer 321 together form the outer circuit layer 32, and the outer circuit layer 32 and the outer dielectric layer 31 together form the outer circuit substrate 30.

[0046] After the step of removing the bottom copper layer 321 exposed to the electroplated layer 322, the surface of the outer dielectric layer 31 is exposed, and a step difference H2 is formed between the outer circuit layer 32 and the outer dielectric layer 31. The step difference H2 is the thickness of the outer circuit layer 32. Compared with related technologies, the step difference H2 in this embodiment is smaller.

[0047] Step S25: Please refer to Figure 8 A second adhesive layer 40 and a cover layer 50 are provided on the surface of the outer circuit layer 32, and the second adhesive layer 40 bonds the outer circuit layer 32 and the cover layer 50.

[0048] In this embodiment, the second adhesive layer 40 is thin enough to bond the cover layer 50 and the outer circuit board 30, thereby reducing the thickness of the circuit board 100 in the main body area I.

[0049] Step S26: Please refer again Figure 2 An electromagnetic shielding layer 60 is disposed on the surface of the cover layer 50 and the outer dielectric layer 31 and pressed together, and the second adhesive layer 40 overflows toward the outer dielectric layer 31 to obtain the circuit board 100.

[0050] The area corresponding to the second outer circuit layer 32 and the cover layer 50 forms the main body area I of the circuit board 100, the area corresponding to the overflow of the second adhesive layer 40 forms the transition area II of the circuit board 100, and the area adjacent to the transition area II and away from the main body area I forms the thinning area III of the circuit board 100.

[0051] In this embodiment, the outer dielectric layer 31 of the circuit board 100 can serve as part of the protective layer of the inner circuit board 10, replacing the second adhesive layer 40' in related technologies. The outer dielectric layer 31 does not need to compensate for the step difference H2, and its thickness can be set to be thinner, thereby reducing the overall thickness of the circuit board 100. In addition, the second adhesive layer 40 in this embodiment is located in the main body region I, and similarly, it does not need to compensate for the step difference H2. The second adhesive layer 40 can be set to be thinner, thereby further reducing the overall thickness of the circuit board 100 in the main body region I. The step difference H2 in this application is smaller, and the width of the transition region II of the circuit board 100 is smaller, which facilitates the bending of the circuit board 100 located in the thinning region III and improves the fatigue resistance of the circuit board 100.

[0052] This application embodiment also provides a terminal device (not shown), which includes the circuit board 100. The terminal device may include, but is not limited to, a liquid crystal display, a mobile phone, a camera, a computer, a drone, a camcorder, etc. The circuit board 100 has properties such as being lightweight and thin, and having good fatigue resistance; the terminal device includes the aforementioned advantages of the circuit board 100.

[0053] The above embodiments are only used to illustrate the technical solutions of this application and are not intended to limit it. Although this application has been described in detail with reference to the above preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions to the technical solutions of this application should not depart from the scope of the technical solutions of this application.

Claims

1. A circuit board, divided into a main body region, a transition region, and a thinning region connected in sequence, wherein the thickness of the main body region is greater than the thickness of the transition region, and the thickness of the transition region is greater than the thickness of the thinning region, characterized in that, The circuit board includes: The inner circuit board is located in the main body region, the transition region, and the thinning region; An outer circuit board includes an outer dielectric layer and an outer circuit layer. The outer dielectric layer is located in the main region, the transition region, and the thinning region. The outer circuit layer is located in the main region and on the surface of the outer dielectric layer opposite to the inner circuit board. A cover layer, located in the main body area and on the side of the outer circuit board opposite to the inner circuit board; and An electromagnetic shielding layer is located in the main body region, the transition region, and the thinning region, and covers the cover layer and the outer dielectric layer located in the thinning region.

2. The circuit board according to claim 1, characterized in that, The circuit board further includes a first adhesive layer located in the main body region, the transition region, and the thinning region, and the first adhesive layer bonds the inner circuit board and the outer dielectric layer.

3. The circuit board according to claim 2, characterized in that, The inner circuit board includes an inner dielectric layer and an inner circuit layer, the inner circuit layer being located on the surface of the inner dielectric layer, and a portion of the surface of the inner dielectric layer being exposed to the inner circuit layer; the first adhesive layer also fills the gaps between the inner circuit layers and bonds the inner dielectric layer.

4. The circuit board according to claim 3, characterized in that, The inner dielectric layer is made of a flexible substrate.

5. The circuit board according to claim 1, characterized in that, The circuit board further includes a second adhesive layer located between the main body area and the transition area, and between the outer circuit board and the cover layer. The electromagnetic shielding layer also covers the second adhesive layer located in the transition area.

6. The circuit board according to claim 5, characterized in that, The second adhesive layer covers the outer dielectric layer located in the transition region.

7. The circuit board according to claim 6, characterized in that, The electromagnetic shielding layer located in the transition zone covers the second adhesive layer located in the transition zone.

8. The circuit board according to claim 1, characterized in that, The electromagnetic shielding layer is provided with a first opening and a second opening. The first opening is located in the main body area, and the second opening is located in the thinning area. The minimum size of the first opening is larger than the minimum size of the second opening.

9. The circuit board according to claim 8, characterized in that, The minimum size of the first opening located in the main body area is greater than 0.4 mm.

10. A terminal device, characterized in that, The circuit board includes any one of claims 1-9.

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