Graphical user interface for comparing layouts of different content maps for wafer retest of electronic devices

Abstract

1. Name of the product of this design: A graphical user interface for comparing the layout of different content maps for display wafer retest of electronic equipment. 2. Purpose of the product of this design: an electronic device. 3. The design highlights of this design product are the graphical user interface content of the electronic device. 4. The picture or photo that best illustrates the design points: Changing state diagram 2. 5. The electronic equipment is of conventional design, and the rear view, left view, right view, top view and bottom view are omitted. 6. Purpose of the graphical user interface: The graphical user interface of the product displays the different content maps of the wafer retest and the graphical user interface of the monitoring tool; it is used to display the map of the wafer first test result, the map of the wafer final result, the map of the wafer changing from failure to pass after retest, and the map of the wafer changing from pass to fail after retest, which is used to compare and analyze the retest effect. 7. Human-computer interaction method of graphical user interface: human-computer interaction is carried out by clicking the screen. 8. Description of the changing states of the graphical user interface: The main view is the initial interface for opening the electronic device, which includes the wafer final result Map display area, Wafer Information area, Lot Information area, Save Information area, and Operation area; click the main view [TwoMap] button to enter the interface change state diagram 1, which includes the wafer first test result Map (left), wafer final result Map (right), and information area; click the interface change state diagram 1 [FourMap] button to enter the interface change state diagram 2, which includes the wafer first test result Map (upper left), wafer final result Map (upper right), wafer retest from fail to pass Map (lower left), wafer retest from pass to fail Map (lower right), and information area.

Images