Relaxation oscillator and method for operating a relaxation oscillator

Abstract

Relaxation oscillator comprising: a current source (11; 40; 50) for providing a charging current, a capacitor arrangement (12; 41; 51, 52) coupled to the current source (11; 40; 50), wherein the current source is configured to charge the capacitor arrangement (12; 41; 51, 52) during an operating period (Tideal), a detection arrangement (13; 43, 44, 45, 46) configured to detect when a voltage across the capacitor arrangement (12; 41; 51, 52) reaches a threshold voltage, and to discharge the capacitor arrangement (12; 41; 51, 52) in response to reaching the threshold voltage during the operating period (Tideal), wherein the charging and discharging of the capacitor arrangement (12; 41; 51, 52) in each operating period occurs exactly once, and a measuring device (14; 47, 48; 53) is set up to provide a measure of a propagation delay of the detection device (13;43, 44, 45, 46) to measure, wherein the relaxation oscillator is configured to increase a charging rate of the capacitor device (12; 41; 51, 52) for a duration based on the measure of the propagation delay, wherein the relaxation oscillator is configured to end the operating period (Tideal) following discharge and to begin a next operating period, at the beginning of which the capacitor device (12; 41; 51, 52) is recharged.;

Description

TECHNICAL AREA The present application relates to relaxation oscillators and methods for operating such relaxation oscillators. BACKGROUND Relaxation oscillators are a type of oscillator that works by gradually charging a capacitor with a current source and then rapidly discharging it upon reaching a threshold voltage. The frequency of such a relaxation oscillator is primarily determined by the charging current supplied by the current source, the capacitance of the capacitor, and the threshold voltage at which the discharge occurs. A conventional method for detecting when the threshold voltage is reached is the use of a comparator. Such comparators for detecting when the threshold voltage is reached exhibit a propagation delay that affects the oscillator frequency. This is briefly explained with reference to Figures 7 and 8. Fig. 7 schematically shows the setup of a conventional relaxation oscillator. A capacitor 71 with capacitance Cint is charged by a current source 70 with a charging current Iin, which leads to an increasing voltage Vin across the capacitor 71. This voltage Vin is compared by a comparator 73 with a reference voltage Vr (not shown in Fig. 7). When the reference voltage Vr is exceeded, a control pulse 74 is triggered, which closes a switch 72 to discharge the capacitor 71. After the pulse ends, the switch 72 opens again, and the cycle begins anew. In this way, a sawtooth oscillating voltage Vin is generated. This behavior is illustrated in Fig. 8. A curve 80 consisting of curve segments 80A, 80B and 80C shows the time course of the voltage Vint. In curve section 80A, the voltage Vint rises due to the charging of capacitor 71 with the charging current Iinan until the aforementioned threshold voltage Vrer is reached. In an ideal case, capacitor 71 would then be discharged abruptly via the mechanism described above, so that an ideal oscillator period Tideal corresponds to the time required for the voltage Vint to rise to the value Vrer. In reality, however, comparator 73 exhibits a comparator propagation delay, meaning an inherent delay, so that pulse 74 is not output without any time delay when voltage V is reached. Due to this propagation delay, the voltage Vint then continues to rise in the curve section 80B until it reaches a voltage Vtrig, at which point switch 72 is actually closed. In curve section 80C, capacitor 71 is then discharged. Contrary to ideal behavior, this discharge also requires a certain duration. Furthermore, the closing and opening of switch 72 does not occur instantaneously; rather, switch 72 remains closed for a specific time, determined by the pulse width of pulse 74. This results in a total propagation delay Δt, which leads to a real period of the relaxation oscillator being Tideal+Δt. In some applications, the propagation delay Δt varies depending on various parameters such as temperature, supply voltage, parasitic capacitances, process variations, the slope of curve segments 80A and 80B, and other variables such as fluctuations in the charging current or the capacitance value of capacitor 71. This makes it difficult to generate a precise and stable oscillation frequency that is the inverse of the period treal. US Patent 2013 / 0038364 A1 discloses an oscillator circuit that takes such propagation delays into account. For this purpose, two primary capacitors are charged alternately, with the circuit switching to the other capacitor to charge it as soon as one capacitor begins to discharge. In addition, a detection circuit is provided that uses further capacitors, thereby increasing the charging rate of the two primary capacitors for a certain period of time. SUMMARY According to the invention, a relaxation oscillator according to claim 1 and a corresponding method according to claim 13 are provided. The dependent claims define further embodiments. In one embodiment, a relaxation oscillator is provided, comprising: a current source for providing a charging current; a capacitor device coupled to the current source, wherein the current source is configured to charge the capacitor device during an operating period; a detection device configured to detect when a voltage across the capacitor device reaches a reference voltage and, in response to the detection, to discharge the capacitor device during the operating period, wherein the charging and discharging of the capacitor device occurs exactly once in each operating period; and a measuring device configured to determine a measure of propagation delay of the detection device, wherein the relaxation oscillator is configured to increase a charging rate of the capacitor device for a duration based on the measure of propagation delay.wherein the relaxation oscillator is configured to end the operating period after discharge and to begin the next operating period, at the beginning of which the capacitor assembly is recharged. According to the invention, a method is further provided comprising: charging a capacitor device during an operating period, determining a measure of a propagation delay of a detection device of a relaxation oscillator, wherein the detection device is configured to detect when a voltage across a capacitor device reaches a threshold voltage, and in response to the detection, discharging the capacitor device during the operating period, and Increasing the charging rate of the capacitor device for a period of time based on the measure, and ending the operating period following the discharge and beginning a next operating period, at the beginning of which the capacitor device is recharged, wherein the charging and discharging of the capacitor device occurs exactly once in each operating period. The above summary serves only as a brief overview of some embodiments and should not be interpreted as restrictive, since other embodiments may have different features than those described above. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 shows a block diagram of a relaxation oscillator according to one embodiment. Fig. 2 shows a flowchart illustrating a method according to one embodiment. Fig. 3 shows curves illustrating the operation of some embodiments. Fig. 4 shows a circuit diagram of a relaxation oscillator according to one embodiment. Figs. 5A and 5B illustrate the operation of relaxation oscillators according to some embodiments. Fig. 6 shows a circuit diagram of a relaxation oscillator according to one embodiment. Fig. 7 shows a circuit diagram of a relaxation oscillator according to the prior art. Fig. 8 shows an example of a voltage waveform in the relaxation oscillator of Fig. 7. DETAILED DESCRIPTION The following section details various embodiments with reference to the accompanying drawings. These embodiments serve only for illustration and are not to be interpreted as limiting. Features of different embodiments can be combined to form further embodiments. Variations, modifications, and details described for one embodiment are also applicable to other embodiments and are therefore not described again. Unless explicitly stated otherwise, the terms "connected" or "coupled" refer, within the scope of this application, to an electrical connection or coupling. Connections and / or couplings may be modified as long as the fundamental function of the connection or coupling is maintained. Fig. 1 shows a relaxation oscillator according to an exemplary embodiment. The relaxation oscillator in Fig. 1 has a capacitor array 12, which is charged by a charging current Iin from a current source 11. A capacitor array is understood to be an array with one or more capacitors, wherein at least one of the one or more capacitors is charged by the charging current Iin. In the case of multiple capacitors, these can be connected in parallel or in series, or selectively connected to one another by means of switches, as will be explained later with reference to an example in Figs. 5 and 6. Charging with the charging current I causes a voltage Vintan of the capacitor assembly 12 to rise. The voltage Vintan is monitored by a detection device 13, and in response to reaching a threshold voltage, the detection device 13 causes the capacitor assembly 12 to discharge. The detection device 13 can include a comparator, as already explained above with reference to Fig. 7. However, other detection devices that are conventionally used in relaxation oscillators can also be employed, for example, detection devices that include inverter chains. The detection device 13 exhibits a propagation delay, as explained above with reference to Figures 7 and 8 for the comparator 73 of Figure 7. This propagation delay can depend on various parameters such as temperature, voltage, process variations in the manufacture of the relaxation oscillator, and the like. The propagation delay of the detection device 13 can also include delays caused by a finite discharge time of the capacitor device 12 or by a finite pulse width of signals. Unless explicitly stated otherwise, the term "propagation delay" in this application refers to the total propagation delay of the detection device and includes, for example, both a comparator propagation delay and other delays, such as those caused by a finite pulse width of signals, as already explained above for Figures 7 and 8.7 was explained for the entire propagation delay Δt. To eliminate or at least reduce the effects of such propagation delay, the relaxation oscillator shown in Fig. 1 has a measuring device 14 configured to determine a measure of the propagation delay of the detection device 13. A measure of propagation delay is understood to be a quantity that directly or indirectly indicates the magnitude of the propagation delay. For example, variations in the propagation delay depending on the temperature can also be determined from this measure. In other words, the measure is derived from a direct or indirect measurement of the propagation delay. As will be explained later, such an indirect measurement can be performed, for example, by charging an auxiliary capacitor. Based on the measure of the propagation delay, the measuring device 14 then controls the relaxation oscillator to increase the charging rate of the capacitor device 12 for a specified duration. This duration is determined by the measure of the propagation delay. The charging rate determines how quickly the voltage Vint rises and can be expressed, for example, as dVint / dt, that is, the slope of Vint over time. The charging rate can be increased by increasing the charging current Iin and / or by decreasing the capacitance of the capacitor device 12. Examples of these two possibilities will be explained later. By increasing the charging speed for a certain period, Vintschneller increases, thereby compensating for the propagation delay of the detection device 13, either completely or partially. In some embodiments, the charging speed is doubled for a period equal to or including the propagation delay. As will be explained in more detail later, this can essentially completely compensate for the propagation delay. In some embodiments, this compensation of the propagation delay is achieved with low power consumption, low cost, and simple fabrication of the relaxation oscillator. Fig. 2 shows a flowchart illustrating a corresponding procedure. The procedure of Fig. 2 can be implemented in the relaxation oscillator of Fig. 1 and, to avoid repetition, is explained with reference to the explanation above for Fig. 1. However, the procedure of Fig. 2 can also be used in relaxation oscillators other than the one in Fig. 1. In step 20, the method shown in Fig. 2 determines a measure of the propagation delay of a detection device of a relaxation oscillator, for example, the detection device 13. In step 21, based on this measure, the charging rate of a capacitor device, for example, the capacitor device 12, is increased for a certain period of time, thereby compensating for the propagation delay completely or partially. This will now be explained with reference to Fig. 3. In Fig. 3, a curve 30, which is divided into sections 30A, 30B, 30C and 30D, shows the course of a voltage Vint of a capacitor device such as capacitor device 12 when charged with a charging current. The slope of the charging curve is determined by the quotient of the charging current Iin and the capacitance Cint of the capacitor device. In the embodiment shown in Fig. 3, the propagation delay of a detection device is denoted by Δt. For a duration Δt, the charging speed is doubled in curve section 30A. Following curve section 30A are curve sections 30B and 30C, in which the charging speed is reduced again, that is, to half the charging speed in curve section 30A. This compensates for the time Δt resulting from the delay caused by the detection device until the start of the capacitor discharge, as in curve section 30C (corresponding to the explained curve section 80B in Fig. 8), and from a finite pulse width Δt of a signal, as shown in curve section 30D.Such an increase in charging speed in curve section 30A can be achieved, for example, by doubling the charging current Iin, by halving the capacity Cint, or by a combination of increasing the charging current with decreasing the capacity. It should also be noted that doubling the charging speed for a duration Δt provides a simple means of compensation. However, in other embodiments, a smaller increase in the charging speed than a doubling can be implemented for a longer duration than Δt, or a larger increase in the charging speed can be implemented for a shorter duration Δt. In this way, an oscillator period can be kept at least approximately at an ideal tide. It should be noted that in the embodiments described with reference to Figures 1 and 2, fluctuations in Δt, for example due to temperature and voltage changes, are also compensated. Furthermore, as already indicated above, not only is the propagation delay of a comparator itself compensated, but in embodiments, the propagation delay of an entire detection device, including, for example, effects resulting from a finite pulse width Δt of a pulse for opening and closing a discharge switch, can also be compensated. Other curves in Fig. 3 refer to detailed embodiments described below and are explained together with them. Fig. 4 shows a relaxation oscillator according to an embodiment in which a doubling of a charging current during a time period Δt is used. The relaxation oscillator of Fig. 4 has a first current source 40 that provides a charging current for a first capacitor 41. The first capacitor 41 has a capacitance Cint,1. The current source 40 is variable, so that either a charging current Iin or twice that charging current 2Iin can be supplied to the capacitor 41. A voltage across the first capacitor 41 is denoted by Vint,1. The first capacitor 41 is connected to a switch 42. When the switch 42 is closed, both terminals of the first capacitor 41 are connected to ground, thereby discharging the first capacitor 41. The switch 42 is controlled by a reset signal S. The first capacitor 41 represents an example of a capacitor bank. Furthermore, the relaxation oscillator of Fig. 4 has a second current source 47, which is coupled to a second capacitor 48 to charge it with the charging current Iin. The second capacitor 48 has a capacitance Cint,2, which in the embodiment of Fig. 4 is equal to the capacitance Cint,1 of the first capacitor 41 and is collectively referred to as Cint. "Equal" in the context of this application means "equal within the manufacturing tolerances". The voltage across the second capacitor 48 is denoted Vint,2. Capacitor 48 can be precharged to a reference voltage Vref via a switch 49. The switch 49 is controlled by a signal Scomp. The reference voltage Vrefist is chosen such that it lies below the voltage at which a comparator 44 actually triggers. This voltage is called the trigger voltage Vtrig. An input of the comparator 44 can be selectively connected to either a node 410, to which the voltage Vint,1 is applied, or a node 411, to which the voltage Vint,2 is applied. The comparator 44 compares the voltage supplied to it with a reference voltage and, if the reference voltage is exceeded, outputs a pulse 45 after a propagation delay. This pulse, as will be explained later, is then used by a logic 46 to generate the signals Sreset and Scomp. In operation, capacitor 41 serves as the "main capacitor" corresponding to the capacitor assembly 12, which is the usual capacitor of a relaxation oscillator and is charged by the current source 40. The second capacitor 48, together with the second current source 47, serves as a measuring device to determine a measure of the propagation delay of comparator 44, pulse 45, and logic 46. The operation of the relaxation oscillator 4 will now be explained with reference to Fig. 3. Fig. 3 shows a period of tidealde operation of the relaxation oscillator of Fig. 4 . The previously discussed curve 30, with curve segments 30A, 30B, 30C, and 30D, shows the voltage Vint,1 at node 410. A curve 31, with curve segments 31A, 31B, and 31C, shows the voltage Vint,2 at node 411. At the beginning of the period, node 411 is charged to voltage Vref by prior closing of switch 49. Voltage Vint,1 is discharged to ground potential by prior closing of switch 42, meaning the first capacitor 41 is discharged. Current source 40 generates a charging current 2Iin, and current source 47 generates a charging current Iin. Comparator 44 is connected to node 411 via switch 43. Accordingly, at the beginning of the period Tideal, the first capacitor 41 is charged with the charging current 2Iin and the second capacitor 48 with the charging current Iin. The voltage Vint,1 therefore rises according to curve 30A with a slope of 2Iin / Cintan, starting from zero, and the voltage Vint,2 rises according to curve segment 31A with a slope of Iin / Cintan starting from the voltage Vrefan. The increase in voltage Vint,2 eventually causes the comparator 44 to detect that its threshold voltage has been exceeded when the voltage Vtrig reaches its threshold. As explained above, this voltage Vtrig does not correspond to the threshold voltage supplied to the comparator 44, for example, as a reference, but is higher due to propagation delays. An output signal of the comparator 44 is represented as output voltage VCMP,out in a curve 32. When the curve 31A reaches the trigger voltage Vtrig, the pulse 45 with a pulse width Δt shown in Fig. 3 is generated. Based on pulse 45, the capacitor is discharged by closing switch 49, so that the voltage Vint,2 drops to Vrefab as shown in curve segments 31B and 31C. Furthermore, in response to pulse 45, logic 46 switches switch 43, connecting node 410 to comparator 44. At the end of the pulse, i.e., at the end of duration Δtp, the current supplied by power source 40 is also switched from 2Iin to Iin. This results in the voltage Vint,1 now increasing with the slope Iin / Cintin in the curve sections 30B and 30C, and the voltage Vint,2 falling back to the voltage Vrefab, meaning that the second capacitor 48 is ideally precharged for the next period Tideal. When the voltage Vint,1 reaches the voltage Vtriger, the comparator 44 again generates a pulse 45 of width Δtp. In response to the pulse, the switch 42 is closed to discharge the capacitor. At the end of this pulse, the Tideal period ends, and the next period begins. The time interval from the beginning of the Tideal period until the end of the first pulse of width Δtp, which is triggered after the voltage Vint,2 reaches the threshold voltage, is equal to the time interval from the moment the voltage Vint,1 reaches the voltage Vref until the end of the second pulse of width Δtp, which is triggered by the comparator 44 in response to Vint,1 reaching Vtrig. Both time intervals are labeled Δt in Fig. 3 and, as already explained, correspond to the propagation delay from reaching Vref until the end of the respective pulse of pulse duration Δtp. Since during the first time interval Δt the capacitor 41 is charged at twice the charging rate compared to the rest of the Tideal period (in this case achieved by twice the charging current), this compensates for the second time interval Δtpin of the Tideal period. In other words, the Tideal period is equal to where VC is shown in Fig.Figure 3 shows that the voltage Vint,1 is reached at the end of the first time period Δt, that is, at the end of charging with twice the charging current 2Iin. The first term on the right-hand side of equation (1) corresponds to the time of curve 30A, the second term to the duration of curve segment 30B, and the third term to the duration of curve segments 30C and 30D. On the other side, as can also be seen in Figure 3, the following applies: The period Tideal thus corresponds to a period of a relaxation oscillator in which the capacitor 41 is charged with the constant charging current I and the discharge occurs without time delay at exactly the voltage Vref. In other words, the period Tideal corresponds to the period of an "ideal" relaxation oscillator of Fig. 8, in which Δt is equal to zero and Vref is the same. Essentially, all changes in Δt, for example due to temperature-dependent changes in the propagation time of the comparator 44, changes in the pulse duration of the pulse 45, process variations, and the like, are compensated. Referring to Fig. 1, in the embodiment of Fig. 4, a measure of the propagation delay is measured by the second capacitor 48 (namely the first Δt of Fig. 3), and during this time the charging rate is doubled (here by increasing the charging current for the first capacitor 41 during the first time period Δt of Fig. 3). Besides increasing the charging current, the charging speed can also be increased, or alternatively, by reducing the capacity. Examples of reducing the capacity to increase the charging speed are explained below with reference to Figures 5 (5A and 5B) and 6. First, a possible procedure is explained with reference to Figures 5A and 5B, and then a possible circuit implementation for such a procedure is presented with reference to Figure 6. To avoid repetition, reference is also made to previously described embodiments. In the embodiment shown in Figures 5A and 5B, three capacitors 51, 52, and 53 are used. Capacitors 51 and 52 have a capacitance C, and capacitor 53 has twice this capacitance, 2C. Values ​​for C can be, for example, in the range of 100 fF to 1 pF, but are not limited to this range. The device also includes a current source 50 for generating a charging current Iin. Capacitors 51 and 52 serve as the "main capacitor" of the relaxation oscillator (essentially corresponding to the capacitor assembly 12 of Figure 1 or the capacitor 41 of Figure 4), while capacitor 53 serves to determine a measure of the propagation delay, corresponding to the capacitor 48 of Figure 4. To describe the behavior of the embodiment shown in Fig. 5A and Fig. 5B, reference is again made to Fig. 3. At the beginning of a Tideal period, capacitor 53 is pre-charged to a voltage Vref via a node 58. Capacitors 51 and 52 are pre-charged to a differential voltage of zero. This is achieved by connecting capacitors 51 and 52 in series with capacitor 53 in their discharged state, as shown in Fig. 2. This ensures that all capacitor plates of capacitors 51 and 52 are at the voltage Vref, and the voltage difference across these capacitors is zero. Then, the series-connected capacitors 51, 52, and 53 are all charged with the charging current Iin by the current source 50. The charging current Iin then charges capacitor 53 from the voltage Vref, and capacitors 51 and 52 from zero. The charging rate (slope of the voltage across each capacitor over time) for capacitor 53 is half that for capacitors 51 and 52 due to its twice-as-large capacitance (2C). This is illustrated by curves 54 for capacitors 51 and 52 and curve 55 for capacitor 53, where m is the slope, which is twice as large (2m) for curve 54 as for curve 55. The voltage at node 58, that is, the voltage at capacitor 53, is monitored by a detection device such as a comparator, and upon reaching a trigger voltage Vtrig, the configuration shown in Fig. 5B is switched. Until the trigger voltage Vtrig is reached and a subsequent reconfiguration occurs (for example, the end of a comparator pulse Δtp), the time duration Δt corresponding to the propagation delay has elapsed, and capacitors 51 and 52 have then each reached a voltage Vcer, corresponding to curve segment 30A of Fig. 3. In the configuration of Fig. 5B, the capacitor 53 is recharged to Vref by connecting it to a corresponding voltage source 57, essentially according to the curve section 31C of Fig. 3. Capacitors 51 and 52 are now connected in parallel. Thus, capacitors 51 and 52 form a total capacitance of 2C, which halves the charging rate to m, as shown by curve 56 in Fig. 5B. After the time interval Δt has elapsed, the capacitance formed by the parallel capacitors 51 and 52 is therefore the same as the capacitance of capacitor 43. This corresponds to the situation in Fig. 3 in curve sections 30B and 30C, where the charging rate is also halved compared to curve section 30A. When the trigger voltage is reached at the parallel connection of capacitors 51 and 52, they are then discharged (according to curve section 30D of Fig. 3), i.e., brought to a potential difference of zero between their plates, and in this discharged state are then connected in series with capacitor 53 as shown in Fig. 5A, and the next period begins.Thus, the basic operating principle of the embodiment shown in Fig. 5A and Fig. 5B corresponds to the operating principle of the embodiment shown in Fig. 4, with the difference that different charging currents Iin, 2Iin are not used, but rather a selective series or parallel connection of the capacitors 51, 52 in order to change the charging speed. In the embodiment shown in Figs. 5A and 5B, only a single current source 50 is required compared to the current sources 40 and 47 in Fig. 4. On the other hand, one more capacitor and corresponding switches for setting the various configurations are needed, which are not required in the embodiment shown in Fig. 4. A possible circuit-technical implementation of the embodiment shown in Fig. 5A and Fig. 5B is shown in Fig. 6. The capacitors 51, 52, 53 of Figs. 5A and 5B, as well as the node 58 and the current source 50, bear the same reference numerals as in Figs. 5A and 5B and will not be explained again. Essentially the same components as in Fig. 4 are used as the detection device and also bear the same reference numerals, namely a comparator 44 that generates a pulse 45, which is then processed by a logic unit 46. The comparator 44 can be selectively connected to either node 58 or node 67 by means of a switch 43. Switches 60, 61 and 63-66 are controlled by a signal Scomp, wherein the switches to which the signal Scomp is supplied exhibit the opposite behavior of the switches labelled Scomp as in Fig. 6. For the configuration shown in Fig. 5A, in the embodiment of Fig. 6, switches 61 and 65 are closed, and the remaining switches are open. Switch 43 connects comparator 44 to node 58. When the voltage at node 58 reaches the trigger voltage Vtrig, comparator 44 triggers pulse 45, as already explained with reference to Fig. 3, Fig. 5A, and Fig. 5B. Subsequently, switches 61 and 65 are opened, and switches 60, 63, 64, and 66 are closed. This results in the configuration shown in Fig. 5B. In this state, switch 43 connects comparator 44 to node 67. When the voltage at node 67 reaches the trigger voltage, a pulse 45 is generated again, and by closing switch 62, capacitors 51, 52 are discharged according to curve section 30B of Fig. 3.Alternatively or in addition to switch 62, switches 68A, 68B can also be provided in parallel to capacitors 51, 52 to discharge them. The circuit design shown in Fig. 6 is just one example, and other switch configurations can also be used. Furthermore, the procedures shown in Fig. 4, Fig. 5, and Fig. 6 can generally be combined; that is, to increase the charging speed, the charging current can be increased or the capacity reduced. It should be noted that, in principle, instead of a single comparator 44 with the switch 43, two separate comparators of the same design can also be used. However, using a single comparator can have the advantage that no effects occur that are based on differences between the comparators, for example, due to manufacturing tolerances. Furthermore, it should be noted that the current source 11 and capacitor assembly 12 shown in Fig. 1, current sources 40, 47 and capacitors 41, 48 in Fig. 4, as well as the current source 50 and capacitors 51-53 in Fig. 5A, Fig. 5B and Fig. 6, can also be configured as so-called Dynamic Element Matching current sources or Dynamic Element Matching capacitors. For this purpose, several current sources and capacitors are provided, which are used alternately to essentially provide an averaging effect. The number of capacitors used can be increased essentially arbitrarily.This can also offer advantages in implementations with relatively short oscillator periods and in the design of time-critical circuits, such as logic circuits. For example, if different capacitors are used alternately in successive periods, it is not necessary to complete a discharge process (curve section 30D of Fig. 3) or the charging process to the reference voltage (curve section 31C of Fig. 3) before the immediately following period, since different capacitors will then be used. Furthermore, a multiphase oscillator can be implemented using multiple capacitors that are charged at different times. Relaxation oscillators as shown can, for example, be used as current-to-frequency converters, with which an input current is "converted" into an output frequency of the relaxation oscillator. For this purpose, the charging current Iin is generated as a function of the input current, for example by means of a current mirror. To switch between Iin and 2Iin in the embodiment of Fig. 4, an adjustable current mirror can then be used accordingly. Such current-to-frequency converters can be used, for example, as analog-to-digital converters, in which the analog input current is converted into a counter value determined by counting output pulses of the oscillator, or as current-controlled oscillators, in which the output frequency of the relaxation oscillator depends on the input current.Although specific embodiments have been illustrated and described in this description, persons with ordinary technical knowledge will recognize that a multitude of alternative and / or equivalent implementations can be chosen as substitutions for the specific embodiments shown and described in this description without departing from the scope of the invention shown. It is intended that this application cover all adaptations or variations of the specific embodiments discussed herein. Therefore, it is intended that this invention is limited only by the claims and the equivalents of the claims.

Claims

Relaxation oscillator comprising: a current source (11; 40; 50) for providing a charging current, a capacitor arrangement (12; 41; 51, 52) coupled to the current source (11; 40; 50), wherein the current source is configured to charge the capacitor arrangement (12; 41; 51, 52) during an operating period (Tideal), a detection arrangement (13; 43, 44, 45, 46) configured to detect when a voltage across the capacitor arrangement (12; 41; 51, 52) reaches a threshold voltage, and to discharge the capacitor arrangement (12; 41; 51, 52) in response to reaching the threshold voltage during the operating period (Tideal), wherein the charging and discharging of the capacitor arrangement (12; 41; 51, 52) in each operating period occurs exactly once, and a measuring device (14; 47, 48; 53) is set up to provide a measure of a propagation delay of the detection device (13;43, 44, 45, 46) to measure, wherein the relaxation oscillator is configured to increase a charging rate of the capacitor device (12; 41; 51, 52) for a duration based on the measure of the propagation delay, wherein the relaxation oscillator is configured to end the operating period (Tideal) after discharging and to begin a next operating period, at the beginning of which the capacitor device (12; 41; 51, 52) is recharged.; Relaxation oscillator according to claim 1, wherein the duration corresponds to a duration (Δt) of the propagation delay, and wherein the increase in charging speed is a doubling of the charging speed. Relaxation oscillator according to claim 1 or 2, wherein the relaxation oscillator is configured to increase the charging current for the duration of the charging speed. Relaxation oscillator according to one of claims 1-3, wherein the relaxation oscillator is configured to decrease the capacitance of the capacitor arrangement (12; 51, 52) for the purpose of increasing the charging speed for a certain period of time. Relaxation oscillator according to one of claims 1-4, wherein the measuring device (14; 47, 48; 53) comprises a further capacitor device (48; 53), wherein the measuring device is configured to determine the measure based on a charging process of the further capacitor device. Relaxation oscillator according to claim 5, wherein the measuring device is configured to precharge the further capacitor device to a reference voltage (Vref) before the charging process of the further capacitor device. Relaxation oscillator according to claim 5 or 6, wherein the further capacitor arrangement (48; 53) and the capacitor arrangement (12; 51, 52) can be selectively coupled to the detection arrangement (13; 43, 44, 45, 46), wherein the measure is based on reaching the threshold voltage by a further voltage at the further capacitor arrangement (48; 53). Relaxation oscillator according to one of claims 5 or 6, wherein the further capacitor arrangement (48; 53) is coupled to a further detection arrangement which is configured to detect when a voltage across the further capacitor arrangement (48; 53) reaches a further threshold voltage, and to determine the measure based on reaching the further threshold voltage. Relaxation oscillator according to one of claims 5 - 8, wherein the measuring device comprises a further current source (47) for generating a further charging current for the further capacitor device (48). Relaxation oscillator according to one of claims 5 - 8, wherein the relaxation oscillator is configured to couple the further capacitor arrangement (53) in series with the capacitor arrangement (51, 52) for a certain period of time and to disconnect it from the capacitor arrangement (51, 52) after the period of time has elapsed. Relaxation oscillator according to claim 10, wherein a capacitance of the further capacitor arrangement (53) is equal to a capacitance of the capacitor arrangement (51, 52) outside of the time period. Relaxation oscillator according to one of claims 1 - 11, wherein the current source and / or the further current source is implemented as a Dynamic Element Matching current source and / or wherein the capacitor arrangement (51, 52) and / or the further capacitor arrangement (53) is implemented as a Dynamic Element Matching capacitor arrangement. A method for operating a relaxation oscillator, comprising: charging a capacitor device (12; 41; 51, 52) during an operating period (Tideal), determining a measure for a propagation delay of a detection device (13; 43, 44, 45, 46) of a relaxation oscillator, wherein the detection device (13; 43, 44, 45, 46) is configured to detect when a voltage across a capacitor device (12; 41; 51, 52) reaches a threshold voltage, and in response to the detection, discharging the capacitor device (12; 41; 51, 52) during the operating period (Tideal), and increasing a charging rate of the capacitor device (12; 41; 51, 52) for a duration based on the measure, and terminating the operating period (Tideal) thereafter to the discharging and beginning of the next operating period, at the beginning of which the capacitor device (12; 41; 51, 52) is recharged, whereby the charging and discharging of the capacitor device (12; 41;51, 52) occurs exactly once in each operating period.; Method according to claim 13, wherein the time period corresponds to a duration (Δt) of the propagation delay, and wherein the increase in charging speed is a doubling of the charging speed. Method according to claim 13 or 14, wherein increasing the charging speed for the duration comprises increasing the charging current. Method according to one of claims 13 - 15, wherein increasing the charging speed for the duration comprises reducing a capacitance of the capacitor device (12; 51, 52). Method according to one of claims 13 - 16, wherein the determination of the measure is based on a charging process of a further capacitor device (48, 53). Method according to claim 17, further comprising: Pre-charging the further capacitor device (48, 53) to a reference voltage (Vref) before the charging process of the further capacitor device. Method according to claim 17 or 18, further comprising: selectively coupling the further capacitor device (48; 53) and the capacitor device (12; 51, 52) with the detection device (13; 43, 44, 45, 46), wherein the measure is based on reaching the threshold voltage by a further voltage at the further capacitor device (48; 53). Method according to one of claims 17 - 19, further comprising: coupling the further capacitor device (53) in series to the capacitor device (51, 52) during the time period and, after the time period has elapsed, disconnecting the further capacitor device (53) from the capacitor device (51, 52).

Images