Circuit arrangement for providing a plurality of supply voltages

Abstract

Circuit arrangement (SA) for providing a plurality of supply voltages (Uausl to Uausn) at the output terminals respectively assigned to them from an input voltage (Uein) applied to an input terminal, with a digital interface (SPI) for receiving a serial digital control signal containing the information as to which of the supply voltages (Uausl to Uausn) is to be applied to the output terminals respectively assigned to them, with a hard-wired delay circuit (VS) which is configured, controlled by the serial digital control signal, to successively switch the supply voltages (Uausl to Uausn) to be applied to the respectively assigned output terminals to the output terminals with a respectively predetermined time delay, wherein the delay circuit (VS) is configured such thatthat it forwards the supply voltages (Uoutl to Uoutn) to a subset of the output terminals sequentially with the predetermined delay based on the information in the serial digital control signal received from the digital interface (SPI).

Description

[0001] Many devices, especially automotive control units, use circuitry that generates and regulates a variety of output voltages from a mostly regulated input voltage and provides them to output terminals. Such circuitry is typically implemented as integrated circuits, so-called ASICs (applicant-specific integrated circuits).

[0002] In automotive control units, for example, a pre-regulated input voltage derived from the battery voltage of usually 12 to 14 volts is used for the circuitry, which then provides voltages of, for example, 1.3 volts, 3.3 volts, and 5 volts at its output terminals. Individual voltage values ​​can also occur multiple times to avoid excessive load on individual outputs.

[0003] The output voltages are often switchable, wherein the circuit arrangement has a digital interface, for example an SPI interface, via which a control signal for switching one or more of the output voltages on or off can be transmitted to the circuit arrangement and received by the circuit arrangement.

[0004] In the event that all or a large number of the supply voltages are switched on at the same time, it may happen that the voltage regulator providing the input voltage to the circuit arrangement is overloaded by the inrush current that then occurs and is switched off or reset.

[0005] This can be remedied by designing this voltage regulator to be sufficiently robust, but this is complex and therefore expensive.

[0006] An alternative is to use the control signal to switch on the supply voltages only at staggered intervals, but this is problematic.

[0007] EP 2369727 A2 discloses a power supply system comprising a plurality of power blocks, each power block being configured to supply power to a respective load in response to a respective pulse width modulation (PWM) control signal, and a digital power manager configured to (1) program operating parameters and receive monitoring data of the plurality of power blocks using peripherals integrated with the digital power manager, and (2) generate the PWM control signals of all power blocks in response to the monitoring data to implement closed-loop control of the power transmitted by each of the plurality of power blocks.

[0008] US6765373B1 discloses a method and system for providing current transient control for N numbered electrical devices (N>=2), each device having an associated current transient I(n) upon switching on or off.

[0009] It is therefore the object of the invention to provide a circuit arrangement for providing a plurality of supply voltages which avoids these problems.

[0010] The object is achieved by a circuit arrangement according to claim 1. An advantageous embodiment is specified in the subclaim.

[0011] Accordingly, a circuit arrangement for providing a plurality of supply voltages at the output terminals respectively assigned to them is formed from an input voltage applied to an input terminal, with a digital interface for receiving a serial digital control signal which contains the information as to which of the supply voltages is to be applied to the output terminals respectively assigned to them, and with a hard-wired delay circuit which is set up, controlled by the serial digital control signal, to switch the supply voltages to be applied to the respectively assigned output terminals one after the other to the output terminals with a respectively predetermined time delay.

[0012] Immediately following the control signal, the first supply voltage to be switched on is switched on and subsequently, in a fixed sequence, each delayed by a predetermined period of time, the other supply voltages to be switched on are switched on to the output terminals.

[0013] The delay circuit is configured to forward the supply voltages to a subset of the output terminals sequentially with the predetermined delay based on the information in the serial digital control signal received from the digital interface.

[0014] In a preferred embodiment, the delay circuit is a digital circuit. This can be designed and implemented, for example, using a hardware description language such as VHDL.

[0015] The invention will be described in more detail below using exemplary embodiments with the aid of figures. Fig. 1 a schematic representation of a circuit arrangement according to the invention, Fig. 2 a program in VHDL for generating a digital delay circuit, Fig. 3 a status diagram of this program and Fig. 4 to 7 timing diagrams illustrating the sequential switching of the supply voltages to be switched on.

[0016] A circuit arrangement SA according to the invention is shown schematically in the Fig. 1. The circuit arrangement SA is supplied with an input voltage Uein, from which supply voltage generators VSG generate a plurality of supply voltages Uausi with i = 1 to n. These are supplied to a delay circuit VS, which in turn is connected to corresponding output terminals of the circuit arrangement SA, to which the supply voltages Uaus1 to Uausn are passed on by the delay circuit VS.

[0017] The supply voltages at the output terminals can assume different voltages, and these different voltages can also occur multiple times. For example, several 5-volt supply voltages, several 3.3-volt supply voltages, and even several 1.3-volt supply voltages can be output at the output terminals of the SA circuit.

[0018] The circuit arrangement SA also has a digital interface - in the example shown in the form of an SPI interface - which has the usual four connections to the outside and can be connected within the circuit arrangement at least to the delay circuit VS but also to other circuit components of the circuit arrangement SA, for example the supply voltage generators VSG.

[0019] A command is fed to the circuit SA via the digital interface SPI, specifying which of the supply voltages should be switched on or off. This is done with a command that is fed directly or decoded to the delay circuit VS, which then switches off the supply voltages to be switched off and, in accordance with the invention, switches on the supply voltages to be switched on one after the other, each with a predetermined time delay—for example, 1.2 ms.

[0020] What is essential for the invention is that a specific delay time is not assigned to a specific supply voltage, but rather only the supply voltages to be switched on are switched on one after the other with a delay.

[0021] The delay circuit VS is preferably implemented as a hard-wired digital circuit and can advantageously be implemented according to Fig. 2 can be defined using the hardware description language VHDS, from which it is designed in a known manner as a digital circuit using a corresponding program. Fig. Figure 2 shows an example of such a program in the VHDS description language for four supply voltages, Track1 to Track4, to be switched on. The delay should be 1.2 ms each.

[0022] The Fig. 3 shows a corresponding status diagram as is common for digital circuits.

[0023] In the Fig. 4 to 7 show four examples in which, triggered by the SPI command mentioned, which is shown in the top line, the supply voltages Track1 to Track4 or a selection of them are switched on one after the other.

[0024] In the Fig. 4 all four supply voltages Track1 to Track4 are to be switched on, whereby it can be seen that immediately after the SPI command the supply voltage Track1 is switched on, then with a delay of 1.2 ms the supply voltage Track2 and so on until the last supply voltage Track4.

[0025] In the presentation of the Fig. 5 only the supply voltages Track1, Track2 and Track4 should be switched on, whereupon shortly after the SPI command the first supply voltage Track1 is switched on and then, with a delay of 1.2 ms, the supply voltage Track3 is switched on and again, with a delay of 1.2 ms, the supply voltage Track4 is switched on.

[0026] In the presentation of the Fig. 6 only the supply voltages Track3 and Track4 are to be switched on, whereby here the supply voltage Track3 is switched on shortly after the SPI command and after a delay time of 1.2 ms the supply voltage Track4.

[0027] As a final example, the Fig. 7 the case that the supply voltages Track 2 to Track 4 are to be switched on, whereby here again after receiving and decoding the SPI command the supply voltage Track 2 is switched on immediately and then the supply voltages Track 3 and Track 4 are switched on one after the other with a delay of 1.2 ms.

[0028] According to the circuit arrangement according to the invention with a hardware implementation of a delay circuit, it is thus possible to effectively and simply prevent, by simultaneously switching supply voltages to the outputs of a circuit arrangement for providing a plurality of supply voltages, which generates this plurality of output voltages from a mostly regulated input voltage, the regulated input voltage from collapsing due to excessive loading caused by the inrush current, and the voltage regulator providing it from being switched off or reset. By staggering the switching on of the supply voltages to be switched on, this load can be distributed, so that even a less robust voltage regulator can be used for the input voltage.

Claims

[1] Circuit arrangement (SA) for providing a plurality of supply voltages (Uausl to Uausn) at the output terminals respectively assigned to them from an input voltage (Uein) applied to an input terminal, with a digital interface (SPI) for receiving a serial digital control signal containing the information as to which of the supply voltages (Uausl to Uausn) is to be applied to the output terminals respectively assigned to them, with a hard-wired delay circuit (VS) which is set up, controlled by the serial digital control signal, to switch the supply voltages (Uausl to Uausn) to be applied to the respectively assigned output terminals one after the other to the output terminals with a respectively predetermined time delay, wherein the delay circuit (VS) is configured so thatthat it forwards the supply voltages (Uoutl to Uoutn) to a subset of the output terminals sequentially with the predetermined delay based on the information in the serial digital control signal received from the digital interface (SPI). [2] Circuit arrangement according to claim 1, wherein the delay circuit (VS) is a digital circuit.

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