Display panel control circuit; display device comprising the same and method for controlling LEDs

The display panel driving circuit addresses flickering and acoustic noise in passive matrix LED displays by dynamically adjusting PWM data based on grayscale values, ensuring balanced LED operation and reducing power consumption.

DE102024139769A1Pending Publication Date: 2025-08-21LG DISPLAY CO LTD
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Patent Information

Application Number
DE102024139769
Authority / Receiving Office
DE · DE
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-02-20
Filing Date
2024-12-27
Publication Date
2025-08-21

AI Technical Summary

Technical Problem

Display devices using passive matrix LED technology experience flickering and acoustic noise due to imbalanced turn-on and turn-off durations in pulse width modulation (PWM) driving, leading to unstable load and vibration circuits.

Method used

A display panel driving circuit that modulates PWM data based on grayscale values, switching between first and second driving modes to maintain balanced turn-on and turn-off durations, using a lookup table to adjust duty ratio and voltage levels to prevent flickering and reduce acoustic noise.

Benefits of technology

The solution effectively reduces flickering and acoustic noise while minimizing power consumption by optimizing PWM data transmission and modulation.

✦ Generated by Eureka AI based on patent content.

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Abstract

A display panel drive circuit according to an embodiment and a display device including the same are disclosed. A display panel drive circuit includes a drive IC configured to supply PWM data of an input image to a plurality of data lines connected to pixels; and a drive control part configured to transmit the PWM data to the drive IC or modulate the PWM data to transmit it to the drive IC according to a result of comparing a grayscale value of the input image with a preset reference grayscale value, wherein the reference grayscale value is preset as a smallest grayscale value at which no flickering occurs.
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Description

CROSS-REFERENCE TO RELATED APPLICATION

[0001] This application claims priority to and the benefit of Korean Patent Application No. 10-2024-0024339, filed on February 20, 2024. BACKGROUND 1. Technical field

[0002] The present disclosure relates to a display panel driving circuit, a display device including the same, and an LED driving method. 2. Description of related technology

[0003] Various flat panel display devices, such as liquid crystal displays, electroluminescent displays, and the like, are known. The electroluminescent display device can display an input image by emitting light even without a backlight using light-emitting elements arranged on each pixel. The light-emitting elements of the electroluminescent display device can be divided into an organic light-emitting element and an inorganic light-emitting element according to the material of the light-emitting layer.

[0004] Recently, a display device that uses a light-emitting diode (LED), an inorganic light-emitting element, as a pixel light-emitting element has attracted attention as a next-generation display device. Because LEDs are made of inorganic materials, they do not require a separate encapsulation layer to protect organic materials from moisture, and they are more reliable and have a longer lifespan than organic light-emitting diodes (OLEDs). In addition, LEDs exhibit fast illumination speed, excellent luminous efficiency, and shock resistance. SUMMARY

[0005] There are two methods for driving the display device: an active matrix method and a passive matrix method. Since a passive matrix display device is self-luminous through current drive, it does not require a backlight that emits light from the back, which can reduce power consumption.

[0006] In the passive matrix LED display device, a plurality of LEDs may be arranged in a predetermined array. A plurality of LEDs arranged in the LED display device may be driven using pulse width modulation (PWM) data. However, when the LED drive is controlled using PWM data, a phenomenon such as black floating may occur, such as the luminance floating at a low gray level. The off-duty time becomes longer compared to the on-duty time of the PWM data, and thus, problems such as flickering or acoustic noise may occur.Namely, if the off-time is longer than the on-time, not only will flicker occur, but a load of an oscillation circuit within the controller of the LED display device will become unstable, causing the representative coil L and the representative capacitance C constituting the circuit to physically vibrate, thereby generating acoustic noise.

[0007] The present disclosure solves, among other things, all of the problems described above.

[0008] The present disclosure provides a display panel driving circuit and a display device including the same.

[0009] It should be noted that features of the present disclosure are not limited to those described above, and other features and characteristics of the present disclosure will become apparent to those skilled in the art from the following descriptions.

[0010] The above-mentioned problems are solved by the features of the independent claims. Advantageous embodiments can be derived from the respective dependent claims.

[0011] A display panel driving circuit according to embodiments of the present disclosure may include a driving IC configured to supply PWM data of an input image to a plurality of data lines connected to pixels; and a driving control part configured to transmit the PWM data to the driving IC or modulate the PWM data to be transmitted to the driving IC according to a result of comparing a grayscale value of the input image with a preset reference grayscale value, wherein the reference grayscale value is preset as a smallest grayscale value at which no flickering occurs.

[0012] Here, PWM data can be transmitted to the control IC in a first control mode.

[0013] Here, modulated PWM data can be transmitted to the control IC in a second control mode.

[0014] The selection of the first control mode or the second control mode may be made according to a comparison, namely a check of whether a grayscale value of the stored PWM data is equal to or greater than a preset reference grayscale value.

[0015] The drive control part may be configured to modulate the PWM data in response to the grayscale value of the input image being smaller than the reference grayscale value.

[0016] The drive control part may be configured to modulate at least one of a voltage level or a duty cycle of the PWM data.

[0017] The drive control part may be configured to modulate the duty cycle of the PWM data using a pre-stored lookup table.

[0018] The drive control part may be configured to modulate the voltage level of the modulated PWM data using a preset voltage value.A display device according to embodiments of the present disclosure may include a pixel array including a plurality of data lines, a plurality of scanning lines, and pixels; a line selection part configured to supply a drive voltage to the plurality of scanning lines; a drive IC configured to supply PWM data of an input image to the plurality of data lines; and a drive control part configured to transmit the PWM data to the drive IC or modulate the PWM data to transmit it to the drive IC according to a result of comparing a grayscale value of the input image with a preset reference grayscale value, wherein the reference grayscale value is preset as a smallest grayscale value at which no flickering occurs.

[0019] The drive control part may be configured to modulate the PWM data in response to the grayscale value of the input image being smaller than the reference grayscale value.

[0020] The control section is configured to modulate at least one of a voltage level or a duty cycle of the PWM data. The duty cycle of PWM data is the ratio between the on and off durations within one period of the PWM data.

[0021] The drive control part may be configured to modulate the duty cycle of the PWM data using a pre-stored lookup table.

[0022] The drive control part may be configured to modulate the voltage level of the modulated PWM data using a preset voltage value.

[0023] Each of the plurality of pixels may include at least one light-emitting element.

[0024] An anode electrode of the light-emitting element may be connected to a scanning line.

[0025] A cathode electrode of the light-emitting element may be connected to a data line.

[0026] The line selection part may include a plurality of selection switch elements connected to each of the plurality of scan lines.

[0027] The selection switch element may include a gate electrode connected to receive a line selection signal from the drive control part, a first electrode connected to a power line to which the drive voltage is applied, and a second electrode connected to the scan line.

[0028] A timing controller of the display device may be configured to control the operation timing of the line selection part and the drive IC, wherein the drive control part may be arranged within the timing controller.

[0029] An LED driving method according to embodiments of the present disclosure may include the steps of: receiving, by a drive control part of a display panel drive circuit, PWM data from an external system or a timing controller; storing, in a line memory, the received PWM data; checking, by the drive control part, whether a grayscale value of the stored PWM data is equal to or greater than a preset reference grayscale value; activating, by the drive control part, a first drive mode for driving LEDs using the PWM data when the grayscale value of the stored PWM data is equal to or greater than the preset reference grayscale value; arranging, by the drive control part, the PWM data stored according to the activated first drive mode in data units for providing to each of a plurality of drive ICs of the display panel drive circuit and storing the same in the line memory;Converting, by the drive control part, the arranged PWM data according to a serial peripheral interface (SPI) protocol, and transmitting, by the drive control part, the converted PWM data to each drive IC; activating, by the drive control part, a second drive mode for driving LEDs using the PWM data when the grayscale value of the stored PWM data is smaller than the preset reference grayscale value; primarily modulating, by the drive control part, the received PWM data using a preset look-up table (LUT) based on the grayscale value of the PWM data according to the activated second drive mode; arranging, by the drive control part, the primarily modulated PWM data into data units for providing to each of a plurality of drive ICs of the display panel drive circuit and storing them in the line memory;Modulating, by the drive control part, the primary modulated PWM data using a preset voltage value; and converting, by the drive control part, the secondary modulated PWM data or PAM data according to the SPI protocol and transmitting the converted PWM data to each drive IC.;

[0030] The reference grayscale value can be a grayscale value for distinguishing the first drive mode from the second drive mode. It can be set to a minimum grayscale value at which no flickering or acoustic noise occurs.

[0031] Flicker is a phenomenon in which the intensity of light emitted by the display panel is not constant and changes periodically over time and refers to a phenomenon in which a user feels the flickering of a screen.

[0032] The grayscale value typically ranges from 0 (which is considered "black") to 255 (which is considered "white").

[0033] The present disclosure can achieve a target luminance at a low gray level by outputting PWM data with a predetermined duty cycle or by modulating the voltage level and duty cycle of the PWM data to output modulated PWM data according to the gray level value of the input image.

[0034] In the present disclosure, flickering can be improved and acoustic noise can be reduced. This is because the drive control part of a display panel drive circuit outputs PWM data with a predetermined duty cycle or modulates the voltage level and duty cycle of the PWM data to output modulated PWM data according to the grayscale value of the input image.

[0035] Since power consumption can be reduced, low power driving may be possible in the present disclosure.

[0036] The effects of the present specification are not limited to the above-mentioned effects, and other effects not mentioned will be obviously understood by those skilled in the art from the following description and the appended claims. BRIEF DESCRIPTION OF THE DIFFERENT VIEWS OF THE DRAWINGS

[0037] The above and other objects, features and advantages of the present disclosure will become more apparent to those skilled in the art by describing exemplary embodiments thereof in detail with reference to the accompanying drawings, in which: Fig. 1 is a block diagram illustrating a display device according to an embodiment of the present disclosure; Fig. 2A to Fig. 2B are diagrams showing an arrangement of the Fig. 1 illustrated drive control part; Fig. 3 is a diagram illustrating a waveform of a line selection signal applied to a Fig. 1 illustrated scanning line is applied; Fig. 4 is a diagram illustrating an LED driving method according to an embodiment of the present disclosure; Fig. 5 is a diagram for explaining a principle of generating a reference gray level value, a voltage level, and a look-up table; and Fig. 6 is a diagram illustrating a result of generating acoustic noise according to a comparative example and an embodiment. DETAILED DESCRIPTION

[0038] Advantages and features of the present disclosure and methods for achieving the same will become apparent by reference to exemplary embodiments described in detail in conjunction with the accompanying drawings. However, the present disclosure is not limited to the embodiments described below and may be embodied in various forms. The embodiments are provided only to fully disclose the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art, and the scope of the present disclosure includes that of the claims.

[0039] Since the shapes, sizes, proportions, angles, numbers, and the like disclosed in the drawings for describing the embodiments of the present disclosure are only examples, the present disclosure is not limited to the illustrated items. The same reference numerals indicate the same components throughout the specification. Furthermore, when describing the present disclosure, if it is determined that a detailed description of related prior art technology may unnecessarily obscure the gist of the present disclosure, the detailed description thereof will be omitted.

[0040] When "including," "comprising," "consisting," and the like mentioned in this specification are used, other parts may be added unless "only" is used. A case where a component is expressed in a singular form includes a plural form unless expressly stated otherwise.

[0041] When interpreting the components, it is understood that an error range is included, even if there is no separate explicit description.

[0042] In the case of a description of a positional relationship, for example, when the positional relationship of two parts is described as "on", "at an upper portion", "at a lower portion", "next to", and the like, one or more other parts may be located between the two parts unless "immediately" or "directly" is used.

[0043] Although first, second, and the like are used to describe various components, these components are not limited by these terms. These terms are used only to distinguish one component from another. Accordingly, a first component mentioned below may also be a second component within the technical scope of the present disclosure.

[0044] The same reference numerals may refer to substantially the same elements throughout this disclosure.

[0045] The following embodiments may be partially or completely connected or combined with each other and may be linked and operated in technically different ways. The embodiments may be implemented independently of each other or in conjunction with each other.

[0046] Hereinafter, various embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0047] In a display device of the present disclosure, the pixel circuit and the gate drive circuit may include a plurality of transistors. Transistors may be implemented as oxide thin-film transistors (oxide TFTs) including an oxide semiconductor, low-temperature polysilicon TFTs (LTPS TFTs) including low-temperature polysilicon, or the like.

[0048] A transistor is a three-electrode device that includes a gate, a source, and a drain. The source is an electrode that supplies charge carriers to the transistor. In the transistor, charge carriers begin to flow from the source. The drain is an electrode through which charge carriers exit the transistor. In a transistor, charge carriers flow from a source to a drain. In the case of an n-channel transistor, since charge carriers are electrons, a source voltage is a voltage lower than a drain voltage, allowing electrons to flow from a source to a drain. The n-channel transistor has a direction of current flowing from the drain to the source. In the case of a p-channel transistor (p-channel metal-oxide-semiconductor (PMOS), since charge carriers are holes, a source voltage is higher than a drain voltage, allowing holes to flow from a source to a drain.In the p-channel transistor, since holes flow from the source to the drain, a current flows from the source to the drain. Note that a source and a drain of a transistor are not fixed. For example, a source and a drain can be changed according to an applied voltage. Therefore, the disclosure is not limited to a source and a drain of a transistor. In the following description, a source and a drain of a transistor are referred to as a first electrode and a second electrode.

[0049] A gate signal oscillates between a gate-on voltage and a gate-off voltage. The gate-on voltage is set to a voltage higher than a transistor's threshold voltage, and the gate-off voltage is set to a voltage lower than the transistor's threshold voltage.

[0050] The transistor is turned on in response to the gate on voltage and turned off in response to the gate off voltage. In the case of the n-channel transistor, a gate on voltage can be a gate high voltage, and a gate off voltage can be a gate low voltage. In the case of the p-channel transistor, a gate on voltage can be a gate low voltage, and a gate off voltage can be a gate high voltage.

[0051] Fig. 1 is a block diagram illustrating a display device according to an embodiment of the present disclosure, Fig. 2A to Fig. 2B are diagrams showing an arrangement of the Fig. 1 shown drive control part, and Fig. 3 is a diagram illustrating a waveform of a line selection signal applied to a Fig. 1 illustrated scan line is applied.

[0052] With reference to Fig. 1, a display device according to an embodiment of the present disclosure includes a display panel 100, a display panel drive circuit for writing pixel data to pixels of the display panel 100, and pixels P.

[0053] The substrate of the display panel 100 may be, but is not limited to, a plastic substrate, a thin glass substrate, or a metal substrate. The display panel 100 may be, but is not limited to, a rectangular structured panel having a length in an X-axis direction (or a first direction), a width in a Y-axis direction (or a second direction), and a thickness in a Z-axis direction (or a third direction). For example, at least a portion of the display panel 100 may have a curved outer portion.

[0054] The display panel 100 can be implemented as a non-transparent display panel or a transmissive display panel. The transmissive display panel can be applied to a transparent display device in which an image is displayed on a screen and an actual object is visible beyond the display panel. The display panel 100 can be manufactured as a flexible display panel. Furthermore, the display panel 100 can be manufactured as a stretchable panel that is stretchable.

[0055] The display panel 100 includes a pixel array that displays an input image. The pixel array includes a plurality of data lines DL, a plurality of scan lines SL that intersect the data lines DL, and pixels P arranged in a matrix form. For example, a pixel P may be arranged at each intersection of a data line DL and a scan line SL.

[0056] The pixels P can be divided into a red pixel, a green pixel, and a blue pixel for color implementation. At least one light-emitting element (LED) can be arranged in each of the pixels P.

[0057] The LED light-emitting element may include an anode electrode, a cathode electrode, and a light-emitting layer. The LED light-emitting element may be a light-emitting element such as, but is not limited to, an OLED, a mini-LED, a micro-LED, etc. In the case of a mini-LED or a micro-LED, it may be a vertical structure in which electrodes are arranged above and below a semiconductor chip into which the light-emitting element is integrated, but is not limited to this. The semiconductor chip into which the light-emitting element is integrated may be implemented in a lateral structure or a flip-chip structure.

[0058] A plurality of scan lines SL may be connected to an anode electrode of the LED, and a plurality of data lines DL may be connected to a cathode electrode of the LED.

[0059] The pixel array includes a plurality of pixel lines. Each of the pixel lines includes a row of pixels arranged along the row direction (X-axis direction) in the pixel array of the display panel 100. Pixels arranged in a pixel row may share the scanning line SL. Pixels arranged in the column direction (Y-axis direction) along the data row direction may share the same data line DL. One horizontal period is the time obtained by dividing one frame period by the total number of pixel lines.

[0060] The display panel 100 according to the embodiment may be implemented in a passive matrix (PM) method so that the LED can be controlled for each scanning line, but is not necessarily limited to this, and the LED may be individually controlled by being implemented in an active matrix (AM) method.

[0061] Timing controller 130 can receive PWM data, which is image data, from the host system and supply the input PWM data to the display panel drive circuit. Timing controller 130 can control the operating timing of the display panel drive circuit.

[0062] The display panel drive circuit writes pixel data of the input image into pixels of the display panel 100 under the control of the timing controller 130. The display panel drive circuit may include a drive control part 112, a drive integrated circuit (IC) 114, and a line selection part 116.

[0063] The drive control part 112 may receive PWM data, which is an input image, from the host system 200 or the timing controller 130, select the first drive mode or the second drive mode according to the grayscale value of the received PWM data, and output the PWM data as it is, or modulate the duty cycle and voltage level of PWM data by a predetermined amount and then output the same, according to the selected result.

[0064] As an example, the drive control part 112 may select a first drive mode when the grayscale value of the PWM data is equal to or greater than a predetermined reference grayscale value, and may select a second drive mode if not.

[0065] As another example, the drive control part 112 may output received PWM data as it is according to the selected first drive mode, and may convert and output the duty ratio and voltage level of PWM data according to the selected second drive mode.

[0066] The drive control part 112 can control the driving of a plurality of LEDs by transmitting PWM data or modulated PWM data. The drive control part 112 can control the duty cycle and voltage level of PWM data by controlling the timing or intensity of the drive current transmitted to a plurality of LEDs.

[0067] The LED can be driven by pulse width modulation (PWM), and the brightness can be determined according to a ratio of an on-time (also called duty cycle) to a PWM control time. When the light-emitting element is turned on by the drive current, a forward voltage can be generated in the light-emitting element. The product of the forward voltage and the drive current, when accumulated over the on-time within the PWM control time, becomes the amount of drive power supplied to the light-emitting element, and the brightness of the light-emitting element can be determined according to the amount of drive power.Assuming that the magnitude of the forward voltage and the drive current of the light-emitting element is a fixed variable, the amount of drive power can be regarded as a value proportional to the turn-on time in the PWM control time, and according to this principle, the drive control part 112 can control the brightness of the LED and the brightness of the pixel P by controlling the turn-on time in the PWM control time.

[0068] The drive control part 112 may be arranged within the time control 130, as shown in Fig. 2A, or may be physically separated from the timing controller 130, as shown in Fig. 2B. The exemplary configuration may vary depending on the product. In one embodiment, the drive control part 112 is configured separately from the timing controller 130 and can control operations of a plurality of LEDs based on PWM data received from the timing controller 130.

[0069] The line selection part 116 may include a plurality of selection switch elements SW. The line selector switches the lines on sequentially.

[0070] A plurality of select switch elements SW may be arranged at one end of each of the scanning lines SL. The select switch element SW may be turned on or off by the line selection signal SEL applied from the drive control part 112. The select switch element SW includes a first electrode connected to a power line to which a drive voltage VLED is applied, a gate electrode to which a line selection signal SEL is applied from the drive control part 112, and a second electrode connected to the scanning line. A plurality of select switch elements SW may be time-divided and sequentially turned on for each frame.

[0071] The select switch element SW may be implemented as an N-channel TFT, but may be implemented as a P-channel TFT if necessary. When the select switch element SW is implemented as a P-channel TFT, an inverter may be connected to a gate electrode to which a line selection signal is applied.

[0072] As in Fig. 3, the selection switch element SW can be sequentially turned on by the line selection signals SEL[1] to SEL[n] to supply a drive voltage VLED to the corresponding scanning line.

[0073] When the select switch element SW is turned on, a drive current flows through the corresponding scan line, allowing all of the plurality of LEDs connected to the corresponding scan line to emit light. The selection made at the drive control part 112 allows the select switch elements SW to be turned on by the corresponding line selection signal, and the drive voltage VLED is applied to the scan line.

[0074] The drive IC 114 may receive PWM data or modulated PWM data from the drive control part 112 and supply the received PWM data or modulated PWM data to the data line DL. The drive IC 114 may include a plurality of drive ICs DIC1 to DICn. Each of the plurality of drive ICs DIC1 to DICn may be connected to the plurality of data lines DL. Each of the plurality of drive ICs DIC1 to DICn may receive clock signals SCLK from the drive control part 112 and supply PWM data or modulated PWM data to the plurality of data lines according to the received clock signals SCLK.

[0075] The plurality of control ICs DIC1 to DICn may be electrically connected to each other to transmit clock signals or PWM data via SIN and SOUT terminals, as shown in Fig. 1 shown.

[0076] For example, the PWM data can be input to the input terminal SIN of the first drive IC DIC1 and transmitted through the output terminal SOUT of the first drive IC DIC1 to the input terminal SIN of the next drive IC. The number of DICs is not limiting.

[0077] As another example, the clock signal SCLK may be transmitted to each of the plurality of drive ICs DIC1 to DICn.

[0078] The host system 200 may scale the image signal from the video source to match the resolution of the display panel 100 and transmit it along with the time signal to the timing controller 130.

[0079] The host system may be any of a television system (TV system), a set-top box, a navigation system, a personal computer (PC), a home theater system, a vehicle system, and a mobile device system.

[0080] Fig. 4 is a diagram illustrating an LED driving method according to an embodiment of the present disclosure.

[0081] With reference to Fig. 4, the drive control part according to an embodiment of the present disclosure may receive PWM data, which is pixel data of an input image, from an external system or a timing controller (S400) and store the received PWM data in a line memory (S410).

[0082] Next, the drive control part may check whether a grayscale value of the stored PWM data is equal to or greater than a preset reference grayscale value (S420). If the grayscale value of the stored PWM data is equal to or greater than the preset reference grayscale value, the drive control part may activate the first drive mode (S430). Here, the first drive mode may be a mode for driving the LED using PWM data.

[0083] In this disclosure, the reference grayscale value is a grayscale value for distinguishing the first drive mode and the second drive mode, and can be set to a minimum grayscale value at which flickering does not occur. Flicker is a phenomenon in which the intensity of light emitted by the display panel is not constant and changes periodically over time, and refers to a phenomenon in which a user feels the flickering of a screen.

[0084] Next, the drive control part may arrange the PWM data stored according to the activated first drive mode in data units to provide each of the plurality of drive ICs and store them in the line memory (S432).

[0085] Next, the drive control part may convert the arranged PWM data according to a serial peripheral interface (SPI) protocol and transmit the converted PWM data to each drive IC (S434).

[0086] Conversely, if the grayscale value of the stored PWM data is smaller than the preset reference grayscale value, the drive control part can activate the second drive mode (S440). Here, the second drive mode can be a mode for driving the LED using the modulated PWM data.

[0087] Next, the drive control part may primarily modulate the received PWM data using a preset lookup table (LUT) based on the grayscale value of the PWM data according to the enabled second drive mode (S442). For example, the drive control part may modulate the duty cycle of PWM data according to the grayscale value of PWM data using the preset lookup table.

[0088] Next, the drive control part may arrange the primary modulated PWM data in data units to provide each of the plurality of drive ICs and store them in the line memory (S444).

[0089] Next, the drive control part may secondarily modulate the primary modulated PWM data using a preset voltage value (S446).

[0090] Next, the drive control part may convert the secondary modulated PWM data or PAM data according to the serial peripheral interface (SPI) protocol and transmit the converted PWM data to each drive IC (S448).

[0091] Fig. 5 is a diagram for explaining a principle of generating a reference gray level value, a voltage level, and a look-up table.

[0092] With reference to Fig. 5, when the PWM data, which is gray-level-specific pixel data, is received (S510), the measuring device according to an embodiment of the present disclosure may detect a flicker generation point or a flicker generation gray-level value by analyzing the received PWM data (S520). Here, the gray-level-specific PWM data may include the PWM data from a first gray level Gray_1 to a reference gray level Gray_Bias.

[0093] Next, if the flicker is not detected, the measuring device can determine normal driving (S522).

[0094] Conversely, if flickering is detected, the measuring device can increase the reference grayscale bias value by a certain amount (S530). For example, the measuring device can increase the reference grayscale value by 1.

[0095] For example, if the flicker generation grayscale value is Gray_60, the reference grayscale value is Gray_61. Thus, increasing the grayscale value by 1 may mean incrementing the grayscale value. However, other grayscale increment steps may alternatively be used.

[0096] The grayscale value typically ranges from 0 (which means black) to 255 (which means white).

[0097] Next, the measuring device may reduce the voltage level Vpam of the PWM data by a certain amount (S540) and check whether the PWM data with the reduced voltage level satisfies the luminance at the lowest gray level, i.e., the luminance at the first gray level G1 (S550). For example, the measuring device may reduce the voltage level of the PWM data by 1 V. Here, satisfying the luminance at the first gray level means satisfying a predetermined luminance range at the first gray level.

[0098] For example, if the voltage level of the PWM data is 10 V, the voltage level is reduced by 1 to become 9 V. Thus, reducing the voltage level by 1 may mean decrementing the voltage level value by 1 volt. However, other voltage level reduction steps may alternatively be applied.

[0099] Next, if the PWM data with the reduced voltage level does not meet the luminance of the first gray level, the measuring device may reduce the duty cycle of the PWM data by a predetermined amount (S552). For example, the measuring device may reduce the duty cycle of the PWM data by 10%.

[0100] On the other hand, if the PWM data with the reduced voltage level satisfies the luminance of the first gray level, the measuring device can detect the flicker generation point by analyzing the PWM data with the reduced voltage level (S560).

[0101] Next, when the flicker is detected, the measuring device may repeatedly perform the process of reducing the voltage level Vpam of the PWM data by one.

[0102] On the other hand, if flicker is not detected, the measuring device can generate a lookup table to compensate for the luminance (S570). Here, the lookup table, LUT, can contain the duty cycle for each luminance.

[0103] In one embodiment, by modulating the PWM data using this generated lookup table, a target luminance at a low gray level can be achieved, as well as flickering can be improved (the flickering phenomenon can be reduced).

[0104] Fig. 6 is a diagram illustrating a result of generating acoustic noise according to a comparative example and an embodiment.

[0105] With reference to Fig.6, when the duty cycle of the PWM data is 100%, it can be seen that the acoustic noise corresponding to frequencies f1 to f5 is significantly reduced in the embodiment compared to a comparative example. Here, the frequencies can be higher frequencies on the order of f1, f2, f3, f4, and f5.

[0106] Furthermore, it was confirmed that even when the duty cycle of the PWM data was reduced in the order of 80%, 60%, 40%, and 20%, the acoustic noise according to the frequency was significantly reduced in the embodiment compared to the comparative example.

[0107] If the off time is longer than the on time, acoustic noise will occur along with flickering, as explained above. If the acoustic noise is improved, the flickering can also be improved.

[0108] If the off time is longer than the on time, acoustic noise occurs along with flickering. Improving the acoustic noise can also improve the flickering.

[0109] The embodiments of the present disclosure have been described in more detail with reference to the accompanying drawings. The embodiments disclosed in the present disclosure are provided for illustrative purposes and are not intended to limit the technical concept or scope of the present disclosure.

[0110] The various embodiments described above may be combined to provide further embodiments. Aspects of the embodiments may be modified, if necessary, to incorporate concepts from the various embodiments to provide yet further embodiments.

[0111] These and other changes may be made to the embodiments in light of the above detailed description. QUOTES CONTAINED IN THE DESCRIPTION

[0000] This list of documents submitted by the applicant was generated automatically and is included solely for the convenience of the reader. This list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions. Cited patent literature

[0000] KR 10-2024-0024339

[0001]

Claims

[1] Display panel control circuit comprising: a drive IC (114) configured to supply PWM data of an input image to a plurality of data lines (DL) connected to pixels (P); and a drive control part (112) configured to transmit the PWM data to the drive IC (114) in a first drive mode (S434) or to modulate the PWM data to transmit it to the drive IC (114) in a second drive mode (S448), wherein the selection of the drive mode is made according to a result of comparing (S420) a grayscale value of the input image with a preset reference grayscale value, where the reference grayscale value is preset as a smallest grayscale value at which no flickering occurs. [2] A display panel drive circuit according to claim 1, wherein the drive control part (112) is arranged to modulate the PWM data in response to the gray scale value of the input image being smaller than the reference gray scale value. [3] A display panel drive circuit according to claim 1 or 2, wherein the drive control part (112) is arranged to modulate at least one of a voltage level or a duty cycle of the PWM data. [4] A display panel drive circuit according to claim 3, wherein the drive control part (112) is arranged to modulate the duty cycle of the PWM data using a pre-stored look-up table. [5] A display panel drive circuit according to claim 3 or 4, wherein the drive control part (112) is arranged to modulate the voltage level of the modulated PWM data using a preset voltage value. [6] Display device comprising a pixel array including a plurality of data lines (DL), a plurality of scanning lines (SL) and a plurality of pixels (P), a line selection part (116) configured to supply a drive voltage to the plurality of scanning lines (SL), and a display panel drive circuit according to any one of the preceding claims. [7] A display device according to claim 6, wherein: each of the plurality of pixels (P) includes at least one light-emitting element (LED), wherein an anode electrode of the light-emitting element (LED) is connected to a scanning line (SL), and wherein a cathode electrode of the light-emitting element (LED) is connected to a data line (DL). [8] Display device according to one of the preceding claims 6 or 7, wherein: the line selection part (116) includes a plurality of selection switch elements (SW) connected to each of the plurality of scanning lines (SL), and the selection switch element (SW) includes a gate electrode connected to receive a line selection signal (SEL) from the drive control part (112), a first electrode connected to a power line (VLED) to which the drive voltage is applied, and a second electrode connected to the scan line (SL). [9] Display device according to one of the preceding claims 6 to 8, further comprising: a timing controller (130) configured to control the operating timing of the line selection part (116) and the control IC (112), wherein the control part (112) is arranged within the time control (130). [10] LED control method comprising the following steps: Receiving (S400) PWM data from an external system or a timing controller (130) from a drive control part (112) of a display panel drive circuit according to one of claims 1 to 5; Storing (S410) the received PWM data in a line memory; Checking (S420) by the drive control part (112) whether a grayscale value of the stored PWM data is equal to or greater than a preset reference grayscale value; Activating (S430) by the drive control part (112) a first drive mode for driving an LED using the PWM data when the grayscale value of the stored PWM data is equal to or greater than the preset reference grayscale value; Arranging (S432) by the drive control part (112) the PWM data stored according to the activated first drive mode in data units to provide each of a plurality of drive ICs (114) of the display panel drive circuit and storing them in the line memory; Converting, by the drive control part (112), the arranged PWM data according to a protocol of a serial peripheral interface, SPI, and transmitting (S434), by the drive control part (112), the converted PWM data to each drive IC; activating (S440) by the drive control part (112) a second drive mode for driving an LED using the PWM data when the grayscale value of the stored PWM data is smaller than the preset reference grayscale value; primary modulation (S442) by the drive control part (112) of the received PWM data using a preset look-up table, LUT, based on the grayscale value of the PWM data according to the activated second drive mode; Arranging (S444) by the drive control part (112) the primary modulated PWM data in data units to provide each of a plurality of drive ICs (114) of the display panel drive circuit and storing them in the line memory; Modulating (S446) by the drive control part (112) the primary modulated PWM data using a preset voltage value; and Converting (S448) by the drive control part (112) the secondary modulated PWM data or PAM data according to the SPI protocol and transmitting the converted PWM data to each drive IC (114).

Citation Information

Patent Citations

  • KOREANISCHENPATENTANMELDUNGNR.10-2024-0024339