WIRELESS POWER SYSTEMS WITH AMPLITUDE SWITCHING COMMUNICATION
By incorporating ASK communication reception logic that accounts for modulation signal information in wireless charging systems, the system addresses bit error issues caused by dithering, enhancing the accuracy of data transmission during wireless power transfer.
Patent Information
- Application Number
- DE112023002276
- Authority / Receiving Office
- DE · DE
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-01-27
- Filing Date
- 2023-04-20
- Publication Date
- 2025-03-13
AI Technical Summary
Existing wireless charging systems face challenges in reducing bit errors in ASK decoding due to dithering techniques used in clock signals, which disrupt the periodic nature of the underlying transmission waveform.
The implementation of amplitude shift keying (ASK) communication reception logic that receives information about the modulation signal used for dithering, allowing for synchronization of downward conversion with the dithering of wireless performance signals, thereby reducing bit errors.
This approach effectively reduces bit errors in ASK decoding by accounting for the dithering pattern, ensuring more accurate data transmission during wireless power transfer.
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Abstract
Description
[0001] This application claims priority over U.S. Patent Application No. 18 / 160,532, filed on January 27, 2023, and U.S. Preliminary Patent Application No. 63 / 342,457, filed on May 16, 2022, which are hereby incorporated herein in their entirety by reference. AREA
[0002] This generally refers to power systems and, in particular, to wireless power systems for charging electronic devices. STATE OF THE ART
[0003] In a wireless charging system, a wireless power transfer device transmits wireless power to a wireless power receiving device. The wireless power transfer device uses a wireless power transfer coil to transmit wireless power signals to the wireless power receiving device. The wireless power receiving device has a coil and rectifier switching logic. The coil of the wireless power receiving device receives wireless AC power signals from the wireless power transfer device. The rectifier switching logic converts the received signals into DC power. SUMMARY
[0004] A wireless power transmission device can be configured to provide wireless power to a wireless power receiving device. The wireless power transmission device can include a wireless power transmission coil, an inverter configured to supply AC drive signals to the wireless power transmission coil, an inverter controller configured to supply control signals to the inverter based on a clock signal dithered using a modulation signal, and amplitude-shift keying (ASK) communication receiving switching logic configured to monitor AC signals at the wireless power transmission coil, at least partially, based on information regarding the modulation signal, and to decode the monitored AC signals into bits. BRIEF DESCRIPTION OF THE DRAWINGS Fig. Figure 1 is a schematic diagram of an illustrative wireless power system according to various embodiments. Fig. Figure 2 is a circuit diagram of an illustrative wireless power system with dither switching logic, which, according to one embodiment, provides a modulation signal to scaling switching logic. Fig. Figure 3 is a graph of an illustrative modulation signal that, according to one embodiment, can be used to modulate a clock signal in a power transmission device. Fig. Figure 4A is a graph of an illustrative modulation signal which, according to one embodiment, has a regular step shape. Fig. Figure 4B is a graph of an illustrative modulation signal which, according to one embodiment, has an irregular step shape. Fig. 5A to 5D are illustrative formulas relating to the down-conversion of wireless power signals in a wireless power transmission device according to one embodiment. Fig. Figure 6 is a circuit diagram of an illustrative wireless power system with clock modulation switching logic according to various embodiments. Fig. Figure 7 is a circuit diagram of an illustrative exemplary wireless power system with dither switching logic which, according to one embodiment, provides a modulation signal to an ADC. Fig. Figure 8 is a circuit diagram of an illustrative wireless power system with dither switching logic, which, according to one embodiment, provides a modulation signal to notch filter switching logic. Fig. Figure 9 is a flowchart illustrating processes according to an embodiment that are involved when using a wireless power system. Fig. 10A and Fig. Figure 10B are schematic diagrams of an illustrative down-conversion switching logic which, according to one embodiment, may be included in a wireless power system. DETAILED DESCRIPTION
[0005] A wireless power system includes a wireless power transmission device. The wireless power transmission device wirelessly transmits power to a wireless power receiving device. The wireless power transmission device can be a charging disc, a charging mat, a portable electronic device with power transmission capabilities, a removable battery pack with power transmission capabilities, or any other power transmitter. The wireless power receiving device can be a device such as a mobile phone, a tablet computer, a laptop computer, a removable battery pack, an accessory to an electronic device, a wearable item such as a wristwatch, or any other electronic equipment. The wireless power receiving device uses power from the wireless power transmission device to power the receiving device and to charge an internal battery.
[0006] Wireless power is transferred from the wireless power transmission device to the wireless power receiving device by using an inverter in the wireless power transmission device to drive current through one or more wireless power transmission coils. The wireless power receiving device has one or more wireless power receiving coils coupled to a rectifier switching logic that converts received wireless power signals into DC power.
[0007] The wireless power receiving device may include amplitude-shift keying (ASK) communication switching logic. The ASK communication switching logic may be configured to modulate the impedance of the wireless power receiving switching logic within the wireless power receiving device, thereby changing the amplitude of the wireless power transmission signal transmitted between the wireless power transmission and receiving devices. The wireless power transmission device may include ASK decoding switching logic configured to decode the signals through the coil into bits.
[0008] In some wireless power systems, a clock signal used by an inverter controller to generate control signals for an inverter can be dithered using a modulation signal. The frequency of the wireless power signal (e.g., a square wave, a sine wave, or another periodic waveform) coming from the inverter is shifted by this dithering process. The dithered waveform can provide advantages such as a reduction in peak amplitude at various frequencies of interest (e.g., harmonics). Exemplary techniques for dithering wireless power signals in wireless power transmission systems are described in U.S. Patent Application No. 17 / 680,463, filed on February 25, 2022, which is hereby incorporated by reference in its entirety.
[0009] However, dithering techniques present challenges for ASK communication because the underlying transmission waveform can no longer be assumed to be purely periodic. To reduce bit errors in ASK decoding caused by clock signal dithering in wireless power transmission, the ASK communication receive switching logic in the wireless power transmission device can receive information about the modulation signal used to dither the clock signal. The ASK communication receive switching logic can receive a clock signal that has been dithered using the modulation signal, the ASK communication receive switching logic can dither a sampling rate of the analog-to-digital converter using the modulation signal, or the ASK communication receive switching logic can include notch filter switching logic with parameters determined based on the modulation signal.
[0010] An illustrative wireless power system (wireless charging system) is shown in Fig. 1 shown. As in Fig. As shown in Figure 1, the wireless power system 8 includes a wireless power transmission device, such as a wireless power transmission device 12, and a wireless power receiving device, such as a wireless power receiving device 24. The wireless power transmission device 12 includes a control switching logic 16. The wireless power receiving device 24 includes a control switching logic 30. The control switching logic in system 8, such as the control switching logic 16 and the control switching logic 30, is used to control the operation of system 8. This control switching logic may include processing switching logic associated with microprocessors, power management units, baseband processors, digital signal processors, microcontrollers, and / or application-specific integrated circuits with processing circuitry.The processing switching logic implements desired control and communication features in the devices 12 and 24. For example, the processing switching logic can be used in processing user inputs, handling negotiations between the devices 12 and 24, sending and receiving in-band and out-of-band data, performing measurements, estimating power losses, determining power transfer levels, and otherwise controlling the operation of the system 8.
[0011] The control switching logic in System 8 can be configured to perform operations in System 8 using hardware (such as dedicated hardware or switching logic), firmware, and / or software. Software code for performing operations in System 8 and other data are stored on non-transient computer-readable storage media (such as physical computer-readable storage media) within the control switching logic 8. The software code may sometimes be referred to as software, data, program instructions, instructions, or code. The non-transient computer-readable storage media may include non-volatile memory, such as non-volatile random-access memory (NVRAM), one or more hard disks (such as magnetic drives or solid-state drives), one or more removable flash drives or other removable media, or the like.Software stored on non-transient, computer-readable storage media can be executed on the processing logic of the control logic 16 and / or 30. The processing logic can include application-specific integrated circuits with processing logic, one or more microprocessors, a central processing unit (CPU), or other processing logic.
[0012] The power transmission device 12 can be a standalone power adapter (e.g., a wireless charging mat or charging disc that includes power adapter switching logic), a wireless charging mat or charging disc coupled to a power adapter or other equipment by a cable, a portable device, equipment installed in furniture, a vehicle, or another system, a removable battery case, or other wireless power transmission equipment. The power receiving device 24 can be a portable electronic device, such as a mobile phone, laptop computer, tablet computer, a body-worn item, such as an earphone or wristwatch, a wirelessly charged, replaceable battery case for an electronic device, or other electronic equipment.The power transmission device 12 and / or the power reception device 24 may be capable of both transmitting and receiving wireless power. For example, a single coil in an electronic device may be operated in a power reception mode (in which power is received) or a power transmission mode (in which power is transmitted).
[0013] The power transfer device 12 can be connected to a wall socket (e.g., an AC power source), can include a battery for power supply, and / or can include another power source. The power transfer device 12 can include an AC-DC power converter, such as an AC-DC power converter 14, for converting AC power from a wall socket or other power source into DC power. DC power can be used to supply power to the control switching logic 16. During operation, a controller in the control switching logic 16 uses a power transfer switching logic 52 to wirelessly transfer power to a power receiving switching logic 54 of the device 24. The power transfer switching logic 52 can be a switching switching logic (e.g., a relay).The device 12 comprises an inverter switching logic 61 formed from transistors, which is switched on and off based on control signals provided by the control switching logic 16 to generate AC current signals through one or more wireless power transfer coils, such as one or more wireless power transfer coil(s) 36. These coil control signals cause the coil(s) 36 to transmit power wirelessly. Multiple coils 36 can be arranged in a planar coil array (e.g., in configurations where the device 12 is a wireless charging mat) or can be arranged to form a cluster of coils (e.g., in configurations where the device 12 is a wireless charging disc). In some arrangements, the device 12 (e.g., a charging mat, a charging disc, a portable electronic device such as a mobile phone, etc.) may have only a single coil.In other arrangements, a wireless charging device may have multiple coils (e.g., two or more coils, 2-4 coils, 5-10 coils, at least 10 coils, less than 25 coils, or another suitable number of coils).
[0014] When alternating currents pass through one or more coils 36, electromagnetic (e.g., magnetic) alternating current fields (wireless power signals 44) are generated, which are received by one or more corresponding receiving coils, such as the coil(s) 48 in the power receiving device 24. The device 24 can have a single coil 48, at least two coils 48, at least three coils 48, at least four coils 48, or any other suitable number of coils 48. When the electromagnetic alternating current fields are received by the coil(s) 48, corresponding alternating currents are induced in the coil(s) 48. The alternating current signals used in the wireless power transmission can have any suitable frequency (e.g., 100 to 400 kHz, etc.).A rectifier switching logic, such as rectifier switching logic 50, which contains rectifier components such as synchronous rectifier metal oxide semiconductor transistors arranged in a bridge network, converts received AC signals (received alternating current signals that are associated with electromagnetic signals 44) from one or more coils 48 into DC signals for the power supply of the device 24.
[0015] The DC voltage generated by the rectifier switching logic 50 (sometimes referred to as the rectifier output voltage Vrect) can be used to charge a battery, such as the battery 58, and can be used to power other components in the device 24. For example, the device 24 can include input-output devices 56. The input-output devices 56 can include input devices for acquiring user input and / or performing environmental measurements, and output devices for providing output to a user. As an example, the input-output devices 56 can include a display, a speaker, a camera, a touch sensor, an ambient light sensor, and other devices for acquiring user input, performing sensor measurements, and / or providing output to a user.The device 12 can include input / output devices 69 (e.g., any of the input / output devices described in connection with the input / output devices 56).
[0016] Device 12 and / or device 24 can communicate wirelessly using in-band or out-of-band communication. For example, device 12 can have a wireless transceiver switching logic 40 that wirelessly transmits out-of-band signals to device 24 using an antenna. The wireless transceiver switching logic 40 can be used to wirelessly receive out-of-band signals from device 24 using the antenna. Device 24 can have a wireless transceiver switching logic 46 that transmits out-of-band signals to device 12. A receiver switching logic in the wireless transceiver 46 can use an antenna to receive out-of-band signals from device 12. In-band transmissions between devices 12 and 24 can be performed using coils 36 and 48.In an illustrative configuration, frequency-shift keying (FSK) is used to transfer in-band data from device 12 to device 24, and amplitude-shift keying (ASK) is used to transfer in-band data from device 24 to device 12. Power can be wirelessly transmitted from device 12 to device 24 during these FSK and ASK transfers.
[0017] The example of FSK modulation used to transmit in-band data from power transmitter 12 to power receiver 24, and ASK modulation used to transmit in-band data from power receiver 24 to power transmitter 12, is merely illustrative. In general, any desired communication techniques can be used to transmit information from power transmitter 12 to power receiver 24 and from power receiver 24 to power transmitter 12. In another example, ASK modulation can be used to transmit in-band data from power transmitter 12 to power receiver 24, and / or FSK modulation can be used to transmit in-band data from power receiver 24 to power transmitter 12.In general, wireless power can be transmitted simultaneously between devices during in-band communications (using ASK or FSK).
[0018] The control switching logic 16 includes measurement switching logic 41. The measurement switching logic 41 can include voltage measurement switching logic (e.g., for measuring one or more voltages in the device 12, such as a coil voltage associated with a wireless power transmission coil) and / or current measurement switching logic (e.g., for measuring one or more currents, such as the current of a wireless power transmission coil).
[0019] The control switching logic 30 includes a measurement switching logic 43. The measurement switching logic 43 can include voltage measurement switching logic (e.g., for measuring one or more voltages in the device 24, such as a coil voltage associated with a wireless power transmission coil and / or a rectifier output voltage) and / or current measurement switching logic (e.g., for measuring one or more currents, such as a current in a wireless power receiving coil and / or a rectifier output current).
[0020] Fig. Figure 2 shows an illustrative wireless power switching logic in System 8 in an illustrative scenario where a wireless power transmission device is paired with a wireless power receiving device. The wireless power switching logic of Fig. Figure 2 includes a wireless power transmission switching logic 52 in the wireless power transmission device 12 and a wireless power reception switching logic 54 in the wireless power reception device 24. During operation, wireless power signals 44 are transmitted by the wireless power transmission switching logic 52 and received by the wireless power reception switching logic 54. The exemplary configuration of Fig. 2 includes a transmitting coil 36 and a receiving coil 48.
[0021] As in Fig. As shown in Figure 2, the wireless power transmission switching logic 52 includes the inverter switching logic 61 and the inverter controller 106. The inverter controller 106 can provide control signals to the inverter switching logic 61. The inverter switching logic (the inverter) 61 can be used to provide signals to the coil 36 based on the control signals from the inverter controller 106. During wireless power transmission, the inverter 61 supplies AC drive signals to the coil 36 at a power transmission frequency. Circuit components, such as the capacitor 70, can be connected in series with the coil 36, as shown in Figure 2. Fig. 2 shown.
[0022] When alternating current signals are supplied to coil 36, corresponding electromagnetic alternating current signals (wireless current signals 44) are transmitted to nearby coils, such as the illustrative coil 48 in the wireless power receiving switching logic 54. This induces a corresponding alternating current signal (AC current signal) in coil 48. Capacitors, such as the capacitors 72, can be connected in series with coil 48. The rectifier 50 receives the AC current from coil 48 and generates corresponding DC power (e.g., DC voltage Vrect) at the output terminals 76. This power can be used to supply power to a load.
[0023] If desired, some of the devices in the wireless power system 8 may have the capability to both transmit and receive wireless power signals. For example, a mobile phone or other portable electronic device may have a single coil that can be used to receive wireless power signals from a charging disk or other wireless power transmission device, and may also be used to transmit wireless power to another wireless power device (e.g., another mobile phone, accessory device, etc.). A device capable of both transmitting and receiving wireless power may have all the components of the wireless power transmission device 12 and all the components of the wireless power receiving device 24 (e.g.,(The power transmission switching logic 52 and the power reception switching logic 54 are enclosed in a single device). However, the functionality of the wireless power transmission and wireless power reception is the same as in conjunction with . Fig. 1 and Fig. 2 described. Although the examples herein focus on a scenario in which a dedicated wireless power transmission device transmits a charge to a dedicated wireless power receiving device, it is understood that a device capable of both transmitting and receiving wireless power may be used instead of one or both devices. In other words, coil 36 may also be capable of receiving wireless power, and coil 48 may also be capable of transmitting wireless power.
[0024] As in Fig. As shown in Figure 2, the power receive switching logic 54 includes the amplitude shift keying (ASK) switching logic 102 (which can be considered part of the wireless transceiver switching logic 46). The ASK switching logic can, for example, include a capacitor connected in series and a switch connected in parallel with the inductor 48. Closing and opening the switch changes the impedance of the wireless power receive circuit 54, causing a corresponding amplitude disturbance of the signal through the inductor 36 in the power transmission switching logic 52. Modulating the state of the switch in the ASK switching logic 102 can therefore be used to transmit ASK modulation states from the power receive device 24 to the power transmission device 12. This example is merely illustrative, and there are other ways to achieve ASK modulation (e.g., by varying the rectifier load).In general, any ASK modulation technique can be used. The wireless power transmission switching logic 52 can include the ASK communication receiving switching logic 104 (which can be considered part of the wireless transceiver switching logic 40), which is used to decode the ASK modulation states into corresponding bits. The ASK communication receiving switching logic 104 monitors the amplitude and / or phase of the AC signal passing through the coil(s) 36 and, using ASK demodulation, extracts the transmitted in-band data from these signals, which were transmitted by the ASK switching logic 102. The use of ASK communications enables in-band transmission of data bits from device 24 to device 12 using coils 48 and 36, while simultaneously transmitting power wirelessly from device 12 to device 24 using coils 36 and 48.Several data bits together can form data packets for communication between devices 12 and 24.
[0025] The wireless power transmission switching logic 52 in the power transmission device 12 can include dithering switching logic such as the dithering switching logic 84. As mentioned previously, the power transmission device 12 transmits AC signals to the power receiving device 24 at a power transmission frequency. The power transmission frequency can be between 100 kHz and 100 MHz or any other desired frequency. A clock signal can be provided to the inverter controller 106. Based on the clock signal, the inverter controller 106 can provide control signals (sometimes called inverter control signals) to the inverter switching logic 61 to turn switches (e.g., transistors) on and off in the inverter switching logic to generate AC signals through the wireless power transmission coil (at the desired power transmission frequencies).
[0026] Some wireless power systems use signal dithering to improve the electromagnetic emission characteristics of the system. For example, system 8 can dither the clock signal used by the inverter controller 106 to control the inverter 61 in the wireless power transmission switching logic 52. This effectively dithers the frequency of the periodic waveform of the wireless power transmission signal between the power transmission device 12 and the power receiving device 24.
[0027] Here, various signals (e.g., clock signals) can be described as exhibiting corresponding waveforms (e.g., the shape of the signal's voltage over time). A given waveform can have a recurring shape that repeats itself at a given frequency (i.e., the given waveform can be periodic). The recurring shape need not necessarily be a regular shape (e.g., a sine wave). In fact, the recurring shape can deviate from a sinusoidal shape. This type of waveform can still have a frequency that corresponds to the periodic repetition of the non-sinusoidal shape.
[0028] The dithering switching logic 84 can output a modulation signal 90 with a corresponding modulation waveform (sometimes simply referred to as modulation waveform 90). The wireless power transmission device 12 also includes a clock signal 88 (F CLOCK) (sometimes referred to as clock waveform 88, power transmission clock waveform 88, native clock waveform 88, initial clock waveform 88, non-dithered clock waveform 88, system clock 88, etc.). The modulation signal 90 is used to modulate the system clock waveform 88.
[0029] Fig. Figure 3 is a graph of an illustrative modulation signal that can be used for frequency dithering. The modulation signal is used to frequency modulate (dither) the system clock signal, so that the carrier wave (e.g., the inverter output) is frequency dithered. The modulation signal can have a corresponding modulation frequency f. m-- and exhibit a frequency spread Δf. The modulation frequency f m The frequency, also called dithering pattern repetition rate, of the modulation waveform is 90°. In other words, the modulation signal moves at the modulation frequency or repetition rate f. mbetween two fixed frequencies f1 and f2. The difference between frequencies f1 and f2 can sometimes be referred to as the frequency spread or frequency deviation (Δf) of the modulation signal.
[0030] Consider the example in which the wireless power system selects a power transmission frequency of 140 kHz. The unmodified clock waveform 88 can be a square wave or a sinusoidal wave at 140 kHz. The modulation signal 90 can have a frequency spread (Δf) of 10 kHz and a modulation frequency (f). m) of 15 kHz. In this example, after waveform 88 has been frequency-modulated with modulation signal 90, the modified clock signal can oscillate between 135 kHz and 145 kHz at a repetition rate of 15 kHz. In this example, the frequency spread of the modulation signal is evenly distributed around the original frequency of 140 kHz. This can be described as center spread. Alternatively, the frequency modulation can be spread down (so that the modified clock signal oscillates between 130 kHz and 140 kHz) or spread up (so that the modified clock signal oscillates between 140 kHz and 150 kHz).
[0031] There are many options for the frequency f m of the modulating signal modulation, the frequency deviation Δf and the waveform of the modulation signal 90. The modulation frequency f mcan be greater than 0 kHz, greater than 5 kHz, greater than 10 kHz, greater than 20 kHz, greater than 30 kHz, greater than 40 kHz, greater than 50 kHz, greater than 75 kHz, greater than 100 kHz, greater than 200 kHz, less than 5 kHz, less than 10 kHz, less than 20 kHz, less than 30 kHz, less than 40 kHz, less than 50 kHz, less than 75 kHz, less than 100 kHz, less than 200 kHz, etc. The frequency deviation Δf can be greater than 0 kHz, greater than 1 kHz, greater than 3 kHz, greater than 5 kHz, greater than 10 kHz, greater than 20 kHz, greater than 30 kHz, greater than 40 kHz, greater than 50 kHz, less than 1 kHz, less than 3 kHz, less than 5 kHz, less than 10 kHz, less than 20 kHz, less than 30 kHz, less than 40 kHz, less than 50 kHz, etc. Fig. In section 3, the modulation signal 90 has a triangular shape. This example is for illustrative purposes only. In general, the modulation signal 90 can have any desired shape (e.g., sinusoidal shape, rectangular shape, sawtooth shape, a randomized shape, or a step shape that approximates one of the aforementioned shapes).
[0032] Fig. 4A and Fig. Figure 4B shows graphs of illustrative modulation signals 90 that can be used in clock signal dithering for wireless power transmission. Fig. 4A is an example of a waveform that exhibits a step shape following a regular pattern (i.e., a regular step shape). In Fig. 4A closely resembles a regular step waveform of a sawtooth wave. The waveform increases in successive steps between a minimum frequency f1 and a maximum frequency f2. Once position f2 is reached, the waveform returns to f1 and repeats the pattern. Fig. In 4A, there are six frequencies used in the waveform (e.g., f1, f2, and four intermediate frequencies). The duration of the clock signal at each frequency (e.g., the width of each stage) can be the same or approximately the same. Alternatively, the duration of the clock signal at each frequency can be varied if desired.
[0033] In Fig. In 4B, the modulation signal 90 exhibits an irregular step shape. Similar to in Fig. 4A can display the waveform of Fig. 4B exhibit successive steps between a minimum frequency f1 and a maximum frequency f2. In Fig. In 4B, there are six frequencies used in the waveform (e.g., f1, f2, and four intermediate frequencies). Fig. In 4B, however, the frequencies are not stepped in ascending (or descending) order. The steps occur in a random sequence, so the waveform does not necessarily increase continuously (as in Fig. 4A) or decreases (e.g., an opposite arrangement to Fig. 4A). The use of an irregular waveform of this type can be used to optimize the dithering in the power transmission device 12. The random sequence can be repeated in each cycle or can be randomly generated after each cycle.
[0034] A wave shape with a stepped form (in either a regular pattern, as in Fig. 4A, or an irregular pattern, as in Fig. 4B) can include any desired number of levels (e.g. three, four, five, six, seven, eight, more than eight, more than ten, etc.).
[0035] In summary, the modulation signal can have a number of discrete stages. The order in which these frequency stages are traversed and the duration of each frequency stage can be optimized for EMI attenuation or other considerations. The frequency steps can be monotonous, piecewise monotonous, or non-monotonic.
[0036] In some arrangements, the dithering switching logic 84 can use a fixed modulation signal during wireless power transmission operations (i.e., the modulation signal does not change over time). In other arrangements, the dithering switching logic 84 can optimize the modulation signal based on real-time conditions. The dithering switching logic 84 can output an optimized modulation signal based on various inputs, including one or more of: information about the state of charge of the power receiving device (e.g., reported directly by the power receiving device using in-band or out-of-band communication, determined based on parameters reported by the power receiving device and / or parameters measured by the power transmitting device, etc.), parameters of the power receiving device (e.g.,a current and / or voltage at coil 48 and / or an output of rectifier 50, etc.), parameters of the power transmission device (e.g. a current and / or voltage at coil 36, duty cycle, etc.), characteristics of the clock waveform (e.g. the frequency and / or shape of the clock waveform 88), a limitation of the maximum frequency jitter, a limitation of the occupied bandwidth and a limitation of the dithering sequence memory.
[0037] Returning to Fig. 2. Implementations of the inverter control 106 (which may, for example, be a pulse width modulator) can optionally include scaling of the received clock signal. Here, clock signal scaling refers to the use of a periodic clock signal with a high frequency (e.g., system clock 88 in). Fig. 2) and its downscaling to a periodic or dithered signal with a lower frequency. The inverter controller 106 has as its input a system clock signal (F CLOCK ) on. Based on this clock signal, the inverter controller 106 generates a scaled clock signal F. C (e.g., a pulse-width modulated signal) by counting a certain number of clock cycles and then changing its output. Consider the example where no dithering is performed and the system clock signal (F CLOCK The signal received at inverter control unit 106 has a frequency of 144 MHz. In this case, the inverter circuit can switch back and forth between "0" and "1" every 200 clock pulses. This corresponds to a square wave of 360 kHz (200 clock pulses for "1" + 200 clock pulses for "0" equals 400 clock pulses per period, and 144 MHz / 400 = 360 kHz).
[0038] The number of bars per period (e.g., 400 in the example above) can sometimes be referred to as the scaling factor (N). PWM The scaling factor is a positive integer used to generate a square wave (provided to inverter 61) based on a received clock signal. With a 50% duty cycle, the scaling factor can be divided by two to determine the number of clock cycles between each switching of the inverter control output. The 50% duty cycle example is for illustrative purposes only, and any desired duty cycle can be used.
[0039] One possible implementation is to scale the modulation signal 90 to the scaling factor N. PWMThis can be used to implement frequency dithering of the power transmission frequency. For example, the modulation signal is at -6, then -2, then +2, then +6. This signal is applied to a fixed NPWM (400) to achieve the dithering pattern of 394, 398, 402, 406, etc. Representing the modulation signal as a modification of a fixed scaling factor is purely illustrative. In another possible example, the modulation signal 90 could simply be the sequence for the scaling factor (e.g., 394, 398, 402, 406, etc.) applied to the incoming system clock.
[0040] Following the example above, the inverter controller 106 could first switch every 197 cycles, then every 199 cycles, then every 201 cycles, then every 203 cycles, and so on. In other words, N PWMThe PWM waveform frequency is set to 394, then 398, then 402, then 406, and so on. This would change the PWM waveform frequency from 366.4822 kHz to 361.8090 kHz, to 358.2090 kHz, to 354.6798 kHz, and so on. The pattern can then repeat. The time spent at each clock divider ratio (e.g., 197, 199, 201, 203, etc.) could be 1 / 2 a power cycle, 1 power cycle, 2 power cycles, 3 power cycles, and so on. Using a scaling factor in the inverter controller 106 allows for easily tunable inverter output.
[0041] Next, the ASK communication receiving switching logic 104 will be installed. Fig. 2. The ASK communication receiving switching logic 104 can include the ASK decoding switching logic 108, the step-down conversion switching logic 110, the analog-to-digital converter 112, and the amplifier 114. The amplifier 114 has first and second input terminals connected to opposite sides of the capacitor 70. Therefore, the amplifier 114 outputs the voltage across the capacitor 70 to the analog-to-digital converter (ADC) 112. The ADC 112 converts the voltage from the amplifier 114 into a digital signal (s(t)) which is provided to the step-down conversion switching logic 110. In some notations, s(t) implies an analog signal and s[n] implies a digital signal. Although an analog implementation is possible up to 52, for the sake of simplicity the focus is placed on digital implementations, without limiting the general applicability.Therefore, s(t) = s(nT) = s[n], where T equals 1 divided by the sampling frequency of the ADC 112. The step-down switching logic 110 can thus receive a digital signal representing the voltage across capacitor 70 over time. It should be noted that, alternatively, step-down switching logic can be placed before the ADC 112, so that the step-down conversion process is performed in the analog domain. For the sake of simplicity, the following descriptions of the operation of the step-down switching logic 110 assume that there is no phase shift between s(t) (e.g., the signal measured by the ASK communication receiving switching logic 104) and the power signal generated by the inverter 61. In reality, there is a phase shift, which can either be ignored or handled by phase tracking or I / Q demodulation (see [reference]). Fig. 10B).
[0042] The downconversion switching logic 110 can process the digital signal from the capacitor ADC 112 to remove variations in the signal caused by the clock waveform (and thus isolate variations caused by ASK communication). The downconversion switching logic 110 achieves this by multiplying the output of the ADC 112 by a function of the dithered clock signal using a local oscillator. The local oscillator receives an initial input from the ADC 112. This initial input can be represented by s(t). The input s(t) is equal to the voltage across capacitor 70 over time. The signal s(t) exhibits frequency fluctuations caused by dithering using the dithering switching logic 84.
[0043] The formula in Fig. Figure 5A shows the approximate value of s(t), where, for simplicity, the signal is represented as a sine wave without phase shift relative to the phase of the inverter's waveform. In the formula of Fig. 5A is A(t) equal to the amplitude change caused by the amplitude shift keying in the power receiving device 24, F C is equal to the scaled clock signal that is output by the inverter control 106 in Fig. 2 is used (e.g. F C = F CLOCK / N PWM ), and t is equal to time. Δt in Fig. 5A is equal to 2πΔF C t, where ΔF C equal to the modulation signal 90 in Fig. 2 is.
[0044] In other words, s(t) as measured by the ADC 112 is a function of both the ASK amplitude variations (A(t)) and the scaled clock signal F. C and the modulation signal 90 (ΔF CTo decode ASK communication, the signal is ideally processed so that it is only a function of the ASK amplitude variations (A(t)).
[0045] To process the signal s(t), the down-conversion switching logic 110 can use a local oscillator to multiply s(t) by a function that includes the modified clock signal 92 (which is equal to F). C + ΔF C is). In particular, the downward conversion switching logic 110 s(t) can be used with cos(2πF C multiply or mix tT + Δt) and then apply a low-pass filter (LPF) that allows the baseband signal to pass but rejects the high-frequency sections of the mixer output, as in Fig. 5B shown. In Fig. 5B is r(t) the filtered version of s(t), which is subsequently provided to the ASK decoding switching logic 108 (e.g., the output of the downward conversion switching logic 110). The equation of Fig. 5B leads to the equation in Fig. 5C. The equation in Fig. 5C can be simplified to give the equation in Fig. to obtain 5D. As in Fig. As shown in Figure 5D, the down-conversion switching logic 110 ultimately outputs a signal (r(t)) that is only a function of the ASK amplitude variations (A(t)). The ASK decoding switching logic 108 can decode the signal (r(t)) from the down-conversion switching logic 110 into corresponding bits (e.g., data packets).
[0046] In Fig. 2. The down-conversion switching logic 110 receives a first input s(t) from the ADC 112. The down-conversion switching logic 110 receives a second input from the scaling switching logic 116. The scaling switching logic 116 outputs values from a sampled sine wave (e.g., a sampled cosine (I)) with a frequency of F. CLOCK / N SC from (where N SC (a scaling factor that is a positive integer). The scaling factor N SCIn the scaling switching logic 116, synchronization with the scaling factor N is possible. PWM in the inverter control unit 106 (e.g. N SC = N PWM ). In this way, blocks 106 and 116 output signals with matching periods.
[0047] As an example, the inverter controller 106 can dither every two power cycles at a rate of one frequency step. For instance, the inverter controller outputs a square wave at 366.4822 kHz for two periods and then switches to the next frequency (361.8090 kHz). In this case, the scaling switching logic 116 generates a cosine wave with two periods at 366.4822 kHz and then switches to the next frequency (361.8090 kHz).
[0048] It is important to note that the down-conversion switching logic 110 uses information about the modulating waveform (either in the form of an output from the scaling switching logic 116 or other internal logic) when processing the signal s(t) it receives. Down-converting the dithered signal (s(t)) based on the modulating waveform produces an output signal r(t) without any dithering artifacts. If the down-conversion switching logic has no information regarding the modulating waveform, the local oscillator will not be synchronized with the actual power signals provided by the inverter 61 (which operates based on the dithered clock signal). If this dithered output from the inverter is ignored, it will intrude into the signal r(t) provided to the ASK decoding switching logic 108, potentially leading to bit errors. The example switching logic of Fig. 2 enables the ASK decoding switching logic (e.g., the down-conversion switching logic 110) to see the same dithered clock signal used by the inverter 61 to generate the underlying wireless power transmission signal on which the ASK communication takes place. This information allows the down-conversion switching logic to remove signal artifacts caused by dithering and retrieve a more accurate ASK envelope, as intended by the ASK switching logic 102 of the data transmission device.
[0049] For the sake of simplicity, the descriptions herein assume that there is no phase shift between s(t) (e.g., the signal measured by the ASK communication receiver circuit 104) and the power signal generated by the inverter 61. This assumption allows the above equations and analyses to be represented using only a cosine function (as in Fig. 5A to 5C). A schematic diagram of the step-down conversion switching logic 110, which follows this assumption, is shown in Fig. 10A is shown. As in Fig. As shown in Figure 10A, the down-conversion switching logic 110 includes a local oscillator 120 which receives a signal from the ADC 112 (e.g. s(t)) and a second input (cos(2πF)). C t + Δt)) is received from the scaling switching logic 116.
[0050] To account for a possible phase shift between s(t) (e.g., the signal measured by the ASK communication receiving switching logic 104) and the power signal generated by inverter 61, the step-down conversion switching logic 110 can include two local oscillators. This type of arrangement is described in Fig. 10B shown. As in Fig. As shown in Figure 10B, the step-down conversion switching logic 110 includes a first local oscillator 120-1 and a second local oscillator 120-2. The first local oscillator 120-1 receives a signal from the ADC 112 (e.g., s(t)) and a second input (cos(2πF)). C t + Δt)) from the scaling switching logic 116. This local oscillator uses a cosine function and represents the in-phase component (I) of the signal. The second local oscillator 120-2 receives a signal from the ADC 112 (e.g., s(t)) and a second input (sin(2πF)). C t + Δt))) from the scaling switching logic 116. This local oscillator uses a sine function and represents the quadrature component (Q) of the signal. The outputs of the local oscillators (e.g., r(t) from local oscillator 120-1 and r'(t) from local oscillator 120-2) are provided to the ASK decoding switching logic 108, which can use both oscillator outputs for ASK decoding.
[0051] In the example of Fig. 10B can derive 116 values from a sampled cosine (I) and sine (Q) function with a frequency of F. CLOCK / N SF provide.
[0052] The following descriptions in connection with Fig. For the sake of simplicity, in sections 6 to 9, the assumption that there is no phase shift can again be used. However, it should be noted that in each of the Fig. 6 to 9 the downconversion switching logic of Fig. 10B can be used to account for the phase shift.
[0053] In Fig. 2. The clock waveform 88 is dithered by changing the scaling factor used in the inverter controller 106 according to a modulation signal. In this embodiment, both the inverter controller 106 and the scaling switching logic 116 receive the clock signal 88 (e.g., a non-dithered clock signal). The clock signal 88 can therefore sometimes be referred to as the common clock signal for the inverter controller 106 and the scaling switching logic 116. Alternatively, the scaling switching logic 116 can receive a clock signal with a frequency that is a known multiple or fraction of the frequency of the system clock 88 (received by the inverter controller 106). The dithering switching logic 84 provides the modulation signal 90 (e.g., a common modulation signal) to both the inverter controller 106 and the scaling switching logic 116.This type of arrangement allows for synchronization of the down-conversion with the dithering of the wireless power signals, which reduces errors in ASK decoding. However, this example of synchronizing down-conversion with the dithering of the wireless power signals is for illustrative purposes only.
[0054] In another possible arrangement, which is in Fig. As shown in Figure 6, the clock modulation switching logic 86 is included to dither the clock waveform 88 directly using the modulation signal 84 from the dithering switching logic 84. The clock modulation switching logic 86 outputs a modified (dithered) clock signal 92, which is then provided to both the inverter control 106 and the scaling switching logic 116.
[0055] As in Fig. As shown in Figure 6, the power transmission device 12 can include the dither switching logic 84 and the clock modulation switching logic 86, which is used to perform frequency dithering during wireless power transmission operations. The dither switching logic 84 and the clock modulation switching logic 86 can be considered part of the power transmission frequency 52 and / or the control switching logic 16 in the device 12. To improve waveform characteristics of the wireless power transmission (such as reduced harmonic emissions) in system 8, the modulation signal 90 is applied to the clock waveform 88 by the clock modulation switching logic 86. The clock modulation switching logic 86 can use the modulation signal 90 to frequency modulate the clock waveform 88. The corresponding modified clock signal 92 is then provided to the inverter controller 106, which uses the modified clock signal to provide control signals to the inverter 61.The inverter 61 generates AC signals for wireless power transmission based on the control signals from the inverter controller 106. The same clock signal (e.g., the modified clock signal 92) is also provided to the scaling switching logic 116, so that the ASK communication receiving circuit 104 removes the dithering pattern from the received ASK signal.
[0056] In Fig. 6. The scaling factor used in both the inverter control unit 106 and the scaling switching logic unit 116 can be fixed. The same scaling factor can be used in both the inverter control unit 106 and the scaling switching logic unit 116 (e.g., N). SC = N PWM ).
[0057] In another possible arrangement, which is in Fig. As shown in Figure 7, the dither switching logic 84 directly feeds the modulation signal 90 to the inverter control 106 (similar to in Figure 7). Fig. 2) ready. To synchronize the down-conversion with the dithering of the wireless power signals, the modulation signal from the dither switching logic 84 is also provided to the ADC 112. The ADC 112 has a sampling rate. In Fig. 2 and Fig. 6 is the fixed sampling rate for the ADC 112. Fig. However, the modulation signal 90 from the dither switching logic 84 can be applied to the ADC sampling rate. This effectively synchronizes the down-conversion performed by the switching logic 110 with the dithering of the wireless power signals.
[0058] In Fig. The scaling logic 116 and the inverter controller 106 receive (and scale) a common, non-dithered clock waveform 88. The scaling logic 116 can use a fixed scaling factor to scale the non-dithered clock waveform. Therefore, the output from the scaling logic 116 to the down-conversion logic 110 is not affected by dithering. However, the s(t) generated by the ADC 112 is synchronized with the dithering of the wireless power signals by modulating the ADC sampling rate with the modulation signal 90. Consequently, the down-conversion logic 110 produces an output signal r(t) without any dithering artifacts.
[0059] In another possible arrangement, which is in Fig. As shown in Figure 8, the notch filter switching logic 118 can be enclosed within the ASK communication receive switching logic 104. The notch filter switching logic can be inserted between the down-conversion switching logic 110 and the ADC 112. The notch filter switching logic can apply a notch filter to the output from the ADC 112 to remove sections of the signal within given frequency bands. The removed frequency bands can be determined in advance if the dither rate (and the associated sidebands of the carrier frequency) are known, or during propagation based on the modulation signal 90 from the dither switching logic 84. A given modulation signal 90 from the dither switching logic 84 can be associated with frequency bands that are likely to cause bit errors during decoding (unless removed). Removing these sections of the signal before down-conversion (by the switching logic 110) therefore reduces the bit errors in the ASK decoding switching logic 108.
[0060] In Fig. In diagram 8, the notch filter switching logic 118 is enclosed between the step-down conversion switching logic 110 and the coil 36. In other words, the notch filtering operations are performed before the step-down conversion. If the notch filter switching logic is enclosed before the step-down conversion switching logic, the notch filter switching logic can be placed after the ADC 112 (as in diagram 8). Fig. 8) or be included before the ADC 112 (and operate in the analog domain). Furthermore, the notch filter switching logic 118 can alternatively be inserted between the down-conversion switching logic 110 and the ASK decoding switching logic 108. In other words, the notch filter operations can be performed after the down-conversion if required.
[0061] Examples of the notch filter switching logic 118 are an infinite impulse response (IIR) filter or a finite impulse response (FIR) filter. In the case of the finite impulse response (FIR) filter, the signal (from the ADC 112) can be averaged over a period corresponding to an integer multiple of the dither period (where the dither period is equal to 1 / f). m is).
[0062] Fig. Figure 9 is a flowchart illustrating the operations for operating a power transmission device that performs frequency dithering of a clock signal. As shown, in step 202, a modulation signal can be used to perform frequency dithering of the clock signal used by the inverter controller 106 to control the inverter 61. The dither switching logic 84 can generate the modulation signal. In some cases (e.g., as in Fig. (as shown in Figure 6) the modulation signal can be applied directly to a non-dithered clock waveform before being provided to the inverter controller 106, and the inverter controller 106 supplies control signals to the inverter 61 based on the received dithered clock signal. In other cases, the inverter controller 106 can receive a non-dithered clock signal and the modulation signal separately. The inverter controller 106 can dither the non-dithered clock signal using the modulation signal by applying the modulation signal to a scaling factor that is applied to the clock signal in the inverter controller 106 (e.g., as shown in Figure 6). Fig. 2, Fig. 7 and Fig. 8 shown). Regardless of the dithering technique used, the inverter controller 106 can supply control signals to the inverter based on a clock signal that is dithered using the modulation signal from the dither switching logic 84.
[0063] In step 204, the modulation signal can be provided to the ASK communication receiving logic 104. There are several ways (e.g., direct and indirect) to provide the modulation signal to the ASK communication receiving logic 104. Fig. 6. The modified clock signal 92 (which is a function of the modulation signal 90) is scaled and provided to the ASK communication receiving switching logic 104 (in particular the down-conversion switching logic 110). In Fig. 2. The modulation signal 90 is provided to the scaling switching logic 116. The scaling switching logic 116 provides a dithered clock signal (which is a function of the modulation signal) to the ASK communication receiving switching logic 104 (in particular the down-conversion switching logic 110). Fig. 7 The modulation signal is provided to the ADC 112 in the ASK communication receiving switching logic 104. In Fig. 8 The modulation signal of the notch filter switching logic 118 is provided in the ASK communication receiving switching logic 104.
[0064] In other words, the ASK communication receiving switching logic 104 receives modulation signal information in step 204. The modulation signal information can be the modulation signal itself (as in Fig. 7 and Fig. 8) or be a signal that is modulated using the modulation signal (as in Fig. 2 and Fig. 6).
[0065] Put another way, the ASK communication receiving switching logic 104 receives frequency dithering information in step 204. The frequency dithering information can be used to modify the modulation signal itself (as in Fig. 7 and Fig. 8) or be a signal that is frequency-dithered using the modulation signal (as in Fig. 2 and Fig. 6).
[0066] Finally, in step 206, the ASK communication receiving switching logic is used to decode wireless power signals into corresponding bits. The wireless power signals are measured using the amplifier 114 and the ADC 112, down-converted and filtered using the switching logic 110, and then decoded using the ASK decoding circuit 108. Notch filtering can optionally be applied before or after the down-conversion, as described in the section on Fig. 8 shown and explained.
[0067] Each of the dither switching logic 84, inverter control 106, clock modulation switching logic 86, scaling switching logic 116, step-down conversion switching logic 110, ASK decoding switching logic 108, and notch filter switching logic 118 can include one or more associated microprocessors, power management units, baseband processors, digital signal processors, microcontrollers, and / or application-specific integrated circuits. Each of the dither switching logic 84, inverter control 106, clock modulation switching logic 86, scaling switching logic 116, step-down conversion switching logic 110, ASK decoding switching logic 108, and notch filter switching logic 118 can be considered part of the control switching logic 16 and / or the wireless power transfer switching logic 52.
[0068] The foregoing example of a wireless power transmission device receiving ASK communications from a wireless power receiving device is for illustrative purposes only. In another possible arrangement, a wireless power receiving device can receive ASK communications from a wireless power transmission device. In this type of arrangement, the wireless power receiving device can include the ASK communication receiving switching logic 104 of any embodiment described herein. The ASK communication receiving switching logic can use information regarding a modulation signal (used for dithering the wireless power signals) during ASK demodulation.For example, the ASK communication receiving switching logic in the wireless power receiving device can receive information regarding the modulation signal in a down-conversion switching logic, a notch filter switching logic, or an analog-to-digital converter.
[0069] According to one embodiment, a wireless power transmission device configured to provide power to a wireless power receiving device includes a wireless power transmission coil, an inverter configured to supply AC drive signals to the wireless power transmission coil, an inverter controller configured to supply control signals to the inverter based on a clock signal dithered using a modulation signal, and amplitude shift keying communication receiving switching logic configured to monitor AC signals at the wireless power transmission coil, at least partially based on information regarding the modulation signal, and to decode the monitored AC signals into bits.
[0070] According to another embodiment, the amplitude shift keying (AMK) communication receiving switching logic includes down-conversion switching logic and AMK decoding switching logic, which receives an output from the down-conversion switching logic, and the wireless power transmission device further includes scaling switching logic. Both the inverter controller and the scaling switching logic receive a system clock signal and the modulation signal. The inverter controller is configured to supply control signals to the inverter based on the system clock signal and the modulation signal, and the scaling switching logic is configured to output a modified clock signal based on the system clock signal and the modulation signal to the down-conversion switching logic.
[0071] According to another embodiment, the amplitude shift keying (AMK) communication receiving switching logic includes down-conversion switching logic and AMK decoding switching logic, which receives an output from the down-conversion switching logic, and the wireless power transmission device further includes scaling switching logic and clock modulation switching logic configured to receive a system clock signal and the modulation signal, to modulate the system clock signal using the modulation signal to generate a modified clock signal, and to provide the modified clock signal to the inverter control and the scaling switching logic, wherein the scaling switching logic is configured to receive the modified clock signal from the clock modulation switching logic and to output a scaled version of the modified clock signal to the down-conversion switching logic.
[0072] According to another embodiment, the wireless power transmission device includes a capacitor connected in series with the wireless power transmission coil, the amplitude shift keying communication receiving switching logic includes an amplifier with first and second inputs connected to first and second opposite sides of the capacitor, an analog-to-digital converter receiving an output from the amplifier, the analog-to-digital converter having a sampling rate dithered according to the modulation signal, a down-conversion switching logic receiving an output from the analog-to-digital converter, and an amplitude shift keying decoding switching logic receiving an output from the down-conversion switching logic.
[0073] According to another embodiment, the amplitude shift keying (AMK) communication receiving switching logic includes notch filter switching logic, which filters the monitored AC signals, wherein the notch filter circuit receives the information regarding the modulation signal and removes frequency components of the modulation signal, a down-conversion switching logic that receives an output from the notch filter switching logic, and an AMK decoding switching logic that receives an output from the down-conversion switching logic.
[0074] According to another embodiment, the amplitude shift keying (AMK) communication receiving switching logic includes a down-conversion switching logic which down-converts the monitored AC signals, a notch filter switching logic which receives an output from the down-conversion switching logic, wherein the notch filter switching logic receives the information regarding the modulation signal and removes frequency components of the modulation signal, and an AMK decoding switching logic which receives an output from the notch filter switching logic.
[0075] According to another embodiment, the inverter control is a pulse width modulator.
[0076] According to one embodiment, a non-volatile, computer-readable storage medium stores one or more programs configured to be executed by one or more processors of a wireless power transmission device configured to provide wireless power to a wireless power receiving device, wherein the wireless power transmission device includes a wireless power transmission coil, an inverter configured to supply AC drive signals to the wireless power transmission coil, and an inverter controller that supplies control signals to the inverter based on a clock signal dithered using a modulation signal.wherein one or more programs include instructions for at least partially monitoring AC signals at the wireless power transmission coil based on information regarding the modulation signal and for decoding the monitored AC signals into bits.
[0077] According to another embodiment, the wireless power transmission device further includes down-conversion switching logic, amplitude shift keying decoding switching logic which receives an output from the down-conversion switching logic, and scaling switching logic; both the inverter control and the scaling switching logic receive a system clock signal and the modulation signal; the inverter control is configured to supply control signals to the inverter based on the system clock signal and the modulation signal, and the scaling switching logic is configured to output a modified clock signal based on the system clock signal and the modulation signal to the down-conversion switching logic.
[0078] According to another embodiment, the wireless power transmission device further includes down-conversion switching logic, amplitude shift keying decoding switching logic which receives an output from the down-conversion switching logic, scaling switching logic and clock modulation switching logic which are configured to receive a system clock signal and the modulation signal, to modulate the system clock signal using the modulation signal to generate a modified clock signal, and to provide the modified clock signal to the inverter control and the scaling switching logic, wherein the scaling switching logic is configured to receive the modified clock signal from the clock modulation switching logic and to output a scaled version of the modified clock signal to the down-conversion switching logic.
[0079] According to another embodiment, the wireless power transmission device includes a capacitor connected in series with the wireless power transmission coil, an amplifier with first and second inputs connected to first and second opposite sides of the capacitor, an analog-to-digital converter receiving an output from the amplifier, wherein the analog-to-digital converter has a sampling rate that is dithered according to the modulation signal, a down-conversion switching logic receiving an output from the analog-to-digital converter, and an amplitude shift keying decoding switching logic receiving an output from the down-conversion switching logic.
[0080] According to another embodiment, the wireless power transmission device further includes notch filter switching logic which filters the monitored AC signals, wherein the notch filter circuit receives the information regarding the modulation signal and removes frequency components of the modulation signal, a down-conversion switching logic which receives an output from the notch filter switching logic, and an amplitude shift keying decoding switching logic which receives an output from the down-conversion switching logic.
[0081] According to another embodiment, the wireless power receiving device further includes down-conversion switching logic which down-converts the monitored AC signals, a notch filter switching logic which receives an output from the down-conversion switching logic, wherein the notch filter switching logic receives the information regarding the modulation signal and removes frequency components of the modulation signal, and an amplitude shift keying decoding switching logic which receives an output from the notch filter switching logic.
[0082] According to another embodiment, the inverter control is a pulse width modulator.
[0083] According to one embodiment, a method is provided for operating a wireless power transmission device configured to supply power to a wireless power receiving device, wherein the wireless power transmission device includes a wireless power transmission coil, an inverter, an inverter controller, and amplitude-shift keying communication receiving switching logic. The provided method includes, using the inverter, supplying AC drive signals to the wireless power transmission coil, and using the inverter controller, supplying control signals to the inverter based on a clock signal dithered using a modulation signal.and, using amplitude shift keying communication receiving switching logic, at least partially based on information regarding the modulation signal, monitoring AC signals at the coil for wireless power transmission and decoding the monitored AC signals into bits.
[0084] According to another embodiment, the wireless power transmission device further includes scaling switching logic, the amplitude shift keying (AMK) communication receiving switching logic includes down-conversion switching logic and AMK decoding switching logic, and the method further includes, using the AMK decoding switching logic, receiving an output from the down-conversion switching logic, receiving a system clock signal and the modulation signal with both the inverter control and the scaling switching logic, using the inverter control, supplying control signals to the inverter based on the system clock signal and the modulation signal, and using the scaling switching logic, outputting a modified clock signal to the down-conversion switching logic based on the system clock signal and the modulation signal.
[0085] According to another embodiment, the amplitude shift keying (AMK) communication receiving switching logic includes down-conversion switching logic and AMK decoding switching logic, which receives an output from the down-conversion switching logic, and the wireless power transmission device further includes scaling switching logic and clock modulation switching logic, and the method further includes, using the clock modulation switching logic, receiving a system clock signal and the modulation signal, modulating the system clock signal using the modulation signal to generate a modified clock signal, and providing the modified clock signal to the inverter control and the scaling switching logic, wherein the scaling switching logic is configuredto receive the modified clock signal from the clock modulation switching logic and output a scaled version of the modified clock signal to the down-conversion switching logic.
[0086] According to another embodiment, the wireless power transmission device further includes a capacitor connected in series with the wireless power transmission coil, and the amplitude shift keying communication receiving switching logic includes an amplifier with first and second inputs connected to first and second opposite sides of the capacitor, an analog-to-digital converter receiving an output from the amplifier, wherein the analog-to-digital converter has a sampling rate that is dithered according to the modulation signal, a down-conversion switching logic receiving an output from the analog-to-digital converter, and an amplitude shift keying decoding switching logic receiving an output from the down-conversion switching logic.
[0087] According to another embodiment, the amplitude shift keying (AMK) communication receiving switching logic includes notch filter switching logic, which filters the monitored AC signals, wherein the notch filter circuit receives the information regarding the modulation signal and removes frequency components of the modulation signal, a down-conversion switching logic that receives an output from the notch filter switching logic, and an AMK decoding switching logic that receives an output from the down-conversion switching logic.
[0088] According to another embodiment, the amplitude shift keying (AMK) communication receiving switching logic includes a down-conversion switching logic which down-converts the monitored AC signals, a notch filter switching logic which receives an output from the down-conversion switching logic, wherein the notch filter switching logic receives the information regarding the modulation signal and removes frequency components of the modulation signal, and an AMK decoding switching logic which receives an output from the notch filter switching logic.
[0089] The foregoing serves only for illustration, and various modifications can be made to the described embodiments. The foregoing embodiments can be implemented individually or in any combination. QUOTES INCLUDED IN THE DESCRIPTION
[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature
[0000] US 18 / 160,532
[0001] US 63 / 342,457
[0001] US 17 / 680,463
[0008]
Claims
[1] A wireless power transmission device configured to provide wireless power to a wireless power receiving device, comprising: a coil for wireless energy transmission; an inverter configured to supply AC drive signals to the wireless power transmission coil; an inverter controller configured to supply control signals to the inverter based on a clock signal dithered using a modulation signal; and amplitude shift keying communication receive circuitry configured to monitor AC signals at the wireless power transmission coil based at least in part on information regarding the modulation signal and to decode the monitored AC signals into bits. [2] The wireless power transmission device of claim 1, wherein the amplitude shift keying communication receiving circuitry comprises down-conversion circuitry and amplitude shift keying decoding circuitry that receives an output from the down-conversion circuitry, and wherein the wireless power transmission device further comprises: Scaling circuitry, wherein both the inverter control and the scaling circuitry receive a system clock signal and the modulation signal, wherein the inverter controller is configured to supply control signals to the inverter based on the system clock signal and the modulation signal, and wherein the scaling circuitry is configured to output a modified clock signal based on the system clock signal and the modulation signal to the downconversion circuitry. [3] The wireless power transmission device of claim 1, wherein the amplitude shift keying communication receiving circuitry comprises down-conversion circuitry and amplitude shift keying decoding circuitry that receives an output from the down-conversion circuitry, and wherein the wireless power transmission device further comprises: Scaling logic; and Clock modulation circuitry configured to: Receiving a system clock signal and the modulation signal; Modulating the system clock signal using the modulation signal to generate a modified clock signal; and Providing the modified clock signal to the inverter controller and to the scaling circuitry, wherein the scaling circuitry is configured to receive the modified clock signal from the clock modulation circuitry and output a scaled version of the modified clock signal to the down-conversion circuitry. [4] The wireless power transmission device of claim 1, further comprising a capacitor connected in series with the wireless power transmission coil, wherein the amplitude shift keying communication reception circuitry comprises: an amplifier having first and second inputs connected to first and second opposite sides of the capacitor; an analog-to-digital converter receiving an output from the amplifier, the analog-to-digital converter having a sampling rate that is dithered according to the modulation signal; Downconversion circuitry receiving an output from the analog-to-digital converter; and Amplitude shift keying decoding circuitry receiving an output from the downconversion circuitry. [5] The wireless power transmission device of claim 1, wherein the amplitude shift keying communication receiving circuitry comprises: Notch filter circuitry that filters the monitored AC signals, the notch filter circuitry receiving the information regarding the modulating signal and removing frequency components of the modulating signal; Downconversion circuitry receiving an output from the notch filter circuitry; and Amplitude shift keying decoding circuitry receiving an output from the downconversion circuitry. [6] The wireless power transmission device of claim 1, wherein the amplitude shift keying communication receiving circuitry comprises: Down-conversion circuitry that down-converts the monitored AC signals; Notch filter circuitry receiving an output from the down-conversion circuitry, the notch filter circuitry receiving the information regarding the modulation signal and removing frequency components of the modulation signal; and Amplitude shift keying decoding circuitry receiving an output from the notch filter circuitry. [7] The wireless power transmission device according to claim 1, wherein the inverter controller is a pulse width modulator. [8] A non-transitory computer-readable storage medium storing one or more programs configured to be executed by one or more processors of a wireless power transmission device configured to provide wireless power to a wireless power reception device, the wireless power transmission device comprising a wireless power transmission coil, an inverter configured to supply AC drive signals to the wireless power transmission coil, and an inverter controller configured to supply control signals to the inverter based on a clock signal dithered using a modulation signal, the one or more programs including instructions for: Monitoring, based at least in part on information regarding the modulation signal, AC signals at the wireless power transmission coil, and decoding the monitored AC signals into bits. [9] The non-transitory computer-readable storage medium of claim 8, wherein the wireless power transmission device further comprises down-conversion circuitry, amplitude shift keying decoding circuitry receiving an output from the down-conversion circuitry, and scaling circuitry, wherein both the inverter controller and the scaling circuitry receive a system clock signal and the modulation signal, wherein the inverter controller is configured to provide control signals to the inverter based on the system clock signal and the modulation signal, and wherein the scaling circuitry is configured to output a modified clock signal to the down-conversion circuitry based on the system clock signal and the modulation signal. [10] The non-transitory computer-readable storage medium of claim 8, wherein the wireless power transmission device further comprises downconversion circuitry, amplitude shift keying decoding circuitry receiving an output from the downconversion circuitry, scaling circuitry, and clock modulation circuitry configured to: Receiving a system clock signal and the modulation signal; Modulating the system clock signal using the modulation signal to generate a modified clock signal; and Providing the modified clock signal to the inverter controller and to the scaling circuitry, wherein the scaling circuitry is configured to receive the modified clock signal from the clock modulation circuitry and output a scaled version of the modified clock signal to the down-conversion circuitry. [11] The non-transitory computer-readable storage medium of claim 8, wherein the wireless power transmission device further comprises: a capacitor connected in series with the coil for wireless power transmission; an amplifier having first and second inputs connected to first and second opposite sides of the capacitor; an analog-to-digital converter receiving an output from the amplifier, the analog-to-digital converter having a sampling rate that is dithered according to the modulation signal; Downconversion circuitry receiving an output from the analog-to-digital converter; and Amplitude shift keying decoding circuitry receiving an output from the downconversion circuitry. [12] The non-transitory computer-readable storage medium of claim 8, wherein the wireless power transmission device further comprises: Notch filter circuitry that filters the monitored AC signals, the notch filter circuitry receiving the information regarding the modulating signal and removing frequency components of the modulating signal; Downconversion circuitry receiving an output from the notch filter circuitry; and Amplitude shift keying decoding circuitry receiving an output from the downconversion circuitry. [13] The non-transitory computer-readable storage medium of claim 8, wherein the wireless power transmission device further comprises: Down-conversion circuitry that down-converts the monitored AC signals; Notch filter circuitry receiving an output from the down-conversion circuitry, the notch filter circuitry receiving the information regarding the modulation signal and removing frequency components of the modulation signal; and Amplitude shift keying decoding circuitry receiving an output from the notch filter circuitry. [14] The non-transitory computer-readable storage medium of claim 8, wherein the inverter controller is a pulse width modulator. [15] A method of operating a wireless power transmission device configured to provide wireless power to a wireless power reception device, the wireless power transmission device comprising a wireless power transmission coil, an inverter, an inverter controller, and amplitude shift keying communication reception circuitry, the method comprising: Supplying, using the inverter, AC drive signals to the coil for wireless power transmission; Supplying, using the inverter controller, control signals to the inverter based on a clock signal dithered using a modulation signal; and Monitoring, using the amplitude shift keying communication receive circuitry based at least in part on information regarding the modulation signal, AC signals at the wireless power transmission coil, and decoding the monitored AC signals into bits. [16] The method of claim 15, wherein the wireless power transmission device further comprises scaling circuitry, wherein the amplitude shift keying communication reception circuitry comprises downconversion circuitry and amplitude shift keying decoding circuitry, and wherein the method further comprises: receiving, using the amplitude shift keying decoding circuitry, an output from the downconversion circuitry; Receiving a system clock signal and the modulation signal with both the inverter control and the scaling circuitry, Supplying, using the inverter controller, control signals to the inverter based on the system clock signal and the modulation signal; and Outputting, using the scaling circuitry, a modified clock signal to the downconversion circuitry based on the system clock signal and the modulation signal. [17] The method of claim 15, wherein the amplitude shift keying communication receiving circuitry comprises downconversion circuitry and amplitude shift keying decoding circuitry that receives an output from the downconversion circuitry, wherein the wireless power transmission device further comprises scaling circuitry and clock modulation circuitry, and wherein the method using the clock modulation circuitry further comprises: Receiving a system clock signal and the modulation signal; Modulating the system clock signal using the modulation signal to generate a modified clock signal; and Providing the modified clock signal to the inverter controller and to the scaling circuitry, wherein the scaling circuitry is configured to receive the modified clock signal from the clock modulation circuitry and output a scaled version of the modified clock signal to the down-conversion circuitry. [18] The method of claim 15, wherein the wireless power transmission device further comprises a capacitor connected in series with the wireless power transmission coil, and wherein the amplitude shift keying communication reception circuitry comprises: an amplifier having first and second inputs connected to first and second opposite sides of the capacitor; an analog-to-digital converter receiving an output from the amplifier, the analog-to-digital converter having a sampling rate that is dithered according to the modulation signal; Downconversion circuitry receiving an output from the analog-to-digital converter; and Amplitude shift keying decoding circuitry receiving an output from the downconversion circuitry. [19] The method of claim 15, wherein the amplitude shift keying communication reception circuitry comprises: Notch filter circuitry that filters the monitored AC signals, the notch filter circuitry receiving the information regarding the modulating signal and removing frequency components of the modulating signal; Downconversion circuitry receiving an output from the notch filter circuitry; and Amplitude shift keying decoding circuitry receiving an output from the downconversion circuitry. [20] The method of claim 15, wherein the amplitude shift keying communication reception circuitry comprises: Down-conversion circuitry that down-converts the monitored AC signals; Notch filter circuitry receiving an output from the down-conversion circuitry, the notch filter circuitry receiving the information regarding the modulation signal and removing frequency components of the modulation signal; and Amplitude shift keying decoding circuitry receiving an output from the notch filter circuitry.
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