Method and system for compensating for characteristics of a display device
Patent Information
- Application Number
- DE602020056350
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2019-10-18
- Filing Date
- 2020-06-15
- Publication Date
- 2025-08-13
- Estimated Expiration
- 2040-06-15
AI Technical Summary
Displays with varying drive transistor characteristics due to fabrication nonuniformities or aging lead to image degradation if uncompensated.
A pixel drive and sense circuit with compensation coefficients adjusts gate-source voltage to counteract transistor mobility and threshold voltage variations, using a 4T1C drive circuit with a drive amplifier and sensing circuit to iteratively refine coefficients for precise current control.
Enhances display performance by reducing settling time and stabilizing current, ensuring consistent image quality across pixels over time.
Description
FIELD
[0001] One or more aspects of embodiments according to the present disclosure relate to displays, and more particularly to compensation for pixel characteristics.BACKGROUND
[0002] Displays for electronic devices, such as displays for computer monitors, televisions, or mobile devices, may include a plurality of pixels, each pixel including transistors for controlling the output of the pixel. For example, in a light emitting diode (LED) display (e.g., an organic LED (OLED) display), each pixel may include a light emitting diode. The magnitude of the current flowing through the light emitting diode may be controlled by a drive transistor. The characteristics of the drive transistor may vary from pixel to pixel as a result of nonuniformities in the fabrication process, or it may vary over time as a result of aging. If measures are not taken to compensate for such variation, degradation of displayed images or video may result. US 2014 / 198092, US 2017 / 039953 and EP 3343556 all provide disclosures related to display devices.SUMMARY
[0003] According to an aspect there is a method for compensating for characteristics of a display according to claim 1. According to a further aspect, there is provided a system configured to perform the method, the system being according to claim 7. Details of embodiments are provided in the dependent claims.BRIEF DESCRIPTION OF THE DRAWINGS
[0004] These and other features and advantages of the present disclosure will be appreciated and understood with reference to the specification, claims, and appended drawings wherein: FIG. 1 is a context diagram, according to an embodiment of the present disclosure; FIG. 2 is a hybrid schematic block diagram of a pixel drive and sense circuit, according to an embodiment of the present disclosure; FIG. 3A is a graph showing simulation results, according to an embodiment of the present disclosure; FIG. 3B is a graph showing simulation results, according to an embodiment of the present disclosure; FIG. 3C is a graph showing simulation results, according to an embodiment of the present disclosure; and FIG. 3D is a graph showing simulation results, according to an embodiment of the present disclosure. DETAILED DESCRIPTION
[0005] The detailed description set forth below in connection with the appended drawings is intended as a description of exemplary embodiments of a system and method for estimating and using pixel compensation coefficients provided in accordance with the present disclosure and is not intended to represent the only forms in which the present disclosure may be constructed or utilized. The description sets forth the features of the present disclosure in connection with the illustrated embodiments. It is to be understood, however, that the same functions and structures may be accomplished by different embodiments that are also intended to be encompassed within the scope of the disclosure. As denoted elsewhere herein, like element numbers are intended to indicate like elements or features.
[0006] Referring to FIG. 1, a display (e.g., a mobile device display) 105 includes a plurality of pixels arranged in rows and columns. Each pixel includes a drive circuit, e.g., a 4-transistor 1-capacitor (4T1C) drive circuit as shown at the bottom of FIG. 1. A 7-transistor 1-capacitor (7T1C) drive circuit is shown on the left of FIG. 1. The 4T1C drive circuit is similar to the 7T1C drive circuit except that the compensation transistors have been removed to increase the pixel density in the display 105. In the 4T1C drive circuit, a drive transistor 110 (the gate-source voltage of which is controlled by a capacitor 115) controls the current through a light emitting diode 120 when the pixel is emitting light. An upper pass-gate transistor 125 is used to selectively connect the gate of the drive transistor 110 (and one terminal of the capacitor 115) to a power supply voltage. A lower pass-gate transistor 130 is used to selectively connect a drive sense conductor 135 to a source node 140 (which is a node connected to the source of the drive transistor 110, to the anode of the light emitting diode 120 and to the other terminal of the capacitor 115).
[0007] Since the compensation transistors have been removed in the 4T1C circuit compared to the 7T1C circuit, a pixel drive and sense circuit 145 is provided to compensate the drive transistor 110. The pixel drive and sense circuit 145 (discussed in further detail below) is connected to the drive sense conductor 135. The pixel drive and sense circuit 145 may include a drive amplifier and a sensing circuit, configured to be selectively connected, one at a time, to the drive sense conductor 135. When current flows through the drive transistor 110, and the lower pass-gate transistor 130 is turned off, disconnecting the drive sense conductor 135 from the source node 140, current may flow through the light emitting diode 120, causing it to emit light. When the lower pass-gate transistor 130 is turned on and the drive sense conductor 135 is driven to a lower voltage than the cathode of the light emitting diode 120, the light emitting diode 120 may be reverse-biased. As a result, any current flowing in the drive sense conductor 135 may flow to the pixel drive and sense circuit 145, where it may be sensed.
[0008] As mentioned above, it may be advantageous to adjust the gate-source voltage to compensate for deviations (e.g., differences from other drive transistors in the display 105, or changes with time), e.g., in the mobility or threshold voltage of the drive transistor 110. FIG. 2 shows the pixel drive and sense circuit 145, which has an output 200 and an input 202. Each of the output 200 and in input 202 are selectively connected to the drive sense conductor 135 of the pixel through a relatively long conductor in the display 105. The relatively long conductor is referred to as the "column conductor". In FIG. 2, the relatively long conductor may be modeled by a resistance R p and a capacitance C p . Either the output 200 or the input 202 may be connected to the column conductor at any given time. More specifically, when the column conductor is being driven, the output 200 may be connected to the column conductor. When the pixel current is being sensed, as discussed in further detail below, the input 202 may be connected to the column conductor. These connections are illustrated using broken lines in FIG. 2.
[0009] In operation, a gamma circuit 205 generates a series of code words. Each code word corresponds to a respective current to be driven through the light emitting diode 120 by the drive transistor 110. Three compensation coefficients are then be used to adjust the code word. A first compensation coefficient ("A" in FIG. 2) is multiplied by the received code word, to form a first compensated code word. A second compensation coefficient ("C" in FIG. 2) is added to the received code word to form a second compensated code word. These two compensation steps may be used to compensate, approximately, (i) for any difference between the mobility of the drive transistor 110 and the mobility of a nominal or ideal transistor, and (ii) for any difference between the threshold voltage of the drive transistor 110 and the threshold voltage of the nominal or ideal transistor.
[0010] The waveform generating circuit 210 also generates, using a third compensation coefficient ("α" in FIG. 2), from the second compensated code word, a waveform having the following voltage: V(n)+α(V(n) -V(n-1))p(t). The waveform represents the control voltage supplied by the pixel drive and sensing circuit 145 to the drive sense conductor 135. This waveform has a first portion at a first voltage and a second portion at a second voltage. An example of this waveform is the "Channel RC input" curve of FIG. 3D. The second voltage is proportional to the second compensated code word, and is the voltage to be applied to the transistor. The first voltage is greater than the second voltage. The first voltage may provide pre-emphasis to partially counteract the low-pass filtering effect of the column conductor in the display 105. The third compensation coefficient, α, is the ratio of the first voltage to the second voltage. When this waveform is converted to analog form by a first digital to analog converter 215, amplified by the drive amplifier 220 (which, at this time may be connected to the column conductor in the display), and fed to the column conductor in the display, the first portion, during which the output voltage of the drive amplifier 220 is increased by the factor α, may cause the voltage on the drive sense conductor 135 to converge more quickly to the desired value. The desired value is the voltage at the output of the drive amplifier 220 during the second portion of the waveform.
[0011] When the input 202 is connected to the column conductor and when current is not driven through the light emitting diode 120 (e.g., because the light emitting diode 120 is reverse-biased), the pixel drive and sense circuit 145 may be employed to sense the current being driven by the drive transistor 110. In current sensing mode, the light emitting diode 120 is reverse biased as mentioned above, and the current that flows through the drive transistor 110 (which may be referred to as the "pixel current") flows into the input 202 of the pixel drive and sense circuit 145. In the pixel drive and sense circuit 145, a reference current (controlled by a second digital to analog converter 225) is subtracted from the pixel current. The difference is processed by an integrator 227 and a comparator (or "slicer") 228 to produce a signal that is referred to as a "pixel current error signal". The "pixel current error signal" is the sign of a difference between the pixel current and the reference current. For example, the "pixel current error signal" is either positive or negative and the magnitude of the difference, i.e. the numerical value of the difference, can be ignored.
[0012] The compensation coefficients are then be adjusted, based on the pixel current error signal so as to cause the drive current, after compensation coefficients have been adjusted, to be more nearly equal to what it would be, for any given code word, if the characteristics (e.g., the mobility and the threshold voltage) of the drive transistor 110 were those of the nominal transistor. This updating occurs iteratively, over a plurality of driving and sensing intervals (or "time intervals"), each processing a new (and potentially different) code word, and each having a respective pixel current, a respective reference current, and a respective pixel current error signal. A first time interval (in which a first code word is received and processed) precedes a second time interval (in which a second code word is received and processed), and then the first compensation coefficient may be adjusted by adding to the first compensation coefficient the product of (i) the second pixel current error signal (sign(e n )), (ii) the difference (sign(code n - code n-1 )) between the second code word and the first code word, and (iii) a first constant, as follows: A n + 1 = A n + step 1 * sign e n * sign code n − code n − 1
[0013] In this equation, A n is the first compensation coefficient before adjustment, A n+1 is the first compensation coefficient after adjustment, and the first constant "step 1 " is an adjustment rate constant that may be adjusted to balance speed of convergence and stability (a larger value tending to increase the speed of convergence and to reduce stability).
[0014] Similarly, the second compensation coefficient may be adjusted by adding to the second compensation coefficient the product of (i) the second pixel current error signal (sign(e n )) and (ii) a second constant, as follows: C n + 1 = C n + step 2 * sign e n
[0015] In this equation, C n is the second compensation coefficient before adjustment, C n+1 is the second compensation coefficient after adjustment, and the second constant "step 2 " is also an adjustment rate constant that may be adjusted to balance speed of convergence and stability.
[0016] When the first and second compensation coefficients are being adjusted, the length of the time interval during which the drive signal is applied to the pixel may be increased from the length used during normal operation. As a result, the voltage at the drive sense conductor 135 has time to reach the voltage at the output 200 of the pixel drive and sense circuit 145, even if the value of the third compensation coefficient (discussed in further detail below) is not correct. This use of longer time intervals helps to decouple the estimation of the third compensation coefficient from the estimation of the first and second compensation coefficients.
[0017] The third compensation coefficient is adjusted in a similar manner. Shorter time intervals each of which may be the same length as time intervals used to drive the display during normal operation (when images or video are displayed) are used when the third compensation coefficient is adjusted. A third time interval (in which a third code word is received and processed), which precedes a fourth time interval (in which a fourth code word is received and processed), is used.
[0018] The third compensation coefficient may be adjusted by adding to the third compensation coefficient the product of (i) a fourth pixel current error signal (obtained during the fourth time interval) (sign(e n )), (ii) the difference between the fourth code word and the third code word (sign(code n - code n-1 )), and (iii) a third constant, as follows: α n + 1 = α n + step 3 * sign e n * sign code n − code n − 1
[0019] In this equation, α n is the third compensation coefficient before adjustment, α n+1 is the third compensation coefficient after adjustment, and the third constant "step 3 " is also an adjustment rate constant that may be adjusted to balance speed of convergence and stability. The first, second and third constants (step 1 , step 2 , and step 3 ) may all have the same values, or they may all have different values, or two of them may have the same value and the remaining one may have a different value.
[0020] The reference current may be generated by a numerical drain-source current model 230, a circuit that calculates the approximate current I ds that the nominal transistor would drive, as follows: I ds = K V − V th 2 where K is the mobility, V is the drive voltage, and V th is the threshold voltage. The output of the numerical drain-source current model 230 may be fed to the second digital to analog converter 225 as shown, to generate the reference current. Subtracting the reference current from the pixel current may be done by arranging for the reference current to have the opposite sign from that of the pixel current. In addition, both the reference current source and the input of the pixel drive and sense circuit 145 (which in turn is connected to the column conductor, which carries the pixel current) may be connected to the same node, i.e., the input of the integrator 227. In this way, the current flowing into the integrator 227 is the difference between (i) the current flowing into the node from the column conductor and (ii) the current flowing out of the node, to the reference current source. In some embodiments, a controller 235 controls state changes of the circuit of FIG. 2. For example, the controller 235 may be configured to determine when each time interval begins. The controller 235 may be configured to control the switches (shown as dashed lines) used to selectively connect the input 202 and the output 200 of the pixel drive and sense circuit 145 to the column conductor. The controller 235 may be configured to send control signals to the upper pass-gate transistor 125 and the lower pass-gate transistor 130.
[0021] In some embodiments, only one of the first digital to analog converter 215 and the second digital to analog converter 225 is active at any time. For instance, the first digital to analog converter 215 is active when the output 200 of the pixel drive and sense circuit 145 is connected to the column conductor and the pixel is being driven. The second digital to analog converter 225 is active when the input 202 of the pixel drive and sense circuit 145 is connected to the column conductor and the pixel current is being sensed. In such an embodiment, it may not be necessary to employ two digital to analog converters. Instead, a single digital to analog converter, connected by respective switches (e.g., transistor switches) to the two nodes driven, in the diagram of FIG. 2, by the first digital to analog converter 215, and by the second digital to analog converter 225, respectively, may be used to perform both functions. In some embodiments, the reference current source is implemented using a digital to analog converter driving a capacitor with a voltage ramp. Such an implementation may result in higher accuracy, when small currents are to be produced.
[0022] FIGs. 3A and 3B are graphs of simulation results showing the current driven by the drive transistor 110 before (FIG. 3A) and after (FIG. 3B) the first and second compensation coefficients have been adaptively adjusted, as described herein, for some embodiments. The finite rise time in I ref may be due to the digital to analog converter's rise time being finite. FIGs. 3C and 3D are graphs of simulation results showing the voltage ("Channel RC input") at the output 200 of the pixel drive and sense circuit 145, the voltage ("Channel RC output", curve 310) at the drive sense conductor 135, and the gate-source voltage of the drive transistor 110 ("V GS ", curve 315). Specifically, FIG. 3C is for the case in which the third compensation coefficient is zero. FIG. 3D is for the case in which the third compensation coefficient has been adjusted to reduce the settling time of the voltage at the drive sense conductor 135. The column conductor may be disconnected from the drive transistor 110 after 1 microsecond. As a result, V GS may be constant after 1 microsecond even if (as shown, for example, in FIG. 3C) the voltage of the drive sense conductor 135 continues to change. It may be seen that when pre-emphasis is not used, the settling time is about 1.5 microseconds. When pre-emphasis is used, with a suitably adjusted third compensation coefficient, the settling time is less than 0.6 microseconds.
[0023] In some embodiments, adjusting of the compensation coefficients may terminate once the discrepancy between the desired current and the sensed current is sufficiently small. For example, during any one of the time intervals, the pixel current may be compared with a corresponding reference current, to obtain a current difference signal, the current difference signal being a difference between the pixel current and the corresponding reference current. Then, (i) when the absolute value of the current difference signal exceeds a threshold, the one or more compensation coefficients may be updated, for example in the manner described above, and (ii) when the absolute value of the current difference signal does not exceed the threshold, the one or more compensation coefficients may be left unchanged.
[0024] In some embodiments, the adaptation of the compensation coefficients may be run on a known subset of pixel current values, meaning that the pixel can be programmed by a voltage (selected from a known set of pre-determined values) at the beginning of the sense process. Alternatively, the adaptation may be run on the actual live video data programmed to the pixel. In other words, the compensation coefficients may be adapted in real time. The sense process may be performed while the display 105 is showing an image, or it may be performed during a blanking period. Initial adaptation of the compensation coefficients may be performed in the factory and the values may be saved in a non-volatile memory. Live adaptation may then be performed every time the device (e.g., the phone) of which the display 105 is a part is turned on, using the saved values of the compensation coefficients (e.g., the saved factory values, or saved values from prior to the last shutdown of the device) as initial values. The driver IC ("DIC" in FIG. 1) may contain a copy of the circuit of FIG. 2 for each pair of columns of the display, and it may contain a table with three compensation coefficient values for each of the pixels in the column. In some embodiments some of the compensation coefficients may be shared. For example, the driver IC may maintain only one value of α for an entire row of the display.
[0025] As used herein, when a first component is described as being "selectively connected" to a second component, the first component is connected to the second component by a switch (e.g., a transistor switch), so that, depending on the state of the switch, the first component may be connected to the second component or disconnected from the second component.
[0026] In some embodiments, numerical or data processing operations (such as the operations to the left of the first digital to analog converter 215 and the second digital to analog converter 225 in FIG. 2) may be performed by one or more processing circuits, which may also include the controller 235. The term "processing circuit" is used herein to mean any combination of hardware, firmware, and software, employed to process data or digital signals. Processing circuit hardware may include, for example, application specific integrated circuits (ASICs), general purpose or special purpose central processing units (CPUs), digital signal processors (DSPs), graphics processing units (GPUs), and programmable logic devices such as field programmable gate arrays (FPGAs). In a processing circuit, as used herein, each function is performed either by hardware configured, i.e., hard-wired, to perform that function, or by more general purpose hardware, such as a CPU, configured to execute instructions stored in a non-transitory storage medium. A processing circuit may be fabricated on a single printed circuit board (PCB) or distributed over several interconnected PCBs. A processing circuit may contain other processing circuits; for example a processing circuit may include two processing circuits, an FPGA and a CPU, interconnected on a PCB.
[0027] It will be understood that, although the terms "first", "second", "third", etc., may be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed herein could be termed a second element, component, region, layer or section, without departing from the scope of the inventive concept.
[0028] Spatially relative terms, such as "beneath", "below", "lower", "under", "above", "upper" and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that such spatially relative terms are intended to encompass different orientations of the device in use or in operation, in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "beneath" or "under" other elements or features would then be oriented "above" the other elements or features. Thus, the example terms "below" and "under" can encompass both an orientation of above and below. The device may be otherwise oriented (e.g., rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein should be interpreted accordingly. In addition, it will also be understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present.
[0029] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the inventive concept. As used herein, the terms "substantially," "about," and similar terms are used as terms of approximation and not as terms of degree, and are intended to account for the inherent deviations in measured or calculated values that would be recognized by those of ordinary skill in the art. As used herein, the term "major portion", when applied to a plurality of items, means at least half of the items.
[0030] As used herein, the singular forms "a" and "an" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising", when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. Expressions such as "at least one of," when preceding a list of elements, modify the entire list of elements and do not modify the individual elements of the list. Further, the use of "may" when describing embodiments of the inventive concept refers to "one or more embodiments of the present disclosure". Also, the term "exemplary" is intended to refer to an example or illustration. As used herein, the terms "use," "using," and "used" may be considered synonymous with the terms "utilize," "utilizing," and "utilized," respectively.
[0031] It will be understood that when an element or layer is referred to as being "on", "connected to", "coupled to", or "adjacent to" another element or layer, it may be directly on, connected to, coupled to, or adjacent to the other element or layer, or one or more intervening elements or layers may be present. In contrast, when an element or layer is referred to as being "directly on", "directly connected to", "directly coupled to", or "immediately adjacent to" another element or layer, there are no intervening elements or layers present.
[0032] Any numerical range recited herein is intended to include all sub-ranges of the same numerical precision subsumed within the recited range. For example, a range of "1.0 to 10.0" is intended to include all subranges between (and including) the recited minimum value of 1.0 and the recited maximum value of 10.0, that is, having a minimum value equal to or greater than 1.0 and a maximum value equal to or less than 10.0, such as, for example, 2.4 to 7.6. Any maximum numerical limitation recited herein is intended to include all lower numerical limitations subsumed therein and any minimum numerical limitation recited in this specification is intended to include all higher numerical limitations subsumed therein.
[0033] Although exemplary embodiments of a system and method for estimating and using pixel compensation coefficients have been specifically described and illustrated herein, many modifications and variations will be apparent to those skilled in the art. Accordingly, it is to be understood that a system and method for estimating and using pixel compensation coefficients constructed according to principles of this disclosure may be embodied other than as specifically described herein. The invention is defined in the following claims.
Claims
1. A method for compensating for characteristics of a display comprising: a plurality of pixels arranged in rows and columns, each pixel comprising an organic light emitting diode (120), OLED, and a drive circuit including a drive sense conductor (135), each column having a drive and sense circuit (145) connected to the drive sense conductors of the pixels and configured to sense pixel currents from the pixels; and a gamma circuit configured to generate a series of code words for each of the pixels, each code word corresponding to a respective current to be driven through an OLED during a time interval, wherein each of an input and an output of the drive and sense circuit are configured to be selectively connected to the drive sense conductor of a pixel through a column conductor providing a low-pass filtering effect, wherein each drive circuit includes a drive transistor (110) configured to control current through the respective OLED (120) when the pixel is emitting light; a capacitor (115) having a first terminal connected to a gate of the drive transistor and a second terminal connected to a source node (140); an upper pass-gate transistor (125) configured to selectively connect the gate of the drive transistor (110) and the first terminal of the capacitor (115) to a power supply voltage; a lower pass-gate transistor (130) configured to selectively connect the drive sense conductor (135) to the source node (140), wherein the source node is connected to a source of the drive transistor and an anode of the OLED, the method comprising, for the pixel: the drive and sense circuit, during a first time interval: receiving a first code word; generating a first reference current based on the first received code word; applying a first control voltage to the pixel; comparing a first pixel current for the pixel with the first reference current to obtain a first pixel current error signal, the first pixel current error signal being the sign of a difference between the first pixel current and the first reference current; and updating one or more compensation coefficients for the pixel based on the first pixel current error signal; and the drive and sense circuit, during a second time interval, wherein the first time period precedes the second time period: receiving a second code word; generating a second reference current based on the second received code word; applying a second control voltage to the pixel; comparing a second pixel current for the pixel with the second reference current to obtain a second pixel current error signal, the second pixel current error signal being the sign of a difference between the second pixel current and the second reference current; updating the one or more compensation coefficients for the pixel, based on the second pixel current error signal, wherein the first pixel current and second pixel current flows through the drive transistor and into an input of the drive and sense circuit, wherein the one or more compensation coefficients include: a first compensation coefficient; a second compensation coefficient; and a third compensation coefficient, wherein the applying of the first control voltage and the second control voltage to the pixel comprises: multiplying the first received code word by the first compensation coefficient to form a first compensated code word; and adding the second compensation coefficient to the first compensated code word to form a second compensated code word; at a waveform generating circuit of the drive and sense circuit, generating, using the third compensation coefficient, from the second compensated code word, a waveform representing the respective control voltage and having a first portion at a first voltage and a second portion at a second voltage, the ratio of the first voltage to the second voltage being the third compensation coefficient, wherein the first voltage is greater than the second voltage, the second voltage being proportional to the second compensated code word; applying, to the column conductor extending to the pixel, the waveform; and wherein updating the compensation coefficients comprises adjusting the compensation coefficients based on the respective pixel current error signal so as to cause the drive current, after the compensation coefficients have been adjusted, to be closer to a drive current, for a given code word, if characteristics of the drive transistor were those of an ideal transistor, the method further comprising: the drive and sense circuit, during a third time interval, shorter than the first time interval and shorter than the second time interval: comparing a third pixel current for the pixel with a third reference current, to obtain a third pixel current error signal, the third pixel current error signal being the sign of a difference between the third pixel current and the third reference current; and updating the third compensation coefficient for the pixel, based on the third pixel current error signal; and the drive and sense circuit, during a fourth time interval, shorter than the first time interval and shorter than the second time interval: comparing a fourth pixel current for the pixel with a fourth reference current, to obtain a fourth pixel current error signal, the fourth pixel current error signal being the sign of a difference between the fourth pixel current and the fourth reference current; and updating the third compensation coefficient for the pixel, based on the fourth pixel current error signal.
2. The method of claim 1, wherein the updating of the one or more compensation coefficients, during the second time interval, is further based on a difference between the second received code word and the first received code word.
3. The method of claim 1, wherein the updating of the one or more compensation coefficients, during the second time interval, comprises: adding to the first compensation coefficient the product of: the second pixel current error signal, the difference between the second received code word and the first received code word, and a first constant.
4. The method of claim 1, wherein the updating of the one or more compensation coefficients, during the second time interval, further comprises: adding to the second compensation coefficient the product of: the second pixel current error signal, and a second constant.
5. The method of any preceding claim, further comprising: during the third time interval, applying a third control voltage to the pixel, the third control voltage being based on a third received code word; and during the fourth time interval, applying a fourth control voltage to the pixel, the fourth control voltage being based on a fourth received code word, wherein the updating of the one or more compensation coefficients, during the fourth time interval, comprises: adding to the third compensation coefficient the product of: the fourth pixel current error signal, the difference between the fourth received code word and the third received code word, and a third constant.
6. The method of any preceding claim, further comprising: during a fifth time interval, comparing a fifth pixel current for the pixel with a fifth reference current, to obtain a current difference signal, the current difference signal being a difference between the fifth pixel current and the fifth reference current; and: when the absolute value of the current difference signal exceeds a threshold: updating the one or more compensation coefficients for the pixel; and when the absolute value of the current difference signal does not exceed the threshold: leaving the one or more compensation coefficients unchanged.
7. A system, comprising: a display, comprising a pixel; and means for driving the pixel and sensing a current generated in the pixel, the system being configured to perform the method of any preceding claim.
8. The system of claim 7, wherein the means for driving the pixel and sensing a current generated in the pixel comprises a pixel drive and sense circuit.