Quantum-computing control system and method with non-sequential mid-circuit control flow

Abstract

A quantum-computing control system includes a script processor, an instruction memory, an instruction fetcher, and a waveform player. The instruction memory stores a plurality of local instructions forming a local instruction set. The script processor executes a local script and transmits to the instruction fetcher a sequence of fetch commands that is based on the local script. The instruction fetcher retrieves, based on each fetch command of the sequence of fetch commands, a fetched instruction from the instruction memory. The fetched instruction belongs to the local instruction set. The instruction fetcher also transmits, to the waveform player, the fetched instruction as one of a sequence of fetched instructions. The waveform player executes the sequence of fetched instructions to generate a digital waveform. The control system may be used to implement mid-circuit (i.e., during runtime) non-sequential control flow of a quantum computer or other type of quantum-engineered system.

Description

QUANTUM-COMPUTING CONTROL SYSTEM AND METHOD WITH NON- SEQUENTI AL MID-CIRCUIT CONTROL FLOWRELATED APPLICATIONS

[0001] This application claims priority to U.S. Provisional Patent Application No. 63 / 450,321, filed on March 6, 2023 and titled “Systems and Methods for Neutral-Atom Quantum Computing,” the entirety of which is incorporated herein by reference.STATEMENT REGARDING FEDERALLYSPONSORED RESEARCH OR DEVELOPMENT

[0002] This invention was made with government support under grant numbers 2040702, 2040527, and 2134345, awarded by the National Science Foundation. The government has certain rights in the invention.BACKGROUND

[0003] A quantum-computing control system is a set of hardware and software resources that cooperate to control the various instruments, devices, and components that make up a quantum computer or similar type of quantum-engineered system. The quantum computer may contain up to several hundred of these instruments, or more. The quantum-computing control system coordinates operation of these instruments to perform various tasks that give the quantum computer its functionality. Such tasks include preparing and measuring qubits, executing quantum algorithms, and performing diagnostic tests, maintenance routines, and calibration procedures.SUMMARY

[0004] The requirements of a quantum-computing control system depend on the type of qubit used by the quantum computer since it is the type of qubit that primarily determines how the qubits need to be manipulated to implement the quantum computer’s functionality (e.g., qubit preparation, quantum state initialization, entanglement generation, quantum gate execution, final-state readout, etc.). For example, superconducting qubits are typically driven and probed using GHz microwave signals while atomic qubits (e.g., cold, trapped atomic ions and neutral atoms) are typically manipulated and controlled using laser beams. Thus, a control system for a superconducting-qubit-based quantum computer needs to control primarily radio-frequency (RF) and microwave components and instruments (e.g., signal generators, switches, modulators, current sources for establishing flux bias, etc.) while a control system for an atomic-qubit-based quantum computer needs to control primarily lasers, electro-optic components (e.g., acousto-optic and electro-optic modulators), electronics for driving these electro-optic components (e.g., RF signal generators), and power supplies (e.g., current sources to create external magnetic bias fields).

[0005] The type of qubit also determines the requisite timing characteristics of the control system. As understood by those trained in the art, different types of qubits have different coherence times. To prevent the loss of fidelity caused by decoherence of the qubits, quantum computers are generally designed to execute a quantum circuit in a time span that is less than the coherence time of its qubits. Some qubits (e.g., superconducting charge qubits like transmons and superconducting flux qubits like fluxonium) have coherence times between tens of microseconds and a few milliseconds. Such short coherence times require that each quantum gate of the quantum circuit be executed quickly (e.g., less one microsecond), as compared to types of qubits having much longer coherence times. Furthermore, a short coherence time tends to limit the circuit depth (i.e., the number of quantum gates that can be executed sequentially).

[0006] By comparison, certain other types of qubits have significantly greater coherence times. For example, qubits encoded in nuclear spin states of cold trapped atoms (e.g., strontium) may achieve coherence times in excess of ten seconds. As another example, some species of single trapped atomic ions may achieve coherence times in excess of one hour. These longer coherence times essentially eliminate decoherence as a contributing factor to infidelity.

[0007] One aspect of the present embodiments is the realization that quantum computers using high-coherence qubits (i.e., qubits having relatively long coherence times) may execute quantum gates more slowly than quantum computers using low-coherence qubits. Slower quantum-gate execution relaxes the timing needs of the control system as well as many of the instruments and devices that the control system controls. As a result, the control system may be designed and implemented using a variety of (classical) computing architectures and control flow structures that are not practical for quantum computing with low-coherence qubits.

[0008] Advantageously, the control systems and methods of the present embodiments are capable of implementing non- sequent! al mid-circuit control flow. Herein, the term “sequential” means that the control flow structure has individual steps, or statements, that are executed serially, in a determined order, and without any branches. Accordingly, the term “nonsequential” means that the control flow structure has at least one branch. The control flow of the present embodiments is “mid-circuit” in that the control flow structure contains branchstatements that are evaluated during execution of the quantum circuit. Thus, the branch of a non-sequential control flow structure that is selected is determined using information obtained during runtime (i.e., after execution of the quantum circuit has started). Such information may be obtained, for example, via a mid-circuit measurement. By contrast, the steps of a sequential control flow structure may be determined entirely before runtime.

[0009] Although sequential control flow is simple to implement, its determinism limits its utility for practical quantum computing. By comparison, non-sequential mid-circuit control flow allows for entirely new classes of quantum circuits to be implemented. For example, one important application of non-sequential mid-circuit control flow is quantum error correction, a set of techniques which uses mid-circuit measurements to advantageously detect and correct qubit errors that may arise during quantum-circuit execution. Quantum error correction advantageously improves fidelity, in turn allowing quantum circuits of greater depth to be executed. Another application of non-sequential mid-circuit control flow is loading of cold atoms into an array, as described in more detail below. Other applications include, but are not limited to, cluster-state quantum computing, quantum state validation, conditional qubit control, adaptive quantum computations (e.g., updating parameters of parameterized quantum circuits), and qubit reuse.

[0010] The present embodiments include controllers that implement non-sequential mid-circuit control flow of quantum computers. These controllers include various singlechannel controllers, each of which may only output one control signal. These controllers also include various multi-channel controllers, each of which may output more than one control signal at any given time. The present embodiments also include control systems that are created by combining one or more of these controllers. Accordingly, the embodiments may be readily scaled (e.g., by increasing the number of controllers, increasing the number of channels within each controller, or both) to generate thousands of control signals, or more.

[0011] The present embodiments are particularly advantageous for quantum computers that use high-coherence qubits, as the long coherence times gives the present embodiments sufficient time to implement non-sequential mid-circuit control flow. However, the present embodiments may also be used to implement sequential control flow structures. Furthermore, the present embodiments may also be used with quantum computers whose qubits have shorter coherence times. More generally, the present embodiments may be used for any kind of quantum-engineered system. In addition to quantum computers, examples of quantum- engineered systems include, but are not limited to, quantum annealers, quantum simulators, quantum sensors (e.g., cold-atom gyroscopes, magnetometers, and accelerometers), andquantum experiments. The present embodiments may also be used to control systems and devices that are non-quantum.

[0012] In embodiments, a quantum-computing control system includes a script processor, an instruction memory, an instruction fetcher, and a waveform player. The instruction memory stores a plurality of local instructions forming a local instruction set. The script processor executes a local script and transmits to the instruction fetcher a sequence of fetch commands that is based on the local script. The instruction fetcher retrieves, based on each fetch command of the sequence of fetch commands, a fetched instruction from the instruction memory. The fetched instruction belongs to the local instruction set. The instruction fetcher also transmits, to the waveform player, the fetched instruction as one of a sequence of fetched instructions. The waveform player executes the sequence of fetched instructions to generate a digital waveform. In some embodiments, the quantum-computing control system further includes a digital-to-analog converter that transforms the digital waveform into an analog waveform.BRIEF DESCRIPTION OF THE FIGURES

[0013] FIG. 1 is a functional diagram of a quantum computer that executes quantum circuits using a quantum register having a plurality of qubits.

[0014] FIG. 2 is a block diagram of a solution stack for the quantum computer of FIG. 1, in embodiments.

[0015] FIG. 3 is a functional diagram of a single-channel controller for a quantum computer, in embodiments.

[0016] FIG. 4 is a functional diagram of a multi-channel controller for a quantum computer, in embodiments.

[0017] FIG. 5 is a flowchart of a method for loading cold atoms into an array, in embodiments.

[0018] FIG. 6 is a functional diagram of a single-channel controller for a quantum computer, in embodiments.DETAILED DESCRIPTION

[0019] FIG. l is a functional diagram of a quantum computer 100 that executes quantum circuits using a quantum register 104 having a plurality of qubits 116. The quantum computer 100 includes a quantum-computing control system 118 that generates control signals 112 used to prepare, manipulate, drive, and probe one or more of the qubits 116. The quantum computer100 also includes a detector system 136 that measures the states of the qubits 116. Although not shown in FIG. 1, the quantum computer 100 may include additional components that include, but are not limited to, classical computing devices for processing the output of the detector system 136, processing instructions for executing quantum gates, monitoring the status of the quantum computer 100, data storage, and interfacing with external users. The detector system 136 and control system 118 may communicate with each other and these additional components via a computer network 106 (e.g., a local-area network or wide-area network).

[0020] The quantum-computing control system 118 includes one or more controllers 102 that generate the control signals 112. As described in more detail below, the controllers 102 all have a similar architecture. In the example of FIG. 1, the control system 118 includes a first controller 102(1) that outputs a first control signal 112(1) and a second control signal 112(2), a second controller 102(2) that outputs a third control signal 112(3), and a third controller 102(3) that outputs a fourth control signal 112(4), a fifth control signal 112(5), and a sixth control signal 112(6). While FIG. 1 shows the control system 118 with three controllers 102, the control system 118 may alternatively have one, two, or more than three controllers 102. While FIG. 1 shows the controllers 102(1), 102(2), and 102(3) generating two, one, and three control signals 112, respectively, each controller 102 may, in general, generate any number of one or more control signals 112. Each of the control signals 112 may be digital (e.g., timing triggers) or analog (e.g., synthesized sine waves, or tones).

[0021] The present embodiments may be used with quantum computers based on any type of qubit. For example, FIG. 1 shows each qubit 116 as a cold, trapped neutral atom. It is assumed that all of the qubits 116 are of the same atomic species, which may be bosonic or fermionic. The atomic species may be a specific isotope of an alkaline-earth metal (e.g., strontium-87, strontium-88, ytterbium, calcium, etc.), in which case each qubit 116 may be formed from two different nuclear spin sublevels of the atomic species’ ground state. Alternatively, the atomic species may be a specific isotope of an alkali metal (e.g., rubidium- 87, rubidium-85, cesium-133, etc.), in which case each qubit 116 may be formed from two sublevels of the atomic species’ two ground-state hyperfine levels. Regardless of atomic species, each qubit 116 may alternatively be formed from two Rydberg energy levels. Accordingly, the present embodiments may be used with quantum computers based on Rydberg atoms.

[0022] As alternatives to trapped neutral atoms, the qubits 116 may be trapped atomic ions, trapped neutral molecules, or trapped molecular ions. Alternatively, the qubits 116 may be superconducting qubits (e.g., transmons), molecular defects or color centers (e.g., nitrogen-vacancy centers in diamond), photons (e.g., linear optical quantum computing), or phonons. The qubits 116 may be any other type of qubit known in the art without departing from the scope hereof. It should therefore be appreciated that the present embodiments work with qubits having a wide range of coherence times, from microseconds (or less) up to minutes (or more).

[0023] FIG. 1 shows the qubits 116 forming a two-dimensional array. For example, when the qubits 116 are cold neutral atoms, each atom may be trapped in the antinode of an optical lattice. The qubits 116 may alternatively form a one-dimensional array, a three- dimensional array, or a non-rectangular array (e.g., a circular array, hexagonal array, etc.). In FIG. 1, the detector system 136 includes a camera 108 (e.g., a scientific CMOS or CCD camera) that images the qubits 116 by detecting fluorescence 110 emitted when the qubits 116 are resonantly driven with a laser beam. The detector system 136 also includes an image processor 138 that processes images generated by the camera 108. The image processor 138 may provide the images, or data generated therefrom, to other components of the quantum computer 100 via the computer network 106. The detector system 136 may alternatively use a different type of detector, depending on the type of qubits 116 For example, the quantum state of a superconducting transmon may be detected by measuring the phase shift of a microwave probe signal that reflects off of the transmon.

[0024] In FIG. 1, the qubits 116 are controlled by a first laser beam 120(1), a second laser beam 120(2), and a third laser beam 120(3). The first control signal 112(1) and second control signal 112(2) drive a first modulator 122(1) and a second modulator 122(2), respectively, to modulate the first laser beam 120(1). The third control signal 112(3) drives a third modulator 122(3) to modulate the second laser beam 120(2). The fourth control signal 112(4), fifth control signal 112(5), and sixth control signal 112(6) drive a fourth modulator 122(4), a fifth modulator 122(5), and a sixth modulator 122(6), respectively, to modulate the third laser beam 120(3). It should be understood that the use of three laser beams 120 in FIG. 1 is just an example. In practice, the quantum computer 100 may use dozens of laser beams or more.

[0025] Each of the modulators 122 modulates one or more properties of its respective laser beam 120. Examples of such properties include, but are not limited to, phase, frequency, amplitude, polarization, propagation direction, and transverse spatial profile. Examples of the modulators 122 include, but are not limited to, electro-optic modulators (e.g., Pockels cells), acousto-optic modulators, liquid crystal modulators, optical shutters, Mach-Zehnder interferometers, and spatial-light modulators (e.g., phase-only, amplitude-only, or phase-and-amplitude). The modulators 122 may be free-space components, fiber-optic components, chipbased components (e.g., as part of a photonic integrated circuit), or any combination thereof.

[0026] In some cases, one or more of the control signals 112 changes a property of a laser beam 120 by controlling the laser that generates the laser beam 120. For clarity, the lasers generating the laser beams 120(1), 120(2), and 120(3) are not shown in FIG. 1. For example, a control signal 112 may be used to drive a piezoelectric transducer that changes the length of an external cavity of the laser, thereby changing the frequency of its emitted laser beam 120. One or more of the control signals 112 may also be used to control other non-optical components. Examples of such non-optical components include, but are not limited to, electronic drivers for generating external magnetic fields, RF / microwave circuitry (e.g., IQ modulators and demodulators, frequency generators and sources, switches, etc.), vacuum equipment, and atomic sources (e.g., Zeeman slowers, non-evaporable getters, etc.). Accordingly, the control signals 112 may be used to change the properties of RF and microwave fields instead of the laser beams 120. Controlling RF and microwave fields in this manner is particularly useful for quantum computing with microwave qubits (e.g., superconducting transmons).

[0027] FIG. 2 is a block diagram of a solution stack 200, in accordance with some of the present embodiments. The solution stack 200 is a set of subsystems, components, and tools, both hardware and software, that cooperate to execute quantum circuits and algorithms with the quantum computer 100 of FIG. 1. In particular, the solution stack 200 shows how the quantumcomputing control system 118 of FIG. 1 fits within the overall framework of quantum-circuit execution. At the bottom of the solution stack 200 are the qubits 116, the most fundamental resource of any quantum computer.

[0028] The solution stack 200 includes an application programming interface (API) 204 through which external users may submit quantum circuits and algorithms to execute with the quantum computer 100. Users may also retrieve the execution results via the API 204. The API 204 forwards the quantum circuit 202 (or other type of quantum algorithm), which is written in a high-level quantum programming language 210 (e.g., OpenQASM).

[0029] The solution stack 200 also includes a high-level compiler 208 that compiles the quantum circuit 202, based on the high-level quantum programming language 210, into intermediate-representation (IR) code 212. The solution stack 200 also includes a quantum-gate domain-specific language (DSL) compiler 214 that compiles the IR code 212, based on a quantum-gate DSL 216, to express the quantum circuit 202 as DSL code 218. Specifically, the DSL code 218 describes the quantum circuit 202 in terms of quantum gates that are native to the quantum computer 100.

[0030] The solution stack 200 also includes a low-level compiler 220 that compiles the DSL code 218 into signal sequences 222. The signal sequences 222 are descriptions of the control signals 112 for executing the quantum circuit 202 with the qubits 116. These descriptions are used by the controllers 102 to generate the control signals 112, as described in more detail below.

[0031] The solution stack 200 also includes a sequence compiler 224 that compiles the signal sequences 222 into a job 226. As shown in FIG. 2, the solution stack 200 also includes a job queue 228 that stores and manages several jobs to ensure that only one job executes at a time. In the example of FIG. 2, the job queue 228 outputs a job 230 to the controllers 102 for execution.Single-Channel Controller

[0032] FIG. 3 is a functional diagram of a single-channel controller 300 for a quantum computer, in accordance with some of the present embodiments. Each of the controllers 102 of FIG. 1 may include one or more instances of the single-channel controller 300, and therefore the single-channel controller 300 may be used as part of the quantum-computing control system 118 of FIG. 1. Advantageously, the single-channel controller 300 may be used with the quantum computer 100 of FIG. 1 to implement mid-circuit control flow that is non-sequential, as described in more detail below. The controller 300 is “single-channel” in that it has only one output, and therefore may be used to generate only one of the control signals 112 of FIG. 1 at any given time. In the example of FIG. 3, this one output is an analog control signal 312.

[0033] The single-channel controller 300 includes a script processor 306 that executes, or runs, a local script 302 to generate and output a sequence 320 of fetch commands that is based on the local script 302. Each fetch command of the sequence 320 is shown in FIG. 3 as a white box. The local script 302 includes machine-readable instructions that are interpreted and executed by the script processor 306 at runtime. Thus, each of these machine-readable instructions is a primitive that is native to the script processor 306. The local script 302 may have been previously generated (i.e., prior to runtime) by compiling a higher-level source code into the machine-readable instructions (e.g., by the high-level compiler 208, the quantum-gate DSL compiler 214, and the low-level compiler 220 of FIG. 2). Alternatively, the local script 302 may have been generated by translating the source code into the machine-readable instructions, or a combination of translating the source code and compiling the source code. In some embodiments, the local script 302 is compiled, either entirely or in part, by the script processor 306.

[0034] The single-channel controller 300 also includes an instruction memory 308 and an instruction fetcher 310 in electronic communication with each other. The instruction memory 308 stores a set of m local instructions 326(1). . .326(m) that collectively form a local instruction set 304, where m is a positive integer. The instruction fetcher 310 is a processor that, in response to processing each fetch command of the sequence 320, retrieves or “fetches” a fetched instruction 316 from the instruction. The fetched instruction 316 is one of the m local instructions 326. The instruction fetcher 310 outputs the fetched instruction 316 as one of a sequence 314 of fetched instructions. Each of these fetched instructions is shown in FIG. 3 as a shaded box. The instruction fetcher 310 need not delete any of the m local instructions 326 in the instruction memory 308 after fetching, thereby allowing the m local instructions 326 to be fetched again.

[0035] In some embodiments, the instruction memory 308 stores each of the local instructions 326 starting at a respective one of a plurality of memory offsets (or memory addresses). Each fetch command includes a specified memory offset (of specified memory address) that is one of the plurality of memory offsets. The instruction fetcher 310 then fetches the fetched instruction from the instruction memory 308 starting at the specified memory offset.

[0036] The single-channel controller 300 also includes a waveform player 330 that executes the sequence 314 of fetched instructions to generate a digital waveform 338. The waveform player 330 includes a waveform-player (WP) processor 332 having a set of r internal registers 318(1). , .318(r), where r is a positive integer. The WP processor 332 stores at least part of the digital waveform 338 in an internal register or other type of internal memory (e.g., cache, distributed RAM, block RAM, etc.). The WP processor 332 may store additional or alternative data without departing from the scope hereof. The WP processor 332 may additionally communicate with an external memory (e.g., RAM) when the WP processor 332 has insufficient internal memory to perform its functionality.

[0037] The WP processor 332 executes the sequence 314 of fetched instructions sequentially, i.e., one-at-a-time and in the same order in which they were received. Here, the term “directly” means that the WP processor 332 executes the sequence 314 without compilation or translation. Each of the m local instructions 326, when executed by the WP processor 332, controls the waveform player 330 in a particular way. The sequence 314, when executed by the WP processor 332, controls the waveform player 330 to generate the digital waveform 338.

[0038] In the example of FIG. 3, the waveform player 330 also includes a digital-to- analog converter (DAC) 336 in electronic communication with the WP processor 332. The WPprocessor 332 sends the digital waveform 338 to the DAC 336, which converts the digital waveform 338 into an analog waveform that is then outputted as the analog control signal 312. To minimize latency and reduce memory usage, the WP processor 332 may output points of the digital waveform 338 as they are generated (e.g., one at a time or a few at a time). Accordingly, the analog control signal 312 may begin to be outputted before the WP processor 332 has finished generating the digital waveform 338. Although not shown in FIG. 3, an external amplifier may be used to amplify, buffer, isolate, filter, or otherwise transform the output of the DAC 336 to generate the analog control signal 312. Such an amplifier may be considered part of the waveform player 330. Alternatively, this amplifier may be considered separate from the waveform player 330.

[0039] In other embodiments, the waveform player 330 outputs the digital waveform 338 as a digital control signal instead of the analog control signal 312. In these embodiments, the DAC 336 may be replaced with digital circuitry that converts the digital waveform 338 into the digital control signal. Examples of such digital circuitry include, but are not limited to, digital buffers, line drivers, isolators (e.g., opto-isolators), logic translators, level shifters, and digital logic gates. Such digital circuitry may be considered part of the waveform player 330. Alternatively, this digital circuitry may be considered separate and distinct from the waveform player 330.

[0040] The script processor 306 may be any type of circuit capable of performing logic, control, and input / output operations. This circuit may be a single integrated circuit (i.e., a “chip”) or a multi-chip architecture. Examples of the script processor 306 include, but are not limited to, a central processing unit (CPU) with one or more cores, a graphics processing unit (GPU), a digital signal processor (DSP), a field-programmable gate array (FPGA), a microcontroller unit (MCU), an application-specific integrated circuit (ASIC), and combinations thereof (e.g., a system-on-chip (SoC)). Although not shown in FIG. 3, the script processor 306 may include other elements for managing data flow, communicating with other circuits (e.g., the DAC 336), and interfacing with other external components. Examples of such elements include, but are not limited to, memory controllers (e.g., for communicating with external RAM chips), bus controllers, and input / output hardware resources. Each of the WP processor 332 and the instruction fetcher 310 may similarly be any type of circuit capable of performing logic, control, and input / output operations.

[0041] In some embodiments, the WP processor 332 includes an FPGA or similar type of programmable logic. In these embodiments, the functionality of the waveform player 330 is implemented by physically configuring the FPGA’s logic to directly execute each of thesequence 314 of fetched instructions. The FPGA may have sufficient embedded memory (e.g., block RAM) to implement all of the registers 318. However, if more memory is needed, the FPGA may interface with external memory to expand its storage capacity. The FPGA may also be paired with an on-chip CPU to form a system-on-chip (SoC). This on-chip CPU may be used, for example, to implement the instruction fetcher 310, the script processor 306, or both. Some SoCs also have one or more integrated on-chip DACs (e.g., radio-frequency SoCs, or RFSoCs). In this case, the waveform player 330 may be implemented entirely as a single-chip architecture. If the SoC has enough embedded memory to store the entirety of the local instruction set 304, then the entirety of the single-channel controller 300 may be implemented using a single SoC chip. Furthermore, since some RFSoC chips include several DACs (e.g., 8 or 16), it is possible to use one SoC chip as part of several different waveform channels (e.g., see the waveform-generator array 410 of FIG. 4).

[0042] Generating the digital waveform 338 by executing fetched instructions 316 during runtime (i.e., when the digital waveform 338 is outputted) is advantageous when the waveform player 330 has limited memory. For example, the internal memory storing the digital waveform 338 may be too small to store the entirety of the digital waveform 338 prior to outputting. Accordingly, the waveform player 330 advantageously saves memory by only generating and outputting one digital waveform at a time, as it is needed during runtime. However, if the waveform player 330 has sufficient memory, either internal to the WP processor 332 (e.g., registers, cache, block RAM, distributed RAM, etc.) or external to the WP processor 332 (e.g., an external memory chip, memory module, or memory rank), one or more digital waveforms may be pre-generated (e.g., by the waveform player 330, the script processor 306, the sequence compiler 224, etc.) and stored in the waveform player 330 before these digital waveforms are needed. In this case, the waveform player 330 may execute a fetched instruction 316 to simply transfer one of these pre-generated digital waveforms from the memory to the DAC 336. Although the use of pre-generated digital waveforms in this manner uses more memory, as compared to the example shown in FIG. 3, it may reduce the requisite computational resources of the WP processor 332 by allowing waveform generation to occur prior to runtime.Multi-Channel Controller

[0043] FIG. 4 is a functional diagram of a multi-channel controller 400 for a quantum computer, in accordance with some of the present embodiments. Each of the controllers 102 of FIG. 1 may be an instance of the multi-channel controller 400, and therefore the multi-channelcontroller 400 may be used as part of the quantum-computing control system 118 of FIG. 1. The multi-channel controller 400 is similar to the single-channel controller 300 of FIG. 3 except that it generates and outputs multiple control signals. Like the single-channel controller 300 of FIG. 3, the multi-channel controller 400 may be used with the quantum computer 100 to advantageously implement mid-circuit control flow that is non-sequential. The multi-channel controller 400 is also referred to as “Hapyxelor” in the related provisional application.

[0044] The multi-channel controller 400 may be thought of as a combination of several instances of the single-channel controller 300 of FIG. 3. However, some embodiments of the multi-channel controller 400 use one or more centralized components for all of the channels, as described in more detail below (e.g., the script processor 406 and the job processor 416). This centralization eliminates redundant components, as compared to the aforementioned combination of single-channel controllers. Accordingly, the multi-channel controller 400 is therefore smaller, more efficient, easier to construct, and faster to test and diagnose than this combination.

[0045] The multi-channel controller 400 includes a waveform -generator array 410 having n waveform channels 434, where n is a positive integer that may be as large as several hundred, or more. When n equals 1, the multi-channel controller 400 is equivalent to the singlechannel controller 300 of FIG. 3. Although not shown in FIG. 4, each waveform channel 434(f), where i is an index running from 1 to n, includes an instruction fetcher similar to the instruction fetcher 310 of FIG. 3, an instruction memory similar to the instruction memory 308 of FIG. 3, and a waveform player similar to the waveform player 330 of FIG. 3. Loaded into the instruction memory of the waveform channel 434(f) is a local instruction set 404(i) that is similar to the local instruction set 304 of FIG. 3. The instruction fetcher of the waveform channel 434(f) processes a sequence 420(i) of fetch commands that is similar to the sequence 320 of FIG. 3. The waveform channel 434(f) processes the sequence 420(i) of fetch commands to generate and output a respective analog control signal 412(f) similarly to how the single-channel controller 300 of FIG. 3 processes the sequence 320 to generate and output the analog control signal 312.

[0046] FIG. 4 shows the waveform-generator array 410 generating and outputting n analog control signals 412(1). . ,412(n). However, the waveform-generator array 410 may alternatively output n digital control signals or a combination of analog and digital control signals. For clarity, FIG. 4 represents the analog control signal 412(1). . ,412(n) as sine waves. However, each of the analog control signals 412(1). . ,412(n) may be another type of waveform,such as a triangle wave, square wave, sawtooth wave, modulated waveform (e.g., amplitude- modulated sine wave, frequency-modulated sine wave, etc.), a piece-wise waveform, and so on.

[0047] When the waveform-generator array 410 outputs one or more digital control signals, each of these digital control signals may be a trigger or waveform sequence that implements a logic family (e.g., a TTL, ECL, CMOS, etc.) for communicating with, and thereby controlling, an external device or instrument. The digital control signal may be used to program the external device. In this case, it may be necessary to begin outputting the digital control signal sufficiently early to compensate for any latency introduced by the external device receiving and processing the digital control signal.

[0048] The multi-channel controller 400 also includes a script processor 406 that executes, or runs, a local script 402(i) for the respective waveform channel 434(f) to generate the sequence 420(i) of fetch commands. Thus, the script processor 406 is similar to the script processor 306 of FIG. 3 except that it executes local scripts 402(1 )...402(n) for all of the waveform channels 434(1). . ,434(n). The script processor 406 advantageously replaces n of the script processor 306. However, to increase speed the multi-channel controller 400 may alternatively use more than one of the script processor 406 to execute the local scripts 402. In particular, the multi-channel controller 400 may include n script processors that are uniquely assigned to the waveform channels 434(1). . ,434(n). In this case, each of the n script processors only processes the local script 402(i) of the respective waveform channel 434(f) to which it was assigned.

[0049] The multi-channel controller 400 also includes a job processor 416 that sends the local instruction set 404(i) to the respective waveform channel 434(f). In turn, the waveform channel 434(f) which stores the local instruction set 404(i) in its instruction memory. As shown in FIG. 4, the job processor 416 sends all of the local instruction sets 404(1 )...420(n) to the waveform channels 434(1). . ,434(n), respectively. Alternatively, the multi-channel controller 400 may include more than one of the job processor 416 to send the local instruction sets 404(1). . ,420(n) to the waveform channels 434(1). . ,434(n).

[0050] The job processor 416 may also be used to communicate with devices external to the multi-channel controller 400. For example, FIG. 4 shows the job processor 416 receiving, via the computer network 106 (see FIG. 1), a job 230 (see FIG. 2) from an external computer system implementing the job queue 228 of FIG. 2. The job 230 includes: (i) all of the local instruction sets 404(1). . ,404(n) and (ii) all of the local scripts 402(1). . ,402(n). The jobprocessor 416 then (i) forwards the local scripts 402(1). . ,402(n) to the script processor 406 and (ii) forwards the local instruction set 404(i) to the respective waveform channel 434(f).

[0051] Like the script processor 306 of FIG. 3, the script processor 406 may be any type of circuit capable of performing logic, control, and input / output operations. This circuit may be a single integrated circuit (i.e., a “chip”) or a multi-chip architecture. Examples of the script processor 306 include, but are not limited to, a CPU (with one or more cores), GPU, DSP, FPGA, MCU, ASIC, SoC, etc. To accommodate simultaneous execution of the local scripts 402, the script processor 406 may implement one or more forms of parallelism, such as multithreading and multiprocessing. Although not shown in FIG. 4, the script processor 406 may include other elements for managing data flow and communicating with other external circuits and components (e.g., the job processor 416). Examples of such elements include, but are not limited to, memory controllers, bus controllers, and input / output hardware resources. Like the script processor 406, the job processor 416 may also be any type of circuit capable of performing logic, control, and input / output operations.

[0052] In embodiments, each local instruction set 404(i) is constructed specifically for its respective waveform channel 434(f). It is therefore not necessary that all of the local instruction sets 404(1). . ,404(n) be identical. The local instruction sets 404 may have different numbers of local instructions 326 (see the number m of local instructions 326 in the local instruction set 304 of FIG. 3). Which local instructions 326 are included in the local instruction set 404(i) may depend, at least in part, on the particular instrument being controlled as well as the intended functionality of the instrument (e.g., to implement certain quantum circuits). Since the quantum computer 100 of FIG. 1 may use a wide variety of instruments, the waveform channels 434 are likely (although not necessarily) to have local instruction sets 404 that differ from each other. However, for certain instruments two or more the local instruction sets 404 may be identical. Furthermore, certain local instructions 326 may be included in two or more of the local instruction sets 404, in which case these local instruction sets 404 may be partially, but not entirely, identical.

[0053] Since the waveform channels 434 may both fetch instructions and execute these fetched instructions independently of each other, the analog control signals 412 may have various temporal relationships with respect to each other. For example, the start times at which one or more of the analog control signals 412 start may come before or after the start times at which one or more of the other analog control signals 412 start. Alternatively, one or more of the analog control signals 412 may start simultaneously (i.e., have start times that are identical). Similarly, the end times at which one or more of the analog control signals 412 end may comebefore or after the end times that one or more of the other analog control signals 412 end. Alternatively, one or more of the analog control signals 412 may end simultaneously (i.e., have end times that are identical). The durations of the analog control signals 412 also need not be identical. Thus, some of the analog control signals 412 may have durations that are longer than, shorter than, or the same as the durations of one or more of the other analog control signals 412. There is also no requirement regarding temporal overlap of the analog control signals 412. Thus, the start times at which one or more of the analog control signals 412 start may occur after the end times at which one or more of the other analog control signals 412 end.

[0054] In some embodiments, the multi-channel controller 400 also includes a shared memory 408 that electronically communicates with both the job processor 416 and the script processor 406. In the example of FIG. 4, the shared memory 408 is shown storing a status flag 436 and results 438. The job processor 416 receives the results 438 from an external computing device (e.g., via the computer network 106) and stores the results 438 in the shared memory 408. The job processor 416 also switches the value of the status flag 436 to indicate that the results 438 have been received and updated in the shared memory 408. As described in more detail below, the script processor 406 may use the results 438 to implement non-sequential midcircuit control flow. In this case, the job processor 416 writes the results 438 to the shared memory 408 both after execution of the quantum circuit has started (i.e., after outputting of one or more of the analog control signals 412 has begun) and before execution of this quantum circuit has finished. The job processor 416 may reset the status flag 436 prior to execution of each quantum circuit.Local Instruction Sets

[0055] In some embodiments, the local instruction set 304 of FIG. 3 includes the following set of functions:Play_Wavef orm (duration, f lags ) : Generate and output a digital waveform (e.g., the digital waveform 338 of FIG. 3) for an amount of time set by duration. The digital waveform is generated according to one or more f lags, as described in more detail below.Write_Register (address , value) : Write value to a register of the waveform player (e.g., one of the registers 318 of the waveform player 330 of FIG. 3) identified by address.Wait_For_Trigger ( trigger_line) : Pause the waveform player until a trigger (e.g., see trigger 324 in FIG. 3) is detected on a hardware line identified by trigger_line. In response to receiving the trigger, the waveform player resumes execution of fetched instructions (e.g., the sequence 314 of fetched instructions in FIG. 3).Halt ( ) : Stop the waveform player from executing fetched instructions.Some of these functions take one or more function parameters (e.g., Play_Wavef orm takes duration and f lags, Wait_For_Trigger takes trigger_line, etc.) while others take no function parameters (e.g., Halt). In the former case, the specific values of the function parameters form part of the corresponding local instruction 326. To use the same function with different values for the function parameters, a different local instruction 326 is created and stored in the instruction memory 308 as part of the local instruction set 304. Accordingly, the same function may be used for several of the local instructions 326 of the local instruction set 304. Similarly arguments hold for the local instruction sets 404 of FIG. 4.

[0056] The local instructions 326, as stored in the instruction memory 308, may be encoded in an intermediate representation, such as bytecode (also known as portable code or p- code). Table 1 illustrates one example of how the set of functions of the local instruction set 304 may be implemented as 64-bit bytecode chunks. Each line of Table 1 is a different bytecode chunk implementing a call to a different function (with function parameters, where applicable).Table 1 : Example of functions implemented as bytecode.As shown in Table 1, each bytecode chunk has a three-bit opcode (bits 61-63), an eleven-bit opval (bits 50-60), and a fifty-bit payload (bits 0-49). A function may be uniquely identified by only its opcode. For example, the function Play_Wavef orm is identified by opcode 1 while the function Write_Register is identified by opcode 6. In these cases, opval and payload are each available to pass function parameters (e.g., f lags and duration) to the waveform player 330. Alternatively, a function may be identified by a unique combination of its opcode and opval. For example, the function Halt is identified by opcode 0 and opval 1. In this case, only the payload is available to pass a function parameter to the waveform player 330.

[0057] It should be understood that Table 1 is just one example of how to encode the local instructions 326. Accordingly, the local instructions 326 may be encoded in any of a number of other ways without departing from the scope hereof. For example, while the three- bit opcodes in Table 1 allow 23= 8 different functions, or groups or functions, to be uniquely identified, the opcodes may use a different number of bits to accommodate a different number of functions (e.g., 4 bits for uniquely identifying up to 16 functions, 8 bits for uniquely identifying up to 256 different functions, etc.). Similarly, the opvals and payloads may have different sizes than shown in Table 1. Furthermore, each bytecode chunk may have more than one payload, more than one opval, or both. Nevertheless, to ensure fast and efficient operation of the waveform player 330, the sizes of the opcodes, opvals, and payloads should be selected to be no larger than necessary. Finally, while Table 1 shows function calls encoded as bytecode, the local instructions 326 may be alternatively encoded using another type of intermediate representation (e.g., three-op code, parsing trees, etc.), object code, machine code, assembly code, or instruction set.

[0058] In some embodiments, the controller 300 is configured to execute local instructions that are not included in the local instruction set 304. For example, the script processor 306, in response to executing the local script 302, may transmit a write-instruction command to the instruction fetcher 310 in lieu of a fetch command. The write-instruction command includes (e.g., as a payload) a standalone instruction to be executed by the WP processor 332. The instruction fetcher 310, in response to processing the write-instruction command, transmits the standalone instruction to the waveform player 330 without accessing the instruction memory 308. Similar functionality may be implemented in one or more of the waveform channels 434 of the multi-channel controller 400 of FIG. 4.Playing Waveforms

[0059] The function Play_Wavef orm may be implemented with several modes and function parameters with which a wide variety of waveforms may be generated. This simplifies deployment since the same function may be used with several waveform channels that need different types of waveforms for controlling different instruments and devices. For example, the function Play_Wavef orm may be used to generate a sine wave that is static (i.e., a tone having a single fixed frequency and a single fixed amplitude), linearly swept (i.e., having a frequency that varies linearly in time), nonlinearly swept (e.g., having a frequency that varies nonlinearly in time), linearly ramped (i.e., having an amplitude that varies linearly in time), or nonlinearly-ramped (i.e., having an amplitude that varies nonlinearly in time). Equivalently, the sine wave may be unmodulated, amplitude modulated, frequency modulated, phase modulated, or a combination thereof. Consecutive calls of the function Play_Wavef orm may be used to generate a piecewise waveform, where each call generates one segment of the piecewise waveform.

[0060] When the WP processor 332 executes Play_Wavef orm, one or more of the registers 318 are updated with values that are based on the new waveform to be generated. The registers 318 may be updated with values stored in external memory or values passed to the WP processor 332 as part of the fetched instruction 316 containing the call to Play_Wavef orm (e.g., the function parameters f lags and duration, as described above). Alternatively or additionally, one or more of the registers 318 may be updated prior to executing Play_Wavef orm by calling the Write_Register function.

[0061] The WP processor 332 generates the digital waveform 338 as a sequencehaving nd+ 1 digital valuesy[ndAt] . In this particular example, the digital values are uniformly separated by a time interval At. Each digital value ynidentifies an output level (e.g., voltage or current) of the DAC 336 at the time tn= nAt, where the first digital value y0identifies the value of the digital waveform 338 at a start time t0= 0 and the last digital value yndidentifies the value of the digital waveform 338 at the end time tn= duration. Although not shown in FIG. 3, the WP processor 332 may additionally store, in the registers 318 or other memory (e.g., cache, external RAM, distributed memory, block memory, etc.), the time interval At, duration (or, equivalently, nd), and a counter i that identifies the digital value y^t^) = y[iAt] that the WP processor 332 is currently calculating. The time interval At is no smaller than the update time (i.e., the inverseof the update rate) of the DAC 336, and therefore is usually fixed. Accordingly, it is usually not necessary to update the time interval At between subsequent calls to Play_Wavef orm.

[0062] For each value of the counter i, the WP processor 332 calculates the respective time ti = iAt, the respective amplitude value A^ti) at the time tt, and the respective frequency value£(t£) atthe time t£. The WP processor 332 then calculates y£(t£) =+< >0) to obtain the corresponding digital value y[t£], where (pQis a constant initial phase value that is stored in one of the registers 318. The digital value y[t£] is then outputted to the DAC 336. This process is iterated by incrementing the counter i by 1 and calculating the next digital value y[t£+1], The iterations stop when the counter i reaches nd. The amplitude value£(t£) and frequency valueare stored in the WP processor 332 (e.g., the registers 318, cache, distributed memory, block memory, etc.) and may be updated with each iteration. For the case where the amplitude value£(t£) = Acis a constant, there is no need to update the constant amplitude value Acwith each iteration. Similarly, when the frequency value= fcis a constant, there is no need to update the constant frequency value fcwith each iteration.

[0063] Table 2 is a list of variables that may be used by Play_Wavef orm to generate waveforms. These variables may be stored in the registers 318.Table 2: Example of variables for generating analog sinusoidal waveforms.In the example of Table 2, a flag (e.g., one of the f lags included in the call to Play_Wavef orm) instructs the WP processor 332 to perform either (i) nonlinear ramping of the amplitude A(t) via an external amplitude-modulation waveform or (ii) linear ramping ofthe amplitude A(t). The nonlinear ramping is “external” in that the WP processor 332 does not calculate the amplitudes A(t). Rather, the register ARB_START_ADDRESS identifies a memory address where a sequence of nonlinear amplitude values A^ti), already calculated, is stored. For each value of the counter i, the WP processor 332 retrieves the next amplitude value Aifti) based on the address stored in this register. For linear ramping, the WP processor 332 “internally” calculates the next amplitude value j(tj) based on AMPL_START and AMPL_INCREMENT.

[0064] For frequency sweeping, another flag instructs the WP processor 332 to perform either (i) nonlinear sweeping of the frequency (t) or (ii) linear sweeping of the frequency f(t). For nonlinear frequency sweeping, one or more of the registers 318 may be used to configure the shape of a sigmoidal frequency sweep that smoothly transitions the frequency between initial and final values (as opposed to a step-like frequency jump or a linear frequency sweep that may introduce “kinks” in the resulting waveform). In the example of Table 2, the registers FREQ_RAMP_COEFF, FREQ_RAMP_FREQ, and FREQ_RAMP_PHASE_OFFSET store values for configuring the shape of half-a-cycle of a cosine wave. For linear frequency sweeping, the WP processor 332 calculates the next frequency valuebased on FREQ_START and FREQ_INCREMENT.

[0065] Another flag may be used to determine the value of the initial phase (pQ. In one case, the initial phase (p0is set to an accompanying value that is loaded into the register PHASE. In the other case, the initial phase (p0is set equal to the last value of the phase from the last call to Play_Wavef orm. This latter case allows different segments of a piecewise waveform to be generated with phase continuity across the transition between these segments.

[0066] Using the examples of Table 1 and Table 2, a program segment that calls Play_Wavef orm may look like the following sequence of function calls:Wait_For_Trigger ( trigger_line) ;Write_Register ( <address> , AMPL_START) ;Write_Register ( <address> , AMPL_INCREMENT) ;Write_Register ( <address> , FREQ_START) ;Write_Register ( <address> , FREQ_INCREMENT) ;Write_Register ( <address> , PHASE) ;Play_Wavef orm ( f lags , duration) ;As described above, each of these function calls may be implemented as one of the sequence 314 of fetched instructions that is passed to the waveform player 330 (e.g., as a 64-bit bytecode chunk). The first function call (Wait_For_Trigger) instructs the waveform player 330 to wait until the trigger 324 is received, thereby ensuring that the digital waveform 338 is outputted at the correct time. Five function calls (Write_Register) update five of the registers 318. Finally, the function Play_Wavef orm is called, at which point the WP processor 332 begins generating the digital waveform 338 and the DAC 336 begins converting the digital waveform 338 into the analog control signal 312. To reduce the time delay between the trigger 324 and the generation of the digital waveform 338, one or more of the five function calls to Write_Register may alternatively precede the call to Wait_For_Trigger. Note that the function Wait_For_Trigger, while useful for synchronizing operation between different waveform channels, is not necessary and therefore may be excluded.

[0067] Although not shown in Table 2, nonlinear frequency sweeping may be alternatively implemented using an external frequency-modulation waveform, i.e., a sequence of nonlinear frequency valuesthat is stored in, and retrieved from, a specified memory address. In this case, nonlinear frequency sweeping may be implemented externally, similar to the nonlinear amplitude ramping described above. Similarly, nonlinear amplitude ramping may be implemented internally by specifying parameters for a particular shape of an envelope function. These parameters may be stored in the registers 318. In this case, the WP processor 332 calculates the amplitude values rij(tj) based on these specified parameters.

[0068] In some embodiments, the WP processor 332 generates the digital waveform 338 using phase modulation. The resulting sequence of time-varying phasesmay be calculated similarly to the sequence of time-varying frequenciesdescribed above (e.g., internally according to parameters stored in the registers 318 or externally according to a sequence of phase values stored at a specified address in memory). This phase modulation may be performed in addition to, or as an alternative to, frequency modulation. Like frequency modulation, phase modulation generates frequency sidebands. Accordingly, it is usually not necessary to simultaneously modulate both the phase and frequency of a waveform.

[0069] The functionality of the single-channel controller 300 (FIG. 3) and multichannel controller 400 (FIG. 4), as described above, is not limited to generating only sinusoidal waveforms and may be used to generate other kinds of periodic waveforms (e.g., square waves, sawtooth waves, triangle waves, etc.) and non-periodic waveforms. Furthermore, the controllers 300 and 400 may also each be configured to generate waveforms expressible as an arbitrarysum of two or more sine waves (e.g., a sum of three tones, each with its own amplitude, frequency, and phase). Accordingly, the functionality of the controllers 300 and 400 is not limited to generating multi -frequency waveforms that can be described via modulation of a single tone.

[0070] Table 1 also shows one way to implement loops with the present embodiments. Here, the opcode FLOW has two opvals, 0 and 1, that identify two functions, Loop_S tart and Loop_End, respectively. The function Loop_Start has one function parameter named Loop_Count that identifies the number of iterations to be executed. To perform looping, a program segment first calls Loop_S tart ( Loop_Count ) as a fetched instruction, followed by a sequence of one or more fetched instructions (e.g., calls to Write_Register and Play_Wavef orm, like the example program segment shown above). The program segment then calls Loop_End as another fetched instruction. The program segment iterates over the fetched instructions between the calls to Loop_Start and Loop_End.Local Scripts

[0071] The local scripts described herein (e.g., the local script 302 of FIG. 3 and the n local scripts 402 of FIG. 4) may be written in any programming language (e.g., compiled, embedded, scripting, etc.) that is executable by the script processors described herein (e.g., the script processor 306 of FIG. 3 and the script processor 406, of FIG. 4) to generate a sequence of fetch commands (e.g., the sequence 320 of FIG. 3). One example of such a programming language is Lua, which is advantageously lightweight (i.e., having a small memory footprint), portable, and embeddable. However, the local scripts may be written in another programming language without departing from the scope hereof.

[0072] Another advantage of Lua is its inherent ability to pause script execution, during which time another script, referred to herein as an “addendum” script, executes. In the present embodiments, the script processor pauses execution of a local script it is executing. The script processor then processes an addendum script. After the addendum script has finished executing, the control flow returns to the local script. Thus, addendum scripts may be used to implement, during run-time, different branches of the quantum circuit’s control flow.Non-Sequential Mid-Circuit Control Flow

[0073] FIG. 5 is a flowchart of a method 500 for loading cold atoms (i.e., qubits 116 of FIG. 1) into an array (i.e., the quantum register 104 of FIG. 1), in accordance with some of the present embodiments. The method 500 illustrates how the controllers 102 of FIG. 1 may beused to implement non- sequential mid-circuit control flow of the quantum computer 100. In particular, the method 500 addresses the problem that loading cold atoms into an array does not occur with perfect certainty. Thus, after loading, some of the array sites may still be empty. Furthermore, trapped atoms fall out of the array over time (e.g., due to collisions with background atoms or molecules that are present because the surrounding ultrahigh-vacuum environment is not perfect). The method 500 solves these problems by iteratively looking for, and filling, empty array sites until the entire array is filled (i.e., every array site contains a trapped atom). Due to the probabilistic nature of trap loading and trap loss, it cannot be known ahead of time how many iterations are needed to fill the entire array. In the related provisional application, the system that is referred to as “Ariadne” cooperates with one or more instances of the multi-channel controller 400 of FIG. 4 (also referred to as “Hapyxelor”) to implement the method 500.

[0074] In step 502 of the method 500, a computation array is imaged (e.g., via fluorescence imaging). The computation array is given this name because the atoms it traps are used for quantum computation. The computation array may be created, for example, with an optical trap (e.g., an optical lattice or an array of optical tweezers). When the computation array is first created, it is completely empty (i.e., none of its sites will have any trapped atom). However, if the method 500 is performed after execution of a previous quantum circuit, some of the sites of the computation array may still be occupied by “leftover” atoms. In this latter case, the leftover atoms remain trapped and therefore may be reused for the next quantum circuit.

[0075] In step 504 of the method 500, the image of the computation array is processed to identify one or more empty sites. Step 506 is a decision. If the computation array is completely filled (i.e., has no empty sites) then the method 500 is finished. In this case, the quantum computer 100 then proceeds to executing the next quantum circuit using the filled computation array. If the computation array is not completely filled (i.e., has one or more empty sites) then the method 500 continues to step 508. Note that when the computation array is first created, all of its sites are empty. In this case, the method 500 may begin with step 508.

[0076] In step 508 of the method 500, untrapped atoms are loaded into a magneto-optic trap (MOT). The untrapped atoms may be hot atoms captured from a background vapor that is generated by a non-evaporable getter. Alternatively, the untrapped atoms may be pre-cooled atoms forming a beam (e.g., exiting a Zeeman slower or pushed out of a two-dimensional MOT). The MOT cools and traps the atoms. Sub-Doppler cooling (e.g., polarization gradient cooling) may be subsequently performed to further lower the temperature of the atoms.

[0077] In step 510 of the method 500, the cold atoms are loaded into a reservoir array. Like the computation array, the reservoir array may be an optical trap. The reservoir array is given this name because it temporarily traps atoms that are intended to be transferred into empty sites of the computation array (i.e., no computation is performed with the reservoir array). In step 512, the reservoir array is imaged (e.g., fluorescence imaging). In step 514, the image of the reservoir array is processed to identify, for each empty site of the computation array, a nonempty site of the reservoir array. In step 516, atoms are transferred from the reservoir array to the empty sites of the computation array. This transfer may be performed, for example, using optical tweezers that moves adiabatically (i.e., without heating the atom) from a non-empty site of the reservoir array to the respective empty site of the computation array.

[0078] In step 518 of the method 500, the computation array is imaged. In step 520, the image of the computation array is processed to identify one or more empty sites. Thus, the steps 518 and 520 are similar to the steps 502 and 504, respectively. The method then returns to the step 506 to determine if another iteration of the steps 508-520 is needed to fill the computation array.

[0079] The method 500 may be implemented as the job 226 of FIG. 2. In this example, the sequence compiler 224 compiles the job 226 by assigning each signal sequence 222(f) to a respective waveform channel 434(i) of the multi-channel controller 400 of FIG. 4. The sequence compiler 224 then generates, for each waveform channel 434(f) that is assigned a signal sequence 222(f), the local script 402(f) and the local instruction set 404(f). The script processor 406 executes each local script 312(f) to generate the sequence 420(f) of fetch commands. The waveform channel 434(f) then processes the sequence 420(f) of fetch commands (as described above for the single-channel controller 300 of FIG. 3) to generate the analog control signal 412(f).

[0080] As described above for the single-channel controller 300 of FIG. 3, the first fetch command of the sequence 320 of fetch commands may control the instruction fetcher 310 to fetch the local instruction 326 that controls the WP processor 332 to wait for the trigger 324. Similar functionality may be implemented for one or more of the waveform channels 434 of FIG. 4. In this case, after the waveform channel 434(f) has received and processed its sequence 420(f) of fetch commands, the waveform channel 434(f) is in a “ready” state, meaning that at least some of the fetched instructions are loaded and ready to be executed by the WP processor of the waveform channel 434(f) once the WP processor receives a trigger (e.g., the trigger 324 of FIG. 3). While the waveform channel 434(f) is in the ready state, and prior to receiving thetrigger, the script processor 406 may continue to process local scripts 402 for the other waveform channels 434.

[0081] The step 506 in FIG. 5 may be implemented as a conditional statement (e.g., an if-then statement) based on the results of the image processing performed by the step 504 or the 518. This image processing may be performed external to the multi-channel controller 400 (e.g., by the image processor 138 of FIG. 1). In this case, the image-processing results may be passed to the job processor 416 of the multi-channel controller 400 (e.g., via the computer network 106), which writes the results to the shared memory 408 (see results 438 in FIG. 4). The job processor 416 may also change the status flag 436 to indicate that the results 438 have been received and stored in the shared memory 408.

[0082] To use the shared memory 408, the local script 404(i) may contain a “wait” function that instructs the script processor 406 to not output any fetch commands until the status flag 436 has been changed. Once the status flag 436 has been changed, the script processor 406 retrieves the results 438 from the shared memory 408 and the wait function stops. The local script 402(i) may then continue execution, using the results 438 to identify subsequent fetch commands to be outputted as part of the sequence 420(i) of fetch commands. Alternatively, an addendum script may be executed based on the results 438.

[0083] In this example, it should be appreciated that the script processor 406 executes at least part of the script 404(i) while one or more of the waveform channels 434 are outputting the analog control signal 412. As noted above, when the local script 404(i) lacks conditional statements, it may be written as a linear sequence of instructions. In this case, it is possible (although not necessary) for the script processor 406 to entirely finish processing the local script 404(i) before the waveform channel 434(i) begins outputting the analog control signal 412(f). On the other hand, when the local script 404(i) contains one or more conditional statements, it is not possible to entirely finish processing the local script 404(i) before the waveform channel 434(f) begins outputting the analog control signal 412(f) since the sequence 420(i) of fetch commands depends on the result of the one or more conditional statements. In this case, the script processor 406 may process the local script 404(i) up to the first conditional statement before the analog control signal 412(f) is outputted. After the first conditional statement is evaluated, subsequent execution of the local script 404(i), or an addendum script, causes the script processor 406 to output additional fetch commands to the sequence 420(i), which in turn results in additional fetched instructions being added to the sequence of fetched instructions to be executed by the WP processor of the waveform channel 434(f).

[0084] In the above example, the results 438 may be only a single bit. For example, the single bit may have a value of “1” to indicate that the computation array is full and a value of “0” to indicate that the computation array is not full. Similarly, the status flag 436 may be only a single bit (e.g., “0” indicating that the results 438 have not yet been updated, “1” indicates that the results 438 have been updated). More generally, the results 438 may store additional data and data types (e.g., floats, integers, Boolean values). Similarly, the status flag 436 may store additional data and data types. The shared memory 408 may store additional or alternative types of data used by the script processor 406 to evaluate conditional statements in the local script 404(i).

[0085] While the example of FIG. 5 uses an if-then statement to implement a loop, the local script 404(i) may use any type and number of conditional statements to implement branching and non-sequential control flow. Examples of such conditional statements include, but are not limited to, if-then-else statements, case statements, and switch statements. Similar statements may also be used to implement loops (e.g., while loops, repeat loops, etc.).Command and Instruction Queues

[0086] FIG. 6 is a functional diagram of a single-channel controller 600 for a quantum computer, in accordance with some of the present embodiments. The single-channel controller 600 is similar to the single-channel controller 300 of FIG. 3 except that it includes (i) a command queue 610 that stores the sequence 320 of fetch commands and (ii) an instruction queue 612 that stores the sequence 314 of fetched instructions. In some embodiments, the single-channel controller 600 only includes one of the command queue 610 and the instruction queue 612. In other embodiments, one or more of the waveform channels 434 of the multichannel controller 400 of FIG. 4 similarly include one or both of the command queue 610 and the instruction queue 612.

[0087] The script processor 306 enqueues each fetch command 322 into the command queue 610 to generate the sequence 320 of fetch commands. The instruction fetcher 310 then dequeues each fetch command 322 from the command queue 610. In this manner, the instruction fetcher 310 processes each fetch command 322 of the sequence 320 sequentially. Similarly, the instruction fetcher 310 enqueues each fetched instruction 316 into the instruction queue 612 to generate the sequence 314 of fetched instructions. The WP processor 332 then dequeues each fetched instruction 316 from the instruction queue 612. In this manner, the WP processor 332 processes each fetched instruction 316 of the sequence 314 sequentially.

[0088] While FIG. 6 shows the instruction queue 612 as a component that is internal to the waveform player 330, the instruction queue 612 may alternatively be implemented as a component that is external to the waveform player 330. Similarly, while FIG. 6 shows the command queue 610 as a component that is external to the instruction fetcher 310, the command queue 610 may alternatively be implemented as a component that is internal to the instruction fetcher 310.

[0089] The instruction queue 612 may be used to store fetched instructions 316 prior to runtime, during runtime when the waveform player 330 is in the “ready” state, or both. This “pre-storing” of fetched instructions 316 advantageously minimizes time delays incurred from fetching of local instructions 326 from the instruction memory 308. In such cases, the fetched instructions 316 may remain stored in the instruction queue 612 until the WP processor 332 is ready to execute them. One example of this situation is when the WP processor 332 processes the function Wait_For_Trigger. In this case, the WP processor 332 pauses execution of fetched instructions 316 until the trigger 324 is received, at which point the WP processor 332 then proceeds with dequeueing and processing the remaining fetched instructions 316.

[0090] Another advantage of pre-storing fetched instructions in instruction queues is that it allows one instruction fetcher to be used with multiple waveform channels. In this case, local instructions may only be fetched for one of the waveform channels at any given time. As one example of this “distributed” instruction fetching, the one instruction fetcher may be implemented as a microprocessor with multithreading. In this case, the microprocessor may process command queues for the different waveform channels as separate threads.

[0091] Accordingly, in some embodiments the multi-channel controller 400 of FIG. 4 uses one or more instruction fetchers for all of the n waveform channels 434, where the number of the one or more instruction fetchers is less than n. In other embodiments, each of the n waveform channels 434 has its own dedicated instruction fetcher. The resulting n instruction fetchers may operate in parallel to increase the “throughput” of fetched instructions, as compared to embodiments that use distributed instruction fetching.

[0092] Similarly, pre-storing fetched instructions in instruction queues allows one memory controller to be used with multiple waveform channels. For example, the instruction memories of several waveform channels may be co-located within the same memory chip and therefore only accessible using one memory controller. In this case, only one fetched instruction can be retrieved from the memory chip at any given time. More generally, pre-storing fetched instructions in instruction queues may be used whenever the number of waveform channelssharing a memory chip exceeds the number of parallel communication channels to the memory chip.

[0093] Accordingly, in some embodiments the multi-channel controller 400 of FIG. 4 implements the n instruction memories of the n waveform channels 434 in one or more memory chips, where the number of the one or more memory chips is less than n. In other embodiments, each of the n waveform channels 434 has its own dedicated memory communication channel. For example, each of the n waveform channels 434 may have its own dedicated memory chip and memory controller. In these embodiments, local instructions may be fetched via the n memory communication channels in parallel to increase the throughput of fetched instructions, as compared to embodiments in which instruction fetching for multiple waveform channels is shared across a memory communication channel.

[0094] Similarly, the command queue 610 may be used for pre-storing fetch commands 322. This pre-storage of fetch commands 322 may be performed prior to runtime when the script processor 306 processes the local script 302 up to a branching point. Pre-storage of fetch commands 322 may also be performed during runtime (i.e., mid-circuit) when the script processor 306 processes the local script 302 after the branching point (e.g., based on the results 438 stored in the shared memory 408 of FIG. 4). Pre-storage of fetch commands in command queues may be used to help one script processor (e.g., the script processor 406 of FIG. 4) to execute several local scripts for several waveform channels.Additional Method Embodiments

[0095] The present embodiments also include a method whose embodiments implement the functionalities of the single-channel controller 300 of FIG. 3, the multi-channel controller 400 of FIG. 4, the single-channel controller 600 of FIG. 6, or any combination thereof. In one of these embodiments, the method includes the step of storing a plurality of local instructions in an instruction memory. As an example of this step, the instruction memory 308 of FIG. 3 store the local instructions 326.

[0096] The method also includes the step of executing, with a script processor, a local script to transmit a sequence of fetch commands to an instruction fetcher. The sequence of fetch commands is based on the local script. As an example of this step, the script processor 306 of FIG. 3 executes the local script 302 to transmit the sequence 320 of fetch commands to the instruction fetcher 310. Execution of the local script 302 determines which fetch commands are added to the sequence 320 of fetch commands.

[0097] The method also includes the step of fetching, by the instruction fetcher and based on each fetch command of the sequence of fetch commands, a fetched instruction from the instruction memory. The fetched instruction is one of the plurality of local instructions. As an example of this step, the instruction fetcher 310 of FIG. 3 processes each fetch command of the sequence 320 to fetch one of the local instructions 326 stored in the instruction memory 308.

[0098] The method also includes the step of transmitting, to a waveform player, the fetched instruction as one of a sequence of fetched instructions. As an example of this step, the instruction fetcher 310 transmits each fetched instruction 316 to the waveform player 330 as one of the sequence 314 of fetched instructions.

[0099] The method also includes the step of executing, with the waveform player, the sequence of fetched instructions to generate a digital waveform. As an example of this step, the waveform player 330 executes the sequence 314 of fetched instructions to generate the digital waveform 338.Combination of Features

[0100] Features described above as well as those claimed below may be combined in various ways without departing from the scope hereof. The following examples illustrate possible, non-limiting combinations of features and embodiments described above. It should be clear that other changes and modifications may be made to the present embodiments without departing from the spirit and scope of this invention:

[0101] (Al) A quantum-computing control system includes a script processor, an instruction memory, an instruction fetcher, and a waveform player. The instruction memory is configured to store a plurality of local instructions. The script processor is configured to execute a local script and transmit to the instruction fetcher a sequence of fetch commands that is based on the local script. The instruction fetcher is configured to fetch, based on each fetch command of the sequence of fetch commands, a fetched instruction from the instruction memory, the fetched instruction being one of the plurality of local instructions. The instruction fetcher is also configured to transmit, to the waveform player, the fetched instruction as one of a sequence of fetched instructions. The waveform player is configured to execute the sequence of fetched instructions to generate a digital waveform.

[0102] (A2) In the quantum-computing control system denoted (Al), the waveform player includes a digital-to-analog converter configured to transform the digital waveform into an analog waveform.

[0103] (A3) In either of the quantum-computing control systems denoted (Al) and (A2), the waveform player is configured to start executing the sequence of fetched instructions in response to a trigger signal.

[0104] (A4) In any of the quantum-computing control systems denoted (Al) to (A3), the quantum-computing control system further includes a job processor configured to transmit the local script to the script processor and transmit the plurality of local instructions to the instruction memory.

[0105] (A5) In the quantum-computing control system denoted (A4), the job processor is configured to receive the local script and the plurality of local instructions from an external computing system.

[0106] (A6) In either of the quantum-computing control systems denoted (A4) and (A5), the quantum-computing control system further includes a shared memory in electronic communication with both the job processor and the script processor, the job processor is configured to write shared data to the shared memory while the script processor executes the local script, and the script processor is configured to execute the local script based at least in part on the shared data.

[0107] (A7) In the quantum-computing control system denoted (A6), the job processor is configured to retrieve the shared data from an external computing system.

[0108] (A8) In any of the quantum-computing control systems denoted (Al) to (A7), the instruction memory is configured to store each of the plurality of local instructions starting at a respective one of a plurality of memory offsets, said each fetch command includes a specified memory offset that is one of the plurality of memory offsets, and the instruction fetcher is configured to fetch the fetched instruction from the instruction memory based on the specified memory offset.

[0109] (A9) In any of the quantum-computing control systems denoted (Al) to (A8), each of the plurality of local instructions is encoded as bytecode.

[0110] (A10) In any of the quantum-computing control systems denoted (Al) to (A9), the script processor is configured to execute at least one conditional statement of the local script. The script processor is also configured to transmit an additional fetch command to the instruction fetcher based on a result of the at least one conditional statement.

[0111] (Al l) In the quantum-computing control system denoted (A10), the script processor is configured to transmit the additional fetch command after the waveform player has started generating the digital waveform.

[0112] (A12) In any of the quantum-computing control systems denoted (Al) to (Al 1), the script processor is configured to, in response to executing the local script, transmit a writeinstruction command to the instruction fetcher, the write-instruction command including a standalone instruction. The instruction fetcher is configured to, in response to processing the write-instruction command, transmit the standalone instruction to the waveform player without accessing the instruction memory.

[0113] (A13) In any of the quantum-computing control systems denoted (Al) to (A12), the script processor is configured to pause execution of the local script, execute an addendum script while execution of the local script is paused, and resume execution of the local script after execution of the addendum script has completed.

[0114] (A14) In any of the quantum-computing control systems denoted (Al) to (A13), the quantum-computing control system further includes a command queue and an instruction queue. The script processor is further configured to enqueue each fetch command, of the sequence of fetch commands, into the command queue. The instruction fetcher is further configured to dequeue said each fetch command from the command queue and enqueue the fetched instruction into the instruction queue. The waveform player is configured to dequeue each fetched instruction of the sequence of fetched instructions.

[0115] (A15) In any of the quantum-computing control systems denoted (Al) to (A14), the quantum-computing control system further includes a first waveform channel having the instruction memory as a first instruction memory, the instruction fetcher as a first instruction fetcher, and the waveform player as a first waveform player. The first instruction memory is configured to store a first plurality of local instructions. The script processor is configured to execute a first local script and transmit to the first instruction fetcher a first sequence of fetch commands that is based on the first local script. The first instruction fetcher is configured to (i) fetch, based on each fetch command of the first sequence of fetch commands, a first fetched instruction from the first instruction memory, the first fetched instruction being one of the first plurality of local instructions, and (ii) transmit, to the first waveform player, the first fetched instruction as one of a first sequence of fetched instructions. The first waveform player is configured to execute the first sequence of fetched instructions to generate a first digital waveform. The quantum-computing control system further includes a second waveform channel having a second first instruction memory, a second instruction fetcher, and a second waveform player. The second instruction memory is configured to store a second plurality of local instructions. The script processor is configured to execute a second local script and transmit to the second instruction fetcher a second sequence of fetch commands that is basedon the second local script. The second instruction fetcher is configured to (i) fetch, based on each fetch command of the second sequence of fetch commands, a second fetched instruction from the second instruction memory, the second fetched instruction being one of the second plurality of local instructions, and (ii) transmit, to the second waveform player, the second fetched instruction as one of a second sequence of fetched instructions. The second waveform player is configured to execute the second sequence of fetched instructions to generate a second digital waveform.

[0116] (A16) In any of the quantum-computing control systems denoted (Al) to (A15), the instruction fetcher, instruction memory, and waveform player are implemented as programmable logic.

[0117] (A17) In the quantum-computing control system denoted (A16), the programmable logic includes a field-programmable gate array.

[0118] (Al 8) In either of the quantum-computing control systems denoted (Al 6) and (Al 7), the quantum-computing control system is implemented at least in part as a system-on- chip.

[0119] (Al 9) In the quantum-computing control system denoted (Al 8), the system-on- chip includes a radio-frequency system-on-chip.

[0120] (Bl) A quantum-computing control method includes storing a plurality of local instructions in an instruction memory and executing, with a script processor, a local script to transmit a sequence of fetch commands to an instruction fetcher, the sequence of fetch commands being based on the local script. The quantum-computing control method also includes fetching, by the instruction fetcher and based on each fetch command of the sequence of fetch commands, a fetched instruction from the instruction memory, the fetched instruction being one of the plurality of local instructions. The quantum-computing control method also includes transmitting, to a waveform player, the fetched instruction as one of a sequence of fetched instructions. The quantum-computing control method also includes executing, with the waveform player, the sequence of fetched instructions to generate a digital waveform.

[0121] (B2) In the quantum-computing control method denoted (Bl), the quantumcomputing control method further includes transforming the digital waveform into an analog waveform.

[0122] (B3) In either of the quantum-computing control methods denoted (Bl) and (B2), said executing the sequence of fetched instructions begins in response to a trigger signal.

[0123] (B4) In any of the quantum-computing control methods denoted (Bl) to (B3), the quantum-computing control method further includes transmitting the local script from a jobprocessor to the script processor and transmitting the plurality of local instructions from the job processor to the instruction memory.

[0124] (B5) In the quantum-computing control method denoted (B4), the quantumcomputing control method further includes receiving, by the job processor, the local script and the plurality of local instructions from an external computer system.

[0125] (B6) In either of the quantum-computing control methods denoted (B4) and (B5), the quantum-computing control method further includes writing, by the job processor, shared data to a shared memory during said executing. Said executing the local script is based at least in part on the shared data.

[0126] (B7) In the quantum-computing control method denoted (B6), the quantumcomputing control method further includes receiving, by the job processor, the shared data from an external computer system.

[0127] (B8) In any of the quantum-computing control methods denoted (Bl) to (B7), said storing includes storing each of the plurality of local instructions in the instruction memory starting at a respective one of a plurality of memory offsets, said each fetch command includes a specified memory offset that is one of the plurality of memory offsets, and said fetching is based on the specified memory offset.

[0128] (B9) In any of the quantum-computing control methods denoted (Bl) to (B8), each of the plurality of local instructions is encoded as bytecode.

[0129] (B10) In any of the quantum-computing control methods denoted (Bl) to (B9), said executing the local script includes executing at least one conditional statement of the local script and transmitting an additional fetch command to the instruction fetcher based on a result of the at least one conditional statement.

[0130] (Bl 1) In the quantum-computing control method denoted (B10), said transmitting the additional fetch command occurs after the waveform player has started generating the digital waveform.

[0131] (B 12) In any of the quantum-computing control methods denoted (B 1) to (B 11), said executing the local script includes transmitting, in response to said executing, a writeinstruction command to the instruction fetcher, the write-instruction command including a standalone instruction. The quantum-computing control method further includes transmitting, by the instruction fetcher, the standalone instruction to the waveform player without the instruction fetcher accessing the instruction memory.

[0132] (B13) In any of the quantum-computing control methods denoted (Bl) to (B12), said executing the local script includes pausing execution of the local script; executing, by thescript processor, an addendum script while execution of the local script is paused; and resuming execution of the local script after execution of the addendum script has completed.

[0133] (B14) In any of the quantum-computing control methods denoted (Bl) to (B 13), the quantum-computing control method further includes enqueuing, by the script processor, each fetch command of the sequence of fetch commands into a command queue; dequeuing, by the instruction fetcher, said each fetch command from the command queue; enqueuing, by the instruction fetcher, the fetched instruction into an instruction queue; and dequeuing, by the waveform player, each fetched instruction of the sequence of fetched instructions.

[0134] (Bl 5) In any of the quantum-computing control methods denoted (Bl) to (B14), said storing includes storing a first plurality of local instructions in a first instruction memory. Said executing the local script includes executing, with the script processor, a first local script to transmit a first sequence of fetch commands to a first instruction fetcher, the first sequence of fetch commands being based on the first local script. Said fetching includes fetching, by the first instruction fetcher and based on each fetch command of the first sequence of fetch commands, a first fetched instruction from the first instruction memory, the first fetched instruction being one of the first plurality of local instructions. Said transmitting includes transmitting, to a first waveform player, the first fetched instruction as one of a first sequence of fetched instructions. Said executing the sequence of fetch commands includes processing the first sequence of fetched instructions with the first waveform player to generate a first digital waveform. The quantum-computing method further includes storing a second plurality of local instructions in a second instruction memory; executing, with the script processor, a second local script to transmit a second sequence of fetch commands to a second instruction fetcher, the second sequence of fetch commands being based on the second local script; fetching, by the second instruction fetcher and based on each fetch command of the second sequence of fetch commands, a second fetched instruction from the second instruction memory, the second fetched instruction being one of the second plurality of local instructions; transmitting, to a second waveform player, the second fetched instruction as one of a second sequence of fetched instructions; and executing, with the second waveform player, the second sequence of fetched instructions to generate a second digital waveform.

[0135] Changes may be made in the above methods and systems without departing from the scope hereof. It should thus be noted that the matter contained in the above description or shown in the accompanying drawings should be interpreted as illustrative and not in a limiting sense. The following claims are intended to cover all generic and specific features describedherein, as well as all statements of the scope of the present method and system, which, as a matter of language, might be said to fall therebetween.

Claims

CLAIMSWhat is claimed is:

1. A quantum-computing control system, comprising: a script processor, an instruction memory, an instruction fetcher, and a waveform player; wherein: the instruction memory is configured to store a plurality of local instructions; the script processor is configured to execute a local script and transmit to the instruction fetcher a sequence of fetch commands that is based on the local script; the instruction fetcher is configured to: fetch, based on each fetch command of the sequence of fetch commands, a fetched instruction from the instruction memory, the fetched instruction being one of the plurality of local instructions, and transmit, to the waveform player, the fetched instruction as one of a sequence of fetched instructions; and the waveform player is configured to execute the sequence of fetched instructions to generate a digital waveform.

2. The quantum-computing control system of claim 1, the waveform player comprising a digital-to-analog converter configured to transform the digital waveform into an analog waveform.

3. The quantum-computing control system of claim 1, the waveform player being configured to start executing the sequence of fetched instructions in response to a trigger signal.

4. The quantum-computing control system of claim 1, further comprising a job processor configured to transmit the local script to the script processor and transmit the plurality of local instructions to the instruction memory.

5. The quantum-computing control system of claim 4, the job processor being configured to receive the local script and the plurality of local instructions from an external computing system.

6. The quantum-computing control system of claim 4, wherein: the quantum-computing control system further comprises a shared memory in electronic communication with both the job processor and the script processor; the job processor is configured to write shared data to the shared memory while the script processor executes the local script; and the script processor is configured to execute the local script based at least in part on the shared data.

7. The quantum-computing control system of claim 6, the job processor being configured to retrieve the shared data from an external computing system.

8. The quantum-computing control system of claim 1, wherein: the instruction memory is configured to store each of the plurality of local instructions starting at a respective one of a plurality of memory offsets; said each fetch command includes a specified memory offset that is one of the plurality of memory offsets; and the instruction fetcher is configured to fetch the fetched instruction from the instruction memory based on the specified memory offset.

9. The quantum-computing control system of claim 1, each of the plurality of local instructions is encoded as bytecode.

10. The quantum-computing control system of claim 1, wherein: the script processor is configured to execute at least one conditional statement of the local script; and the script processor is configured to transmit an additional fetch command to the instruction fetcher based on a result of the at least one conditional statement.

11. The quantum-computing control system of claim 10, the script processor being configured to transmit the additional fetch command after the waveform player has started generating the digital waveform.

12. The quantum-computing control system of claim 1, wherein: the script processor is configured to, in response to executing the local script, transmit a write-instruction command to the instruction fetcher, the write-instruction command including a standalone instruction; and the instruction fetcher is configured to, in response to processing the write-instruction command, transmit the standalone instruction to the waveform player without accessing the instruction memory.

13. The quantum-computing control system of claim 1, the script processor being configured to pause execution of the local script, execute an addendum script while execution of the local script is paused, and resume execution of the local script after execution of the addendum script has completed.

14. The quantum-computing control system of claim 1, wherein: the quantum-computing control system further comprises a command queue and an instruction queue; the script processor is further configured to enqueue each fetch command, of the sequence of fetch commands, into the command queue; the instruction fetcher is further configured to: dequeue said each fetch command from the command queue, and enqueue the fetched instruction into the instruction queue; and the waveform player is configured to dequeue each fetched instruction of the sequence of fetched instructions.

15. The quantum-computing control system of claim 1, comprising: a first waveform channel comprising the instruction memory as a first instruction memory, the instruction fetcher as a first instruction fetcher, and the waveform player as a first waveform player, wherein:the first instruction memory is configured to store a first plurality of local instructions; the script processor is configured to execute a first local script and transmit to the first instruction fetcher a first sequence of fetch commands that is based on the first local script; the first instruction fetcher is configured to (i) fetch, based on each fetch command of the first sequence of fetch commands, a first fetched instruction from the first instruction memory, the first fetched instruction being one of the first plurality of local instructions, and (ii) transmit, to the first waveform player, the first fetched instruction as one of a first sequence of fetched instructions; and the first waveform player is configured to execute the first sequence of fetched instructions to generate a first digital waveform; and a second waveform channel comprising a second first instruction memory, a second instruction fetcher, and a second waveform player, wherein: the second instruction memory is configured to store a second plurality of local instructions; the script processor is configured to execute a second local script and transmit to the second instruction fetcher a second sequence of fetch commands that is based on the second local script; the second instruction fetcher is configured to (i) fetch, based on each fetch command of the second sequence of fetch commands, a second fetched instruction from the second instruction memory, the second fetched instruction being one of the second plurality of local instructions, and (ii) transmit, to the second waveform player, the second fetched instruction as one of a second sequence of fetched instructions; and the second waveform player is configured to execute the second sequence of fetched instructions to generate a second digital waveform.

16. The quantum-computing control system of claim 1, the instruction fetcher, instruction memory, and waveform player being implemented as programmable logic.

17. The quantum-computing control system of claim 16, the programmable logic comprising a field-programmable gate array.

18. The quantum-computing control system of claim 16, being implemented at least in part as a system-on-chip.

19. The quantum-computing control system of claim 18, the system-on-chip comprising a radio-frequency system-on-chip.

20. A quantum-computing control method, comprising: storing a plurality of local instructions in an instruction memory; executing, with a script processor, a local script to transmit a sequence of fetch commands to an instruction fetcher, the sequence of fetch commands being based on the local script; fetching, by the instruction fetcher and based on each fetch command of the sequence of fetch commands, a fetched instruction from the instruction memory, the fetched instruction being one of the plurality of local instructions; transmitting, to a waveform player, the fetched instruction as one of a sequence of fetched instructions; and executing, with the waveform player, the sequence of fetched instructions to generate a digital waveform.

21. The quantum-computing control method of claim 20, further comprising transforming the digital waveform into an analog waveform.

22. The quantum-computing control method of claim 20, wherein said executing the sequence of fetched instructions begins in response to a trigger signal.

23. The quantum-computing control method of claim 20, further comprising: transmitting the local script from a job processor to the script processor; and transmitting the plurality of local instructions from the job processor to the instruction memory.

24. The quantum-computing control method of claim 23, further comprising receiving, by the job processor, the local script and the plurality of local instructions from an external computer system.

25. The quantum-computing control method of claim 23, wherein: the quantum-computing control method further comprises writing, by the job processor, shared data to a shared memory during said executing; and said executing the local script is based at least in part on the shared data.

26. The quantum-computing control method of claim 25, further comprising receiving, by the job processor, the shared data from an external computer system.

27. The quantum-computing control method of claim 20, wherein: said storing comprises storing each of the plurality of local instructions in the instruction memory starting at a respective one of a plurality of memory offsets; said each fetch command includes a specified memory offset that is one of the plurality of memory offsets; and said fetching is based on the specified memory offset.

28. The quantum-computing control method of claim 20, each of the plurality of local instructions is encoded as bytecode.

29. The quantum-computing control method of claim 20, wherein said executing the local script comprises: executing at least one conditional statement of the local script; and transmitting an additional fetch command to the instruction fetcher based on a result of the at least one conditional statement.

30. The quantum-computing control method of claim 29, wherein said transmitting the additional fetch command occurs after the waveform player has started generating the digital waveform.

31. The quantum-computing control method of claim 20, wherein: said executing the local script comprises transmitting, in response to said executing, a write-instruction command to the instruction fetcher, the write-instruction command including a standalone instruction; and the quantum-computing control method further comprises transmitting, by the instruction fetcher, the standalone instruction to the waveform player without the instruction fetcher accessing the instruction memory.

32. The quantum-computing control method of claim 20, wherein said executing the local script comprises: pausing execution of the local script; executing, by the script processor, an addendum script while execution of the local script is paused; and resuming execution of the local script after execution of the addendum script has completed.

33. The quantum-computing control method of claim 20, further comprising: enqueuing, by the script processor, each fetch command of the sequence of fetch commands into a command queue; dequeuing, by the instruction fetcher, said each fetch command from the command queue; enqueuing, by the instruction fetcher, the fetched instruction into an instruction queue; and dequeuing, by the waveform player, each fetched instruction of the sequence of fetched instructions.

34. The quantum-computing control method of claim 20, wherein: said storing comprises storing a first plurality of local instructions in a first instruction memory; said executing the local script comprises executing, with the script processor, a first local script to transmit a first sequence of fetch commands to a first instructionfetcher, the first sequence of fetch commands being based on the first local script; said fetching comprises fetching, by the first instruction fetcher and based on each fetch command of the first sequence of fetch commands, a first fetched instruction from the first instruction memory, the first fetched instruction being one of the first plurality of local instructions; said transmitting comprises transmitting, to a first waveform player, the first fetched instruction as one of a first sequence of fetched instructions; said executing the sequence of fetch commands comprises processing the first sequence of fetched instructions with the first waveform player to generate a first digital waveform; and the quantum-computing method further comprises: storing a second plurality of local instructions in a second instruction memory; executing, with the script processor, a second local script to transmit a second sequence of fetch commands to a second instruction fetcher, the second sequence of fetch commands being based on the second local script; fetching, by the second instruction fetcher and based on each fetch command of the second sequence of fetch commands, a second fetched instruction from the second instruction memory, the second fetched instruction being one of the second plurality of local instructions; transmitting, to a second waveform player, the second fetched instruction as one of a second sequence of fetched instructions; and executing, with the second waveform player, the second sequence of fetched instructions to generate a second digital waveform.

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