Systems and methods for generating an accurate ultrasonic impulse for a high-resolution ultrasonic imaging catheter
Patent Information
- Application Number
- EP2024724021
- Authority / Receiving Office
- EP · EP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-04-07
- Filing Date
- 2024-04-05
- Publication Date
- 2026-02-11
AI Technical Summary
Ultrasonic transducers in intravascular ultrasound (IVUS) systems face challenges in generating high-quality images due to issues with impulse wave timing accuracy, ringing, and high-voltage transmission, which affect image resolution and quality.
A pulse control system for ultrasonic imaging catheters that includes a transducer tank circuit and a switch circuit configured to produce clean sinusoidal pulses, with a control logic circuit and current sense circuit to manage pulse generation and prevent ringing, allowing for high-voltage wavelet generation and transmission.
The system generates high-quality, clean sinusoidal pulses with reduced ringing and improved image resolution, overcoming the challenges of timing accuracy and high-voltage transmission, resulting in enhanced image clarity and reduced manufacturing costs.
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Figure US2024023370_10102024_PF_FP_ABST
Abstract
Description
SYSTEMS AND METHODS FOR GENERATING AN ACCURATE ULTRASONIC IMPULSE FOR A HIGH-RESOLUTION ULTRASONIC IMAGING CATHETERRELATED APPLICATION DATA
[0001] This application claims the benefit of priority of U.S. Provisional Patent Application Serial No. 63 / 457,876, filed April 7, 2023, and titled “Systems and Methods for Generating an Accurate Ultrasonic Impulse for a High-Resolution Ultrasonic Imager”, which is incorporated by reference herein in its entirety.FIELD
[0002] The present disclosure generally relates to control of ultrasonic transducers and more specifically to systems and methods for generating an accurate ultrasonic impulse for a high resolution ultrasonic imaging catheter.BACKGROUND
[0003] Ultrasonic transducers used in intravascular ultrasound (IVUS) systems are typically comprised of an ultrasonic impulse wave generator and a transducer to transmit and capture the reflections. Certain impulse parameters are generally important for the generation of a high quality image, affecting the final resolution. For example, the impulse should be sufficiently powerful, have a known wave shape, and present cleanly with little or no start or ending ringing.
[0004] An example of an IVUS system is shown in U.S. Patent No. 8,864,674. As shown therein, such devices generally include a catheter consisting of an outer sheath and an inner imaging core with an ultrasound transducer positioned at the distal end of the core. The imaging core is rotationally driven at its proximal end and a pulsing circuit is provided to cause the transducer to emit high frequency ultrasound pulses. The reflected signal received by the transducer as the imaging core is rotated and withdrawn along a section of the vessel is used to generate a volumetric ultrasound image of that vessel section.
[0005] A transducer for IVUS applications can be used in the 20 MHz to 80 MHz ultrasonic range. Atypical range is between 40 MHz to 60 MHz. As an example, a 50 MHz wave has a duty cycle of only 20 nS (nano-seconds). A 20 nS single cycle wavelet will have one 10 nS portion in the positive or negative direction, followed by a second 10 nS portion in the opposite direction.
[0006] For good results, a wave applied to the transducer should be a single complete cycle of a sinusoidal voltage. In certain scenarios, a few complete cycles of a sinusoidal wave may be used to generate a “chirp”. In either case, the sinusoidal wavelet should start clean, and end at the termination of a “complete” cycle. Any abrupt start or termination before or after the wave cycle reaches zero, reduces the quality of the wavelet and hence reduces the quality of the image. Also, any unwanted ringing at the start or end of a wavelet may result in reduced image quality.
[0007] Timing of a single cycle ultrasonic wave is so tight that a typical logic gate used in an ASIC (Application Specific Integrated Circuit) can have challenges determining the start and stop of a wavelet. For example, a typical 50 MHz single wavelet as mentioned above is composed of two 10 nS periods. Atypical logic would have a few nano-second variations or jitter, for example, a 2 nS error in determining the start or stop of the wave amounts to 20 percent of the half-cycles, which is significant. These errors in timing can generate out-of-band carrier frequencies or harmonics and interfere with the image-processing algorithms.
[0008] Atypical PMUT (piezoelectric micromachined ultrasound transducer) used in IVUS applications has only a few picofarad capacitances and requires high-voltage wavelets. The impedance is high and varies with frequency. The peak-to-peak voltage applied to the PMUT can be tens of volts peak-to-peak. The output power exponentially increases by an increase in applied voltage. For example, doubling the output voltage increases the output power by 6 dB. These operational parameters generate significant challenges in transmitting the wavelet through the ultrasonic catheter. Typical transmission lines are usually designed only for a known resistive load, for example, a 50-ohm resistive load. The ideal required voltage to drive the PMUT needs to be in excess of 50-volt peak-to-peak, which is hard to transfer through a small catheter lumen.
[0009] Embodiments disclosed herein improve upon prior art systems by addressing these and other challenges in a less complex electronics package providing greater signal clarity and reduced cost of manufacture.SUMMARY OF THE DISCLOSURE
[0010] Embodiments of the present disclosure include a pulse control system for an ultrasonic imaging catheter including a transducer tank circuit configured to produce ultrasonic imaging pulses, and a switch circuit driving the transducer tank circuit between on and off states, whereinthe off state causes generation of the imaging pulse and the on state stops generation of pulses. The transducer tank circuit and the switch circuit can be configured to be disposed together within the imaging core of the ultrasonic imaging catheter in a distal end region of the imaging core.
[0011] In further alternative embodiments, disclosed pulse control systems may further include a control logic circuit configured to control on / off timing of the switch circuit and / or a current sense circuit configured to determine current in the transducer tank circuit. The control logic circuit and the current sense circuit can be further configured to be disposed together with the transducer tank circuit and switch circuit within the imaging core distal end.
[0012] Embodiments disclosed also include pulser circuits for an intravascular ultrasonic imaging systems. Disclosed circuits include an inductor, a diode connected in series with the inductor, a current supply conductor connected to the inductor opposite the diode, a junction between the inductor and diode, where the junction is electrically connectable to an ultrasonic transducer to configure the ultrasonic transducer in series or parallel connection with the inductor. Such circuits also include a controllable on / off switch connected to the diode opposite the junction and electrically communicating with a ground conductor opposite the diode. In some embodiments, the controllable on / off switch is configured as a MOSFET, and a control logic circuit also may be provided as part of the MOSFET. Such disclosed circuit embodiments are is configured and dimensioned to be disposed within a distal end of an imaging core of an intravascular ultrasonic imaging system.
[0013] Embodiments disclosed herein further include imaging cores for intravascular ultrasonic imaging catheter including pulser circuits as disclosed herein in combination with ultrasonic transducers disposed in a distal end region of a core housing. Disclosed imaging cores also may include a two conductor cable extending through the core housing from a distal end to the pulse control system or pulser circuit, and a fixing material filling at least the distal end of the core housing surrounding the pulse control system or pulser circuit. Disclosed ultrasonic transducers include PMUTs and other transducer types. Disclosed imaging cores also may be combined with an outer catheter sheath to form a imaging catheter system.
[0014] Disclosed embodiments additionally include ultrasonic imaging catheters having an imaging core with a distal end configured for placement in a patient’s vasculature, an ultrasonic transducer disposed in the imaging core distal end, a pulse control disposed in the imaging coredistal end and configured to control pulse generation by the ultrasonic transducer. Disclosed pulse controls may include a transducer tank circuit including the ultrasonic transducer and a switch circuit driving the transducer tank circuit between on and off states, wherein the off state causes generation of the imaging pulse and the on state stops generation of pulse. The imaging catheters disclosed also include a two conductor cable connected to the pulse control and extending through the imaging core to a proximal end thereof.
[0015] Embodiments disclosed herein also include methods of controlling an ultrasonic transducer in an intravascular ultrasonic imaging catheter, including steps of turning off a current delivered to a resonant circuit including the ultrasonic transducer at an initial time causing the ultrasonic transducer to generate a pulse, wherein the pulse has a first positive half-cycle and a second negative half-cycle, and turning on the current delivered to the resonant circuit at any time during a time interval corresponding to total time of the second negative half-cycle causing cessation of pulse generation by the ultrasonic transducer. The resonant circuit may include a current interrupting inductor connected in series or parallel with the ultrasonic transducer, and the turning off thus comprises a switch circuit connected to a junction between the ultrasonic transducer and the inductor set to off at the initial time. The turning on the current delivered may thus comprise setting the switch circuit to on during said time interval.
[0016] Disclosed methods may be used to generate a series of clean n-number pulses by repeating the turning off and turning on steps beginning at a first initial time followed by a first time interval aligned with the second negative half-cycle of the n-number pulse generated and then maintaining current delivery to the resonant circuit until a next initial time. These steps may be repeated as needed for plural of n-number pulse cycles. As a further alternative, the n value may be changed between pulse cycles.BRIEF DESCRIPTION OF DRAWINGS
[0017] For the purpose of illustrating the disclosure, the drawings show aspects of one or more embodiments of the disclosure. However, it should be understood that the present disclosure is not limited to the precise arrangements and instrumentalities shown in the drawings, wherein: FIG. 1 is a schematic cross-section of the distal end of an imaging core according to embodiments of the present disclosure;FIG. 2 is a block diagram illustrating primary functional components of pulser circuits according to the present disclosure;FIG. 3 is a schematic of one example of a pulser circuit according to an embodiment of the present disclosure;FIG. 3A is a schematic of another example of a pulser circuit according to an alternative embodiment of the present disclosure;FIG. 4 is a circuit board / block diagram of an embodiment of the pulser circuit shown in FIG. 3. FIG. 5 is a plot of a single cycle impulse generated with a pulser circuit according to the present disclosure, showing an enlarged detail with timing references;FIG. 6 is a plot of a double cycle impulse generated with a pulser circuit according to the present disclosure;FIG. 7 is a schematic cross-section of the distal end of an imaging core and sheath according to an alternative embodiment of the present disclosure; andFIG. 8 is a schematic cross-section of the distal end of an imaging core and sheath according to another alternative embodiment of the present disclosure.DETAILED DESCRIPTION
[0018] The present disclosure describes systems, methods and devices to generate high-voltage wavelets to drive a transducer in IVUS systems while overcoming technical challenges described above. Disclosed methods and devices include circuits to drive the transducer to enable a “measured” complete-cycle wavelet at extremely high voltages. In general, disclosed circuits are split between proximal (patient side) and distal (transducer side) circuits. The proximal circuit generally includes control circuitry, such as current control circuitry and optional pulse synchronization logic, and is often housed in a patient interface module (PIM). Examples of proximal circuitry are disclosed in U.S. Patent No. 10,555,720, which is incorporated by reference herein. The distal side circuit generally comprises components to generate a sinusoidal one or more complete-cycle wavelets. The present disclosure focuses primarily on the distal side circuitry.
[0019] Embodiments in accordance with the present disclosure include, in one illustrative example, imaging core 10, which may be configured as a rotatable guidewire type structure,having a housing 12, terminating in distal end 13. Positioned adjacent distal end 13 is distal control module 14 and ultrasound transducer 16, which are joined by current conducting connectors 18 in the illustrated embodiment. Ultrasound transducer 16 may comprise a PMUT Alternatively, as further discussed below, distal control module 14 and transducer 16 may be integrated together in a single electronics package, and other transducer types may be employed as alternatives to the PMUT shown in FIG. 1. Electrical cable 20, which extends from the proximal circuit (not shown) to the distal control module 14, provides at least two conductors 20A, 20B (FIG. 3). Transducer 16, when configured as a PMUT, includes transducer portion 22, which is positioned in an open window provided in epoxy 24 (or similar filler / fixing material) within the distal end of housing 12 surrounding at least distal control module 14 and transducer 16. During use, imaging core 10 is deployed within catheter sheath 26 as is known in the art. Further aspects of imaging core 10 not otherwise described below may be adapted by persons of ordinary skill in the art based on conventional imaging systems, such as disclosed in U.S. Patent No. 6,450,964, which is incorporated herein by reference.
[0020] Systems and circuits disclosed herein are configured in certain embodiments to generate clean and discrete sinusoidal pulses, which may be single pulses, double pulses or “n” number of pulses. A clean sinusoidal pulse refers to one or more discrete sinusoidal pulses that are free of or at least substantially free of or eliminate ringing or continuous oscillations beyond a zero crossing point at an end of the specified n-number sinusoidal pulse For example, a series of clean single (n=l ) clean sinusoidal pulses are illustrated in FIG. 5. In another example, a series of clean double cycle (n=2) sinusoidal impulses are illustrated in FIG. 6. In a further alternative, the n value may be changed between pulse cycles to produce a series of different number pulse cycles, for example, by alternatingly switching between n=l and n=2, a series of alternating clean single and double cycles may be produced.
[0021] FIG. 2 illustrates a pulser system according to the present disclosure in which control logic circuit 36 drives switch circuit 32 off and on for transducer tank circuit 30, which drives an optional current sense circuit 34. As further described below, transducer tank circuit 30 may comprise an ultrasonic transducer, such as a PMUT, providing capacitance (C) in series with an inductor (L). Control logic circuit 36 and current sense circuit 34 also may be optionally provided in a single ASIC configuration. With such an arrangement, switch circuit 32 has theability to remove energy from transducer tank circuit 30 to prevent resonant oscillations from being produced by the transducer. Stored energy is instead shunted to the current return when the switch circuit is turned back on during a negative part of the generated signal pulse to prevent ringing of the signals as further described below.
[0022] In operation, during an initial sinusoidal positive pulse, switch circuit 32 turns off to redirect current flow from the switch circuit to the transducer tank circuit 30. During the negative portion of the pulse, current is prevented from going “back” through the switch circuit. Switch circuit 32 can be turned on by control logic circuit 36 at any time during the negative part of the pulse. This is an advantage since the timing does not need to be precise. Switch circuit 32 timing is illustrated in the detail view in FIG. 5, wherein time reference A indicates the “turn off” time for the switch circuit to generate the pulse with transducer tank circuit 30. Time reference B indicates the time interval during which the switch circuit 32 can be set to “on” in order to suppress ring down and generate a clean, single pulse signal. Switch circuit 32 is thereafter maintained as “on” until the next pulse is desired at time reference A. Switch circuit 32 thus has more time to turn on during time interval B of the sinusoidal signal, which is advantageous, especially at high frequencies.
[0023] In some embodiments, current sense circuit 34 is configured to verify that a pulse is being generated and provide feedback to the system. For example, sense circuit 34 (or 62 below) could be used to determine if transducer 16 is in the right range and that the transducer is not over driven by the pulser circuit. The functional verification can be controlled with an ASIC incorporating the current sense circuit.
[0024] FIG. 3 illustrates an example implementation of pulser circuit 40 according to the present disclosure. Pulser circuit 40 may be distributed across multiple physical electronics components or integrated into a single electronics package. In the example of FIG. 3, pulser circuit 40 includes inductor 42 to store energy, and two switches: a controllable switch 46, in one example a MOSFET including a parasitic diode; and a one-way switch 44, for example a diode. Control logic 50 drives controllable switch 46. Inductor 42, diode 44, and controllable switch 46 are configured in a serial manner. Transducer 16, which may be a PMUT in some embodiments, is connected to junction 48 of inductor 42 and diode 44. In this example, transducer 16 andinductor 42 comprise transducer tank circuit 30; controllable switch 46 and diode 44 comprise switch circuit 32; and control logic 50 comprises logic circuit 36.
[0025] When controllable switch 46 is ON, one-way (diode) switch 44 is configured in a conduction mode. This will keep inductor 42 and transducer junction 48 in near-zero voltage. When a pulse is desired, controllable switch 46 will be turned off. This will direct stored energy from inductor 42 to transducer 16, which has a known capacitance.
[0026] In operation, for a first pulse half-cycle, controllable switch 46 will be off, and only inductor 42 and transducer 16 capacitance is in series. The inductor’s stored energy will generate a variable current and voltage at junction 48 in accordance with the following equation:where: “i” is current, “t” is the time, “L” is the inductor’s inductance, “C” is transducer capacitance, and “Vo” is the initial voltage, which is close to zero, and the “coo” is the resonance frequency of the sine wave. When the voltage again reaches zero, it will continue in the negative direction. In this area, controllable switch 46 becomes conductive, but the external series one-way (diode) switch 44 will be biased backward and keeps inductor 42 and transducer 16 capacitance isolated. As long as no external force (a current load from adjacent circuits) is applied to the L / C sub-circuit formed by inductor 42 and transducer 16, they will continue according to the above equation in the negative territory and the waveform will remain a complete sinusoidal wavelet. In other words, diode 44 acts as a blocking diode to prevent current from going back through the transistor switch when the transistor is turned off.
[0027] A sinusoidal current in inductor 42, while it is only in series with transducer 16 capacitance, generates a sinusoidal voltage across transducer 16. Stored energy in a capacitor is according to the formula 0.5*VA2*C, where “C” is the capacitance and “V” is the voltage across the capacitor. In the absence of any parallel accessory circuit, the entire energy from inductor 42 will be transferred to the transducer 16 capacitance and this will convert the stored energy inside inductor 42 to a voltage across transducer 16. A fixed current “I” is set through conductor 20 A of cable 20 inside the device. This is used to set the impulse power. At the distal end 13 of the device, this current is passed through inductor 42. The inductor will store energy equivalent to0.5*IA2*L, where I is the set current, and L is the inductance. Current sense circuit 62 optionally can be used to determine current to transducer 16.
[0028] In one example, with controllable switch 46 configured as MOSFET, the inductor current is periodically interrupted. MOSFET can be a silicon-based or GaN MOSFET with a control logic circuit 50 as shown in FIG. 3. In this example, a second switch is a high voltage diode acting as one-way switch 44. These two switches are in serial with inductor 42. The diode polarity is set so it is typically in the conduction mode. Junction 48 between inductor 42 and the diode 44 is connected to transducer 16. Transducer capacitance and this inductor form a resonance (tank circuit) at the desired ultrasonic frequency.
[0029] In a further illustration of this example, an ASIC may be configured as MOSFET control logic circuit 50. In such an embodiment, main ASIC power supply rail 58 drives the MOSFET logic circuit 50 and supplies power thereto. Ground pathway 56 is the ground for the control logic.
[0030] Control gate output 60 is used to drive the MOSFET logic circuit. When this is low, the MOSFET is not conducting and when it is high, the MOSFET is conducting. Gate control 1 (52) is used for output protection purposes. Gate control 1 (52) is typically pulled low, however, if current sense circuit 62 senses an overcurrent in the transducer, this pin is pulled high. This will keep the control gate output 60 permanently at a high state and would prevent the MOSFET from turning off. This prevents the initiation of a new pulse generation until the overcurrent state is cleared. Gate Control 2 (54) is the main MOSFET gate control. When gate control 2 (54) is pulled low and no over-current is sensed, output 60 will follow and this pulls output 60 low. This initiates impulse generation by turning off the MOSFET 46.
[0031] Control logic circuit 50 typically keeps the MOSFET ON. In this configuration, the current “I” will pass through the inductor 42, diode 44, and MOSFET 46, and transducer 16, with voltage kept near zero. Transducer 16 capacitance and inductor 42 form a tank circuit. When an impulse is desired, the ASIC turns off MOSFET 46. Interruption of the MOSFET conductivity directs the current “I” to the transducer 16 capacitance, which would be the only option when MOSFET turns off, and sinusoidal wavelet formation begins. After half a cycle and when the voltage turns negative, MOSFET 46 turns ON. As diode 44 will be biased backward, it will keepthe L / C isolated from the MOSFET parasitic diode and the sinusoidal wave continues in the opposite direction with disregard to the MOSFET status.
[0032] FIG. 3 A illustrates alternative pulser circuit 40A in which inductor 42 and transducer 16 are arranged in parallel rather than in series as in the embodiment shown in FIG. 3. In alternative pulser circuit 40A, conductor 20A provides current to the parallel sub-circuit comprising inductor 42 and transducer 16, which provides the capacitance (C). Optional current sensor 62 can be provided in the transducer branch of the parallel sub-circuit, which connects to the switch circuit comprised of one-way (diode) switch 44 and controllable on / off switch 46 at junction 48. Controllable switch 46 may be configured as described herein and may connect to a control logic circuit via control gate output 60 as described above.
[0033] As will be appreciated by persons of ordinary skill based on the teachings described herein, an advantage of described circuits arises from the ability of the transistor and the diode to remove energy from the LC resonant pair wherein the capacitance (C) is provided by the transducer element. The ability to prevent the LC resonant oscillations from happening is accomplished by preventing current to go back into the inductor. The stored energy is shunted to ground when the transistor is turned back on during the negative part of the signal. This prevents ringing of the signal. Finally as the signal returns to positive, the diode clamps the voltage at the end of the sinusoidal pulse. This results in a single wave form being produced.
[0034] A control ASIC configured as mentioned above can turn on during this second portion of the wavelet without affecting the wavelet shape. Diode 44 is in reverse polarity at this time and will keep the transducer / inductor separated from the MOSFET 46. In one illustrative example, for a 50 MHz wave, the second portion of the wavelet is 10 nS. Control logic circuit 50 can close MOSFET 46 at any time during the second portion of the wavelet. For the given example, the MOSFET can be turned on at 15 nS + / - 5 nS after the initial MOSFET off state, without impacting the wavelet shape. In other words, the timing circuit can close the switch at any time during the second portion of the wavelet. This arrangement gives flexibility to the timing logic and eliminates the tight timing requirements.
[0035] As soon as transducer 16 voltage crosses zero, MOSFET 46 is already ON and diode 44 starts conducting. Inductor 42, MOSFET 46, and diode 44 again are in a conduction scenario,and the set current “I” passes through this pathway. Current “I” starts charging inductor 42 with energy for the next impulse request. See FIG. 5 for a single-cycle sinusoidal impulse generated by the described example pulser circuit of FIG. 3.
[0036] An advantage of disclosed embodiments is the “stacked” voltage tolerance of switches 44, 46. For the circuit embodiment shown in FIG. 3 where an N-channel MOSFET is used, the MOSFET only sees the positive transducer voltages and the diode only sees the negative transducer voltages. The total maximum peak-to-peak voltage applied to the transducer can be as high as the combined maximum voltage tolerances of the MOSFET and diode. For example, if the maximum permissible voltage to the MOSFET drain-source is 100 volts, and the maximum allowed reverse voltage on the diode is 100 volts, then the maximum peak-to-peak voltage on the transducer can be as high as 200 volts.
[0037] In one example, using a PMUT, transducer voltage can be as high as 200 volts. As described before, an increase in the voltage applied to the PMUT exponentially increases the output power. MOSFETs with the desired parameters and several hundred volts drain-source tolerance are available in sub-millimeter dimensions. The same is the case for diodes. As a further example, 200 volts stacked MOSFET and diode voltage will result in a 12 dB improvement over a 50 volts peak-to-peak drive. This directly translates into 12 dB improvements in the processed image signal-to-noise ratio.
[0038] As mentioned before, a simple circuit at the proximal side of the system can adjust the inductor current. This eliminates any impact the transmission line 20 loss would have on the pulse wavelet shape. The internal lumen of an IVUS catheter is very small and wires or microcoaxes used to transfer the electrical power can exhibit noticeable resistance and loss. Described embodiments lessen or eliminate the impact of transmission losses on the impulse energy and wavelet shape. Regardless of the line resistance, the inductor energy is only dependent on its set current with the equation 0.5*IA2*L. Both current “I” and the inductance L, are independent of the transmission line losses.
[0039] In a typical IVUS catheter the wires have to pass through a rotary junction. This will introduce additional signal loss and noise sources. Once again, the described approach of adjusting the line current will eliminate the impact of a rotary joint on the wavelet shape as well.Variations in joint impedance will be compensated by the set current control circuitry. The wavelet power and shape will remain independent of the rotary joint impact and the image quality will not be adversely affected by the joint motions.
[0040] If more than one cycle of a wavelet is desired to produce a chirp, the control circuitry or ASIC can initiate a cycle with the same approach, turning off controllable switch 46 (e.g. MOSFET). The turn ON will happen at any time during the negative portion of the ending cycle. For example, if two cycles of a 50MHz wavelet is desired, the controllable switch 46 can be turned back on at 35 nS + / - 5 nS. For three sinusoidal cycles, the turn-on will be at 55 nS + / - 5 nS, and so on. See FIG. 6 for a two-cycle impulse generated by the described example circuit of FIG. 3.
[0041] Alternatively, as controllable switch 46, a MOSFET can be replaced by a bipolar junction transistor. In such an alternative configuration, instead of a gate control voltage for the MOSFET, a small current is applied to the base-emitter of a bipolar junction transistor to keep it on. Reducing this current to zero will turn off the transistor and will have a similar effect as turning off the MOSFET.
[0042] In a typical IVUS catheter, the pulses are synchronized with the motor driving the torquecable. The torque cable running through the length of the catheter and at the distal end (transducer side) may not be fully synchronized with the motor. This can generate image artifacts. As a further feature of embodiments disclosed herein, as the pulses are generated at the distal side and accessible to the control distal control module or ASIC there, interruptions of the current to generate an impulse can be synchronized with a mechanical feature on the distal portion of the catheter (transducer side). For example, as illustrated in FIG. 7, in one embodiment, a small magnet 70 attached to catheter sheath 26 can be sensed as the starting zero angle using a Hall effect sensor 72 disposed on control module 14 or a portion of transducer 16 at distal end 13 of imaging core 10. Alternatively, as shown on FIG. 8, marking 74 on catheter sheath 26 can be sensed by an optocoupler or micro-switch 76, also disposed alternatively on control module 14 or a portion of transducer 16 at distal end 13 of imaging core 10. In this manner, pulses can synchronize the image with the catheter sheath and eliminate image disturbances and artifacts due to torque-cable wiggling.
[0043] FIG. 4 illustrates one configuration of a circuit board / block diagram for implantation of distal control module 14 according to the present disclosure. In this example, transducer^, configured as a PMUT, is connected to distal control module 14 via castellated conductors 18. In addition to components discussed above in connection with FIG. 3, control module 14 as shown in FIG. 4 includes conductive pads 64 for connection of conductors 20A, 20B of cable 20. In this case, current sense circuit 62 is realized using two clipping diodes (D2, D3). In further alternative embodiments, distal control module 14 may also include one or more of pressure, flow and temperature sensors. Distal control module 14 also includes ultrasound signal amplification circuitry as appropriate to the transducer type and power levels. Such amplification circuitry can be incorporated into an ASIC with other control functions as described above.
[0044] Persons of ordinary skill in the art will also appreciate that the teachings of the present disclosure are not limited to the use of PMUT-type transducers. Other transducer types, including but not limited to CMUT or conventional piezoelectric ultrasound transducers, may be utilized alternatively by persons of ordinary skill guided by the teachings of the present disclosure.
[0045] The foregoing has been a detailed description of illustrative embodiments of the disclosure. It is noted that in the present specification and claims appended hereto, conjunctive language such as is used in the phrases “at least one of X, Y and Z” and “one or more of X, Y, and Z,” unless specifically stated or indicated otherwise, shall be taken to mean that each item in the conjunctive list can be present in any number exclusive of every other item in the list or in any number in combination with any or all other item(s) in the conjunctive list, each of which may also be present in any number. Applying this general rule, the conjunctive phrases in the foregoing examples in which the conjunctive list consists of X, Y, and Z shall each encompass: one or more of X; one or more of Y; one or more of Z; one or more of X and one or more of Y; one or more of Y and one or more of Z; one or more of X and one or more of Z; and one or more of X, one or more of Y and one or more of Z.
[0046] Various modifications and additions can be made without departing from the spirit and scope of this disclosure. Features of each of the various embodiments described above may be combined with features of other described embodiments as appropriate in order to provide amultiplicity of feature combinations in associated new embodiments. Furthermore, while the foregoing describes a number of separate embodiments, what has been described herein is merely illustrative of the application of the principles of the present disclosure. Additionally, although particular methods herein may be illustrated and / or described as being performed in a specific order, the ordering is highly variable within ordinary skill to achieve aspects of the present disclosure. Accordingly, this description is meant to be taken only by way of example, and not to otherwise limit the scope of this disclosure or of the inventions as set forth in following claims.
Claims
What is claimed is:
1. A pulse control system for an ultrasonic imaging catheter, comprising: a transducer tank circuit configured to produce ultrasonic imaging pulses; and a switch circuit driving the transducer tank circuit between on and off states, wherein the off state causes generation of the imaging pulses and the on state stops generation of pulses; wherein the transducer tank circuit and the switch circuit are configured to be disposed together within an imaging core of the ultrasonic imaging catheter in a distal end region of the imaging core.
2. The pulse control system of claim 1, further comprising a control logic circuit configured to control on / off timing of the switch circuit, the control logic circuit further configured to be disposed together with the transducer tank circuit and switch circuit within the imaging core distal end.
3. The pulse control system of claim 1 or claim 2, further comprising a current sense circuit configured to determine current in the transducer tank circuit, the current sense circuit further configured to be disposed together with the transducer tank circuit and switch circuit within the imaging core distal end.
4. The pulse control system of any of claims 1-3, wherein the transducer tank circuit comprises an inductor connected in series or parallel with an ultrasonic transducer.
5. The pulse control system of claim 4, wherein the ultrasonic transducer is a micromachined ultrasonic transducer.
6. The pulse control system of claim 5, wherein the micromachined ultrasonic transducer is aPMUT.
7. The pulse control system of any of claims 1-6, wherein the switch circuit comprises a one-way switch connected in series with a controllable on / off switch.
8. The pulse control system of claim 7, wherein the one-way switch comprises a diode disposed between the controllable on / off switch and the transducer tank circuit.
9. The pulse control system of claim 8, wherein the controllable on / off switch comprises aMOSFET including a parasitic diode.
10. The pulse control system of any of claims 2-9, wherein the control logic circuit is configured as a part of a controllable on / off switch.
11. A pulser circuit for an intravascular ultrasonic imaging system, comprising: an inductor; a diode connected in series with the inductor; a current supply conductor connected to the inductor opposite the diode; a junction between the inductor and diode, said junction electrically connectable to an ultrasonic transducer to configure the ultrasonic transducer in series or parallel connection with the inductor; and a controllable on / off switch connected to the diode opposite the junction and electrically communicating with a ground conductor opposite the diode.
12. The pulser circuit of claim 11, wherein the controllable on / off switch comprises a parasitic diode.
13. The pulser circuit of claim 12, wherein the controllable on / off switch is configured as a MOSFET.
14. The pulser circuit of claim 13, further comprising a control logic circuit configured as a part of the MOSFET.
15. The pulser circuit of any of claims 11-14, wherein said pulser circuit is configured and dimensioned to be disposed within a distal end of an imaging core of the intravascular ultrasonic imaging system.
16. An imaging core for an intravascular ultrasonic imaging catheter, comprising core housing having disposed in a distal end region the pulse control system according to any of claims 1-10 or the pulser circuit according to any of claims 11-15 in combination with an ultrasonic transducer; a two conductor cable extending through the core housing from a distal end to the pulse control system or pulser circuit; and a fixing material filling at least the distal end of the core housing surrounding the pulse control system or pulser circuit.
17. The imaging core of claim 16, wherein the transducer is a PMUT.
18. An intravascular ultrasonic imaging catheter comprising the imaging core of claim 16 in combination with an outer catheter sheath.
19. An ultrasonic imaging catheter, comprising: an imaging core with a distal end configured for placement in a patient’s vasculature; an ultrasonic transducer disposed in the imaging core distal end; a pulse control disposed in the imaging core distal end and configured to control pulse generation by the ultrasonic transducer, said pulse control comprising - a transducer tank circuit including the ultrasonic transducer; and a switch circuit driving the transducer tank circuit between on and off states, wherein the off state causes generation of an imaging pulse and the on state stops generation of pulses; and a two conductor cable connected to the pulse control and extending through the imaging core to a proximal end thereof.
20. The imaging catheter of claim 19, wherein the transducer tank circuit comprises an inductor connected in series or parallel with the ultrasonic transducer.
21. The imaging catheter of claim 19 or claim 20, wherein the switch circuit comprises a oneway switch connected in series with a controllable on / off switch.
22. The imaging catheter of claim 21, wherein the one-way switch comprises a diode disposed between the controllable on / off switch and the transducer tank circuit.
23. The imaging catheter of claim 22, wherein the controllable on / off switch comprises a MOSFET including a parasitic diode.
24. The imaging catheter of any of claims 19-23, wherein the pulse control further comprises a control logic circuit configured to control on / off timing of the switch circuit.
25. The imaging catheter of claim 24, wherein the control logic circuit is configured as a part of a MOSFET containing the controllable on / off switch.
26. The imaging catheter of claim 19, wherein the pulse control comprises: an inductor;a diode connected in series with the inductor; a current supply conductor connected to the inductor opposite the diode; a junction between the inductor and diode, said junction electrically connected to the ultrasonic transducer to configure the ultrasonic transducer in series or parallel connection with the inductor; and a controllable on / off switch connected to the diode opposite the junction and electrically communicating with a ground conductor opposite the diode; wherein the inductor and ultrasonic transducer comprise the transducer tank circuit, and the diode and controllable on / off switch comprise the switch circuit; and wherein one said conductor of the two conductor cable is connected to the inductor opposite the junction to supply current to the pulse control.
27. The imaging catheter of any of claims 19-26, wherein the ultrasonic transducer is a PMUT.
28. The imaging catheter of claim 27, wherein the pulse control and PMUT are integrated together in a common electronics component.
29. The imaging catheter of any of claims 19-28, further comprising an outer sheath, wherein the imaging core is slidably and rotatably disposed within said outer sheath.
30. The imaging catheter of claim 18 or claim 29, wherein a marking element is disposed on the catheter sheath in a distal end thereof and a detector is disposed in the distal end of the imaging core, said marking element and detector cooperating to provide a signal indicative of an angular position of the imaging core with respect to the outer sheath.
31. The imaging catheter of claim 30, wherein the marking element is a magnet and the detector is a Hall effect sensor.
32. The imaging catheter of claim 30, wherein the marking element is an optically detectable surface mark and the detector is an opto-coupler or microswitch.
33. A method of controlling an ultrasonic transducer in an intravascular ultrasonic imaging catheter, comprising:turning off a current delivered to a resonant circuit including the ultrasonic transducer at an initial time causing the ultrasonic transducer to generate a pulse, wherein the pulse has a first positive half-cycle and a second negative half-cycle; and turning on the current delivered to the resonant circuit at any time during a time interval corresponding to total time of the second negative half-cycle causing cessation of pulse generation by the ultrasonic transducer.
34. The method of claim 33, wherein the resonant circuit includes a current interrupting inductor connected in series or parallel with the ultrasonic transducer, and said turning off comprises a switch circuit connected to a junction between the ultrasonic transducer and the inductor set to off at the initial time.
35. The method of claim 34, wherein said turning on the current delivered comprises setting the switch circuit to on during said time interval.
36. The method of claim 35, wherein: the switch circuit comprises a one-way diode switch connected in series with a controllable on / off switch with the diode switch disposed between the controllable on / off switch and the junction between the current interrupting inductor and ultrasonic transducer; setting the switch circuit to off comprises setting the controllable on / off switch to off through a control logic; and setting the switch circuit to on comprises setting the controllable on / off switch to on through the control logic.
37. The method of any of claims 33-36, comprising: generating a series of clean single pulses by repeating said turning off and turning on steps beginning at a first initial time followed by a first time interval aligned with the second negative half-cycle of a first pulse generated; maintaining current delivery to the resonant circuit until a next initial time; and repeating said generating and maintaining steps for a number of single pulse cycles.
38. The method of any of claims 33-36, comprising:generating a series of clean double pulses by repeating said turning off and turning on steps beginning at a first initial time followed by a first time interval aligned with the second negative half-cycle of a second pulse generated; maintaining current delivery to the resonant circuit until a next initial time; and repeating said generating and maintaining steps for a number of double pulse cycles.
39. The method of any of claims 33-36, comprising: generating a series of clean n-number pulses by repeating said turning off and turning on steps beginning at a first initial time followed by a first time interval aligned with the second negative half-cycle of the n-number pulse generated; maintaining current delivery to the resonant circuit until a next initial time; and repeating said generating and maintaining steps for plural of n-number pulse cycles.
40. The method of claim 39, further comprising changing n value between pulse cycles.