Display screen, display module and electronic device

Abstract

A display, a display module, and an electronic device are disclosed. The display includes a display pixel circuit and a controller. The display pixel circuit includes a first display pixel circuit and a second display pixel circuit. Within a scan time per frame for the display, when any one of a plurality of current scan rows is located in a non-display area, the controller controls an input voltage parameter of the first display pixel circuit corresponding to a current scan row located in a display area to be a first voltage, where a reset current value of a photodiode in the first display pixel circuit is a first current value; and when the plurality of current scan rows are all located in the display area, the controller controls an input voltage parameter of the second display pixel circuit corresponding to the plurality of current scan rows to be a second voltage, where a reset current value of a photodiode in the second display pixel circuit is a second current value, and a deviation between the second current value and the first current value is less than a preset threshold. According to this application, a problem that uneven brightness displaying occurs on the display can be avoided.

Description

[0001] This application claims priorities to Chinese Patent Application No. 202311107698.2, filed with the China National Intellectual Property Administration on August 29, 2023, entitled "DISPLAY AND ELECTRONIC DEVICE", and to Chinese Patent Application No. 202311169996.4, filed with the China National Intellectual Property Administration on September 11, 2023, entitled "DISPLAY, DISPLAY MODULE, AND ELECTRONIC DEVICE", both of which are incorporated herein by reference in their entireties.TECHNICAL FIELD

[0002] This application relates to the field of display technologies, and in particular, to a display, a display module, and an electronic device.BACKGROUND

[0003] Currently, users pay more attention to display effect of electronic devices, and a screen contrast is an important indicator for evaluating the display effect.

[0004] In a conventional technology, a screen contrast is increased by resetting an anode of a photodiode in a display pixel circuit for a plurality of times within a scan time of one frame. However, because a front or rear porch (porch) area exists during screen driving, when the anode of the photodiode in the display pixel circuit is reset for the plurality of times, a reset operation may fall in the front or rear porch (porch) area, and driving is not actually performed on the screen. This reset mode may result in uneven screen brightness displaying.SUMMARY

[0005] This application provides a display, a display module, and an electronic device, to effectively avoid a problem that uneven brightness displaying occurs on the display when a photodiode is reset for a plurality of times within a scan time per frame, thereby improving display effect of the display, the display module, and the electronic device.

[0006] According to a first aspect, an embodiment of this application provides a display. The display includes a display pixel circuit and a controller. The display pixel circuit is arranged in an array in a display area of the display, the display pixel circuit includes a photodiode, and the display pixel circuit includes a first display pixel circuit and a second display pixel circuit. Within a scan time per frame for the display, the controller is configured to: when any one of a plurality of current scan rows is located in a non-display area, control an input voltage parameter of the first display pixel circuit to be a first voltage, where a reset current value of a photodiode in the first display pixel circuit is a first current value, and the first display pixel circuit is a display pixel circuit corresponding to a current scan row located in the display area; and when the plurality of current scan rows are all located in the display area, control an input voltage parameter of the second display pixel circuit to be a second voltage, where a reset current value of a photodiode in the second display pixel circuit is a second current value, a deviation between the second current value and the first current value is less than a preset threshold, and the second display pixel circuit is a display pixel circuit corresponding to the plurality of current scan rows.

[0007] In this implementation, because a quantity of photodiodes that need to be reset when any one of the plurality of current scan rows is located in the non-display area is different from a quantity of photodiodes that need to be reset when the plurality of current scan rows are all located in the display area, the input voltage parameter of the first display pixel circuit and the input voltage parameter of the second display pixel circuit may be controlled to be different, so that the deviation between the first current value and the second current value is less than the preset threshold. This can effectively avoid a problem that uneven brightness displaying occurs on the display when the photodiode is reset for a plurality of times within a scan time per frame, thereby improving display effect of the display.

[0008] With reference to the first aspect, in a first possible implementation, the display pixel circuit further includes a reset switch transistor and an initial voltage input end, the initial voltage input end is connected to an anode of the photodiode through the reset switch transistor, and an input voltage parameter of the display pixel circuit is an anode voltage value of the photodiode.

[0009] In this implementation, the display controls the reset current value of the photodiode by controlling the anode voltage value of the photodiode, so that the deviation between the first current value and the second current value is less than the preset threshold. This can effectively avoid a problem that uneven brightness displaying occurs on the display when the photodiode is reset for a plurality of times within a scan time per frame, thereby improving display effect of the display.

[0010] With reference to the first possible implementation of the first aspect, in a second possible implementation, the controller is configured to: when any one of the current scan rows is located in the non-display area, control a voltage value of an initial voltage input end in the first display pixel circuit to be the first voltage, and control a reset switch transistor in the first display pixel circuit to be turned on; and when the plurality of current scan rows are all located in the display area, control a voltage value of an initial voltage input end in the second display pixel circuit to be the second voltage, and control a reset switch transistor in the second display pixel circuit to be turned on.

[0011] With reference to the first aspect, in a third possible implementation, the display pixel circuit further includes a reset switch transistor and an initial voltage input end, the initial voltage input end is connected to a cathode of the photodiode through the reset switch transistor, and an input voltage parameter of the display pixel circuit is a cathode voltage value of the photodiode.

[0012] In this implementation, the display controls the reset current value of the photodiode by controlling the cathode voltage value of the photodiode, so that the deviation between the first current value and the second current value is less than the preset threshold. This can effectively avoid a problem that uneven brightness displaying occurs on the display when the photodiode is reset for a plurality of times within a scan time per frame, thereby improving display effect of the display. In addition, the display controls the reset current value of the photodiode in various manners, and therefore has high flexibility.

[0013] With reference to the third possible implementation of the first aspect, in a fourth possible implementation, the controller is configured to: when any one of the current scan rows is located in the non-display area, control a voltage value of an initial voltage input end in the first display pixel circuit to be the first voltage, and control a reset switch transistor in the first display pixel circuit to be turned on; and when the plurality of current scan rows are all located in the display area, control a voltage value of an initial voltage input end in the second display pixel circuit to be the second voltage, and control a reset switch transistor in the second display pixel circuit to be turned on.

[0014] With reference to the first aspect, in a fifth possible implementation, the display pixel circuit further includes a drive switch transistor, a storage capacitor, a data transfer switch transistor, a data input end, and a power supply end, a first end of the drive switch transistor is connected to the power supply end, a second end of the drive switch transistor is connected to an anode of the photodiode, a control end of the drive switch transistor is connected to the data input end through the data transfer switch transistor, the storage capacitor is connected between the first end of the drive switch transistor and the control end, and an input voltage parameter of the display pixel circuit is a voltage value of the storage capacitor.

[0015] In this implementation, the display controls the reset current value of the photodiode by controlling the voltage value of the storage capacitor, so that the deviation between the first current value and the second current value is less than the preset threshold. This can effectively avoid a problem that uneven brightness displaying occurs on the display when the photodiode is reset for a plurality of times within a scan time per frame, thereby improving display effect of the display. In addition, the display controls the reset current value of the photodiode in various manners, and therefore has high flexibility.

[0016] With reference to the fifth possible implementation of the first aspect, in a sixth possible implementation, the controller is configured to: when any one of the current scan rows is located in the non-display area, control turn-on duration of a data transfer switch transistor in the first display pixel circuit to be first duration, where a voltage value of a storage capacitor in the first display pixel circuit is the first voltage; and when the plurality of current scan rows are all located in the display area, control turn-on duration of a data transfer switch transistor in the second display pixel circuit to be second duration, where a voltage value of a storage capacitor in the second display pixel circuit is the second voltage, and the drive switch transistor is in a turn-on state when the voltage value of the storage capacitor is the first voltage or the second voltage.

[0017] With reference to the first aspect, in a seventh possible implementation, the display pixel circuit further includes a data transfer switch transistor, a drive switch transistor, a data input end, and a power supply end, a first end of the drive switch transistor is connected to the power supply end, a second end of the drive switch transistor is connected to an anode of the photodiode, a control end of the drive switch transistor is connected to the data input end through the data transfer switch transistor, and an input voltage parameter of the display pixel circuit is a control end voltage value of the drive switch transistor.

[0018] In this implementation, the display controls the reset current value of the photodiode by controlling the control end voltage value of the drive switch transistor, so that the deviation between the first current value and the second current value is less than the preset threshold. This can effectively avoid a problem that uneven brightness displaying occurs on the display when the photodiode is reset for a plurality of times within a scan time per frame, thereby improving display effect of the display. In addition, the display controls the reset current value of the photodiode in various manners, and therefore has high flexibility.

[0019] With reference to the seventh possible implementation of the first aspect, in an eighth possible implementation, the controller is configured to: when any one of the current scan rows is located in the non-display area, control a voltage value of a data input end in the first display pixel circuit to be the first voltage, and control a data transfer switch transistor in the first display pixel circuit to be turned on; and when the plurality of current scan rows are all located in the display area, control a voltage value of a data input end in the second display pixel circuit to be the second voltage, and control a data transfer switch transistor in the second display pixel circuit to be turned on, where each of the first voltage and the second voltage is greater than a turn-on voltage threshold of the drive switch transistor.

[0020] With reference to the first aspect, in a ninth possible implementation, the display pixel circuit further includes a data transfer switch transistor, a drive switch transistor, a data input end, and a power supply end, a first end of the drive switch transistor is connected to the power supply end, a second end of the drive switch transistor is connected to an anode of the photodiode, a control end of the drive switch transistor is connected to the data input end through the data transfer switch transistor, and an input voltage parameter of the display pixel circuit is a control end voltage value of the data transfer switch transistor.

[0021] In this implementation, the display controls the reset current value of the photodiode by controlling the control end voltage value of the data transfer switch transistor, so that the deviation between the first current value and the second current value is less than the preset threshold. This can effectively avoid a problem that uneven brightness displaying occurs on the display when the photodiode is reset for a plurality of times within a scan time per frame, thereby improving display effect of the display. In addition, the display controls the reset current value of the photodiode in various manners, and therefore has high flexibility.

[0022] With reference to the ninth possible implementation of the first aspect, in a tenth possible implementation, each of the first voltage and the second voltage is less than a turn-on voltage threshold of the data transfer switch transistor.

[0023] In this implementation, the display adjusts the control end voltage value of the data transfer switch transistor in a case in which the data transfer switch transistor is in a turn-off state, to adjust an amplitude of a current flowing out of a channel of the data transfer switch transistor, so as to adjust the reset current value of the photodiode. In addition, because the deviation between the second current value and the first current value is less than the preset threshold, a problem that uneven brightness displaying occurs on the display when the photodiode is reset for a plurality of times within a scan time per frame can be avoided.

[0024] With reference to the ninth possible implementation of the first aspect, in an eleventh possible implementation, each of the first voltage and the second voltage is greater than a turn-on voltage threshold of the data transfer switch transistor.

[0025] In this implementation, the display adjusts the control end voltage value of the data transfer switch transistor in a case in which the data transfer switch transistor is in a turn-on state, to adjust an amplitude of a control end voltage of the drive switch transistor, so as to adjust the reset current value of the photodiode. In addition, because the deviation between the second current value and the first current value is less than the preset threshold, a problem that uneven brightness displaying occurs on the display when the photodiode is reset for a plurality of times within a scan time per frame can be avoided.

[0026] With reference to the first aspect to the eleventh possible implementation of the first aspect, in a twelfth possible implementation, the display pixel circuit further includes a third display pixel circuit and a fourth display pixel circuit. Within a scan time per frame within which a frame rate of the display is a first frame rate, the controller is configured to: when any one of the plurality of current scan rows is located in the non-display area, control the input voltage parameter of the first display pixel circuit to be the first voltage; and when the plurality of current scan rows are all located in the display area, control the input voltage parameter of the second display pixel circuit to be the second voltage. Within a scan time per frame after the frame rate of the display is switched from the first frame rate to a second frame rate, the controller is further configured to: when any one of the plurality of current scan rows is located in the non-display area, control an input voltage parameter of the third display pixel circuit to be the first voltage, where a reset current value of a photodiode in the third display pixel circuit is the first current value, and the third display pixel circuit is a display pixel circuit corresponding to a current scan row located in the display area; and when the plurality of current scan rows are all located in the display area, control an input voltage parameter of the fourth display pixel circuit to be the second voltage, where a reset current value of a photodiode in the fourth display pixel circuit is the second current value, and the fourth display pixel circuit is a display pixel circuit corresponding to the plurality of current scan rows.

[0027] In this implementation, before and after frame rate switching of the display, a deviation between the first current value and the second current value is always less than the preset threshold. Therefore, regardless of whether the frame rate of the display is switched, a problem that uneven brightness displaying occurs on the display when the photodiode is reset for a plurality of times within a scan time per frame can be avoided.

[0028] With reference to the twelfth possible implementation of the first aspect, in a thirteenth possible implementation, the first frame rate and the second frame rate are any two preset frame rates in K preset frame rates, where K≥F*x-x+1, an i th< preset frame rate in the K preset frame rates is F*x / (x+i-1), i is a positive integer, F is a maximum frame rate of the display, and x is a quantity of the plurality of current scan rows.

[0029] In this implementation, values of preset frame rates included in a set of gamma of the display are more diversified than values of preset frame rates included in a set of gamma in the conventional technology, so that the display can complete frame rate switching in the same set of gamma, to avoid screen brightness and color flickering of the display during frame rate switching between different sets of gamma, thereby improving display effect of the display.

[0030] According to a second aspect, an embodiment of this application provides a display module. The display module includes a protective layer, an anti-fingerprint layer, and the display provided in any one of the first aspect to the thirteenth possible implementation of the first aspect. The protective layer is located on a first surface of the display, and the anti-fingerprint layer is located on a surface that is of the protective layer and that is away from the display.

[0031] In this implementation, because a quantity of photodiodes that need to be reset when any one of a plurality of current scan rows is located in a non-display area is different from a quantity of photodiodes that need to be reset when the plurality of current scan rows are all located in a display area, an input voltage parameter of a first display pixel circuit and an input voltage parameter of a second display pixel circuit may be controlled to be different, so that a deviation between a first current value and a second current value is less than a preset threshold. This can effectively avoid a problem that uneven brightness displaying occurs on the display when the photodiode is reset for a plurality of times within a scan time per frame, thereby improving display effect of the display module.

[0032] According to a third aspect, an embodiment of this application provides an electronic device. The electronic device includes a housing and the display module connected to the housing provided in the third aspect.

[0033] In this embodiment of this application, because a quantity of photodiodes that need to be reset when any one of a plurality of current scan rows is located in a non-display area is different from a quantity of photodiodes that need to be reset when the plurality of current scan rows are all located in a display area, an input voltage parameter of a first display pixel circuit and an input voltage parameter of a second display pixel circuit may be controlled to be different, so that a deviation between a first current value and a second current value is less than a preset threshold. This can effectively avoid a problem that uneven brightness displaying occurs on the display when the photodiode is reset for a plurality of times within a scan time per frame, thereby improving screen display effect of the electronic device.BRIEF DESCRIPTION OF DRAWINGS

[0034] FIG. 1 is a diagram of an application scenario of an electronic device according to an embodiment of this application; FIG. 2 is a diagram of scanning of resetting an anode of a photodiode for three times within a scan time of one frame provided in a conventional technology; FIG. 3 is a diagram of a structure of a display according to an embodiment of this application; FIG. 4a is a diagram of a structure of a display pixel circuit according to an embodiment of this application; FIG. 4b is a diagram of another structure of a display pixel circuit according to an embodiment of this application; and FIG. 5 is a diagram of waveforms of input voltage parameters of a display pixel circuit before and after frame rate switching of a display according to an embodiment of this application. DESCRIPTION OF EMBODIMENTS

[0035] A display, a display module, and an electronic device provided in this application are applicable to electronic devices with displays, such as a smartphone, a tablet computer, a desktop computer, a television, a printer, and a wearable device, and may be applied to the electronic device field, the automobile field, the aerospace field, and the like. The following describes an application scenario of the electronic device by using an example in which the electronic device is a smartphone.

[0036] FIG. 1 is a diagram of an application scenario of an electronic device according to an embodiment of this application. The electronic device provided in this application is applicable to a smartphone shown in (a) in FIG. 1. The smartphone includes a display module 1 and a housing 2 connected to the display module 1. As shown in (b) in FIG. 1, the display module 1 includes a display 11, a protective layer 12, and an anti-fingerprint layer 13. The protective layer 12 is located on an upper surface of the display 11, and is configured to protect the display 11. The anti-fingerprint layer 13 is located on a surface that is of the protective layer 12 and that is away from the display 11, and is configured to improve a contact angle of the display module to prevent a fingerprint from remaining on a surface of the display module. The display 11 includes a display pixel circuit. There are n*m display pixel circuits. The n*m display pixel circuits are arranged in a display area of the display 11 in a manner of n rows and m columns, and each display pixel circuit includes a photodiode.

[0037] When the smartphone operates normally, a controller in the display 11 controls a plurality of scan rows to start scanning the display 11 from top to bottom; and within a scan time per frame for the display 11, when any one of a plurality of current scan rows is located in a non-display area, the controller controls an input voltage parameter of a first display pixel circuit to be a first voltage, where the first display pixel circuit is a display pixel circuit corresponding to a current scan row in the display area in the n*m display pixel circuits. Within a scan time per frame for scanning the display 1, when the plurality of current scan rows are all located in the display area, the controller further controls an input voltage parameter of a second display pixel circuit to be a second voltage, where the second display pixel circuit is a display pixel circuit, corresponding to the plurality of current scan rows, in the n*m display pixel circuits, so that a deviation between a reset current value of the photodiode in the first display pixel circuit and a reset current value of the photodiode in the second display pixel circuit is less than a preset threshold. Then, after resetting the photodiode in the display pixel circuit of the current scan row located in the display area, the controller 21 controls the display pixel circuit of the current scan row located in the display area to write a data voltage, and controls, based on the data voltage, brightness of the photodiode in the display pixel circuit of the current scan row located in the display area, to drive the display 11.

[0038] It may be understood that, because a quantity of photodiodes that need to be reset when any one of the plurality of current scan rows is located in the non-display area is different from a quantity of photodiodes that need to be reset when the plurality of current scan rows are all located in the display area, the input voltage parameter of the first display pixel circuit and the input voltage parameter of the second display pixel circuit may be controlled to be different, so that the deviation between the reset current value of the photodiode in the first display pixel circuit and the reset current value of the photodiode in the second display pixel circuit is less than the preset threshold. This can effectively avoid a problem that uneven brightness displaying occurs on the display 11 when the photodiode is reset for a plurality of times within a scan time per frame, thereby improving display effect of the display 11, the display module 1, and the smartphone.

[0039] The foregoing description is merely an example of the application scenario of the electronic device provided in this application, but is not exhaustive. The application scenario is not limited in this application.

[0040] For ease of understanding, the following first describes, with reference to FIG. 2 by using an example in which an anode of a photodiode is reset for three times within a scan time of one frame, a cause of uneven brightness displaying of a display, and then describes, with reference to FIG. 3 to FIG. 5, a structure and an operating principle of a display provided in this application by using examples.

[0041] FIG. 2 is a diagram of scanning of resetting an anode of a photodiode for three times within a scan time of one frame provided in a conventional technology. As shown in FIG. 2, a drive area during display driving includes a display area and a front or rear porch (porch) area. For example, if there are a total of 2520 rows in the display area, and there are a total of 60 rows in the front or rear porch (porch) area, it may be considered that the display is driven based on 2580 rows. It is assumed that the photodiode is reset for three times, and time intervals between the three times of resetting are equal. In this case, each of the time intervals between the three times of resetting is a scan time corresponding to 2580 / 3=860 rows. When the display starts to be scanned, as shown in (a) in FIG. 2, in three scan rows of the display, a first scan row is scanned downward from a first row in the display area, a second scan row is scanned downward from a position that is in the display area and that is 860 rows away from the first scan row downward, and a third scan row is scanned downward from a position that is in the display area and that is 860 rows away from the second scan row downward, at the same time. After the scan time corresponding to the 800 rows, as shown in (b) in FIG. 2, the third scan row enters the front or rear porch (porch) area from the display area, and the third scan row is always located in the front or rear porch (porch) area within a subsequent scan time corresponding to the 60 rows. Apparently, after the third scan row enters the front or rear porch (porch) area, a quantity of rows of a display pixel circuit that needs to be reset changes from three rows to two rows. Because reset voltage values of the photodiode are the same before and after the third scan row enters the front or rear porch (porch) area, but quantities of photodiodes that need to be reset are different, brightness displaying of the display is uneven in (b) in FIG. 2. It should be noted that, in FIG. 2, an example in which uneven brightness displaying occurs on the display when the quantity of rows of the display pixel circuit that needs to be reset changes from small to large is used for description. Actually, uneven brightness displaying still occurs on the display when the quantity of rows of the display pixel circuit that needs to be reset changes from large to small.

[0042] In view of this, this application provides a display. The display controls an input voltage parameter of a display pixel circuit corresponding to a current scan row in a display area in a case in which any one of a plurality of current scan rows is located in a front or rear porch (porch) area to be different from an input voltage parameter of a display pixel circuit corresponding to the current scan rows in a case in which the plurality of current scan rows are all located in the display area, to avoid a problem that uneven brightness displaying occurs on the display when a photodiode is reset for a plurality of times within a scan time per frame.

[0043] FIG. 3 is a diagram of a structure of a display according to an embodiment of this application. As shown in FIG. 3, the display 11 includes a controller 21 and a display pixel circuit. There are n*m display pixel circuits, and the n*m display pixel circuits correspond to a display pixel circuit 111, ..., a display pixel circuit 11m, ..., a display pixel circuit 1j1, ..., a display pixel circuit 1jm, ..., a display pixel circuit 1nl, ..., and a display pixel circuit 1nm shown in FIG. 3. The n*m display pixel circuits are arranged in an array in a display area of the display 11. For example, the n*m display pixel circuits are arranged in the display area of the display 11 in a manner of n rows and m columns. Each display pixel circuit includes a photodiode.

[0044] In an implementation, after the display 11 starts to operate, the controller 21 controls a plurality of scan rows to start scanning the display 11 from top to bottom. Within a scan time per frame for the display 11, when any one of a plurality of current scan rows is located in a non-display area, that is, the controller 21 is in a time period T2 shown in FIG. 3, the controller 21 controls an input voltage parameter Vin of a first display pixel circuit to be a first voltage V1, so that a reset current value of a photodiode in the first display pixel circuit is a first current value. A drive area during driving of the display 11 includes the display area and the non-display area. The non-display area may be a front or rear porch (porch) area, the front or rear porch (porch) area does not include a display pixel circuit, and no screen displaying is performed. The first display pixel circuit is a display pixel circuit corresponding to the current scan row in the display area in the n*m display pixel circuits. When the plurality of current scan rows are all located in the display area, that is, the controller 21 is in a time period T1 shown in FIG. 3, the controller 21 further controls an input voltage parameter Vin of a second display pixel circuit to be a second voltage V2, so that a reset current value of a photodiode in the second display pixel circuit is a second current value. The second display pixel circuit is a display pixel circuit corresponding to the plurality of current scan rows in the n*m display pixel circuits, and a deviation between the second current value and the first current value is less than a preset threshold. In addition, the display 11 provided in this application controls a quantity of times of resetting the photodiode and a frame rate of the display 11 within a scan time per frame through two separate circuits respectively, to reset the photodiode for a plurality of times within a scan time per frame. A quantity of the plurality of current scan rows within a scan time per frame corresponds to a quantity of times of resetting an anode of the photodiode in the display pixel circuit within a scan time per frame. For example, when the quantity of the plurality of current scan rows is 3, it indicates that the controller 21 resets the anode of the photodiode for three times within a scan time per frame.

[0045] It should be noted that, as a structure of the display pixel circuit changes, a value relationship between the first voltage and the second voltage also changes. For example, the second voltage is greater than the first voltage. In view of this, in this application, only that the deviation between the first current value and the second current value is less than the preset threshold is limited, and the value relationship between the first voltage and the second voltage is not limited.

[0046] In this embodiment of this application, because a quantity of photodiodes that need to be reset when any one of the plurality of current scan rows is located in the non-display area is different from a quantity of photodiodes that need to be reset when the plurality of current scan rows are all located in the display area, the input voltage parameter of the first display pixel circuit and the input voltage parameter of the second display pixel circuit may be controlled to be different, so that the deviation between the reset current value of the photodiode in the first display pixel circuit and the reset current value of the photodiode in the second display pixel circuit is less than the preset threshold. This can effectively avoid a problem that uneven brightness displaying occurs on the display 11 when the photodiode is reset for a plurality of times within a scan time per frame, thereby improving display effect of the display 11.

[0047] Because circuit structures of all the display pixel circuits in the display 11 are the same, the following describes a structure of the display pixel circuit and an operating principle of the display by using the display pixel circuit 111 as an example.

[0048] FIG. 4a is a diagram of a structure of a display pixel circuit according to an embodiment of this application. As shown in FIG. 4a, the display pixel circuit 111 includes a photodiode PD, a reset switch transistor RTFT, a drive switch transistor DTFT, a data transfer switch transistor STFT, a storage capacitor Cst, an initial voltage input end int, a data input end data, a power supply end ELVDD, and a power supply end ELVSS. An anode of the photodiode PD is connected to the initial voltage input end int through the reset switch transistor RTFT. Specifically, a source and a drain of the reset switch transistor RTFT are connected to the anode of the photodiode PD and the initial voltage input end int respectively. A cathode of the photodiode PD is connected to the power supply end ELVSS. A source of the drive switch transistor DTFT is connected to the power supply end ELVDD, and a drain of the drive switch transistor DTFT is connected to the anode of the photodiode PD. A source of the data transfer switch transistor STFT is connected to the data input end data, and a drain of the data transfer switch transistor STFT is connected to a gate of the drive switch transistor DTFT. The storage capacitor Cst is connected between the source and the gate of the drive switch transistor DTFT. The initial voltage input end int, the data input end data, the power supply end ELVDD, and the power supply end ELVSS are connected to voltages Vint, Vdata, VDD, and VSS respectively.

[0049] Any one of the reset switch transistor RTFT, the drive switch transistor DTFT, and the data transfer switch transistor STFT may be a low-temperature polysilicon-thin film transistor (Low Temperature PolySilicon-Thin Film Transistor, LTPS-TFT), an oxide TFT, or a combination of the LTPS-TFT and the oxide TFT. Because a source and a drain of the oxide TFT are symmetric, when any switch transistor in this application is connected, the source and the drain of the oxide TFT may be used interchangeably. For example, the drain and the source of the reset switch transistor RTFT are connected to the anode of the photodiode PD and the initial voltage input end int respectively.

[0050] In an implementation, within a scan time per frame for the display 11, when any one of a plurality of current scan rows is located in a non-display area, the controller 21 controls an input voltage parameter of a first display pixel circuit to be a first voltage, where the first display pixel circuit is a display pixel circuit corresponding to a current scan row in a display area, in the n*m display pixel circuits. When the plurality of current scan rows are all located in the display area, the controller 21 further controls an input voltage parameter of a second display pixel circuit to be a second voltage, where the second display pixel circuit is a display pixel circuit corresponding to the plurality of current scan rows in the n*m display pixel circuits. In this way, a deviation between a reset current value of a photodiode in the first display pixel circuit and a reset current value of a photodiode in the second display pixel circuit is less than a preset threshold. The input voltage parameter of the display pixel circuit includes at least one of an anode voltage value of the photodiode PD, a cathode voltage value of the photodiode PD, a voltage value of the storage capacitor Cst, a gate voltage value of the drive switch transistor DTFT, and a gate voltage value of the data transfer switch transistor STFT in the display pixel circuit.

[0051] In an optional embodiment, the input voltage parameter of the display pixel circuit is an anode voltage value of the photodiode PD.

[0052] Specifically, within a scan time per frame for the display 11, when any one of a plurality of current scan rows is located in a front or rear porch (porch) area, the controller 21 controls a voltage value of an initial voltage input end int in the first display pixel circuit to be the first voltage, and controls a reset switch transistor RDTD in the first display pixel circuit to be turned on, so that the anode voltage value of the photodiode PD in the first display pixel circuit is the first voltage, and the reset current value of the photodiode PD is a first current value when the anode voltage value of the photodiode PD is the first voltage. When the plurality of current scan rows are all located in the display area, the controller 21 further controls a voltage value of an initial voltage input end int in the second display pixel voltage to be the second voltage, and controls a reset switch transistor RTFT in the second display pixel circuit to be turned on, so that the anode voltage value of the photodiode PD in the second display pixel circuit is the second voltage, the reset current value of the photodiode PD is a second current value when the anode voltage value of the photodiode PD is the second voltage, and a deviation between the second current value and the first current value is greater than a preset deviation. This can avoid a problem that uneven brightness displaying occurs on the display 11 when the photodiode PD is reset for a plurality of times within a scan time per frame.

[0053] In another optional embodiment, the input voltage parameter of the display pixel circuit is a voltage value of the storage capacitor Cst.

[0054] Within a scan time per frame for the display 11, when any one of a plurality of current scan rows is located in a front or rear porch (porch) area, the controller 21 controls turn-on duration of a data transfer switch transistor STFT in the first display pixel circuit to be first duration, to charge a storage capacitor Cst, so that a voltage value of the storage capacitor Cst is the first voltage; and when the voltage value of the storage capacitor Cst is the first voltage, the drive switch transistor DTFT is in a turn-on state, and the reset current value of the photodiode is a first current value. When the plurality of current scan rows are all located in the display area, the controller 21 further controls turn-on duration of a data transfer switch transistor STFT in the second display pixel circuit to be second duration, to charge a storage capacitor Cst, so that a voltage value of the storage capacitor Cst is the second voltage; when the voltage value of the storage capacitor Cst is the second voltage, the drive switch transistor DTFT is in a turn-on state, and the reset current value of the photodiode is a second current value; and a deviation between the second current value and the first current value is less than the preset threshold. This can avoid a problem that uneven brightness displaying occurs on the display 11 when the photodiode PD is reset for a plurality of times within a scan time per frame.

[0055] In another optional embodiment, the input voltage parameter of the display pixel circuit is a gate voltage value of the drive switch transistor DTFT.

[0056] Within a scan time per frame for the display 11, when any one of a plurality of current scan rows is located in a front or rear porch (porch) area, the controller 21 controls a voltage value of a data input end data in the first display pixel circuit to be the first voltage, and controls a data transfer switch transistor STFT in the first display pixel circuit to be turned on, so that a gate voltage value of a drive switch transistor DTFT in the first display pixel circuit is the first voltage, and the reset current value of the photodiode PD is a first current value when the gate voltage value of the drive switch transistor DTFT is the first voltage. When the plurality of current scan rows are all located in the display area, the controller 21 further controls a voltage value of a data input end data in the second display pixel circuit to be the second voltage, and controls a data transfer switch transistor STFT in the second display pixel circuit to be turned on, so that a gate voltage value of a drive switch transistor DTFT in the second display pixel circuit is the second voltage, the reset current value of the photodiode PD is a second current value when the gate voltage value of the drive switch transistor DTFT is the second voltage, and a deviation between the second current value and the first current value is less than the preset threshold. This can avoid a problem that uneven brightness displaying occurs on the display 11 when the photodiode PD is reset for a plurality of times within a scan time per frame.

[0057] In another optional embodiment, the input voltage parameter of the display pixel circuit is a gate voltage value of the data transfer switch transistor STFT.

[0058] Specifically, within a scan time per frame for the display 11, when any one of a plurality of current scan rows is located in a front or rear porch (porch) area, the controller 21 controls a gate voltage value of a data transfer switch transistor STFT in the first display pixel circuit to be the first voltage, where the first voltage is less than a turn-on voltage threshold of the data transfer switch transistor STFT, and the reset current value of the photodiode is a first current value when a control end voltage value of the data transfer switch transistor STFT is the first voltage. When the plurality of current scan rows are all located in the display area, the controller 21 further controls a gate voltage value of a data transfer switch transistor STFT in the second display pixel circuit to be a second voltage, where the second voltage is less than a turn-on voltage threshold of the data transfer switch transistor STFT, the reset current value of the photodiode is a second current value when a turn-off voltage value of the data transfer switch transistor STFT is the second voltage, and a deviation between the second current value and the first current value is less than the preset threshold. It may be understood that the display 11 adjusts the gate voltage value of the data transfer switch transistor STFT in a case in which the data transfer switch transistor STFT is in a turn-off state, to adjust an amplitude of a current flowing out of a channel of the data transfer switch transistor STFT, so as to adjust the reset current value of the photodiode PD. In addition, because the deviation between the second current value and the first current value is less than the preset threshold, a problem that uneven brightness displaying occurs on the display 11 when the photodiode PD is reset for a plurality of times within a scan time per frame can be avoided.

[0059] Optionally, within a scan time per frame for the display 11, when any one of a plurality of current scan rows is located in a front or rear porch (porch) area, the controller 21 controls a gate voltage value of a data transfer switch transistor STFT in the first display pixel circuit to be the first voltage, where the first voltage is greater than a turn-on voltage threshold of the data transfer switch transistor STFT, and the reset current value of the photodiode is a first current value when the gate voltage value of the data transfer switch transistor STFT is the first voltage. When the plurality of current scan rows are all located in the display area, the controller 21 further controls a gate voltage value of a data transfer switch transistor STFT in the second display pixel circuit to be the second voltage, where the second voltage is greater than a turn-on voltage threshold of the data transfer switch transistor STFT, the reset current value of the photodiode is a second current value when a turn-off voltage value of the data transfer switch transistor STFT is the second voltage, and a deviation between the second current value and the first current value is less than the preset threshold. It may be understood that the display 11 adjusts the gate voltage value of the data transfer switch transistor STFT in a case in which the data transfer switch transistor STFT is in a turn-on state, to adjust an amplitude of a gate voltage of a drive switch transistor DTFT, so as to adjust the reset current value of the photodiode PD. In addition, because the deviation between the second current value and the first current value is less than the preset threshold, a problem that uneven brightness displaying occurs on the display 11 when the photodiode PD is reset for a plurality of times within a scan time per frame can be avoided.

[0060] In another optional embodiment, the input voltage parameter of the display pixel circuit is a cathode voltage value of the photodiode PD.

[0061] Optionally, the reset switch transistor RTFT shown in FIG. 4a may alternatively be connected to the cathode of the photodiode PD. For details, refer to the display pixel circuit shown in FIG. 4b. As shown in FIG. 4b, the cathode of the photodiode PD is connected to the initial voltage input end int through the reset switch transistor RTFT. Specifically, the source and the drain of the reset switch transistor RTFT are connected to the cathode of the photodiode PD and the initial voltage input end int respectively.

[0062] Within a scan time per frame for the display 11, when any one of a plurality of current scan rows is located in a front or rear porch (porch) area, the controller 21 controls a voltage value of an initial voltage input end int in the first display pixel circuit to be the first voltage, and controls a reset switch transistor RDTD in the first display pixel circuit to be turned on, so that the cathode voltage value of the photodiode PD in the first display pixel circuit is the first voltage, and the reset current value of the photodiode PD is a first current value when the anode voltage value of the photodiode PD is the first voltage. When the plurality of current scan rows are all located in the display area, the controller 21 further controls a voltage value of an initial voltage input end int in the second display pixel voltage to be the second voltage, and controls a reset switch transistor RTFT in the second display pixel circuit to be turned on, so that the cathode voltage value of the photodiode PD in the second display pixel circuit is the second voltage, the reset current value of the photodiode PD is a second current value when the anode voltage value of the photodiode PD is the second voltage, and a deviation between the second current value and the first current value is greater than the preset deviation. This can avoid a problem that uneven brightness displaying occurs on the display 11 when the photodiode PD is reset for a plurality of times within a scan time per frame.

[0063] Further, the display 11 may further implement seamless switching between high and low frame rates when the photodiode is reset for a plurality of times within a scan time per frame, to avoid a problem of screen brightness and color flickering during frame rate switching between different sets of gamma.

[0064] Within a scan time per frame within which a frame rate of the display 11 is a first frame rate, when any one of a plurality of current scan rows is located in the non-display area, the controller 21 controls the input voltage parameter of the first display pixel circuit to be the first voltage; and when the plurality of current scan rows are all located in the display area, the controller 21 controls the input voltage parameter of the second display pixel circuit to be the second voltage.

[0065] Then, the controller 21 controls the frame rate of the display 11 to switch from the first frame rate to a second frame rate. Within a scan time per frame after the frame rate of the display is switched from the first frame rate to the second frame rate, when any one of the plurality of current scan rows is located in the non-display area, the controller 21 controls an input voltage parameter of a third display pixel circuit to be the first voltage, so that a reset current value of a photodiode in the third display pixel circuit is the first current value. The third display pixel circuit is a display pixel circuit corresponding to the current scan row in the display area in the n*m display pixel circuits. When the plurality of current scan rows are all located in the display area, the controller 21 further controls an input voltage parameter of a fourth display pixel circuit to be the second voltage, so that a reset current value of a photodiode in the fourth display pixel circuit is the second current value. The fourth display pixel circuit is a display pixel circuit corresponding to the plurality of current scan rows in the n*m display pixel circuits. Herein, for a specific manner in which the display 11 controls the input voltage parameter of the display pixel circuit within a scan time per frame before and after frame rate switching, refer to the description in the foregoing embodiment. Details are not described herein again.

[0066] The first frame rate and the second frame rate are any two preset frame rates in K preset frame rates, where K≥F*x-x+1, an i th< preset frame rate in the K preset frame rates is F*x / (x+i-1), i is a positive integer, F is a maximum frame rate of the display 11, and x is a quantity of the plurality of current scan rows. It may be understood that the K preset frame rates are frame rates included in a set of gamma. Because i is the positive integer, a quantity of frame rates that can be implemented in a set of gamma provided in this application may be infinite.

[0067] For example, it is assumed that the maximum frame rate F of the display 11 is 120 Hz, and the photodiode is reset for three times within a scan time per frame, that is, the quantity of the plurality of current scan rows within a scan time per frame is 3. In this case, at least 358 preset frame rates included in a set of gamma of the display 11 are 120*3 / (3+1-1)=120 Hz, 120*3 / (3+2-1)=90 Hz, 120*3 / (3+3-1)=72 Hz, 120*3 / (3+4-1)=60 Hz, 120*3 / (3+5-1)=51.4 Hz, ..., and 120*3 / (3+358-1)=1 Hz. For details, refer to FIG. 5. FIG. 5 is a diagram of waveforms of input voltage parameters of a display pixel circuit before and after frame rate switching of the display according to this embodiment of this application. As shown in FIG. 5, the frame rate of the display 11 may be any one of 120 Hz, 90 Hz, 72 Hz, 60 Hz, ..., and 1 Hz. When the frame rate of the display 11 is 120 Hz, three operating periods T of the display 11 form a scan time of one frame in a case in which the frame rate of the display 11 is 120 Hz, that is, a 1-frame shown in FIG. 5. One operating period T of the display 11 is T=T1+T2, where T1 represents a time period corresponding to a case in which three current scan rows of the display 11 are all located in the display area, and T2 represents a time period corresponding to a case in which any one of the three current scan rows of the display 11 is located in the front or rear porch (porch) area. When the frame rate of the display 11 is 90 Hz, four operating periods T of the display 11 form a scan time of one frame for the display 11. When the frame rate of the display 11 is 72 Hz, five operating periods T of the display 11 form a scan time of one frame for the display 11. When the frame rate of the display 11 is 60 Hz, six operating periods T of the display 11 form a scan time of one frame for the display 11.

[0068] In addition, it is assumed that the first frame rate is 120 Hz, the second frame rate is 90 Hz, the frame rate of the display 11 is 120 Hz in a time period from t1 to t7, and the frame rate of the display 11 is switched from 120 Hz to 90 Hz after the moment t7. In this case, in a time period from t1 to t2, namely, in a time period corresponding to a case in which three current scan rows of the display 11 are all located in the display area, the controller 21 controls the input voltage parameter of the second display pixel circuit to be the second voltage V2. In a time period from t2 to t3, namely, in a time period corresponding to a case in which any one of the three current scan rows of the display 11 is located in the display area, the controller 21 controls the input voltage parameter of the first display pixel circuit to be the first voltage V1. The rest may be deduced by analogy. In a time period from t6 to t7, namely, in a time period corresponding to a case in which any one of the three current scan rows of the display 11 is located in the display area, the controller 21 controls the input voltage parameter of the first display pixel circuit to be the first voltage V1. The frame rate of the display 11 is switched from 120 Hz to 90 Hz after the moment t7. In a time period from t7 to t8, namely, in a time period corresponding to a case in which three current scan rows of the display 11 are all located in the display area, the controller 21 controls the input voltage parameter of the fourth display pixel circuit to be the second voltage V2. In a time period from t8 to t9, namely, in a time period corresponding to a case in which any one of the three current scan rows of the display 11 is located in the display area, the controller 21 controls the input voltage parameter of the third display pixel circuit to be the first voltage V1.

[0069] Based on this, it can be learned that values of preset frame rates included in a set of gamma of the display 11 are more diversified than values of preset frame rates included in a set of gamma in the conventional technology. For example, it is assumed that the maximum frame rate of the display 11 is 120 Hz. In this case, a set of gamma in the conventional technology includes frame rates 120 Hz, 60 Hz, 40 Hz, 30 Hz, 24 Hz, 20 Hz, ..., and 1 Hz. Apparently, the set of gamma in the conventional technology does not include frame rates such as 90 Hz and 72 Hz. In addition, in the set of gamma in the conventional technology, if the frame rate of the display 11 needs to be switched from 120 Hz to 90 Hz, a control time sequence output by a drive circuit to the display pixel circuit changes. In this case, the current set of gamma including 120 Hz needs to be switched to another set of gamma including 72 Hz, resulting in brightness and color flickering of the display 11. However, the display 11 in this application may provide a set of gamma with more diversified preset frame rate values, so that the display 11 can complete frame rate switching in the same set of gamma, to avoid screen brightness and color flickering of the display 11 during frame rate switching between different sets of gamma, thereby improving display effect of the display 11.

[0070] Based on the display 11 shown in FIG. 3 and the display pixel circuit shown in FIG. 4a or FIG. 4b, this application further provides a display module. The display module includes the display 11, a protective layer, and an anti-fingerprint layer. The protective layer is located on an upper surface of the display 11, and is configured to protect the display 11. The anti-fingerprint layer is located on a surface that is of the protective layer and that is away from the display 11, and is configured to improve a contact angle of the display module to prevent a fingerprint from remaining on a surface of the display module. Herein, for a specific structure of the display module, refer to the diagram of the structure of the display module 1 shown in (b) in FIG. 1. Details are not described herein again. The display module may further add a stack layer based on an actual requirement to meet different application scenarios. For example, the display module may further include an anti-static layer, and the anti-static layer is located between the anti-fingerprint layer and the protective layer, and is configured to reduce friction static electricity generated on the surface of the display module.

[0071] In this embodiment of this application, because a quantity of photodiodes that need to be reset when any one of a plurality of current scan rows is located in a non-display area is different from a quantity of photodiodes that need to be reset when the plurality of current scan rows are all located in a display area, an input voltage parameter of a first display pixel circuit and an input voltage parameter of a second display pixel circuit may be controlled to be different, so that a deviation between a reset current value of a photodiode in the first display pixel circuit and a reset current value of a photodiode in the second display pixel circuit is less than a preset threshold. This can effectively avoid a problem that uneven brightness displaying occurs on the display 11 when the photodiode is reset for a plurality of times within a scan time per frame, thereby improving display effect of the display module.

[0072] Based on the display module in the foregoing embodiment, this application further provides an electronic device. The electronic device includes a display module and a housing connected to the display module. For a specific structure of the electronic device, refer to the diagram of the structure in which the electronic device is a smartphone shown in (a) in FIG. 1. Details are not described herein again.

[0073] In this embodiment of this application, because a quantity of photodiodes that need to be reset when any one of a plurality of current scan rows is located in a non-display area is different from a quantity of photodiodes that need to be reset when the plurality of current scan rows are all located in a display area, an input voltage parameter of a first display pixel circuit and an input voltage parameter of a second display pixel circuit may be controlled to be different, so that a deviation between a reset current value of a photodiode in the first display pixel circuit and a reset current value of a photodiode in the second display pixel circuit is less than a preset threshold. This can effectively avoid a problem that uneven brightness displaying occurs on the display 11 when the photodiode is reset for a plurality of times within a scan time per frame, thereby improving screen display effect of the electronic device.

[0074] The foregoing descriptions are merely specific implementations of this application, but are not intended to limit the protection scope of this application. Any variation or replacement readily figured out by a person skilled in the art within the technical scope disclosed in this application shall fall within the protection scope of this application. Therefore, the protection scope of this application shall be subject to the protection scope of the claims.

Claims

1. A display, wherein the display comprises a display pixel circuit and a controller, wherein the display pixel circuit is arranged in an array in a display area of the display, the display pixel circuit comprises a photodiode, and the display pixel circuit comprises a first display pixel circuit and a second display pixel circuit; and within a scan time per frame for the display, the controller is configured to: when any one of a plurality of current scan rows is located in a non-display area, control an input voltage parameter of the first display pixel circuit to be a first voltage, wherein a reset current value of a photodiode in the first display pixel circuit is a first current value, and the first display pixel circuit is a display pixel circuit corresponding to a current scan row located in the display area; and when the plurality of current scan rows are all located in the display area, control an input voltage parameter of the second display pixel circuit to be a second voltage, wherein a reset current value of a photodiode in the second display pixel circuit is a second current value, a deviation between the second current value and the first current value is less than a preset threshold, and the second display pixel circuit is a display pixel circuit corresponding to the plurality of current scan rows.

2. The display according to claim 1, wherein the display pixel circuit further comprises a reset switch transistor and an initial voltage input end, the initial voltage input end is connected to an anode of the photodiode through the reset switch transistor, and an input voltage parameter of the display pixel circuit is an anode voltage value of the photodiode.

3. The display according to claim 2, wherein the controller is configured to: when any one of the current scan rows is located in the non-display area, control a voltage value of an initial voltage input end in the first display pixel circuit to be the first voltage, and control a reset switch transistor in the first display pixel circuit to be turned on; and when the plurality of current scan rows are all located in the display area, control a voltage value of an initial voltage input end in the second display pixel circuit to be the second voltage, and control a reset switch transistor in the second display pixel circuit to be turned on.

4. The display according to claim 1, wherein the display pixel circuit further comprises a reset switch transistor and an initial voltage input end, the initial voltage input end is connected to a cathode of the photodiode through the reset switch transistor, and an input voltage parameter of the display pixel circuit is a cathode voltage value of the photodiode.

5. The display according to claim 4, wherein the controller is configured to: when any one of the current scan rows is located in the non-display area, control a voltage value of an initial voltage input end in the first display pixel circuit to be the first voltage, and control a reset switch transistor in the first display pixel circuit to be turned on; and when the plurality of current scan rows are all located in the display area, control a voltage value of an initial voltage input end in the second display pixel circuit to be the second voltage, and control a reset switch transistor in the second display pixel circuit to be turned on.

6. The display according to claim 1, wherein the display pixel circuit further comprises a drive switch transistor, a storage capacitor, a data transfer switch transistor, a data input end, and a power supply end, a first end of the drive switch transistor is connected to the power supply end, a second end of the drive switch transistor is connected to an anode of the photodiode, a control end of the drive switch transistor is connected to the data input end through the data transfer switch transistor, the storage capacitor is connected between the first end of the drive switch transistor and the control end, and an input voltage parameter of the display pixel circuit is a voltage value of the storage capacitor.

7. The display according to claim 6, wherein the controller is configured to: when any one of the current scan rows is located in the non-display area, control turn-on duration of a data transfer switch transistor in the first display pixel circuit to be first duration, wherein a voltage value of a storage capacitor in the first display pixel circuit is the first voltage; and when the plurality of current scan rows are all located in the display area, control turn-on duration of a data transfer switch transistor in the second display pixel circuit to be second duration, wherein a voltage value of a storage capacitor in the second display pixel circuit is the second voltage, and the drive switch transistor is in a turn-on state when the voltage value of the storage capacitor is the first voltage or the second voltage.

8. The display according to claim 1, wherein the display pixel circuit further comprises a data transfer switch transistor, a drive switch transistor, a data input end, and a power supply end, a first end of the drive switch transistor is connected to the power supply end, a second end of the drive switch transistor is connected to an anode of the photodiode, a control end of the drive switch transistor is connected to the data input end through the data transfer switch transistor, and an input voltage parameter of the display pixel circuit is a control end voltage value of the drive switch transistor.

9. The display according to claim 8, wherein the controller is configured to: when any one of the current scan rows is located in the non-display area, control a voltage value of a data input end in the first display pixel circuit to be the first voltage, and control a data transfer switch transistor in the first display pixel circuit to be turned on; and when the plurality of current scan rows are all located in the display area, control a voltage value of a data input end in the second display pixel circuit to be the second voltage, and control a data transfer switch transistor in the second display pixel circuit to be turned on, wherein each of the first voltage and the second voltage is greater than a turn-on voltage threshold of the drive switch transistor.

10. The display according to claim 1, wherein the display pixel circuit further comprises a data transfer switch transistor, a drive switch transistor, a data input end, and a power supply end, a first end of the drive switch transistor is connected to the power supply end, a second end of the drive switch transistor is connected to an anode of the photodiode, a control end of the drive switch transistor is connected to the data input end through the data transfer switch transistor, and an input voltage parameter of the display pixel circuit is a control end voltage value of the data transfer switch transistor.

11. The display according to claim 10, wherein each of the first voltage and the second voltage is less than a turn-on voltage threshold of the data transfer switch transistor.

12. The display according to claim 10, wherein each of the first voltage and the second voltage is greater than a turn-on voltage threshold of the data transfer switch transistor.

13. The display according to any one of claims 1 to 12, wherein the display pixel circuit further comprises a third display pixel circuit and a fourth display pixel circuit; within a scan time per frame within which a frame rate of the display is a first frame rate, the controller is configured to: when any one of the plurality of current scan rows is located in the non-display area, control the input voltage parameter of the first display pixel circuit to be the first voltage; and when the plurality of current scan rows are all located in the display area, control the input voltage parameter of the second display pixel circuit to be the second voltage; and within a scan time per frame after the frame rate of the display is switched from the first frame rate to a second frame rate, the controller is further configured to: when any one of the plurality of current scan rows is located in the non-display area, control an input voltage parameter of the third display pixel circuit to be the first voltage, wherein a reset current value of a photodiode in the third display pixel circuit is the first current value, and the third display pixel circuit is a display pixel circuit corresponding to a current scan row located in the display area; and when the plurality of current scan rows are all located in the display area, control an input voltage parameter of the fourth display pixel circuit to be the second voltage, wherein a reset current value of a photodiode in the fourth display pixel circuit is the second current value, and the fourth display pixel circuit is a display pixel circuit corresponding to the plurality of current scan rows.

14. The display according to claim 13, wherein the first frame rate and the second frame rate are any two preset frame rates in K preset frame rates, wherein K≥F*x-x+1, an ith preset frame rate in the K preset frame rates is F*x / (x+i-1), i is a positive integer, F is a maximum frame rate of the display, and x is a quantity of the plurality of current scan rows.

15. A display module, wherein the display module comprises a protective layer, an anti-fingerprint layer, and the display according to any one of claims 1 to 14, wherein the protective layer is located on a first surface of the display, and the anti-fingerprint layer is located on a surface that is of the protective layer and that is away from the display.

16. An electronic device, wherein the electronic device comprises a housing and the display module connected to the housing according to claim 15.

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