Buffer utilisation

Abstract

There is provided a method for writing image data samples received in a first arrangement to a buffer and reading the image data samples from the buffer to create a second arrangement. The first arrangement is different from the second arrangement. The method comprising: during a first stage: writing, to the buffer, each image data sample of a first data portion of image data samples received in the first arrangement; during a second stage: reading, from the buffer, each image data sample from the first data portion of image data samples by determining a corresponding second stage buffer address for each read operation in dependence on the first arrangement and the second arrangement so that each image data sample of the first data portion is read according to the second arrangement; writing, to the buffer, each image data sample of a second data portion of image data samples by determining a corresponding buffer address for each write operation to be the second stage buffer address used to read the corresponding image data sample in the first data portion; wherein the writing is at least one buffer address 15 behind the reading; and during a third stage: reading, from the buffer, each image data sample from the second data portion of image data samples by determining a corresponding third stage buffer address in dependence on the second stage determining, the first arrangement and the second arrangement so that each image data sample of the second data portion is read according to the second arrangement of the image data samples.

Description

[0001] BUFFER UTILISATION

[0002] Technical Field

[0003] The invention relates to a method of writing image data samples and reading the image data samples from a buffer.

[0004] Background

[0005] Ping pong buffers utilise two buffers and while one is being read from, the other is being written to. By alternating the roles of the buffers, data can be written to one buffer and at the same time data can be read from the other buffer, while preventing unwanted overwriting of data in the buffers and allowing for a smooth data flow.

[0006] Despite their advantages, ping pong buffers carry several significant drawbacks. Primarily, the need for two separate buffers necessitates additional memory resources, posing a considerable disadvantage in environments where memory capacity is limited.

[0007] Therefore, there is a compelling need for a way to retain the benefits of ping pong buffers but address at least one of their inherent drawbacks.

[0008] Summary

[0009] There is provided herein a method for writing image data samples received in a first arrangement to a buffer and reading the image data samples from the buffer to create a second arrangement. The writing and reading of image data samples is performed using a plurality of stages each comprising selective address allocation depending on the stage, and the first and second arrangements.

[0010] According to a first aspect of the invention, there is provided a method for writing image data samples received in a first arrangement to a buffer and reading the image data samples from the buffer to create a second arrangement. The first arrangement is different from the second arrangement. The method comprising: during a first stage: writing, to the buffer, each image data sample of a first data portion of image data samples received in the first arrangement; during a second stage: reading, from the buffer, each image data sample from the first data portion of image data samples by determining a corresponding second stage buffer address for each read operation in dependence on the first arrangement and the second arrangement so that each image data sample of the first data portion is read according to the second arrangement; writing, to the buffer, each image data sample of a second data portion of image data samples by determining a corresponding buffer address for each write operation to be the second stage buffer address used to read the corresponding image data sample in the first data portion; wherein the writing is at least one buffer address behind the reading; and during a third stage: reading, from the buffer, each image data sample from the second data portion of image data samples by determining a corresponding third stage buffer address in dependence on the second stage determining, the first arrangement and the second arrangement so that each image data sample of the second data portion is read according to the second arrangement of the image data samples.

[0011] In this way, there is provided an improved buffer utilisation compared to the two-buffer solution of the ping pong buffer, mitigating the previously highlighted drawbacks such as additional memory resource requirements while maintaining the throughput of the ping pong buffer arrangement.

[0012] Preferably, the first arrangement is based on a block-based raster scan order. In this way, the invention disclosed herein can be used with image processing applications that output the image data samples in block-based raster scan order.

[0013] Preferably, the second arrangement is based on a line-based raster scan order. In this way, the invention disclosed herein can be used with image processing applications that require the image data samples to be in line-based raster scan order.

[0014] Preferably, the determining the corresponding second stage buffer address for each read operation is in dependence on block dimensions of the block-based raster scan order and line dimensions of the line-based raster scan order.

[0015] Preferably, during the second stage, for a read operation that immediately follows a read operation completing a line in the line-based raster scan order of the second arrangement, determining the corresponding second stage buffer address to be a block width following from the corresponding buffer address used for the first read operation for the line.

[0016] Preferably, during the second stage, for a read operation that follows a read operation completing a sequence of read operations equal to a block width in a line of the line-based raster scan order but does not complete the line, determining the corresponding buffer address for the read operation to be a block following from the corresponding buffer address of the first read operation of the sequence of read operations.

[0017] Preferably, determining the corresponding third stage buffer address for each read operation is in dependence on block dimensions and line dimensions.

[0018] Preferably, during the third stage, for a read operation that immediately follows a read operation completing a line in the line-based raster scan order of the second arrangement, determining the corresponding third stage buffer address to be a block from the corresponding buffer address for the first read operation of the line in the line-based raster scan order.

[0019] Preferably, for a read operation, during the third stage, that follows a read operation completing a sequence of read operations equivalent to a block width in a line of the line based raster scan order but does not complete the line, the corresponding third stage buffer address for the read operation is half a block from the corresponding buffer address of the first read operation of the sequence of read operation.

[0020] Preferably, the first arrangement is based on a line-based raster scan order and the second arrangement is based on a block-based raster scan order.

[0021] Preferably, during the second stage, for the first read operation determining the corresponding second stage buffer address to be the first buffer address used to write image data samples in the first stage.

[0022] Preferably, during the third stage for the first read operation, determining the corresponding third stage buffer address to be the first buffer address used to write image data samples in the second stage.

[0023] Preferably, the reading and writing in the second stage are simultaneous.

[0024] Preferably, during the first stage, the writing comprises writing each image data sample of the first data portion received in the first arrangement in the buffer in a raster scan order.

[0025] According to a second aspect of the invention, there is provided a hardware module comprising a buffer, a write logic and a read logic, wherein the hardware module is configured to perform the method steps of any preceding statement.

[0026] According to a third aspect of the invention, there is provided a computer readable storage medium comprising instructions which when executed by a processor, the processor performs the method steps of any preceding method statement.

[0027] Brief Description of the Drawings

[0028] The invention shall now be described, by way of example only, with reference to the accompanying drawings in which:

[0029] FIG. 1 is a block diagram which depicts a ping pong buffer arrangement;

[0030] FIG. 2 is a block diagram which depicts a single buffer arrangement in accordance with an embodiment of the invention; FIG. 3 is a block diagram which depicts a usage of a single buffer arrangement to process an input stream in accordance with FIG. 2; and

[0031] FIG. 4 depicts the functionality of the control logic of the single buffer arrangement in accordance with FIG. 2.

[0032] Detailed Description

[0033] FIG. 1 depicts a ping pong buffer arrangement 100. The ping pong buffer arrangement 100 receives an input stream 110 comprising image data samples and outputs an output stream 120 also comprising image data samples. The ping pong buffer arrangement 100 comprises two buffers, namely buffer 130 and buffer 140. Furthermore, the ping pong buffer arrangement 100 comprises a write logic 150, a read logic 160 and a control logic 170.

[0034] An image data sample herein refers to data representing a pixel in an image or a frame of a video. An image data sample may contain any of colour, intensity, or other pixel-specific properties.

[0035] Buffer 130 and buffer 140 operate in tandem, with one being written to (from the input stream 110) while the other is being read from (feeding the output stream 120). The alternating write and read operations of buffer 130 and buffer 140 optimises the flow of data, ensuring no interruptions or delays in processing while preventing unwanted overwriting of data in the buffers.

[0036] Moreover, the write logic 150 manages the process of storing data from the input stream 110 in either buffer 130 or buffer 140, based on their operational state. Conversely, the read logic 160 manages the reading of data from the non-writing buffer to feed the output stream 120.

[0037] The control logic 170 controls the changing states of buffers 130 and 140, the write logic 150 and the read logic 160 to guarantee that the writing and reading processes are always separated in different buffers to maintain data integrity and prevent overwriting or data loss.

[0038] Despite the advantages of ping pong buffers, ping pong buffers also have notable drawbacks. For example, maintaining two separate buffers (buffers 130 and 140) demands additional memory resources, which could be a significant disadvantage in memory- constrained environments. FIG. 2 is a block diagram which depicts a single buffer arrangement 200 in accordance with an embodiment of the invention. Similar to the ping pong buffer arrangement 100, the single buffer arrangement 200 receives the input stream 110 and outputs the output stream 120. Again, similar to the ping pong buffer arrangement 100, the single buffer arrangement 200 comprises write logic 250, read logic 260 and control logic 270. However, unlike the ping pong buffer arrangement 100, the single buffer arrangement 200 comprises a single buffer, buffer 230.

[0039] The single buffer arrangement 260 implements a multistage method for writing, in the buffer 230, image data samples received in a first arrangement and reading, from the same buffer 230, image data samples a second, different, arrangement.

[0040] An arrangement of image data samples refers to the order of the image data samples as they are received or generated from or to a data stream respectively. The first and second arrangements refer to orders of image data samples following a block-based raster scan order, line-based raster scan order, or any other specific order. The first and second arrangements are different arrangements so that the buffer arrangement 200 can be used to bridge between two systems that deal with image data samples in different ways. For example, an encoder or decoder working block-by-block may output image data samples in a data stream in a block-based raster scan order, while a display output may require those same image data samples a data stream in a line-based raster scan order.

[0041] In this example, the first arrangement is based on a block-based raster scan order and the second arrangement is based on a line-based raster scan order.

[0042] The multistage method operates as follows:

[0043] In a first stage of the method, the write logic 250 coordinates the writing of each image data sample of a first data portion of the input stream 110, received in a first arrangement, into the buffer 230. A data portion herein refers to a subset of the image data samples received for processing at the buffer 230. Typically, a data portion is a buffer's worth of image data samples i.e., and image data portion comprises the same number of image data samples as the buffer has buffer addresses.

[0044] In this example, the writing comprises writing each image data sample of the first data portion received in the first arrangement in the buffer 230 in a raster scan order. However, any other order may be used.

[0045] During a second stage, the read logic 260 coordinates the reading of each image data sample from the first data portion from the buffer 230. The specific buffer address for each read operation is determined by considering the first arrangement and the second arrangement of image data samples to ensure each image data sample of the first data portion is read from the buffer 230 to formulate the output stream 120 according to the second arrangement.

[0046] In parallel to the reading of the second stage, write logic 250 coordinates the writing of each image data sample of a second data portion of the input stream 110 into the buffer, with the buffer address for each write operation being the same as the buffer address used to read the corresponding image data sample in the first data portion. The control logic 270 is configured to ensure that the write operations are always at least one buffer address behind the read operations to prevent data corruption.

[0047] In this example, the buffer address for each read operation during the second stage is determined in dependence on the block dimensions of the block-based raster scan order and the line dimensions of the line-based raster scan order. However, the skilled person would realise that other dimensions may be used depending on the particular arrangements being used in order to produce the output stream 120 in the second arrangement.

[0048] In this example using a block-based raster scan input and a line-based raster scan output, for a read operation that immediately follows a read operation completing a line in the line-based raster scan order of the second arrangement, the buffer address for the read operation is a block width following from the buffer address used for the first read operation for the line.

[0049] Following on, for a read operation that follows a read operation completing a sequence of read operations equal to a block width in a line of the line-based raster scan order but does not complete the line, the buffer address for the read operation is a block following from the corresponding buffer address of the first read operation of the sequence of read operations.

[0050] The buffer address for the first read operation in the second stage is the first buffer address used to write image data samples in the first stage.

[0051] In this example, the reading and writing in the second stage are simultaneous.

[0052] In a third stage, read logic 260 coordinates the reading of each image data sample from the second data portion of image data samples. The buffer address for each read operation is determined in dependence on the second stage determinations, the first arrangement, and the second arrangement so that for each image data sample of the second data portion to be read according to the second arrangement. In this example, the buffer address for each read operation is in dependence on block dimensions and line dimensions of the first and second arrangements, respectively. Other dimensions may be used depending on the first and second arrangements.

[0053] In this example using a block-based raster scan input and a line-based raster scan output, for a read operation that immediately follows a read operation completing a line in the line-based raster scan order of the second arrangement, the buffer address of the read operation is a block from the corresponding buffer address for the first read operation of the line in the line-based raster scan order.

[0054] Following on, for a read operation that follows a read operation completing a sequence of read operations equivalent to a block width in a line of the line-based raster scan order but does not complete the line, the buffer address for the read operation is a block from the corresponding buffer address of the first read operation of the sequence of read operation.

[0055] The buffer address for the first read operation in the third stage is the first buffer address used to write image data samples in the second stage.

[0056] The single buffer arrangement 200 consisting of a single buffer 230 provides an improved approach to data management compared to the two-buffer solution of the ping pong buffer, mitigating the previously highlighted drawbacks such as additional memory resource requirements while maintaining the throughput of the ping pong buffer.

[0057] FIG. 3 depicts a usage of the single buffer arrangement 200 to process the input stream 110. In FIG. 3 the input stream 110 is fed into the single buffer arrangement 200, which subsequently generates the output stream 120 in the way described in relation to FIG. 2. Input stream 110 comprises image data samples in a first arrangement and output stream 120 comprises the image data samples in, a different, second arrangement.

[0058] An input surface 310 is shown in FIG. 3 to illustrate the first arrangement, configured in a block-based raster scan order. An output surface 320 is shown in FIG. 3 to illustrate the second arrangement configured in a line-based raster scan order. It should be noted that these are illustrative examples only. In other cases, the first arrangement might be based on a line-based raster scan order while the second arrangement might be based on a block-based raster scan order. Other types of data arrangements could also be employed, as understood by those skilled in the art. A block-based raster scan order refers to a scheme where image data samples are processed (e.g. produced or written or read) in a raster scan order within blocks and the blocks themselves are each processed in a raster scan order. A line-based raster scan order refers to a scheme where image data samples are processed (e.g. produced or written or read) line by line.

[0059] To further illustrate, image data samples of the input surface 310 are processed in accordance with the block-based raster scan order. Blocks of the block-based raster scan order are illustrated in the input surface 310 using references Bl, B2, B3, B4, B5 and B6. Arrows on the input surface 310 show the sequence in which image data samples appear in the input stream 110 and so the sequence the image data samples are fed into the single buffer arrangement 200 via the input stream 110. Thus, an image data sample situated in the top left corner of the input surface 310 at the top left of block Bl will be the first to be received and processed by the single buffer arrangement 200, while an image data sample in the top right corner of block B2 will follow the image data sample at the bottom left corner of block Bl, and so on. The bottom right corner of the input surface 310 is the last in the block-based raster scan arrangement and the last to be delivered in the input stream 110 to the single buffer arrangement 200.

[0060] The output surface 320 is populated with image data samples in accordance with a linebased raster scan order. The lines of the line-based raster scan order are illustrated in the output surface 320 using references LI, L2, L3, L4, L5 and L6 for sequential lines from top to bottom of the output surface 320. Arrows on the output surface 320 show the sequence in which the image data samples leave the single buffer arrangement 200 to constitute the output stream 120. Consequently, an image data sample that is to reside in the top left corner of the output surface 320 in the line-based raster scan order will be the first to exit the single buffer arrangement 200 for output surface 320, while the first image data sample that is to reside in the leftmost part of line L2 follows the final image data sample of the preceding line LI. The final sample to be read from the buffer 230 for the output surface 320 will be the image data sample that occupies the position at the bottom right corner of the output surface 320.

[0061] The write logic 250, read logic 260 and control logic 270 of the single buffer arrangement 200 manage the writing the writing of the image data samples of the input stream 110 into the buffer 230, and the reading of image data samples from the buffer 230 to create the output stream 120. By implementing the multistage method for writing and reading image data samples as outlined in the text related to FIG. 2 above, the single buffer arrangement 200 allows for the generation of an output stream 120 with a different arrangement of image data samples when compared to the arrangement of the image data samples in the input stream 110. FIG. 4 depicts the functionality of the control logic 270 of the single buffer arrangement 200. The control logic 270 manages the operation of the write logic 250 and the read logic 260.

[0062] Each complete write of the buffer 230 defines a write cycle. Each complete read of the buffer 230 defines a read cycle. The number of write and read cycles needed to process an image or a frame through the buffer arrangement 200 according to the example embodiment having a block-based raster scan order as the input stream arrangement is determined by the ratio of the image / frame height to the block height because said ratio dictates how many write and read cycles the buffer will go through to process a single image / frame.

[0063] Stage 1 - Write Only

[0064] At reset of the control logic 270, for example when a new image or frame is to be processed by the single buffer arrangement 200, the control logic 270 enters stage 1 in which a write state is set to active (WRITE_ACTIVE), and a read state is paused (READ_WAIT). This causes a portion of the input stream 110 to be written to the buffer 230, the portion typically having the same size as the buffer 230. After the buffer 230 fills for the first time (this signals the end of the first stage), the write state transitions to a paused state (WRITE_WAIT), following which the control logic 270 transitions to stage 2.

[0065] Stage 2 - Read and Write pseudo-simultaneously

[0066] When the write state transitions to a paused state (WRITE_WAIT), the read state transitions to an active state (READ_ACTIVE) so that reading of the buffer 230 commences in an order that creates the second arrangement from the data samples written in the buffer 230 and the write state transitions back to an active state (WRITE_ACTIVE), which in turn causes the next portion of the input stream to be written to the buffer 230. The buffer addresses used for each read and write are determined as already explained elsewhere in this disclosure. For simplicity, each corresponding write (e.g. the third write operation of the portion) is to the buffer address from which a corresponding read was made (e.g. the buffer address of the third read of the previous portion).

[0067] Stage N - Read Only

[0068] During the final stage N, the state machine activates the read state to read the final portion of the input stream.

[0069] Except for the first stage, the read and write stages commence simultaneously. The first write stage begins when the reading process is inactive (READ_WAIT). In addition, the scheme does not allow the writing of an image data sample in a cell of the buffer 230 if the cell has not been read from yet during the stage (e.g. the read / write cycle). In order to do this, a count is made of the number of read and write operations in each stage and writing is permitted when the write count is smaller than the read count.

[0070] Worked Example

[0071] In order provide a worked example of the above principles, an example input stream or frame is presented in which the image data values are received or arranged in a blockbased raster scan order. As will be apparent to the skilled reader from the description of FIGs. 2-4, after processing by the single buffer arrangement 200, an example output stream or frame will be generated having image data samples, for example, in a linebased raster scan order.

[0072] Below is shown the example input stream or frame split into four data portions to illustrate how the data is written to the buffer 230 in each write cycle (each data portion is the same size as the buffer 230). Each data portion in this example comprises two 8x8 blocks of image data samples. Each data portion comprises image data values which will be dependent on the actual image data being represented. To illustrate the change from a first arrangement such as a block-based raster scan order to a second arrangement such as a line-based raster scan order, the example input stream uses image data values that correspond to the location of the image data value in the frame. For example, the image data value "1" would be found in the top left hand corner of the frame as originally created and / or output for viewing and image data value "16" would be found in the top right hand comer of the frame as originally created and / or output for viewing:

[0073] Input: First data portion Input: Second data portion

[0074] Input: Third data portion

[0075] Input: Fourth data portion The example input stream or frame is received by the single buffer arrangement 200 sequentially i.e., in the order in which they are received.

[0076] Below is the example output stream or frame again shown in four data portions to illustrate the output of each read cycle.

[0077] Output: First data portion Output: Second data portion

[0078] Output: Third data portion

[0079] Output: Fourth data portion As can be seen, the data samples are read out from the buffer in a second arrangement, corresponding to a line-based raster scan order. In other words, in this example, the image data samples are rearranged at the output to be in their original, or output, locations. Of course, some processes may be agnostic to the actual input or output arrangement, but the arrangements are known so as to determine read and write addresses during each stage.

[0080] Commonly, in decoder pipelines, image data samples are output by a decoding process sequentially in a block-based raster scan order but are required for later processing to be in a line-based raster scan order.

[0081] The following passages provide more detail of the worked example above in the context of the stages discussed in FIGs. 2-4.

[0082] Stage 1 - Write Only

[0083] The first stage is a write only stage where the first data portion of the input is written to buffer 230. The first stage finishes when the buffer is full.

[0084] The image data samples are stored in the buffer in the block-based raster scan order.

[0085] The state of the buffer 230 at the end of stage 1 is as follows: (italicised numbers are buffer addresses and bolded numbers are image data values inside the buffer)

[0086] 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

[0087] 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63

[0088] 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111

[0089] Stage 2 - Read and Write pseudo-simultaneously

[0090] In the second stage, the output values are read from the buffer 230 in order to produce the second output data portion (more on this below). The same buffer address is then used to write the corresponding next data value from the next data portion of the input stream or frame (for example, if the first data sample for an output portion of the data stream is read, the buffer address is used for the first data sample of the next input portion, if the tenth data sample for an output portion of the data stream is read, the buffer address is used for the tenth data sample of the next input portion and so on).

[0091] The first buffer address that is read (a read address) at stage 2 is address 0 and the read address value is increased by 1 until address 7 is read, which is the end of a row in a block for a block width of 8 data samples in the input data stream.

[0092] Output: First data portion - showing end of block image data samples

[0093] The image data samples that are highlighted in bold in the above first data potion of the output frame are samples that are at the end of each row in corresponding blocks of the input data stream or frame.

[0094] When buffer address 7 is read, the next required data sample in the first input data portion stored in the buffer 230 (illustrated by image data sample = 9 to show the position of the image data sample in the original image frame) is exactly one block away from buffer address 0 (a block is 8x8 data samples = 64). Buffer address 0 is the start of the current row being read in the buffer 230 and a jump of a block size is performed to reach the next output. jump = block size = 64

[0095] Buffer address 64 is read and then the buffer address is increased by 1 and each data value read until the next end of row in block is reached (i.e. 7 data reads after buffer address 64). After the 7 data reads, the end of a row in the first output data portion is reached and another jump is required to read the next image data sample according to the line-based raster scan order. Output: First data portion - showing end of row the first output data portion

[0096] The image data samples that are bolded above are image data samples that are at the end of row in the first output data portion.

[0097] The next output value required for the output frame is in buffer address 8 in the buffer 230. Buffer address 8 in the buffer 230 is a block width away from the starting point of the buffer 230 at buffer address 0 (buffer address 0 also corresponds to the start of line in the output data portion that has just been filled). start_of_line(0) = 0 and so the next buffer read address is determined from: start_of_line(l) = start_of_line(0) + block width = 8

[0098] Expanding this teaching for each end of row next buffer address calculation for this stage: start_of_line(i) = start_of_line(i-l) + block width

[0099] Following on with the example, an increase by 1 from address 8 in buffer 230 is performed until the end of row in block is reached (i.e., 8 reads), which is at address 15. Again, a block sized jump from the start of the current row in block (address 8) is performed. 8 + 64 = 72, which address stores the value 25 which is our next output sequence. Again, the buffer address is increased by 1 until the end of row in block is reached (a further 7 read operations), which is also end of row in the output data portion. The address to the next start_of_line is updated to: start_of_line(2) = start_of_line(l)+block width start_of_line(2) = 8 + 8 = 16 the next address after 79 is 16 which has the correct output value. The above process is repeated until all the values in the buffer are read. The single buffer arrangement keeps track of how many values are read by counting for example by using a read counter.

[0100] After a buffer address in the buffer is read, the next corresponding data value in the next input data portion is able to be written to the same buffer address.

[0101] In addition, the scheme does not allow the writing of an image data sample in a cell of the buffer 230 if the cell has not been read from yet during the stage (e.g. the read / write cycle). In order to do this, a count is made of the number of read (using the read counter) and write operations in each stage and writing is permitted when the write count is smaller than the read count.

[0102] The buffer at the end of stage 2 will look like the below:

[0103] 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

[0104] 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63

[0105] 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111

[0106] Stage 3 - Read and Write pseudo-simultaneously

[0107] Reading starts from buffer address 0 and the address value is increased by 1 in each clock cycle until address 7 (holding value 136) which is when the end of row in block is reached. Then a jump is performed.

[0108] The next output value is 137, which is now in buffer address 32. Value 137 in the input frame is half a block away from start of the current line. In the previous stage, when end of row in block is reached, in order to get to the next row in the block a jump is performed. Now in order to get to a value that in the previous stage is a block size away a new jump must be calculated: jump = previousjump * block width. jump = block size * block width

[0109] The result of the multiplication must not exceed the maximum value that a buffer can take which is: (width of buffer * block width - block width). So, jump = (previousjump * block height) % (width of buffer * block width - block width) jump = 64 * 8 % (16 * 8 - 8) = 32

[0110] From buffer address 32, the address is increased by 1 until the next end of row in block is reached, which is also end of a row, address 39.

[0111] The next output value is 145. Said value is one row of a block away from the start of the current line in the input. During the previous writing of said value in the buffer in the previous stage, a previousjump = 64 was performed to get to the next row of a block. In this stage the start_of_line is calculated: start_of_line(0) = 0 start_of_line(i) = start_of_line(i-l) + 64 start_of_line(l)= 64

[0112] In general: start_of_line(i) = start_of_line(i-l) + previousjump) % (width of buffer * block width - block width)

[0113] The modulo operation is also applied to the start_of_line calculation to make sure the result of multiplication does not exceed the maximum value that start_of_line can take.

[0114] The above process is repeated until the end of this stage is reached and then the next stage with a new jump value is started. The processing of stages continues until the end of frame is reached (i.e., stage N).

[0115] In this implementation in order to generalise the method and avoid special cases, the first stage is treated the same as other stages and a jump and start of a line for the first stage is defined. Based on what was explained in this section and last section these are the calculated values of jumps and start lines for the example frame:

[0116] This is how the buffer will look like after the first stage: (italicised numbers are buffer addresses and bolded numbers are values inside the buffer)

[0117] 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

[0118] 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63

[0119] 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111

[0120] Addresses for writing in stage 1 :

[0121] Buffer after stage 2:

[0122] 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

[0123] 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63

[0124] 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 Addresses for reading and writing in stage 2: Buffer after stage 3:

[0125] 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

[0126] 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63

[0127] 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111

[0128] Addresses for reading and writing in stage 3:

[0129] The above processing of stages continues until the end of frame or stream is reached (i.e., stage N).

[0130] Avoiding MOD

[0131] As discussed before, in order to make sure the value that is calculate for a jump does not exceed (width of buffer * block width - block width) mod operation must be performed. Mod operations are expensive and there are 16 rasterizers (single buffer arrangement modules) in each level of quality in the LCEVC implementation, having the mod block in the rasterizers is not practical. Also, it is not possible to do subtractions in order to get the same result as using mod operation because 16 adders in each rasterizer would be needed.

[0132] In order to solve the above issue, jump values are calculated and saved (inside an array of registers) to be used for future jump calculations. In some implementations, a rasterizer must be capable of dealing with input streams having different block dimensions. The rasterizer receives the block dimensions and , writes and reads the input stream accordingly. An example of such implementation is the DD and DDS transform in which the input stream associated with a DD transform comprises different block dimensions to an input stream of a DDS transform.

[0133] The above embodiments are to be understood as illustrative examples. Further embodiments are envisaged. It is to be understood that any feature described in relation to any one embodiment may be used alone or in combination with other features described, and may also be used in combination with one or more features of any other of the embodiments, or any combination of any other of the embodiments. Furthermore, equivalents and modifications not described above may also be employed without departing from the scope of the invention, which is defined in the accompanying claims.

Claims

Claims1. A method for writing image data samples received in a first arrangement to a buffer and reading the image data samples from the buffer to create a second arrangement, wherein the first arrangement is different from the second arrangement, the method comprising: during a first stage: writing, to the buffer, each image data sample of a first data portion of image data samples received in the first arrangement; during a second stage: reading, from the buffer, each image data sample from the first data portion of image data samples by determining a corresponding second stage buffer address for each read operation in dependence on the first arrangement and the second arrangement so that each image data sample of the first data portion is read according to the second arrangement; writing, to the buffer, each image data sample of a second data portion of image data samples by determining a corresponding buffer address for each write operation to be the second stage buffer address used to read the corresponding image data sample in the first data portion; wherein the writing is at least one buffer address behind the reading; and during a third stage: reading, from the buffer, each image data sample from the second data portion of image data samples by determining a corresponding third stage buffer address in dependence on the second stage determining, the first arrangement and the second arrangement so that each image data sample of the second data portion is read according to the second arrangement of the image data samples.

2. The method of claim 1, wherein the first arrangement is based on a block-based raster scan order.

3. The method of claim 2, wherein the second arrangement is based on a line-based raster scan order.

4. The method of claim 3, wherein the determining the corresponding second stage buffer address for each read operation is in dependence on block dimensions of the blockbased raster scan order and line dimensions of the line-based raster scan order.

5. The method of claim 4, wherein during the second stage, for a read operation that immediately follows a read operation completing a line in the line-based raster scan orderof the second arrangement, determining the corresponding second stage buffer address to be a block width following from the corresponding buffer address used for the first read operation for the line.

6. The method of claims 4 or 5, wherein during the second stage, for a read operation that follows a read operation completing a sequence of read operations equal to a block width in a line of the line based raster scan order but does not complete the line, determining the corresponding buffer address for the read operation to be a block following from the corresponding buffer address of the first read operation of the sequence of read operations.

7. The method of any of claims 4 to 6, wherein determining the corresponding third stage buffer address for each read operation is in dependence on block dimensions and line dimensions.

8. The method of claim 7, wherein during the third stage, for a read operation that immediately follows a read operation completing a line in the line-based raster scan order of the second arrangement, determining the corresponding third stage buffer address to be a block from the corresponding buffer address for the first read operation of the line in the line-based raster scan order.

9. The method of either of claims 7 or 8, wherein for a read operation, during the third stage, that follows a read operation completing a sequence of read operations equivalent to a block width in a line of the line based raster scan order but does not complete the line, the corresponding third stage buffer address for the read operation is half a block from the corresponding buffer address of the first read operation of the sequence of read operation.

10. The method of claim 1, wherein the first arrangement is based on a line-based raster scan order and the second arrangement is based on a block-based raster scan order.

11. The method of any preceding claim, wherein during the second stage, for the first read operation determining the corresponding second stage buffer address to be the first buffer address used to write image data samples in the first stage.

12. The method of any preceding claim, wherein during the third stage for the first read operation, determining the corresponding third stage buffer address to be the first buffer address used to write image data samples in the second stage.

13. The method of any preceding claim, wherein the reading and writing in the second stage are simultaneous.

14. The method of any preceding claim, wherein during the first stage, the writing comprises writing each image data sample of the first data portion received in the first arrangement in the buffer in a raster scan order.

15. A hardware module comprising a buffer, a write logic and a read logic, wherein the hardware module is configured to perform the method of any preceding claim.

16. A computer readable storage medium comprising instructions which when executed by a processor, the processor performs the method of any of claims 1-14.

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