Stopping criterion for decoding an LDPC code

The new stopping criterion and Adapted Offset Min-Sum method, combined with data scaling, address the challenges of LDPC decoding by enhancing performance, throughput, and reducing error rates and complexity in LDPC decoders.

FR3135580B1Active Publication Date: 2026-06-05AIRBUS DEFENCE & SPACE SAS

Patent Information

Authority / Receiving Office
FR · FR
Patent Type
Patents
Current Assignee / Owner
AIRBUS DEFENCE & SPACE SAS
Filing Date
2022-05-12
Publication Date
2026-06-05

AI Technical Summary

Technical Problem

Existing LDPC decoding methods face challenges in achieving an ideal compromise between decoding performance, data throughput, implementation complexity, and energy consumption, particularly due to suboptimal stopping criteria and parity check message calculation methods.

Method used

A new stopping criterion is introduced that evaluates the number of iterations where all partial syndromes are nullified minus the number of iterations with non-zero syndromes, exceeding a predetermined threshold, and an Adapted Offset Min-Sum method for parity check message calculation, along with data scaling to manage quantization floors.

Benefits of technology

The proposed solutions enhance decoding robustness at low coding rates, reduce iteration counts, improve throughput, and lower error rates, while maintaining acceptable implementation complexity and energy consumption.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 00000033_0000
    Figure 00000033_0000
  • Figure 00000033_0001
    Figure 00000033_0001
  • Figure 00000033_0002
    Figure 00000033_0002
Patent Text Reader

Abstract

The invention relates to a method (100) for decoding LDPC. The LDPC code is defined by a parity matrix having a layered structure. The method (100) comprises the execution of iterations until a stopping criterion is satisfied. Each iteration comprises the successive processing of the different layers. The processing of a layer comprises: a calculation (111) of variable messages (αn,m), a calculation (112) of parity check messages (βm,n), a calculation (113) of a posteriori estimation variables (γn), and a calculation (114) of a partial syndrome. The evaluation (130) of the stopping criterion comprises a verification whether, for a plurality of successive iterations, the number of iterations for which all the partial syndromes are zero, minus the number of iterations for which at least one of the partial syndromes is non-zero, is greater than or equal to a predetermined stopping threshold. Figure for the abridged version: Fig. 4
Need to check novelty before this filing date? Find Prior Art

Description

Title of the invention: Stopping criterion for decoding an LDPC code Scope of the invention

[0001] The present invention relates to the field of low-density parity check (LDPC) codes. In particular, the invention relates to a stopping criterion for the decoding process of a binary LDPC code, an optimization of the algorithm used in the decoding process, and a strategy for quantifying the data used in the decoding process. State of the art

[0002] LDPC codes are currently used in several communication technologies, including the IEEE 802.16 (WiMAX), IEEE 802.1lin (Wi-Fi), 3GPP's 5G standard ("3rd Generation Partnership Project"), the DVB-S2 standard ("Digital Video Broadcasting, 2nd Generation"), and the CCSDS C2 space communications standard ("Consultative Committee for Space Data Systems, C2").

[0003] A binary LDPC code is a linear error-correcting code defined by a binary parity matrix (the elements of the matrix are '0' and '1'). The parity matrix is ​​of low density, that is to say, the number of non-nuisance elements of the matrix is ​​relatively small compared to the size M x N of the matrix.

[0004] An LDPC code can be represented as a bipartite graph (Tanner graph) showing connections between N variable nodes and M parity-check nodes. Each non-zero element of the parity matrix corresponds to a connection between a variable node and a parity-check node. Each row of the parity matrix corresponds to a parity equation associated with a parity-check node. Each column of the parity matrix corresponds to a variable associated with a variable node. A codeword to be decoded corresponds to a set of values ​​taken respectively by the variables associated with the different variable nodes (the set of estimated values ​​of the bits of the codeword).

[0005] To reduce the hardware implementation complexity of an LDPC decoder, it is known to use particular parity matrix structures. In particular, quasi-cyclic low-density parity check (QC-LDPC) codes are defined by parity matrices composed of submatrices of size Z x Z. The term Z is generally called the "expansion factor." The submatrices of size Z x Z are generally called "circulating matrices." A parity matrix of a QC-LDPC code is, for example, obtained from a basis matrix of size R x C by replacing each element of the basis matrix with a Z x Z matrix corresponding either to a zero matrix or to a shift of the identity matrix. The parity matrix then has R x Z rows (M = R x Z) and C x Z columns (N = C x Z).

[0006] An interesting feature of a QC-LDPC code is that its parity matrix is ​​organized into horizontal or vertical layers. For example, a horizontal layer of the parity matrix corresponds to a set of L consecutive rows of the parity matrix derived from a row of the base matrix (L < Z). This layered structure allows for the parallelization of parity-check message calculations within a layer because the parity equations of a layer do not involve a codeword variable more than once. Indeed, a layer has only one non-zero element in the parity matrix for a given variable; in other words, variable nodes connected to a parity-check node of a layer are not connected to any other parity-check node of that layer.

[0007] Decoding an LDPC codeword is based on an iterative exchange of information about the likelihood of the values ​​taken by the bits of the codeword. The iterative decoding process is based on a belief propagation algorithm by exchanging messages between variable nodes and parity-checking nodes, and applying the parity equations. At each iteration, variable messages are calculated from parity-checking messages calculated during the previous iteration; parity-checking messages are calculated for the current iteration; and variables corresponding to an estimate of the codeword are updated from the parity-checking messages.

[0008] The iterative process of decoding an LDPC codeword can notably be based on the BP (Belief Propagation) algorithm, also known as the SPA (Sum-Product Algorithm). The BP-SPA algorithm offers good decoding performance at the cost of high computational complexity. This computational complexity is linked to the use of functions based on hyperbolic tangents or logarithms and exponentials for calculating the parity-checking messages.

[0009] Variants of the BP-SPA algorithm have therefore been proposed to reduce the computational complexity of decoding.

[0010] For example, the A-min* and / .-min algorithms are close to the formulation of the BP-SPA algorithm, but they reduce its computational complexity. In particular, for the X-min algorithm, only variable messages with the smallest amplitudes are taken into consideration for the calculation of a parity check message (the smaller the amplitude of a variable message, the greater its impact on the values ​​of the parity check messages).

[0011] According to another example, the Min-Sum algorithm replaces hyperbolic tangent calculations with minimum calculations to approximate parity-check messages. This approximation significantly reduces computational complexity. However, it overestimates the amplitudes of the parity-check messages, leading to decreased error correction performance. Variants of the Min-Sum algorithm have therefore been introduced to compensate for this overestimation. This is notably the case with the Offset Min-Sum (OMS) and Normalized Min-Sum (NMS) algorithms. The OMS algorithm introduces a correction value (an "offset") to be subtracted from the calculated value for the amplitude of a parity-check message. The NMS algorithm, on the other hand, introduces a normalization factor to be applied to the calculated value for the amplitude of a parity-check message.

[0012] These different algorithms offer different trade-offs in terms of computational complexity and error-correcting power. The choice of a particular algorithm is very strongly linked to the context in which LDPC decoding is applied.

[0013] To reduce latency and increase the average decoding throughput, it is important to limit the number of iterations required to correct errors. This also helps to limit the decoder's power consumption. Thus, an important characteristic of an LDPC decoder lies in the criterion used to stop the decoding process, that is, the criterion used to determine whether convergence to the correct codeword has been achieved.

[0014] A stopping criterion can be determined from a parity-checking calculation on all estimated values ​​of the codeword bits at the end of an iteration (the syndrome is then a vector of size M defined by the M parity equations defined by the parity matrix). This leads to relatively low error rates. However, it introduces additional latency because determining the stopping criterion requires interrupting the decoding process at each iteration. Furthermore, this solution is not well-suited to a layered architecture when the size N of a codeword is large.

[0015] When the decoding process follows a layered architecture, for example with the use of a QC-LDPC code, it is possible to calculate on the fly (i.e., without interrupting the decoding process) a partial syndrome for each layer. A partial syndrome is a vector of size L defined by the L parity equations of the layer considered (L being the size of the layer, i.e., the number of consecutive rows of the parity matrix corresponding to a layer in the case of a horizontal layered structure).

[0016] For example, it is conceivable to consider that the stopping criterion is satisfied when, at the end of an iteration corresponding to the successive processing of the different layers, all the partial syndromes calculated respectively for the different layers are harmful. However, there is no guarantee that the partial syndromes will be satisfied by the same codeword because the estimates of the bit values ​​in the codeword are updated after each layer is processed. This can lead to a significant increase in false detections.

[0017] The article by A. Hera et al. entitled "Analysis and Implementation of On-the-Fly Stopping Criteria for Layered QC LDPC Decoders," published on pages 287 to 291 of the proceedings of the 22nd International Conference "Mixed Design of Integrated Circuits and Systems," held from June 25 to 27, 2015, in Torun, Poland, proposes a stopping criterion that takes into account several successive iterations. More specifically, the stopping criterion is considered satisfied when the partial syndromes of the different layers are all harmed for a predetermined number of successive iterations. By increasing the number of successive iterations considered, it is possible to reduce error rates at the cost of higher latency and lower average throughput.

[0018] To achieve high data rates and limit the hardware complexity of the decoder, it is preferable to use a fixed-point representation of the data (parity check messages, variable messages, variables corresponding to a codeword estimate). However, the fixed-point representation can affect decoding performance in terms of error rate. In particular, the saturation of the data used in the decoding process (when this data reaches the maximum value allowed by the fixed-point representation) leads to a floor in the error rate (referred to as the "quantization floor").The data quantization format must therefore be carefully chosen with the aim of lowering the quantization floor while limiting the hardware implementation complexity (when the quantization format is large there is less saturation and the quantization floor is lower, but the hardware implementation complexity is greater).

[0019] V. Pignoly's thesis entitled "Study of LDPC codes for optical space applications and design of associated decoders", submitted on March 26, 2021, presents in sections 1.3 and 2.1 to 2.3 the LDPC concept, the particular case of QC-LDPC codes, the principle of layered scheduling decoding, the different decoding algorithms and the notion of data quantification.

[0020] TT Nguyen Ly's thesis entitled "Efficient Hardware Implementations of LDPC Decoders through Exploiting Impreciseness in Message-Passing Decoding Algorithms" (hereinafter referred to as "Refl") also describes the principle of LDPC decoding for flood scheduling (see sections 2.3.1 and 2.3.3) and for layer scheduling (see section 2.5.2).

[0021] Space communications impose strong constraints on channel coding, This is particularly true in terms of correction capabilities, due to the numerous noise sources that degrade the quality of transmitted signals and the high cost of any potential retransmission. Furthermore, the required data rates are increasingly high (target rates can exceed 1 Gbit / s (gigabits per second), or even 10 Gbit / s). In addition, the energy consumption and complexity of the electronic components onboard a satellite are generally limited.

[0022] Known solutions in terms of stopping criteria, decoding algorithm or data quantification strategy do not always allow for an ideal compromise between decoding performance, data throughput, implementation complexity and energy consumption. Description of the invention

[0023] The present invention aims to remedy all or part of the drawbacks of the prior art.

[0024] To this end, and according to a first aspect, the present invention proposes a method for decoding a codeword with a low-density parity-checking code decoder, referred to as LDPC. The LDPC code is defined by a binary parity matrix of size M x N, where M and N are positive integers. The parity matrix corresponds to a representation of a bipartite graph comprising connections between M parity-checking nodes and N variable nodes. Each row of the parity matrix corresponds to a parity equation associated with a parity-checking node. Each column of the parity matrix corresponds to a variable associated with a variable node. Each non-zero element of the parity matrix corresponds to a connection between a parity-checking node and a variable node. The codeword to be decoded corresponds to a set of values ​​taken respectively by said variables. The parity matrix has a layered structure.The process includes performing one or more iterations until a stopping criterion is met. Each iteration includes the successive processing of the layers of the parity matrix. The processing of a layer includes:

[0025] - a calculation of variable messages, for the variable nodes involved in said layer, from a posteriori estimation variables of the codeword and from parity check messages calculated during the previous iteration, - a calculation of parity-checking messages, for the parity-checking nodes involved in said layer, from the variable messages, - a calculation of the a posteriori estimation variables from the parity-checking messages, - a calculation of a partial syndrome for said layer by applying the parity equations of said layer with respect to a posteriori estimation variables.

[0026] An evaluation of the stopping criterion includes a check whether, for a plurality of successive iterations, the number of iterations for which all the partial syndromes are harmed, less the number of iterations for which at least one of the partial syndromes is non-zero, is greater than or equal to a predetermined stopping threshold.

[0027] This particular evaluation of the stopping criterion makes it possible to achieve lower error rate floors compared to a conventional counter approach. This solution effectively filters out counter oscillations that can be observed for low signal-to-noise ratios. It also increases the convergence speed for low SNRs because it is no longer necessary to oversize the stopping threshold to obtain an error rate floor similar to that obtained with a conventional counter approach. This solution offers greater robustness for low coding rates while providing an equivalent convergence speed for other cases.

[0028] In particular embodiments, the invention may further comprise one or more of the following features, taken individually or in all technically possible combinations.

[0029] In particular embodiments, the evaluation of the stopping criterion involves initializing a counter to zero and, at the end of each iteration:

[0030] - if at least one of the partial syndromes calculated for the different layers for said iteration is non-zero, a decrement of the counter by one unit, unless the counter is equal to zero, - if all the partial syndromes calculated for the different layers for said iteration are harmed, an increment of the counter, said stopping criterion being satisfied when the counter is greater than or equal to the stopping threshold.

[0031] In particular embodiments, the parity matrix has a horizontal layered structure. Each layer corresponds to one or more consecutive rows of the parity matrix. Each layer has a single non-zero element for a given variable.

[0032] In particular embodiments, the LDPC code is a quasi-cyclic code. The parity matrix is ​​obtained by expanding a basis matrix of size R x C by an expansion factor Z, where Z is a positive integer, each element of the basis matrix being replaced by a matrix of size Z x Z corresponding either to a zero matrix or to a shift of an identity matrix. The parity matrix thus has R x Z rows and C x Z columns

[0033] In particular embodiments, each layer corresponds to the Z rows of the parity matrix corresponding to a row of the basis matrix.

[0034] In particular embodiments, N is greater than or equal to 1000.

[0035] In particular implementation modes, the decoder is configured to decode a code word with a bit rate greater than or equal to 100 Mbit / s.

[0036] In particular modes of implementation, the decoder supports different coding rates and the stopping threshold is predetermined according to the coding rate used.

[0037] In particular implementation modes, for each parity-checking node and for each variable node to which said parity-checking node is connected, the calculation of a parity-checking message includes:

[0038] - a determination of a first smallest value among the absolute values ​​of the variable messages associated with said parity control node, - a determination of a second smallest value among the absolute values ​​of the variable messages associated with said parity control node, - at least a first comparison of the difference between the second smallest value and the first smallest value with a first threshold, - a determination of a correction value among at least two possible values ​​as a function of a result of the first comparison, - a calculation of the parity control message as a function of the first smallest value and the correction value.

[0039] This particular method for calculating parity check messages provides a good compromise between decoding performance, data throughput and implementation complexity.

[0040] In particular embodiments, when the calculated value of a parity-check message or a posteriori estimation variable exceeds a predetermined saturation value, said calculated value is saturated to said saturation value; at the end of an iteration, when a number of saturations of the parity-check messages and / or a posteriori estimation variables reaches a predetermined saturation threshold, the method includes at least a first scaling of the parity-check messages and the a posteriori estimation variables. Scaling corresponds to assigning to a value the integer of the same sign whose absolute value is the nearest integer greater than the absolute value of the value divided by two.

[0041] This particular method of on-the-fly data scaling makes it possible to lower the error rate floor for a given quantization. It can also achieve error rate floor performance comparable to that of a higher quantization. This allows for a significant reduction in the decoder's memory footprint at the cost of a relatively small implementation overhead.

[0042] According to a second aspect, the present invention relates to a code decoder of Low-density parity checking, or LDPC, is defined by a binary parity matrix of size M x N, where M and N are positive integers. The parity matrix represents a bipartite graph comprising connections between M parity check nodes and N variable nodes. Each row of the parity matrix corresponds to a parity equation associated with a parity check node. Each column of the parity matrix corresponds to a variable associated with a variable node. Each non-zero element of the parity matrix corresponds to a connection between a parity check node and a variable node. A codeword to be decoded corresponds to a set of values ​​taken by these variables. The parity matrix has a layered structure.The decoder includes a processing unit configured to execute one or more iterations until a stopping criterion is met and, at each iteration and for each layer, for: .

[0043] - calculate variable messages, for the variable nodes involved in said layer, from a posteriori estimation variables of the codeword and from parity check messages calculated during the previous iteration, - calculate parity check messages, for the parity check nodes involved in said layer, from the variable messages, - calculate the a posteriori estimation variables from the parity check messages, - calculate a partial syndrome by applying the parity equations of said layer to the a posteriori estimation variables.

[0044] The processing unit is configured to evaluate the stopping criterion by checking whether, for a plurality of successive iterations, the number of iterations for which all partial syndromes are harmed, minus the number of iterations for which at least one of the partial syndromes is non-zero, is greater than or equal to a predetermined stopping threshold.

[0045] In particular embodiments, the invention may further comprise one or more of the following features, taken individually or in all technically possible combinations.

[0046] In particular embodiments, the processing unit is configured to initialize a counter to zero and, at the end of each iteration:

[0047] - if at least one of the partial syndromes calculated for the different layers for said iteration is non-zero, decrement the counter by one unit, unless the counter is equal to zero, - If all the partial syndromes calculated for the different layers for said iteration are negative, increment the counter, said stopping criterion being satisfied when the counter is greater than or equal to the stopping threshold...

[0048] In particular embodiments, for each parity-checking node and for each variable node to which said parity-checking node is connected, the processing unit is configured to calculate a parity-checking message:

[0049] - determine a first smallest value among the absolute values ​​of the variable messages associated with said parity control node, - determine a second smallest value among the absolute values ​​of the variable messages associated with said parity control node, - make at least an initial comparison of the difference between the second smallest value and the first smallest value using an initial threshold, - determine a correction value from at least two possible values ​​based on a result from the first comparison, - calculate the parity check message based on the first smallest value and the correction value.

[0050] In particular embodiments, when the calculated value of a parity-check message or a posteriori estimation variable exceeds a predetermined saturation value, said calculated value is saturated to said saturation value; at the end of an iteration, when a number of saturations of the parity-check messages and / or a posteriori estimation variables reaches a predetermined saturation threshold, the processing unit is configured to perform at least one initial scaling of the parity-check messages and a posteriori estimation variables. Scaling consists of assigning to a value the integer of the same sign whose absolute value is the nearest integer greater than the absolute value of the value divided by two.

[0051] According to a second aspect, the present invention relates to a satellite payload comprising a decoder according to any one of the preceding embodiments. Presentation of the figures

[0052] The invention will be better understood upon reading the following description, given by way of non-limiting example, and made with reference to Figures 1 to 18, which represent:

[0053] [Fig-1] a schematic representation of a parity matrix of an LDPC code,

[0054] [Fig.2] a schematic representation of a bipartite graph (Tanner graph) associated with a parity matrix,

[0055] [Fig.3] an illustration of a method used to obtain a parity matrix of a quasi-cyclic LDPC code,

[0056] [Fig.4] a schematic representation of an example of the implementation of a process to decode an LDPC codeword with layered scheduling,

[0057] [Fig.5] a schematic representation of an example of an embodiment of a decoder enabling the implementation of a decoding process such as that described with reference to [Fig.4],

[0058] [Fig.6] a schematic representation of an example of the implementation of an evaluation of a stopping criterion according to the invention,

[0059] [Fig.7] a graph showing different frame error rate curves obtained for a coding rate of 9 / 10 and for different stopping threshold values,

[0060] [Fig. 8] a graph showing different frame error rate curves obtained for a coding rate equal to and for different values ​​of the stopping threshold,

[0061] [Fig. 9] a graph showing different frame error rate curves obtained for a coding rate equal to 3 / 10 and for different values ​​of the stopping threshold,

[0062] [Fig. 10] a schematic representation of an example of the implementation of the calculation of a parity check message with the so-called "AOMS" method (English acronym for "Adapted Offset Min-Sum"),

[0063] [Fig. 11] a schematic representation of an example of a hardware implementation of the calculation of a parity check message with the AOMS method,

[0064] [Fig. 12] a schematic representation of another example of a hardware implementation of the calculation of a parity check message with the AOMS method,

[0065] [Fig. 13] a graph showing different frame error rate curves obtained with a coding rate of 1 / 2, with different methods of calculating a parity check message, and with a maximum number of iterations set at twenty-five or fifty iterations,

[0066] [Fig. 14] a schematic representation of an example of the implementation of an LDPC decoding process with flood scheduling,

[0067] [Fig. 15] a graph showing different frame error rate curves obtained with a coding rate of 3 / 10, with different methods of message calculation, with different levels of data quantization, and with a maximum number of iterations set at fifty iterations,

[0068] [Fig. 16] an example of the implementation of an LDPC decoding process similar to that described with reference to [Fig. 4] with the addition of data scaling,

[0069] [Fig. 17] a graph similar to that of [Fig. 15] with an additional curve corresponding to the AOMS method with L6-G9-B7 quantification and with data scaling,

[0070] [Fig. 18] an example of implementation of an LDPC decoding process with flood scheduling and with data scaling.

[0071] In these figures, identical references from one figure to another designate Identical or similar elements. For clarity, the elements shown are not necessarily to the same scale, unless otherwise stated.

[0072] Detailed description of an embodiment of the invention

[0073] In the following description, we will consider, without limitation, the case of an LDPC decoder for space communications. The CCSDS (Consultative Committee for Space Data Systems) is currently defining a standard for optical space communications for which LDPC codes have been defined by Airbus Defence and Space and the French National Centre for Space Studies (CNES). The invention is particularly well suited to this communication standard. However, the invention could also be applied to other types of communications, particularly radio communications. The data rates targeted for the space communications considered are relatively high, for example, greater than 100 Mbit / s, or even greater than 1 Gbit / s, or even greater than 10 Gbit / s.However, nothing would prevent the invention from being applied to a case where the data rate is lower than these values.

[0074] An LDPC code is defined by a parity matrix. Figure 1 schematically represents a parity matrix H of an LDPC code. We consider the case of a binary LDPC code. The parity matrix H is therefore a binary matrix, meaning that each element of the matrix H is either a '0' or a '1'. We consider the matrix H to be of size M x N, with M and N positive integers. The matrix thus has M rows and N columns. The parity matrix H is of low density, that is, the number of elements in the matrix equal to '1' is relatively small compared to the total number M x N of elements in the matrix. For example, the number of non-null elements in the matrix is ​​less than 0.1% of the total number of elements in the matrix.

[0075] As illustrated in [Fig. 2], an LDPC code can also be represented as a bipartite graph G (Tanner graph) showing connections between N variable nodes VNn (n ranging from 1 to N) and M parity-check nodes CNm (m ranging from 1 to M). Each non-zero element of the parity matrix H corresponds to a connection between a variable node VNn and a parity-check node CNm. Each row of the parity matrix H corresponds to a parity equation associated with a parity-check node CNm. Each column of the parity matrix H corresponds to a variable associated with a variable node VNn. A codeword to be decoded corresponds to a set of values ​​taken respectively by the variables associated with the N variable nodes (this is the set of estimated values ​​of the bits of the codeword).

[0076] A codeword can be relatively large, for example, 1000 bits or more (N > 1000). In the example considered, the codeword code has a size of 30720 bits (N = 30720) (we are here after a step of punching some bits of information).

[0077] We consider the case of an LDPC decoder that supports different coding rates. The coding rate corresponds to the ratio between the number of useful bits in a codeword and the total number of bits in a codeword. The higher the coding rate, the lower the computational complexity and the higher the potential throughput; however, the error correction capacity is lower (and therefore the error rate is higher). Conversely, the lower the coding rate, the greater the error correction capacity (low error rate); however, the computational complexity is higher and the throughput is lower.

[0078] In the example considered, the number of rows M and the density of the parity matrix depend on the coding ratio. For a coding ratio of 9 / 10, M = 4608 and the density is 0.0816%. For a coding ratio of 1 / 2, M = 17920 and the density is 0.024%. For a coding ratio of 3 / 10, M = 23040 and the density is 0.0213%.

[0079] Decoding an LDPC codeword is based on an iterative exchange of information about the likelihood of the values ​​taken by the bits of the codeword. The iterative decoding process is based on a belief propagation algorithm that relies on an exchange of messages between variable nodes VNn and parity-checking nodes CNm.

[0080] As illustrated in [Fig. 2], a message sent by a parity-checking node CNm to a variable node VNn is denoted [3m>n] (the notation c2vmn is also sometimes used to express the notion of the direction of the message from a parity-checking node to a variable node). The value of a [3mn] message is calculated at the parity node CNm for each of the variable nodes VNn connected to the parity-checking node CNm on the graph G.

[0081] A message sent by a variable node VNn to a parity-checking node CNm is denoted an>m (the notation v2cn>m is also sometimes used to express the notion of the direction of the message from a variable node to a parity-checking node). The value of a message an>m is calculated at a variable node VNn for each of the parity nodes CNm connected to the variable node VNn on the graph G.

[0082] This is an iterative process: messages an>m are calculated from previously calculated messages [3m>n], and messages [3m>n] are calculated from previously calculated messages an>m. This iterative process takes as input prior estimation variables for the codeword, which correspond, for example, to log-likelihood ratios (LLRs). These are representative values ​​of the probability that the value of a bit of the codeword is equal to '1' or '0' (logarithm of the ratio between the probability that the value of the bit is equal to '0' and the probability that the value of the bit is equal to '1').

[0083] A posteriori estimation variables yn (n ranging from 1 to N) of the codeword bits are also iteratively calculated from the messages [3m>n]. These values ​​yn also represent the probability that the value of a codeword bit is equal to '1' or '0'. They allow a decision to be made on the value of each of the codeword bits. A syndrome can then be calculated from the estimated values ​​of the codeword bits and the parity equations defined by the parity matrix H. If we denote c = (ci, c2, ..., cN) the set of estimated values ​​of the codeword bits, then the syndrome s is defined by the matrix equation s = H * cT. A zero syndrome means that the estimated values ​​of the codeword bits satisfy the parity equations.

[0084] Algorithm 1 defined in section 2.3.1 of the Refl document describes an example of an iterative LDPC decoding process using the BP-SPA algorithm. Algorithm 2 defined in section 2.3.3 of the Refl document describes an example of an iterative LDPC decoding process using the Min-Sum algorithm. These conventional algorithms are known to those skilled in the art.

[0085] These two algorithms are presented in the case of flood scheduling. The messages an>m and the values ​​yn are initialized with the prior estimation variables. Then, at each iteration, the messages [3m>n] are calculated from the messages an>m; the messages an>m are calculated from the messages [3m>n] and the prior estimation variables; the posterior estimation variables yn are calculated from the messages [3m>n] and the prior estimation variables. A syndrome can then be calculated from the posterior estimation variables yn.

[0086] To reduce the hardware implementation complexity of the LDPC decoder, it is possible to use specific structures of the parity matrix H that give the matrix a horizontal or vertical layered organization. For example, a horizontal layer of the parity matrix H can be defined as a set of consecutive rows defined such that, for a given variable (i.e., for a given column of the parity matrix H), the layer has only one non-zero element.

[0087] This layered structure allows for the parallelization of parity-checking message calculations within a layer because the parity equations of a layer do not involve a codeword variable more than once. Indeed, if a layer has only one non-zero element for a given variable, this means that the variable nodes VNn connected to a parity-checking node CNm of a layer are not connected to any other parity-checking node of that layer.

[0088] There are different ways of obtaining a parity matrix H having a layered structure. In particular, and as illustrated in [Fig. 3], it is possible to obtain a A parity matrix H is derived from a basis matrix B of size R x C by replacing each element of the basis matrix B with a matrix of size Z x Z corresponding to either a zero matrix, the identity matrix, or a shift of the identity matrix. The parity matrix then has R x Z rows (M = R x Z) and C x Z columns (N = C x Z). The term Z is generally called the "expansion factor." Submatrices of size Z x Z are generally called "circulating matrices." The terms R, C, and Z are positive integers. An LDPC code defined by such a parity matrix H is called a "quasi-cyclic" LDPC code (QC-LDPC).

[0089] For example, and as illustrated in [Fig.3], each element of the basis matrix B is an integer with the value '-1', '0', or a value less than Z. An element of the basis matrix B with the value '-1' is replaced by the zero matrix; an element of the basis matrix B with the value '0' is replaced by the identity matrix; an element of the basis matrix B with a value d between 1 and (Zl) is replaced by a shift of value d in the identity matrix.

[0090] A horizontal layer of the parity matrix H can then be defined as a set of L consecutive rows of the parity matrix H from a row of the basis matrix B, with L < Z.

[0091] In the example considered, and in no way limitingly, the expansion factor Z is equal to 128.

[0092] A QC-LDPC code can also be obtained by a repetition of a protograph (a protograph is a bipartite graph) and permutations, following predetermined rules, of the connection links existing between its nodes (the permutations are defined by circulating matrices).

[0093] Many types of LDPC codes correspond to quasi-cyclic codes and / or juxtapositions and / or combinations of quasi-cyclic codes. These may include, for example, an irregular code of the "accumulation repetition accumulation" type (LDPC ARA code), or of the "irregular repetition accumulation" type (LDPC IRA code), or of the Raptor type based on a protograph (LDPC PBRL code).

[0094] In a horizontal layered architecture, the calculations are primarily centered on the parity-checking nodes CNm. The number L corresponds to the number of functional units used to execute in parallel the calculations performed at the parity-checking nodes. When L = Z, the level of parallelization is maximized.

[0095] A scheduling method based on a horizontal layer structure allows the convergence speed of the decoding process to be doubled (half as many iterations are required with horizontal layer scheduling to achieve performance equivalent to that obtained with flood scheduling). Furthermore, the memory footprint of a decoder based on layer scheduling horizontals is lower than that of a decoder based on flood scheduling because it is not necessary to store messages an>m. The use of a QC-LDPC code also simplifies the decoder's permutation network by exploiting the linear properties of the rotation operation.

[0096] Algorithm 7 defined in section 2.5.2 of the Refl document describes an example of an iterative LDPC decoding process with the Min-Sum algorithm in the case of horizontal layer scheduling. The a posteriori estimation variables yn are initialized with the a priori estimation variables (LLRs). The [3m>n] messages are initialized to zero. Then, at each iteration, the different layers are processed successively. For each layer: the an>m messages are calculated from the [3m>n] messages and the a posteriori estimation variables yn; the [3m>n] messages are calculated from the an>m messages; the a posteriori estimation variables yn are calculated from the [3m>n] messages; a partial syndrome can then be calculated from the a posteriori estimation variables yn.

[0097] Figure 4 schematically illustrates an example of the implementation of a method 100 for decoding an LDPC codeword with a decoder having a horizontal layered architecture.

[0098] As illustrated in [Fig. 4], the process 100 comprises the execution of one or more iterations until a stopping criterion is satisfied. Each iteration comprises the successive processing of the layers of the parity matrix H. The processing 110 of a layer comprises:

[0099] - a calculation of 111 variable messages an>m, for the variable nodes VNn involved in said layer, - a calculation of 112 parity check messages [3m>n], for the CNm parity check nodes involved in said layer, - a calculation of 113 a posteriori estimation variables yn, - a calculation 114 of a partial syndrome for said layer.

[0100] The calculation 111 of a variable message an>m is performed for each variable node VNn involved in the layer being processed and for each of the parity-checking nodes CNm connected to said variable node VNn. The messages an>m are calculated from the current values ​​of the a posteriori estimation variables yn and from the current values ​​of the parity-checking messages [3m>n]. These current values ​​correspond either to the initialization values ​​(for the first iteration) or to the values ​​calculated during the previous iteration. For example, a message an>m is calculated such that an>m = yn - [3m,n-

[0101] The calculation 112 of a parity check message [3m>n is performed for each CNm parity check node involved in the layer being processed and for each of the VNn variable nodes connected to said CNm parity check node. Messages [3m>n] are calculated from the current values ​​of messages of variable an>m. For example, a message [3m>n] is calculated by considering the set of messages an >m associated with the parity check node CNm, excluding the message an>m associated with the node of variable VNn; the absolute value of a message [3m>n] is equal to the smallest absolute value of the messages an >m considered; the sign of a message [3m>n] is equal to the product of the signs of the messages an >m considered.

[0102] The calculation 113 of a value of the a posteriori estimation variable yn is performed for each bit of the codeword. For example, the yns are calculated from the current values ​​of the parity check messages [3m>n] and the current values ​​of the variable messages an>m such that yn = an>m + [3m>n].

[0103] The calculation 114 of a partial syndrome for the layer being processed is carried out by applying the parity equations of said layer to the a posteriori estimation variables yn. The partial syndrome is then a vector of size L.

[0104] The process 100 includes, at the end of the processing of each layer, a check 120 to determine whether the iteration is complete or not. The iteration is complete when all the layers have been processed.

[0105] At the end of an iteration, the process 100 includes an evaluation 130 of a stopping criterion. For example, it is possible to consider that the stopping criterion is satisfied when all the partial syndromes calculated respectively for the different layers are harmed.

[0106] Figure 5 schematically illustrates an example of an implementation of a decoder 10 for implementing an LDPC decoding process 100 such as that described with reference to Figure 4. It should be noted, however, that there are many possible architectures in the literature for implementing LDPC decoders with a layered structure. In the example illustrated in Figure 5, the decoder 10 comprises:

[0107] - an input buffer 11 of the first-in, first-out type ("First In First Out" or FIFO in Anglo-Saxon literature) for storing a data frame while another data frame is being processed, - an input alignment unit 12 to form blocks of data bits to be decoded of the size of the parallelization factor L, - a volatile memory (“Random Access Memory” or RAM) or non-volatile memory (“Read-Only Memory” or ROM) in which configuration information relating to the LDPC code is stored, such as the parity matrix H to be used (which can be stored in any suitable form), - a volatile memory 14 in which the current values ​​are stored a posteriori estimation variables yn, - a volatile memory 15 in which the current values ​​of the parity check messages [3m>n, are stored - a processing unit 16 configured to execute the iterations of the decoding process, i.e. in particular to implement the decoder permutation network (identity matrix shift operations), to perform the calculations of the a posteriori estimation variables yn, the messages a nm and [3m>n], the partial syndromes, and to determine whether the stopping criterion is satisfied, - a multiplexer 19 to route into memory 14 the values ​​of the a priori estimation variables (for the first iteration) or the values ​​of the a posteriori estimation variables yn calculated by the processing unit 16 (for subsequent iterations), - a volatile memory 17 in which the hard decision values ​​of the codeword bits are stored, - an output alignment unit 18 to adapt the size of the decoded data bit blocks to the expected output size of the decoder 10.

[0108] The decoder 10 is for example implemented in the form of a specific integrated circuit of the ASIC type (English acronym for "Application-Specific Integrated Circuit", or a reprogrammable integrated circuit of the FPGA type (English acronym for "Field-Programmable Gate Array").

[0109] The decoder 10 is for example carried in a receiving device of a payload of a satellite intended to be placed in orbit around the Earth, or in a receiving device of a ground communication station. Stopping criterion:

[0110] The known solutions for determining the stopping criterion do not always allow for an ideal compromise between decoding performance, data throughput, implementation complexity and energy consumption.

[0111] The simple solution of checking at the end of an iteration whether all the partial syndromes calculated respectively for the different layers are nuis leads to relatively high error rate floors (there is no guarantee that the partial syndromes are satisfied by the same code word because the a posteriori estimation variables yn are updated after the processing of each layer).

[0112] The solution of checking whether the partial syndromes of the different layers are all harmed for a predetermined number of successive iterations is not always satisfactory either because it can lead to latency related to an increase in the number of iterations required to satisfy the stopping criterion.

[0113] A particular solution for evaluating the stopping criterion is proposed below. In this solution, the evaluation 130 of the stopping criterion includes a check to see if, for a plurality of successive iterations, the number of iterations for which all partial syndromes are nullified, minus the number of iterations for which at least one of the partial syndromes is non-zero, is greater than or equal to a predetermined stopping threshold. If so, then the stopping criterion can be considered satisfied.

[0114] This solution is relatively simple and therefore easy to implement. Furthermore, it allows for lower error rate floors compared to a conventional counter approach. This solution effectively filters out counter oscillations that can be observed for low signal-to-noise ratios (SNRs). This solution offers improved robustness for low coding rates while providing equivalent convergence speeds for other cases. This solution also increases the convergence speed for low SNRs because it is no longer necessary to oversize the stopping threshold to obtain an error rate floor similar to that obtained with a conventional counter approach.

[0115] It should be noted that other conditions may be added to the evaluation 130 of the stopping criterion, such as the condition that a minimum number of iterations have already been carried out.

[0116] Figure 6 describes a particular implementation of the evaluation 130 of the stopping criterion based on this solution. In this particular implementation, a counter is initialized to zero and, at the end of each iteration:

[0117] - we check (step 131) if all the partial syndromes calculated for the different layers during the iteration that has just ended are null, - if at least one of the partial syndromes is non-zero, we decrement (step 133) the counter by one unit, unless the counter is equal to zero, - if all the partial syndromes are null, we increment (step 132) the counter, - we check (step 134) if the counter is greater than or equal to the stopping threshold (the stopping criterion is satisfied if this is the case).

[0118] There are, of course, other ways to implement this solution. For example, it is possible to initialize the counter to a predetermined non-zero value, decrement the counter when all the partial syndromes are null, and increment the counter if at least one of the partial syndromes is not zero and if the counter is strictly less than its initial value. The stopping criterion is then satisfied when the counter becomes equal to zero.

[0119] When the decoder supports different encoding rates, the value of the stopping threshold can be predetermined according to the encoding rate used (for example, the higher the (the coding rate is small, and the higher the stopping threshold).

[0120] Figures 7, 8, and 9 show graphs with different frame error rate (FER) curves obtained for stopping threshold values ​​of one (th = 1), three (th = 3), and five (th = 5). The frame error rate (FER) is represented on the y-axis, and the signal-to-noise ratio (SNR) is represented on the x-axis (Es / N0 represents the ratio between the signal energy Es and the noise energy No). To obtain these results, the OMS method is used, the LLRs are quantized to six bits ("L6"), the a posteriori estimation variables yn are quantized to nine bits ("G9"), and the messages [3m>n] are quantized to seven bits ("B7"). The results are provided for a maximum number of iterations set at twenty-five iterations (beyond this the decoding process is interrupted; in practice this means that the SNR is too low to allow decoding with the code used).

[0121] Figure 7 corresponds to a coding ratio of 9 / 10, Figure 8 to a coding ratio of 1 / 2, and Figure 9 to a coding ratio of 1 / 3. These figures show that a floor error rate below 10⁹ is obtained for a stopping threshold of three for coding ratios of 9 / 10 and 1 / 2. However, for a coding ratio of 3 / 10, a stopping threshold of five is required to obtain a floor error rate below 10⁸ (and a floor error rate below 10⁹ can be obtained for L6-G10-B8 quantization).

[0122] It should be noted that evaluation 130 of the stopping criterion is not necessarily performed at each iteration. Evaluation 130 of the stopping criterion can, for example, be performed periodically after a certain number of successive iterations. Adapted Offset Min-Sum (AOMS) method:

[0123] The methods used in the prior art to calculate the parity check messages [3m>n] do not always allow for an ideal compromise between decoding performance, data throughput and implementation complexity.

[0124] Therefore, a new method is proposed. This new method is hereafter referred to as "Adapted Offset Min-Sum" or AOMS (adaptation of the "Offset Min-Sum" method). Figure 10 describes an example of implementing calculation 112 of a parity check message [3m>n] using the AOMS method. The parity check message [3m>n] is calculated for a parity check node CNm and for a variable node VNn to which said parity check node CNm is connected. Calculation 112 comprises:

[0125] - a determination 141 of a first smallest value Mini among the absolute values ​​of the variable messages an >m associated with the parity check node CNm, - a determination 142 of a second smallest value Min2 among the absolute values ​​of the variable messages an >m associated with the control node CNm parity, - at least one initial comparison of the difference between the second smallest value Min2 and the first smallest value Mini with a first threshold, - a determination 145 of a correction value from among several possible values ​​based on a result of the first comparison, - a calculation 146 of the parity check message [3m>n as a function of the first smallest value Mini and the correction value.

[0126] In the example illustrated in [Fig. 10], calculation 112 further includes a second comparison 144 (optional) of the difference between the second smallest value Min2 and the first smallest value Mini with a second threshold.

[0127] The number of possible correction values ​​depends on the number of thresholds (and therefore the number of comparisons) used. For example, with a single comparison against a threshold, the correction value is chosen from two possible values; with two comparisons against two distinct thresholds, the correction value is chosen from three possible values; etc.

[0128] In particular embodiments, the first smallest value Mini and the second smallest value Min2 are determined from among all the absolute values ​​of the variable messages an >m associated with the parity-checking node CNm. The index n' then belongs to the set N(m) of indices i of the variable nodes VN; connected to the parity-checking node CNm.

[0129] In particular implementation modes, the first smallest value Mini and the second smallest value Min2 are determined from among the absolute values ​​of the variable messages an > m associated with the parity-checking node CNm, excluding the variable message an > m associated with the variable node VNn. In other words, Mini and Min2 are the two smallest values ​​among the absolute values ​​of the variable messages an > m associated with the parity-checking node CNm with index n' belonging to (N(m) - n). The set (N(m) - n) is the set N(m) excluding the index n. Such arrangements allow for better performance in exchange for a slightly more complex implementation.

[0130] The absolute value of the parity check message [3m>n] is, for example, calculated by subtracting the chosen correction value from the first smallest Mini value. If the resulting value is negative, the value of the parity check message [3m>n] is set to zero.

[0131] Figure 11 schematically describes an example of an implementation of the calculation 112 of a parity check message [3m>n] using the AOMS method. In the example considered and illustrated in Figure 11, a subtractor 21 provides the difference, if calculated, between the values ​​Min2 and Mini. A multiplexer 22 provides a correction value. The correction value is chosen from two possible values, a1 and a2, based on a comparison between si and a threshold. A subtractor 24 provides the difference between Mini and the chosen correction value. The result is then stored and corresponds to the absolute value of the parity check message [3m>n]. Subtracting the correction value is equivalent to adding the two's complement of the correction value. The subtractor 24 is configured to detect an underflow during subtraction. An underflow occurs when Mini is less than the correction value. If an overflow occurs, a carry-out value is set to '0'; otherwise, the carry-out value is set to '1'. If an overflow occurs, then the value of [3m>n] is reset to zero. Resetting the value of [3m>n] to zero is controlled by negating the carry-out value via the NOT logic gate 25.

[0132] Figure 12 schematically describes a second example of the implementation of the calculation of a parity check message [3m>n] using the AOMS method. In the example considered and illustrated in Figure 12, there are two comparisons with two distinct thresholds, and the correction value to be applied is chosen from three possible values ​​a1, a2, and a3.

[0133] To simplify implementation, it is advantageous that for at least one of the comparisons the associated threshold is defined such that the decimal representation of its value S can be written in the form:

[0134] [Math.l] s = i + L . 2 “ n = 1

[0135] where Nlsb is a positive integer (the threshold is then defined by a binary value where only the least significant bits (NLSB) are equal to '1'). Indeed, in this case the comparison can be performed by an "OR" gate or by a "NOT-OR" gate taking as input the most significant bits beyond the least significant bits (NLSB) of the value of the difference between Min2 and Mini.

[0136] In the example considered and illustrated in [Fig. 12], the first threshold is equal to one (NLsb = 1). The signal s2 corresponds to the second least significant bit of the calculated difference between Min2 and Mini. The second threshold is equal to three (NLsb = 2). The signal s3 corresponds to the output of a NOR gate 26 taking as input the most significant bits beyond the two least significant bits of the value of the difference between Min2 and Mini. This means that s3 is '1' if all of these most significant bits are zero (and in this case the difference between Min2 and Mini is less than or equal to the second threshold). s3 is '0' if at least one of the most significant bits is non-zero (which means that the difference between Min2 and Mini is strictly greater than the second threshold).

[0137] If s2 equals '0' and s3 equals '1', then the difference between Min2 and Mini is less than or equal to the first threshold. If s2 and s3 equal '1', then the difference between Min2 and Mini is strictly greater than the first threshold and less than or equal to the second threshold. If s3 is '0', then the difference between Min2 and Mini is strictly greater than the second threshold.

[0138] An "OR" gate could be used instead of the "NOT OR" gate 26 by reversing the logic (in this case s3 is '1' if at least one of the most significant bits is non-zero, and s3 is '0' if the most significant bits are all bad).

[0139] The multiplexer 27 is configured to determine a correction value chosen from among three possible values ​​a1, a2, and a3 based on the results s2, s3 of the comparisons. For example, the correction value a1 is chosen if the difference between Min2 and Mini is less than or equal to the first threshold, the correction value a2 is chosen if the difference between Min2 and Mini is strictly greater than the first threshold and less than or equal to the second threshold, and otherwise the correction value a3 is chosen.

[0140] When the decoder supports different coding rates, the different possible values ​​for the correction value and / or the different threshold values ​​can be predetermined according to the coding rate used. For example, for a coding rate less than or equal to 1 / 2, al = 3, a2 = 2, and a3 = 0 are used. For a coding rate greater than 1 / 2, al = a2 = 1 and a3 = 0 are used.

[0141] For low coding rates, using two thresholds and three correction values ​​(instead of one threshold and two correction values) significantly improves decoding performance.

[0142] The choices of correction values ​​may also depend on the strategy of quantifying the a priori estimation values ​​(LLRs).

[0143] The graph illustrated in [Fig. 13] shows different frame error rate curves obtained with a decoder using a coding ratio of 1 / 2, with different methods for calculating [3m>n] messages. The frame error rate (FER) is represented on the ordinate, and the signal-to-noise ratio (Es / N0) is represented on the abscissa. The different methods considered are Amin* (a prior art method quite similar to the BP-SPA method), OMS (the "Offset Min-Sum" method with a single correction value), and AOMS. In the example considered, for the OMS and AOMS methods, a fixed-point representation is used, the LLRs are quantized to six bits ("L6"), the a posteriori estimation variables yn are quantized to nine bits ("G9"), and the [3m>n] messages are quantized to seven bits ("B7"). For the Amin* method, a floating point representation is used (“float” or “floating point” in English).The results are provided for a maximum number of iterations set at twenty-five or fifty.

[0144] This graph shows that the performance obtained with the AOMS method is relatively close to that obtained with the Amin* method. For a frame error rate of around 10⁶, the Amin* method offers a lower gain. at 0.05 dB in terms of SNR compared to the AOMS method; the AOMS method, on the other hand, shows a gain of more than 0.1 dB in terms of SNR compared to the OMS method.

[0145] The AOMS method for calculating parity check messages [3m>n] can be used in combination with the specific stopping criterion, an example of which is described with reference to [Fig. 6]. The AOMS method and the specific stopping criterion can, in particular, be implemented in the LDPC decoding process 100 described in [Fig. 4].

[0146] It should be noted, however, that the AOMS method can also be implemented independently of the stopping criterion. Therefore, it is not necessary for the LDPC decoding process in which the AOMS method is used to be based on layered scheduling. For example, it is possible to use the AOMS method for the calculation 112 of the parity check messages [3m>n] in a flooded LDPC decoding process. As an example, [Fig. 14] describes an implementation of an LDPC decoding process 100 with flooded scheduling. It can be noted that with flooded scheduling, the order of the calculation 112 of the parity check messages [3m>n] and the calculation 111 of the variable messages an>m is reversed compared to layered scheduling. In a flood scheduling system, the decoding process sequentially alternates the calculation of all CNm parity check nodes and all VN n variable nodes.In addition to the memories already described with reference to [Fig.5], the decoder 10 must also provide volatile memory to store the current values ​​of the messages of variables an>m. . Data scaling:

[0147] When the data used in the decoding process is quantized with a fixed-point representation and when relatively low encoding rates are used, data saturation (saturation of the values ​​[3m>n and / or yn when they reach a predetermined maximum value) can lead to error rate floors ("quantization floors"). The data quantization format must therefore be carefully chosen with the aim of lowering the quantization floor while limiting the hardware implementation complexity and preserving decoding performance.

[0148] The graph illustrated in [Fig. 15] presents different frame error rate curves obtained with a decoder using a coding rate of 3 / 10, with different message calculation methods [3m>n]. The results are provided for a maximum number of iterations set at fifty. The different curves allow comparison of the results obtained for the Amin* method (floating-point), for the OMS method with L6-G9-B7 quantization, and for the AOMS method with on the one hand a quantification L6-G9-B7 and on the other hand a quantification L6-G10-B8.

[0149] Quantification floors of varying severity can be observed depending on the method and quantification rate used. In particular, with L6-G9-B7 quantification, the AOMS method exhibits a relatively high error rate floor compared to the OMS method for low coding rates.

[0150] Therefore, a "quantization on the fly" method is proposed below. [Fig.16] schematically represents an example of the implementation of an LDPC decoding process similar to that described with reference to [Fig.4], in which at least one data scaling has been added.

[0151] As illustrated in [Fig. 16], at the end of an iteration, the process 100 includes an evaluation 151 of a criterion for an initial scaling of the data. The evaluation 151 of the criterion involves a comparison of the number of saturations of the parity-check messages [3m>n] and / or the a posteriori estimation variables yn with a predetermined saturation threshold. The criterion is satisfied, for example, when the number of saturations reaches the saturation threshold. When the criterion is satisfied, the parity-check messages [3m>n] and the a posteriori estimation variables yn are "scaled." Scaling 152 corresponds to assigning to a value the integer of the same sign whose absolute value is the nearest integer greater than the absolute value of the value divided by two.Optionally, when the AOMS method or another OMS or NMS type method is used, the correction or normalization values ​​can also be scaled.

[0152] To this end, the processing unit 16 of the decoder 10 implements a saturation counter and a scaling module. Many conventional LDPC decoders already implement saturation modules. Therefore, the cost of implementing a saturation counter is relatively low. The cost of implementing a scaling module is higher but remains largely acceptable.

[0153] It should be noted that a posteriori estimation variable yn can be used several times during the same iteration. However, scaling of this variable yn should only be performed once when scaling is necessary (at the first reading of the variable yn during the iteration under consideration). For this purpose, one can, for example, store for each variable yn a bit of information indicating whether it is the first reading of said variable yn for the current iteration.

[0154] When the decoder supports different coding rates, the saturation threshold can advantageously be predetermined according to the coding rate used.

[0155] As illustrated in [Fig. 16], and optionally, the process 100 may also include an evaluation 153 of a criterion for at least one scaling 152 sup The criterion is met, for example, after a predetermined number of successive iterations following the initial scaling. Further scaling can then potentially be performed after a predetermined number of successive iterations following the last scaling.

[0156] When the decoder supports different coding rates, the predetermined number of successive iterations after which further scaling is required can advantageously be predetermined according to the coding rate used.

[0157] The graph illustrated in [Fig. 17] is similar to that described with reference to [Fig. 15] with an additional curve (“AOMS-scal”) corresponding to the AOMS method with L6-G9-B7 quantization and with scaling of the [3mn] parity check messages and the a posteriori estimation variables yn. To obtain this curve, the saturation threshold was set at 2500 saturated [3m>n] parity check messages (i.e., approximately 1.6% of the number of [3m>n] parity check messages calculated per iteration), and the number of successive iterations after which further scaling must be performed was set at four. It appears from this graph that the error rate floor for the AOMS method with L6-G9-B7 quantization is significantly lowered by the data scaling method. However, a slight decrease in performance in terms of SNR can be noted at the waterfall of the curve.The data scaling method allows L6-G9-B7 quantization to achieve error rate floor performance comparable to that of L6-G10-B8 quantization. This results in a significant reduction in the decoder's memory footprint at the cost of a relatively small implementation overhead.

[0158] Data scaling can be used in combination with the AOMS method and the specific stopping criterion presented previously. Data scaling, the AOMS method and the specific stopping criterion can in particular be implemented in combination in the LDPC decoding process 100 described in [Fig. 16].

[0159] It should be noted, however, that the scaling method can also be implemented independently of the AOMS method and / or independently of the stopping criterion. Therefore, the LDPC decoding process in which the scaling method is used does not need to be based on layer scheduling. For example, it is possible to use the data scaling method in a flooded LDPC decoding process. As an example, [Fig. 18] describes an implementation of an LDPC decoding process with flood scheduling and data scaling.

[0160] The above description clearly illustrates that, by its various characteristics and Despite their advantages, the present invention achieves the stated objectives. In particular, the various proposed solutions (the specific stopping criterion, the "Adapted Min-Sum" calculation method, and the data scaling method) allow for new compromises in terms of error rate, implementation complexity, data throughput, and energy consumption.

[0161] The stopping criterion advantageously improves the robustness of decoding at low coding rates. It also reduces the number of iterations required to decode a codeword, thereby increasing the average decoding throughput and reducing latency and decoder power consumption. The AOMS method improves codeword decoding performance compared to a conventional OMS-type method. The data scaling method, for its part, lowers the error floor to particularly low frame error rates. The complexity introduced by these different methods in the decoding process remains largely acceptable in light of the improvements they provide.

[0162] Each of the different methods can be used alone or in combination with the others. The stopping criterion is specific to layer scheduling, but the AOMS method and the data scaling method can be applied to both layer scheduling and flood scheduling.

[0163] The invention has been described in the context of an LDPC decoder for space communications, and more particularly for high-speed optical communications. However, nothing would prevent the application of all or part of the methods proposed by the invention to LDPC decoders intended for other applications.

Claims

Demands

1. A method (100) for decoding a codeword with a decoder (10) of a low-density parity-check code, said LDPC code, said LDPC code being defined by a binary parity matrix (H) of size M x N, M and N being positive integers, the parity matrix (H) corresponding to a representation of a bipartite graph (G) comprising connections between M parity-check nodes (CNm) and N variable nodes (VNn), each row of the parity matrix (H) corresponding to a parity equation associated with a parity-check node (CNm), each column of the parity matrix (H) corresponding to a variable associated with a variable node (VNn), each non-zero element of the parity matrix (H) corresponding to a connection between a parity-check node (CNm) and a variable node (VNn), the codeword to be decoded corresponding to a set of values ​​taken respectively by said variables,the parity matrix (H) having a layered structure, the process (100) comprising the execution of one or more iterations until a stopping criterion is satisfied, each iteration comprising the successive processing of the layers of the parity matrix (H), the processing of a layer comprising:, - a calculation (111) of variable messages (an>m), for the variable nodes (VNn) involved in said layer, from a posteriori estimation variables (yn) of the codeword and from parity check messages (|3m>n) calculated during the previous iteration, - a calculation (112) of parity check messages (|3m.n), for the parity check nodes (CNm) involved in said layer, from the variable messages (an.m), - a calculation (113) of the a posteriori estimation variables (yn) from the parity control messages (|3m.n), - a calculation (114) of a partial syndrome for said layer by applying the parity equations of said layer to the a posteriori estimation variables (yn), characterized in that an evaluation (130) of the stopping criterion includes a check whether, for a plurality of successive iterations, the number of iterations for which all partial syndromes are harmed to which is subtracted the number of iterations for which at least one of the partial syndromes is non-zero is greater than or equal to a predetermined stopping threshold.

2. A method (100) according to claim 1 wherein the evaluation (130) of the stopping criterion includes initializing a counter to zero and, at the end of each iteration: - if at least one of the partial syndromes calculated for the different layers for said iteration is non-zero, a decrement (133) of the counter by one unit, unless the counter is equal to zero, - if all the partial syndromes calculated for the different layers for said iteration are nuisance, an increment (132) of the counter, said stopping criterion being satisfied when the counter is greater than or equal to the stopping threshold.

3. A method (100) according to any one of claims 1 to 2 in which the parity matrix (H) has a horizontal layered structure, each layer corresponding to one or more consecutive rows of the parity matrix (H), each layer having a single non-zero element for a given variable.

4. Method (100) according to any one of claims 1 to 3 wherein the LDPC code is a quasi-cyclic code, the parity matrix (H) being obtained by extending a basis matrix (B) of size RxC by an expansion factor Z, Z being a positive integer, each element of the basis matrix (B) being replaced by a matrix of size Z x Z corresponding either to a zero matrix or to a shift of an identity matrix, the parity matrix (H) having R x Z rows and C x Z columns.

5. Method (100) according to claim 4 in combination with claim 3 wherein each layer corresponds to the Z rows of the parity matrix (H) corresponding to a row of the basis matrix (B).

6. Method (100) according to any one of claims 1 to 5 wherein N is greater than or equal to 1000.

7. Method (100) according to any one of claims 1 to 6 wherein the decoder (10) is configured to decode a codeword with a bit rate greater than or equal to 100 Mbit / s.

8. Method (100) according to any one of claims 1 to 7 wherein the decoder (10) supports different coding rates and the cutoff threshold is predetermined according to the coding rate used.

9. A method (100) according to any one of claims 1 to 8 wherein, for each parity control node (CNm) and for each variable node (VNn) to which said parity control node (CNm) is connected, the calculation (112) of a parity control message (|3mn) comprises: - a determination (141) of a first smallest value (Min) among the absolute values ​​of the variable messages (an >m) associated with said parity control node (CNm), - a determination (142) of a second smallest value (Min2) among the absolute values ​​of the variable messages (an >m) associated with said parity control node (CNm), - at least a first comparison (143) of the difference between the second smallest value (Min2) and the first smallest value (Mini) with a first threshold, - a determination (145) of a correction value among at least two possible values ​​(al,a2) depending on a result of the first comparison, - a calculation (146) of the parity check message (|3m,n) as a function of the first smallest value (Mini) and the correction value.,

10. A method (100) according to any one of claims 1 to 9 wherein: when the calculated value of a parity check message (|3 m>n) or of a posteriori estimation variable (yn) exceeds a predetermined saturation value, said calculated value is saturated to said saturation value, and at the end of an iteration, when a number of saturations of the parity check messages (|3mn) and / or the posteriori estimation variables (yn) reaches a predetermined saturation threshold, the method (100) comprises at least a first scaling (152) of the parity check messages (|3mn) and the posteriori estimation variables (yn), a scaling corresponding to assigning to a value the integer of the same sign whose absolute value is the nearest integer greater than the absolute value of the value divided by two.

11. A decoder (10) for a low-density parity-checking code, called an LDPC code, said LDPC code being defined by a binary parity matrix (H) of size M x N, where M and N are positive integers, the parity matrix (H) corresponding to a representation of a bipartite graph (G) comprising connections between M parity-checking nodes (CNm) and N variable nodes (VNn), each row of the parity matrix (H) corresponding to a parity equation associated with a parity-checking node (CNm), each column of the parity matrix (H) corresponding to a variable associated with a variable node (VNn), each non-zero element of the parity matrix (H) corresponding to a connection between a parity-checking node (CNm) and a variable node (VNn), a codeword to be decoded corresponding to a set of values ​​taken respectively by said variables, the parity matrix (H) having a layered structure,the decoder (10) comprising a processing unit (16) configured to execute one or more iterations until a stopping criterion is met and, at each iteration and for each layer, for:, - calculate variable messages (an.m), for the variable nodes (VNn) involved in said layer, from a posteriori estimation variables (yn) of the codeword and from parity check messages (|3m>n) calculated during the previous iteration, - calculate parity check messages (|3m.n), for the parity check nodes (CNm) involved in said layer, from the variable messages (an>m), - calculate the a posteriori estimation variables (yn) from the parity check messages (|3m>n), - calculate a partial syndrome by applying the parity equations of said layer to the a posteriori estimation variables (Yn), characterized in that the processing unit (16) is configured to evaluate the stopping criterion by checking whether, for a plurality of successive iterations, the number of iterations for which all partial syndromes are harmed, less the number of iterations for which at least one of the partial syndromes is non-zero, is greater than or equal to a predetermined stopping threshold.

12.

13.

14. Decoder (10) according to claim 11 wherein the processing unit (16) is configured to initialize a counter to zero and, at the end of each iteration: - if at least one of the partial syndromes calculated for the different layers for said iteration is non-zero, decrement the counter by one unit, unless the counter is equal to zero, - if all the partial syndromes calculated for the different layers for said iteration are nuisance, increment the counter, said stopping criterion being satisfied when the counter is greater than or equal to the stopping threshold. Decoder (10) according to any one of claims 11 to 12 wherein, for each parity check node (CNm) and for each variable node (VNn) to which said parity check node (CNm) is connected, to calculate a parity check message (|3m.n), the processing unit (16) is configured to: - determine a first smallest value (Mini) among the absolute values ​​of the variable messages (an >m) associated with said parity control node (CNm), - determine a second smallest value (Min2) among the absolute values ​​of the variable messages (an >m) associated with said parity control node (CNm), - make at least an initial comparison of the difference between the second smallest value (Min2) and the first smallest value (Mini) with an initial threshold, - determine a correction value from at least two possible values ​​(al, a2) based on a result of the first comparison, - calculate the parity check message (|3mn) as a function of the first smallest value (Mini) and the correction value. Decoder (10) according to any one of claims 11 to 13 wherein, when the calculated value of a parity-check message (|3 m>n) or a posteriori estimation variable (yn) exceeds a predetermined saturation value, said calculated value is saturated to said saturation value, and at the end of an iteration, when a number of its If the parity control messages (|3m>n) and / or the a posteriori estimation variables (yn) reach a predetermined saturation threshold, the processing unit (16) is configured to perform at least a first scaling of the parity control messages (|3m>n) and the a posteriori estimation variables (yn), a scaling corresponding to assigning to a value the integer of the same sign whose absolute value is the nearest integer greater than the absolute value of the value divided by two.

15. Payload of a satellite comprising a decoder (10) according to any one of claims 11 to 14.