Display pixel comprising light-emitting diodes with reduced static power consumption and display screen comprising such display pixels

Abstract

Display pixel comprising light-emitting diodes having reduced static power consumption and display screen comprising such display pixels. This description relates to a display pixel (12i,j) comprising a first electrically conductive connection pad intended to receive a high reference voltage (Vcc), a second electrically conductive connection pad (P_Gnd) intended to receive a low reference voltage (Gnd), a light-emitting device (LED), a current source (ACS) supplying said light-emitting device (LED) with a current, the light-emitting device (LED) being in series with the current source (ACS) between the first and second electrically conductive connection pads,the only electrical path from the current source to the first electrically conductive connection pad or to the second electrically conductive connection pad passing through the light-emitting device (LED). Figure for abbreviation: Fig. 5,

Description

Title of the invention: Display pixel comprising light-emitting diodes having reduced static consumption and display screen comprising such display pixels Technical field

[0001] The present disclosure relates to a display pixel comprising light-emitting diodes and a display screen comprising such display pixels. Prior art

[0002] A pixel of an image corresponds to the unit element of the image displayed by a display screen. For the display of color images, the display screen generally comprises, for the display of each pixel of the image, at least three components, also called display sub-pixels, which each emit light radiation, called the color component of the image pixel, essentially in a single color (for example, red, green and blue). The superposition of the color components of the image pixel emitted by the three display sub-pixels provides the observer with the colored sensation corresponding to the pixel of the displayed image. In this case, the assembly formed by the three display sub-pixels used for the display of a pixel of an image is called a display pixel of the display screen. Each display sub-pixel may comprise a light source, in particular a light-emitting diode.

[0003] The display pixels may be distributed in a matrix, with each display pixel located at the intersection of a row (or line) and a column of the matrix. Typically, each row of display pixels is selected in succession and the display pixels in the selected row are programmed to display the desired image pixels.

[0004] An active matrix is ​​a screen driving architecture that allows all rows of pixels to be kept active for the entire duration of an image, unlike so-called passive matrices, where each row is only active for a time T = Tframe / N (where Tframe is the duration of the image and N is the number of rows on the screen). This allows the brightness of the screen to be increased. In addition, it is possible to send low levels of voltage or current on the control lines of the matrix, which allows larger data streams to be displayed.

[0005] An active matrix may comprise display pixels each comprising light-emitting diodes and a driver circuit for controlling the light-emitting diodes. These are then referred to as smart pixels. This makes it possible in particular to simplify the formation of an active matrix, since the control electronics of the Light emitting diodes of the display pixel are largely integrated into the display pixel.

[0006] The static consumption of a display pixel corresponds to the electrical power consumed by the display pixel when it is not emitting light. It may consist of the leakage currents of the components or the currents necessary for the internal operation of the display pixel's drive circuit.

[0007] The trend is towards increasing the number of pixels on the display screen. The static power consumption of the display pixels can then become a critical factor. Indeed, for a so-called 4K screen with a resolution of 2160 by 3840 pixels, the static power consumption of the screen can be greater than 150 W.

[0008] It is necessary to reduce the static power consumption of the display screen. Summary of the invention

[0009] An object of an embodiment is to provide a display pixel comprising light emitting diodes and a display screen comprising such display pixels which overcome some or all of the disadvantages of existing display pixels comprising light emitting diodes and display screens comprising such display pixels.

[0010] One embodiment provides a display pixel comprising a first electrically conductive bonding pad for receiving a high reference voltage, a second electrically conductive bonding pad for receiving a low reference voltage, a light emitting device, a current source supplying current to said light emitting device, the light emitting device being in series with the current source between the first and second electrically conductive bonding pads, the only electrical path from the current source to the first electrically conductive bonding pad or to the second electrically conductive bonding pad being through the light emitting device. The static current consumption of the current source is advantageously reduced since there is no current consumption when the light emitting diode is off.

[0011] According to one embodiment, the display pixel further comprises a switch in series with the light emitting device and the current source. When the switch is open, the current source is advantageously not powered.

[0012] According to one embodiment, the display pixel further comprises a drive circuit for controlling the switch, the display pixel being configured to receive a first binary signal, the drive circuit being configured to determine a digital signal from successively received values ​​of the first binary signal and to control the switch by pulse width modulation. based on the digital signal.

[0013] According to one embodiment, the switch is interposed between the light emitting device and the current source.

[0014] According to one embodiment, the light emitting device comprises a light emitting diode, the anode of the light emitting diode being coupled to the first electrically conductive connection pad.

[0015] According to one embodiment, the current source comprises a first current source terminal and a second current source terminal, the second current source terminal being coupled to the second electrically conductive connection pad.

[0016] According to one embodiment, the current source comprises first and second current sources in parallel, the first current source being configured to provide a first current proportional to the absolute temperature and the second current source being configured to provide a second current complementary to the absolute temperature. The intensity of the first and second currents and the rates of change of the first and second currents can advantageously be determined so that the current provided by the current source, which is equal to the sum of the first and second currents, is substantially independent of the temperature, within a usual operating temperature range of the display pixel, for example from -35°C to 85°C.

[0017] According to one embodiment, the current source comprises: - first and second current source terminals - first, second, third, fourth, fifth, sixth and seventh MOS transistors, each having a first power terminal, a second power terminal and a gate; - first and second resistors, each having first and second resistance terminals, the second power terminals of the first and second transistors being coupled to the first resistance terminal of the first resistor, the second resistance terminal of the first resistor being coupled to the second current source terminal, the gate of the third transistor being coupled to the first power terminal of the third transistor, to the gate of the fourth transistor and to the gate of the fifth transistor, the second power terminals of the third, fourth and fifth transistors being coupled to the first current source terminal, the first power terminal of the third transistor being coupled to the first power terminal of the first transistor, the first power terminal of the fourth transistor being coupled to the first power terminal of the second transistor, the first power terminal of the fifth transistor being coupled to the gate of the second transistor, the second power terminal of the sixth transistor being coupled to the second current source terminal, the first power terminal of the sixth transistor being coupled to the gate of the second transistor, the gate of the sixth transistor being coupled to the first power terminal of the sixth transistor, the second power terminal of the seventh transistor being coupled to the first current source terminal, the first power terminal of the seventh transistor being coupled to the gate of the first transistor, the gate of the seventh transistor being coupled to the first power terminal of the second transistor, the first terminal of the second resistor being coupled to the gate of the first transistor and the second terminal of the second resistor being coupled to the second terminal of the current source. The structure of the current source is advantageously simple since it comprises only seven transistors and two resistors.

[0018] Another embodiment provides a display screen comprising: display pixels as defined above; first electrodes coupled to the display pixels; a first circuit for providing a selection signal on each first electrode for selecting display pixels coupled to the first electrode; second electrodes coupled to the display pixels; and a second circuit for providing data signals on the second electrodes. Brief description of the drawings

[0019] These characteristics and advantages, as well as others, will be explained in detail in the following description of particular embodiments given without limitation in relation to the attached figures among which:

[0020] [Fig.l] illustrates in a partial and schematic manner an example of a display screen;

[0021] [Fig.2] shows a functional diagram of an example of a display pixel of the screen of [Fig.l];

[0022] [Fig.3] represents a functional diagram of an example of a transmission circuit of light and a light emitting driver of the display pixel of [Fig.2];

[0023] [Fig.4] illustrates a disadvantage of the light emitting driver shown in [Fig.3]

[0024] [Fig.5] represents a functional diagram of an embodiment of the circuit light emitting and light emitting driver of the display pixel of [Fig.2];

[0025] [Fig.6] shows a more detailed embodiment of the transmission circuit of light and the light emission driver of [Fig.5];

[0026] [Fig.7] represents the curves of evolution of the currents of the circuit of [Fig.6] in temperature function;

[0027] [Fig.8] shows a circuit diagram of an embodiment of a current source of the light emitting circuit of [Fig.6];

[0028] [Fig.9] represents the curves of evolution of the resistance of a resistor and of a gate-source voltage of a MOS transistor of the circuit of [Fig.8] as a function of the temperature;

[0029] [Fig. 10] shows another more detailed embodiment of the light emitting circuit and light emitting driver of [Fig.5]. Description of the embodiments

[0030] Unless otherwise indicated, when reference is made to two elements connected together, this means a direct connection without any intermediate element other than conductors, and when reference is made to two elements coupled together, this means that these two elements can be connected or that they can be coupled through one or more other elements. Furthermore, a signal which alternates between a first constant state, for example a low logic state, denoted "0", and a second constant state, for example a high logic state, denoted "1", is called a "binary signal". The high and low states of the different binary signals of the same electronic circuit may be different. In practice, binary signals may correspond to voltages or currents which may not be perfectly constant in the high or low state.

[0031] Furthermore, unless otherwise indicated, when referring to a voltage at a conductive pad, the difference between the potential at said conductive pad and a reference potential, for example ground, considered to be equal to 0 V is considered. Furthermore, in the following description, the source and drain of a MOS transistor are called "power terminals" of the insulated gate field effect transistor, or MOS transistor.

[0032] Unless otherwise indicated, the expressions "about", "approximately", "substantially" and "of the order of" mean within 10%, and preferably within 5%. In addition, the expression "substantially constant" means that it varies by less than 10% over time compared to a reference value.

[0033] [Fig.l] partially and schematically represents a known example of a display screen 10. The display screen 10 comprises display pixels 12^, for example, arranged in M ​​rows and N columns, M being an integer varying from 1 to 8000 and N being an integer varying from 1 to 16000, i being an integer varying from 1 to M, and j being an integer varying from 1 to N. By way of example, in [Fig.l], M and N are equal to 6. Each display pixel 1¾ is coupled to a source of a low reference potential Gnd, for example the ground, via an electrode 14; and to a source of a high reference potential Vcc via an electrode 16j. For example, the electrodes 14; are aligned along the rows of [Fig.l] and the electrodes 16j are aligned along the columns of [Fig.l], the reverse arrangement being possible. The supply voltage of the display screen corresponds to the voltage between the high reference potential Vcc and the low reference potential Gnd, and is denoted Vcc as the high reference potential. The supply voltage Vcc depends in particular on the arrangement of the light-emitting diodes and the technology by which the light-emitting diodes are manufactured. For example, the supply voltage Vcc can be of the order of 4 V to 5 V.

[0034] For each row, the display pixels 1¾ of the row are coupled to a row electrode 18;. For each column, the display pixels 1¾ of the column are coupled to a column electrode 20j. The display screen 10 comprises a selection circuit 22 coupled to the row electrodes 18; and adapted to provide a selection signal Com; on each row electrode 18;. The display screen 10 comprises a data transmission circuit 24 coupled to the column electrodes 20j and adapted to transmit a data signal Dataj on each column electrode 20j. The selection circuit 22 and the control circuit 24 are controlled by a circuit 26, comprising for example a microprocessor.

[0035] [Fig.2] represents an example of a functional diagram of a display pixel 12;,j of the display screen 10.

[0036] The display pixel 12;j comprises connection conductive pads P_Gnd, P_Vcc, P_Col, P_Row. Each conductive pad P_Gnd, P_Vcc, P_Col, P_Row is intended to be coupled to one of the electrodes 14;, 16j, 18;, 20j, not shown in [Fig.2]. The first conductive pad P_Vcc is coupled, preferably connected, to the electrode 14; and receives the high reference potential Vcc. The second conductive pad P_Gnd is coupled, preferably connected, to the electrode 16j and receives the low reference potential Gnd. The third conductive pad P_Col is coupled, preferably connected, to the column electrode 20j and receives the data signal Dataj. The fourth conductive pad P_Row is coupled, preferably connected, to the row electrode 18; and receives the selection and synchronization signal Corn;.

[0037] For a color display screen, the display pixel 1¾ comprises a light-emitting circuit 52 comprising at least three light-emitting diodes emitting radiation of different colors, for example red, green and blue, a single light-emitting diode LED being illustrated in [Fig. 2]. In the present example, for each color, the anode of the light-emitting diode LED is for example coupled, preferably connected, to the conductive pad P_Vcc receiving the high reference potential Vcc and the cathode of the light-emitting diode LED is for example coupled, preferably connected, to a terminal of a current source controllable current source CS, the other terminal of the controllable current source CS being coupled, preferably connected, to the conductive pad P_Gnd receiving the low reference potential Gnd. Alternatively, for each light-emitting diode LED, the cathode of the light-emitting diode LED is for example coupled to the conductive pad P_Gnd receiving the low reference potential Gnd and the anode of the light-emitting diode LED is coupled to a terminal of the controllable current source CS, the other terminal of the controllable current source CS being coupled to the conductive pad P_Vcc receiving the high reference potential Vcc.

[0038] The display pixel 1¾ further comprises a driving circuit 40 for driving the controllable current source CS. The driving circuit 40 may in particular comprise electronic components such as MOS transistors or TFTs.

[0039] It may be desirable to use a reduced supply voltage Vdd, lower than the supply voltage Vcc, for example lower than 4 V, in particular of the order of 1 V or 1.8 V, to supply at least some of the electronic components of the control circuit 40, this reduced supply voltage corresponding for example to the voltage likely to be applied between the power terminals of the MOS transistors. For this purpose, the display pixel 1¾ comprises a supply circuit 60 which supplies the reduced supply voltage Vdd. The supply circuit 60 receives the high reference potential Vcc and at least one of the selection signals Com; and data signals Dataj and supplies the reduced supply voltage Vdd. For example, in [Fig.2], the supply circuit 60 receives the high reference potential Vcc, the selection signal Com; and the data signal Dataj.Alternatively, the display pixel 1¾ may include an additional conductive connection pad receiving the reduced supply voltage Vdd.

[0040] The control circuit 40 comprises a circuit 46 (Selection mode) coupled to the conductive pad P_Col receiving the data signal Dataj and coupled to the conductive pad P_Row receiving the selection and synchronization signal Com;, and configured to provide a clock signal Clk and a data signal Data to a storage circuit 48 (Color Data registers) or to provide a PWM signal in order to implement a pulse width modulation to a circuit 50 (LED driver), called LED control circuit hereinafter, to control the controllable current source CS associated with each light-emitting diode LED. The storage circuit 48 is configured to store color signals R, G, B representative of the image pixel to be displayed. The circuit 50 is configured to control the controllable current sources CS coupled to the light-emitting diodes LED with signals I_red, I_green and I_blue, obtained from the color signals R, G, B and the PWM signal.In the present embodiment, the data signal Data may correspond to the data signal Dataj and the clock signal Clk is obtained from the . selection and synchronization signal Com;. Circuit 50 is supplied by the high reference potential Vcc and the reduced supply voltage Vdd.

[0041] [Fig.3] shows a block diagram of an exemplary light emitting circuit 52 and LED driving circuit 50 of the display pixel 1¾ of [Fig.2] for one color, for example blue.

[0042] The controllable current source CS comprises a switch SW in series with an adjustable current source CCS providing a current ICS having a controllable intensity. The adjustable current source CCS can be coupled between an OUT terminal of the switch SW and the conductive pad P_Gnd of the display pixel 1¾ which is connected to the source of the low reference potential Gnd. The switch SW is controlled by the signal I_blue. The adjustable current source CCS is controlled by the constant bias signal Bias. For example, the switch SW corresponds to a MOS transistor, for example an N-MOS transistor. The signal I_blue can then correspond to the voltage controlling the gate of the transistor. For example, the adjustable current source CCS corresponds to a MOS transistor, for example an N-MOS transistor. The signal Bias can then correspond to the gate-source voltage of the transistor.

[0043] According to one embodiment, the light-emitting diodes LED of the display pixel 1¾ are controlled by pulse width modulation. For this purpose, during a display phase, the PWM signal, illustrated in [Fig. 2], has a succession of pulses in the logic state "1" which sets the pace for the operation of the circuit 50 for controlling the light-emitting diodes LED by pulse width modulation. The number of pulses in the succession of pulses corresponds to the number NB of bits of each digital signal of color R, G, and B. For example, the switch SW is closed or opened, at the rate of the pulses of the PWM signal, depending on the logic value "0" or "1" of each bit of the signal of color R, G, or B, for example starting with the most significant bit, this switch being kept closed or open until the next pulse of the PWM signal.The time between two successive pulses of the PWM signal is divided by two each time, so that the total time during which the light-emitting diode is lit depends on the value of the R, G or B color signal. The succession of pulses of the PWM signal can be repeated until another pixel of the image is displayed. In this case, the succession of pulses of the PWM signal forms a display cycle and the display phase comprises more than one display cycle.

[0044] The LED control circuit 50 comprises a digital circuit 54 (Digital block) which provides the signal I_blue and an analog circuit 56 (Analog block) which provides the Bias signal. The digital circuit 54 can be powered by the reduced supply voltage Vdd which is lower than the supply voltage Vcc. The analog circuit 56 must be powered by the supply voltage Vcc. The circuit Analog circuit 56 may include a digital-to-analog converter providing the Bias signal. When the adjustable current source CCS corresponds to a MOS transistor, the analog circuit 56 provides the Bias signal so that the MOS transistor CCS operates in the saturation region.

[0045] A portion of the static current consumption of the display pixel 1¾ comes from the static current consumption of the analog circuit 56. When the display screen includes a large number of display pixels 12^, the static current consumption of the analog circuits 56 of all the display pixels 1¾ may be high.

[0046] Furthermore, with the structure of the light emitting circuit 52 and the LED driving circuit 50 illustrated in [Fig.3], it can be complex to control the adjustable current source CCS so that the current ICS practically does not vary depending on the temperature in a usual temperature range, for example from -35°C to 85°C.

[0047] [Fig. 4] illustrates a disadvantage of the LED driver circuit 50 shown in [Fig. 3]. The light emitting circuit 52 of a single display pixel 1¾ of the screen is shown schematically on the left of [Fig. 4] with the switch SW and the adjustable current source CCS corresponding to N-MOS transistors, while the other display pixels of the screen 10 are shown schematically by a block 58 on the right of [Fig. 4]. All the pixels of the screen 10 are coupled, preferably connected, to the source of the low reference potential Gnd via electrodes distributed over the screen 10. Due to the internal electrical resistances of the conductive tracks, electrical contacts, etc., a common resistance is perceived by each pixel of the screen, which results in a resistance Rcom present between the source of the low reference potential Gnd and the pixels of the screen.Therefore, there is a voltage VR across the resistor Rcom when the display screen 10 is in operation, due to the currents supplying the light-emitting diodes LEDs of the display pixels that emit light. Even if the resistance Rcom is kept as low as possible, the voltage VR may not be negligible when the number of display pixels 1¾ is high. The disadvantage is that the voltage VR changes the gate-source voltage Vgs of the adjustable current source CCS. Therefore, it may be difficult to obtain accurate Bias control for the adjustable current source CCS, especially when the adjustable current source CCS corresponds to a MOS transistor that operates in the saturation region.

[0048] [Fig. 5] shows a block diagram of one embodiment of the light emitting circuit 52 and the LED driver circuit 50 of the display pixel of [Fig. 2]. The light emitting circuit 52 and the LED driver circuit 50 of [Fig. 5] include all of the elements illustrated in [Fig. 3], except that the circuit analog 56 is not present and the adjustable current source CCS is replaced by an autonomous current source ACS which is coupled between the OUT terminal of the switch SW and the conductive pad P_Gnd of the display pixel 1¾ which is connected to the source of the low reference potential Gnd. The autonomous current source ACS provides the current ICS.

[0049] The only current flowing through the autonomous current source ACS corresponds to the current ICS. This means that the autonomous current source ACS is powered by a supply voltage VCS which corresponds to the voltage between the OUT terminal of the switch SW to which the autonomous current source ACS is connected and the conductive pad P_Gnd. In particular, when the switch SW is open, the current ICS is equal to 0 A and the voltage VCS is equal to 0 V and the autonomous current source ACS is not powered. The static current consumption of the autonomous current source ACS is advantageously reduced since there is no current consumption when the light-emitting diode LED is off.

[0050] [Fig.6] is a figure similar to [Fig.5] showing an example of a source of autonomous current ACS.

[0051] According to one embodiment, the autonomous current source ACS comprises a first current source CT AT and a second current source PT AT. The current source CTAT and the current source PTAT are coupled in parallel between the OUT terminal of the switch SW and the conductive pad P_Gnd. The current source CTAT provides a current ICTAT and the current source PTAT provides a current IPTAT. The current ICS is equal to the sum of the current ICTAT and the current IPTAT.

[0052] [Fig.7] shows the evolution curves of the ICTAT, IPTAT, and ICS currents of the circuit of [Fig.6] as a function of temperature Temp. The CTAT current source provides an ICTAT current that decreases as the temperature of the components of the ACS self-contained current source increases. The PTAT current source provides an IPTAT current that increases as the temperature of the components of the ACS self-contained current source increases. The magnitude of the ICTAT and PTAT currents and the rates of change of the ICTAT and PTAT currents are determined so that the ICS current, which is equal to the sum of the ICTAT current and the IPTAT current, is substantially independent of temperature, within a typical operating temperature range of the display pixel, for example from -35 °C to 85 °C.

[0053] [Fig.8] shows a circuit diagram of one embodiment of the source of autonomous current ACS of [Fig.6].

[0054] The autonomous current source ACS comprises a differential pair composed of a MOS transistor T1, for example an N-MOS transistor, and a MOS transistor T2, for example an N-MOS transistor. The sources of the transistors T1 and T2 are coupled, preferably connected, to a first terminal of a resistor RI, the second terminal of the resistor RI being coupled, preferably connected, to the conductive pad P_Gnd coupled to the source of the low reference potential Gnd.

[0055] The autonomous current source ACS further comprises a current mirror composed of a MOS transistor T3, for example a P-MOS transistor, a MOS transistor T4, for example a P-MOS transistor, and a MOS transistor T5, for example a P-MOS transistor. The gate of the transistor T3 is coupled, preferably connected, to the drain of the transistor T3, to the gate of the transistor T4 and to the gate of the transistor T5. The source of the transistor T3, the source of the transistor T4 and the source of the transistor T5 are coupled, preferably connected, to the terminal OUT. The drain of the transistor T3 is coupled, preferably connected, to the drain of the transistor TL. The drain of the transistor T4 is coupled, preferably connected, to the drain of the transistor T2. The drain of the transistor T5 is coupled, preferably connected, to the gate of the transistor T2.

[0056] The autonomous current source ACS further comprises a MOS transistor T6, for example an N-MOS transistor, connected as a diode. The source of the transistor T6 is coupled, preferably connected, to the conductive pad P_Gnd. The drain of the transistor T6 is coupled, preferably connected, to the gate of the transistor T2. The gate of the transistor T6 is coupled, preferably connected, to the drain of the transistor T6. The autonomous current source ACS further comprises a MOS transistor T7, for example a P-MOS transistor. The source of the transistor T7 is coupled, preferably connected, to the node OUT. The drain of the transistor T7 is coupled, preferably connected, to the gate of the transistor TL. The gate of the transistor T7 is coupled, preferably connected, to the drain of the transistor T2.The autonomous current source ACS further comprises a resistor R2 whose first terminal is coupled, preferably connected, to the gate of the transistor T1 and whose second terminal is coupled, preferably connected, to the conductive pad P_Gnd.

[0057] A current II flows through transistor T3. Transistors T3, T4 and T5 form a current mirror so that the currents through transistors T3, T4 and T5 are equal to current II. A current 12 flows through resistor R2. Current ICS is equal to the sum of current 12 and three times current II.

[0058] Calling Vgs6 the gate-source voltage of transistor T6 and Vgsl the gate-source voltage of transistor Tl, current II is given by the following relation: [Math 1] 11= (Vgs6-Vgsl) / (2-Rl)

[0059] The resistance R2, the gate-source voltage Vgs6 and the gate-source voltage Vgsl decrease with temperature. Since the variations of the gate-source voltage Vgs6 and the gate-source voltage Vgsl as a function of temperature are identical, this leads to an increase in II as a function of temperature.

[0060] In operation, the gate-source voltage Vgsl of the transistor Tl and the gate- source Vgs2 of transistor T2 tend to be kept equal. Therefore, the current 12 is given by the following relation: [Math 2] 12= (Vgs6) / (R2)

[0061] [Fig.9] shows the curves of the variation, expressed as a percentage, of the resistance R2 and the variation, expressed as a percentage, of the gate-source voltage Vgs6 of the transistor T6 of the circuit of [Fig.8] as a function of the temperature Temp. Both the resistance R2 and the gate-source voltage Vgs6 decrease with temperature. As shown in [Fig.9], the variation of the gate-source voltage Vgs6 of the transistor T6 is greater than the variation of the resistance R2 as a function of temperature. This leads to a decrease of 12 with temperature.

[0062] The ICTAT current previously described corresponds to the current I2. The IPTAT current previously described corresponds to three times the current II. The structure of the autonomous current source ACS is advantageously simple since it only comprises seven MOS transistors and two resistors. The intensity of the ICS current can be adjusted by modifying the resistors RI and R2. For example, each of the resistors RI and R2 can be a variable resistor which can be adjusted by a register.

[0063] [Fig. 10] is a figure similar to [Fig.5] showing another embodiment of the autonomous current source ACS. The autonomous adjustable current source ACS comprises the adjustable current source CCS and an analog circuit 60 (Analog block) which provides the Bias signal. The analog circuit 60 is powered by a supply voltage VCS which corresponds to the voltage between the OUT terminal of the switch SW and the conductive pad P_Gnd. For example, the adjustable current source VCS corresponds to a MOS transistor, for example an N-MOS transistor. The bias signal then corresponds to the gate-source voltage of the transistor VCS.

[0064] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will occur to those skilled in the art.

[0065] Finally, the practical implementation of the embodiments and variants described is within the reach of those skilled in the art from the functional indications given above.

[0066] In particular, in the previously disclosed embodiments of the light emitting circuit 52, the light emitting diode LED is shown with its anode connected to the conductive pad P_Vcc, the autonomous current source ACS is shown coupling the terminal OUT and the conductive pad P_Gnd, and the switch SW is shown interposed between the light emitting diode LED and the autonomous current source ACS. However, the relative positions of the light emitting diode LED and the autonomous current source ACS are shown in FIG. The LED light-emitting diode, the SW switch, and the ACS self-contained current source may be different. For example, the cathode of the LED light-emitting diode may be connected to the conductive pad P_Gnd. In another example, the ACS self-contained current source may be interposed between the LED light-emitting diode and the SW switch. In another example, the LED light-emitting diode may be interposed between the ACS self-contained current source and the SW switch. In another example, the ACS self-contained current source may be connected to the conductive pad P_Vcc.

Claims

Claims

1. A display pixel (1¾) comprising a first electrically conductive connection pad (P_Vcc) for receiving a high reference voltage (Vcc), a second electrically conductive connection pad (P_Gnd) for receiving a low reference voltage (Gnd), a light-emitting device (LED), a current source (ACS) supplying said light-emitting device (LED) with a current, the light-emitting device (LED) being in series with the current source (ACS) between the first and second electrically conductive connection pads (P_Vcc, P_Gnd), the only electrical path from the current source (ACS) to the first electrically conductive connection pad (P_Vcc) or to the second electrically conductive connection pad (P_Gnd) passing through the light-emitting device (LED).

2. A display pixel according to claim 1, further comprising a switch (SW) in series with the light emitting device (LED) and the current source (ACS).

3. The display pixel of claim 2, further comprising a drive circuit (40) for controlling the switch (SW), the display pixel (1¾) being configured to receive a first binary signal (Dataj), the drive circuit (40) being configured to determine a digital signal (R, G, B) from successively received values ​​of the first binary signal (Dataj) and to control the switch (SW) by pulse width modulation based on the digital signal (R, G, B).

4. A display pixel according to claim 2 or 3, wherein the switch is interposed between the light emitting device (LED) and the current source (ACS).

5. A display pixel according to any one of claims 1 to 4, wherein the light emitting device (LED) comprises a light emitting diode, the anode of the light emitting diode (LED) being coupled to the first electrically conductive connection pad (P_Vcc).

6. A display pixel according to any one of claims 1 to 5, wherein the current source (ACS) comprises a first current source terminal and a second current source terminal, the second current source terminal being coupled to the second current source pad. electrically conductive connection (P_Gnd).

7. A display pixel according to any one of claims 1 to 6, wherein the current source (ACS) comprises first and second current sources in parallel, the first current source (PTAT) being configured to provide a first current (IPTAT) which is proportional to the absolute temperature and the second current source (CTAT) being configured to provide a second current (ICTAT) which is complementary to the absolute temperature.

8. The display pixel of claim 7, wherein the current source (ACS) comprises: - first and second current source terminals (OUT, P_Gnd); - first, second, third, fourth, fifth, sixth and seventh MOS transistors (T1, T2, T3, T4, T5, T6, T7), each having a first power terminal, a second power terminal and a gate; - first and second resistors (RI, R2), each having first and second resistance terminals, the second power terminals of the first and second transistors (T1, T2) being coupled to the first resistance terminal of the first resistor (RI), the second resistance terminal of the first resistor (RI) being coupled to the second current source terminal (P_Gnd), the gate of the third transistor (T3) being coupled to the first power terminal of the third transistor (T3), to the gate of the fourth transistor (T4) and to the gate of the fifth transistor (T5),the second power terminals of the third, fourth and fifth transistors (T3, T4, T5) being coupled to the first current source terminal (OUT), the first power terminal of the third transistor (T3) being coupled to the first power terminal of the first transistor (T1), the first power terminal of the fourth transistor (T4) being coupled to the first power terminal of the second transistor (T2), the first power terminal of the fifth transistor (T5) being coupled to the gate of the second transistor (T2), the second power terminal of the sixth transistor (T6) being coupled to the second current source terminal (P_Gnd), the first power terminal of the sixth transistor (T6) being coupled to the gate of the second transistor (T2), the gate of the sixth transistor (T6) being coupled to the first power terminal of the sixth transistor (T6), the,

9. second power terminal of the seventh transistor (T7) being coupled to the first current source terminal (OUT), the first power terminal of the seventh transistor (T7) being coupled to the gate of the first transistor (Tl), the gate of the seventh transistor (T7) being coupled to the first power terminal of the second transistor (T2), the first resistance terminal of the second resistor (R2) being coupled to the gate of the first transistor (Tl), and the second resistance terminal of the second resistor (R2) being coupled to the second current source terminal (P_Gnd). Display screen (10) comprising: display pixels (1¾) according to any one of claims 1 to 8; first electrodes (18;) coupled to the display pixels; a first circuit (22) for providing a selection signal (Com;) on each first electrode for selecting the display pixels (1¾) coupled to the first electrode; second electrodes (20j) coupled to the display pixels; and a second circuit (24) for providing data signals (Dataj) on the second electrodes.

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