PROCEDURE OF TREATMENT OF A SUBSTRATE PRESENTING A SURFACE INTO A SEMICONDUCTOR MATERIAL

By forming a vitreous carbon layer on semiconductor surfaces during heat treatment, the method stabilizes the surface against terrace formation, achieving a smooth and contamination-free surface for epitaxial growth.

FR3160507B1Active Publication Date: 2026-03-27SOITEC SA
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Patent Information

Authority / Receiving Office
FR · FR
Patent Type
Patents
Current Assignee / Owner
Filing Date
2024-03-20
Publication Date
2026-03-27

AI Technical Summary

Technical Problem

Semiconductor material surfaces, particularly single-crystal SiC, are susceptible to destabilization and surface degradation during high-temperature treatments, forming terraces and beads, which are difficult to remove and can compromise the quality of subsequent epitaxial growth.

Method used

A method involving the formation of a vitreous carbon layer on the semiconductor surface at controlled temperatures between 700°C and 1000°C, followed by heat treatment to stabilize the surface, and subsequent removal of the carbon layer using mechano-chemical polishing or plasma etching, all performed in the same furnace.

Benefits of technology

The method effectively prevents terrace formation and surface roughness, ensuring a smooth, high-quality semiconductor surface suitable for epitaxial growth, while minimizing contamination and process complexity.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention relates to a method for treating a substrate having a free surface of a semiconductor material, in particular a single-crystal semiconductor material, comprising a method for stabilizing said surface against the formation of terraces and / or beads, said method comprising the gas-phase formation, on said surface, of a layer of glassy carbon (30) at a temperature (T1) above 700°C, preferably above 800°C, and strictly below 1000°C, preferably below 950°C, and more preferably below 900°C, and a heat treatment of said substrate after stabilization of said surface, wherein the glassy carbon layer (30) limits the reorganization of the surface into a semiconductor material in the form of terraces, the deposition of the carbon layer (30) and the heat treatment being carried out in the same furnace. Figure for the abstract: Fig. 3
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Description

Title of the invention: METHOD FOR PROCESSING A SUBSTRATE HAVING A SURFACE MADE OF A SEMICONDUCTOR MATERIAL FIELD OF INVENTION

[0001] The present invention relates to a method for treating a substrate having a surface of a semiconductor material, in particular a single-crystal semiconductor material. The treatment method comprises a surface stabilization step and a heat treatment step. The invention further relates to a method for manufacturing a semiconductor structure comprising a step for stabilizing the surface of a semiconductor material, in particular a single-crystal semiconductor material, and a heat treatment step of said surface. PRIOR TECHNOLOGY

[0002] Semiconductor materials, particularly silicon carbide (SiC), are widely used in the manufacture of power electronic or radio frequency components. In some applications, bulk single-crystal SiC substrates, substrates with a single-crystal SiC surface layer, or substrates incorporating other semiconductor materials such as aluminum nitride (Ain), gallium nitride (GaN), alloys of these nitrides, indium phosphide (InP), or gallium arsenide (GaAs) are used. In some cases, the semiconductor substrates or semiconductor layers are polycrystalline.

[0003] Substrates for electronic applications often require heat treatments during their manufacture, for example annealing to heal defects in the crystal lattice caused during ion implantation or to modify the substrate's crystal structure. Such treatments are often carried out at high temperatures, up to 2000°C.

[0004] However, the surface of the semiconductor materials considered is susceptible to destabilization under the effect of high temperature. This destabilization can result in surface degradation, in particular through a modification of its morphology and / or composition.

[0005] In particular, as illustrated in [Fig. 1], smooth SiC surfaces are sensitive to high-temperature treatments, typically from about 1300°C. In the absence of adequate protection of said surface, the morphology reorganizes to minimize surface energy, forming terraces. This effect is known by the English term "step bunching." The reorganization of the surface 222 is due to diffusion of atoms on the surface when it is exposed to high temperatures. It also depends on the atmosphere and pressure to which the surface is exposed. Furthermore, it depends on the angle of disorientation of the surface relative to a high-symmetry axis of the semiconductor crystal. Such disorientation is used to facilitate control of the 4H polytype of SiC during subsequent epitaxy of single-crystal SiC and to prevent polytype changes during the growth of single-crystal SiC. A 4° angle is often chosen for such an epitaxy process. The larger this angle of inclination, the higher the steps between the terraces.

[0006] Such disorientations can also appear spontaneously on a polycrystalline SiC surface, the orientation of whose grains is random.

[0007] The surfaces of other semiconductor materials may exhibit the same type of steps. On surfaces comprising GaN, gallium beads may appear on the surface during exposure to high temperature.

[0008] In order to obtain smooth surfaces, it is therefore sought to avoid the formation of terraces or to eliminate them in a later stage, and, where appropriate, to avoid the appearance of gallium beads or of another material.

[0009] Mechanical or chemical-mechanical polishing (CMP) can be carried out, for example, after heat treatment. However, if the height of the terraces formed is too great, for example, greater than 80 nm between two consecutive plates, the thickness to be removed is too great, which implies a long and laborious process. Moreover, the remaining thickness is often too thin for the intended applications.

[0010] The article by J. Bao et al. proposes using very rapid annealing ramps to limit the formation of terraces. This method requires very rapid temperature increases of approximately 400°C per minute and is therefore not compatible with industrial furnaces.

[0011] Alternatively, silane overpressure can be applied, which limits silicon sublimation in SiC, thus preventing terrace formation. This method is described in the article by R. Zhang et al. However, it requires the introduction of SiH4 gas and equipment to create the overpressure. Furthermore, silicon droplets can appear on the SiC surface at temperatures above 1600°C.

[0012] Another possibility for preventing terrace formation is to use a protective layer, typically a carbon film approximately 1 µm thick. This technique involves adding extra steps to the forming process, such as resin deposition, carbonization of said resin at a temperature between 600°C and 1000°C, and the use of additional equipment, and entails a risk of contamination of the substrate and the furnace by the resin. Furthermore, resin deposition and the removal of a micrometric carbon layer are steps long and costly.

[0013] In some cases, the protective layer can also be formed from aluminum nitride (AIN). However, this material is difficult to remove, especially after heat treatment at a high temperature.

[0014] The presence of oxygen in the furnace atmosphere can limit terrace formation; however, it risks creating surface pits incompatible with epitaxial regrowth. Furthermore, high-temperature furnaces typically include graphite components that are sensitive to the presence of oxygen during annealing. Description of the invention

[0015] An object of the invention is to provide a method for treating a substrate having a surface of a semiconductor material, said method comprising a step for stabilizing said surface and a heat treatment step. The method aims to prevent the formation of terraces and / or beads during the heat treatment by means of a simple step to implement. The stabilization step must be easy to integrate into the manufacturing process of a substrate having a surface of a semiconductor material, and must not present a risk of contamination of such a substrate.

[0016] To this end, the invention proposes a method for treating a substrate having a free surface of a semiconductor material, in particular a single-crystal semiconductor material, comprising a method for stabilizing said surface against the formation of terraces and / or beads, said method comprising • the formation in the gas phase, on said surface, of a layer of vitreous carbon at a temperature above 700°C, preferably above 800°C, and strictly below 1000°C, preferably below 950°C, and more preferably below 900°C, and • a heat treatment of said substrate after stabilization of said surface, wherein the glassy carbon layer limits the reorganization of the surface into a semiconducting material in the form of terraces,

[0017] the deposition of the carbon layer and the heat treatment being carried out in the same furnace.

[0018] Carbon layer formation at a temperature between 700°C and 1000°C results in very low surface roughness of the semiconductor material compared to stabilization processes carried out at higher temperatures. Furthermore, under such conditions, the density and size of carbon particles forming on the surface of the semiconductor material during carbon layer growth and the subsequent annealing process can be reduced.

[0019] Preferably, the formation of the vitreous carbon layer is carried out under a gas pressure between 0.1 and 100 kPa.

[0020] Advantageously, the formation of the carbon layer is carried out in a gas stream comprising a carbonaceous gas and a carrier gas, the carrier gas preferably being argon.

[0021] Advantageously, the carbon dioxide gas is propane.

[0022] Preferably, the formation of the glassy carbon layer is carried out at a partial pressure of the carbon gas between 0.1 and 1 kPa.

[0023] The semiconductor material may be silicon carbide.

[0024] Advantageously, the carbon layer has a thickness less than or equal to 100 nm.

[0025] In some embodiments, the furnace includes inner walls and support elements configured to hold at least one substrate, said inner walls, said supports and the gas inside the furnace having the same temperature.

[0026] Advantageously, the oven has at least one inner wall made of carbon.

[0027] The oven can contain a plurality of substrates comprising a surface of said semiconductor material, said substrates being superimposed vertically, a vertical space being provided between two adjacent substrates, a layer of carbon being formed on the surface of the semiconductor material of each of said substrates.

[0028] At least part of the heat treatment can be carried out at a temperature above 1500°C.

[0029] Preferably, the process further comprises, after heat treatment, a step of removing the carbon layer by mechano-chemical polishing and / or by reactive ion etching and / or by plasma etching.

[0030] The invention also relates to a method for manufacturing a semiconductor structure, comprising the following steps: • the formation of a weakened zone by the implantation of ionic species in a donor substrate in a semiconductor material, particularly in a single-crystal semiconductor material, • the bonding of said donor substrate onto a support substrate, • the detachment of the donor substrate along the embrittlement zone so as to transfer a layer of the semiconductor material onto the support substrate, • a treatment process such as described above, so as to cure the defects created in the layer of the semiconductor material during the implantation of the ionic species, in which the carbon layer is formed on the free surface of the layer of the semiconductor material transferred onto the support substrate. DESCRIPTION OF THE FIGURES

[0031] Fig. 1 illustrates the formation of terraces on one face of a single-crystal semiconductor material.

[0032] Figure [Fig.2] illustrates a substrate comprising a portion of a single-crystal semiconductor material on its front face.

[0033] Fig. 3 illustrates the substrate of Fig. 2 after deposition of a carbon layer.

[0034] Fig. 4 illustrates the substrate of Fig. 3 after removal of the carbon layer.

[0035] Figures 5A to 5C illustrate the manufacture of a substrate comprising a portion in a single-crystal semiconductor material on its front face.

[0036] Fig. 6A shows an example of a thermal profile used for a first embodiment of a process according to the invention.

[0037] Figure 6B shows an example of a thermal profile used for a second embodiment of a process according to the invention.

[0038] Fig. 7A is an atomic force microscopy (AFM) image illustrating the terrace-induced roughness on the surface of a substrate that has undergone heat treatment at 1500°C without the application of a carbon layer.

[0039] Fig. 7B is an atomic force microscopy image illustrating the surface roughness of a substrate that has undergone heat treatment at 1500°C with a layer of glassy carbon according to the invention.

[0040] Fig. 8A is an AFM image showing the surface roughness of a carbon layer obtained by deposition at 900°C for 10 min after annealing at 1700°C.

[0041] Fig. 8B is an AFM image showing the surface roughness of a carbon layer obtained by deposition at 1000°C for 10 min after annealing at 1700°C.

[0042] Figure 9 illustrates an annealing furnace adapted for the formation of a carbon layer according to a preferred embodiment of the invention. DETAILED DESCRIPTION OF THE INVENTION

[0043] Figure 2 illustrates a substrate 10 comprising a support substrate 11 and a portion 20 of a monocrystalline or polycrystalline semiconductor material on its front face. The support substrate 11 can be any type of support substrate suitable for the deposition or transfer of a portion 20 of a monocrystalline or polycrystalline semiconductor material, for example, a support substrate of a polycrystalline semiconductor material.

[0044] Alternatively, the substrate 10 can be a solid substrate made of a single-crystal or polycrystalline semiconductor material, i.e., the support substrate 11 and the portion 20 together constitute a single portion made of a semiconductor material monocrystalline or massive polycrystalline.

[0045] Preferably, the portion 20 on the front face of the substrate is made of a single-crystal semiconductor material. However, the semiconductor material that forms the front face of the substrate 10, and which therefore makes up either the portion 20 (in the case of a substrate 10 comprising a support substrate 11 and a portion 20) or the substrate 10 (in the case of a bulk substrate) is also likely to be a polycrystalline material.

[0046] In the following description, since the case of a substrate 10 comprising a support substrate 11 and a single-crystal portion 20 is detailed, the material that makes up the portion 20 will be designated by the expression "single-crystal semiconductor material" to distinguish it from the material composing the support substrate 11. However, the process described below is also applicable to the case of a polycrystalline semiconductor material, each grain then being able to be considered as a single crystal.

[0047] According to a preferred embodiment, the single-crystal semiconductor material is silicon carbide.

[0048] According to other embodiments, the single-crystal semiconductor material is chosen from: aluminium nitride (AIN), gallium nitride (GaN), alloys of these nitrides AlxGa(i_x)N, x being a number between 0 and 1, indium phosphide (InP) or gallium arsenide (GaAs).

[0049] Typically, the surface 200 of the portion 20 made of a single-crystal semiconductor material, or, where applicable, of the substrate made of a bulk single-crystal semiconductor material, is slightly offset. For example, if the semiconductor material is SiC, the surface may be offset from the SiC crystal structure to facilitate control of the 4H polytype during growth.

[0050] In the case of a polycrystalline semiconductor material, some of the grains may exhibit such misalignment with respect to the SiC crystal structure. For example, following the cutting or polishing of the substrate 10 so as to expose a specific face of the substrate 10, grains whose orientation is randomly oriented with respect to this face will exhibit misalignment. Formation of the protective layer

[0051] Subsequently, with reference to [Fig. 3], a layer of glassy carbon 30 is formed on the surface 200 of the portion 20 of a single-crystal semiconductor material. The glassy carbon layer is continuous and covers the entire surface to be protected, i.e., the front face of the single-crystal material. Typically, the glassy carbon layer 30 is deposited on all free surfaces of the substrate and thus simultaneously covers both the front and back faces of the substrate. This allows the back face to be protected simultaneously against terrace formation and, in the case of a silicon carbide substrate, against silicon evaporation during heat treatment.

[0052] This carbon layer protects the substrate surface against terrace formation during heating to high temperatures. It thus stabilizes the surface's crystalline structure. The carbon layer is removed after the high-temperature treatments are completed to obtain a clean, high-quality single-crystal semiconductor material surface. The carbon layer thickness is preferably less than 100 nm to allow for easy removal at the end of a high-temperature process.

[0053] The glassy character of the carbon layer is obtained from a carbon thickness of a few nanometers; for a smaller thickness, the carbon is in the form of one or two graphene monolayers. When the thickness is sufficient to obtain glassy carbon, the protective layer exhibits a long-distance, unorganized three-dimensional structure that is stable throughout the temperature range to which the surface is exposed during the process, and which allows for complete coverage of the substrate surface. The uniformity of a glassy carbon layer is more easily controlled over the extent of the substrate surface.

[0054] Advantageously, the formation of the glassy carbon layer is carried out in a furnace, which will be described later. The carbon layer is formed in the gaseous phase; that is, the carbon is present in the furnace in a gaseous form. The substrate is heated in the furnace to a temperature at which the protective layer is depositioned, and the gaseous carbon phase is transformed into solid carbon by a reaction with the hot surface of the substrate.

[0055] The temperature and gas pressure in the furnace are chosen to prevent degradation of the surface to be protected during the deposition of the carbon layer. The temperature in the furnace during carbon layer formation is above 700°C and strictly below 1000°C, advantageously below 950°C. Preferably, the temperature during carbon layer formation is between 800°C and 900°C to effectively protect the substrate surface.

[0056] Temperatures below 800°C cause a slowdown in the process. For temperatures below 700°C, the slowdown is such that it impairs the efficiency of the process.

[0057] During carbon layer formation and subsequent heat treatment, carbon particles often appear on the substrate surface. The density and size of these carbon particles are considerably reduced at carbon layer formation temperatures strictly below 1000°C and, more advantageously, below 900°C. Higher temperatures, particularly above 1000°C, cause the appearance of larger particles, up to approximately 60 nm. These particles form on the substrate surface during carbon layer formation and subsequent heat treatment. A carbon layer formation temperature of 1000°C or higher therefore increases the surface roughness of the substrate.

[0058] A polishing step, for example a mechano-chemical polishing for the removal of the carbon layer, is easier to implement and involves less risk of scratching the surface when the number and size of such particles are reduced.

[0059] Furthermore, by reducing the density and size of carbon particles on the surface, the risk of contamination of other substrates or components by such particles is reduced, for example in an electronic component production environment.

[0060] Reducing the surface roughness also makes it easier to control the thickness of the deposited carbon layer.

[0061] The temperature range between 700 and 950°C, preferably between 800 and 900°C, thus makes it easy to control the thickness of the carbon layer deposited by an efficient process, avoiding the appearance of carbon particles with a size and density too high for the manufacture of power electronic and radio frequency components.

[0062] Advantageously, the carbon source is a carbonaceous gas, for example propane (C3H8). Alternatively, the carrier gas can be methane (CH4) or ethane (C2H6). The use of propane as the carrier gas allows the carbon layer to form more rapidly because the C-C bond of the carbon atoms is easier to break than the CH bonds in methane and ethane.

[0063] The carbonaceous gas is mixed with a carrier gas, for example argon or a mixture of argon and hydrogen. The carrier gas is an inert gas that does not participate in the chemical reaction for layer formation. Typically, the gas mixing takes place inside the furnace at the deposition temperature. The gas flow rate can be easily controlled and adjusted to the deposition conditions of the carbon layer.

[0064] Typically, the carbon layer is deposited under a gas pressure of between 0.1 and 100 kPa (between 1 mbar and 1 bar), which is easily maintained in an industrial furnace. The partial pressure of the carbon gas is typically adjusted to a value between 0.1 and 1 kPa (between 1 mbar and 10 mbar). Such a concentration prevents saturation of the furnace atmosphere, thus allowing for better control of the deposited carbon layer thickness.

[0065] Advantageously, the thickness of the protective carbon layer is less than 100 nm, for example, between 50 nm and 100 nm. The time required to obtain such a layer depends on the temperature and partial pressure of the carbonaceous gas and is typically between two seconds and two hours. The temperature during layer formation, the pressure and type of carbonaceous gas, and the duration of the step allow the thickness of the deposited carbon layer to be adjusted.

[0066] The carbon layer can be characterized by surface analysis techniques, for example by atomic force microscopy (AFM for "Atomic Force Microscope"), X-ray reflectometry (XRR for "X-ray reflectivity"), Raman spectroscopy or low energy electron microscopy (LEEM for "Low Energy Electron Microscopy").

[0067] The carbon layer is stable at least up to a temperature of 2000°C and makes it possible to limit the formation of terraces while the substrate is exposed to a temperature higher than the temperature of terrace formation.

[0068] High-temperature stages requiring the protective layer

[0069] After the carbon layer has formed, further steps can be carried out on the substrate at a temperature above the terrace formation temperature. Such steps include, for example, annealing to heal defects in the crystal lattice caused during the implantation of ionic species, to modify the crystal structure of the substrate, or for the activation of dopants. During these steps, the surface of the single-crystal semiconductor material is protected by the carbon layer, and terrace formation on said surface is prevented. The annealing steps are carried out at temperatures between 1300°C and 1900°C, typically above 1500°C.

[0070] The carbon layer formation and heat treatment are carried out in the same furnace, which is advantageously a furnace traditionally used for batch annealing of substrates.

[0071] A furnace reaching temperatures above 1500°C generally includes graphite components due to the good stability of this material at high temperatures. In any case, the formation of the carbon layer in such a furnace only results in the deposition of a very thin layer of carbon, which does not affect the operation of these components made of the same material as the layer. Removal of the protective layer

[0072] At the end of the annealing steps, the temperature is lowered to a temperature below the terrace formation temperature, i.e. below 1300°C.

[0073] In certain embodiments, the removal can be carried out in the same furnace in which the carbon protective layer formation steps and / or the high-temperature steps were performed. In this case, the temperature is lowered to a temperature suitable for carbon layer ablation, for example, approximately 900°C. The carbon layer can then be removed because the temperature is sufficiently low to prevent terrace formation on the surface of the semiconductor material. The thinness of the carbon layer promotes rapid removal without leaving residue on the substrate.

[0074] The removal of the carbon layer can be achieved by a reactive plasma, for example an oxygen plasma according to the reaction:

[0075] C (solid) + O2 (gaseous) → CO2 (gaseous)

[0076] In other embodiments, the substrate is cooled after the heat treatment step and transferred to another chamber or device for the removal of the carbon layer. Such a transfer is necessary, for example, if elements of the furnace are made of unprotected graphite or other materials that can be damaged by contact with the reactive plasma, and the carbon layer is removed by plasma.

[0077] Alternatively, the carbon layer can be removed by reactive ion etching (RIE), for example by oxygen ions or a mixture of oxygen and sulfur hexafluoride after transfer in a suitable chamber.

[0078] In order to remove any carbon residues and / or to ensure good surface quality of the single-crystal semiconductor material, a suitable mechano-chemical polishing step can be carried out after the removal of the carbon layer.

[0079] In some cases, the carbon layer is removed during a finishing step of the substrate after removal from the oven, for example during a mechano-chemical polishing or mechanical polishing step.

[0080] Following the removal step, as shown in [Fig. 4], the substrate 11 is finalized and the carbon layer is removed. The substrate 11 and the free surface of the single-crystal semiconductor material can now be used for the epitaxial growth of a layer of a single-crystal semiconductor material (identical to or different from that of the substrate 11) and / or the fabrication of a power electronic or radio frequency component.

[0081] In some cases, the carbon layer on the back side of the substrate is removed along with the layer on the front side. In other embodiments, the glassy carbon layer on the back side of the substrate is retained at this stage and during the fabrication of an electronic device on the front side to protect the back side during these steps. In this case, the carbon layer on the back side is removed before or during a substrate thinning step, for example by grinding.

[0082] Procedure for manufacturing a semiconductor structure

[0083] We will now describe a manufacturing process for a semiconductor structure for electronic applications, having a single-crystal silicon carbide surface.

[0084] A donor substrate 220, preferably made of single-crystal silicon carbide, is provided from which the single-crystal silicon carbide surface layer will be formed. With reference to [Fig. 5A], as schematically indicated by the arrows, an implantation of ionic species, such as hydrogen and / or helium, so as to form a weakening zone 21 in the donor substrate 220. Said weakening zone 21 defines a layer 20 of single-crystal silicon carbide to be transferred.

[0085] With reference to [Fig.5B], the donor substrate 220 thus implanted is glued onto a base substrate 11. The donor substrate can be glued directly onto the base substrate as illustrated in [Fig.5B], or via one or more intermediate layers which can be applied to the donor substrate and / or to the base substrate before gluing (not shown).

[0086] With reference to [Fig. 5C], the donor substrate 220 is then detached along the embrittlement zone 21, resulting in the transfer of the single-crystal silicon carbide layer onto the base substrate 11, thus forming the support substrate 10 as shown in [Fig. 2]. The detached portion 221 of the donor substrate can be reused for transferring other single-crystal silicon carbide layers onto other base substrates.

[0087] A process for treating the substrate 10 is subsequently carried out, comprising successively a step of stabilizing the surface by the formation of a protective layer of glassy carbon, a high-temperature annealing intended to cure the defects created in the single-crystal silicon carbide layer during the implantation of the ionic species, and carrying out a subsequent removal of the protective carbon layer.

[0088] The process comprising the formation of the carbon layer and the heat treatment is carried out in the same furnace. This avoids transferring the substrate from a deposition chamber dedicated to the deposition of the protective layer to an annealing furnace, thus resulting in a simpler, faster process and minimizing the risk of substrate contamination.

[0089] Figure [Fig. 0A] illustrates a temperature profile for an embodiment of such a process as a function of time. Three main sequences of the process can be distinguished, corresponding to the formation of a protective carbon layer (S1), a high-temperature annealing (S2), i.e., above the temperature at which terrace formation begins, and a step of removing the protective layer (S3).

[0090] The gas injected at the top of the furnace is evacuated under a flow of carrier gas from the bottom of the furnace during all sequences of the process.

[0091] The first SI sequence begins at time t0. The substrate is at room temperature, which is typically around 20°C or below the terrace formation temperature. The substrate is introduced into the deposition chamber. Heating of the substrate begins to a temperature Tl for the deposition of the glassy carbon layer. The deposition temperature Tl is greater than 700°C and strictly less than 1000°C. Thus, Tl is lower than the terrace formation onset temperature, which is approximately 1300°C at a pressure of 101 kPa (1 atm), or even of approximately 1200 or 1100°C at lower pressures. The temperature Tl is also lower than the temperature of approximately 1000°C, which can cause an increase in surface roughness.

[0092] From a time tl, a gas flow comprising a carbonaceous gas and a carrier gas is injected into the furnace.

[0093] The deposition of the carbon layer begins at time t1. The duration of carbon layer formation is typically between two seconds and two hours until time t2. During this time, the deposition temperature T1 is kept constant. The pressure in the furnace is maintained between 0.1 and 100 kPa (between 1 mbar and 1 bar).

[0094] The flow rate of the injected gases depends on the chamber volume and is controlled to obtain a partial pressure of the carbonaceous gas between 0.1 and 1 kPa (between 1 mbar and 10 mbar). The deposition temperature Tl and the carbonaceous gas flow rate can be adjusted to obtain a carbon layer with the desired thickness and homogeneity, suitable for optimal protection during the subsequent sequence, and for a sufficiently short time to optimize the process in terms of duration and cost.

[0095] The supply of carbon dioxide is stopped at the end of the SL sequence. The carbon dioxide residues are evacuated under the flow of the carrier gas.

[0096] When the carbon layer deposition is complete at time t2, the second sequence S2 is carried out. The second sequence S2 comprises heating from the deposition temperature T1 to an annealing temperature T2 and a temperature plateau lasting, for example, between 30 and 120 minutes. The annealing temperature T2 and the treatment duration are chosen according to the state of the substrate before the process and the crystalline structure of the substrate being considered. Typically, annealing is carried out at a temperature T2 above 1500°C, for example, between 1600°C and 1900°C.

[0097] The heat treatment of the second sequence is carried out in the same furnace as the formation of the carbon layer of the first sequence.

[0098] At the end of the S2 sequence, the substrate is cooled to preserve the crystalline properties obtained during annealing. At a time t3, the substrate reaches a third temperature T3 of 900°C.

[0099] In some embodiments, with reference to [Fig. 0A], a third S3 sequence is carried out directly, during which the protective carbon layer is removed by oxidation, as described previously. During this step, oxygen can be injected into the furnace to create a reactive plasma.

[0100] During this step, the temperature T3 = 900°C is maintained constant. The removal time is typically between 10 and 120 s at a stripping rate of approximately 100 nm per minute. The total duration of the S3 sequence also includes The oven stabilizes and typically takes between five minutes and one hour. When, at time t4, the carbon layer is completely removed, the oven is cooled to remove the substrate.

[0101] Figure 6B illustrates a temperature profile for an embodiment in which the carbon layer removal step is performed outside the furnace. Sequences S1 and S2 are carried out as described above. At the end of sequence S2, the substrate is cooled to a temperature close to ambient temperature, allowing the furnace to be opened and the substrate removed. The carbon layer removal is carried out during sequence S3' outside the furnace. In this case, a transfer step is performed from the annealing furnace to a protective layer removal chamber or to a polishing device at time t3. When the substrate processing includes a transfer step, the different sequences can be carried out separately in time.Depending on the vitreous carbon layer ablation technique implemented, the S3 sequence may involve heating to a temperature below the terrace formation temperature or be carried out at room temperature.

[0102] Effect of the protective layer on terrace formation

[0103] Figures 7A and 7B are atomic force microscopy (AFM) images on a 30x30 pm2 surface of two respective substrates each having a single-crystal silicon carbide surface.

[0104] Figure 7A is an AFM image of a substrate that has undergone heat treatment at 1500°C without the application of a carbon layer. Terraces have formed on the surface of the substrate, visible as vertical lines in the AFM image. The root mean square (RMS) value of the surface roughness induced by the terraces is approximately 16 nm.

[0105] Figure 7B is an AFM image illustrating the surface roughness of a substrate of the same type, which has also undergone heat treatment at 1500°C. The substrate in Figure 7B was protected by a glassy carbon layer formed at a temperature of 900°C and a pressure below 5 kPa (50 mbar) for 10 minutes prior to heat treatment. The carbon layer was formed in an atmosphere comprising argon as the carrier gas and propane as the carbonaceous gas. The propane content in the mixture was less than 30%.

[0106] The image of the protected substrate shows no parallel line structure indicating the presence of terraces. The root mean square value of the surface roughness is approximately 0.2 nm. The roughness of the substrate protected by the carbon layer is therefore considerably lower than the roughness of the substrate without a protective layer.

[0107] Effect of temperature during carbon layer formation

[0108] Figures 8A and 8B are AFM images on a 5x5 pm2 surface of two The respective substrates have a single-crystal silicon carbide surface. Each substrate has a protective carbon layer. The carbon layers were deposited at different temperatures. Each respective substrate underwent heat treatment at 1500°C under identical conditions.

[0109] The substrate of [Fig. 8A] is protected by a carbon layer deposited for 10 minutes at a temperature of 900°C, according to a preferred embodiment of the invention. The curve below the AFM image shows the height profile of the enlarged portion of the image over a length 1 of 100 nm. In this area, the largest particles on the surface have a height h of approximately 1.5 nm.

[0110] The substrate in [Fig. 8B] is protected by a carbon layer deposited for 10 minutes at a temperature of 1000°C, i.e., under conditions not covered by the invention. This image shows a more granular structure than the image in [Fig. 8A], indicating greater surface roughness. A height profile over a length l of 500 nm of this surface is shown below the AFM image. In this profile, larger grains are visible, up to a height h of approximately 15 nm.

[0111] The carbon layer formed at 900°C therefore has a considerably lower roughness than the layer formed at 1000°C. Because the roughness increases with the temperature of carbon layer formation, it is necessary to form the carbon layer at a temperature strictly below 1000°C. Introducing the oven

[0112] In order to make a process for treating a plurality of substrates efficient and rapid, it is preferable to use an annealing furnace capable of simultaneously treating a maximum number of substrates under identical conditions. Such a furnace is classically called a "batch anneau" furnace in the field of microelectronics.

[0113] Figure 9 illustrates a furnace adapted to receive between 120 and 150 substrates in an annealing chamber. The substrates are positioned horizontally in the furnace and stacked vertically to process a maximum number of substrates in the same hot gas flow. A free space is maintained between each substrate and adjacent substrates to optimize the gas flow and facilitate carbon layer formation. Typically, the vertical distance between two adjacent substrates is between 2 and 20 mm.

[0114] Such a furnace uses a "top flow" configuration, meaning that a gas flow is fed into the furnace from the top 71 and, after passing through the furnace, is discharged through an outlet 79 at the bottom of the furnace. Typically, a carrier gas flow transports the carbonaceous gas (typically propane) for the formation of the carbon layer. In some cases, other gases are added to the furnace, for example, catalyst gases to promote the decomposition of the carbonaceous gas.

[0115] All the elements of the annealing chamber inside the furnace, i.e., the inner walls 75, the substrate holders for maintaining the substrates in a horizontal and vertically overlapping position, and the gas contained within the annealing chamber, are at the same temperature during furnace operation, with the exception of external elements such as the outer wall 76 and the ends of the gas supply pipes. By "same temperature," it is understood that the temperature difference between the upper end 74 of the furnace and the lower end 78 of the furnace is minimal, typically a few degrees Celsius, for example, less than 3 degrees for a furnace temperature between 800 and 1200°C.

[0116] The substrates are heated mainly by conduction from the walls of the furnace. The gas streams are injected at the same temperature as the temperature inside the furnace.

[0117] An annealing furnace is not intended for coating deposition but for applying heat treatment to substrates placed in the furnace. These furnaces are therefore optimized for high temperature homogeneity of the substrates received, but not for optimizing material deposition, particularly for ensuring homogeneous gas flow over the substrate surface. The overlapping positioning of the substrates, in particular, hinders this homogeneity since gases have more difficulty reaching the center of the substrates than their edges. However, this type of furnace is nevertheless suitable for depositing carbon coatings to protect the surface of a semiconductor material against terrace formation, especially since the homogeneity of the carbon coating thickness is not a determining factor as long as the entire surface to be protected is covered.The temporary use of the carbon layer does not require increased homogeneity of this layer. However, it is necessary to control the thickness to ensure sufficient coverage across the entire surface of all substrates within the furnace. The use of graphite elements inside the furnace is compatible with carbon layer deposition because they are the same material and the thickness of the deposited layer is small compared to the dimensions of these elements.

[0118] Unlike an epitaxial chamber, such a furnace allows for the simultaneous processing of a large number of substrates thanks to its vertical stacking arrangement. Furthermore, such a furnace allows for the carbon layer deposition and annealing steps to be carried out in the same chamber, thus avoiding the risk of contamination during transfer between two different chambers. Transfer steps between a carbon layer deposition chamber and an annealing furnace are eliminated, thereby avoiding cooling between the respective steps, the need for manual labor for transfer, and consequently, a loss of time and efficiency. REFERENCES

[0119] R. Zhang et al. ”Growth of large Domains of Epitaxial Graphene on the C-face of SiC”, J. of App. Phys. 2012, 112 (10); doi:10.1063 / 1.4765666

[0120] J. Bao et al. “Sequential Control of Step-Bunching During Graphene Growth on SiC (0001)”, App. Phys. Lett. 2016, 109(8); doi:10.1063 / 1.4961630

Claims

Demands

1. A method for treating a substrate having a free surface of a semiconductor material, in particular a single-crystal semiconductor material, comprising a method for stabilizing said surface against the formation of terraces and / or beads, said method comprising: • the formation in the gas phase, on said surface, of a layer of glassy carbon (30) at a temperature (Tl) above 700°C, preferably above 800°C, and strictly below 1000°C, preferably below 950°C, and more preferably below 900°C, and • a heat treatment of said substrate after stabilization of said surface, wherein the layer of glassy carbon (30) limits the reorganization of the surface into a semiconductor material in the form of terraces, the deposition of the carbon layer (30) and the heat treatment being carried out in the same furnace.

2. A treatment method according to any one of the preceding claims, wherein the formation of the vitreous carbon layer (30) is carried out under a gas pressure of between 0.1 and 100 kPa (between 1 mbar and 1 bar).

3. A treatment method according to any one of the preceding claims, wherein the formation of the carbon layer is carried out in a gas stream comprising a carbon gas and a carrier gas, the carrier gas preferably being argon.

4. Processing method according to claim 3, wherein the carbon dioxide gas is propane.

5. A treatment method according to any one of claims 3 or 4 in combination with claim 2, wherein the formation of the vitreous carbon layer (30) is carried out at a partial pressure of the carbon gas of between 0.1 and 1 kPa (between 1 mbar and 10 mbar).

6. A processing method according to any one of the preceding claims, wherein the semiconductor material is silicon carbide.

7. A treatment method according to any one of the preceding claims, wherein the carbon layer (30) has a thickness less than or equal to 100 nm.

8. A treatment method according to any one of the preceding claims, wherein the furnace (70) comprises inner walls (75) and support elements configured to hold at least one substrate (10), said inner walls (75), said supports and the gas inside the furnace (70) having the same temperature.

9. A treatment method according to any one of the preceding claims, wherein the furnace (70) has at least one inner wall (75) made of carbon.

10. A processing method according to any one of the preceding claims, wherein the furnace (70) contains a plurality of substrates comprising a surface of said semiconductor material, said substrates being vertically superimposed, a vertical space being provided between two adjacent substrates, a layer of carbon (30) being formed on the surface of the semiconductor material of each of said substrates.

11. A treatment method according to any one of the preceding claims, wherein at least a part of the heat treatment is carried out at a temperature above 1500°C.

12. A treatment method according to any one of the preceding claims, further comprising, after heat treatment, a step of removing the carbon layer (30) by chemical-mechanical polishing (CMP) and / or by reactive ion etching and / or by plasma etching.

13. A method for manufacturing a semiconductor structure, comprising the following steps: • the formation of a weakened zone (21) by implanting ionic species into a donor substrate (220) of a semiconductor material, in particular a single-crystal semiconductor material, • the bonding of said donor substrate (220) onto a support substrate (H), • the detachment of the donor substrate (220) along the weakened zone (21) so as to transfer a layer (20) of the semiconductor material onto the support substrate (11), • a treatment method according to any one of claims 1 to 12, so as to heal the defects created in the layer of the semiconductor material (20) during the implantation of the species ionic, in which the carbon layer (30) is formed on the free surface (200) of the layer (20) of the semiconductor material transferred onto the support substrate.