Control system, vehicle-mounted display apparatus and dimming method

Abstract

A control system, a display apparatus and a dimming method, which are applied to the field of vehicle-mounted display screens. The control system comprises: a timing control sub-circuit, a gamma register sub-circuit, a source driving sub-circuit, and a power source management sub-circuit, wherein the timing control sub-circuit is electrically connected to the gamma register sub-circuit and the source driving sub-circuit, the gamma register sub-circuit is electrically connected to the source driving sub-circuit, and the power source management sub-circuit is electrically connected to the timing control sub-circuit, the gamma register sub-circuit and the source driving sub-circuit.

Description

Control system, vehicle-mounted display device, and dimming method Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a control system, a vehicle-mounted display device, and a dimming method. Background Art

[0002] Organic Light-Emitting Diodes (OLEDs) offer a range of advantages, including a fully solid-state structure, high brightness, full viewing angle, fast response time, a wide operating temperature range, and flexible display capabilities. OLED display panels are a major development trend in display technology. In-vehicle displays using OLED panels are opening up new opportunities for building a human-vehicle interaction ecosystem.

[0003] An in-vehicle display is a display device placed in a vehicle for displaying images or playing videos. In-vehicle displays have very high requirements for product life and reliability, and the service life of automotive-grade products must be at least 10 years.

[0004] Public content

[0005] In a first aspect, some embodiments of the present disclosure provide a control system, comprising: a timing control subcircuit, a gamma register subcircuit, a source driver subcircuit, and a power management subcircuit. The timing control subcircuit is electrically connected to the gamma register subcircuit and the source driver subcircuit, the gamma register subcircuit is electrically connected to the source driver subcircuit, and the power management subcircuit is electrically connected to the timing control subcircuit, the gamma register subcircuit, and the source driver subcircuit.

[0006] In which, the timing control sub-circuit is configured to read pre-stored binding point data to generate a voltage binding point signal, and transmit it to the gamma register sub-circuit, and receive N gamma voltages provided by the source driver sub-circuit and generate M register values, and M is greater than N. The timing control sub-circuit is also configured to transmit the register value to the source driver sub-circuit in response to a signal received at the client assembly.

[0007] The gamma register subcircuit is configured to generate an analog gamma voltage signal and transmit it to the source driver subcircuit in response to a first voltage signal received at the power management subcircuit and a voltage tie point signal received at the timing control subcircuit.

[0008] The source driving subcircuit is configured to receive the plurality of analog gamma voltage signals and generate the plurality of gamma voltages between two adjacent analog gamma voltage signals, and generate a data signal in response to receiving the register value signal at the timing control subcircuit and transmit the data signal to the display panel.

[0009] The power management sub-circuit is configured to generate a first voltage signal and transmit the first voltage signal to the gamma register sub-circuit, and to generate an operating voltage and transmit the first voltage signal to the timing control sub-circuit and the source driver sub-circuit.

[0010] In some embodiments, the timing control subcircuit includes at least: a first memory, a timing control chip, and a second memory. The first memory is configured to pre-store binding point data. The timing control chip is electrically connected to the first memory, and the timing control chip is configured to read the binding point data of the first memory, generate the voltage binding point signal, and receive N gamma voltages transmitted by the source driver subcircuit, generate M register values ​​and store them. The timing control chip is also configured to read the register value and transmit it to the source driver subcircuit in response to the signal received at the client assembly. The second memory is electrically connected to the timing control chip, and the second memory is configured to receive and store the M register values ​​transmitted by the timing control chip.

[0011] In some embodiments, the gamma register sub-circuit includes at least a gamma chip, and the gamma chip is electrically connected to the timing control chip, the source driver sub-circuit, and the power management sub-circuit.

[0012] The gamma chip is configured to generate an analog gamma voltage signal in response to the voltage binding point signal received at the timing control chip and the first voltage signal received at the power management sub-circuit, and transmit the analog gamma voltage signal to the source driver sub-circuit.

[0013] In some embodiments, the source driver subcircuit includes at least a source driver chip electrically connected to the timing control chip and the gamma chip. The source driver chip is configured to receive analog gamma voltage signals output by the gamma chip to generate gamma voltages, and receive signals output by the timing control chip to transmit data signals to the display panel.

[0014] In some embodiments, the power management subcircuit includes at least a power management chip, which is electrically connected to a timing control chip, the gamma chip, the source driver chip, the level shift subcircuit, and the display panel. The power management chip is configured to provide an operating voltage to the timing control chip, a first voltage signal to the gamma chip and the source driver chip, a high / low level signal to the level shift subcircuit, and a reset signal to the display panel.

[0015] In some embodiments, the control system further includes a level shift sub-circuit, and the level shift sub-circuit is electrically connected to the timing control sub-circuit and the power management chip.

[0016] In some embodiments, the control system further includes a level shift chip, which is electrically connected to the timing control chip and the power management chip respectively. The level shift chip is configured to generate a second signal in response to a signal received at the timing control chip and transmit it to the display panel.

[0017] In a second aspect, some embodiments of the present disclosure further provide a vehicle-mounted display device, comprising: a display panel and a control system as described in any of the above embodiments, wherein the display panel is electrically connected to the control system.

[0018] In a third aspect, some embodiments of the present disclosure further provide a dimming method for a vehicle-mounted display device, which is applied to the vehicle-mounted display device as described in any of the above embodiments, wherein the control system of the vehicle-mounted display device transmits a data signal to the display panel.

[0019] The dimming method for an in-vehicle display device includes generating a plurality of gamma voltages arranged sequentially from large to small or from small to large, generating a plurality of register values ​​based on the plurality of gamma voltages using a dithering algorithm, and modulating a gamma curve to generate a corresponding segment of the gamma curve based on the plurality of register values ​​and the brightness of the display panel.

[0020] In some embodiments, the power management subcircuit of the control system is configured to provide a first voltage signal to the gamma register subcircuit of the control system, and the timing control subcircuit of the control system is configured to provide multiple voltage binding point signals to the gamma register subcircuit.

[0021] The method for generating multiple gamma voltages arranged sequentially from large to small or from small to large includes: generating multiple analog gamma voltages based on the first voltage signal and the multiple voltage binding point signals, each voltage binding point signal corresponding to one analog gamma voltage. Two adjacent analog gamma voltages are respectively set at both ends of a plurality of resistors connected in series, the voltage between the two ends of each resistor being a gamma voltage, and the two adjacent analog gamma voltages generate the multiple gamma voltages arranged sequentially from small to large.

[0022] In some embodiments, the number of the gamma voltages is 256.

[0023] In some embodiments, the method of generating multiple register values ​​using a dithering algorithm based on multiple gamma voltages includes: a plurality of adjacent pixels on the display panel forming a pixel group, a grayscale of each pixel in the pixel group corresponding to one of the multiple gamma voltages, a grayscale value of the pixel group being an average of the grayscale values ​​of the multiple pixels, and a gamma voltage of the multiple pixels corresponding to the grayscale of the pixel group being a register value corresponding to the grayscale of the pixel group.

[0024] In some embodiments, the number of adjacent pixels in the pixel group is at least two, the grayscale value of each pixel is the same and / or continuous, and the number of register values ​​is at least 512.

[0025] In some embodiments, the method of generating multiple register values ​​using a dithering algorithm based on the multiple gamma voltages includes: determining an average of grayscale values ​​of pixels on the display panel in each frame of a plurality of consecutive image frames as the displayed grayscale of the pixel; and determining a register value corresponding to the displayed grayscale as the gamma voltage corresponding to the grayscale of the pixel in the plurality of consecutive image frames.

[0026] In some embodiments, within the at least two adjacent frames of images, the grayscale values ​​of any pixel are the same and / or continuous, and the number of the register values ​​is at least 512.

[0027] In some embodiments, the control system transmits a data signal to the display panel.

[0028] The dimming method for an in-vehicle display device further includes: the in-vehicle display device modulating the data signal from a continuous signal to a pulse signal, and selecting a corresponding gamma curve based on a duty cycle of the pulse signal, brightness of the display panel, and a maximum register value corresponding to a pixel of the display panel.

[0029] In some embodiments, selecting the corresponding gamma curve according to the maximum register value corresponding to the pixel includes: a maximum value of the register values ​​corresponding to the gamma curve is consistent with a maximum register value corresponding to the pixel of the display panel.

[0030] In some embodiments, the brightness of the continuous multiple frames of images of the display panel decreases or increases, and when the gamma curve is constant, the ratio of the brightness of the current frame image to the brightness of the subsequent frame image in the continuous multiple frames of images, and the ratio of the duty cycle of the pulse signal forming the current frame image to the duty cycle of the pulse signal forming the subsequent frame image, are the same.

[0031] In some embodiments, the number of pulses of the data signal forming one frame of image is four.

[0032] In some embodiments, the duty cycle of the pulse signal is greater than or equal to 9%.

[0033] In a fourth aspect, a computer-readable storage medium is provided, which stores computer instructions that can be run on a processor. When the computer instructions are executed by the processor, one or more steps in the dimming method of the vehicle display device as in any of the above embodiments are implemented.

[0034] In a fifth aspect, a computer program product is provided. When the computer program product is run on a computer, the computer is caused to execute one or more steps in the dimming method of the vehicle display device as described in any of the above embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] To more clearly illustrate the technical solutions of the present disclosure, the following briefly introduces the drawings required for use in some embodiments of the present disclosure. Obviously, the drawings described below are only drawings of some embodiments of the present disclosure, and those skilled in the art can also derive other drawings based on these drawings. Furthermore, the drawings described below are schematic diagrams and are not intended to limit the actual dimensions of the products, actual processes of the methods, actual timing of signals, and the like involved in the embodiments of the present disclosure.

[0036] FIG1 is a structural diagram of a display device provided by some embodiments of the present disclosure;

[0037] FIG2 is a circuit diagram of a control system provided by some embodiments of the present disclosure;

[0038] FIG3 is a circuit diagram of a timing control subcircuit provided by some embodiments of the present disclosure;

[0039] FIG4 is a circuit diagram of another control system provided by some embodiments of the present disclosure;

[0040] FIG5 is a flow chart of the control system operation provided by some embodiments of the present disclosure;

[0041] FIG6 is a step diagram of a dimming method for a display device provided in some embodiments of the present disclosure;

[0042] FIG7 is a structural diagram of a display panel provided by some embodiments of the present disclosure;

[0043] FIG8 is a process diagram of a first dithering algorithm provided by some embodiments of the present disclosure;

[0044] FIG9 is a process diagram of a second dithering algorithm provided by some embodiments of the present disclosure;

[0045] FIG10 is a process diagram of a third dithering algorithm provided by some embodiments of the present disclosure;

[0046] FIG11 is a structural diagram of a gamma curve of brightness of a display panel provided by some embodiments of the present disclosure;

[0047] FIG12 is a structural diagram of multiple gamma segments of a register value-grayscale brightness value provided by some embodiments of the present disclosure;

[0048] FIG13 is a structural diagram of multiple gamma segments of another register value-grayscale brightness value provided by some embodiments of the present disclosure;

[0049] FIG14 is a step diagram of a method for generating a gamma voltage according to some embodiments of the present disclosure;

[0050] FIG15 is a process diagram of a fourth dithering algorithm provided by some embodiments of the present disclosure;

[0051] FIG16 is a process diagram of a fifth dithering algorithm provided by some embodiments of the present disclosure;

[0052] FIG17 is a process diagram of a sixth dithering algorithm provided by some embodiments of the present disclosure;

[0053] FIG18 is a structural diagram of an enable signal of a display panel at different brightness levels provided by some embodiments of the present disclosure. DETAILED DESCRIPTION

[0054] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present disclosure. Obviously, the embodiments described are only some embodiments of the present disclosure, not all embodiments. Based on the embodiments provided by the present disclosure, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of the present disclosure.

[0055] Unless the context requires otherwise, throughout the specification and claims, the term "comprise" and its other forms, such as the third person singular form "comprises" and the present participle form "comprising", are to be interpreted as open and inclusive, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example" or "some examples" are intended to indicate that the specific features, structures, materials or characteristics associated with the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representation of the above terms does not necessarily refer to the same embodiment or example. In addition, the specific features, structures, materials or characteristics may be included in any one or more embodiments or examples in any appropriate manner.

[0056] In the following, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more.

[0057] When describing some embodiments, the expressions "coupled" and "connected" and their derivatives may be used. For example, when describing some embodiments, the term "connected" may be used to indicate that two or more components are in direct physical or electrical contact with each other. For another example, when describing some embodiments, the term "coupled" may be used to indicate that two or more components are in direct physical or electrical contact. However, the term "coupled" or "communicatively coupled" may also refer to two or more components that are not in direct contact with each other, but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the contents of this document.

[0058] “At least one of A, B and C” has the same meaning as “at least one of A, B or C” and both include the following combinations of A, B and C: A only, B only, C only, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B and C.

[0059] “A and / or B” includes the following three combinations: A only, B only, and a combination of A and B.

[0060] As used herein, the term "if" is optionally interpreted to mean "when" or "upon" or "in response to determining" or "in response to detecting," depending on the context. Similarly, the phrases "if it is determined that" or "if [stated condition or event] is detected" are optionally interpreted to mean "upon determining" or "in response to determining" or "upon detecting [stated condition or event]" or "in response to detecting [stated condition or event]," depending on the context.

[0061] The use of "adapted to" or "configured to" herein is intended to be open and inclusive language that does not exclude devices adapted or configured to perform additional tasks or steps.

[0062] Additionally, the use of “based on” is intended to be open and inclusive, as a process, step, calculation, or other action “based on” one or more conditions or values ​​may, in practice, be based on additional conditions or beyond values.

[0063] As used herein, “about,” “substantially,” or “approximately” includes the stated value and an average value that is within an acceptable range of deviation from the particular value, where the acceptable range of deviation is determined by one of ordinary skill in the art taking into account the measurements in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).

[0064] Exemplary embodiments are described herein with reference to cross-sectional and / or plan views that are idealized exemplary drawings. In the drawings, the thicknesses of layers and regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are contemplated. Therefore, the exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include deviations in shape due to, for example, manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device and are not intended to limit the scope of the exemplary embodiments.

[0065] Some embodiments of the present disclosure provide a display device, which may be, for example, a mobile phone, a tablet computer, a personal digital assistant (PDA), a television, an in-vehicle computer, a wearable display device, etc. As shown in FIG1 , the display device 1000 may be, for example, an in-vehicle display, and includes a display panel 100. The embodiments of the present disclosure are described using an in-vehicle display as an example.

[0066] In some embodiments, the display device 1000 includes a display panel 100 and a control system. The display panel 100 may be an OLED display panel, which will be described below using an OLED display panel as an example. The control system is used to drive the display panel 100 to operate, and the control system may include: a source driver subcircuit, a timing controller, and a level shifter, etc. Among them, the control systems of consumer-specification products often use highly integrated chips to reduce product size and reduce costs. For example, the source driver subcircuit, timing controller, and level shifter of display devices such as mobile phones and televisions often use highly integrated chips. The high integration and high complexity of the chip may cause the risk of reduced reliability and a significant reduction in the service life. Overall, the reliability of the control system is reduced, and accordingly, the reliability of the display device 1000 is reduced, and the product life is significantly reduced.

[0067] In-vehicle displays have very high requirements for product lifespan and reliability, with a service life of at least 10 years. Products with the aforementioned consumer specifications cannot meet the performance requirements of in-vehicle displays.

[0068] Based on this, some embodiments of the present disclosure provide a control system 200. As shown in FIG2 , the control system 200 includes a timing control subcircuit 210, a gamma register subcircuit 220, a source driver subcircuit 230, a power management subcircuit 240, and a level shift subcircuit 250. The timing control subcircuit 210 is electrically connected to the gamma register subcircuit 220 and the source driver subcircuit 230, the gamma register subcircuit 220 is electrically connected to the source driver subcircuit 230, the power management subcircuit 240 is electrically connected to the timing control subcircuit 210, the gamma register subcircuit 220, and the source driver subcircuit 230, and the level shift subcircuit 250 is electrically connected to the timing control subcircuit 210 and the power management subcircuit 240.

[0069] Among them, the timing control sub-circuit 210 is configured to read pre-stored binding point data and generate a voltage binding point signal 211, transmit the voltage binding point signal 211 to the gamma register sub-circuit 220, and receive N gamma voltages provided by the source driver sub-circuit 230 and generate M register values, where M is greater than N. The timing control sub-circuit 210 is also configured to transmit the register value to the source driver sub-circuit 230 in response to the signal received at the client assembly.

[0070] The gamma register subcircuit 220 is configured to generate an analog gamma voltage signal 221 and transmit it to the source driver subcircuit in response to the first operating voltage 241 received at the power management subcircuit 240 and the voltage tie point signal 211 received at the timing control subcircuit 210 .

[0071] The source driving sub-circuit 230 is configured to receive multiple analog gamma voltage signals 221 and generate multiple gamma voltages between two adjacent analog gamma voltage signals 221 , and generate a data signal 231 in response to receiving a register value signal 212 at the timing control sub-circuit 210 and transmit it to the display panel 100 .

[0072] The power management sub-circuit 240 is configured to generate a first operating voltage 241 and transmit it to the gamma register sub-circuit 220 , and to generate an operating voltage and transmit it to the timing control sub-circuit 210 and the source driver sub-circuit 230 .

[0073] The level shift subcircuit 250 is configured to generate a second signal 251 in response to the timing control signal 213 received at the timing control subcircuit 210 and transmit the second signal 251 to the display panel 100 according to the high / low level signal 242 received at the power management subcircuit 240 .

[0074] In some examples, the timing control subcircuit 210 communicates with the gamma register subcircuit 220 using a serial communication bus. For example, the timing control subcircuit 210 and the gamma register subcircuit 220 can communicate using an inter-integrated circuit (IIC) bus. The timing control subcircuit 210 and the source driver subcircuit 230 are electrically connected using a Mini-LVDS interface to transmit electrical signals from the timing control subcircuit 210 to the source driver subcircuit 230.

[0075] The power management subcircuit 240 generates various voltages and provides them to the corresponding modules. For example, the power management subcircuit 240 provides a second operating voltage 243 to the timing control subcircuit 210. For example, the second operating voltage 243 can be 1.8V or 1.1V. The power management subcircuit 240 provides a first operating voltage 241 to the source driver subcircuit 230, a third operating voltage 244 to the gamma register subcircuit 220, and a high / low level signal 242 to the level shift subcircuit. The power management subcircuit 240 can also provide a reset signal 245 to the display panel 100. The power management subcircuit 240 can supply power to other modules via connecting traces fixed to a substrate or printed circuit board, or a flexible circuit board.

[0076] In some examples, the gamma register sub-circuit 220 generates an analog gamma voltage signal 221 and transmits it to the source driver sub-circuit 230. The gamma register sub-circuit 220 can transmit the analog gamma voltage signal to the source driver sub-circuit 230 via a connection trace fixed to a substrate or printed circuit board, or a flexible circuit board. Similarly, the gamma register sub-circuit 220 can transmit the timing control signal 213 to the level shift sub-circuit 250 via a connection trace fixed to a substrate or printed circuit board, or a flexible circuit board.

[0077] In some embodiments of the present disclosure, the timing control subcircuit 210 serves as a central control unit, responsible for data calculation and processing, receiving LVDS signals and reset signals sent by the client assembly. The source driver subcircuit 230 receives the register value signal 212 transmitted by the timing control subcircuit 210. The source driver subcircuit performs digital-to-analog conversion on the register value signal 212 and transmits it to the display panel 100. The source driver subcircuit 230 and the timing control subcircuit 210 communicate via a Mini-LVDS interface. Each module is responsible for a single function, and the integration of each module is relatively low. Therefore, the reliability of each module is relatively high. The cascade of low-integration, single-function modules forms a complete system, which has more stable performance than a high-integration, multi-function single module. In other words, a control system composed of low-integration, single-function modules has higher stability and reliability than a control system composed of high-integration, multi-function single modules, thereby significantly improving the stability of the vehicle-mounted display device.

[0078] In some embodiments, as shown in Figures 3 and 4, the timing control sub-circuit 210 includes at least a first memory 214, a timing control chip 215, and a second memory 216. The first memory 214 is configured to pre-store binding point data. The timing control chip 215 is electrically connected to the first memory 214 and includes at least a jitter calculation module 217 capable of performing a jitter algorithm. The timing control chip 215 is configured to read the binding point data from the first memory 214, generate a voltage binding point signal, receive N gamma voltages transmitted from the source driver sub-circuit, generate M register values, and store them. The timing control chip 215 is further configured to, in response to signals received from the client assembly, read the register values ​​and transmit them to the source driver sub-circuit. The second memory 216 is electrically connected to the timing control chip 215 and configured to receive and store the M register values ​​transmitted by the timing control chip 215.

[0079] In some examples, the first memory 214 may be an electrically erasable programmable read-only memory (EEPROM), which can be used to store pre-stored binding point data. The control system can read the pre-stored binding point data and generate register values ​​through data calculation. The second memory 216 may be an encoded flash memory (FLASH chip), which can be used to store register values. The control system can read the stored register values ​​and control the brightness of the display panel based on the data from the client assembly.

[0080] The first memory 214 stores data that is less susceptible to loss, has relatively slow read and write speeds, and has a smaller memory capacity. The second memory 216 has a faster data read speed and a relatively larger memory capacity. Binding point data, as pre-stored data, is rarely read by the onboard display device during normal operation. The binding point data is relatively small, requiring less storage space, making it suitable for use in the first memory 214. Register values ​​contain relatively more content, requiring more storage space, and are frequently read during the operation of the onboard display device. Therefore, register values ​​are suitable for storage in the second memory 216. The first memory 214 and the second memory 216 do not interfere with each other, further improving the reliability of the control system. Both are suitable for storing the corresponding data.

[0081] In some embodiments, as shown in FIG4 , the gamma register sub-circuit 220 includes at least a gamma chip 222, which is electrically connected to the timing control chip 215, the source driver sub-circuit 230, and the power management sub-circuit 240. The gamma chip 222 is configured to generate an analog gamma voltage signal 221 in response to a voltage tie point signal 211 received from the timing control chip 215 and a first voltage signal 241 received from the power management sub-circuit 240, and transmit the analog gamma voltage signal 221 to the source driver sub-circuit 230.

[0082] Exemplarily, the gamma register subcircuit 220 includes a gamma chip 222 and a voltage regulator. The voltage regulator is electrically connected to the gamma chip 222. The gamma chip 222 reads the voltage tie point signal and generates a set of voltages arranged in ascending order from the received first voltage signal 241 through the voltage regulator. The set of voltages, arranged in ascending order, may be, for example, analog gamma voltage signal GM1, analog gamma voltage signal GM2, analog gamma voltage signal GM3, analog gamma voltage signal GM4, analog gamma voltage signal GM5, analog gamma voltage signal GM6, analog gamma voltage signal GM7, analog gamma voltage signal GM8, and analog gamma voltage signal GM9. The gamma chip 222 also transmits the analog gamma voltage signals 221 (GM1-GM9) to the source driver subcircuit for calculation.

[0083] In some embodiments, as shown in FIG4 , the source driver subcircuit 230 includes at least a source driver chip 232 and multiple resistors connected in series. The multiple resistors connected in series form a resistor string, the two ends of which can be electrically connected to the source driver chip 232. Each resistor in the resistor string can have two ends that can be gamma voltage output terminals. The source driver chip 232 is electrically connected to the timing control chip 215 and the gamma chip 222. The source driver chip 232 is configured to receive analog gamma voltage signals 221 output by the gamma chip 222 to generate gamma voltages, and to receive signals output by the timing control chip 215 to transmit data signals to the display panel 100.

[0084] In some examples, the source driver chip 232 receives the analog gamma voltage signal 221 transmitted by the gamma chip 222. For example, the source driver chip 232 receives the analog gamma voltage signal GM1 and the analog gamma voltage signal GM2, wherein the analog gamma voltage signal GM1 and the analog gamma voltage signal GM2 are transmitted one-to-one to the two ends of the resistor string, and the voltage across each resistor in the resistor string is a gamma voltage.

[0085] In some embodiments, as shown in FIG. 4 , the power management subcircuit 240 includes at least a power management chip 246 , which is electrically connected to the timing control chip 215 , the gamma chip 222 , the source driver chip 232 , the level shift subcircuit 250 , and the display panel 100 .

[0086] The power management chip 246 is configured to provide an operating voltage to the timing control chip 215, provide a second voltage signal 241 to the gamma chip 222, provide a second operating voltage 244 to the source driver chip 232, provide a high / low level signal 242 to the level shift sub-circuit 250, and provide a reset signal 245 to the display panel 100.

[0087] In some examples, the power management chip 246 is used to generate the various voltages required by the control system and provide the voltages to the corresponding chips or modules to enable the normal operation of the control system. For example, the power management chip 246 can provide operating voltages of 1.8V and 1.1V to the timing control chip 215. The power management chip 246 can provide a second operating voltage 244 to the gamma chip 222 and the source driver chip 232. The first voltage signal 241 generates an analog gamma voltage signal 221 (GM1 to GM9) under the control of the gamma chip 222. The second operating voltage 244 is applied as the operating voltage to the source driver chip 232.

[0088] In some embodiments, as shown in Figure 4, the control system also includes a level shift chip 252, which is electrically connected to the timing control chip 215 and the power management sub-circuit 240 respectively. The level shift chip 252 is configured to generate a second signal 251 in response to a signal received from the timing control chip 215 and transmit it to the display panel.

[0089] In some examples, the level shift chip 252 receives a signal transmitted by the timing control chip 215 , generates a second signal 251 , and transmits it to a gate on array (GOA) driver circuit on the display panel 100 . The second signal 251 may be, for example, a clock signal, a start signal, or the like.

[0090] The second signal 251 can control the operation of the GOA circuit on the display panel 100 . The source driver chip 232 transmits the data signal 231 to the display panel 100 . The second signal 251 cooperates with the data signal 231 to control the operation of the display panel 100 .

[0091] In the present disclosure, the modules of the control system cooperate with each other to operate. FIG5 shows the operation flow of the control system.

[0092] Specifically, the gamma chip 222 receives the first operating voltage 241, and the timing control chip 215 reads the binding point data pre-stored in the first memory 214, generates a voltage binding point signal, and transmits it to the gamma chip 222. The gamma chip 222 generates nine analog gamma voltage signals 221 (GM1-GM9). After these nine analog gamma voltage signals 221 (GM1-GM9) pass through the source driver chip 232, two adjacent analog gamma voltage signals 221 are divided by multiple series voltages to generate 256 gamma voltages. The timing control chip 215 receives these 256 gamma voltages. Part of the timing control chip 215 functions as a jitter calculation module 217, which converts the 256 gamma voltages into 1024 register values ​​through jitter calculation. The timing control chip 215 and the external fixture 260 perform gamma tuning, generating corresponding gamma curves based on the register values ​​at different brightness levels for the display panel and storing them in the second memory 216. The external fixture 260 is a debugging device set in the production line and used to debug the display or display panel to ensure that the user's display effect meets the standard after leaving the factory.

[0093] On the other hand, some embodiments of the present disclosure further provide a vehicle-mounted display device, comprising a control system according to any one of the above embodiments and a display panel, wherein the display panel is electrically connected to the control system.

[0094] In some embodiments, the control system is used to drive the display panel to operate. Under the premise of high reliability of the control system, the display device has high reliability and long life, which meets the high requirements of vehicle-mounted displays for product life and reliability.

[0095] Of course, the in-vehicle display device provided by the present disclosure can also be used in places other than vehicles, such as trains and ferries, where high demands are placed on the lifespan and reliability of the display. Alternatively, the control system used in the in-vehicle display device provided by the present disclosure can also be applied to other displays that have high demands on lifespan and reliability.

[0096] In some embodiments, a low-integration source driver chip outputs a relatively low number of grayscale bits, only 8 bits. For example, the source driver chip can only generate 256 voltage values, where the 256 voltage values ​​are arranged in ascending order as voltage value V1, voltage value V2, ..., voltage value V256, with each voltage value corresponding to a grayscale.

[0097] Typically, the display panel of an OLED display device has a brightness adjustment range, and the display brightness of the display device can vary within the brightness adjustment range. Under different display brightnesses, in order to ensure that the display image of the display panel can clearly distinguish colors, the grayscale is matched with the corresponding voltage value under different display brightnesses. Specifically, when the display brightness is high, the voltage value corresponding to the grayscale of the pixel with the maximum brightness in the display panel is the higher of the 256 voltage values. Under this display brightness, the voltage value that can be selected by other pixels of the display panel should be lower than the voltage value corresponding to the grayscale of the pixel with the maximum brightness. That is to say, when the display brightness is high, the range of voltage values ​​that can be selected for grayscale is larger, while when the display brightness is low, the range of voltage values ​​that can be selected for grayscale is smaller. Especially when the display brightness is low, because the number of voltage values ​​that can be selected for grayscale is small, the display panel cannot distinguish the displayed colors well. Exemplarily, when the display brightness is low, the voltage value corresponding to the grayscale of the brightest pixel of the display panel is low. The voltage value corresponding to the grayscale of the brightest pixel of the display panel can be voltage value V100, voltage value V80 or voltage value V50. That is, when the display brightness is low, the voltage value corresponding to the grayscale of each pixel of the display panel can be selected within the range of voltage value V1 to voltage value V100, the range of voltage value V1 to voltage value V80 or the range of voltage value V1 to voltage value V50.

[0098] For example, the voltage value corresponding to the grayscale of each pixel of the display panel can be selected from the range of voltage values ​​V1 to voltage values ​​V100. At this display brightness, grayscale control can be performed within the range of voltage values ​​V1 to voltage values ​​V100. Each voltage value corresponds to a grayscale, with voltage value V1 corresponding to the lowest grayscale value (minimum brightness) and voltage value V100 corresponding to the highest grayscale value (maximum brightness). In other words, at this display brightness, the brightness of the pixels of the display panel can be controlled within a range of 100 grayscales.

[0099] It is understandable that the number of grayscales corresponding to each pixel of the display panel is small. When the display panel displays an image, the grayscale and the actual color of the image cannot be well matched, which may cause the color of the displayed screen to be unable to be clearly distinguished. Therefore, color deviation may occur under different display brightness.

[0100] Based on this, in another aspect, some embodiments of the present disclosure further provide a dimming method for an in-vehicle display device, as shown in FIG6 , which is applied to the in-vehicle display device according to any of the above embodiments. The dimming method for the in-vehicle display device includes:

[0101] S1, generating a plurality of gamma voltages arranged in order from large to small or from small to large;

[0102] S2, based on multiple gamma voltages, uses a dithering algorithm to generate multiple register values;

[0103] S3. Modulate the gamma curve to generate a corresponding gamma curve according to the multiple register values ​​and the brightness of the display panel.

[0104] In some examples, there are multiple gamma voltages, for example, there may be 256 gamma voltages, each of which corresponds to a grayscale. That is, in step S1 , any pixel of the display panel can be adjusted within a maximum range of 256 grayscales.

[0105] In step S2, Figures 8 to 10 and 15 to 17 illustrate the process of expanding the range of register values ​​using a dithering algorithm, wherein Figures 8 to 10 illustrate one dithering algorithm method, and Figures 15 to 17 illustrate another dithering algorithm method.

[0106] As shown in Figure 7, the display panel includes a display area AA and a peripheral area BB disposed at least to one side of the display area. Multiple pixels P are arranged in an array within the display area AA, and each pixel P includes multiple sub-pixels. During display, the sub-pixels are scanned row by row. Each sub-pixel emits different brightness levels under the control of different data signals, i.e., each sub-pixel generates a different grayscale. In this way, all sub-pixels generate an image on the display panel.

[0107] For 8-bit in-vehicle displays, the number of grayscales is 256, and for 10-bit in-vehicle displays, the number of grayscales is 1024. Therefore, the higher the bit rate of an in-vehicle display device, the larger the grayscale range and the smoother the changes in brightness and darkness of the image. For 8-bit in-vehicle displays, a dithering algorithm can be used to expand the number of grayscales of the in-vehicle display device.

[0108] Among them, the dithering algorithm refers to controlling the grayscale of a certain pixel or adjacent pixels of adjacent frames in a temporal or spatial manner so that the entire screen can obtain a grayscale that could not be generated originally, thereby expanding the number of grayscales. In other words, the dithering algorithm can be used to divide the original 256 grayscales into more new grayscales, wherein each new grayscale corresponds to a register value. It can be understood that each new grayscale is a superposition state of multiple original grayscales, that is, a register value corresponds to a set of gamma voltages, that is, a register value corresponds to a new grayscale, and a new grayscale is a superposition state of multiple original grayscales corresponding to a set of gamma voltages, wherein the superposition state of multiple original grayscales is a grayscale corresponding to a register value. For the convenience of distinction, the grayscale corresponding to the register value is referred to as a virtual grayscale below.

[0109] As shown in Figures 8 to 10, taking the spatial control of the grayscales of adjacent pixels as an example, two adjacent pixels can be selected as a group, namely a first pixel P1 and a second pixel P2. The grayscale of each pixel can be any one of two continuous grayscales. In this way, the grayscale of the first pixel P1 can be grayscale Gx, and the grayscale of the second pixel P2 can be grayscale Gx, that is, the virtual grayscale of the two adjacent pixels is Gx; alternatively, the grayscale of the first pixel P1 can be grayscale Gy, and the grayscale of the second pixel P2 can be grayscale Gy, that is, the virtual grayscale of the two adjacent pixels is Gy; alternatively, the grayscale of the first pixel P1 can be grayscale Gx, and the grayscale of the second pixel P2 can be grayscale Gy, that is, the virtual grayscale of the two adjacent pixels is a mixture of one Gx and one Gy. In this way, the number of virtual grayscales of the two adjacent pixels is twice the number of original grayscales. That is, when the number of grayscales is 256, the number of virtual grayscales is 512.

[0110] Alternatively, four adjacent pixels may be selected as a group, where the four adjacent pixels are sequentially the first pixel P1, the second pixel P2, the third pixel P3, and the fourth pixel P4, wherein the grayscale of each pixel may be any one of two continuous grayscales. For example, the grayscale of the first pixel P1 may be grayscale Gx, the grayscale of the second pixel P2 may be grayscale Gy, the grayscale of the third pixel P1 may be grayscale Gy, and the grayscale of the fourth pixel may be grayscale Gy. Then, the virtual grayscales of the four adjacent pixels may be a mixture of one grayscale Gx and three grayscales Gy. Alternatively, the grayscale of the first pixel P1 may be grayscale Gx, the grayscale of the second pixel P2 may be grayscale Gx, the grayscale of the third pixel P1 may be grayscale Gy, and the grayscale of the fourth pixel may be grayscale Gy. Then, the virtual grayscales of the four adjacent pixels may be a mixture of two grayscales Gx and two grayscales Gy. Alternatively, the grayscale of the first pixel P1 can be grayscale Gx, the grayscale of the second pixel P2 can be grayscale Gx, the grayscale of the third pixel P1 can be grayscale Gx and the grayscale of the fourth pixel can be grayscale Gy, then the virtual grayscales of the four adjacent pixels can be a mixed state of three grayscales Gx and one grayscale Gy.

[0111] Thus, three new virtual grayscales are added to grayscale Gx and grayscale Gy. The number of virtual grayscales is three times the number of grayscales corresponding to the gamma voltage. In other words, the number of virtual grayscales is four times the number of grayscales corresponding to the gamma voltage. That is, when there are 256 grayscales, the number of virtual grayscales is 1024. The register values ​​are arranged in ascending order of corresponding brightness: register value J0, register value J1, ..., register value J1023. This expands the number of register values ​​from 8 bits to 10 bits, and the number of new register values ​​is 1024.

[0112] In some embodiments, as shown in FIG. 11 , the display panel may adjust brightness values ​​(DBVs) to control display brightness, and each DBV corresponds to a different gamma curve.

[0113] Since the human eye is much more sensitive to brightness in a darker environment than in a brighter environment, the relationship between the human eye's perception and brightness is not a linear relationship, but rather presents a certain regularity. Figure 11 shows a gamma curve, in which the horizontal axis represents the brightness output by the pixel or the grayscale displayed externally (hereinafter referred to as grayscale), and the vertical axis represents the grayscale brightness value output by the pixel. In this disclosure, the grayscale brightness value refers to the perceived brightness of different grayscales at different brightness levels of the display panel. In order to make the display effect of the OLED display device consistent with the visual perception of the human eye, it is necessary to set the relationship between the input grayscale and the corresponding output grayscale brightness value so that the grayscale brightness value is proportional to the γ power of the grayscale. This relationship between the grayscale brightness value and the grayscale is called the gamma curve of the vehicle-mounted display device. For example, the value of γ is set to 2.2±0.2 so that the displayed picture is close to the picture actually seen by the human eye.

[0114] Each brightness value of the display panel corresponds to a different gamma curve. Accordingly, in the coordinate system of register value-grayscale brightness value, each brightness value corresponds to a gamma band. Each gamma band includes 256 grayscales. The gamma curves of different gamma bands correspond to different brightness of the display panel. For example, the gamma curve of one gamma band can correspond to the case where the brightness of the display panel is 5 nits, or the gamma curve of another gamma band can correspond to the case where the brightness of the display panel is 800 nits.

[0115] The grayscale brightness value corresponding to the gamma curve of the gamma segment can be matched with the corresponding register value. As shown in Figure 12, there are 256 register values ​​in total. Each gamma voltage corresponds to a register value. Each register value can represent a grayscale (brightness), so the grayscale of the horizontal axis can be replaced by the register value.

[0116] Similarly, as shown in FIG13 , there are 1024 register values ​​in total, each register value represents a virtual grayscale (brightness), and the virtual grayscale of the horizontal axis can be replaced by the register value.

[0117] As shown in Figures 12 and 13, the display panel matches the corresponding gamma segments at different brightness levels. The register value for the gamma segment corresponding to the display panel at high brightness has a wider range than the register value for the gamma segment corresponding to the display panel at low brightness. Therefore, the grayscale of the display panel at low brightness cannot be fully matched with the register value, resulting in unclear color distinction on the display panel at low brightness, which may cause color cast on the displayed image.

[0118] FIG13 expands the range of register values ​​so that even at low brightness, the grayscale of the display panel matches sufficient register values, making color distinction clear and the display image having high color fidelity.

[0119] It should be noted that while the register values ​​in Figures 12 and 13 are the same, the corresponding grayscales and virtual grayscales (brightness) are different. The register values ​​in Figure 12 have 256 brightness levels between the darkest and brightest, while the register values ​​in Figure 13 have 1024 brightness levels between the darkest and brightest.

[0120] It is understood that the register values ​​corresponding to the 256 grayscales in the gamma segment range from register value J0 to the register value that matches the maximum brightness of the pixel corresponding to the gamma curve of the gamma segment. The maximum register value in the gamma curve of the gamma segment varies at different brightness levels of the display panel, so the range of register values ​​for the 256 grayscales of each gamma curve varies.

[0121] For example, the maximum brightness of the gamma segment corresponding to the gamma curve with a brightness of 800 nits matches the register value J950, ​​and the 256 grayscales of the gamma curve with a brightness of 800 nits can be found within the range of register values ​​J0 to J950. ​​Alternatively, the maximum brightness of the gamma segment corresponding to the gamma curve with a brightness of 300 nits matches the register value J400, and the 256 grayscales of the gamma curve with a brightness of 300 nits can be found within the range of register values ​​J0 to J400.

[0122] A dithering algorithm is used to expand the range of register values. As shown in Figure 13, the gamma curve corresponding to different brightness levels of the display panel has 256 grayscale segments, and a corresponding register value can be found for each grayscale. When the low-integration source driver chip can only provide 8-bit grayscale, the entire control system can provide a 10-bit register value, allowing the display panel to present grayscales that were previously impossible, thus expanding the number of grayscales overall. As a result, the image presented by the display panel will not have color deviation or will have a small color deviation at different brightness levels, and a higher-quality display image can be provided on low-integration hardware.

[0123] In some embodiments, the power management subcircuit of the control system is configured to provide a first voltage signal to the gamma register subcircuit of the control system, and the timing control subcircuit of the control system is configured to provide multiple voltage tie point signals to the gamma register subcircuit.

[0124] As shown in FIG14 , the gamma voltage generation method includes:

[0125] S11 . Generate a plurality of analog gamma voltages according to a first voltage signal and a plurality of voltage binding point signals, where each voltage binding point signal corresponds to one analog gamma voltage.

[0126] S12. Two adjacent analog gamma voltages are respectively set at both ends of a plurality of resistors connected in series. The voltage between both ends of each resistor is a gamma voltage. The two adjacent analog gamma voltages generate a plurality of gamma voltages arranged in ascending order.

[0127] In some examples, the gamma register sub-circuit receives a voltage binding point signal and can generate multiple analog gamma voltages through a voltage reducer based on the first voltage signal. Each voltage binding point signal corresponds to generating an analog gamma voltage. For example, there can be nine voltage binding point signals, and the corresponding number of analog gamma voltages is nine. The nine analog gamma voltages are arranged in order from small to large voltage values ​​as follows: analog gamma voltage GM1, analog gamma voltage GM2, analog gamma voltage GM3...analog gamma voltage GM9.

[0128] The gamma register subcircuit transmits the analog gamma voltage to the source driver subcircuit, which uses resistor string voltage division to generate the gamma voltage. Specifically, the source driver subcircuit includes a circuit with multiple resistors in series, for example, 32 resistors. Two adjacent analog gamma voltages are transmitted to the ends of the circuit, with the voltage across each resistor representing a gamma voltage. For example, analog gamma voltage GM1 is transmitted to one end of the circuit, and analog gamma voltage GM2 is transmitted to the other end of the circuit. The circuit has 32 resistors, and the voltage across each resistor represents a gamma voltage. Thus, 32 gamma voltages are generated between analog gamma voltage GM1 and analog gamma voltage GM2. This generates eight sets of gamma voltages, each of which is generated by dividing two adjacent analog gamma voltages through the resistor string. Each set of 32 gamma voltages contains 256 gamma voltages in total.

[0129] It should be noted that the embodiments of the present disclosure do not limit the number of analog gamma voltages generated by the gamma register subcircuit, nor do they limit the number of gamma voltages generated by each resistor string in the source driver subcircuit. It is understood that the total number of gamma voltages is the product of the number of analog gamma voltages and the number of resistors in a resistor string. The total number of gamma voltages should match the number of grayscale levels in the grayscale image. For example, the total number of gamma voltages can be 16, 32, or 256. In the present disclosure, the number of gamma voltages can be expanded to 256.

[0130] By controlling the voltage tie point signal, the voltage between two adjacent analog gamma voltages can be controlled, and then the gamma voltage accuracy (or the size of the gamma voltage) can be controlled. The present disclosure can use hardware with lower integration to generate higher-precision gamma voltages and can relatively control the size of the gamma voltage.

[0131] In some embodiments, the dithering algorithm includes: a plurality of adjacent pixels on the display panel form a pixel group, the grayscale of each pixel in the pixel group corresponds to one gamma voltage among a plurality of gamma voltages, and the grayscale value of the pixel group is the average value of the grayscale values ​​of the plurality of pixels.

[0132] The gamma voltages of the plurality of pixels corresponding to the grayscale of the pixel group are a register value corresponding to the grayscale of the pixel group.

[0133] In some examples, the dithering algorithm can be performed by spatially controlling adjacent pixels, and controlling the grayscale changes of adjacent pixels can make the adjacent pixels as a whole appear in multiple grayscales. This method has been described above and will not be repeated here.

[0134] In other embodiments, as shown in Figures 15 to 17, the dithering algorithm includes: within a plurality of consecutive image frames, the average of the grayscale values ​​of the pixels on the display panel in each frame is used as the displayed grayscale of each pixel. The gamma voltage corresponding to the grayscale of each pixel in the plurality of consecutive image frames is used as a register value corresponding to the displayed grayscale.

[0135] In some embodiments, within the at least two adjacent frames of images, the grayscale values ​​of any pixel are the same and / or continuous, and the number of the register values ​​is at least 512.

[0136] In some examples, the dithering algorithm may also use a temporal approach to control the grayscale of pixels when displaying adjacent frames of images.

[0137] For example, two adjacent frame images are selected, and the grayscale of any pixel in the display panel is Gx in the first frame image and Gy in the second frame image. Then the virtual grayscale presented by the pixel as a whole in the display images of the two adjacent frames can be a mixed state of a grayscale Gx and a grayscale Gy.

[0138] Alternatively, if the grayscale of any pixel in the display panel is Gx in the first frame image and Gx in the second frame image, the virtual grayscale presented by the pixel as a whole in the display images of two adjacent frames may be grayscale Gx.

[0139] Alternatively, if the grayscale of any pixel in the display panel is Gy in the first frame image and Gy in the second frame image, the virtual grayscale presented by the pixel as a whole in the display images of two adjacent frames may be grayscale Gy.

[0140] Thus, the number of virtual gray scales is twice the number of gray scales corresponding to the gamma voltages, that is, when the number of gray scales is 256, the number of virtual gray scales is 512.

[0141] In other examples, four adjacent frame images are selected, and the grayscale of any pixel in the display panel is Gx in the first frame image, Gy in the second frame image, Gy in the third frame image, and Gy in the fourth frame image. Then, the virtual grayscale presented by the pixel as a whole in the display images of the four adjacent frames can be a mixed state of one grayscale Gx and three grayscales Gy.

[0142] Alternatively, if the grayscale of any pixel in the display panel is Gx in the first frame image, Gx in the second frame image, Gy in the third frame image, and Gy in the fourth frame image, then the virtual grayscale presented by the pixel as a whole in the display images of four adjacent frames can be a mixture of two grayscales Gx and two grayscales Gy.

[0143] Alternatively, if the grayscale of any pixel in the display panel is Gx in the first frame image, Gx in the second frame image, Gx in the third frame image, and Gy in the fourth frame image, then the virtual grayscale presented by the pixel as a whole in the display images of four adjacent frames can be a mixed state of three grayscales Gx and one grayscale Gy.

[0144] This increases the number of virtual grayscales by three times the number of grayscales corresponding to the gamma voltage. That is, for a total of 256 grayscales, the number of virtual grayscales is 1024. The register values, in descending order of brightness, are register value J0, register value J1, and so on, register value J1023. The register value range has been expanded from 8 bits to 10 bits, bringing the total number of register values ​​to 1024.

[0145] At different display brightness levels, the grayscale of the pixels on the display panel needs to be adjusted within a certain register value range to achieve a certain display brightness without causing color shift in the displayed image. Specifically, at different display brightness levels, the grayscale value of the pixel with the largest value on the display panel should decrease as the display brightness decreases. Accordingly, as the display brightness decreases, the range of virtual grayscales that the pixels on the display panel can select decreases, that is, the range of register values ​​that the pixels on the display panel can select decreases.

[0146] The embodiments of the present disclosure extend the range of register values ​​to 10 bits. However, when the display panel is at a low grayscale, the range of selectable register values ​​for pixels in the display panel is small. In this state, the image formed by the display panel may have color deviation.

[0147] Based on this, the dimming method of the vehicle-mounted display device provided in some embodiments of the present disclosure further includes:

[0148] H1. The vehicle-mounted display device modulates the data signal from a continuous signal to a pulse signal;

[0149] H2. According to the duty cycle of the pulse signal and the brightness of the display panel, the maximum register value corresponding to the pixel of the display panel, and the corresponding gamma curve is selected according to the maximum register value corresponding to the pixel.

[0150] In some examples, the pixel brightness (grayscale) of the display panel can be controlled by modulating the power of the data signal. When the display panel is at low brightness, the range of virtual grayscales that can be selected by the pixels is small. For example, as shown in Table 1, the number of first register values ​​described in Table 1 refers to the number of register values ​​that can be selected by each pixel of the display panel when the data signal output by the control system is a continuous signal at the corresponding brightness of the display panel. The number of second register values ​​described in Table 1 refers to the number of register values ​​that can be selected by each pixel of the display panel when the data signal output by the control system is modulated into a pulse signal at the corresponding brightness of the display panel. The duty cycle described in Table 1 refers to the duty cycle of the data signal output by the control system modulated into a pulse signal.

[0151]

[0152] Table 1

[0153] For example, if the display panel is dimmed at 5 nits and the control system outputs a continuous data signal, the pixels can select values ​​within six virtual grayscales. In other words, in this case, the display panel may display an image with color shift due to the small number of virtual grayscales.

[0154] The overall luminance of a pixel decreases within a frame of image, but the luminance of the pixel after receiving each pulse signal is higher than the overall luminance within the frame of image. In other words, when the brightness of the display panel decreases, the instantaneous brightness of the pixel increases. Therefore, when using the display panel dimming method provided by the present disclosure, the display panel should refer to the gamma curve corresponding to the instantaneous brightness of the pixel at a certain brightness. Because the instantaneous brightness is higher than the brightness of the display panel, it can be seen that the range of virtual grayscales that can be selected by the pixel is expanded. In other words, when using the display panel dimming method provided by the present disclosure, the register value range of the display panel will be greatly improved at low brightness.

[0155] For example, if the display panel is 5 nits and the display panel dimming method provided by the present disclosure is not used, the pixel can select a value from six register values. After using the display panel dimming method provided by the present disclosure, the duty cycle of the pulse signal is 9%, and the pixel can select a value from 69 register values.

[0156] For example, as shown in Table 1, the data signal is modulated from a continuous signal to a pulse signal, which reduces the overall luminance of the pixels within a frame, achieving the goal of reducing the display panel brightness to 5 nits. The instantaneous brightness of the pixels during each light emission is higher than 5 nits, which means that the pixel's virtual grayscale selection range can be wider. For example, when the duty cycle of the pulse signal (data signal) is 9%, the display panel brightness is 5 nits, and the number of virtual grayscales that can be selected by the pixels on the display panel is 69. In this case, the displayed image on the display panel has more color distinctions, and color cast is significantly improved.

[0157] The pixel has a wider range of register value selections. When the display panel dimming method provided by the present disclosure is used, the picture display is clearer and the color cast phenomenon is significantly improved when the display panel is at low brightness.

[0158] In some embodiments, when the brightness of the display panel changes, the brightness of the consecutive multiple frames of images gradually decreases or increases. When the gamma curve corresponding to the display brightness is constant, the ratio of the brightness of the current frame of the consecutive multiple frames of images to the brightness of the subsequent frame of the consecutive multiple frames of images is the same as the ratio of the duty cycle of the data signal forming the current frame of the image to the duty cycle of the data signal forming the subsequent frame of the image.

[0159] In some examples, during actual use of the vehicle-mounted display device, the user adjusts the display brightness of the vehicle-mounted display device (for example, by dragging a brightness slider on the display screen of the vehicle-mounted display device to adjust the display brightness of the display screen of the vehicle-mounted display device), or the vehicle-mounted display device automatically adjusts its own display brightness in response to changes in the brightness of the surrounding environment.

[0160] To prevent brightness jumps during brightness adjustment of an on-board display device or display panel, the brightness of multiple frames can be gradually lowered or raised. By maintaining a constant gamma curve corresponding to the display brightness of the display panel, the brightness of multiple frames can be controlled to decrease or increase. Specifically, the greater the duty cycle, the lower the image brightness. Therefore, the duty cycle of the data signal forming each frame should not vary too much to avoid brightness jumps caused by excessive brightness changes.

[0161] In some embodiments, the vehicle-mounted display device modulates the data signal into a pulse signal by, for example, a source driver subcircuit converting the data signal into a pulse signal, or a level shift subcircuit transmitting a control signal to a GOA circuit. The enable signal output by the GOA circuit can control the conduction and cutoff of the current path for transmitting the data signal to the pixel driver circuit, thereby realizing continuous modulation of the data signal into a pulse signal.

[0162] In some embodiments, the number of pulses of the data signal forming one frame of image is 4. Exemplarily, the data signal forming each frame of image of the vehicle-mounted OLED display device includes 4 pulses.

[0163] For example, as shown in FIG18 , within a frame of an image, the number of pulses of the enable signal EM that controls the conduction and cutoff of the current path for transmitting the data signal to the pixel drive circuit is 4. For example, in conjunction with FIG18 and Table 1, it can be seen that when the duty cycle of the enable signal EM is 97%, the brightness of the corresponding display panel can be 815 nits. When the duty cycle of the enable signal EM is 48%, the brightness of the corresponding display panel is between 390 nits and 500 nits. When the duty cycle of the enable signal EM is 9%, the brightness of the corresponding display panel can be 5 nits. It can be understood that the duty cycle of the enable signal directly affects the duty cycle of the data signal. That is, the duty cycle of the enable signal is the same as the duty cycle of the data signal. In addition, when the duty cycle of the data signal is different, the power of the data signal is correspondingly reduced.

[0164] It should be noted that, in some other types of OLED display devices, the data signal forming one frame of image may include 16 or 32 pulse signals, such as a mobile phone using an OLED display panel.

[0165] In some embodiments, the duty cycle of the pulse signal is greater than or equal to 9%. For example, when the duty cycle of the pulse signal is 9%, the brightness of the display panel is 5 nits. The minimum display brightness of 5 nits can meet the minimum brightness requirements of some display panels. Of course, if the duty cycle of the pulse signal is too low, the OLED display panel may not emit stable light.

[0166] Some embodiments of the present disclosure also provide a computer-readable storage medium, which stores computer instructions that can be run on a processor. When the computer instructions are executed by the processor, one or more steps in the dimming method of the vehicle-mounted display device as described above are implemented.

[0167] It should be noted that the computer-readable storage medium provided in the embodiments of the present disclosure may include, but is not limited to: magnetic storage devices (for example, hard disks, floppy disks or magnetic tapes, etc.), read-only memories (ROMs), random access memories (RAMs), erasable programmable read-only memories (EPROMs), and other media that can store program codes.

[0168] Some embodiments of the present disclosure further provide a computer program product, which, when executed on a computer, enables the computer to execute one or more steps of the dimming method for an in-vehicle display device as described above.

[0169] The computer storage medium or computer program product provided in the embodiments of the present disclosure is used to execute the dimming method of the vehicle display device provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the corresponding method provided above, and will not be repeated here.

[0170] The above are merely specific embodiments of the present disclosure, but the scope of protection of the present disclosure is not limited thereto. Any modifications or substitutions that a person skilled in the art could conceive within the technical scope disclosed herein should be included within the scope of protection of the present disclosure. Therefore, the scope of protection of the present disclosure should be based on the scope of protection of the claims.

Claims

1. A control system comprising: a timing control subcircuit, a gamma register subcircuit, a source driver subcircuit, and a power management subcircuit; wherein the timing control subcircuit is electrically connected to the gamma register subcircuit and the source driver subcircuit, the gamma register subcircuit is electrically connected to the source driver subcircuit, and the power management subcircuit is electrically connected to the timing control subcircuit, the gamma register subcircuit, and the source driver subcircuit; The timing control subcircuit is configured to read pre-stored binding point data to generate a voltage binding point signal and transmit it to the gamma register subcircuit, and receive N gamma voltages provided by the source driver subcircuit and generate M register values, where M is greater than N. The timing control subcircuit is further configured to transmit the register values ​​to the source driver subcircuit in response to a signal received at the client assembly. The gamma register subcircuit is configured to generate an analog gamma voltage signal and transmit it to the source driver subcircuit in response to a first voltage signal received at the power management subcircuit and a voltage tie point signal received at the timing control subcircuit; The source driving sub-circuit is configured to receive the plurality of analog gamma voltage signals, generate the plurality of gamma voltages between two adjacent analog gamma voltage signals, and generate a data signal in response to receiving a register value signal at the timing control sub-circuit and transmit the data signal to the display panel; The power management sub-circuit is configured to generate a first voltage signal and transmit the first voltage signal to the gamma register sub-circuit, and to generate an operating voltage and transmit the first voltage signal to the timing control sub-circuit and the source driver sub-circuit.

2. The control system according to claim 1, wherein: The timing control subcircuit at least includes: a first memory configured to pre-store binding point data; a timing control chip electrically connected to the first memory, the timing control chip being configured to read the binding point data of the first memory, generate the voltage binding point signal, and receive N gamma voltages transmitted by the source driver sub-circuit, generate M register values ​​and store them, and the timing control chip being further configured to read the register values ​​and transmit them to the source driver sub-circuit in response to a signal received at the client assembly; The second memory is electrically connected to the timing control chip, and the second memory is configured to receive and store M register values ​​transmitted by the timing control chip.

3. The control system according to claim 1 or 2, wherein: The gamma register subcircuit includes at least a gamma chip, and the gamma chip is electrically connected to the timing control chip, the source driver subcircuit, and the power management subcircuit; The gamma chip is configured to generate an analog gamma voltage signal in response to the voltage binding point signal received at the timing control chip and the first voltage signal received at the power management sub-circuit, and transmit the analog gamma voltage signal to the source driver sub-circuit.

4. The control system according to any one of claims 1 to 3, wherein: The source driver sub-circuit at least includes a source driver chip, and the source driver chip is electrically connected to the timing control chip and the gamma chip; The source driver chip is configured to receive the analog gamma voltage signal output by the gamma chip to generate a gamma voltage; and receive the signal output by the timing control chip to transmit a data signal to the display panel.

5. The control system according to any one of claims 1 to 3, wherein: The power management subcircuit at least includes a power management chip, and the power management chip is electrically connected to the timing control chip, the gamma chip, the source driver chip, the level shift subcircuit and the display panel; The power management chip is configured to provide an operating voltage to the timing control chip, provide a first voltage signal to the gamma chip and the source driver chip, provide a high / low level signal to the level shift sub-circuit, and provide a reset signal to the display panel.

6. The control system according to any one of claims 1 to 5, wherein: The control system further includes a level shift subcircuit, and the level shift subcircuit is electrically connected to the timing control subcircuit and the power management chip.

7. The control system according to claim 6, wherein: The control system further includes a level shift chip, which is electrically connected to the timing control chip and the power management chip respectively. The level shift chip is configured to generate a second signal in response to a signal received from the timing control chip and transmit the second signal to the display panel.

8. A vehicle-mounted display device, comprising: The control system according to any one of claims 1 to 7; The display panel is electrically connected to the control system.

9. A dimming method for an in-vehicle display device, applied to the in-vehicle display device according to claim 8, wherein a control system of the in-vehicle display device transmits a data signal to a display panel; The dimming method of the vehicle-mounted display device includes: Generate multiple gamma voltages arranged in order from large to small or from small to large; generating a plurality of register values ​​using a dithering algorithm based on the plurality of gamma voltages; A gamma curve is modulated to generate a corresponding section of the gamma curve according to the multiple register values ​​and the brightness of the display panel.

10. The dimming method of the vehicle-mounted display device according to claim 9, wherein: The power management subcircuit of the control system is configured to provide a first voltage signal to the gamma register subcircuit of the control system, and the timing control subcircuit of the control system is configured to provide a plurality of voltage tie point signals to the gamma register subcircuit; The method for generating a plurality of gamma voltages arranged in sequence from large to small or from small to large includes: generating a plurality of analog gamma voltages according to the first voltage signal and the plurality of voltage binding point signals, each voltage binding point signal corresponding to one analog gamma voltage; Two adjacent analog gamma voltages are respectively set at both ends of a plurality of resistors connected in series, the voltage between both ends of each resistor is a gamma voltage, and the two adjacent analog gamma voltages generate a plurality of gamma voltages arranged in order from small to large.

11. The dimming method of the vehicle-mounted display device according to claim 9, wherein: The number of the gamma voltages is 256.

12. The dimming method for an in-vehicle display device according to any one of claims 9 to 11, wherein: The method of generating a plurality of register values ​​by using a dithering algorithm based on a plurality of gamma voltages includes: A plurality of adjacent pixels on the display panel form a pixel group, a grayscale of each pixel in the pixel group corresponds to one gamma voltage among the plurality of gamma voltages, and a grayscale value of the pixel group is an average value of the grayscale values ​​of the plurality of pixels; The gamma voltages of the plurality of pixels corresponding to the grayscale of the pixel group are a register value corresponding to the grayscale of the pixel group.

13. The dimming method of the vehicle-mounted display device according to claim 12, wherein: The number of adjacent pixels in the pixel group is at least two, and the grayscale value of each pixel is the same and / or continuous; The number of the register values ​​is at least 512.

14. The dimming method for an in-vehicle display device according to any one of claims 9 to 11, wherein: The method of generating a plurality of register values ​​by using a dithering algorithm based on a plurality of gamma voltages includes: In a continuous plurality of frames of images, the average of the grayscale values ​​of the pixels on the display panel in each frame of the image is the display grayscale of any pixel; The gamma voltage corresponding to the grayscale of any pixel in the continuous multi-frame image is a register value corresponding to the display grayscale.

15. The dimming method of the vehicle-mounted display device according to claim 14, wherein: In the at least two adjacent image frames, the grayscale values ​​of any pixel are the same and / or continuous; The number of the register values ​​is at least 512.

16. The dimming method for an in-vehicle display device according to any one of claims 9 to 15, wherein: The control system transmits a data signal to the display panel; The dimming method of the vehicle-mounted display device further includes: The vehicle-mounted display device modulates the data signal from a continuous signal to a pulse signal; According to the duty cycle of the pulse signal and the brightness of the display panel, the maximum register value corresponding to the pixel of the display panel, and the corresponding gamma curve is selected according to the maximum register value corresponding to the pixel.

17. The dimming method of the vehicle-mounted display device according to claim 16, wherein: The selecting the corresponding gamma curve according to the maximum register value corresponding to the pixel includes: The maximum value of the register values ​​corresponding to the gamma curve is consistent with the maximum register value corresponding to the pixels of the display panel.

18. The dimming method of the vehicle-mounted display device according to claim 16, wherein: When the brightness of the continuous multiple frames of images on the display panel decreases or increases and the gamma curve is constant; The ratio of the brightness of the current frame image to the brightness of the subsequent frame image in the continuous multiple frame images, and the ratio of the duty cycle of the pulse signal forming the current frame image to the duty cycle of the pulse signal forming the subsequent frame image, are the same.

19. The dimming method for an in-vehicle display device according to any one of claims 16 to 18, wherein: The number of pulses of the data signal forming one frame of image is four.

20. The dimming method of the vehicle-mounted display device according to any one of claims 16 to 18, wherein: The duty cycle of the pulse signal is greater than or equal to 9%.

21. A computer-readable storage medium storing computer instructions executable on a processor, wherein the computer instructions, when executed by the processor, implement one or more steps of the dimming method for an in-vehicle display device according to any one of claims 9 to 20.

22. A computer program product, which, when executed on a computer, enables the computer to execute one or more steps of the dimming method for an in-vehicle display device according to any one of claims 9 to 20.