Game machine

Abstract

To provide a game machine capable of enhancing a player's interest in a game.SOLUTION: By sound output means, prescribed sound is outputted in a prescribed direction where it is hard to directly reach a player who visually recognizes a front direction of a game machine. On the basis that a prescribed execution condition is satisfied, specific performance in a performance mode that can suggest the advantage degree of discrimination in a specific display mode displayed to a display screen visible from the front direction of the game machine and output of specific sound outputted by the sound output means is executed. As the type of specific performance, the game machine has at least first specific performance corresponding to first advantage degree and second specific performance corresponding to second advantage degree higher than the first advantage degree and, as the kind of specific sound, it has first specific sound outputted in the first specific performance and second specific sound outputted in the second specific performance. Thus, there is an effect which can enhance a player's interest in a game.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a gaming machine, typified by a pachinko machine. [Background technology]

[0002] Some gaming machines such as pachinko machines have display devices such as liquid crystal display devices. In this conventional gaming machine, the pattern is displayed on the display device, and the pattern is stopped and displayed in a predetermined combination, giving the player a winning game that is advantageous. Furthermore, in some of these conventional gaming machines, audio output devices such as speakers are provided, and by configuring not only visual presentations but also auditory presentations, the performance aspects have been diversified and the like is improved, and the fun is improved. [Prior Art Documents] [Patent Document]

[0003] [Patent Document 1] Publication No. 2003-325886 Summary of the invention [Problems to be solved by the invention]

[0004] However, there is a need for further improvement in the interest.

[0005] The present invention has been made to solve the problems shown above, and an object of the present invention is to provide a gaming machine that can improve the interest of players in playing. Means for solving the problem

[0006] In order to achieve this objective, the gaming machine according to claim 1, which has a discriminating means for performing a judgment based on the fact that a given discrimination condition is met, and a bonus game execution means for performing a bonus game that is advantageous to the player based on the determination of the discrimination means, and a display means having at least a display screen that can be viewed from the front of the gaming machine, an audio output means that can output a given sound in a predetermined direction that is difficult to directly reach to the player who is viewing the front of the gaming machine, and a specific display mode displayed on the display screen of the display means and the audio output means based on the establishment of the predetermined execution condition. 固可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可

[0007] The gaming machine according to claim 2 is the gaming machine according to claim 1, in which the first specific performance and the second specific performance are displayed in a common display mode as the specific display mode.

[0008] The gaming machine according to claim 3 is the gaming machine according to claim 1, in which the specific performance execution means is capable of displaying the first display mode in the first specific performance, and displaying the second display mode in the second specific performance that is different from the first display mode in the second specific performance.

[0009] The gaming machine according to claim 4 is provided with a setting value setting means that can set one of the set values ​​of multiple levels corresponding to the degree of advantage of discrimination by the discriminating means based on the fact that a predetermined setting condition is met, and the specific performance execution means is a performance that can suggest the set setting value.

[0010] The gaming machine according to claim 5 is the gaming machine according to claim 1, wherein the specific display mode includes at least a plurality of display modes including at least a first display mode that can suggest the first degree of advantage and a second display mode that can suggest the second degree of advantage, and the specific sound is constituted by an audio mode that can specify one of the multiple display modes. [Effects of the invention]

[0011] 10. The gaming machine according to claim 1, which comprises a discriminating means for performing the discrimination based on the fact that a given discrimination condition is met, a special game execution means for performing a bonus game that is advantageous to the player based on the discrimination of the discrimination means, and a display means having at least a display screen that can be viewed from the front of the gaming machine, an audio output means that can output a given sound in a predetermined direction that is difficult to directly reach to a player who is viewing the front of the gaming machine, and a specific display mode displayed on the display screen of the display means and the audio output means. 固可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可以上述可

[0012] This has the effect of improving the player's interest in playing.

[0013] According to the gaming machine according to claim 2, in addition to the effects produced by the gaming machine according to claim 1, the first specific performance and the second specific performance are configured to display a common display mode as the specific display mode.

[0014] This makes it possible to make players think more strongly about understanding the audio format when a specific performance is performed, and thus the player's interest in playing can be improved.

[0015] According to the gaming machine according to claim 3, in addition to the effects produced by the gaming machine according to claim 1, the specific performance execution means is configured to display the first display mode in the first specific performance, and to display the second display mode in the second specific performance that is different from the first display mode in the second specific performance.

[0016] This enables the player to predict the type of a specific performance from the display mode, which has the effect of improving the player's interest in the game.

[0017] According to the gaming machine according to claim 4, in addition to the effects produced by the gaming machine according to claim 1, the gaming machine according to claim 3, and the setting value setting means is provided that can set one of the set values ​​of multiple levels corresponding to the degree of advantage of discrimination by the discriminating means based on the establishment of a given setting condition, and the specific performance execution means is a performance that can suggest the set setting value.

[0018] This allows the setting value to be suggested by the specific performance, and therefore has the effect of making the game play more attention to the specific performance.

[0019] According to the gaming machine according to claim 5, in addition to the effects produced by the gaming machine according to claim 1 to 4, the specific display mode includes at least a plurality of display modes including at least a first display mode that can suggest the first degree of advantage and a second display mode that can suggest the second degree of advantage, and the specific sound is constituted by an audio mode that can specify one of the multiple display modes.

[0020] This enables the player to realize a novel gameplay that allows accurate indications to be grasped by grasping both the display mode and the audio mode, and thus the player's interest in playing can be further improved. [Brief description of the drawing]

[0021] [Figure 1] 1 is a front view of a pachinko machine in the first control example. [Figure 2] 1 is a front view of a pachinko machine game board. [Figure 3] 1 is a rear view of a pachinko machine in the first control example. [Figure 4] 1 is a front view of the gaming board of the pachinko machine in the first control example. [Figure 5] 10A is a schematic diagram showing a structure of a variable winning unit provided in the area under the front view of the game board of a pachinko machine in the first control example, and (b) is a schematic diagram showing a flow path of a ball that has been won in the variable winning unit in the first control example. [Figure 6] 10A is a diagram schematically showing area division settings and effective line settings of the display screen in the first control example, and (b) is a diagram illustrating an example of an actual display screen in the first control example. [Figure 7]10A is a diagram showing an example of a display mode when reach is established in the normal state displayed on the third pattern display device in the first control example, and (b) shows an example of a display mode during which normal pattern changes are performed in the normal state displayed on the third pattern display device in the first control example. [Figure 8] 10A is a diagram showing an example of a display mode in which a game of a popular game (a game of a game of long open) is performed during the normal state displayed on the third pattern display device in the first control example, and (b) shows an example of a display mode in which a chance zone is set during the normal state displayed on the third pattern display device in the first control example. [Figure 9] 10.

[0021] FIG. 10 (a) is a diagram showing an example of a display mode in which the third pattern is temporarily stopped during the special change effect displayed on the third pattern display device in the first control example, and (b) is a diagram showing an example of a display mode in which the third pattern is restarted in the special change effect executed when the special change effect displayed on the third pattern display device in the first control example is acquired while the special change effect displayed on the third pattern display device is acquired. [Figure 10] 10 is a diagram showing an example of a display mode when the third pattern is restarted in a special change effect executed when the special chart 2 pending ball displayed on the third pattern display device in the first control example is not acquired. [Figure 11] 1. (a) is a diagram showing an example of the display mode for the first half period of the ending period of a regular jackpot game displayed on the third pattern display device in the first control example, and (b) is a diagram showing an example of the display mode for the first half period of the ending period of a special jackpot game displayed on the third pattern display device in the first control example, and (c) is a diagram showing an example of the display mode for the second half period of the ending period of a regular jackpot game displayed on the third pattern display device in the first control example, and (d) is a diagram showing an example of the display mode for the second half period of the ending period of a special jackpot game displayed on the third pattern display device in the first control example. [Figure 12] 6A and 6B are diagrams showing an example of a display mode of a game state suggestion performance executed during the chance mode displayed on the third pattern display device in the first control example. [Figure 13] 10.sub.1 (a) is a diagram showing an example of a display mode in which the chance mode is set as the performance mode displayed on the third pattern display device in the first control example, and the normal state is set internally, and the display mode is displayed during a period other than the high-speed fluctuation period (during the normal fluctuation period), and (b) is a diagram showing an example of a display mode in which the chance mode is set as the performance mode displayed on the third pattern display device in the first control example, and the normal state is set internally, and the frame button is operated during a period other than the high-speed fluctuation period (during the normal fluctuation period). [Figure 14] 10A and 10B are diagrams showing an example of the display modes of operational performance during the high-speed fluctuation period among the chance modes displayed on the third pattern display device in the first control example, and (b) shows an example of the display modes when a frame button is operated during the high-speed fluctuation period among the chance modes displayed on the third pattern display device in the first control example. [Figure 15] 10. (a) is a diagram showing an example of a display mode in which the first special pattern change is performed during the "Super Chance Mode" displayed on the third pattern display device in the first control example, and (b) is a diagram showing an example of a display mode in which the second special pattern change is performed during the "Super Chance Mode" displayed on the third pattern display device in the first control example. [Figure 16] 10 is a timing chart showing the flow of the performance when a fluctuation pattern in which a non-reach variation effect is set as a variation effect for the third pattern in the first control example, and (b) shows the flow of the performance when a fluctuation pattern in which a reach variation effect is set as a variation effect for the third pattern in the first control example. [Figure 17] (a) is a timing chart showing the flow of the performance during the ending period for a normal jackpot in the first control example, and (b) is a timing chart showing the flow of the performance during the ending period for a special jackpot in the first control example, and (c) is a timing chart showing the flow of the performance during the event when the ball does not flow down the specific area (V gate) during the special jackpot game in the first control example. [Figure 18] (a) and (b) are timing charts showing the flow of the performance mode set after the jackpot game is completed in the first control example. [Figure 19] 6A and 6B are timing charts showing the flow of the operational performance in the chance mode in the first control example. [Figure 20] 14 is a diagram showing a game flow of a pachinko machine in the first control example. [Figure 21] 1 is a block diagram showing the electrical configuration of a pachinko machine in the first control example. [Figure 22] 1 is a diagram schematically showing the structure of various counters in the first control example. [Figure 23] 10 is a block diagram showing the configuration of the ROM of the main control device in the first control example, and (b) shows the configuration of the RAM of the main control device in the first control example. [Figure 24] 1A and 1B are diagrams schematically showing the specified contents of the first random number table set in the ROM of the main control device in the first control example, and (b) schematically shows the specified contents of the second random number table set in the ROM of the main control device in the first control example. [Figure 25] 1. (a) is a block diagram showing the configuration of the jackpot type selection table set in the ROM of the main control device in the first control example, and (b) is a diagram schematically showing the specified contents of the special chart 1 jackpot table set in the ROM of the main control device in the first control example, and (c) is a diagram schematically showing the specified contents of the special chart 2 jackpot table set in the ROM of the main control device in the first control example. [Figure 26] 10 is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the first control example, and (b) is a diagram schematically showing the specified contents of the normal table set in the ROM of the main control device in the first control example. [Figure 27] 14 is a diagram schematically showing the specified contents of the special-mode and time-saving table set in the ROM of the main control device in the first control example. [Figure 28] 10 is a block diagram showing the configuration of the ROM of the audio lamp control device in the first control example, and (b) shows the configuration of the RAM of the audio lamp control device in the first control example. [Figure 29] 10 is a diagram schematically showing the specified contents of the normal special diagram 2 performance selection table set in the ROM of the audio lamp control device in the first control example. [Figure 30] 14 is a diagram schematically showing the specified contents of the special-speed performance selection table set in the ROM of the audio lamp control device in the first control example. [Figure 31] 10A is a diagram schematically showing the specified contents of the continuous preview execution selection table set in the ROM of the audio lamp control device in the first control example, and (b) is a diagram schematically showing the specified contents of the V notification execution selection table set in the ROM of the audio lamp control device in the first control example. [Figure 32] 10 is a block diagram showing the configuration of a button operation performance selection table set in the ROM of the audio lamp control device in the first control example, and (b) is a diagram schematically showing the specified contents of the time-saving state selection table set in the ROM of the audio lamp control device in the first control example. [Figure 33] 14 is a diagram schematically showing the specified contents of the special mode state selection table set in the ROM of the audio lamp control device in the first control example. [Figure 34] 1 is a block diagram showing the electrical configuration of a display control device in the first control example. [Figure 35] 6A to 6C are explanatory diagrams for explaining images at the time of power-on in the first control example. [Figure 36] 10A is an explanatory diagram for explaining the back surface A in the first control example, and 10B is an explanatory diagram for explaining the back surfaces B to D in the first control example. [Figure 37] 1 is a diagram schematically showing an example of a display data table in the first control example. [Figure 38] 1 is a diagram schematically showing an example of a transfer data table in the first control example. [Figure 39] 14 is a diagram schematically showing an example of a drawing list in the first control example. [Figure 40] 10 is a flow chart showing timer interrupt processing executed by the MPU in the main control device in the first control example. [Figure 41] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the first control example. [Figure 42] 10 is a flow chart showing a special pattern jackpot determination process executed by the MPU within the main control device in the first control example. [Figure 43] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the first control example. [Figure 44] 10 is a flow chart showing update processing executed by the MPU in the main control device in the first control example. [Figure 45]10 is a flow chart showing a start-up winning process executed by an MPU within the main control device in the first control example. [Figure 46] 10 is a flow chart showing a preliminary process executed by an MPU within the main control device in the first control example. [Figure 47] 10 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the first control example. [Figure 48] 10 is a flow chart showing a process of passing through a through gate executed by an MPU within the main control device in the first control example. [Figure 49] 10 is a flow chart showing NMI interrupt processing executed by the MPU in the main control device in the first control example. [Figure 50] 10 is a flow chart showing the startup process executed by the MPU in the main control device in the first control example. [Figure 51] 10 is a flow chart showing main processing executed by the MPU within the main control device in the first control example. [Figure 52] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the first control example. [Figure 53] 10 is a flow chart showing a jackpot operation setting process executed by an MPU within the main control device in the first control example. [Figure 54] 10 is a flow chart showing the jackpot termination process executed by the MPU in the main control device in the first control example. [Figure 55] 10 is a flow chart showing the winning process executed by the MPU in the main control device in the first control example. [Figure 56] 10 is a flow chart showing abnormality processing executed by the MPU in the main control device in the first control example. [Figure 57] 10 is a flow chart showing the startup process executed by the MPU in the audio lamp control device in the first control example. [Figure 58] 10 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the first control example. [Figure 59] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the first control example. [Figure 60] 10 is a flow chart showing a state command reception process executed by the MPU in the audio lamp control device in the first control example. [Figure 61] 10 is a flow chart showing winning command processing executed by the MPU in the audio lamp control device in the first control example. [Figure 62] 10 is a flow chart showing a special chart winning information command process executed by the MPU in the audio lamp control device in the first control example. [Figure 63] 10 is a flow chart showing general-scale diagram-related processes executed by the MPU in the audio lamp control device in the first control example. [Figure 64] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the first control example. [Figure 65] 10 is a flow chart showing ending processes executed by the MPU in the audio lamp control device in the first control example. [Figure 66] 10 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the first control example. [Figure 67] 10 is a flow chart showing a special diagram 1 performance mode setting process executed by the MPU in the audio lamp control device in the first control example. [Figure 68] 10 is a flow chart showing a special diagram 2 performance mode setting process executed by the MPU in the audio lamp control device in the first control example. [Figure 69] 10 is a flow chart showing the performance setting process in chance mode executed by the MPU in the audio lamp control device in the first control example. [Figure 70] 10 is a flow chart showing frame button input monitoring and performance processing executed by the MPU in the audio lamp control device in the first control example. [Figure 71] 10 is a flow chart showing the main processing executed by the MPU in the display control device in the first control example. [Figure 72] 10 is a flow chart showing a boot process executed by an MPU in the display control device in the first control example. [Figure 73] 10 is a flow chart showing the command interruption process executed by the MPU in the display control device in the first control example, and (b) shows the V interruption process executed by the MPU in the display control device in the first control example. [Figure 74] 10 is a flow chart showing command determination processing executed by the MPU in the display control device in the first control example. [Figure 75] 10 is a flow chart showing the variation pattern command processing executed by the MPU in the display control device in the first control example, and (b) shows the suspension type command processing executed by the MPU in the display control device in the first control example. [Figure 76] 10 is a flow chart showing the opening command processing executed by the MPU in the display control device in the first control example, and (b) shows the round number command processing executed by the MPU in the display control device in the first control example. [Figure 77] 10 is a flow chart showing ending command processing executed by the MPU in the display control device in the first control example. [Figure 78] 10 is a flow chart showing the fluctuation stop command processing executed by the MPU in the display control device in the first control example, and (b) shows the notification command processing executed by the MPU in the display control device in the first control example. [Figure 79] 10 is a flow chart showing the back image change command processing executed by the MPU in the display control device in the first control example, and (b) shows the error command processing executed by the MPU in the display control device in the first control example. [Figure 80] 10 is a flow chart showing display setting processing executed by the MPU in the display device in the first control example. [Figure 81] 10 is a flow chart showing warning image setting processing executed by the MPU in the display control device in the first control example. [Figure 82] 10 is a flow chart showing a pointer update process executed by the MPU in the display control device in the first control example. [Figure 83] 10 is a flow chart showing the transfer setting process executed by the MPU in the display control device in the first control example, and (b) shows the resident image transfer setting process executed by the MPU in the display control device in the first control example. [Figure 84] 10 is a flow chart showing normal image transfer setting processing executed by the MPU in the display control device in the first control example. [Figure 85] 10 is a flow chart showing drawing processes executed by the MPU in the display control device in the first control example. [Figure 86] 1 is a front view of the gaming board of the pachinko machine in the second control example. [Figure 87] 10A and 10B are diagrams showing an example of a display screen displayed during a jackpot game executed based on winning a jackpot in a special pattern lottery in the second control example, and (b) shows an example of a display screen displayed on the ending screen of a jackpot game in the second control example. [Figure 88] 10A and 10B are diagrams showing an example of a display screen displayed during the chance time in the second control example, and (b) shows an example of a display screen displayed during the chance time in the second control example. [Figure 89] 10A is a diagram showing an example of a display screen displayed when the pull-back zone in the second control example is started, and (b) shows an example of a display screen displayed when a time-saving winning is achieved during the pull-back zone in the second control example. [Figure 90] 10A and 10B are diagrams showing an example of a display screen during extended time, which is executed when the long time reduction in the second control example is set, and (b) shows an example of a display screen when the number of executions of special pattern variations executed during the long time reduction in the second control example reaches 9,900. [Figure 91] 10 is a diagram showing an example of a presentation screen for preparation time executed during the time-saving state in the second control example, after the end of the chance time. [Figure 92] 10A and 10B are diagrams showing the relationship between the background type displayed in the pull-back zone in the second control example and the contents shown by each background; FIG. 10B are diagrams showing the relationship between the type of suggested mode in the pull-back mode in the second control example and the contents shown by each of the suggested mode. [Figure 93] 14 is a diagram showing a game flow in the second control example. [Figure 94] 1 is a block diagram showing the electrical configuration of a pachinko machine in the second control example. [Figure 95] 1 is a diagram schematically showing the structure of various counters in the second control example. [Figure 96]10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the second control example, and FIG. 10 is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the second control example. [Figure 97] 1A and 1B are diagrams that schematically show the specified contents of the first random number table set in the ROM of the main control device in the second control example, and (b) are diagrams that schematically show the specified contents of the second random number table set in the ROM of the main control device in the second control example, and (c) are diagrams that schematically show the specified contents of the time-saving random number table set in the ROM of the main control device in the second control example. [Figure 98] 1. (a) is a block diagram showing the configuration of the jackpot type selection table set in the ROM of the main control device in the second control example, (b) is a diagram schematically showing the specified contents of the special chart 1 jackpot table in the second control example, and (c) is a diagram schematically showing the specified contents of the special chart 2 jackpot table in the second control example. [Figure 99] 10A (a) is a diagram schematically showing the specified contents of the variation pattern selection table set in the ROM of the main control device in the second control example, and (b) is a diagram schematically showing the specified contents of the normal and second special change table in the second control example. [Figure 100] 1A and 1B are diagrams schematically showing the specified contents of the table for special mode and time-saving in the second control example, and (b) are diagrams schematically showing the specified contents of the table for selecting time-saving in the ROM of the main control device in the second control example. [Figure 101] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the second control example, and FIG. 10 is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the second control example. [Figure 102] 1 is a block diagram showing the configuration of a pull-back mode selection table set in the ROM of the audio lamp control device in the second control example. [Figure 103] 1 is a block diagram showing the structure of a suggestion mode selection table set in the ROM of the audio lamp control device in the second control example. [Figure 104] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the second control example. [Figure 105] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the second control example. [Figure 106] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the second control example. [Figure 107] 10 is a flow chart showing a special pattern variation pattern selection process executed by the MPU within the main control device in the second control example. [Figure 108] 10 is a flow chart showing update processing executed by the MPU in the main control device in the second control example. [Figure 109] 10 is a flow chart showing time-saving setting processing executed by the MPU in the main control device in the second control example. [Figure 110] 10 is a flow chart showing the start-up winning process executed by the MPU in the main control device in the second control example. [Figure 111] 10 is a flow chart showing a preliminary process executed by an MPU within the main control device in the second control example. [Figure 112] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the second control example. [Figure 113] 10 is a flow chart showing the jackpot termination process executed by the MPU in the main control device in the second control example. [Figure 114] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the second control example. [Figure 115] 10 is a flow chart showing a state command reception process executed by the MPU in the audio lamp control device in the second control example. [Figure 116] 10 is a flow chart showing normal state performance setting processing executed by the MPU in the audio lamp control device in the second control example. [Figure 117] 10 is a flow chart showing a pull-back mode setting process executed by the MPU in the audio lamp control device in the second control example. [Figure 118] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the second control example. [Figure 119] 10 is a flow chart showing a second special mode state performance setting process executed by the MPU in the audio lamp control device in the second control example. [Figure 120] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the second control example. [Figure 121] 10 is a flow chart showing a special diagram 2 performance mode setting process executed by the MPU in the audio lamp control device in the second control example. [Figure 122] 10 is a flow chart showing the performance setting process during chance time executed by the MPU in the audio lamp control device in the second control example. [Figure 123] 10 is a diagram showing an example of a variation display screen when the lottery result of the Special Drawing 1 lottery is won or a time-saving win in the normal state of the first modification of the second control example, and (b) shows an example of a display screen when the lottery result of the First Special Drawing (Special Drawing 1 lottery) is won in the normal state (low probability state of special design, low probability state of ordinary design) in the first modification of the second control example. [Figure 124] 10A and 10B are diagrams showing an example of a display screen in a time-saving state when the variation time of Special Figure 1 is set to 30 seconds in the normal state in the first modification of the second control example, and (b) shows an example of a display screen in the case where the time-saving state in the first modification of the second control example is finished. [Figure 125] 10 is a diagram showing an example of a display screen when a time-saving winning is made while being held for Special Figure 2 in the first modification of the second control example. [Figure 126] 1A and 1B are diagrams schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the first modification of the second control example, and (b) is diagrams schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the first modification of the second control example. [Figure 127] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the first modification of the second control example. [Figure 128] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the first modification of the second control example. [Figure 129] 10 is a flow chart showing a special diagram 1 performance mode setting process executed by the MPU in the audio lamp control device in the first modification of the second control example. [Figure 130] 10 is a diagram showing an example of a display screen during the chance time acquisition performance that is executed when a jackpot is awarded to a special drawing 1 lottery in a normal state in a second modification of the second control example, and (b) shows an example of a display screen during the chance time acquisition performance that is executed when a time acquisition performance that is awarded to a special drawing 1 lottery in a normal state in a second modification of the second control example. [Figure 131] 10 is a diagram showing an example of a fluctuation pattern when a jackpot is won and a time-saving winning pattern in the second modified example of the second control example. [Figure 132] 10A (a) is a diagram schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the second modification of the second control example, and (b) is a diagram schematically showing the specified contents of the jackpot table in the second modification of the second control example. [Figure 133] 14 is a diagram schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the second modification of the second control example. [Figure 134] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the second modified example of the second control example. [Figure 135] 1 is a front view of the gaming board of the pachinko machine in the third control example. [Figure 136] 1 is a partial enlarged view of the game board of the pachinko machine in the third control example. [Figure 137] 1 is a front perspective view of the V winning device in the third control example. [Figure 138] 1 is an exploded front perspective view of the V winning device in the third control example. [Figure 139] 1 is an operational view of the V winning device in the third control example seen from the rear side. [Figure 140] 10 is a schematic view of the V-winning door of the V-winning device in the third control example, in a plan view of the state in which the opening and closing door is closed, and (b) is a schematic view of the V-winning device in the third control example, in a plan view of the V-winning device in the third control example, in a plan view of the V-winning device in the third control example, in a plan view of the V-winning device in the third control example. [Figure 141] 10A is a diagram showing an example of a display screen in which a time-saving lottery result suggestion performance is performed during the change in Special Figure 1 in the third control example, and (b) shows an example of a display screen in which a time-saving lottery result suggestion is performed during the change in Special Figure 1 in the third control example. [Figure 142]10A and 10B show an example of a display screen in which time-saving non-winning is suggested during the change in Special Figure 1 in the third control example, and (b) shows an example of a jackpot winning notification screen in which a duplicate win is received in the third control example. [Figure 143] (a) is a timing chart showing an example of a notification pattern when a time-saving lottery or jackpot lottery is double-windowed in the third control example, and (b) is a timing chart showing an example of a notification pattern when a time-saving lottery or jackpot is not win in the third control example, and (c) is a timing chart showing an example of a notification pattern when a time-saving lottery or jackpot is not win in the third control example. [Figure 144] 1 is a diagram schematically showing the structure of various counters in the third control example. [Figure 145] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the third control example, and FIG. 10 is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the third control example. [Figure 146] 1. (a) is a block diagram showing the structure of the first random number table set in the ROM of the main control device in the third control example, (b) is a diagram schematically showing the specified contents of the first special symbol random number table in the third control example, and (c) is a diagram schematically showing the specified contents of the second special symbol random number table in the third control example. [Figure 147] 1. (a) is a block diagram showing the structure of the jackpot type selection table set in the ROM of the main control device in the third control example, (b) is a diagram schematically showing the specified contents of the special chart 1 jackpot type selection table in the third control example, (c) is a diagram schematically showing the specified contents of the special chart 2 jackpot type selection table in the third control example, and (d) is a diagram schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the third control example. [Figure 148] 14 is a diagram schematically showing the specified contents of a small hit type selection table set in the ROM of the main control device in the third control example. [Figure 149] 10A is a diagram schematically showing the specified contents of the variation pattern table set in the ROM of the main control device in the third control example, and (b) is a diagram schematically showing the specified contents of the normal variation pattern table in the third control example. [Figure 150] 14 is a diagram schematically showing the specified contents of the time-saving fluctuation pattern table in the third control example. [Figure 151] 10A and 10B are diagrams schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the third control example, and (b) schematically shows the specified contents of the time-saving type selection table set in the ROM of the main control device in the third control example. [Figure 152] 1 is a block diagram showing the configuration of a ROM within the voice lamp control device of a pachinko machine in the third control example, and (b) is a block diagram showing the configuration of a RAM within the voice lamp control device of a pachinko machine in the third control example. [Figure 153] 14 is a diagram schematically showing the specified contents of a lottery result notification mode selection table set in the ROM of the audio lamp control device of a pachinko machine in the third control example. [Figure 154] 14 is a diagram showing a game flow in the third control example. [Figure 155] 10 is a flow chart showing timer interrupt processing executed by the MPU in the main control device in the third control example. [Figure 156] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the third control example. [Figure 157] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the third control example. [Figure 158] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the third control example. [Figure 159] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the third control example. [Figure 160] 10 is a flow chart showing update processing executed by the MPU in the main control device in the third control example. [Figure 161] 10 is a flow chart showing a small hit start setting process executed by an MPU within the main control device in the third control example. [Figure 162] 10 is a flow chart showing a time-saving update process for small hits executed by the MPU in the main control device in the third control example. [Figure 163] 10 is a flow chart showing V inlet passing processing executed by the MPU within the main control device in the third control example. [Figure 164] 10 is a flow chart showing V-passing processing executed by the MPU within the main control device in the third control example. [Figure 165] 10 is a flow chart showing the startup process executed by the MPU in the main control device in the third control example. [Figure 166] 10 is a flow chart showing main processing executed by the MPU within the main control device in the third control example. [Figure 167] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the third control example. [Figure 168] 10 is a flow chart showing small hit control processing executed by the MPU in the main control device in the third control example. [Figure 169] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the third control example. [Figure 170] 10 is a diagram showing a modified configuration of a game board 13 included in the pachinko machine 10. FIG. [Figure 171] 1 is a front view schematically showing the game board of a pachinko machine in the fourth control example. [Figure 172] 1 is a schematic diagram schematically showing part of the contents of the ROM of the main control device in the fourth control example. [Figure 173] 1 is a schematic diagram schematically showing part of the contents of the RAM of the main control device in the fourth control example. [Figure 174] 1. (a) is a schematic diagram showing a first random number table in the fourth control example, (b) is a schematic diagram showing a second random number table in the fourth control example, (c) is a schematic diagram showing a time-saving random number table in the fourth control example, and (d) is a schematic diagram showing a small random number table in the fourth control example. [Figure 175] 10. (a) is a schematic diagram showing the contents of the jackpot type selection table in the fourth control example, and (b) is a schematic diagram showing the contents of the special diagram 1 jackpot table, which is part of the jackpot type selection table in the fourth control example. [Figure 176] 10 is a schematic diagram schematically showing the contents of a special diagram 2 jackpot table, which is part of a jackpot type selection table in the fourth control example. [Figure 177] 14 is a schematic diagram schematically showing the contents of a small hit type selection table in the fourth control example. [Figure 178] 14 is a schematic diagram schematically showing the contents of a variation pattern table in the fourth control example. [Figure 179] 14 is a schematic diagram schematically showing the contents of a normal state fluctuation pattern table, which is part of the fluctuation pattern table in the fourth control example. [Figure 180] 14 is a schematic diagram schematically showing the contents of a time-saving state fluctuation pattern table, which is part of the fluctuation pattern table in the fourth control example. [Figure 181] 10 is a schematic diagram schematically showing the contents of a time-saving winning variation state variation table, which is part of the variation pattern table in the fourth control example. [Figure 182] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the fourth control example. [Figure 183] 10 is a flow chart showing the first special pattern change start process executed by the MPU in the main control device in the fourth control example. [Figure 184] 10 is a flow chart showing the first special pattern determination process executed by the MPU within the main control device in the fourth control example. [Figure 185] 10 is a flow chart showing a special pattern variation pattern selection process executed by the MPU within the main control device in the fourth control example. [Figure 186] 10 is a flow chart showing a special diagram 1 time-saving lottery process executed by the MPU in the main control device in the fourth control example. [Figure 187] 10 is a flow chart showing game state update processing executed by the MPU in the main control device in the fourth control example. [Figure 188] 10 is a flow chart showing a process in progressing when first special pattern change is executed by the MPU in the main control device in the fourth control example. [Figure 189] 10 is a flow chart showing a first special pattern change stop process executed by the MPU within the main control device in the fourth control example. [Figure 190] 10 is a flow chart showing the forced stopping process for Special Figure 1 executed by the MPU in the main control device in the fourth control example. [Figure 191] 10 is a flow chart showing time-saving setting processing executed by the MPU within the main control device in the fourth control example. [Figure 192]10 is a flow chart showing a second special pattern change start process executed by the MPU in the main control device in the fourth control example. [Figure 193] 10 is a flow chart showing a second special pattern determination process executed by the MPU within the main control device in the fourth control example. [Figure 194] 10 is a flow chart showing a special diagram 2 time-saving lottery process executed by the MPU in the main control device in the fourth control example. [Figure 195] 10 is a flow chart showing a small win lottery process executed by an MPU within the main control device in the fourth control example. [Figure 196] 10 is a flow chart showing a second special pattern variation pattern selection process executed by the MPU within the main control device in the fourth control example. [Figure 197] 10 is a flow chart showing a process during execution of second special pattern change executed by the MPU in the main control device in the fourth control example. [Figure 198] 10 is a flow chart showing a second special pattern change stop process executed by the MPU in the main control device in the fourth control example. [Figure 199] 10 is a flow chart showing the forced stopping process for Special Diagram 2 executed by the MPU in the main control device in the fourth control example. [Figure 200] 10 is a flow chart showing a special diagram 2 small hit stop process executed by the MPU in the main control device in the fourth control example. [Figure 201] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the fourth control example. [Figure 202] 10 is a flow chart showing the jackpot termination process executed by the MPU in the main control device in the fourth control example. [Figure 203] 10 is a flow chart showing a time-saving limit update process executed by the MPU within the main control device in the fourth control example. [Figure 204] 6A and 6B are diagrams showing an example of a ceiling-reaching indication display screen displayed on the third pattern display device in the fifth control example. [Figure 205] 10A (a) is a diagram showing an example of a ceiling-reaching change-indication screen displayed on the third pattern display device in the fifth control example, and (b) is a diagram showing an example of a ceiling-reaching display screen displayed on the third pattern display device in the fifth control example. [Figure 206] 10 is a diagram showing an example of a ceiling-mounted display screen displayed on the third pattern display device in the fifth control example. [Figure 207] 10 is a transition diagram showing the flow of transition of each game state in the fifth control example. [Figure 208] 10.

[0021] FIG. 1 (a) is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the fifth control example, and FIG. 10 (b) is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the fifth control example. [Figure 209] 1. (a) is a diagram schematically showing the specified contents of the first random number table set in the ROM of the main control device in the fifth control example, and (b) is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the fifth control example, and (c) is a diagram schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the fifth control example. [Figure 210] 14 is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the fifth control example. [Figure 211] 10.

[0011] FIG. 1 (a) is a block diagram showing the configuration of a time-saving type selection table set in the ROM of the main control device in the fifth control example, FIG. 1 (b) is a diagram showing the specified contents of the time-saving winning table in the fifth control example, and FIG. 1 (c) is a diagram showing the specified contents of the ceiling table in the fifth control example. [Figure 212] 10.

[0021] FIG. 1 (a) is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the fifth control example, and FIG. 10 (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the fifth control example. [Figure 213] 10 is a diagram schematically showing the specified contents of the ceiling-reaching suggestion performance selection table set in the ROM of the audio lamp control device of a pachinko machine in the fifth control example. [Figure 214] 10 is a diagram schematically showing the specified contents of the ceiling-reaching performance selection table set in the ROM of the audio lamp control device of a pachinko machine in the fifth control example. [Figure 215] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the fifth control example. [Figure 216] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the fifth control example. [Figure 217] 10 is a flow chart showing ceiling determination processing executed by the MPU within the main control device in the fifth control example. [Figure 218] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the fifth control example. [Figure 219] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the fifth control example. [Figure 220] 10 is a flow chart showing time-saving setting processing executed by the MPU within the main control device in the fifth control example. [Figure 221] 10 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the fifth control example. [Figure 222] 10 is a flow chart showing the startup process executed by the MPU in the main control device in the fifth control example. [Figure 223] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the fifth control example. [Figure 224] 10 is a flow chart showing a state command reception process executed by the MPU in the audio lamp control device in the fifth control example. [Figure 225] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the fifth control example. [Figure 226] 10 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the fifth control example. [Figure 227] 10 is a flow chart showing performance mode setting processing executed by the MPU in the audio lamp control device in the fifth control example. [Figure 228] 10 is a flow chart showing a normal mode performance setting process executed by the MPU in the audio lamp control device in the fifth control example. [Figure 229] 10A (a) is a diagram showing an example of a game state suggestion performance screen displayed on the third pattern display device in the first modification of the fifth control example, and (b) is a diagram showing an example of a display screen after it is notified that the first time-saving state has been set in the game state suggestion performance in the first modification of the fifth control example. [Figure 230] 10A (a) is a diagram schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the first modification of the fifth control example, and (b) is a diagram schematically showing the specified contents of the time-saving winning table in the first modification of the fifth control example. [Figure 231] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the first modification of the fifth control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the first modification of the fifth control example. [Figure 232] 10 is a diagram schematically showing the specified contents of the game state suggestion performance selection table set in the ROM of the audio lamp control device of a pachinko machine in the first modification of the fifth control example. [Figure 233] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the first modification of the fifth control example. [Figure 234] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the first modification of the fifth control example. [Figure 235] 10 is a flow chart showing a normal mode performance setting process executed by an MPU in the audio lamp control device in the first modification of the fifth control example. [Figure 236] 1 is a front view schematically showing the game board of a pachinko machine in the sixth control example. [Figure 237] 10A is a diagram showing an example of a performance mode during the time-saving state B, which is set when the number of ceiling draws is reached in the sixth control example, and (b) shows an example of a performance mode when the time-saving state B is changed to the time-saving state A in the sixth control example. [Figure 238] 10 is a diagram showing an example of a performance mode when a jackpot is won during the time-saving state B in the sixth control example. [Figure 239] 10 is a diagram showing a method for transitioning between each game state in the sixth control example. [Figure 240] 1 is a block diagram showing the configuration of a ROM within the main control device of a pachinko machine in the sixth control example. [Figure 241] 1 is a block diagram showing the configuration of RAM in the main control device of a pachinko machine in the sixth control example. [Figure 242]1. (a) is a block diagram showing the configuration of the jackpot type selection table set in the ROM of the main control device in the sixth control example, (b) is a diagram schematically showing the specified contents of the special chart 1 jackpot table in the sixth control example, and (c) is a diagram schematically showing the specified contents of the special chart 2 jackpot table in the sixth control example. [Figure 243] 1A and 6C are diagrams schematically showing the specified contents of the second random number table set in the ROM of the main control device in the sixth control example, and (b) is a block diagram showing the configuration of the variation pattern table set in the ROM of the main control device in the sixth control example, and (c) is diagrams schematically showing the specified contents of the first time-saving table in the sixth control example. [Figure 244] 1. (a) is a diagram schematically showing the specified contents of the small hit random number table set in the ROM of the main control device in the sixth control example, and (b) is a diagram schematically showing the specified contents of the small hit type selection table set in the ROM of the main control device in the sixth control example, and (c) is a diagram schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the sixth control example. [Figure 245] 10A is a diagram schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the sixth control example, and (b) is a diagram schematically showing the specified contents of the variation pattern scenario table set in the ROM of the main control device in the sixth control example. [Figure 246] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the sixth control example. [Figure 247] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the sixth control example. [Figure 248] 10 is a flow chart showing the first special pattern change start process executed by the MPU in the main control device in the sixth control example. [Figure 249] 10 is a flow chart showing the first special pattern determination process executed by the MPU within the main control device in the sixth control example. [Figure 250] 10 is a flow chart showing a small win lottery process executed by an MPU within the main control device in the sixth control example. [Figure 251] 10 is a flow chart showing the first special pattern variation pattern selection process executed by the MPU within the main control device in the sixth control example. [Figure 252] 10 is a flow chart showing ceiling determination processing executed by the MPU within the main control device in the sixth control example. [Figure 253] 10 is a flow chart showing a first special pattern change stop process executed by the MPU within the main control device in the sixth control example. [Figure 254] 10 is a flow chart showing a special diagram 1 miss-off stop processing executed by the MPU in the main control device in the sixth control example. [Figure 255] 10 is a flow chart showing a second special pattern change start process executed by the MPU in the main control device in the sixth control example. [Figure 256] 10 is a flow chart showing a second special pattern determination process executed by the MPU within the main control device in the sixth control example. [Figure 257] 10 is a flow chart showing a special diagram 2 time-saving lottery process executed by the MPU in the main control device in the sixth control example. [Figure 258] 10 is a flow chart showing a second special pattern variation pattern selection process executed by the MPU within the main control device in the sixth control example. [Figure 259] 10 is a flow chart showing a second special pattern change stop process executed by the MPU within the main control device in the sixth control example. [Figure 260] 10 is a flow chart showing time-saving setting processing executed by the MPU within the main control device in the sixth control example. [Figure 261] 10 is a flow chart showing a special diagram 2 missing stop processing executed by the MPU in the main control device in the sixth control example. [Figure 262] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the sixth control example. [Figure 263] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the sixth control example. [Figure 264] 1 is a front view of the pachinko machine of the seventh control example. [Figure 265] 1 is a front view of the gaming board of the pachinko machine of the seventh control example. [Figure 266] 1 is a partial enlarged view of the gaming board of the pachinko machine of the seventh control example. [Figure 267] 1 is a front perspective view of the V-winning device of the seventh control example. [Figure 268] 1 is an exploded front perspective view of the V winning device of the seventh control example. [Figure 269] 1 is an operational view of the V-winning device of the seventh control example seen from the rear side. [Figure 270] 10 is a schematic view of the V-window of the V-window of the V-window of the V-window of the V-window of the seventh control example in plan viewed in a state in which the opening / closing door is closed, and (b) is a schematic view of the V-window of the V-window of the V-window of the seventh control example in plan viewed in plan viewed in FIG. [Figure 271] 10A is a front view of the performance button of the pachinko machine in the seventh control example, and (b) is a front view of the selection button of the pachinko machine in the seventh control example. [Figure 272] 1 is a rear view of the gaming board of the pachinko machine in the seventh control example. [Figure 273] 10A is a diagram schematically showing area division settings and effective line settings of the display screen in the seventh control example, and (b) is a diagram illustrating an example of an actual display screen in the seventh control example. [Figure 274] 10A is a diagram showing an example of a jackpot performance screen displayed on the third pattern display device in the seventh control example after winning the jackpot after winning the normal state, and (b) is a diagram showing an example of an enemy performance screen displayed on the third pattern display device in the seventh control example. [Figure 275] 10A (a) is a diagram showing an example of the screen during the interval after the second round, displayed on the third pattern display device in the seventh control example, and (b) is a diagram showing an example of the screen during the six rounds (final round) displayed on the third pattern display device in the seventh control example. [Figure 276] 10A (a) is a diagram showing an example of the third round performance screen displayed on the third pattern display device in the seventh control example, and (b) is a diagram showing an example of the display screen displayed on the third pattern display device in the seventh control example, when a button is pressed in FIG. 276(a) displayed on the third pattern display device in the seventh control example. [Figure 277] 10A (a) is a diagram showing an example of a display screen in which a button is not pressed in FIG. 276(a) displayed on the third pattern display device in the seventh control example, and (b) is a diagram showing an example of a successful revival performance screen in the six rounds (final round) displayed on the third pattern display device in the seventh control example. [Figure 278] 10A is a diagram showing an example of a display screen in the time-saving state (in a rush) displayed on the third pattern display device in the seventh control example, and (b) shows an example of a hit screen in the time-saving state (in a rush) displayed on the third pattern display device in the seventh control example. [Figure 279] 10A and 10B show an example of a small-hit game screen in a time-saving state (during rush) displayed on the third pattern display device in the seventh control example, and (b) shows an example of a display screen in the seventh control example when a V is targeted and a V is won during the first performance period. [Figure 280] 3 is a diagram showing an example of a display screen after the first performance period has passed since FIG. 279(b) displayed on the third pattern display device in the seventh control example. [Figure 281] 10A is a diagram showing an example of a display screen for the final change (off) of the time-saving state (distance) displayed on the third pattern display device in the seventh control example, and (b) shows an example of a pull-back performance screen after the time-saving state is completed, displayed on the third pattern display device in the seventh control example. [Figure 282] 10A (a) is a diagram showing an example of a pull-back performance end screen displayed on the third pattern display device in the seventh control example, and (b) is a diagram showing an example of a lash result display screen displayed on the third pattern display device in the seventh control example. [Figure 283] 10A (a) is a diagram showing an example of a NEXT performance screen (2nd round of rush jackpots) displayed on the third pattern display device in the seventh control example, and (b) is a diagram showing an example of a NEXT performance result screen (without hold consecutive or no round promotion) displayed on the third pattern display device in the seventh control example. [Figure 284] 10A (a) is a diagram showing an example of a NEXT performance result screen (with round promotion) displayed on the third pattern display device in the seventh control example, and (b) is a diagram showing an example of a NEXT performance result screen (with hold consecutive) displayed on the third pattern display device in the seventh control example. [Figure 285] 10. 10 is a diagram showing an example of a small win game screen in a holding continuous state displayed on the third pattern display device in the seventh control example, and (b) shows an example of a NEXT performance screen in a holding continuous state displayed on the third pattern display device in the seventh control example, and a diagram showing an example of a NEXT performance screen in a holding continuous state displayed on the third pattern display device in the seventh control example. [Figure 286] 10 is a diagram showing an example of a display screen when the number of display rounds exceeds MAX (9 rounds) in the continuous hold sequence displayed on the third pattern display device in the seventh control example. [Figure 287] 10A (a) is a diagram showing an example of a display screen in the standby state displayed on the third pattern display device in the seventh control example, and (b) is a diagram showing an example of a display mode selection screen displayed on the third pattern display device in the seventh control example. [Figure 288] 10.

[0021] FIG. 10A is a diagram showing an example of a stage transition performance screen during special chart changes displayed on the third pattern display device in the seventh control example, and (b) is a diagram showing an example of a stage fixed operation screen during special chart changes displayed on the third pattern display device in the seventh control example. [Figure 289] 14 is a diagram showing the game flow of a pachinko machine in the seventh control example. [Figure 290] 1 is a block diagram showing the electrical configuration of a pachinko machine in the seventh control example. [Figure 291] 1 is a diagram schematically showing the structure of various counters in the seventh control example. [Figure 292] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the seventh control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the seventh control example. [Figure 293] 1. (a) is a block diagram showing the configuration of the first random number table set in the ROM of the main control device in the seventh control example, and (b) is a diagram schematically showing the specified contents of the special symbol 1 random number table set in the ROM of the main control device in the seventh control example, and (c) is a diagram schematically showing the specified contents of the special symbol 2 random number table set in the ROM of the main control device in the seventh control example. [Figure 294] 10.

[0011] FIG. 10 is a block diagram showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the seventh control example, and FIG. 10 is a diagram showing the specified contents of the time-saving grant table set in the ROM of the main control device in the seventh control example. [Figure 295] 14 is a diagram schematically showing the specified contents of a small hit type selection table set in the ROM of the main control device in the seventh control example. [Figure 296] 10.

[0011] FIG. 10 is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the seventh control example, and FIG. 10 is a diagram schematically showing the specified contents of the normal variation pattern table set in the ROM of the main control device in the seventh control example. [Figure 297] 10.

[0011] FIG. 1 (a) is a diagram schematically showing the specified contents of the time-saving fluctuation pattern table set in the ROM of the main control device in the seventh control example, FIG. 1 (b) is a diagram schematically showing the specified contents of the special time-saving fluctuation pattern table set in the ROM of the main control device in the seventh control example, and FIG. 1 (c) is a diagram schematically showing the specified contents of the time-saving final time-saving fluctuation pattern table set in the ROM of the main control device in the seventh control example. [Figure 298] 14 is a diagram schematically showing the specified contents of a variation pattern scenario table set in the ROM of the main control device in the seventh control example. [Figure 299] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the audio lamp control device in the seventh control example, and (b) is a block diagram showing the configuration of the RAM of the audio lamp control device in the seventh control example. [Figure 300] 10A is a diagram schematically showing the specified contents of the defeat number selection table set in the ROM of the voice lamp control device in the seventh control example, and (b) is a diagram schematically showing the specified contents of the defeat performance mode selection table set in the ROM of the voice lamp control device in the seventh control example. [Figure 301] 14 is a diagram schematically showing the specified contents of the additional reduction value selection table set in the ROM of the audio lamp control device in the seventh control example. [Figure 302] 10A is a diagram schematically showing the specified contents of the performance stage data table set in the ROM of the audio lamp control device in the seventh control example, and (b) is a diagram schematically showing the specified contents of the game environment data table set in the ROM of the audio lamp control device in the seventh control example. [Figure 303] 10 is a flow chart showing timer interrupt processing executed by the MPU in the main control device in the seventh control example. [Figure 304] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the seventh control example. [Figure 305] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the seventh control example. [Figure 306] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the seventh control example. [Figure 307] 10 is a flow chart showing a small hit start setting process executed by an MPU within the main control device in the seventh control example. [Figure 308] 10 is a flow chart showing time-saving update processing executed by the MPU in the main control device in the seventh control example. [Figure 309] 10 is a flow chart showing a small-ticket time-saving update process executed by an MPU within the main control device in the seventh control example. [Figure 310] 10 is a flow chart showing the start-up winning process executed by the MPU in the main control device in the seventh control example. [Figure 311] 10 is a flow chart showing a preliminary process executed by an MPU within the main control device in the seventh control example. [Figure 312] 10 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the seventh control example. [Figure 313] 10 is a flow chart showing a process of passing through gates executed by the MPU within the main control device in the seventh control example. [Figure 314] 10 is a flow chart showing V inlet passing processing executed by the MPU within the main control device in the seventh control example. [Figure 315] 10 is a flow chart showing V-passing processing executed by the MPU within the main control device in the seventh control example. [Figure 316] 10 is a flow chart showing NMI processing executed by an MPU in the main control device in the seventh control example. [Figure 317] 10 is a flow chart showing the startup process executed by the MPU in the main control device in the seventh control example. [Figure 318] 10 is a flow chart showing main processing executed by the MPU within the main control device in the seventh control example. [Figure 319] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the seventh control example. [Figure 320] 10 is a flow chart showing small hit control processing executed by the MPU in the main control device in the seventh control example. [Figure 321] 10 is a flow chart showing the startup process executed by the MPU in the audio lamp control device in the seventh control example. [Figure 322] 10 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the seventh control example. [Figure 323] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the seventh control example. [Figure 324] 10 is a flow chart showing pending information-related processing executed by the MPU in the audio lamp control device in the seventh control example. [Figure 325] 10 is a flow chart showing status command processing executed by the MPU in the audio lamp control device in the seventh control example. [Figure 326] 10 is a flow chart showing hit-related processes executed by the MPU in the audio lamp control device in the seventh control example. [Figure 327] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the seventh control example. [Figure 328] 10 is a flow chart showing an in-round performance process executed by the MPU in the audio lamp control device in the seventh control example. [Figure 329] 10 is a flow chart showing initial jackpot related processing executed by the MPU in the audio lamp control device in the seventh control example. [Figure 330] 10 is a flow chart showing a process for determining the defeat performance mode executed by the MPU in the audio lamp control device in the seventh control example. [Figure 331] 10 is a flow chart showing the initial jackpot round performance process executed by the MPU in the audio lamp control device in the seventh control example. [Figure 332] 10 is a flow chart showing the initial interval performance process executed by the MPU in the audio lamp control device in the seventh control example. [Figure 333] 10 is a flow chart showing small hit-related processes executed by the MPU in the audio lamp control device in the seventh control example. [Figure 334] 10 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the seventh control example. [Figure 335] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the seventh control example. [Figure 336] 10 is a flow chart showing time-saving performance setting processing executed by the MPU in the audio lamp control device in the seventh control example. [Figure 337] 10 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the seventh control example. [Figure 338] 10 is a flow chart showing the update process during small-hit games executed by the MPU in the audio lamp control device in the seventh control example. [Figure 339] 10 is a flow chart showing frame button input monitoring and performance processing executed by the MPU in the audio lamp control device in the seventh control example. [Figure 340] 10 is a flow chart showing fixed mode setting processing executed by the MPU in the audio lamp control device in the seventh control example. [Figure 341] 10 is a flow chart showing the performance button operation process executed by the MPU in the audio lamp control device in the seventh control example. [Figure 342] 10. (a) is a diagram showing an example of a small win game screen (in the case of special 2 hold 0) of the hold players displayed on the third pattern display device in the eighth control example, and (b) is a diagram showing an example of a small win game screen (in the case of special 2 hold acquisition) of the hold players displayed on the third pattern display device in the eighth control example. [Figure 343] 10 is a flow chart showing time-saving update processing executed by the MPU in the main control device in the eighth control example. [Figure 344] 10 is a flow chart showing small hit control processing executed by the MPU in the main control device in the eighth control example. [Figure 345] 10 is a flow chart showing a small-ticket time-saving update process executed by an MPU within the main control device in the eighth control example. [Figure 346] 10 is a flow chart showing pending information-related processing executed by the MPU in the audio lamp control device in the eighth control example. [Figure 347] 10 is a flow chart showing a small hit and medium hold acquisition process executed by the MPU in the audio lamp control device in the eighth control example. [Figure 348] 10 is a flow chart showing small hit-related processes executed by the MPU in the audio lamp control device in the eighth control example. [Figure 349] 10 is a flow chart showing a small-stop guide mode setting process executed by the MPU in the audio lamp control device in the eighth control example. [Figure 350] 10. (a) is a diagram showing an example of a display screen in which a third special chart hold is obtained during the change in special chart 1 displayed on the third pattern display device in the ninth control example, and (b) is a diagram showing an example of a display screen in which only the third special chart hold pattern displayed on the third pattern display device in the ninth control example, the action is shifted. [Figure 351] 10. The figure (a) is a diagram showing an example of a special diagram 1 stop display screen displayed on the third pattern display device in the ninth control example, and (b) is a diagram showing an example of a special diagram 1st order change start screen displayed on the third pattern display device in the ninth control example. [Figure 352] 10.

[0021] FIG. 10A is a diagram showing an example of a hold change action display screen displayed on the third pattern display device in the ninth control example, and (b) shows an example of a hold change display screen displayed on the third pattern display device in the ninth control example, and (c) shows an example of a hold shift display screen displayed on the third pattern display device in the ninth control example. [Figure 353] 10A is a diagram showing an example of a display screen before stage change when synchronizing the hold pattern action displayed on the third pattern display device in the ninth control example, and (b) shows an example of a display screen after stage change when synchronizing the hold pattern action displayed on the third pattern display device in the ninth control example, and is an example of a display screen after stage change when synchronizing the hold pattern action displayed on the third pattern display device in the ninth control example. [Figure 354] 10.

[0011] FIG. 1 (a) is a diagram showing an example of a display screen before stage change during asynchronous pending pattern action displayed on the third pattern display device in the ninth control example, and (b) is a diagram showing an example of a display screen during stage change during asynchronous pending pattern action displayed on the third pattern display device in the ninth control example, and (c) is a diagram showing an example of a display screen after stage change during asynchronous pending pattern action displayed on the third pattern display device in the ninth control example. [Figure 355] 1 is a block diagram showing the configuration of a ROM of the audio lamp control device in the ninth control example. [Figure 356] 14 is a diagram schematically showing the specified contents of a pending action data table set in the ROM of the main control device in the ninth control example. [Figure 357] 1 is a block diagram showing the configuration of the RAM of the audio lamp control device in the ninth control example. [Figure 358] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the ninth control example. [Figure 359] 10 is a flow chart showing winning command processing executed by the MPU in the audio lamp control device in the ninth control example. [Figure 360] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the ninth control example. [Figure 361] 10 is a flow chart showing a pending mode determination process executed by the MPU in the audio lamp control device in the ninth control example. [Figure 362] 10 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the ninth control example. [Figure 363] 10 is a flow chart showing a hold-effect update process executed by the MPU in the audio lamp control device in the ninth control example. [Figure 364] 10 is a flow chart showing a fluctuating stage transition process executed by the MPU in the audio lamp control device in the ninth control example. [Figure 365] 10 is a flow chart showing a special mode determination process executed by the MPU in the audio lamp control device in the ninth control example. [Figure 366] 10 is a front view of the gaming board of the pachinko machine in the tenth control example. [Figure 367] 10 is a partial enlarged view of the gaming board of a pachinko machine in the tenth control example. [Figure 368] 1 is a front perspective view of the V winning device in the tenth control example. [Figure 369] 1 is an exploded front perspective view of the V winning device in the tenth control example. [Figure 370] 1 is an operational view of the V winning device in the tenth control example seen from the rear side. [Figure 371] 10 is a schematic view of the V-window of the V-window of the V-window of the V-window of the V-window of the 10th control example in plan viewed in a state in which the opening / closing door is closed, and (b) is a schematic view of the V-window of the V-window of the V-window of the 10th control example in plan viewed in plan view of the V-window of the V-window of the V-window of the V-window of the 10th control example in plan viewed in FIG. [Figure 372] 10 (a) is a schematic diagram showing the state in which the decorative movable object in the tenth control example is in the storage position, and (b) is a schematic diagram showing the state in which the decorative movable object in the tenth control example is at a lower limit. [Figure 373] 10. FIG. 10 (a) is a schematic diagram showing the right-centered piece of a decorative movable vehicle in the 10th control example, and FIG. 10th control example shows the right-centered piece of a decorative movable vehicle in the 10th control example, and FIG. 10th control example, and FIG. [Figure 374] 1 is an exploded front perspective view of the decorative movable vehicle in the tenth control example. [Figure 375] 1 is an exploded rear perspective view of the decorative movable vehicle in the tenth control example. [Figure 376] 1 is an exploded front perspective view of the bar function in the tenth control example. [Figure 377] 1 is an exploded rear perspective view of the bar function in the tenth control example. [Figure 378] 1 is an exploded front perspective view of a rotor body in the tenth control example. [Figure 379] 1 is an exploded rear perspective view of a rotating body function in the tenth control example. [Figure 380] 10 (a) is a diagram showing the structure of the third pattern row in the tenth control example, and (b) to (e) are diagrams schematically showing the stopping patterns of the rotating body parts in the tenth control example. [Figure 381] 10 (a) is a diagram showing an example of a display screen when the special drawing is temporarily stopped, displayed on the third pattern display device in the 10th control example, and (b) is a diagram showing an example of a display screen when the relief chance presentation is started, displayed on the third pattern display device in the 10th control example. [Figure 382] 10 (a) is a diagram showing an example of a case where the relief opportunity presentation displayed on the third pattern display device in the 10th control example is successful, and (b) is a diagram showing an example of a case where the relief chance presentation displayed on the third pattern display device in the 10th control example is failed. [Figure 383] 1 is a block diagram showing the electrical configuration of a pachinko machine in the tenth control example. [Figure 384] 10. FIG. 10 (a) is a block diagram showing the configuration of the ROM of the audio lamp control device in the 10th control example, and FIG. 10th control example is a block diagram showing the configuration of the RAM of the audio lamp control device in the 10th control example. [Figure 385] 10. FIG. 10 (a) is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the audio lamp control device in the 10th control example, and FIG. 10th control example shows the specified contents of the normal variation pattern selection table set in the ROM of the audio lamp control device in the 10th control example. [Figure 386]10. FIG. 10 (a) is a diagram schematically showing the specified contents of the time-saving fluctuation pattern selection table set in the ROM of the voice lamp control device in the 10th control example, FIG. 10th control example, FIG. 10th control example, FIG. 10th control example, and FIG. 10th control example, FIG. 10th control example, and FIG. 10th control example, FIG. 10th control example, is a diagram schematically showing the specified contents of the time-saving final time-saving fluctuation pattern selection table set in the ROM of the voice lamp control device in the 10th control example. [Figure 387] 10 is a diagram schematically showing the specified contents of the operation scenario selection table set in the ROM of the audio lamp control device in the tenth control example. [Figure 388] 10 (a) is a diagram showing the specified contents of operation scenario A (bar function up and down drive) set in the ROM of the audio lamp control device in the 10th control example, and (b) is a diagram showing the specified contents of operation scenario A (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 10th control example. [Figure 389] 10 (a) is a diagram showing the specified contents of operation scenario B (bar function up and down drive) set in the ROM of the audio lamp control device in the 10th control example, and (b) is a diagram showing the specified contents of operation scenario B (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 10th control example. [Figure 390] 10 (a) is a diagram showing the specified contents of operation scenario C (bar function up and down drive) set in the ROM of the audio lamp control device in the 10th control example, and (b) is a diagram showing the specified contents of operation scenario C (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 10th control example. [Figure 391] 10 (a) is a diagram showing the specified contents of operation scenario D (bar function up and down drive) set in the ROM of the audio lamp control device in the 10th control example, and (b) is a diagram showing the specified contents of operation scenario D (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 10th control example. [Figure 392] 10 (a) is a diagram showing the specified contents of operation scenario E (bar function up and down drive) set in the ROM of the audio lamp control device in the 10th control example, and (b) is a diagram showing the specified contents of operation scenario E (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 10th control example. [Figure 393] 10 (a) is a diagram showing the specified contents of operation scenario F (bar function up and down drive) set in the ROM of the audio lamp control device in the 10th control example, and (b) is a diagram showing the specified contents of operation scenario F (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 10th control example. [Figure 394] 10 (a) is a diagram showing the specified contents of operation scenario G (bar function up and down drive) set in the ROM of the audio lamp control device in the 10th control example, and (b) is a diagram showing the specified contents of operation scenario G (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 10th control example. [Figure 395] 10 (a) is a diagram showing the specified contents of operation scenario H (bar function up and down drive) set in the ROM of the audio lamp control device in the 10th control example, and (b) is a diagram showing the specified contents of operation scenario H (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 10th control example. [Figure 396] 10 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the tenth control example. [Figure 397] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the tenth control example. [Figure 398] 10 is a flow chart showing a design determination command process executed by the MPU in the audio lamp control device in the tenth control example. [Figure 399] 10 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the tenth control example. [Figure 400] 10 is a flow chart showing performance mode setting processing executed by the MPU in the audio lamp control device in the tenth control example. [Figure 401] 10 is a flow chart showing a me-liquid crystal performance execution management process executed by an MPU within the audio lamp control device in the tenth control example. [Figure 402] 10 is a flow chart showing the process of starting a relief opportunity performance executed by the MPU in the audio lamp control device in the tenth control example. [Figure 403] 10 is a flow chart showing a process during execution of a special scenario executed by an MPU in the audio lamp control device in the tenth control example. [Figure 404] 10 is a flow chart showing a process in which a relief opportunity presentation is being executed by the MPU in the audio lamp control device in the tenth control example. [Figure 405] 10 (a) is a diagram showing an example of a display screen at the start of relief opportunity presentation displayed on the third pattern display device in the first modification of the 10th control example, and (b) is a diagram showing an example of a display screen at the successful successful relief opportunity presentation displayed on the third pattern display device in the first modification of the 10th control example. [Figure 406] 1 is a front view of the gaming board of the pachinko machine in the 11th control example. [Figure 407] 1 is a front view of the decorative movable vehicle operating unit in the 11th control example. [Figure 408] 11 (a) is a schematic diagram of the operating unit of the logo character in the 11th control example, and (b) is a schematic diagram of the operating unit of the A logo character in the 11th control example. [Figure 409] 1 is a schematic diagram of an operating unit of a shutter function in the 11th control example. [Figure 410] 11 is a diagram showing a state in which the logo function in the 11th control example is at a lower limit. [Figure 411] 11 is a diagram showing a right-centered one-piece drop in the logo function in the 11th control example. [Figure 412] 11 is a diagram showing a state where the logo function falls to the right and left sides in the 11th control example. [Figure 413] 11 is a diagram showing a state in which the atomic object is at the elevation limit in the 11th control example. [Figure 414] 11 is a diagram showing the closed state of the shutter function in the 11th control example. [Figure 415] 11 is a diagram showing a case in which all the decorative movable elements in the 11th control example are in a movable state. [Figure 416] 1 is an exploded front perspective view of the logo function in the 11th control example. [Figure 417] 1 is an exploded rear perspective view of the logo function in the 11th control example. [Figure 418] 1 is an exploded front perspective view of the bar function in the 11th control example. [Figure 419] 1 is an exploded rear perspective view of the bar function in the 11th control example. [Figure 420] 1 is an exploded front perspective view of a rotor body in the 11th control example. [Figure 421] 1 is an exploded rear perspective view of a rotor body in the 11th control example. [Figure 422] 1 is an exploded front perspective view of the operating unit of the atomic object in the 11th control example. [Figure 423] 1 is an exploded rear perspective view of the operating unit of the atomic object in the 11th control example. [Figure 424] 1 is an exploded front perspective view of the rising role in the 11th control example. [Figure 425] 1 is an exploded rear perspective view of the rising body in the 11th control example. [Figure 426] 1 is an exploded front perspective view of the operating unit of the shutter function in the 11th control example. [Figure 427] 1 is an exploded front perspective view of the shutter function in the 11th control example. [Figure 428] 1 is an exploded rear perspective view of the shutter function in the 11th control example. [Figure 429] 11th control example (a) shows an example of a display screen after 3 seconds has elapsed since the start of the composite performance of the normal pattern displayed on the third pattern display device in the 11th control example, and (b) shows an example of a display screen after 5 seconds has elapsed since the start of the composite performance of the normal pattern displayed on the third pattern display device in the 11th control example. [Figure 430] 11th control example (a) shows an example of a display screen after 7 seconds have passed since the start of the composite performance of the normal pattern displayed on the third pattern display device in the 11th control example, and (b) shows an example of a display screen after 3 seconds have passed since the start of the performance when the composite performance is started during the reach performance displayed on the third pattern display device in the 11th control example. [Figure 431] 11th control example (a) shows an example of a display screen after 5 seconds has passed since the start of the compound performance of the alternative pattern 1 displayed on the third pattern display device in the 11th control example, and (b) shows an example of a display screen after 7 seconds has passed since the start of the compound performance of the alternative pattern 1 displayed on the third pattern display device in the 11th control example. [Figure 432] 11th control example (a) shows an example of a display screen after 3 seconds has elapsed since the start of the compound performance of the alternative pattern 2 displayed on the third pattern display device in the 11th control example, and (b) shows an example of a display screen after 5 seconds has elapsed since the start of the compound performance of the alternative pattern 2 displayed on the third pattern display device in the 11th control example. [Figure 433]11 is a diagram showing an example of a display screen after 7 seconds have passed since the start of the composite performance of the alternative pattern 2 displayed on the third pattern display device in the 11th control example. [Figure 434] 11 is a timing chart when a complex performance is performed during the pre-reach performance period in the 11th control example. [Figure 435] 11 is a timing chart when a compound performance of alternative pattern 1 is performed during the reach performance period in the 11th control example. [Figure 436] 11 is a timing chart when a compound performance of alternative pattern 2 is performed during the reach performance period in the 11th control example. [Figure 437] 1 is a block diagram showing the electrical configuration of a pachinko machine in the 11th control example. [Figure 438] 11. FIG. 10A is a block diagram showing the configuration of the ROM of the main control device in the 11th control example, and FIG. 10B is a block diagram showing the configuration of the RAM of the main control device in the 11th control example. [Figure 439] 11. FIG. 10A is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the audio lamp control device in the 11th control example, and FIG. 10B is a diagram schematically showing the specified contents of the normal variation pattern selection table set in the ROM of the audio lamp control device in the 11th control example. [Figure 440] 11. FIG. 1A is a diagram schematically showing the specified contents of the time-saving fluctuation pattern selection table set in the ROM of the voice lamp control device in the 11th control example, FIG. 1B is a diagram schematically showing the specified contents of the special time-saving fluctuation pattern selection table set in the ROM of the voice lamp control device in the 11th control example, and FIG. 1B is a diagram schematically showing the specified contents of the time-saving final time-saving fluctuation pattern selection table set in the ROM of the voice lamp control device in the 11th control example. [Figure 441] 11. FIG. 10A is a diagram showing the specified contents of the combined performance operation scenario table (bar function up and down drive) set in the ROM of the audio lamp control device in the 11th control example, and FIG. 10B is a diagram showing the specified contents of the combined performance operation scenario table (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 11th control example. [Figure 442] 11. (a) is a diagram showing the specified contents of the composite performance operation scenario table (a-bearing up and down drive) set in the ROM of the audio lamp control device in the 11th control example, and (b) is a diagram showing the specified contents of the composite performance operation scenario table (a-bearing left and right drive) set in the ROM of the audio lamp control device in the 11th control example. [Figure 443] 11. FIG. 10A is a diagram showing the specified contents of the first alternative operation scenario table (bar function up and down drive) set in the ROM of the audio lamp control device in the 11th control example, and FIG. 10B is a diagram showing the specified contents of the first alternative operation scenario table (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 11th control example. [Figure 444] 11. FIG. 11. A diagram showing the specified contents of the first alternative performance operation scenario table (a-bearing up and down drive) set in the ROM of the audio lamp control device in the 11th control example, and FIG. 11th control example is a diagram showing the specified contents of the first alternative operation scenario table (a-bearing left and right drive) set in the ROM of the audio lamp control device in the 11th control example. [Figure 445] 11. FIG. 10A is a diagram showing the specified contents of the second alternative operation scenario table (bar function up and down drive) set in the ROM of the audio lamp control device in the 11th control example, and FIG. 10B is a diagram showing the specified contents of the second alternative operation scenario table (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 11th control example. [Figure 446] 11. FIG. 11. is a diagram showing the specified contents of the second alternative performance operation scenario table (a-bearing up and down drive) set in the ROM of the audio lamp control device in the 11th control example, and (b) schematically shows the specified contents of the second alternative operation scenario table (shuttering left and right drive) set in the ROM of the audio lamp control device in the 11th control example. [Figure 447] 11 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the 11th control example. [Figure 448] 11 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the 11th control example. [Figure 449] 11 is a flow chart showing performance mode setting processing executed by the MPU in the audio lamp control device in the 11th control example. [Figure 450] 11 is a flow chart showing a me-liquid crystal performance execution management process executed by an MPU within the audio lamp control device in the 11th control example. [Figure 451] 11 is a flow chart showing a composite performance start process executed by the MPU in the audio lamp control device in the 11th control example. [Figure 452] 10 is a flow chart showing first operational processing executed by the MPU in the audio lamp control device in the 11th control example. [Figure 453] 10 is a flow chart showing second operation processing executed by the MPU in the audio lamp control device in the 11th control example. [Figure 454] 11 is a flow chart showing the movable role processing executed by the MPU in the audio lamp control device in the 11th control example. [Figure 455] 11 (a) is a diagram showing an example of a combined performance of a geisha performance and a character role executed by the third design display device in the first modification of the 11th control example, and (b) is a diagram showing an example of a display screen during the geisha performance displayed on the third design display device in the first modification of the 11th control example. [Figure 456] 11 (a) is a diagram showing a case in which the character role in the first modification of the 11th control example is movable, and (b) is a diagram showing a case in which the character role in the first modification of the 11th control example is movable. [Figure 457] 11. FIG. 11. A diagram showing an example of a composite performance in which the character role is placed on the front side of the key role displayed on the third pattern display device in the first modification of the 11th control example, and FIG. 11. A diagram showing an example of a composite performance in which the character role is placed on the back side of the key role displayed on the third pattern display device in the first modification of the 11th control example. [Figure 458] 1 is a block diagram showing the configuration of a ROM of the main control device in the 12th control example. [Figure 459] 1 is a block diagram showing the configuration of the RAM of the main control device in the 12th control example. [Figure 460] 12 (a) is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the 12th control example, and (b) is a diagram schematically showing the specified contents of the normal variation pattern 1 table set in the ROM of the main control device in the 12th control example. [Figure 461] 12 (a) is a diagram schematically showing the specified contents of the normal variation pattern 2 table set in the ROM of the main control device in the 12th control example, and (b) is a diagram schematically showing the specified contents of the normal variation pattern 3 table set in the ROM of the main control device in the 12th control example. [Figure 462] 12 (a) is a diagram schematically showing the specified contents of the time-saving variation pattern 1 table set in the ROM of the main control device in the 12th control example, and (b) is a diagram schematically showing the specified contents of the time-saving variation pattern 2 table set in the ROM of the main control device in the 12th control example. [Figure 463] 12 is a diagram schematically showing the specified contents of the time-saving variation pattern 3 table set in the ROM of the main control device in the 12th control example. [Figure 464] 12. FIG. 12 is a block diagram showing the configuration of a state transition table set in the ROM of the main control device in the 12th control example, FIG. 12th control example, FIG. 12th control example, FIG. 12th control example, FIG. 12th control example, FIG. 12th control example, FIG. 12th control example, FIG. 12th control example, FIG. 12th control example, FIG. 12th control example, FIG. 12th control example, is a diagram showing the configuration of a state transition table set in the ROM of the main control device in the 12th control example, and FIG. 12th control example, FIG. 12th control example, FIG. 12th control example, FIG. [Figure 465] 12. FIG. 12 (a) is a diagram schematically showing the specified contents of the state transition 4 table set in the ROM of the main control device in the 12th control example, and FIG. 12th control example, FIG. 12th control example, is a diagram schematically showing the specified contents of the state transition 5 table set in the ROM of the main control device in the 12th control example, and FIG. 12th control example, and FIG. 12th control example, is a diagram schematically showing the specified contents of the state transition 6 table set in the ROM of the main control device in the 12th control example. [Figure 466] 12 is a diagram schematically showing the specified contents of the jackpot transition setting table set in the ROM of the main control device in the 12th control example. [Figure 467] 12 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 12th control example. [Figure 468] 12 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the 12th control example. [Figure 469] 12 is a flow chart showing a process for subtracting the number of variations executed by the MPU in the main control device in the 12th control example. [Figure 470]13 (a) is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the 13th control example, and (b) is a diagram schematically showing the specified contents of the normal main variation pattern table set in the ROM of the main control device in the 13th control example. [Figure 471] 13 (a) is a diagram schematically showing the specified contents of the time-saving main fluctuation pattern table set in the ROM of the main control device in the 13th control example, and (b) is a diagram schematically showing the specified contents of the normal-saving main fluctuation pattern table set in the ROM of the main control device in the 13th control example. [Figure 472] 13 is a block diagram showing the configuration of the RAM of the main control device in the 13th control example. [Figure 473] 13 is a block diagram showing the configuration of a variation time counter set in the RAM of the main control device in the 13th control example. [Figure 474] 12 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 13th control example. [Figure 475] 14 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the 13th control example. [Figure 476] 12 is a flow chart showing a variation time update process executed by the MPU in the main control device in the 13th control example. [Figure 477] 14th control example (a) shows an example of a display screen during the third pattern change displayed on the third pattern display device in the 14th control example, and (b) shows an example of a display screen when the delayed performance is started, displayed on the third pattern display device in the 14th control example. [Figure 478] 14th control example (a) shows an example of a display screen for the expansion performance displayed on the third pattern display device in the 14th control example, and (b) shows an example of a display screen for the horizontal rotation performance displayed on the third pattern display device in the 14th control example. [Figure 479] 14 is a block diagram showing the configuration of a ROM of the audio lamp control device in the 14th control example. [Figure 480] 14 is a diagram schematically showing the specified contents of the chance mode selection table set in the ROM of the audio lamp control device in the 14th control example. [Figure 481] 14 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 14th control example. [Figure 482] 14 is a flow chart showing normal performance setting processing executed by the MPU in the audio lamp control device in the 14th control example. [Figure 483] 14 is a flow chart showing variation pattern command processing executed by the MPU in the audio lamp control device in the 14th control example. [Figure 484] 14 is an explanatory diagram showing the structure of a box pattern displayed on the third pattern display device in the 14th control example. [Figure 485] 14 (a) is a diagram showing the correspondence between box patterns and numerical patterns in the 14th control example, and (b) is a diagram showing the numerical pattern sequence display pattern in the 14th control example. [Figure 486] 6A to 6B are diagrams showing examples of pattern data set in the numerical pattern sequence in the 14th control example. [Figure 487] 14th control example (a) shows an example of a display screen when a missed pattern is stopped, displayed on the third pattern display device in the 14th control example, and (b) shows an example of a display screen for the horizontal rotation effect displayed on the third pattern display device in the 14th control example. [Figure 488] 14 is a diagram showing an example of the ending screen of a jackpot game displayed on the third pattern display device in the 14th control example. [Figure 489] 14 is a front view of the gaming board of the pachinko machine of the 15th control example. [Figure 490] 15 (a) is a diagram showing an example of the performance mode when a time-saving pattern winning occurs in the normal state of the 15th control example, and (b) is a diagram showing an example of the performance mode for the chance-time standby performance that is executed during the period from when the second time-saving pattern in the 15th control example is shifted to when the hold ball of the first special pattern is extracted. [Figure 491] 15 (a) is a diagram showing an example of a performance mode when 10 times of time savings are notified in the chance time waiting performance of the 15th control example, and (b) is a diagram showing an example of a performance mode when a hold ball with the first special pattern is selected as a big jackpot during the execution period of the chance time waiting performance of the 15th control example. [Figure 492] 15 (a) is a diagram showing an example of the performance mode of the variable display performance when winning a normal map B during the chance time in the 15th control example, and (b) is a diagram showing an example of the performance mode of the first suggestive display performance that is executed during a normal map win game when winning a normal map B during the chance time in the 15th control example. [Figure 493] 6A and 6B are diagrams showing an example of the performance mode of the variable display performance corresponding to the second special pattern in the 15th control example. [Figure 494] 15 (a) is a diagram showing an example of the performance mode of the second suggestion performance performed during the small hit game of the second special pattern in the 15th control example, and (b) is a diagram showing an example of the performance mode set during the lash state in the 15th control example. [Figure 495] 6A and 6B are diagrams showing an example of the performance mode when the through gate passes during the lash state in the 15th control example. [Figure 496] 14 is a diagram showing the progression of performance modes before and after chance times in the 15th control example. [Figure 497] 6A and 6B are diagrams showing the correspondence between the state of the special pattern during the chance time in the 15th control example and the state of the ordinary pattern. [Figure 498] 14 is a diagram showing a method for transitioning between the game states in the 15th control example. [Figure 499] 15 (a) is a block diagram showing the configuration of the ROM of the main control device in the 15th control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 15th control example. [Figure 500] 15 (a) is a diagram schematically showing the specified contents of the special pattern 1 random number table in the 15th control example, (b) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the 15th control example, and (c) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 15th control example. [Figure 501] 15 (a) is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the 15th control example, and (b) is a block diagram showing the configuration of the variation pattern selection table set in the ROM of the main control device in the 15th control example, and (c) is a diagram schematically showing the specified contents of the normal table in the 15th control example. [Figure 502] 15 (a) is a diagram schematically showing the specified contents of the time-saving table in the 15th control example, and (b) is a diagram schematically showing the specified contents of the time-saving table in the 15th control example. [Figure 503] 15 (a) is a diagram schematically showing the specified contents of the small-jack type selection table set in the ROM of the main control device in the 15th control example, and (b) is a diagram schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the 15th control example, and (c) is a diagram schematically showing the specified contents of the ordinary-jack type selection table set in the ROM of the main control device in the 15th control example. [Figure 504] 15 (a) is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 15th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 15th control example. [Figure 505] 14 is a diagram schematically showing the specified contents of the standby performance selection table set in the ROM of the audio lamp control device of a pachinko machine in the 15th control example. [Figure 506] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 15th control example. [Figure 507] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the 15th control example. [Figure 508] 10 is a flow chart showing the missed processing executed by the MPU in the main control device in the 15th control example. [Figure 509] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the 15th control example. [Figure 510] 10 is a flow chart showing the missed type determination process executed by the MPU within the main control device in the 15th example of control. [Figure 511] 10 is a flow chart showing time-saving update processing executed by the MPU in the main control device in the 15th example of control. [Figure 512] 10 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the 15th control example. [Figure 513] 15 (a) is a flow chart showing the normal chart-on processing executed by the MPU in the main control device in the 15th control example, and (b) is a flow chart showing the third termination condition determination processing executed by the MPU in the main control device in the 15th control example. [Figure 514]10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 15th control example. [Figure 515] 10 is a flow chart showing status command processing executed by the MPU in the audio lamp control device in the 15th control example. [Figure 516] 10 is a flow chart showing a standby performance setting process executed by the MPU in the audio lamp control device in the 15th control example. [Figure 517] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the 15th control example. [Figure 518] 10 is a flow chart showing small hit-related processes executed by the MPU in the audio lamp control device in the 15th control example. [Figure 519] 10 is a flow chart showing a command processing per-unit diagram executed by an MPU in the audio lamp control device in the 15th control example. [Figure 520] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 15th control example. [Figure 521] 10 is a flow chart showing the performance setting process during chance time executed by the MPU in the audio lamp control device in the 15th control example. [Figure 522] 10 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the 15th control example. [Figure 523] 11 is a front view of the gaming board of the pachinko machine of the 16th control example. [Figure 524] 16th control example shows an example of the performance mode when the 16th control example moves to the time-saving state A, and (b) shows an example of the performance mode when the first change display of the second special pattern is started in the time-saving state A. [Figure 525] 16th control example shows an example of a performance mode in which, after the first hit in the 16th control example, the set number of hold balls for the second special symbol is accumulated and the time-saving end condition is satisfied, and (b) shows an example of a performance mode in which the second special symbol is displayed for the first time after the time-saving state B is set in the 16th control example. [Figure 526] 16th control example (a) shows an example of the performance mode when the MAX bonus is won in the 16th control example, and (b) shows an example of the performance mode for the simulated interval performance executed during the time-saving state C in the 16th control example. [Figure 527] 11 is a diagram showing the correspondence between the progression of the performance mode after the first hit in the 16th control example and the state of the second special pattern. [Figure 528] 16 is a diagram showing the progression of the performance mode from when the time-saving limit count is reached and when the 16th control example is switched to MAX bonus mode, when the time-saving limit count is reached and the normal mode B is switched to Normal mode B. FIG. [Figure 529] 16 is a diagram showing a method for transitioning between the game states in the 16th control example. [Figure 530] 16 (a) is a block diagram showing the configuration of the ROM of the main control device in the 16th control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 16th control example. [Figure 531] 16 (a) is a diagram schematically showing the specified contents of the special pattern 1 random number table in the 16th control example, (b) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the 16th control example, and (c) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 16th control example. [Figure 532] 16 (a) is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the 16th control example, and (b) is a block diagram showing the configuration of the variation pattern selection table set in the ROM of the main control device in the 16th control example, and (c) is a diagram schematically showing the specified contents of the normal table in the 16th control example. [Figure 533] 16 (a) is a diagram schematically showing the specified contents of the time-saving table in the 16th control example, and (b) is a diagram schematically showing the specified contents of the MAX bonus table in the 16th control example. [Figure 534] 16 (a) is a diagram schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the 16th control example, and (b) is a diagram schematically showing the specified contents of the small-hat type selection table set in the ROM of the main control device in the 16th control example. [Figure 535] 16 (a) is a block diagram showing the configuration of a ROM within the audio lamp control device of a pachinko machine in the 16th control example, and (b) is a diagram schematically showing the specified contents of the attack icon selection table set in the ROM of the audio lamp control device of a pachinko machine in the 16th control example. [Figure 536] 16 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 16th control example. [Figure 537] 11 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the 16th control example. [Figure 538] 11 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the 16th control example. [Figure 539] 11 is a flow chart showing time-saving update processing executed by the MPU in the main control device in the 16th control example. [Figure 540] 11 is a flow chart showing a small-ticket time-saving update process executed by an MPU within the main control device in the 16th control example. [Figure 541] 11 is a flow chart showing the start-up winning process executed by the MPU in the main control device in the 16th control example. [Figure 542] 11 is a flow chart showing a processing for determining the number of pending balls executed by the MPU in the main control device in the 16th control example. [Figure 543] 11 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the 16th control example. [Figure 544] 11 is a flow chart showing V-passing processing executed by the MPU within the main control device in the 16th control example. [Figure 545] 11 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the 16th control example. [Figure 546] 11 is a flow chart showing the jackpot end processing executed by the MPU in the main control device in the 16th control example. [Figure 547] 11 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 16th control example. [Figure 548] 11 is a flow chart showing winning information command processing executed by the MPU in the audio lamp control device in the 16th control example. [Figure 549] 11 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the 16th control example. [Figure 550] 11 is a flow chart showing ending command processing executed by the MPU in the audio lamp control device in the 16th control example. [Figure 551] 11 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 16th control example. [Figure 552] 10 is a diagram showing a method for transitioning between game states in the first modification of the 16th control example. [Figure 553] 1 is a block diagram showing the configuration of the RAM of the main control device in the first modification of the 16th control example. [Figure 554] 16 (a) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the first modification of the 16th control example, and (b) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the first modification of the 16th control example. [Figure 555] 10A and 10B are diagrams schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the first modification of the 16th control example. [Figure 556] 16 (a) and (b) are diagrams showing an example of the performance mode in which the second modification of the 16th control example is shifted to the time-saving state A after the first hit. [Figure 557] 16th control example (a) shows an example of the performance mode when the time-saving mode or pull-back mode is switched in the second modification of the 16th control example, and (b) shows an example of the performance mode when the hit-variation performance is performed in the time-saving state C just before the time-saving limit count is reached after the time-saving mode is switched to the MAX bonus mode in the second modification of the 16th control example. [Figure 558] 11 is a diagram showing correspondence between displaying variations of the ordinary pattern, winning games for ordinary patterns, and displaying variations of special patterns in the second modification of the 16th control example during the time-saving state. [Figure 559] 11 is a diagram showing a method for transitioning between the game states in the second modification of the 16th control example. [Figure 560] 16 (a) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the second modification of the 16th control example, and (b) is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the second modification of the 16th control example. [Figure 561]14 is a diagram schematically showing the specified contents of the normal table in the second modification of the 16th control example. [Figure 562] 16 (a) is a diagram schematically showing the specified contents of the time-saving table in the second modification of the 16th control example, and (b) is a diagram schematically showing the specified contents of the MAX bonus table in the second modification of the 16th control example. [Figure 563] 14 is a diagram schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the second modification of the 16th control example. [Figure 564] 11 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the second modification of the 16th control example. [Figure 565] 11 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the second modification of the 16th control example. [Figure 566] 12 is a flow chart showing the missed processing executed by the MPU in the main control device in the second modification of the 16th control example. [Figure 567] 11 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the second modification of the 16th control example. [Figure 568] 11 is a flow chart showing the miss-time type determination process executed by the MPU within the main control device in the second modification of the 16th control example. [Figure 569] 10 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the second modification of the 16th control example. [Figure 570] 11 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the second modification of the 16th control example. [Figure 571] 11 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the second modification of the 16th control example. [Figure 572] 17 (a) and 17 (b) are diagrams showing an example of the performance mode of the remaining stock performance performed in a jackpot game other than the first hit in the 17th example. [Figure 573] 17th control example shows an example of the performance mode at the time when a lash is started in the 17th control example, and (b) shows an example of the performance mode at the time when a reach occurs in the 17th control example. [Figure 574] 17th control example shows an example of the performance mode in which a non-V small win is selected during the lashing of the 17th control example, and (b) shows an example of the performance mode in which a non-V small win is selected during the lashing of the 17th control example, when the remaining portions corresponding to all non-V small wins become zero. [Figure 575] 6A and 6B are diagrams showing an example of the performance mode of the remaining recovery performance that is executed when the remaining increase condition is satisfied during the lashing of the 17th control example. [Figure 576] 17th control example shows an example of the performance mode during which the retained hold of Special Figure 2 after the rush is completed in the 17th control example, and (b) shows an example of the performance mode when a hold hold has been acquired after the start of the final time-saving fluctuation in the 17th control example. [Figure 577] 14 is a diagram showing an example of a performance mode during the invincible mode in the 17th control example. [Figure 578] 11 is a diagram showing a method for transitioning between the game states in the 17th control example. [Figure 579] 17 (a) is a block diagram showing the configuration of the ROM of the main control device in the 17th control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 17th control example. [Figure 580] 17 (a) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the 17th control example, and (b) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 17th control example. [Figure 581] 17 (a) is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the 17th control example, and (b) is a diagram schematically showing the specified contents of the normal table in the 17th control example. [Figure 582] 17 (a) is a diagram schematically showing the specified contents of the time-saving table in the 17th control example, and (b) is a diagram schematically showing the specified contents of the time-saving final fluctuation table in the 17th control example. [Figure 583] 14 is a diagram schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the 17th control example. [Figure 584] 14 is a diagram schematically showing the specified contents of a small hit type selection table set in the ROM of the main control device in the 17th control example. [Figure 585] 10 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 17th control example. [Figure 586] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the seventeenth control example. [Figure 587] 10 is a flow chart showing time-saving update processing executed by the MPU in the main control device in the 17th example of control. [Figure 588] 10 is a flow chart showing ceiling determination processing executed by the MPU within the main control device in the 17th control example. [Figure 589] 10 is a flow chart showing a small-ticket time-saving update process executed by an MPU within the main control device in the 17th example of control. [Figure 590] 11 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 17th control example. [Figure 591] 10 is a flow chart showing time-saving performance setting processing executed by the MPU in the audio lamp control device in the 17th example of control. [Figure 592] 10 is a flow chart showing non-V small hit processing executed by the MPU in the audio lamp control device in the 17th example of control. [Figure 593] 11 is a front view of the gaming board of the pachinko machine of the 18th control example. [Figure 594] 18th control example (a) shows an example of a performance screen in the advantageous mode displayed on the third pattern display device in the 18th control example, and (b) shows an example of a performance screen in the unfavorable mode displayed on the third pattern display device in the 18th control example. [Figure 595] 18th control example shows an example of a performance screen when a time-saving A (10 times of minor time-saving) is won during the normal mode displayed on the third pattern display device in the 18th control example, and (b) is an example of a performance screen when a time-saving A (10 times of minor time-saving) is won during the advantageous mode (30 times of remaining time-saving) is displayed on the third pattern display device in the 18th control example. [Figure 596] 18th control example shows an example of a performance screen when a time-saving B (time-saving) is selected during the normal mode displayed on the third pattern display device in the 18th control example, and (b) is an example of a performance screen when a time-saving B (time-saving) is selected during the advantageous mode displayed on the third pattern display device in the 18th control example. [Figure 597] 18 (a) and 18 (b) are diagrams showing an example of the performance during the remaining reserved period after the time-saving pattern is stopped, displayed on the third pattern display device in the 18th control example. [Figure 598] 18th control example (a) shows an example of a performance screen during the time-saving display device displayed on the third pattern display device in the 18th control example, and (b) shows an example of a performance screen when a small win is won while the time-saving display device is displayed on the third pattern display device in the 18th control example. [Figure 599] 18th control example (a) shows an example of a performance screen during ceiling reaching fluctuations in the normal mode displayed on the third pattern display device in the 18th control example, and (b) shows an example of a performance screen during ceiling reaching fluctuations in the advantageous mode displayed on the third pattern display device in the 18th control example. [Figure 600] 11 is a diagram showing a method for transitioning between the game states in the 18th control example. [Figure 601] 18th control example (a) is a block diagram showing the configuration of the ROM of the main control device in the 18th control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 18th control example. [Figure 602] 18th control example (a) is a diagram schematically showing the specified contents of the special pattern 1 random number table in the 18th control example, (b) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the 18th control example, and (c) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 18th control example. [Figure 603] 18 (a) is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the 18th control example, and (b) is a diagram schematically showing the specified contents of the normal table in the 18th control example. [Figure 604] 14 is a diagram schematically showing the specified contents of the time-saving table in the 18th control example. [Figure 605] 14 is a diagram schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the 18th control example. [Figure 606]18 (a) is a diagram schematically showing the specified contents of the small-shot type selection table set in the ROM of the main control device in the 18th control example, and (b) is a diagram schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the 18th control example. [Figure 607] 18th control example (a) is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 18th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 18th control example. [Figure 608] 11 is a diagram schematically showing the specified contents of the background mode selection table set in the ROM of the audio lamp control device of a pachinko machine in the 18th control example. [Figure 609] 18 is a diagram schematically showing the specified contents of the performance pattern selection table set in the ROM of the audio lamp control device of a pachinko machine in the 18th control example. [Figure 610] 11 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 18th control example. [Figure 611] 11 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the 18th control example. [Figure 612] 11 is a flow chart showing the missed processing executed by the MPU in the main control device in the 18th control example. [Figure 613] 11 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the 18th control example. [Figure 614] 11 is a flow chart showing the missed type determination process executed by the MPU within the main control device in the 18th control example. [Figure 615] 11 is a flow chart showing time-saving update processing executed by the MPU in the main control device in the 18th control example. [Figure 616] 11 is a flow chart showing ceiling update processing executed by the MPU in the main control device in the 18th control example. [Figure 617] 11 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 18th control example. [Figure 618] 11 is a flow chart showing status command processing executed by the MPU in the audio lamp control device in the 18th control example. [Figure 619] 11 is a flow chart showing a standby performance setting process executed by the MPU in the audio lamp control device in the 18th control example. [Figure 620] 11 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 18th control example. [Figure 621] 11 is a flow chart showing the time-saving pattern winning performance setting process executed by the MPU in the audio lamp control device in the 18th control example. [Figure 622] 11 is a flow chart showing the time-saving pattern determination process for performance executed by the MPU in the audio lamp control device in the 18th control example. [Figure 623] 11 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the 18th control example. [Figure 624] 11 is a front view of the gaming board of the pachinko machine of the 19th control example. [Figure 625] 19th control example (a) shows an example of a time-saving, per-time fluctuation screen displayed on the third pattern display device in the 19th control example, and (b) shows an example of a time-saving, per-time fluctuation screen displayed on the third pattern display device in the 19th control example, and a time-saving, per-time fluctuation screen displayed on the third pattern display device in the 19th control example. [Figure 626] 19th control example (a) shows an example of a performance screen during the simulated left-handed play displayed on the third pattern display device in the 19th control example (difference chart 2 is changing), and (b) shows an example of a performance screen indicating that the time-saving state has ended during the simulated left-handed play displayed on the third pattern display device in the 19th control example. [Figure 627] 10 is a block diagram showing the configuration of a ROM of the main control device in the 19th control example. [Figure 628] 10 is a block diagram showing the configuration of the RAM of the main control device in the 19th control example. [Figure 629] 10 is a block diagram showing the structure of a variation pattern selection table set in the ROM of the main control device in the 19th control example. [Figure 630] 11 is a diagram schematically showing the specified contents of the normal state fluctuation pattern table in the 19th control example. [Figure 631] 10 is a diagram schematically showing the specified contents of the time-saving state fluctuation pattern table in the 19th control example. [Figure 632] 10 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 19th control example. [Figure 633] 11 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 19th control example. [Figure 634] 10 is a flow chart showing the first special pattern change start process executed by the MPU in the main control device in the 19th control example. [Figure 635] 10 is a flow chart showing the first special pattern determination process executed by the MPU within the main control device in the 19th control example. [Figure 636] 10 is a flow chart showing the first special pattern variation pattern selection process executed by the MPU within the main control device in the 19th control example. [Figure 637] 10 is a flow chart showing a special diagram 1 time-saving lottery process executed by an MPU within the main control device in the 19th control example. [Figure 638] 11 is a flow chart showing game state update processing executed by the MPU in the main control device in the 19th control example. [Figure 639] 10 is a flow chart showing a process during execution of first special pattern change executed by the MPU in the main control device in the 19th control example. [Figure 640] 10 is a flow chart showing the first special pattern change stop processing executed by the MPU in the main control device in the 19th control example. [Figure 641] 10 is a flow chart showing the forced stopping process for Special Figure 1 executed by the MPU in the main control device in the 19th control example. [Figure 642] 11 is a flow chart showing time-saving setting processing executed by the MPU within the main control device in the 19th control example. [Figure 643] 11 is a flow chart showing a second special pattern change start process executed by the MPU within the main control device in the 19th control example. [Figure 644] 11 is a flow chart showing a second special pattern determination process executed by the MPU within the main control device in the 19th control example. [Figure 645] 11 is a flow chart showing a small win lottery process executed by an MPU within the main control device in the 19th control example. [Figure 646] 11 is a flow chart showing a second special pattern variation pattern selection process executed by the MPU within the main control device in the 19th control example. [Figure 647] 11 is a flow chart showing a process during execution of second special pattern change executed by the MPU in the main control device in the 19th control example. [Figure 648] 11 is a flow chart showing a second special pattern change stop process executed by the MPU within the main control device in the 19th control example. [Figure 649] 11 is a flow chart showing the forced stopping process for Special Diagram 2 executed by the MPU in the main control device in the 19th control example. [Figure 650] 11 is a flow chart showing a special diagram 2 small hit stop process executed by an MPU within the main control device in the 19th control example. [Figure 651] 11 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the 19th control example. [Figure 652] 11 is a flow chart showing the jackpot termination process executed by the MPU in the main control device in the 19th control example. [Figure 653] 11 is a flow chart showing a time-saving limit update process executed by an MPU within the main control device in the 19th control example. [Figure 654] 11 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 19th control example. [Figure 655] 11 is a flow chart showing a special diagram 2 variational performance setting process executed by the MPU in the audio lamp control device in the 19th control example. [Figure 656] 10 is a flow chart showing a special diagram 1 variational performance setting process executed by the MPU in the audio lamp control device in the 19th control example. [Figure 657] 10A is a diagram showing an example of a performance screen when a time-saving A1 (once-time-saving once) is selected during the normal mode displayed on the third pattern display device in the 20th control example, and (b) shows an example of a performance screen (once-time-saving A2 wins) in the high accuracy mode displayed on the third pattern display device in the 20th control example. [Figure 658] 10. 10 is a diagram showing an example of a performance screen when the time-saving group A is won in the high accuracy mode displayed on the third pattern display device in the 20th control example, and (b) shows an example of a performance screen (internal second time-saving remaining 20 times) displayed on the high accuracy mode displayed on the third pattern display device in the 20th control example. [Figure 659] 10 is a diagram showing an example of a high accuracy mode transition screen displayed on the third pattern display device in the 20th control example when the screen is out of normal mode. [Figure 660] 10A and 10B are diagrams showing the flow of games and performance in the 20th control example. [Figure 661] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 20th control example, and FIG. 10 is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 20th control example. [Figure 662] 10 is a diagram schematically showing the specified contents of the second performance pattern selection table set in the ROM of the audio lamp control device of the pachinko machine in the 20th control example. [Figure 663] 10 is a diagram schematically showing the specified contents of the ceiling information selection table set in the ROM of the audio lamp control device of a pachinko machine in the 20th control example. [Figure 664] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 20th control example. [Figure 665] 10 is a flow chart showing a determination command process executed by the MPU in the audio lamp control device in the 20th control example. [Figure 666] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 20th control example. [Figure 667] 10 is a flow chart showing a second performance pattern setting process executed by the MPU in the audio lamp control device in the 20th control example. [Figure 668] 11 is a flow chart showing ceiling information notification setting processing executed by the MPU in the audio lamp control device in the 20th control example. [Figure 669] 1 is a front view of the gaming board of the pachinko machine of the 21st control example. [Figure 670] 10A (a) is a diagram showing an example of a performance screen in the chance zone displayed on the third pattern display device in the 21st control example, and (b) is a diagram showing an example of a performance screen in the case where a left-handed hit is passed through during the chance zone displayed on the third pattern display device in the 21st control example. [Figure 671] 10.sub.a (a) is a block diagram showing the configuration of a ROM within the audio lamp control device of a pachinko machine in the 21st control example, and (b) is a diagram schematically showing the specified contents of the remaining time-saving number of notification selection table set in the ROM of the audio lamp control device of a pachinko machine in the 21st control example. [Figure 672] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 21st control example. [Figure 673] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 21st control example. [Figure 674] 10 is a flow chart showing pending information-related processing executed by the MPU in the audio lamp control device in the 21st control example. [Figure 675] 10 is a flow chart showing a determination command process executed by the MPU in the audio lamp control device in the 21st control example. [Figure 676] 10 is a flow chart showing a through-pass processing executed by the MPU in the audio lamp control device in the 21st control example. [Figure 677] 10 is a flow chart showing a special diagram 2 variational performance setting process executed by the MPU in the audio lamp control device in the 21st control example. [Figure 678] 10 is a flow chart showing a non-time-saving limit-time performance setting process executed by the MPU in the audio lamp control device in the 21st control example. [Figure 679] 10 is a flow chart showing a special diagram 1 variational performance setting process executed by the MPU in the audio lamp control device in the 21st control example. [Figure 680] 14 is a diagram schematically showing the specified contents of the background mode selection table set in the ROM of the audio lamp control device of a pachinko machine in the first modification of the 18th control example. [Figure 681] 10 is a flow chart showing the time-saving pattern winning performance setting process executed by the MPU in the audio lamp control device in the first modification of the 18th control example. [Figure 682] 11 is a flow chart showing the time-saving pattern winning performance setting process executed by the MPU in the audio lamp control device in the second modification of the 18th control example. [Figure 683] 11 is a flow chart showing the ceiling mode determination process executed by the MPU in the audio lamp control device in the second modification of the 18th control example. [Figure 684] 10.sub.2 (a) is a diagram showing an example of the start screen for the final countdown performance displayed on the third pattern display device in the 22nd control example, and (b) is a diagram showing an example of the display screen (normal state, time-saving pattern B winning) when a time-saving pattern is won during the final countdown performance displayed on the third pattern display device in the 22nd control example. [Figure 685] 10A (a) is a diagram showing an example of a small win winning screen during the final countdown performance displayed on the third pattern display device in the 22nd control example, and (b) is a diagram showing an example of a final countdown performance end screen (18 remaining time savings) displayed on the third pattern display device in the 22nd control example. [Figure 686] 10.sub.1 (a) is a diagram showing an example of an additional performance start screen displayed on the third pattern display device in the 22nd control example, and (b) is a diagram showing an example of a display screen (first time-saving state, time-saving pattern A winning) when a time-saving pattern is won during the final countdown performance displayed on the third pattern display device in the 22nd control example. [Figure 687] 10A and 10B are diagrams showing the flow of the game state and the flow of the performance performed in the 22nd control example. [Figure 688] 10 is a diagram showing the transition contents of each game state in the 22nd control example. [Figure 689] 1. (a) is a diagram schematically showing the specified contents of the special pattern 1 random number table in the 22nd control example, (b) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the 22nd control example, and (c) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 22nd control example. [Figure 690] 14 is a diagram schematically showing the specified contents of the normal table in the 22nd control example. [Figure 691] 12A and 2B are diagrams schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the 22nd control example, and (b) are diagrams schematically showing the specified contents of the small-jack type selection table set in the ROM of the main control device in the 22nd control example. [Figure 692] 14 is a diagram schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the 22nd control example. [Figure 693] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 22nd control example. [Figure 694] 10 is a flow chart showing status command processing executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 695] 10 is a flow chart showing a second time-saving state transition process executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 696] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 697] 10 is a flow chart showing the time-saving pattern winning performance setting process executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 698] 10 is a flow chart showing a second time-saving state performance setting process executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 699] 10 is a flow chart showing normal state performance setting processing executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 700] 10A (a) is a diagram showing an example of a display screen for the long battle performance displayed on the third pattern display device in the first modification of the 22nd control example, and (b) is a diagram showing an example of a display screen for the combination battle performance displayed on the third pattern display device in the first modification of the 22nd control example. [Figure 701] 10 is a diagram showing an example of a display screen for a background change effect displayed on the third pattern display device in the first modification of the 22nd control example. [Figure 702] 14 is a diagram schematically showing the specified contents of the normal table in the first modification of the 22nd control example. [Figure 703] 10 is a flow chart showing a second time-saving state performance setting process executed by the MPU in the audio lamp control device in the first modification of the 22nd control example. [Figure 704] 10 is a flow chart showing special background setting processing executed by the MPU in the audio lamp control device in the first modification of the 22nd control example. [Figure 705] 10 is a flow chart showing a normal state performance setting process executed by the MPU in the audio lamp control device in the first modification of the 22nd control example. [Figure 706]10A is a diagram showing an example of a display screen for the super reach performance in the additional example, and (b) is a diagram showing an example of a display screen for the time-saving suggestion performance in the additional example. [Figure 707] 11 is a diagram showing an example of a display screen when switching the performance mode displayed on the third pattern display device in the additional example. [Figure 708] 10A and 10B are diagrams showing performance patterns in the additional example. [Figure 709] 1 is a front view of the gaming board of the pachinko machine of the 23rd control example. [Figure 710] 10A is a diagram showing an example of the performance mode when the special mode state A is set in the 23rd control example, and (b) shows an example of the pinch effect that is executed when a reach occurs in the special mode state A in the 23rd control example. [Figure 711] 10A is a diagram showing an example of the performance mode when a jackpot is won in the special mode state A in the 23rd control example, and (b) shows an example of the performance mode during the opening period of the challenge bonus in the 23rd control example. [Figure 712] 10A is a diagram showing an example of the performance mode when an opening performance that announces a normal jackpot is executed as the opening performance of the challenge bonus in the 23rd control example, and (b) shows an example of the performance mode when a promotion chance performance is executed in the special mode state A in the 23rd control example. [Figure 713] 10A is a diagram showing an example of the performance mode when the promotion chance performance is executed in the special mode state A of the 23rd control example, and (b) shows an example of the performance mode when the promotion chance performance that notifies a failure is executed in the special mode state A of the 23rd control example. [Figure 714] 10A is a diagram showing an example of the performance mode in which a promotion chance performance is performed to notify success of promotion in the special mode state A of the 23rd control example, and (b) is a diagram showing an example of the performance mode in which the 23rd control example is set to invincible mode. [Figure 715] 10. (a) is a diagram showing an example of a performance mode in which, in the invincible mode of the 23rd control example, the display of the first special pattern and the display of the second special pattern are overlapped and the display of the first special pattern is a normal jackpot fluctuation; (b) is a diagram showing an example of a performance mode in which the change of the first special pattern is performed while the change of the second special pattern is stopped in the invincible mode of the 23rd control example. [Figure 716] 10. (a) is a diagram showing an example of the performance mode in which a normal jackpot change of the first special pattern is executed while the fluctuation of the second special pattern is stopped in the invincible mode in the 23rd control example, and (b) is a diagram showing an example of the performance mode in the blackout performance that is executed when the execution of the jackpot game for the second special pattern is confirmed in the invincible mode in the 23rd control example. [Figure 717] 10 is a diagram showing an example of a performance mode when the 23rd control example is set to the premium lash mode. [Figure 718] 10 is a diagram showing a method for transitioning between states in the 23rd control example. [Figure 719] 1 is a block diagram showing the configuration of a ROM of the main control device in the 23rd control example. [Figure 720] 1 is a block diagram showing the configuration of the RAM of the main control device in the 23rd control example. [Figure 721] 1A and 2B are diagrams schematically showing the specified contents of the first random number table set in the ROM of the main control device in the 23rd control example, and (b) are diagrams schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 23rd control example. [Figure 722] 1. (a) is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the 23rd control example, and (b) is a block diagram showing the configuration of the variation pattern table set in the ROM of the main control device in the 23rd control example, and (c) is a diagram schematically showing the specified contents of the normal table in the 23rd control example. [Figure 723] 14 is a diagram schematically showing the specified contents of the time-saving and special-mode A table in the 23rd control example. [Figure 724] 14 is a diagram schematically showing the specified contents of the table for special mode B in the 23rd control example. [Figure 725] 10A (a) is a diagram schematically showing the specified contents of the table for the special mode C in the 23rd control example, and (b) is a diagram schematically showing the specified contents of the table for promotional performance in the 23rd control example. [Figure 726] 10A and 10B are diagrams that schematically show the specified contents of the small-hit random number table set in the ROM of the main control device in the 23rd control example, and (b) are diagrams that schematically show the specified contents of the variation pattern scenario table set in the ROM of the main control device in the 23rd control example. [Figure 727] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 23rd example of control. [Figure 728] 10 is a flow chart showing the first special pattern change start process executed by the MPU in the main control device in the 23rd example of control. [Figure 729] 10 is a flow chart showing the first special pattern determination process executed by the MPU within the main control device in the 23rd example of control. [Figure 730] 10 is a flow chart showing the first special pattern variation pattern selection process executed by the MPU within the main control device in the 23rd example of control. [Figure 731] 10 is a flow chart showing a special diagram 1 game state update process executed by the MPU in the main control device in the 23rd example of control. [Figure 732] 10 is a flow chart showing a first special pattern change stop process executed by the MPU within the main control device in the 23rd example of control. [Figure 733] 10 is a flow chart showing a special diagram 1 miss-off stop processing executed by an MPU within the main control device in the 23rd example of control. [Figure 734] 10 is a flow chart showing a second special pattern change start process executed by the MPU in the main control device in the 23rd example of control. [Figure 735] 10 is a flow chart showing a second special pattern determination process executed by the MPU within the main control device in the 23rd example of control. [Figure 736] 10 is a flow chart showing a second special pattern variation pattern selection process executed by the MPU within the main control device in the 23rd example of control. [Figure 737] 10 is a flow chart showing a special diagram 2 game state update process executed by the MPU in the main control device in the 23rd example of control. [Figure 738] 10 is a flow chart showing a second special pattern change stop process executed by the MPU within the main control device in the 23rd example of control. [Figure 739] 10 is a flow chart showing a special diagram 2 missing stop processing executed by an MPU within the main control device in the 23rd control example. [Figure 740] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the 23rd example of control. [Figure 741] 10 is a flow chart showing a jackpot operation setting process executed by an MPU within the main control device in the 23rd example of control. [Figure 742] 10 is a flow chart showing the jackpot termination process executed by the MPU in the main control device in the 23rd control example. [Figure 743] 10 is a flow chart showing the winning process executed by the MPU in the main control device in the 23rd control example. [Figure 744] 12 is a flow chart showing abnormality processing executed by the MPU in the main control device in the 23rd example of control. [Figure 745] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the 23rd control example. [Figure 746] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the 23rd control example. [Figure 747] 10 is a flow chart showing the performance setting process during invincible mode executed by the MPU in the audio lamp control device in the 23rd control example, and (b) shows the performance setting process during premium rush execution by the MPU in the audio lamp control device in the 23rd control example. [Figure 748] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the 23rd control example. [Figure 749] 10A (a) is a diagram schematically showing the specified contents of the variation pattern table set in the ROM of the main control device in the first modification of the 23rd control example, and (b) is a diagram schematically showing the specified contents of the special variation B1 table in the first modification of the 23rd control example. [Figure 750] 14 is a diagram schematically showing the specified contents of a variation pattern scenario table set in the ROM of the main control device in the first modification of the 23rd control example. [Figure 751]10. 10 is a diagram showing an example of the ending performance of the MAX bonus mode that is executed during the ending period of the jackpot winning for the fourth time in the MAX bonus mode in the 24th control example, and (b) shows an example of the performance mode when the MAX round breakthrough performance is performed in the ending performance of the MAX bonus mode in the 24th control example. [Figure 752] 10A and 10B are diagrams showing an example of the performance mode of the continuation judgment performance that is executed during the ending period of the jackpot winning in the MAX bonus mode after the MAX round breakthrough performance is performed in the 24th control example. [Figure 753] 10A is a diagram showing an example of the performance mode in which the 24th control example moves to the time-saving state A after the first hit, and (b) shows an example of the performance mode in which the first change display of the second special pattern is started in the time-saving state A of the 24th control example. [Figure 754] 10A is a diagram showing an example of the performance mode when the lottery result of the first second special pattern is wrong and A is eliminated in the time-saving state A in the 24th control example, and (b) shows an example of the performance mode when the lottery result of the first second special pattern is eliminated in the time-saving state B in the 24th control example, and A is displayed. [Figure 755] 10.sub.a (a) is a block diagram showing the configuration of the ROM of the main control device in the 24th control example, and (b) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 24th control example. [Figure 756] 10.

[0011] FIG. 1 (a) is a diagram schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the 24th control example, and (b) is a diagram schematically showing the specified contents of the small-stop type selection table set in the ROM of the main control device in the 24th control example, and (c) is a diagram schematically showing the specified contents of the off-type selection table set in the ROM of the main control device in the 24th control example. [Figure 757] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 24th control example. [Figure 758] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the 24th control example. [Figure 759] 10 is a flow chart showing the missed processing executed by the MPU in the main control device in the 24th control example. [Figure 760] 10 is a flow chart showing time-saving update processing executed by the MPU in the main control device in the 24th control example. [Figure 761] 10 is a flow chart showing a small-ticket time-saving update process executed by an MPU within the main control device in the 24th control example. [Figure 762] 10 is a flow chart showing winning information command processing executed by the MPU in the audio lamp control device in the 24th control example. [Figure 763] 10 is a flow chart showing an attack icon selection process executed by the MPU in the audio lamp control device in the 24th control example. [Figure 764] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the 24th control example. [Figure 765] 10 is a flow chart showing opening command processing executed by the MPU in the audio lamp control device in the 24th control example. [Figure 766] 10 is a flow chart showing ending command processing executed by the MPU in the audio lamp control device in the 24th control example. [Figure 767] 10 is a flow chart showing a MAX bonus termination process executed by the MPU in the audio lamp control device in the 24th control example. [Figure 768] 10A and 10B are diagrams showing an example of the performance mode when a race performance is performed in the special mode state A in the second modification of the 23rd control example. [Figure 769] 10.

[0041] FIG. 10A is a diagram showing an example of a performance mode in which a race performance that notifies you of a jackpot with the first special pattern is executed in the special mode state A in the second modification of the 23rd control example, and (a) is a diagram showing an example of a performance mode in which a race performance that notifies you of a jackpot with the second special pattern is executed in the special mode state A in the second modification of the 23rd control example. [Figure 770] 1 is a front view of a pachinko machine according to the tenth embodiment. [Figure 771] 1 is a front view of a pachinko machine game board. [Figure 772] 1 is a rear view of a pachinko machine. [Figure 773] 1 is a block diagram showing the electrical configuration of a pachinko machine. [Figure 774] 1 is an exploded front perspective view of the game board and the movement unit. FIG. [Figure 775] 1 is an exploded rear perspective view of the game board and the movement unit. FIG. [Figure 776] 1 is a front view of the operating unit. FIG. [Figure 777] 1 is a front view of the operating unit. FIG. [Figure 778] 1 is a front view of the operating unit. FIG. [Figure 779] 1 is a front view of the operating unit. FIG. [Figure 780] 1 is a front view of the operating unit. FIG. [Figure 781] 1 is a front view of the operating unit. FIG. [Figure 782] 1 is a front perspective view of the first operating unit. FIG. [Figure 783] 1 is a rear perspective view of the first operating unit. FIG. [Figure 784] 1 is an exploded front perspective view of the first operating unit. FIG. [Figure 785] 1 is an exploded rear perspective view of the first operating unit. FIG. [Figure 786] 1 is an exploded front perspective view of the rotating operating unit. FIG. [Figure 787] 1 is an exploded rear perspective view of the rotating operating unit. FIG. [Figure 788] 6A and 6B are rear views of the rotating operating unit. [Figure 789] 6A and 6B are rear views of the rotating operating unit. [Figure 790] 1 is a front view of the first operating unit. FIG. [Figure 791] 1 is a front view of the first operating unit. FIG. [Figure 792] 1 is a front view of the first operating unit. FIG. [Figure 793] 1 is a rear view of the first operating unit. FIG. [Figure 794] 1 is a rear view of the first operating unit. FIG. [Figure 795] 1 is a rear view of the first operating unit. FIG. [Figure 796] 1 is a front perspective view of the second operating unit. FIG. [Figure 797] 1 is a rear perspective view of the second operating unit. FIG. [Figure 798] 1 is an exploded front perspective view of the second operating unit. FIG. [Figure 799] 1 is an exploded rear perspective view of the second operating unit. FIG. [Figure 800] 1 is an exploded front perspective view of the rotating operating unit. FIG. [Figure 801] 1 is an exploded rear perspective view of the rotating operating unit. FIG. [Figure 802] 6A and 6B are rear views of the rotating operating unit. [Figure 803] 6A and 6B are rear views of the rotating operating unit. [Figure 804] 1 is a front perspective view of the third operating unit. FIG. [Figure 805] 1 is a rear perspective view of the third operating unit. FIG. [Figure 806] 1 is an exploded front perspective view of the third operating unit. FIG. [Figure 807] 1 is an exploded rear perspective view of the third operating unit. FIG. [Figure 808] 1 is an exploded front perspective view of the opening and closing operation unit; FIG. [Figure 809] 1 is an exploded rear perspective view of the opening and closing operation unit; FIG. [Figure 810] 1 is a rear view of the opening / closing operation unit of the third operation unit; FIG. [Figure 811] 1 is a rear view of the opening / closing operation unit of the third operation unit; FIG. [Figure 812] 1 is an exploded front perspective view of the light guide plate unit. [Figure 813] 1 is an exploded rear perspective view of the light guide plate unit. FIG. [Figure 814] 1 is an exploded front perspective view of the auxiliary light guide plate unit. [Figure 815] 1 is an exploded rear perspective view of the auxiliary light guide plate unit. [Figure 816] 1 is a rear view of the auxiliary light guide plate unit. [Figure 817] 816 is a cross-sectional view of the auxiliary light guide plate unit along the MCDXVIa-MCDXVIa of FIG. 816, and (b) is a cross-sectional view of the auxiliary light guide plate unit along the MCDXVIb-MCDXVIb of FIG. 816. [Figure 818] 6A to 6F are schematic front views of the auxiliary light guide plate unit. [Figure 819] 1 is an exploded front perspective view of the game board. [Figure 820] 1 is a perspective view of an exploded rear view of the game board. [Figure 821] 1 is an exploded front perspective view of the auxiliary light guide plate unit. [Figure 822]1 is an exploded rear perspective view of the auxiliary light guide plate unit. [Figure 823] 1 is a front view of the auxiliary light guide plate unit. [Figure 824] 823 is a cross-sectional view of the auxiliary light guide plate unit along the MCDXXIII-MCDXXIII line of FIG. 823. [Figure 825] 1 is an exploded front perspective view of the downstream guide member. [Figure 826] 1 is an exploded rear perspective view of the downstream guide member. FIG. [Figure 827] 1 is a schematic diagram schematically showing the structure of a visualization change sheet. [Figure 828] 6A and 6B are schematic diagrams showing changes in the appearance of the downstream guide member due to differences in directional viewing. [Figure 829] 1 is a rear view of the first operating unit according to the 11th embodiment. [Figure 830] 1 is a schematic rear view of the first operating unit according to the 12th embodiment. [Figure 831] 1 is a schematic rear view of the first operating unit. FIG. [Figure 832] 1 is a schematic rear view of the first operating unit. FIG. [Figure 833] 6A and 6B are cross-sectional views of the sphere guide unit in the 13th embodiment. [Figure 834] 14 (a) and 14 (b) are rear views of the rotating operation unit according to the 14th embodiment. [Figure 835] 14 is a cross-sectional view of the flow path front constituent member according to the fifteenth embodiment. [Figure 836] 1 is a rear view of a pachinko machine according to the sixteenth embodiment. [Figure 837] 1 is a front perspective view of the board box. [Figure 838] 1 is a rear perspective view of the board box. [Figure 839] 1 is a front view of the board box. [Figure 840] 840(a) is a rear view of the substrate box, and (b) is a side view of the substrate box in the direction of the arrow MCDXXXIXb in FIG. 840(a). [Figure 841] 1A is a partial front perspective view of the substrate box, and 1B is a partial rear perspective view of the substrate box. [Figure 842] 10A and 10B are partial front views of the substrate box, and (c) and (d) are partial rear views of the substrate box. [Figure 843] 842(b) is a partial cross-sectional view of the substrate box along the MCDXLIIa-MCDXLIIa line of FIG. 842(b), and (b) is a partial cross-sectional view of the substrate box along the MCDXLIIb-MCDXLIIb line of FIG. 842(b). [Figure 844] 1A is a partial front view of the substrate box, and 1B is a partial rear view of the substrate box. [Figure 845] 844(b) is a partial cross-sectional view of the substrate box along the MCDXLIV-MCDXLIV line. [Figure 846] 1A is a partial front view of the substrate box, and 1B is a partial rear view of the substrate box. [Figure 847] 847(a) is a partial rear view of the substrate box in the 17th embodiment, (b) is a partial cross-sectional view of the substrate box along line MCDXLVIb-MCDXLVIb in FIG. 847(a), and (c) is a partial cross-sectional view of the protective cover in the 18th embodiment. [Figure 848] 848 (a) is a partial rear view of the substrate box in the 19th embodiment, (b) is a partial cross-sectional view of the substrate box along the MCDXLVIIb line-MCDXLVIIb line in FIG. 848 (a), (c) is a partial cross-sectional view of the substrate box along the MCDXLVIIc line-MCDXLVIIc line in FIG. 848 (a), and (d) is a partial cross-sectional view of the substrate box along the MCDXLVIId line-MCDXLVIId line in FIG. 848 (a). [Figure 849] 842(b), and (d), are partial cross-sectional views of the substrate box in the 20th embodiment, corresponding to the cross-sectional view taken along line MCDXLVIIIa-MCDXLVIIIa in FIG. 842(b), and (d) is a partial cross-sectional view of the substrate box in the 21st embodiment. [Figure 850] 850(a) is a partial rear view of the substrate box in the 22nd embodiment, and (b) is a partial cross-sectional view of the substrate box along the MCDXLIXb-MCDXLIXb line of FIG. 850(a). [Figure 851] 851(b) is a partial cross-sectional view of the substrate box in the 23rd embodiment, (b) is a partial rear view of the substrate box in the 24th embodiment, and (c) is a partial cross-sectional view of the substrate box along the MCDLc-MCDLc line in FIG. 851(b). [Figure 852] 852(a) is a partial cross-sectional view of the substrate box in the 25th embodiment, (b) is a partial cross-sectional view of the substrate box along the MCDLIb-MCDLIb line in FIG. 852(a), and (c) is a partial cross-sectional view of the substrate box. [Figure 853] 853(a) is a front view of the protective cover of the substrate box according to the 26th embodiment, (b) is a side view of the protective cover in the direction of the arrow MCDLIIb in FIG. 853(a), and (c) is a rear view of the protective cover in the direction of the arrow MCDLIIc in FIG. 853(b). [Figure 854] 854(a) is a rear view of the substrate box, (b) is a side view of the substrate box in the direction of the arrow MCDLIIIb in FIG. 854(a), and (c) is a partial cross-sectional view of the substrate box along the MCDLIIIc-MCDLIIIc line of FIG. 854(b). [Figure 855] 842(b) is a side view of the protective cover of the substrate box according to the 27th embodiment, and (b) is a partial cross-sectional view of the substrate box along the line MCDXLIIb-MCDXLIIb in FIG. 842(b). [Figure 856] 842 is a front view of the protective cover of the substrate box according to the 28th embodiment, (b) is a side view of the protective cover in the direction of the arrow MCDLVb in FIG. 856(a), and (c) is a partial cross-sectional view of the substrate box along the line MCDXLIIb-MCDXLIIb in FIG. 842(b). [Figure 857] 842(b) is a partially rear view of the protective cover of the substrate box in the 29th embodiment, (b) is a partially cross-sectional view of the substrate box along the MCDXLIIb line-MCDXLIIb line in FIG. 842(b), (c) is a partially rear view of the protective cover in the 30th embodiment, and (d) is a partially cross-sectional view of the protective cover along the MCDLVId line-MCDLVId line in FIG. 857(c). [Figure 858] 858(a) is a partial rear view of the protective cover according to the 31st embodiment, (b) is a partial cross-sectional view of the protective cover along line MCDLVIIb-MCDLVIIb in FIG. 858(a), and (c) is a partial rear view of the substrate box according to the 32nd embodiment. [Figure 859] 859(b) is a side view of the protective cover of the substrate box according to the 33rd embodiment, 859(b) is a side view of the substrate box, and 859(b) is a cross-sectional view of the substrate box along the MCDLVIIIc-MCDLVIIIc line. [Figure 860] 860(a) is a partial rear view of the substrate box according to the 34th embodiment, (b) is a partial side view of the substrate box in the direction of the arrow MCDLIXb in FIG. 860(a), and (c) is a rear view of the protective cover. [Figure 861] 861(a) and 861(c) are rear views of the substrate box in the MCDLXa section of FIG. 860(a), (b) is a partial cross-sectional view of the substrate box in the MCDLXb-MCDLXb line of FIG. 861(a), and (d) is a partial cross-sectional view of the substrate box in the MCDLXd-MCDLXd line of FIG. 861(c). [Figure 862] 862(a) is a rear view of the substrate box in the MCDLXa section of FIG. 860(a), and (b) is a partial cross-sectional view of the substrate box along the MCDLXIb-MCDLXIb line of FIG. 862(a). [Figure 863] 863(a) is a partial front view of the substrate box in the 35th embodiment, (b) is a partial cross-sectional view of the substrate box along the MCDLXIIb-MCDLXIIb line of FIG. 863(a), and (c) is a partial cross-sectional view of the substrate box along the MCDLXIIc line-MCDLXIIc line of FIG. 863(a). [Figure 864] 863(a) and 863(a) are partial cross-sectional views of the substrate box along the MCDLXIIb-MCDLXIIb line of FIG. 863(a), and (b) and (d) are partial cross-sectional views of the substrate box along the MCDLXIIc line-MCDLXIIc line of FIG. 863(a). [Figure 865] 865(a) is a partial rear view of the substrate box in the 36th embodiment; (b) is a partial cross-sectional view of the substrate box along line MCDLXIVb-MCDLXIVb of FIG. 865(a), (c) is a partial cross-sectional view of the substrate box along line MCDLXIVc-MCDLXIVc of FIG. 865(a), (d) is a rear view of the protective cover, and (e) is a cross-sectional view of the protective cover along line XCVIe-XCVIe of FIG. 865(d). [Figure 866] 865(a), (b) is a partial cross-sectional view of the substrate box along the MCDLXVa section of FIG. 865(a), (c) is a partial cross-sectional view of the substrate box along the MCDLXIVb-MCDLXIVb line of FIG. 865(a), and (c) is a partial cross-sectional view of the substrate box along the MCDLXIVc-MCDLXIVc line of FIG. 865(a). [Figure 867]867(a) is a partial front view of the substrate box in the 37th embodiment, and (b) is a partial cross-sectional view of the substrate box along the MCDLXVIb line-MCDLXVIb in FIG. 867(a). [Figure 868] 868(a) is a partial front view of the substrate box in the 38th embodiment, (b) is a side view of the protective cover in the direction of the arrow MCDLXVIIb in FIG. 868(a), and (c) is a partial cross-sectional view of the substrate box along the MCDLXVIIc-MCDLXVIIc line of FIG. 868(a). [Figure 869] 869(a) is a partial rear view of the substrate box in the 39th embodiment, and (b) is a partial cross-sectional view of the substrate box along line MCDLXVIIIb-MCDLXVIIIb in FIG. 869(a). [Figure 870] 1 is a rear view of the protective cover according to the forty-fourth embodiment. [Figure 871] 871(a) is a partial rear view of the substrate box in the 41st embodiment, and (b) is a partial cross-sectional view of the substrate box along the MCDLXXb-MCDLXXb line of FIG. 871(a). [Figure 872] 10(a) is a partial cross-sectional view of the substrate box in the 42nd embodiment, and (b) is a partial cross-sectional view of the substrate box in the 43rd embodiment. [Figure 873] 873(a) is a partial rear view of the substrate box in the 44th embodiment, and (b) is a partial cross-sectional view of the substrate box along line MCDLXXIIb-MCDLXXIIb in FIG. 873(a). [Figure 874] 1 is a partial rear view of the substrate box according to the 45th embodiment. [Figure 875] 875(a) is a partial rear view of the substrate box in the 46th embodiment, and (b) is a partial cross-sectional view of the substrate box along the lines MCDLXXIVb-MCDLXXIVb of FIG. 875(a). [Figure 876] 1. (a) is a partial cross-sectional view of the substrate box in the 47th embodiment, (b) is a partial cross-sectional view of the substrate box in the 48th embodiment, and (c) is a partial rear view of the protective cover of the substrate box in the 49th embodiment. [Figure 877] 1 is a front view of a pachinko machine according to the 50th embodiment. [Figure 878] 1 is a front view of a pachinko machine game board. [Figure 879] 1 is a rear view of a pachinko machine. [Figure 880] 1 is a block diagram showing the electrical configuration of a pachinko machine. [Figure 881] 1 is an exploded front perspective view of the route constructor. FIG. [Figure 882] 1 is a partially enlarged front view of the route constructor. [Figure 883] 882 (a) and (b) are partial cross-sectional views of the route constructor along the MCDLXXXIIa-MCDLXXXIIa line. [Figure 884] 882 (a) and (b) are partial front views of the route constructor in the range MCDLXXXIIIa of FIG. 882. [Figure 885] 882 (a) and (b) are partial front views of the route constructor in the range MCDLXXXIIIa of FIG. 882. [Figure 886] 882 (a) and (b) are partial front views of the route constructor in the range MCDLXXXIIIa of FIG. 882. [Figure 887] 882 (a) and (b) are partial front views of the route constructor in the range MCDLXXXIIIa of FIG. 882. [Figure 888] 878 is a partial front view of the game board in the range MCDLXXXVII of FIG. 878. [Figure 889] 1. (a) is a block diagram showing the electrical configuration of the ROM within the main control device, (b) is a schematic diagram showing the correspondence relationship between the first win type counter and the jackpot type in the special pattern, and (c) is a schematic diagram showing the correspondence relationship between the second hit random number counter and the win type in the ordinary pattern. [Figure 890] 10A to 10B are diagrams showing an example of detection of the passage of a ball at a normal winning port (through gate) and a time-keeping change in the state of the electric vehicle. [Figure 891] 1 is an exploded front perspective view of the game board according to the 51st embodiment. [Figure 892] 1A is a front view of the front unit, and 1B is a rear view of the front unit. [Figure 893] 1 is an exploded front perspective view of the front unit. [Figure 894] 1 is an exploded rear perspective view of the front unit. FIG. [Figure 895] 1A is a front view of the allocation unit, and 1B is a rear view of the allocation unit. [Figure 896] 896(a) is a cross-sectional view of the allocation unit on the MCDXCVa-MCDXCVa line of FIG. 895(a), and (b) is a cross-sectional view of the allocation unit on the MCDXCVb-MCDXCVb line of FIG. 896(a). [Figure 897] 896(a) and 896(a) are cross-sectional views of the allocation unit along the MCDXCVb-MCDXCVb line. [Figure 898] 10A to 10B are diagrams showing examples of detection of the passage of a ball in the detection device and time-keeping changes in the state of the wing member. [Figure 899] 892(a) is a cross-sectional view of the game board along the MCDXCVIII-MCDXCVIII line. [Figure 900] 899 (a) and (b) are partial cross-sectional views of the winning port unit and the throw unit on the MCDXCIXa-MCDXCIXa line of FIG. 899. [Figure 901] 1 is a partial front view of the game board according to the 52nd embodiment. [Figure 902] 1 is a partial front view of the game board according to the 53rd embodiment. [Figure 903] 1 is a front view of the pachinko machine according to the 54th embodiment. [Figure 904] 1 is a front view of a pachinko machine game board. [Figure 905] 1 is a rear view of a pachinko machine. [Figure 906] 1 is a block diagram showing the electrical configuration of a pachinko machine. [Figure 907] 1 is a front perspective view of the winning unit. [Figure 908] 1 is a rear perspective view of the winning unit. [Figure 909] 1 is an exploded front perspective view of the winning unit. FIG. [Figure 910] 1 is an exploded rear perspective view of the winning unit. FIG. [Figure 911] 1 is an exploded front perspective view of the winning unit. FIG. [Figure 912] 1 is an exploded rear perspective view of the winning unit. FIG. [Figure 913] 1 is an exploded front perspective view of the winning unit. FIG. [Figure 914] 1 is an exploded rear perspective view of the winning unit. FIG. [Figure 915] 1 is an exploded front perspective view of the winning unit. FIG. [Figure 916] 1 is an exploded rear perspective view of the winning unit. FIG. [Figure 917] 917(a) is a front view of the winning unit, 917(a) is a side view of the winning unit in the direction of arrow MDXVIc, and 917(c) is a top view of the winning unit in the direction of arrow MDXVIc, in FIG. 917(a). [Figure 918] 917(c) and 917(c) are cross-sectional views of the winning units along the MDXVIIa-MDXVIIa line. [Figure 919] 917(c) is a cross-sectional view of the winning unit along line MDXVIII-MDXVIII in FIG. 917(c). [Figure 920] 917(c) is a cross-sectional view of the winning unit on the MDXIX-MDXIX ray. [Figure 921] 917(c) is a cross-sectional view of the winning unit on the MDXX-MDXX ray. [Figure 922] 917(c) is a cross-sectional view of the winning unit along line MDXVIII-MDXVIII in FIG. 917(c). [Figure 923] 917(c) is a cross-sectional view of the winning unit on the MDXIX-MDXIX ray. [Figure 924] 917(c) is a cross-sectional view of the winning unit on the MDXX-MDXX ray. [Figure 925] 917(c). (a) and (b) are cross-sectional views of the winning units along the MDXXIVa line-MDXXIVa in FIG. 917(c). [Figure 926] 10A to 10B are front perspective views of the winning unit. [Figure 927] 10A to 10B are front perspective views of the winning unit. [Figure 928] 10A to 10B are front perspective views of the winning unit. [Figure 929] 10A to 10B are front perspective views of the winning unit. [Figure 930] 6A and 6B are front perspective views of the winning unit. [Figure 931] 917(b) are partial cross-sectional views of the winning unit along the MDXXXa-MDXXXa line in FIG. 917(b). [Figure 932] 917(b) are partial cross-sectional views of the winning unit along the MDXXXa-MDXXXa line in FIG. 917(b). [Figure 933]10A to 10C are diagrams showing an example of time-keeping changes in the state of the electric vehicle. [Figure 934] 10 is a diagram for explaining the relationship between the hold type, the game state, the type of special design and the variation time. [Figure 935] 925(a) is a cross-sectional view of the slide member, tilting member and transmission member; FIG. 925(a). [Figure 936] 925(a) is a cross-sectional view of the slide member, tilting member and transmission member; FIG. 925(a). [Figure 937] 925(a) is a cross-sectional view of the slide member, tilting member and transmission member; FIG. 925(a). [Figure 938] 917(c) is a cross-sectional view of the plate member, base plate, slide member, tilt member and transmission member. [Figure 939] 904 (a) and (b) are enlarged front views of the upper variable winning device in the range MDXXXVIIIa of FIG. 904. [Figure 940] 904 (a) to (c) are enlarged front views of the upper variable winning device in the range MDXXXVIIIa of FIG. 904. [Figure 941] 904 (a) to (c) are enlarged front views of the upper variable winning device in the range MDXXXVIIIa of FIG. 904. [Figure 942] 939(a) to 939(c) are cross-sectional views of the movable top cover member and the movable floor member along the MDXLIa-MDXLIa line in FIG. 939(a). [Figure 943] 939(a) to 939(c) are cross-sectional views of the movable top cover member and the movable floor member along the MDXLIa-MDXLIa line in FIG. 939(a). [Figure 944] 1. (a) is a diagram showing the time-keeping change of the second specific winning port in the first special operation pattern, (b) is a diagram showing the time-keeping change of the second specific winning port in the second special operation pattern, and (c) is a diagram showing the time-keeping change of the second specific winning port in the third special operation pattern. [Figure 945] 1. (a) is a block diagram showing the electrical configuration of the ROM within the main control device, (b) is a schematic diagram showing the contents of the first hit random number table, (c) is a schematic diagram showing the correspondence relationship between the first hit random number counter and the determined value in the special pattern 1 random number table, and (d) is a schematic diagram showing the correspondence relationship between the first hit random number counter and the determined value in the special pattern 2 random number table. [Figure 946] 10. (a) is a schematic diagram showing a correspondence relationship between the first win type counter in the first win type selection table and the jackpot type in the special pattern, and (b) is a schematic diagram showing a correspondence relationship between the second hit random number counter in the second hit random number table and the win in the ordinary pattern. [Figure 947] 1 is a top view of the front frame and the outer frame. [Figure 948] 10A is a diagram schematically showing area division settings and valid line settings of the display screen, and (b) is a diagram illustrating an example of an actual display screen. [Figure 949] 10. (a) is a schematic diagram for explaining an example of the flow of a jackpot performance, and (b) is a schematic diagram for explaining an example of the flow of a jackpot performance, and (c), (d) and (e) are diagrams illustrating the display screen of the ending display performance displayed in the ending performance, which is part of the jackpot performance. [Figure 950] 10A is a diagram illustrating a display screen for the company name display performance displayed in the ending performance, and (b) is a diagram illustrating a display screen for the card-forgotten display performance displayed in the ending performance. [Figure 951] 10A (a) is a diagram illustrating a display screen for preventing card forgetting display performance displayed in the ending performance, and (b) is a diagram illustrating a display screen immediately after the ending performance. [Figure 952] 1 is a schematic diagram that schematically shows the correspondence between the ending performance and the jackpot type in the special design. [Figure 953] 917(c) is a cross-sectional view of the winning unit in the 55th embodiment of the MDXIX-MDXIX ray; FIG. 917(c). [Figure 954] 917(c) is a cross-sectional view of the winning unit on the MDXIX-MDXIX ray. [Figure 955] 10A is a schematic diagram showing a winning unit in the 56th embodiment, and (b) is a schematic diagram showing another example of winning units. [Figure 956] 10A and 10B are schematic diagrams showing the winning units in the 57th embodiment. [Figure 957] 904 (a) and (b) are front views of the upper variable winning device in the 58th embodiment in the range MDXXXVIIIa of FIG. 904. [Figure 958] 6A and 6B are diagrams illustrating a display screen for preventing card forgetting display performance displayed in the ending performance of the 59th embodiment. [Figure 959] 10 is a diagram illustrating a display screen for preventing card forgetting display performance displayed in the ending performance. [Figure 960] 6A and 6B are diagrams illustrating a display screen for preventing card forgetting display performance displayed in the ending performance. [Figure 961] 6 (a) and (b) are diagrams illustrating a display screen for preventing card forgetting display performance displayed in the ending performance of the 60th embodiment. [Figure 962] 10 is a diagram illustrating a display screen for preventing card forgetting display performance displayed in the ending performance. [Figure 963] 6A and 6B are diagrams illustrating a display screen for preventing card forgetting display performance displayed in the ending performance of the 61st embodiment. [Figure 964] 10 is a diagram illustrating a display screen for preventing card forgetting display performance displayed in the ending performance. [Figure 965] 10 is a diagram showing an example of time-change in the frame button display in the card-forgotten display, time-change in the effectiveness of operation of the frame button, and operation of the frame button. [Figure 966] 1 is a front view of the game board according to the 62nd embodiment. [Figure 967] 1 is a front perspective view of the lower frame. FIG. [Figure 968] 1 is a rear perspective view of the lower frame. FIG. [Figure 969] 1 is an exploded front perspective view of the lower frame. [Figure 970] 1 is an exploded rear perspective view of the lower frame. FIG. [Figure 971] 1 is a top view of the lower frame. [Figure 972] 1 is a front view of the lower frame. [Figure 973] 1 is a rear view of the lower frame. [Figure 974] 972, and (b) is a side view of the lower frame in the direction of arrow MDLXXIIIa in FIG. 972, and (b) is a side view of the lower frame in the direction of arrow MDLXXIIIb in FIG. 972. [Figure 975] 971 is a cross-sectional view of the lower frame along the MDLXXIV-MDLXXIV line of FIG. 971. [Figure 976] 971 is a cross-sectional view of the lower frame along the MDLXXIV-MDLXXIV line of FIG. 971. [Figure 977] 972 is a cross-sectional view of the lower frame along the MDLXXVI-MDLXXVI line. FIG. 972. [Figure 978] 975 (a) is a partially enlarged cross-sectional view of the lower frame at the MDLXXVIIa section of FIG. 975, and (b) is a partially enlarged cross-sectional view of the lower frame at the MDLXXVIIb-MDLXXVIIb line in FIG. 971. [Figure 979] 971 is a partially enlarged cross-sectional view of the lower frame showing the transition of the ball distribution operation by the distribution member, and corresponds to the cross-section taken along the line MDLXXIV-MDLXXIV in FIG. 971. [Figure 980] 971 is a partially enlarged cross-sectional view of the lower frame showing the transition of the ball distribution operation by the distribution member, and corresponds to the cross-section taken along the line MDLXXIV-MDLXXIV in FIG. 971. [Figure 981] 971 is a partially enlarged cross-sectional view of the lower frame showing the transition of the ball distribution operation by the distribution member, and corresponds to the cross-section taken along the line MDLXXIV-MDLXXIV in FIG. 971. [Figure 982] 1 is a front perspective view of the lower frame according to the 63rd embodiment. [Figure 983] 1 is a rear perspective view of the lower frame. FIG. [Figure 984] 1 is an exploded front perspective view of the lower frame. [Figure 985] 1 is an exploded rear perspective view of the lower frame. FIG. [Figure 986] 1 is a top view of the lower frame. [Figure 987] 1 is a front view of the lower frame. [Figure 988] 1 is a rear view of the lower frame. [Figure 989] 987, and (b) is a side view of the lower frame in the direction of arrow MDLXXXVIIIa in FIG. 987, and (b) is a side view of the lower frame in the direction of arrow MDLXXXVIIIb in FIG. 987. [Figure 990] 986 is a cross-sectional view of the lower frame on the MDLXXXIX-MDLXXXIX line of FIG. 986. [Figure 991]986 is a cross-sectional view of the lower frame on the MDLXXXIX-MDLXXXIX line of FIG. 986. [Figure 992] 988 is a partially enlarged cross-sectional view of the lower frame along the MDXCI-MDXCI line. FIG. [Figure 993] 988 is a partially enlarged cross-sectional view of the lower frame along the MDXCII-MDXCII line. [Figure 994] 986 is a partially enlarged cross-sectional view of the lower frame showing the transition of the ball distribution operation by the distribution member, and corresponds to the cross-section taken along the MDLXXXIX-MDLXXXIX line in FIG. 986. [Figure 995] 986 is a partially enlarged cross-sectional view of the lower frame showing the transition of the ball distribution operation by the distribution member, and corresponds to the cross-section taken along the MDLXXXIX-MDLXXXIX line in FIG. 986. [Figure 996] 986 is a partially enlarged cross-sectional view of the lower frame showing the transition of the ball distribution operation by the distribution member, and corresponds to the cross-section taken along the MDLXXXIX-MDLXXXIX line in FIG. 986. [Figure 997] 996(b) is a partially enlarged cross-sectional view of the lower frame along the MDXCVI-MDXCVI line. [Figure 998] 1 is a partially enlarged cross-sectional view of the lower frame according to the 64th embodiment. [Figure 999] 1 is a rear view of the lower frame. [Figure 1000] 1 is a partially enlarged cross-sectional view of the lower frame according to the 64th embodiment. [Figure 1001] 1 is a rear view of the lower frame. [Figure 1002] 1002(a) is a top view of the dish member in the 65th embodiment, (b) is a cross-sectional view of the dish member along the line MDCIb-MDCIb of FIG. 1002(a), and (c) is a cross-sectional view of the dish member along the line MDCIc-MDCIc of FIG. 1002(a). [Figure 1003] 988 (a) is a cross-sectional view of the lower frame in the 66th embodiment, and corresponds to a cross-section taken along the MDXCII-MDXCII line in FIG. 988, and (b) is a cross-section taken along the MDXCII-MDXCII line in FIG. 988. [Figure 1004] 1 is a front view of the game board according to the 68th embodiment. [Figure 1005] 1 is a front perspective view of the lower frame. FIG. [Figure 1006] 1 is a rear perspective view of the lower frame. FIG. [Figure 1007] 1 is an exploded front perspective view of the lower frame. [Figure 1008] 1 is an exploded rear perspective view of the lower frame. FIG. [Figure 1009] 1 is a top view of the lower frame. [Figure 1010] 1 is a front view of the lower frame. [Figure 1011] 1 is a rear view of the lower frame. [Figure 1012] 1010 is a side view of the lower frame in the direction of the arrow MDCXIa in FIG. 1010, and (b) is a side view of the lower frame in the direction of the arrow MDCXIb in FIG. 1010. [Figure 1013] 1009 (a) is a partially enlarged cross-sectional view of the lower frame, which corresponds to the cross-section taken along line MDCXIIa-MDCXIIa in FIG. 1009, and (b) is a partially enlarged rear view of the lower frame. [Figure 1014] 1009 (a) is a partially enlarged cross-sectional view of the lower frame, which corresponds to the cross-section taken along line MDCXIIa-MDCXIIa in FIG. 1009, and (b) is a partially enlarged rear view of the lower frame. [Figure 1015] 1009 (a) is a partially enlarged cross-sectional view of the lower frame, which corresponds to the cross-section taken along line MDCXIIa-MDCXIIa in FIG. 1009, and (b) is a partially enlarged rear view of the lower frame. [Figure 1016] 1009, (b) is a partially enlarged cross-sectional view of the lower frame along the MDCXVa-MDCXVa line in FIG. 1009, (b) is a partially enlarged cross-sectional view of the lower frame along the MDCXVb-MDCXVb line in FIG. 1009, and (c) is a partially enlarged cross-sectional view of the lower frame along the MDCXVc-MDCXVc line in FIG. 1013. [Figure 1017] 69 (a) and 69th embodiment are cross-sectional views of the lower frame. [Figure 1018] 6A and 6B are partially enlarged cross-sectional views of the lower frame according to the 70th embodiment. [Figure 1019] 10A and 10B are partially enlarged rear views of the lower frame according to the 71st embodiment. [Figure 1020] 1 is a partially enlarged rear view of the lower frame according to the 72nd embodiment. [Figure 1021] 1 is an exploded front perspective view of the lower frame according to the 73rd embodiment. [Figure 1022] 1 is an exploded rear perspective view of the lower frame. FIG. [Figure 1023] 1 is a front view of the lower frame. [Figure 1024] 1009, and 1009, (b) correspond to the cross-section taken along the MDCXIIa-MDCXIIa line, and (b) corresponds to the cross-section taken along the MDCXVc-MDCXVc line, in FIG. 1013. [Figure 1025] 10A to 10C are partially enlarged rear views of the lower frame according to the 74th embodiment. [Figure 1026] 6A and 6B are partially enlarged cross-sectional views of the lower frame according to the 75th embodiment. [Figure 1027] 1026(a) is a partially enlarged cross-sectional view of the lower frame along the line MDCXXVIa-MDCXXVIa of FIG. 1026(a), and (b) is a partially enlarged cross-sectional view of the lower frame along the line MDCXXVIb-MDCXXVIb of FIG. 1026(b). [Figure 1028] 1013 is a partially enlarged cross-sectional view of the lower frame, which corresponds to the cross-section taken along the MDCXVc-MDCXVc line in FIG. 1013. [Figure 1029] 1 is a front view of the game board according to the 76th embodiment. [Figure 1030] 1 is a front perspective view of the lower frame. FIG. [Figure 1031] 1 is a rear perspective view of the lower frame. FIG. [Figure 1032] 1 is an exploded front perspective view of the lower frame. [Figure 1033] 1 is an exploded rear perspective view of the lower frame. FIG. [Figure 1034] 1 is a top view of the lower frame. [Figure 1035] 1 is a front view of the lower frame. [Figure 1036] 1 is a rear view of the lower frame. [Figure 1037] 1035, (b) is a side view of the lower frame in the direction of arrow MDCXXXVIa in FIG. 1035, (b) is a side view of the lower frame in the direction of arrow MDCXXXVIb in FIG. 1035, and (c) is a cross-sectional view of the lower frame in the direction of arrow MDCXXXVIc in FIG. 1035-MDCXXXVIc line. [Figure 1038] 10. 10 is a front view of the lower frame in a state where the front member is not shown, (b) is a partially enlarged rear view of the lower frame in a state where the rear cover member is not shown, and (c) is a top view of the lower frame. [Figure 1039] 1038(c), (b) is a cross-sectional view of the lower frame along the line MDCXXXVIIIa-MDCXXXVIIIa of FIG. 1038(c), (b) is a cross-sectional view of the lower frame along the line MDCXXXVIIIb-MDCXXXVIIIb of FIG. 1039(a), and (c) is a partially enlarged bottom view of the lower frame. [Figure 1040] 10. 10 is a front view of the lower frame in a state where the front member is not shown, (b) is a partially enlarged rear view of the lower frame in a state where the rear cover member is not shown, and (c) is a top view of the lower frame. [Figure 1041] 1041(a) is a cross-sectional view of the lower frame along the MDCXLa-MDCXLa line of FIG. 1040(c), 1040(c), 1041(a), 1041(a), and 1041(c), 1041(c), and 1041(c) is a partially enlarged lower view of the lower frame. [Figure 1042] 1038 is a partially enlarged cross-sectional view of the lower frame in the 77th embodiment, and corresponds to the cross-section taken along line MDCXXXVIIIa-MDCXXXVIIIa in FIG. 1038. [Figure 1043] 1043(b) is a front perspective view of the distribution passage, FIG. 1043(a) is a front view of the distribution passage in the direction of the arrow MDCXLIIb in FIG. 1043(a), FIG. 1043(b) is a bottom view of the distribution passage in the direction of the arrow MDCXLIIc in FIG. 1043(b), and FIG. 1043(d) is a side view of the distribution passage in the direction of the arrow MDCXLIId in FIG. 1043(b). [Figure 1044] 1038 is a partially enlarged cross-sectional view of the lower frame in the 78th embodiment, and corresponds to the cross-section taken along line MDCXXXVIIIa-MDCXXXVIIIa in FIG. 1038(c). [Figure 1045] 10.

[0034] FIG. 10 is a front view of the lower frame in the 79th embodiment, and (b) is a rear view of the lower frame. [Figure 1046] 10.

[0034] FIG. 10 is a front view of the lower frame in the 79th embodiment, and (b) is a rear view of the lower frame. [Figure 1047] 10(a) is a front view of the lower frame in the 80th embodiment, and (b) is a rear view of the lower frame. [Figure 1048] 1 is a top view of the lower frame. [Figure 1049] 10(a) is a front view of the lower frame in the 80th embodiment, and (b) is a rear view of the lower frame. [Figure 1050] 1 is a top view of the lower frame. [Figure 1051] 1040(c) is a partially enlarged cross-sectional view of the lower frame in the 81st embodiment, which corresponds to the cross-sectional view taken along the MDCXLa-MDCXLa line of FIG. 1040(c), and (b) is a partially enlarged cross-sectional view taken along the MDCXLa-MDCXLa line of FIG. 1040(c), and (c) is a partially enlarged cross-sectional view taken along the MDCXLa-MDCXLa line of FIG. 1040(c), and (c) is a partially enlarged cross-sectional view taken along the MDCXLa-MDCXLa line of FIG. 1040(c). [Figure 1052] 10(a) is a partial top view of the lower frame in the 84th embodiment, and (b) is a partial top view of the lower frame in the 85th embodiment. [Figure 1053] 1040(c) is a partially enlarged cross-sectional view of the distribution passage in the 77th embodiment, (b) is a partially enlarged cross-sectional view of the distribution passage in the 87th embodiment, (c) is a partially enlarged cross-sectional view of the distribution passage in the 88th embodiment, (d) is a partially enlarged cross-sectional view of the distribution passage in the 89th embodiment, and corresponds to the cross-sectional view taken along the MDCXLa-MDCXLa line in FIG. 1040(c), and (e) is a partially enlarged cross-sectional view taken along the MDCXLa-MDCXLa line in FIG. 1040(c), and (e) is a partially enlarged cross-sectional view taken along the MDCXLa-MDCXLa line in FIG. 1040(c). [Figure 1054] 10(a) is a partially enlarged top view of the lower frame in the 91st embodiment, and (b) is a partially enlarged top view of the lower frame in the 92nd embodiment. [Figure 1055] 1 is a front view of the game board according to the 93rd embodiment. [Figure 1056] 1 is a front perspective view of the lower frame. FIG. [Figure 1057] 1 is a rear perspective view of the lower frame. FIG. [Figure 1058] 1 is an exploded front perspective view of the lower frame. [Figure 1059] 1 is an exploded rear perspective view of the lower frame. FIG. [Figure 1060] 1A is an exploded front perspective view of the definitive passage, and 1B is an exploded front perspective view of the driving means. [Figure 1061] 1A is an exploded rear perspective view of the definitive passage, and 1B is an exploded rear perspective view of the driving means. [Figure 1062] 1 is a top view of the lower frame. [Figure 1063] 1 is a front view of the lower frame. [Figure 1064] 1 is a rear view of the lower frame. [Figure 1065] 1063, (b) is a side view of the lower frame in the direction of arrow MDCLXIVa in FIG. 1063, (c) is a side view of the lower frame in the direction of arrow MDCLXIVb in FIG. 1063, and (c) is a cross-sectional view of the lower frame in the line MDCLXIVc-MDCLXIVc in FIG. 1063. [Figure 1066] 1A is a partially enlarged front view of the lower frame, and 1B is a partially enlarged rear view of the lower frame. [Figure 1067] 1A is a partially enlarged front view of the lower frame, and 1B is a partially enlarged rear view of the lower frame. [Figure 1068] 1 is a top view of the part of the displacement member. [Figure 1069] 1 is a front view of the lower frame. [Figure 1070] 1070(a) is a rear view of the lower frame, and 1070(a) is a side view of the lower frame in the direction of the arrow MDCLXIXb in FIG. 1070(a). [Figure 1071] 1 is a front view of the lower frame. [Figure 1072] 1072(a) is a rear view of the lower frame, and 1072(b) is a side view of the lower frame in the direction of the arrow MDCLXXIb in FIG. 1072(a). [Figure 1073] 10A and 10B are partially enlarged front views of the lower frame in the 94th embodiment, and (b) and (d) are partially enlarged top views of the lower frame. [Figure 1074] 10A and 10B are partially enlarged rear views of the lower frame according to the 95th embodiment. [Figure 1075] 10A is a top view of the lower frame in the 96th embodiment, and (b) is a partially enlarged front view of the lower frame. [Figure 1076] 1A is a top view of the lower frame, and 1B is a partially enlarged front view of the lower frame. [Figure 1077] 1 is a front view of the game board according to the 97th embodiment. [Figure 1078] 1 is a front perspective view of the lower frame. FIG. [Figure 1079] 1 is a rear perspective view of the lower frame. FIG. [Figure 1080] 1 is an exploded front perspective view of the lower frame. [Figure 1081] 1 is an exploded rear perspective view of the lower frame. FIG. [Figure 1082] 1 is an exploded front perspective view of the displacement means. FIG. [Figure 1083] 1 is an exploded rear perspective view of the displacement means. FIG. [Figure 1084] 1 is a top view of the lower frame. [Figure 1085] 1 is a front view of the lower frame. [Figure 1086] 1 is a rear view of the lower frame. [Figure 1087] 1085, (b) is a side view of the lower frame in the direction of arrow MDCLXXXVIa in FIG. 1085, (c) is a side view of the lower frame in the direction of arrow MDCLXXXVIb in FIG. 1085, and (c) is a cross-sectional view of the lower frame in the direction of arrow MDCLXXXVIc in FIG. 1085-MDCLXXXVIc line-MDCLXXXVIc. [Figure 1088] 1A and 1B are front views of the lower frame, and 1B are rear views of the lower frame. [Figure 1089] 1A and 1B are front views of the lower frame, and 1B are rear views of the lower frame. [Figure 1090] 1A and 1B are front views of the lower frame, and 1B are rear views of the lower frame. [Figure 1091] 1 is a top view of the left displacement member partially. [Figure 1092] 1 is a front view of the game board according to the 98th embodiment. [Figure 1093] 1 is a front perspective view of the lower frame. FIG. [Figure 1094] 1 is a rear perspective view of the lower frame. FIG. [Figure 1095] 1 is an exploded front perspective view of the lower frame. [Figure 1096] 1 is an exploded rear perspective view of the lower frame. FIG. [Figure 1097] 1 is an exploded front perspective view of the distribution means. [Figure 1098] 1 is an exploded rear perspective view of the distribution means. FIG. [Figure 1099] 1 is a top view of the lower frame. [Figure 1100] 1 is a front view of the lower frame. [Figure 1101] 1 is a rear view of the lower frame. [Figure 1102] 1100 is a side view of the lower frame in the direction of the arrow MDCCIa in FIG. 1100, (b) is a side view of the lower frame in the direction of the arrow MDCCIb in FIG. 1100, and (c) is a cross-sectional view of the lower frame in the direction of the arrow MDCCIb in FIG. 1100. [Figure 1103] 1102(c) is a partially enlarged cross-sectional view of the lower frame along the line MDCCIIa-MDCCIIa in FIG. 1102(c), and (b) is a partially enlarged rear view of the lower frame. [Figure 1104] 1102(c) is a partially enlarged cross-sectional view of the lower frame along the line MDCCIIa-MDCCIIa in FIG. 1102(c), and (b) is a partially enlarged rear view of the lower frame. [Figure 1105] 1 is a top view of the lower frame. FIG. [Figure 1106] 1 is a top view of the lower frame. FIG. [Figure 1107] 10A and 10B are cross-sectional views of the lower frame in the 99th embodiment, and 10B are rear views of the lower frame. [Figure 1108] 1A is a cross-sectional view of the lower frame, and 1B is a rear view of the lower frame. [Figure 1109] 10A and 10B are schematic top views of the fourth passage portion of the sixth passage member, the rolling surface of the intermediate passage member, the displacement passage member of the displacement means, and the second displacement passage portion of the second displacement passage; (b), (d) and (f) are schematic front views of the fourth passage portion of the sixth passage member, the rolling surface of the intermediate passage member, the displacement passage member of the displacement means, and the second displacement passage portion of the second displacement passage. [Figure 1110] 1 is a partially enlarged top view of the lower frame according to the 100th embodiment. [Figure 1111] 101 (a) is a partially enlarged top view of the lower frame in the 101st embodiment, and (b) is a partially enlarged front view of the lower frame. [Figure 1112] 10A is a partially enlarged top view of the lower frame, and 10B is a partially enlarged front view of the lower frame. [Figure 1113] 102 (a) is a partially enlarged top view of the lower frame in the 102nd embodiment, and (b) is a partially enlarged front view of the lower frame. [Figure 1114]103 is a rear perspective view of the lower frame according to the 103rd embodiment. [Figure 1115] 1 is a partially enlarged top view of the lower frame. [Figure 1116] 10 is a front view of the pachinko machine according to the 104th embodiment. [Figure 1117] 1 is a rear view of a pachinko machine. [Figure 1118] 1 is a front perspective view of a pachinko machine showing the inner frame open (distributed) from the outer frame. FIG. [Figure 1119] 1 is a front perspective view of a pachinko machine showing a state (development) in which the inner frame is opened from the outer frame and the back pack is opened from the inner frame (development). [Figure 1120] 1 is a front perspective view of a pachinko machine showing the inner frame closed with respect to the outer frame and the front frame open (distributed). [Figure 1121] 1 is a front view of the pachinko machine with the front frame removed. [Figure 1122] 1 is an exploded front perspective view of the game board and the inner frame. [Figure 1123] 1 is an exploded perspective front view of the front frame. [Figure 1124] 1 is an exploded perspective rear view of the front frame. FIG. [Figure 1125] 1 is a block diagram showing the electrical configuration of a pachinko machine. [Figure 1126] 1 is a front view of a pachinko machine according to the 105th embodiment. [Figure 1127] 1 is a front view of a pachinko machine game board. [Figure 1128] 1 is an exploded front perspective view of the game board and the movement unit. FIG. [Figure 1129] 1 is an exploded front perspective view of the game board. [Figure 1130] 1 is an exploded front perspective view of the winning unit. FIG. [Figure 1131] 1 is an exploded rear perspective view of the winning unit. FIG. [Figure 1132] 1127 is a partially enlarged front view of the game board in the MDCCXXXI section of FIG. 1127. [Figure 1133] 1132 is a cross-sectional view of the game board along the MDCCXXXII-MDCCXXXII line. [Figure 1134] 1 is a perspective view of the winning unit. [Figure 1135] 1 is a perspective view of the winning unit. [Figure 1136] 1 is a perspective view of the winning unit. [Figure 1137] 1 is a perspective view of the winning unit. [Figure 1138] 1 is a perspective view of the rear of the game board. [Figure 1139] 1 is a perspective view of an exploded rear view of the game board. [Figure 1140] 1 is an exploded front perspective view of the operating unit; FIG. [Figure 1141] 1 is a front view of the operating unit. FIG. [Figure 1142] 1 is a front view of the operating unit. FIG. [Figure 1143] 1 is a front view of the operating unit. FIG. [Figure 1144] 1 is a front view of the operating unit. FIG. [Figure 1145] 1 is a front view of the operating unit. FIG. [Figure 1146] 1 is a front view of the operating unit. FIG. [Figure 1147] 1 is a front view of the operating unit. FIG. [Figure 1148] 1 is a front exploded perspective view of the front layer side movable device. FIG. [Figure 1149] 1 is an exploded perspective view of the rear surface of the front layer side movable device. FIG. [Figure 1150] 1 is an exploded front perspective view of the first movable device. [Figure 1151] 1 is an exploded rear perspective view of the first movable device. FIG. [Figure 1152] 1 is an exploded front perspective view of the lifting device. [Figure 1153] 1 is an exploded rear perspective view of the lifting device. [Figure 1154] 1 is an exploded front perspective view of the long device. [Figure 1155] 1 is an exploded rear perspective view of the long device. [Figure 1156] 1 is an exploded front perspective view of the mobile device. FIG. [Figure 1157] 1 is an exploded rear perspective view of the mobile device. FIG. [Figure 1158] 10A and 10B are partially enlarged front views of the front layer side movable device. [Figure 1159] 1 is a partially enlarged front view of the first movable device. [Figure 1160] 1 is a partially enlarged front view of the first movable device. [Figure 1161] 1 is a partially enlarged front view of the first movable device. [Figure 1162] 1 is a partially enlarged front view of the first movable device. [Figure 1163] 1 is a partially enlarged front view of the first movable device. [Figure 1164] 1 is a partially enlarged front view of the first movable device. [Figure 1165] 1 is a partially enlarged front view of the first movable device. [Figure 1166] 1 is a partially enlarged front view of the first movable device. [Figure 1167] 1 is a partially enlarged rear view of the first movable device. [Figure 1168] 1 is a partially enlarged rear view of the first movable device. [Figure 1169] 10A and 10B are partial front views of the first movable device. [Figure 1170] 1 is an exploded front perspective view of the second movable device. [Figure 1171] 1 is an exploded rear perspective view of the second movable device. FIG. [Figure 1172] 10A and 10B are front views of the second movable device. [Figure 1173] 10A and 10B are front views of the second movable device. [Figure 1174] 10A and 10B are front views of the second movable device. [Figure 1175] 10A and 10B are schematic front views of the upper and lower slide members, the trackable members and the interlocking members. [Figure 1176] 1 is an exploded front perspective view of the rear layer side movable device. FIG. [Figure 1177] 1 is an exploded rear perspective view of the rear layer side movable device. FIG. [Figure 1178] 1 is an exploded front perspective view of the third movable device. [Figure 1179] 1 is an exploded rear perspective view of the third movable device. [Figure 1180] 10A and 10B are front views of the upper rear cover member, the extended rotating member, the proximal slide member and the pinion. [Figure 1181] 1 is a partially enlarged front view of the rear layer side movable device. [Figure 1182] 1 is a front view of the rear layer side movable device. FIG. [Figure 1183] 1 is a front view of the rear layer side movable device. FIG. [Figure 1184] 1 is a front view of the rear layer side movable device. FIG. [Figure 1185] (a) to (f) are schematic front views of the pachinko machine. [Figure 1186] (a) to (e) are schematic front views of the pachinko machine. [Figure 1187] 10 is a rear view of the base plate and the light irradiation device according to the 106th embodiment. [Figure 1188] 1 is a rear perspective view of the base plate and the light irradiation device. [Figure 1189] 1 is an exploded rear perspective view of the base plate and the light irradiation device. [Figure 1190] 1 is an exploded front perspective view of the base plate and the light irradiation device. [Figure 1191] 1187 is a partial cross-sectional view of the base plate and the light irradiation device along the MDCCXC-MDCCXC line of FIG. 1187. [Figure 1192] 1 is a schematic front view of a pachinko machine. [Figure 1193] 10 is an exploded rear perspective view of the base plate and the light irradiation device according to the 107th embodiment. [Figure 1194] 1 is an exploded front perspective view of the base plate and the light irradiation device. [Figure 1195] 1187 is a partial cross-sectional view of the base plate and the light irradiation device in line corresponding to the MDCCXC-MDCCXC line of FIG. 1187. [Figure 1196] 10 is a front view of the operating unit according to the 108th embodiment. [Figure 1197] 10A to 10B are front views of the mobile device. [Figure 1198] 1 is a partial rear view of the first movable device of the front layer side movable device. FIG. [Figure 1199] 1 is a partial rear view of the first movable device of the front layer side movable device. FIG. [Figure 1200] (a) to (c) are schematic front views of the pachinko machine. [Figure 1201] 1 is a schematic front view of a pachinko machine. [Figure 1202] 6A and 6B are partial front views of the pachinko machine. [Figure 1203] 1127 is a partially enlarged front view of the game board in the range corresponding to the MDCCXXXI section of FIG. 1127. [Figure 1204] (a) to (c) are schematic front views of the pachinko machine. [Figure 1205] (a) to (c) are schematic front views of the pachinko machine. [Figure 1206] (a) to (c) are schematic front views of the pachinko machine. [Figure 1207](a) to (c) are schematic front views of the pachinko machine. [Figure 1208] (a) to (c) are schematic front views of the pachinko machine. [Figure 1209] (a) to (c) are schematic front views of the pachinko machine. [Figure 1210] (a) to (c) are schematic front views of the pachinko machine. [Figure 1211] (a) to (c) are schematic front views of the pachinko machine. [Figure 1212] 10A and 10B are front views of the second movable device. [Figure 1213] 1 is a front view of the second movable device. [Figure 1214] 1 is a schematic front view schematically showing the plate-like portion of the rear opening-closing member of the rear layer-side movable device, the plate-like portion of the middle opening-closing member, and the plate-like portion of the front opening-closing member. [Figure 1215] 1215(a) is a front view of the display area of ​​the third pattern display device, and (b) is a front view of the plate-like portion disposed on the front side of the display area of ​​the third pattern display device shown in FIG. 1215(a). [Figure 1216] 1216(a) is a front view of the display area of ​​the third pattern display device, and (b) is a front view of the plate-like portion disposed on the front side of the display area of ​​the third pattern display device shown in FIG. 1216(a). [Figure 1217] 1 is a schematic front view schematically showing the plate-like portion of the rear opening-closing member of the rear layer-side movable device, the plate-like portion of the middle opening-closing member, and the plate-like portion of the front opening-closing member. [Figure 1218] 10A to 10C are top views of the plate-like portions of the third pattern display device and the rear layer side movable device. [Figure 1219] 12(a) to 1200(a) are partially enlarged front views of the pachinko machine in the MDCCCXVIII section of FIG. 1200(a). [Figure 1220] 1200(a) to 1200(a) are partially enlarged front views of the pachinko machine in the MDCCCXVIII section of FIG. 1200(a). [Figure 1221] 6A and 6B are schematic front views of the pachinko machine. [Figure 1222] (a) to (c) are schematic front views of the pachinko machine. [Figure 1223] 6A and 6B are schematic front views of the pachinko machine. [Figure 1224] 1 is a front view of the pachinko machine according to the 109th embodiment. [Figure 1225] 1 is a front view of a pachinko machine. [Figure 1226] 1 is a rear view of the game board. [Figure 1227] 1226 is a partial cross-sectional view of the game board along the MDCCCXXVI-MDCCXXVI line. [Figure 1228] 1 is a front view of a pachinko machine. [Figure 1229] 1 is a front view of a pachinko machine. [Figure 1230] 1 is a front view of a pachinko machine. [Figure 1231] 1 is a front view of a pachinko machine. [Figure 1232] 1 is a front view of the game board according to the 110th embodiment. [Figure 1233] 1233(a) is a partially enlarged front view of the game board in the MDCCCXXXIIa section of FIG. 1232, and FIG. 1233(b) is a partially enlarged front view of FIG. 1233(a). [Figure 1234] 1 is a front view of the gaming board of the pachinko machine of the 25th control example. [Figure 1235] 10A (a) is a diagram showing an example of an even-numbered pattern reach display screen in the normal state of the 25th control example, and (b) is a diagram showing an example of an example of a display screen after the SP reach has been developed in the 25th control example. [Figure 1236] 10A (a) is a diagram showing an example of an even-numbered pattern reach display screen in the 25th control example in the special mode, and (b) is a diagram showing an example of an example of a display screen after the SP reach has been developed in the 25th control example. [Figure 1237] 10A (a) is a diagram showing an example of a display screen after the SP reach has been developed in the 25th control example, and (b) is a diagram showing an example of a display screen when the designs are temporarily aligned in the 25th control example. [Figure 1238] 10 is a diagram showing an example of a display screen when the design is stopped in the 25th control example. [Figure 1239] 10 is a diagram showing an example of a display screen in which the SP reach is displayed in the 25th control example. [Figure 1240] 10. The figure (a) is a diagram showing an example of a normal angle display screen in the 25th control example, (b) is a diagram showing an example of a left angle display screen in the 25th control example, and (c) is a diagram showing an example of a right angle display screen in the 25th control example. [Figure 1241] 10A (a) is a diagram showing an example of a screen when special chart fluctuation stops during the left angle display in the 25th control example, and (b) is a diagram showing an example of a screen when special chart fluctuation stops during the left angle display in the 25th control example (when the next fluctuation reach) during the left angle display in the 25th control example. [Figure 1242] 10A (a) is a diagram showing an example of the upper angle display screen in the 25th control example, and (b) is a diagram showing an example of the normal angle display screen (a screen that suggests upper angle transition) in the 25th control example. [Figure 1243] 10A and 10B are diagrams showing an example of a display screen during the normal state of the 25th control example, during which the display screen is stolen when the special chart is stopped just before the normal state of the 25th control example is stopped. [Figure 1244] 10A and 10B are diagrams showing an example of a display screen when the normal state of the 25th control example is stopped, and (b) shows an example of a display screen when the ceiling reaches the 25th control example is performed. [Figure 1245] 10A (a) is a diagram showing an example of a display screen at the end of a normal long-time during the ceiling time reduction in the 25th control example, and (b) is a diagram showing an example of a display screen at the end of a ceiling time reduction in the 25th control example. [Figure 1246] 10 is a diagram showing an example of a display screen in which the ceiling time is being fluctuated per long map in the 25th control example. [Figure 1247] 10A (a) is a diagram showing an example of a display screen in the 25th control example where the same pattern is stopped twice in a row, and (b) is a diagram showing an example of a display screen in the 25th control example where the same pattern is stopped two consecutively in the 25th control example. [Figure 1248] 10A (a) is a diagram showing an example of a display screen during the first announcement performance in the 25th control example, and (b) is a diagram showing an example of a display screen when a button is pressed during the first announcement performance in the 25th control example. [Figure 1249] 10A (a) is a diagram showing an example of a performance screen after the advertising of the 25th control example, and (b) is a diagram showing an example of a display screen in the case where a hit is not announced in the advertising of the advertising of the 25th control example. [Figure 1250] 10A (a) is a diagram showing an example of the second stage announcement screen during the first announcement performance in the 25th control example, and (b) is a diagram showing an example of a separate display screen (holding sequence) for the first announcement performance in the 25th control example. [Figure 1251] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the 25th control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 25th control example. [Figure 1252] 1. (a) is a diagram schematically showing the specified contents of the first random number table set in the ROM of the main control device in the 25th control example, and (b) is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the 25th control example, and (c) is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the 25th control example. [Figure 1253] 1. (a) is a block diagram showing the configuration of the jackpot type selection table set in the ROM of the main control device in the 25th control example, (b) is a diagram schematically showing the specified contents of the special chart 1 jackpot table in the 25th control example, and (c) is a diagram schematically showing the specified contents of the special chart 2 jackpot table in the 25th control example. [Figure 1254] 10 is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the 25th control example, and (b) is a diagram schematically showing the specified contents of the normal table in the 25th control example. [Figure 1255] 1A and 2B are diagrams schematically showing the specified contents of the table for the special mode and first time in the 25th control example, and (b) are diagrams schematically showing the specified contents of the table for the second time in the 25th control example. [Figure 1256] 10.

[0021] FIG. 1 (a) is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 25th control example, and FIG. 10 (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 25th control example. [Figure 1257] 1 is a diagram schematically showing the specified contents of a reach mode selection table set in the ROM of the audio lamp control device of a pachinko machine in the 25th control example. [Figure 1258] 10 is a diagram schematically showing the specified contents of the addition time mode selection table set in the ROM of the audio lamp control device of the pachinko machine in the 25th control example. [Figure 1259] 10 is a diagram schematically showing the specified contents of a one-off notification mode selection table set in the ROM of the audio lamp control device of a pachinko machine in the 25th control example. [Figure 1260]1 is a block diagram showing the electrical configuration of a display control device in the 25th control example. [Figure 1261] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 25th control example. [Figure 1262] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the 25th control example. [Figure 1263] 10 is a flow chart showing ceiling determination processing executed by the MPU within the main control device in the 25th control example. [Figure 1264] 10 is a flow chart showing update processing executed by the MPU in the main control device in the 25th control example. [Figure 1265] 10 is a flow chart showing the ceiling time-saving update process executed by the MPU in the main control device in the 25th control example. [Figure 1266] 10 is a flow chart showing time-saving setting processing executed by the MPU in the main control device in the 25th control example. [Figure 1267] 10 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the 25th control example. [Figure 1268] 10 is a flow chart showing the startup process (main control device) executed by the MPU within the main control device in the 25th control example. [Figure 1269] 10 is a flow chart showing the startup process executed by the MPU in the audio lamp control device in the 25th control example. [Figure 1270] 10 is a flow chart showing the main processing (audio lamp control device) executed by the MPU within the audio lamp control device in the 25th control example. [Figure 1271] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 25th control example. [Figure 1272] 10 is a flow chart showing a state command reception process executed by the MPU in the audio lamp control device in the 25th control example. [Figure 1273] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the 25th control example. [Figure 1274] 10 is a flow chart showing winning command processing executed by the MPU in the audio lamp control device in the 25th control example. [Figure 1275] 10 is a flow chart showing a pre-reading performance setting process executed by the MPU in the audio lamp control device in the 25th control example. [Figure 1276] 10 is a flow chart showing the stopping performance setting process executed by the MPU in the audio lamp control device in the 25th control example. [Figure 1277] 10 is a flow chart showing general-scale diagram-related processes executed by the MPU in the audio lamp control device in the 25th control example. [Figure 1278] 10 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the 25th control example. [Figure 1279] 10 is a flow chart showing performance mode setting processing executed by the MPU in the audio lamp control device in the 25th control example. [Figure 1280] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 25th control example. [Figure 1281] 10 is a flow chart showing a continuous reach-time mode determination process executed by the MPU in the audio lamp control device in the 25th control example. [Figure 1282] 10 is a flow chart showing a detailed mode determination process executed by the MPU in the audio lamp control device in the 25th control example. [Figure 1283] 10 is a flow chart showing frame button input monitoring and performance processing executed by the MPU in the audio lamp control device in the 25th control example. [Figure 1284] 10 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the 25th control example. [Figure 1285] 10 is a flow chart showing command determination processing (display control device) executed by the MPU within the display control device in the 25th control example. [Figure 1286] 10 is a flow chart showing the suspension type command processing executed by the MPU in the display control device in the 25th control example. [Figure 1287] 10A (a) is a diagram showing an example of the opening screen (even numbered pattern) of a jackpot game in the 26th control example, and (b) is a diagram showing an example of a display screen in which a song is changed by pushing the button while the opening screen of a jackpot game in the 26th control example is displayed. [Figure 1288] 10A and 10B are diagrams showing display screens displayed in the background change effect in the 26th control example. [Figure 1289] 10A and 10B are diagrams showing the flow of the background change effect in the 26th control example. [Figure 1290] 10A (a) is a diagram showing an example of a freeze effect display screen at the start of a change in the 26th control example, and (b) is a diagram showing an example of a 6-second freeze effect display screen in the 26th control example. [Figure 1291] 14 is a diagram schematically showing a combination of the freeze effect and the winning expectation level in the 26th control example. [Figure 1292] 1 is a diagram schematically showing the specified contents of the special chart 1 jackpot table in the 26th control example. [Figure 1293] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 26th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 26th control example. [Figure 1294] 10.

[0011] FIG. 1A (a) is a diagram schematically showing the prescribed contents of the promotion lottery table set in the ROM of the voice lamp control device of the pachinko machine in the 26th control example, and FIG. 1B) is a diagram schematically showing the prescribed contents of the background change lottery table set in the ROM of the voice lamp control device of the pachinko machine in the 26th control example. [Figure 1295] 10 is a diagram schematically showing the specified contents of the addition time mode selection table set in the ROM of the audio lamp control device of the pachinko machine in the 26th control example. [Figure 1296] 10 is a flow chart showing a stopping performance setting process executed by the MPU in the audio lamp control device in the 26th control example. [Figure 1297] 10 is a flow chart showing the background change effect end processing executed by the MPU in the audio lamp control device in the 26th control example. [Figure 1298] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the 26th control example. [Figure 1299] 10 is a flow chart showing an opening performance process executed by the MPU in the audio lamp control device in the 26th control example. [Figure 1300] 10 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the 26th control example. [Figure 1301] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 26th control example. [Figure 1302] 10 is a flow chart showing a background change performance determination process executed by the MPU in the audio lamp control device in the 26th control example. [Figure 1303] 10 is a flow chart showing a background change effect lottery process executed by the MPU in the audio lamp control device in the 26th control example. [Figure 1304] 10 is a flow chart showing frame button input monitoring and performance processing executed by the MPU in the audio lamp control device in the 26th control example. [Figure 1305] 10 is a flow chart showing a music selection process executed by the MPU in the audio lamp control device in the 26th control example. [Figure 1306] 10A (a) is a diagram showing an example of a display screen during flight performance in the 27th control example, and (b) is a diagram showing an example of a display screen during bird stock in the 27th control example. [Figure 1307] 10A (a) is a diagram showing an example of a display screen at the time of development from the flight performance in the 27th control example, and (b) is a diagram showing an example of a display screen at the time of development from the flight performance in the 27th control example. [Figure 1308] 10 is a diagram showing the flow of delayed patterns of bird stock performance in the 27th control example. [Figure 1309] 10A (a) is a diagram showing an example of a display screen in the melody zone in the 27th control example, and (b) is a diagram showing an example of a display screen in the 27th control example when music is switched in the melody zone in the 27th control example. [Figure 1310] 10 is a diagram showing an example of a display screen when a song remaining in the song history in the 27th control example is newly reproduced. [Figure 1311] 10A (a) is a diagram showing an example of a display screen at the start of the variable performance in the 27th control example, and (b) is a diagram showing an example of a display screen for the reach performance (first half) in the 27th control example. [Figure 1312] 10 is a diagram showing the execution timing and type of each preview that is executed during the variable performance in the 27th control example. [Figure 1313]14 is a diagram schematically showing the flow of a variable effect executed during a special mode state in the 27th control example. [Figure 1314] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the 27th control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 27th control example. [Figure 1315] 10.

[0011] FIG. 1 (a) is a diagram schematically showing the specified contents of the first random number table set in the ROM of the main control device in the 27th control example, and FIG. 1 (b) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 27th control example. [Figure 1316] 10.

[0011] FIG. 1 (a) is a block diagram showing the configuration of the variation pattern selection table set in the ROM of the main control device in the 27th control example, FIG. 1 (b) is a diagram showing the specified contents of the normal table in the 27th control example, and FIG. 1 (c) is a diagram showing the specified contents of the second special change table in the 27th control example. [Figure 1317] 14 is a diagram schematically showing the specified contents of the special-change table in the 27th control example. [Figure 1318] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 27th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 27th control example. [Figure 1319] 10 is a diagram schematically showing the specified contents of the preview mode selection table set in the ROM of the audio lamp control device of a pachinko machine in the 27th control example. [Figure 1320] 10 is a diagram schematically showing the prescribed contents of the preview mode scenario selection table set in the ROM of the audio lamp control device of a pachinko machine in the 27th control example. [Figure 1321] 14 is a diagram schematically showing the specified contents of a music selection table set in the ROM of the audio lamp control device of a pachinko machine in the 27th control example. [Figure 1322] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 27th control example. [Figure 1323] 10 is a flow chart showing a variation execution judgment process executed by an MPU within the main control device in the 27th control example. [Figure 1324] 10 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the 27th control example. [Figure 1325] 10 is a flow chart showing a music switching process executed by the MPU in the audio lamp control device in the 27th control example. [Figure 1326] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 27th control example. [Figure 1327] 10 is a flow chart showing a process for setting a special mode during performance executed by the MPU in the audio lamp control device in the 27th control example. [Figure 1328] 10 is a flow chart showing a preview mode setting process executed by the MPU in the audio lamp control device in the 27th control example. [Figure 1329] 10 is a flow chart showing command determination processing (display control device) executed by the MPU within the display control device in the 27th control example. [Figure 1330] 10 is a flow chart showing bird stop command processing executed by the MPU in the display control device in the 27th control example. [Figure 1331] 1 is a front view of the gaming board of the pachinko machine of the 28th control example. [Figure 1332] 10A (a) is a diagram showing an example of a display screen when the jackpot pattern is stopped in the 28th control example, and (b) is a diagram showing an example of a special chart fluctuation start screen after the jackpot game has ended in the 28th control example. [Figure 1333] 10A is a diagram showing an example of a display screen when the button is long pressed while the reach change is in the 28th control example, and (b) shows an example of a display screen showing an example of a display screen in the 28th control example, which increases the chance of button pressing and pressing the button. [Figure 1334] 14 is a diagram schematically showing a combination of a pattern stop action and a role-emitting pattern in the 28th control example. [Figure 1335] 1 is a block diagram showing the configuration of a ROM within the audio lamp control device of a pachinko machine in the 28th control example. [Figure 1336] 14 is a diagram schematically showing the specified contents of the performance pattern selection table set in the ROM of the audio lamp control device of a pachinko machine in the 28th control example. [Figure 1337] 11 is a flow chart showing a process for setting a special mode during performance executed by the MPU in the audio lamp control device in the 28th control example. [Figure 1338] 10 is a flow chart showing initial variation mode setting processing executed by the MPU in the audio lamp control device in the 28th control example. [Figure 1339] 10 is a flow chart showing a detailed mode determination process executed by the MPU in the audio lamp control device in the 28th control example. [Figure 1340] 11 is a flow chart showing the performance pattern selection process executed by the MPU in the audio lamp control device in the 28th control example. [Figure 1341] 10A (a) is a diagram showing an example of a display screen in the first time-saving state in the 29th control example, and (b) is a diagram showing an example of a display screen in the case where a time-saving pattern is won while the first time-saving state in the 29th control example. [Figure 1342] 10A (a) is a diagram showing an example of a display screen for the first time-saving state ending fluctuation in the 29th control example, and (b) is a diagram showing an example of a display screen for the second time-saving state start in the 29th control example. [Figure 1343] 10A (a) is a diagram showing an example of a display screen during the jackpot C54 fluctuation in the first time-saving state in the 29th control example, and (b) is a diagram showing an example of a display screen during the jackpot B54 fluctuation in the first time-saving state in the 29th control example. [Figure 1344] 10 is a diagram showing the transition contents of each game state in the 29th control example. [Figure 1345] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the 29th control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 29th control example. [Figure 1346] 10A and 10B are diagrams that schematically show the specified contents of the first random number table set in the ROM of the main control device in the 29th control example, and (b) are diagrams that schematically show the specified contents of the time-saving random number table set in the ROM of the main control device in the 29th control example. [Figure 1347] 1. (a) is a block diagram showing the configuration of the jackpot type selection table set in the ROM of the main control device in the 29th control example, (b) is a diagram schematically showing the specified contents of the special chart 1 jackpot table in the 29th control example, and (c) is a diagram schematically showing the specified contents of the special chart 2 jackpot table in the 29th control example. [Figure 1348] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 29th control example. [Figure 1349] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the 29th control example. [Figure 1350] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the 29th control example. [Figure 1351] 10 is a flow chart showing time-saving setting processing executed by the MPU within the main control device in the 29th control example. [Figure 1352] 11 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the 29th control example. [Figure 1353] 11 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 29th control example. [Figure 1354] 11 is a flow chart showing a time-saving performance setting process executed by the MPU in the audio lamp control device in the 29th control example. [Figure 1355] 10 is a flow chart showing the performance setting process at the end of the first time-saving state, executed by the MPU in the audio lamp control device in the 29th control example. [Figure 1356] 10A and 10B are diagrams showing an example of a display screen in which the remaining number of times in the first time-saving state in the first modification of the 29th control example is smaller than the number of balls pending in the special figure 2, and (b) shows an example of a display screen in the time-saving extension suggestion mode in the first modification of the 29th control example. [Figure 1357] 10A (a) is a diagram showing an example of a display screen in the time-short extension suggestion mode in the first modification of the 29th control example, and (b) is a diagram showing an example of a jackpot display screen in the time-short extension suggestion mode in the first modification of the 29th control example. [Figure 1358] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the first modification of the 29th control example. [Figure 1359] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the first modification of the 29th control example. [Figure 1360] 10 is a flow chart showing a time-saving state performance setting process executed by the MPU in the audio lamp control device in the first modification of the 29th control example. [Figure 1361]10A (a) is a diagram showing an example of a display screen in the 30th control example in the special mode, and (b) is a diagram showing an example of a small hit change display screen in the special mode, in the 30th control example. [Figure 1362] 10A (a) is a diagram showing an example of a display screen in which a second special mode state is set in a small win win in the 30th control example, and (b) is a diagram showing an example of a display screen in which a third special mode state is set in a small win win in the 30th control example. [Figure 1363] 10A (a) is a diagram showing an example of a display screen in which the third special mode state is set in the small win win in the 30th control example and the remaining time reduction number increases, and (b) is a diagram showing an example of a display screen in the second special mode state in the 30th control example. [Figure 1364] 10 is a diagram showing the transition contents of each game state in the 30th control example. [Figure 1365] 1 is a block diagram showing the configuration of a ROM of the main control device in the 30th control example. [Figure 1366] 1 is a block diagram showing the configuration of the RAM of the main control device in the 30th control example. [Figure 1367] 10.

[0011] FIG. 1 (a) is a diagram schematically showing the specified contents of the first random number table set in the ROM of the main control device in the 30th control example, FIG. 1 (b) is a diagram schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the 30th control example, and FIG. 1 (c) is a diagram schematically showing the specified contents of the small random number table set in the ROM of the main control device in the 30th control example. [Figure 1368] 10. (a) is a block diagram showing the configuration of the jackpot type selection table set in the ROM of the main control device in the 30th control example, (b) is a diagram schematically showing the specified contents of the special chart 1 jackpot table in the 30th control example, and (c) is a diagram schematically showing the specified contents of the special chart 2 jackpot table in the 30th control example. [Figure 1369] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 30th control example. [Figure 1370] 10 is a flow chart showing the first special pattern determination process executed by the MPU within the main control device in the 30th control example. [Figure 1371] 10 is a flow chart showing a special diagram 1 time-saving lottery process executed by an MPU within the main control device in the 30th control example. [Figure 1372] 10 is a flow chart showing a small win lottery process executed by an MPU within the main control device in the 30th example of control. [Figure 1373] 10 is a flow chart showing game state update processing executed by the MPU in the main control device in the 30th control example. [Figure 1374] 10 is a flow chart showing the first special pattern change stop processing executed by the MPU in the main control device in the 30th control example. [Figure 1375] 10 is a flow chart showing a special diagram 1 small hit stop process executed by an MPU within the main control device in the 30th control example. [Figure 1376] 10 is a flow chart showing time-saving setting processing executed by the MPU in the main control device in the 30th control example. [Figure 1377] 10 is a flow chart showing a process for setting a special mode during performance that is executed by the MPU in the audio lamp control device in the 30th control example. [Figure 1378] 10 is a flow chart showing performance mode setting processing executed by the MPU in the audio lamp control device in the 30th control example. [Figure 1379] 10A (a) is a diagram showing an example of a display screen in a special state in the performance modification of the 30th control example, and (b) is a diagram showing an example of a time-saving pattern winning screen in a special state in the performance modification of the 30th control example. [Figure 1380] 10A (a) is a diagram showing an example of a jackpot winning screen in a special state in the performance modification of the 30th control example, and (b) is a diagram showing an example of a small win winning screen in a special state in the performance modification of the 30th control example. [Figure 1381] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the 31st control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 31st control example. [Figure 1382] 10 is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the 31st control example, and (b) is a diagram schematically showing the specified contents of the normal table in the 31st control example. [Figure 1383] 1 is a diagram schematically showing the specified contents of the special mode and first time-saving table in the 31st control example. [Figure 1384] 14 is a diagram schematically showing the specified contents of the second time-saving table in the 31st control example. [Figure 1385] 10 is a diagram showing the flow of a game in the case where a time-saving pattern is not selected during the first time-saving state in the 31st control example. [Figure 1386] 10 is a diagram showing the flow of a game when a time-saving pattern is won during the first time-saving state in the 31st control example. [Figure 1387] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the 31st control example. [Figure 1388] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the 31st control example. [Figure 1389] 10 is a flow chart showing time-saving setting processing executed by the MPU in the main control device in the 31st control example. [Figure 1390] 10 is a flow chart showing update processing executed by the MPU within the main control device in the 31st control example. [Figure 1391] 10 is a flow chart showing the startup process (main control device) executed by the MPU within the main control device in the 31st control example. [Figure 1392] 10A is a diagram showing an example of a performance screen when the first time shortened state begins in the 32nd control example, and (b) is a diagram showing an example of a display screen when the ally character LV is increased in the 32nd control example. [Figure 1393] 10A (a) is a diagram showing an example of a screen in which small hit fluctuations are in the first time-saving state in the 32nd control example, and (b) is a diagram showing an example of a screen in the 32nd control example. [Figure 1394] 10A (a) is a diagram showing an example of a revival screen from a failure to avoid in the 32nd control example, and (b) is a diagram showing an example of an invincible screen in the 32nd control example. [Figure 1395] 10A (a) is a diagram showing an example of a successful avoidance screen in the 32nd control example, and (b) is a diagram showing an example of a display screen in the 32nd control example in the 32nd control example. [Figure 1396] 1 is a block diagram showing the configuration of a ROM of the main control device in the 32nd control example. [Figure 1397] 12. FIG. 12 is a diagram schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the 32nd control example, and FIG. 12 is a diagram schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the 32nd control example, and FIG. 12 is a diagram schematically showing the specified contents of the small-saving random number table set in the ROM of the main control device in the 32nd control example. [Figure 1398] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 32nd control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 32nd control example. [Figure 1399] 10 is a diagram schematically showing the specified contents of the small win-win situation selection table set in the ROM of the audio lamp control device of a pachinko machine in the 32nd control example. [Figure 1400] 10 is a diagram schematically showing the specified contents of the time-saving pattern winning mode selection table set in the ROM of the audio lamp control device of a pachinko machine in the 32nd control example. [Figure 1401] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the 32nd control example. [Figure 1402] 10 is a flow chart showing update processing executed by the MPU in the main control device in the 32nd control example. [Figure 1403] 10 is a flow chart showing time-saving setting processing executed by the MPU in the main control device in the 32nd control example. [Figure 1404] 10 is a flow chart showing a time-saving performance setting process executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 1405] 10 is a flow chart showing a small hit performance setting process executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 1406] 10 is a flow chart showing the performance setting process at the end of the first time-saving state, executed by the MPU in the audio lamp control device in the 32nd example of control. [Figure 1407] 10A (a) is a diagram showing an example of a display screen displayed during the support state in the 33rd control example, and (b) is a diagram showing an example of a display screen displayed when a small win is selected that ends the support state in the 33rd control example. [Figure 1408] 10A (a) is a diagram showing an example of a display screen displayed as a state indicative effect in the 33rd control example, and (b) is a diagram showing an example of a display screen displayed as a stock-based increase in anticipation level. [Figure 1409] 10A is a diagram showing an example of a display screen displayed as a performance to increase the expectation level of a general map with low accuracy support in the 33rd control example, and (b) is a diagram showing an example of a display screen displayed as a performance to confirm the status of a general map with low accuracy support in the 33rd control example. [Figure 1410] 10 is a diagram showing state transitions between the states in the 33rd example of control. [Figure 1411] 10 is a diagram showing state transitions between the states in the 33rd example of control. [Figure 1412] 10 is a diagram showing state transitions between the states in the 33rd example of control. [Figure 1413] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the 33rd control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 33rd control example. [Figure 1414] 1. (a) is a diagram schematically showing the specified contents of the first random number table set in the ROM of the main control device in the 33rd control example, and (b) is a diagram schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the 33rd control example, and (c) is a diagram schematically showing the specified contents of the small random number table set in the ROM of the main control device in the 33rd control example. [Figure 1415] 14 is a diagram schematically showing the specified contents of a small hit type selection table set in the ROM of the main control device in the 33rd control example. [Figure 1416] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 33rd control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 33rd control example. [Figure 1417] 10 is a diagram schematically showing the specified contents of a state suggestion performance selection table set in the ROM of the audio lamp control device of a pachinko machine in the 33rd control example. [Figure 1418] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the 33rd example of control. [Figure 1419] 10 is a flow chart showing update processing executed by the MPU in the main control device in the 33rd example of control. [Figure 1420] 10 is a flow chart showing a small-ticket time-saving update process executed by an MPU within the main control device in the 33rd example of control. [Figure 1421] 10 is a flow chart showing time-saving setting processing executed by the MPU in the main control device in the 33rd example of control. [Figure 1422] 10 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the 33rd example of control. [Figure 1423] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 33rd control example. [Figure 1424] 10 is a flow chart showing the electric support performance setting process executed by the MPU in the audio lamp control device in the 33rd control example. [Figure 1425] 10. (a) is a diagram showing an example of a display screen in which the number of time-saving awarded in the second modification of the 29th control example is changing in which the number of time-saving awarded in the second modification of the 29th control example is less than the number of time-saving awarded in the second modification of the 29th control example is changing in which the number of time-saving awarded in the second modification of the 29th control example is changing in which the number of time-saving awarded in the second modification of the 29th control example is greater than the total number of time-saving honored in the combined number of time-saving remaining time-saving attempts. [Figure 1426] 6A and 6B are diagrams showing an example of a display screen during the time-limited jackpot change in the second modification of the 29th control example. [Figure 1427] 10 is a diagram showing an example of a display screen during the time-limited college jackpot change in the second modified example of the 29th control example. [Figure 1428] 10A and 10B are diagrams schematically showing the specified contents of the Special Diagram 2 Jackpot Table in the second modification of the 29th Control Example. [Figure 1429] 10 is a flow chart showing a time-saving state performance setting process executed by the MPU in the audio lamp control device in the second modification of the 29th control example. [Figure 1430] 10 is a flow chart showing the jackpot winning mode setting process executed by the MPU in the audio lamp control device in the second modification of the 29th control example. [Figure 1431] 10A (a) is a diagram showing an example of a display screen during the first time (4 times of time saving) in the third modification of the 29th control example, and (b) is a diagram showing an example of a display screen during the final change in the first time (4 times of time saving) in the third modification of the 29th control example. [Figure 1432] 1. (a) is a diagram schematically showing the specified contents of the special chart 1 jackpot table in the third modification of the 29th control example, and (b) is a diagram schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the third modification of the 29th control example. [Figure 1433] 10 is a flow chart showing a time-saving state performance setting process executed by the MPU in the audio lamp control device in the third modified example of the 29th control example. [Figure 1434] 10 is a flow chart showing a first time-saving state setting process executed by the MPU in the audio lamp control device in the third modification of the 29th control example. [Figure 1435] 10 is a flow chart showing the performance setting process at the end of the first time-saving state, executed by the MPU in the audio lamp control device in the third modification of the 29th control example. [Figure 1436] 10 is a flow chart showing frame button input monitoring and performance processing executed by the MPU in the audio lamp control device in the third modification of the 29th control example. [Figure 1437] 10A is a diagram showing an example of a display screen when the time-short extension suggestion mode is entered during the hold-change effect in the fourth modified example of the 29th control example, and (b) shows an example of a display screen in the time-short extension suggestion mode in the fourth modified example of the 29th control example. [Figure 1438] 10 is a flow chart showing a pre-reading performance setting process executed by the MPU in the audio lamp control device in the fourth modification of the 29th control example. [Figure 1439] 10 is a flow chart showing a hold change effect setting process executed by the MPU in the audio lamp control device in the fourth modification of the 29th control example. [Figure 1440] 10 is a flow chart showing a time-saving state performance setting process executed by the MPU in the audio lamp control device in the fourth modification of the 29th control example. [Figure 1441] 10A (a) is a diagram showing an example of a display screen in the first time-saving state in the fifth modified example of the 29th control example, and (b) is a diagram showing an example of a display screen in the case where a small win is won while the first time-saving state in the fifth modified example of the 29th control example. [Figure 1442] 10A is a diagram showing an example of a display screen in which the first time is cut off after winning five small wins in the fifth modified example of the 29th control example, and (b) shows an example of a display screen in which the second time-saving state based on the time-saving pattern A, which was stored in the fifth modified example of the 29th control example, is set. [Figure 1443] 10A (a) is a diagram showing an example of a display screen in the second time-saving state (time-saving pattern A) in the fifth modified example of the 29th control example, and (b) is a diagram showing an example of the final change screen in the second time-saving state (time-saving pattern A) in the fifth modified example of the 29th control example. [Figure 1444] 10 is a diagram showing an example of a display screen in the second time-saving state (time-saving pattern B) in the fifth modified example of the 29th control example. [Figure 1445] 10.

[0031] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the fifth modification of the 29th control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the fifth modification of the 29th control example. [Figure 1446] 10A (a) is a diagram schematically showing the specified contents of the small hit random number table set in the ROM of the main control device in the fifth modified example of the 29th control example, and (b) is a diagram schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the fifth modified example of the 29th control example. [Figure 1447] 1 is a block diagram showing the configuration of RAM in the voice lamp control device of a pachinko machine in the fifth modified example of the 29th control example. [Figure 1448] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the fifth modification of the 29th control example. [Figure 1449] 10 is a flow chart showing time-saving setting processing executed by the MPU in the main control device in the fifth modification of the 29th control example. [Figure 1450] 10 is a flow chart showing a time-saving state performance setting process executed by the MPU in the audio lamp control device in the fifth modified example of the 29th control example. [Figure 1451] 10 is a flow chart showing the performance setting process at the end of the first time-saving state, executed by the MPU in the audio lamp control device in the fifth modified example of the 29th control example. [Figure 1452] 6A and 6B are diagrams showing an example of the final variation display screen in the first time-saving state in the sixth modification of the 29th control example. [Figure 1453] 10 is a diagram showing the flow of a case in which a time-saving pattern is won during the first time-saving state in a modified example of the 31st control example. [Figure 1454] 10A (a) is a diagram showing an example of a start screen for the character reading performance in the 34th control example, and (b) is a diagram showing a display screen for the character reading performance in the 34th control example. [Figure 1455] 6A and 6B are diagrams showing an example of a display screen during the character reading-ahead performance target change in the 34th control example. [Figure 1456] 10A (a) is a diagram showing a character axle screen during which the character pre-reading display object is changing in the 34th control example, and (b) is a diagram showing a character stunning screen during which the character pre-reading display object is changing in the 34th control example. [Figure 1457] 10A (a) is a diagram showing a roaring screen after the character stunned in the 34th control example, and (b) is a diagram showing a roaring screen after the character stunned in the 34th control example. [Figure 1458] 10A (a) is a diagram showing a silent reach screen during character reading performance in the 34th control example, and (b) is a diagram showing a display screen when a winning hold is obtained during character reading performance in the 34th control example. [Figure 1459] 11 is a diagram showing a display screen for the change in the hold-up target in the 34th control example. [Figure 1460] 10A (a) is a diagram showing the display screen (first special chart change time) of the roulette performance (first time) in the 34th control example, and (b) is a diagram showing the character display screen (second time) of the roulette performance (first time) in the 34th control example. [Figure 1461] 6A and 6B are diagrams showing the result display screen for the roulette performance (first time) in the 34th control example. [Figure 1462] 10A (a) is a diagram showing a result display screen for the roulette performance (second time) in the 34th control example, and (b) is a diagram showing an example of a result display screen for the roulette performance (second time) in the 34th control example. [Figure 1463] 10A (a) is a diagram showing a display screen for the hero character performance in the 34th control example, and (b) is a diagram showing a display screen for the special character performance in the 34th control example. [Figure 1464] 10 is a diagram showing an example of a roulette display screen after the special character appears in the 34th control example. [Figure 1465] 10 is a diagram showing the flow of roulette performance and special chart fluctuations in the 34th control example. [Figure 1466] 1 is a block diagram showing the configuration of a ROM within the audio lamp control device of a pachinko machine in the 34th control example. [Figure 1467] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 34th control example. [Figure 1468] 14 is a diagram schematically showing the specified contents of the character mode selection table set in the ROM of the audio lamp control device of the pachinko machine in the 34th control example. [Figure 1469] 14 is a diagram schematically showing the specified contents of the audio type selection table set in the ROM of the audio lamp control device of the pachinko machine in the 34th control example. [Figure 1470] 14 is a diagram schematically showing the specified contents of the roulette scenario selection table set in the ROM of the audio lamp control device of the pachinko machine in the 34th control example. [Figure 1471] 14 is a diagram schematically showing the specified contents of the roulette mode determination table set in the ROM of the audio lamp control device of the pachinko machine in the 34th control example. [Figure 1472] 10 is a flow chart showing a pre-reading performance setting process executed by the MPU in the audio lamp control device in the 34th control example. [Figure 1473] 10 is a flow chart showing a pre-reading management process executed by the MPU in the audio lamp control device in the 34th control example. [Figure 1474] 10 is a flow chart showing a second read-ahead performance setting process executed by the MPU in the audio lamp control device in the 34th control example. [Figure 1475] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 34th control example. [Figure 1476] 10 is a flow chart showing a change in performance setting process for a read-up performance executed by the MPU in the audio lamp control device in the 34th control example. [Figure 1477] 10 is a flow chart showing a mode setting process during a pre-reading performance executed by the MPU in the audio lamp control device in the 34th control example. [Figure 1478] 10A is a diagram showing the performance mode of the operational performance during reach variation in the performance modification of the 28th control example, and (b) shows the performance mode of the operational performance when the operational performance in the performance modification of the 28th control example is started when the operational performance modification was performed. [Figure 1479] 10A (a) is a diagram showing an example of a display screen during a jackpot game in a performance modification of the 28th control example, and (b) is a diagram showing an example of a special chart change start screen after the jackpot game in a performance modification of the 28th control example. [Figure 1480] 10 is a diagram showing an example of a display screen during special chart fluctuation after the jackpot game has been completed in the performance modification of the 28th control example. [Figure 1481] 10A and 10B are diagrams showing an example of a display screen in the approach mode in the special mode state of each control example, and (b) shows an example of a display screen in the ultra approach mode in the special mode state of each control example, and FIG. [Figure 1482] 10A (a) is a diagram showing an example of a mode promotion effect during the approach mode in the performance examples of each control example, and (b) is a diagram showing an example of an outage display screen when mode promotion is performed in the performance examples of each control example. [Figure 1483] 10 is a diagram showing the execution timing and type of each preview that is executed during the variable performance in the 35th control example. [Figure 1484] 10A (a) is a diagram showing an example of a display screen at the start of the butterfly button performance in the 35th control example, and (b) is a diagram showing an example of a display screen in the button preview A in the butterfly button performance in the 35th control example. [Figure 1485] 6A and 6B are diagrams showing an example of a display screen when a button is operated during button preview A in the 35th control example. [Figure 1486] 10A (a) is a diagram showing an example of a display screen when a button is operated during button preview B in the 35th control example, and (b) is a diagram showing an example of a display screen when a button is not operated during button preview B in the 35th control example. [Figure 1487] 10A (a) is a diagram showing an example of a display screen during the first announcement performance in the 35th control example, and (b) is a diagram showing an example of a display screen in which flower icons and butterfly icons of different aspects in the 35th control example are displayed. [Figure 1488] 10A (a) is a diagram showing an example of the opening screen (even numbered pattern) of a jackpot game in the 35th control example, and (b) is a diagram showing an example of a display screen in which a song is selected by the select button while the opening screen of a jackpot game in the 35th control example is displayed. [Figure 1489] 10A (a) is a diagram showing an example of the opening screen (when a new song appears) of a jackpot game in the 35th control example, and (b) is a diagram showing an example of a display screen in which all the songs are opened by pushing the button while the opening screen of a jackpot game in the 35th control example is displayed. [Figure 1490] 10 is a flow chart showing an opening performance process executed by the MPU in the audio lamp control device in the 35th control example. [Figure 1491] 10 is a flow chart showing a music selection process executed by the MPU in the audio lamp control device in the 35th control example. [Figure 1492] 10 is a flow chart showing a detailed mode determination process executed by the MPU in the audio lamp control device in the 35th control example. [Figure 1493] 10 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the 35th control example. [Figure 1494] 1 is a front view of the gaming board of the pachinko machine of the 36th control example. [Figure 1495] 6A and 6B are diagrams showing examples of performance modes when the time-saving state and the special-mode state enter the 36th control example. [Figure 1496] 10A (a) is a diagram showing an example of the performance mode of the final time-saving fluctuation in the 36th control example, and (b) is a diagram showing an example of the performance mode of the event in which the final time-saving fluctuation in the 36th control example is notified of the transition to the rush mode. [Figure 1497] 10A is a diagram showing an example of the performance mode when the final time-saving fluctuation in the 36th control example announces that the transition to the normal mode is made, and (b) shows an example of the performance mode when the final time-saving fluctuation in the 36th control example is notified that there is a jackpot within the remaining hold. [Figure 1498] 10 is a diagram showing an examp...

Claims

[Claim 1] A first ball entry means through which a game ball can be entered; A second ball entry means different from the first ball entry means, In a gaming machine having at least a first prize ball that can be awarded to a player when a gaming ball enters the first ball entry means and a second prize ball that can be awarded to a player when a gaming ball enters the second ball entry means, The gaming machine includes: A predetermined calculation corresponding to the number of prize balls awarded during a predetermined game period is executed, The system is configured such that the awarding of the prize balls is restricted in accordance with the result of the predetermined calculation becoming a specific result, compared to the game situation during the predetermined game period; A gaming machine characterized in having at least a first display whose appearance can be changed in response to the awarding of the first prize ball during the specified gaming period, and a second display which is different from the first display and whose appearance can be changed in response to the awarding of the first prize ball or the second prize ball.