Method, computer program product, test signal, and test device for testing data-transferring arrangement including transmitter, channel, and receiver

Abstract

To provide a method, computer program product, test signal, and test device for testing a data-transferring arrangement including a transmitter, channel, and receiver.SOLUTION: A method for testing a data-transferring arrangement 4 includes acquiring a channel output-side data set (KAD) based on an initial test dataset (IST), evaluating the KAD to determine an error distribution (FV) and a bit error ratio (BER) in the KAD, determining a test subsequence (PSS) by evaluating the FV, forming a further test data set (CPS) with the PSS, applying the CPS, acquiring a present KAD based on the CPS, evaluating the present KAD to determine a present FV and a present BER in the present KAD, comparing the present BER with a predetermined threshold value (SW), and, if the comparison reveals that the BER is larger than the SW, repeatedly carrying out the steps.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a method, a computer program product, a test signal, and a test apparatus for testing a data transfer configuration including a transmitter, a channel, and a receiver.

[0002] In information theory, a channel (also called an information channel, transmission channel, or transmission path) is understood as a concept for modeling the loss of information as a result of failures during transmission. In this case, the channel is not limited to the medium through which the transmission takes place, but rather describes the entire transmission path from the transmitter to the receiver. The data transmitter and data receiver, as well as possibly any intervening components, can also be affected. [Background technology]

[0003] At present, the data receiver is tested using a so-called conformance test with a previously defined test signal. The test signal has a defined test pattern and introduced “obstacles,” i.e., noise, jitter, etc., which are deviations from the ideal signal introduced in the most targeted and precise way possible. The type, intensity, and “mixture” of the added obstacles are defined by their respective specifications, e.g., (Non-Patent Document 1).

[0004] Such "compliance failures" are defined by each data communication standard, and the specific parameters and their values ​​may differ. Examples of failures are as follows: Random noise: (Pseudo) random values ​​are added to the signal. Periodic noise, Random jitter: Level transitions occur slightly earlier or slightly later than they should, and the deviation is random. Deterministic (specifically periodic) jitter: Level transitions occur slightly earlier or slightly later than they should, and the deviation is defined by the periodic law or some other algorithm. Crosstalk (deterministic), and Intersymbol interference due to channel loss (deterministic, see also Non-Patent Document 2).

[0005] The fault mimics the actual distortions that affect signals in a real working environment. In other words, the test signal can be considered a payload signal combined with an interference signal in the form of a fault, in order to simulate the actual payload signal distorted by the interference signal.

[0006] In recent data communication standards, these distortions are so significant due to high data speeds that no data receiver can receive an error-free signal. Therefore, according to the specifications, data receivers may have relatively frequent "read errors." This is defined by the number of misinterpreted bits, expressed as the bit error rate (BER), which is the maximum acceptable percentage of the total number of bits received, if the signal contains digital data, for example, in the form of a bit string.

[0007] To correct these errors, so-called "forward error correction" (FEC) is used. This is a specific encoding of data, for example, in the form of a dataset. A further technique used to reduce signal distortion is scrambling. Therefore, data arriving at a data receiver is usually scrambled and pre-coded for FEC.

[0008] Since the FEC is not part of the physical layer, the performance of the physical layer is characterized by the pre-FEC BER. When testing the physical layer, pseudo-random data streams (PRBS) are typically used as test signals. PRBS are suitable for testing purposes because they load the data receiver more on average than actual test signals of the same length. In contrast to general test signals, these data streams are not scrambled and not coded into the FEC, so the post-FEC BER cannot be determined for these data streams.

[0009] Compliance testing is necessary to enable minimum verification of the data receiver, but it cannot identify and confirm design problems in the worst-case scenario (i.e., the worst possible signal or maximum fault) of the device under test (DUT). The main reason for this is that PRBS does not fully represent all possible datasets that can be transmitted during actual operation. PRBS loads the receiver more on average than actual data of the same length, but there may be actual datasets that load the receiver more. [Prior art documents] [Non-patent literature]

[0010] [Non-Patent Document 1] PCI Express [Non-Patent Document 2] https: / / teledynelecroy.com / doc / understanding-dj-ddj-pj-jitter-calculations [Non-Patent Document 3] IBIS (Buffer Information Specification) [Non-Patent Document 4] AMI (Algorithmic Modeling Interface) [Non-Patent Document 5] PCI Express 6 Standard [Non-Patent Document 6] IEEE802.3bs / cd(50GAUI C2M / C2C,KR-n,CR-n) [Non-Patent Document 7] IEEE802.3ck(100GAUI C2M / C2C,KR-n,CR-n) [Non-Patent Document 8] OIF CEI-56G [Non-Patent Document 9] OIF CEI-112G [Non-Patent Document 10] PAM-N Standard [Overview of the project]

Problems to be Solved by the Invention

[0011] Therefore, an object of the present invention is to provide a method for expanding and / or complementing such a conformity test in order to more easily determine critical elements in, for example, the design of a data receiver.

Means for Solving the Problems

[0012] An object of the present invention is a method for testing a data transfer configuration, the method comprising the following steps, namely generating an initial test data set with a predetermined minimum number of repetitions; applying the initial test data set to the data transfer configuration; acquiring a channel output side data set based on the initial test data set; evaluating the channel output side data set to determine an error distribution within the channel output side data set; evaluating the channel output side data set to determine a bit error rate within the channel output side data set; determining at least one test subsequence by evaluating the error distribution; forming a further test data set comprising at least the determined test subsequence; applying the further test data set to the data transfer configuration; acquiring a current channel output side data set based on the further test data set; evaluating the current channel output side data set to determine a current error distribution within the current channel output side data set; evaluating the current channel output side data set to determine a current bit error rate within the current channel output side data set; The steps begin with the step of comparing the current bit error rate with a predetermined threshold, and if the comparison indicates that the bit error rate is greater than the predetermined threshold, then evaluating the error distribution to determine the test subsequence that will produce at least one error, and are performed, specifically in an iterative manner. This is achieved using a method that includes the step of evaluating the current channel output dataset for error analysis, if the comparison indicates that the current bit error rate is less than a predetermined threshold.

[0013] In other words, a two-step procedure is proposed, in which the results obtained by using an initial test dataset are validated to identify specific error-prone subsequences of the test dataset, and then used to form a further second test dataset that is particularly sought after or critical. This test dataset can then be used to refine and make the test more critical. Moreover, by comparing or summarizing specific error-prone subsequences, the time required for such a test can be reduced.

[0014] A test subsequence can, for example, produce at least one single error. Thus, each test subsequence and each error has its own unique role. In contrast, a test subsequence can produce multiple errors. For this reason, in the iterative process, further test subsequences are identified and added to the test dataset to further optimize the test dataset in a stepwise manner, meaning that the test pattern is adapted to be the most complex (which places the maximum load on the receiver), i.e., to have a signal sequence that is possible during actual operation.

[0015] According to one embodiment, the channel parameters of the data transfer configuration are determined in a further step. The determined channel parameters may be the single-bit response (SBR(t)), delay, and / or length of the signal transferred through the channel of the data transfer configuration.

[0016] According to a further embodiment, the step of determining a test subsequence that produces at least one error by evaluating the error distribution is at least the following steps: The steps include: checking whether the determined bit error rate is smaller than a predetermined limit, and if the determined bit error rate is smaller than the predetermined limit, performing a further step; A step of determining at least one further test subsequence based on the determined test subsequence, The method comprises the step of adding further test subsequences to further test datasets.

[0017] Therefore, if the channel output side test dataset has too few errors for a significant evaluation, i.e., the bit error rate is too low, further test subsequences are determined based on the previously determined test subsequences, for example, by modifying the previously determined test subsequences. In other words, "artificial" test subsequences are generated, which are similar to the previously determined test subsequences and therefore should also produce errors. These test subsequences are then added to the test dataset, resulting in an increase in the number of test subsequences in the test dataset.

[0018] According to a further embodiment, the step of determining at least one further test subsequence based on the determined test subsequence is: This includes determining the reciprocal of the error-causing test subsequence as a further test subsequence.

[0019] For this purpose, in the case of a quaternary signal such as a PAM-4 signal, a complementary quaternary signal is generated. For example, if we can assume that the quaternary signal has values ​​of 0, 1, 2, and 3, then the reciprocal of signal sequence 13032 is signal sequence 20301. In this case, each reciprocal can be determined from a single test subsequence or from all test subsequences.

[0020] According to a further embodiment, the step of determining at least one further test subsequence based on the determined test subsequence is: This includes forming a group of test subsequences having the same symbol at a predetermined point in the pulse response.

[0021] In other words, only test subsequences in which at least one symbol at a given point is identical are selected. The given point may be the highest value of the pulse response.

[0022] According to a further embodiment, the step of determining at least one further test subsequence based on the determined test subsequence is: This includes determining and evaluating predetermined similarity criteria for test subsequences in order to select them.

[0023] The preferred test subsequence can thus be determined in a particularly simple manner.

[0024] Furthermore, the present invention includes a computer program product configured to perform such a method, a test data set determined according to such a method, and a test apparatus.

[0025] The present invention will be described in more detail below with reference to the attached schematic diagram. [Brief explanation of the drawing]

[0026] [Figure 1] An overview of the test apparatus according to the present invention is shown. [Figure 2] A schematic diagram of the pulse response is shown. [Figure 3] A schematic diagram of the first eye diagram is shown. [Figure 4] A schematic diagram of the second eye diagram is shown. [Figure 5] A schematic diagram of the third eye diagram is shown. [Figure 6] Figure 1 shows a schematic diagram of the sequence of methods for operating the test apparatus shown. [Figure 7] Figure 1 shows a schematic diagram of further details of the sequence of methods. [Modes for carrying out the invention]

[0027] First, refer to Figure 1.

[0028] The figure shows a test apparatus 2 for testing a data transfer configuration 4, comprising at least one data transfer channel 28 and a device under test 6 (DUT). In this exemplary embodiment, the test apparatus 2 may be configured, for example, in accordance with (Non-Patent Document 3) or (Non-Patent Document 4).

[0029] In this exemplary embodiment, channel 28 is configured as a wired channel. Unlike this exemplary embodiment, channel 4 can also be configured in a wireless manner, i.e., as a wireless link.

[0030] Channel 28 has a high acceptable bit error rate (>10 -6 It can be considered a serial high-speed interface with the following characteristics. Such serial high-speed interfaces operate at multi-gigabit data rates (5 Gbit / s or higher). Recent serial high-speed interfaces are typical modern interfaces that use amplitude modulation with more than two levels, specifically because the distortion from the signal is large at high data rates, and a relatively high bit error rate is possible due to the low signal-to-noise ratio. These modulations are called PAM-N, in which case N is the number of levels.

[0031] Early communication standards had very frequent errors, for example, a bit error rate (BER) < 10. -12 The goal was often to reach 10 12 This means that one error occurs for every bit received. True verification of the bit error rate (BER) was therefore virtually impossible, i.e., at a data transfer rate of approximately 1 Gbit / s, 10 12 The bit error rate should mean that an error occurs approximately once every 1000 seconds on average. A statistically reliable measurement of the actual BER should require several hours of testing.

[0032] According to the aforementioned standard for the new high-speed interface, the acceptable bit error rate is much higher (BER approximately 10). -6 This allows for the actual measurement of the bit error rate, and as a result, the proposed invention becomes feasible.

[0033] In this exemplary embodiment, a PAM-4 signal having four possible states or symbols (0, 1, 2, and 3) can be transmitted via channel 28. Unlike this exemplary embodiment, datasets with other encoding schemes, such as PAM-2, PAM-3, PAM-8, PAM-16, ENRZ, or CNRZ-5, can also be transmitted via channel 28.

[0034] Furthermore, in this exemplary embodiment, the amplitude-modulated signal can be transmitted via channel 28.

[0035] Channel 28, according to Non-Patent Document 5, may include multiple lines, typically 8, 16, or 32. These lines are operated with parallel routing, but each line itself is a serial data line. This configuration is also called "multi-serial". In this exemplary embodiment, each line is tested separately and sequentially. Unlike this exemplary embodiment, the test apparatus 2 can be configured for multi-lane testing (for multiple lines simultaneously).

[0036] Other data communication standards may be those described in (Non-Patent Document 6), (Non-Patent Document 7), (Non-Patent Document 8), (Non-Patent Document 9), or other (Non-Patent Document 10).

[0037] Furthermore, in this exemplary embodiment, channel 28 is configured to transmit different signals.

[0038] Different signal transmissions can be used in this exemplary embodiment. In the concept of different signal transmissions, to reduce noise, the signal S(t) is transmitted in the form of two physical subsignals, namely s+(t)=S(t) / 2 and s-(t)=-S(t) / 2. These two subsignals s+(t) and s-(t) are transmitted on separate lines of channel 4 and arrive at the receiver synchronously, so the original signal can be calculated as follows: S(t) = s + (t) - s - (t)

[0039] Unlike this exemplary embodiment, other signaling schemes, such as Chord signals, can also be used.

[0040] In this exemplary embodiment, the test apparatus 2 includes a CPS generator 8, a PSS detector 10, a signal generator 12, an error detector 14, a CPS eye visualizer 16, a PSS classifier 18, and a post-FEC decision unit 20 as components, while in this exemplary embodiment, the data transfer configuration 4 includes a data transfer channel 4 with the device under test 6.

[0041] The signal generator 12 can be considered as the transmitter of the data transfer configuration 4, while the device under test 6 can be considered as the receiver of the data transfer configuration 4.

[0042] In this exemplary embodiment, the signal generator 12 is assigned to the test apparatus 2, so channel 28 and the device under test 6 are tested in this exemplary embodiment. Unlike this exemplary embodiment, the test apparatus 2 may also be assigned channel 28 or, additionally, the signal generator 12. In that case, only the device under test 6, or any combination consisting of the signal generator 12 (transmitter), channel 18, and the device under test 6 (receiver) is tested.

[0043] Test apparatus 2 and its components described herein may include hardware and / or software components configured to address each of the problems and / or functions described below.

[0044] For the purpose of testing the data transfer channel 28, for example, the signal generator 12 of the test apparatus 2 is configured to generate an initial test data set IST with a predetermined minimum number of iterations and to apply the initial test data set IST to channel 4. In this exemplary embodiment, the signal generator 12 has a sampling rate of at least 64 Gsamples / s and a vertical resolution of at least 8 bits.

[0045] The test device 2 is configured to acquire the channel output side dataset KAD based on the initial test dataset IST, and to evaluate the channel output side dataset in order to determine the error distribution FV in the channel output side signal KAS.

[0046] For this purpose, in this exemplary embodiment, the device under test 6 is configured to determine the channel output data set KAD from the channel output signal KAS, re-encode the channel output signal KAS, and forward it to the error detector 14.

[0047] In other words, in this exemplary embodiment, the function generator 12, acting as a transmitter, provides a channel input signal KES based on an initial test dataset IST, which is transmitted via channel 28 and received by the device under test 6, acting as a receiver, in the form of a channel output signal KAS, which is then converted back into a channel output dataset KAD.

[0048] In this case, a dataset combines information / values ​​associated with an object (entity) and has a defined start and end, in contrast to a data stream without a defined start and end. Similar terms include tuple, group, data record, and record set. Conversely, a signal is a symbol with a meaning assigned to it.

[0049] The initial test dataset IST can consist of conforming test patterns (= "fixed patterns", e.g., PRBS31Q or SSPRQ) and introduced "faults" (e.g., noise, jitter, etc.). With transfer rates exceeding 20 gigasymbols / second, as is typical of modern interfaces, the transmission of the initial test set IST is (2*10 12 / 20*10 9 This takes less than 100 seconds, or less than 2 minutes, which makes it possible to empirically obtain error statistics for the entire pattern.

[0050] In this case, the error distribution FV indicates where the error occurred in the channel output signal KAS, for example, by comparing it with the initial test dataset IST.

[0051] The PSS detector 10 evaluates the error distribution FV to determine the test subsequence PSS (problematic subsequence).

[0052] Here, the data received by the receiver, i.e., the channel output dataset KAD, is compared to the originally transmitted data from the initial test dataset IST, and it is established that it differs by, for example, only four symbols (four errors exist). For simplicity, we assume that the errors are generally distributed throughout the signal, but are concentrated in parts of the signal.

[0053] The original data for the initial test dataset IST can be read as follows: ...100002321020120302000002021010000310210310230123333023...

[0054] The received channel output dataset KAD is read as follows: Different 101002321020120302000002021010100311210310230123233023…

[0055] The four errors occur in the following subsequence (assuming length N=5 and delay m=2): 10000 (received as 10100) - This error occurs twice here. 31021 (received as 31121), and 23333 (received as 23233).

[0056] As a result, 4 with length N=5 5 From the subsequences =1024, only three subsequences each produce an error, and even subsequence 10000 produces an error twice. All three subsequences are classified as PSS, one of the subsequences (10000) with a higher probability than the others.

[0057] In this exemplary embodiment, the test subsequence PSS contains a portion of the initial test set IST, which includes errors according to the error distribution FV.

[0058] The CPS generator 8 is configured to determine a further test dataset CPS (problematic column to conform to) with at least a determined test subcolumn PSS, and to apply further test signals to channel 28 based on the test dataset CPS.

[0059] For this purpose, the CPS generator 8 may include artificial intelligence (AI) components in the form of, for example, evolutionary algorithms; that is, multiple CPSs generating rules automatically evolve and are constantly compared with each other in terms of post-FEC error and / or PSS frequency per CPS. Suboptimal rules are discarded, while the best rule survives and undergoes further mutations until an optimal generating rule is found. Alternatively, a strategy for maximizing acquired rewards can be learned independently using reinforcement learning. The number of PSS or post-FEC BERs is used here as the “reward”.

[0060] Neither method requires data training; both methods learn on their own in the process of solving the problem.

[0061] In addition, methods that do not involve monitoring the learning process can be used. Furthermore, the CPS generator 8 can also be configured to have no AI components.

[0062] Furthermore, the unit 20 that determines the post-FEC of the test device 2 is configured to evaluate the channel output dataset KAD in order to determine the bit error rate BER.

[0063] As a result, in this exemplary embodiment, the test apparatus 2 is configured to determine at least one test subsequence PSS by evaluating the error distribution FV, and to determine a further test dataset CPS comprising at least the determined test subsequence PSS.

[0064] Furthermore, in this exemplary embodiment, the test device 2 is configured to apply additional test signals to channel 28 based on the test dataset CPS and to acquire the current channel output dataset KAD based on the additional test dataset CPS.

[0065] Furthermore, in this exemplary embodiment, the test apparatus 2 is configured to evaluate the current channel output dataset KAD in order to determine the current error distribution FV in the channel output dataset KAD and to determine the current bit error rate BER in the channel output dataset KAD.

[0066] Furthermore, in this exemplary embodiment, the test apparatus 2 is configured to compare the current bit error rate BER with a predetermined threshold SW. If the comparison indicates that the bit error rate BER is greater than the predetermined threshold SW, at least one further test subsequence PSS is determined by evaluating the error distribution FV.

[0067] If the determined bit error rate BER is greater than a predetermined threshold SW, in this exemplary embodiment, the test apparatus 2 is configured to determine at least one further test subsequence PSS by evaluating the error distribution FV, determine a further test signal CPS comprising at least the determined test subsequence PSS, apply the further test signal to channel 4 based on the test dataset CPS, determine the current channel output dataset KAD based on the further test dataset CPS, evaluate the current channel output dataset KAD to determine the current error distribution FV within the channel output dataset KAD, and re-evaluate the current channel output dataset KAD to determine the current bit error rate BER within the current channel output dataset KAD.

[0068] Furthermore, in this exemplary embodiment, the test apparatus 2 is configured to evaluate the channel output side dataset KAD for error analysis if the comparison indicates that the current bit error rate BER is smaller than a predetermined threshold SW.

[0069] In a repetitive manner, the test apparatus 2, equipped with the described components, then checks for further test subsequences PSS, and thus adds further test subsequences PSS to the further test dataset CPS in order to further optimize the test dataset in a stepwise manner. In other words, the bit error rate BER increases in the course of each iterative pass. For example, the increase in the bit error rate BER can be terminated when it is less than a threshold SW in the course of each of three consecutive passes. The threshold SW can be, for example, 0.1%, 0.05%, or defined by the user.

[0070] Furthermore, in this exemplary embodiment, the test apparatus 2 is configured to verify whether the bit error rate BER, determined by evaluating the channel output side dataset KAD, is less than a predetermined threshold value GW. If the bit error rate BER is less than the threshold value GW, the process of determining at least one further test subsequence PSS based on the determined test subsequence PSS is affected, and the further test subsequence PSS is added to the further test signal CPS.

[0071] In this case, the test apparatus 2 may be configured to determine the reciprocal of a test subsequence PSS as a further test subsequence PSS, and / or to form a group of test subsequence PSSs having the same symbol at a predetermined point in the pulse response, specifically the highest pulse response, and / or to evaluate a predetermined similarity criterion MET associated with the test subsequence PSS.

[0072] Evaluating the channel output dataset KAD for error analysis may include the following tests:

[0073] Interference immunity test: The receiver interprets a signal with a bit error rate (BER) lower than the maximum value permitted by the standard, even in the case of noise. For this test, a specific amount of noise (as defined in the specification) is added to the signal.

[0074] The jitter tolerance test is similar, but jitter is added instead of noise.

[0075] Some standards describe combinations of different interferences rather than signal interferences.

[0076] Furthermore, it can determine the post-FEC error.

[0077] Further evaluation methods will be explained later.

[0078] Furthermore, in this exemplary embodiment, the test apparatus 2 is configured to determine the channel parameters SBR(t), N, and m of channel 4 before the iterative pass.

[0079] In relation to this, please refer to Figure 2 as an additional point.

[0080] In this exemplary embodiment, the determined channel parameters are the single-bit response SBR(t), the delay m, and / or the length N of the signal S(t).

[0081] The figure shows an ideal single pulse 22 of a PAM-4 signal S(t) with possible symbols 0, 1, 2, and 3, and the corresponding pulse response 24, also known as a single-bit response or SBR (single-bit response SBR(t)).

[0082] In the case of an ideal channel 4, an ideal single pulse 22 corresponds to an ideal pulse response; that is, an ideal single pulse affects only the pulse at symbol 0 and not the other symbols.

[0083] However, in reality, the pulse response 24 is not as sharp due to channel effects, has a delay or delay m, extends over multiple symbols N, or has a signal S(t) of a corresponding length.

[0084] In this example, the number of symbols N or the signal length is N=5, and the delay m or delay is m=2. In other words, the receiver should "see" the single pulse only at time 2, rather than at time 0 when it occurred. Here, the signal level roughly corresponds to the peak value of an ideal single pulse 22.

[0085] Furthermore, an eye diagram can be generated and evaluated for evaluation purposes.

[0086] In relation to this, please refer to Figures 3-5 for further information.

[0087] In this case, Figure 3 shows a simple eye diagram with one eye 26, Figure 4 shows a PAM-4 eye diagram with four levels and three eyes 26, and Figure 5 shows an eye diagram with a closed eye 26.

[0088] An eye diagram is a graphical representation of an electrical signal profile that can be used to evaluate the signal quality of digital data transfer. While eye diagrams can be replaced by a series of numerical features, they are also very simple, allowing them to be evaluated by very simple algorithms; in other words, the evaluation can be fully automated, requiring no user intervention.

[0089] An eye diagram is a kind of summary of a potentially statistically distributed signal profile. Where appropriate, color coding is used so that the potential of the signal profile becomes apparent from the colors. As a result of the influence the signal receives, theoretically infinitely abrupt transitions proceed from 0 to 1 and vice versa, and here they do not proceed mathematically as a rectangle or constant at the same point, but rather as transitions with a more or less ambiguous width, and as a result the typical shape of the eye rises in the center in the case of a "small obstruction" (see Figure 3).

[0090] In other words, the eye diagram visualizes signal transfer problems. If there are no problems, or only minor problems, eye 26 should be wide open, indicating no signal transitions.

[0091] If transmission interference is predictable because it is deterministic, the signal can still be received using equalization. Precisely recognizing the subsequences in which transitions occur at eye 26 helps developers optimize the design and, in particular, the equalization process.

[0092] When eye 26 is closed (see Figure 5), it is impossible to reconstruct the signal using a simple threshold detector. Even when eye 26 is open, identification may not be possible if the level is not large enough to drive the subsequent stage. When the eye is open horizontally, it indicates a time range in which the logical instantaneous state can be evaluated. If the phase relationship is unclear or changes too much due to jitter, eye 26 closes.

[0093] Furthermore, the evaluation may be influenced based on the following methods:

[0094] The problem is diagnosed by the classification of the test subsequence PSS. In order to define the class to which a test subsequence PSS belongs, a check is performed to establish whether each test subsequence PSS possesses one of the following class-defining characteristics.

[0095] 1. A composite test subsequence PSS (different combinations have different symbols, and the subcombinations do not have repeating signals, e.g., 230131201132) represents an equalization problem. 2. A test subsequence PSS with an uneven mark density (i.e., the mean value of the test subsequence PSS is significantly lower or significantly higher than the mean value of the signal, for example, the PAM-4 test subsequence PSS 3232223332 has a mean value of 2.5, but the mean level of the PAM-4 signal is (0+1+2+3) / 4=1.5. This indicates a baseline fluctuation within the receiver or a problem in the AC coupling of the receiver's front end. 3. A test subsequence PSS consisting of long segments of consecutive identical symbols (e.g., 0000001) or symbols with small voltage amplitudes (e.g., PAM-4 signal PSS1221221112) indicates a clock repair problem.

[0096] A test subsequence PSS may also possess multiple characteristics that simultaneously belong to multiple classes. For example, a test subsequence PSS with column 100001001 belongs to classes 2 and 3.

[0097] Furthermore, in this exemplary embodiment, the test apparatus 2 is configured to determine the reciprocal INV (see Figure 7) of the test subsequence PSS as the current further test subsequence PSS when the bit error rate BER is less than a predetermined limit value.

[0098] For example, in the case of the PAM-4 signal 20301, the reciprocal INV is read as 13032.

[0099] In this exemplary embodiment, it can be assumed that all effects on channel 4 are vertically symmetrical for signal transmission using different transfers.

[0100] The conditions for forwarding subsequences s+(t) and s-(t) are generally the same, and therefore an increase in s+ (which the receiver may mistakenly interpret as 0 instead of 1) is just as likely as an increase in s- (which the receiver may mistakenly interpret as 3 instead of 2).

[0101] Furthermore, in this exemplary embodiment, the test apparatus 2 is configured to form a group of test subsequences PSS having identical symbols at predetermined points in the pulse response, specifically the highest pulse response. In this case, identical symbols are understood to mean the symbols in the sequence where the error actually occurs.

[0102] Furthermore, in this exemplary embodiment, the test apparatus 2 is configured to determine and evaluate predetermined similarity criteria associated with the test subsequence PSS in order to select the test subsequence PSS.

[0103] An example of a similar criterion, MET, is as follows:

number

[0104] Two columns, s1 and s2, are generally similar if the similarity metric (s1, s2) = 0. The larger the similarity metric (s1, s2), the less similar the two columns, s1 and s2, are.

[0105] For the SBR single-bit response SBR(t) of channel 4 shown in FIG. 2, each SBR value is read as, for example, SBR(0)=0.05, SBR(1)=0.15, SBR(2)=0.4, SBR(3)=0.3, SBR(4)=0.1.

[0106] The similarity criterion MET for two columns s1 = 01300 and s2 = 10300 is then given as follows. Similarity metric(01300,10300)=(0 - 1) 2 ·0.05+(1 - 0) 2 ·0.15+0+0+0 = 0.2

[0107] This value is close to 0, and the columns s1, s2 are actually similar.

[0108] In contrast, the similarity criterion MET for columns s1 = 01300 and s2 = 12211 has a value of 1, which means that these columns s1, s2 are completely different.

[0109] Regarding the specific method sequence for operating the test device 2, FIGS. 6 and 7 will be additionally referred to and described next.

[0110] The first step S100 is involved in determining the channel parameters (SBR(t), N, m) of channel 4.

[0111] A further step S200 is involved in generating an initial test data set IST with a predetermined minimum number of repetitions.

[0112] A further step S300 is involved in applying the initial test data set IST to channel 28.

[0113] A further step S400 is involved in obtaining a channel output side data set KAD based on the initial test data set IST.

[0114] A further step S500 involves evaluating the channel output test dataset KAD to determine the error distribution FV within the channel output test dataset KAD.

[0115] A further step S600 involves evaluating the channel output dataset KAD to determine the bit error rate BER within the channel output dataset KAD.

[0116] A further step S700 involves determining the test subsequence PSS by evaluating the error distribution FV.

[0117] To this end, a further step S740 involves verifying whether the bit error rate BER, determined by evaluating the channel output dataset KAD in step S600, is smaller than a predetermined limit value GW.

[0118] If the bit error rate BER is greater than or equal to a predetermined limit value GW, the method proceeds to a further step S800. Unlike this exemplary embodiment, the method may also proceed to a further step S800 if the bit error rate BER is not equal to the predetermined limit value GW.

[0119] In contrast, if the bit error rate BER is less than a predetermined threshold GW, the following steps are performed.

[0120] A further step S760 involves determining at least one additional test subseries PSS based on the determined test subseries PSS.

[0121] For this purpose, a further step S762 involves determining the reciprocal INV of the test subsequence PSS as a further test subsequence PSS.

[0122] Furthermore, for this purpose, a further step S764 involves forming a group G of test subsequences PSS having the same symbol at a predetermined point in the pulse response, specifically the highest pulse response.

[0123] Furthermore, for this purpose, a further step S766 involves determining a predetermined similar criterion MET with respect to the test subseries PSS and evaluating it in order to select the test subseries PSS.

[0124] A further step S780 involves adding an additional trial subsequence PSS to an additional trial dataset CPS.

[0125] A further step S800 involves determining a further trial dataset CPS with at least the determined trial subsequence PSS.

[0126] The first step, S900, involves applying an additional test dataset, CPS, to channel 28.

[0127] A further step S1000 involves determining the current channel output dataset KAD based on an additional test dataset CPS.

[0128] A further step S1100 involves evaluating the current channel output dataset KAD to determine the current error distribution FV within the current channel output dataset KAD.

[0129] A further step S1200 involves evaluating the current channel output dataset KAD to determine the current bit error rate BER in the current channel output dataset KAD.

[0130] A further step S1300 involves comparing the bit error rate BER with a threshold SW.

[0131] If the comparison in step S1300 indicates that the bit error rate BER is smaller than a predetermined threshold SW, the method proceeds to a further step S1400.

[0132] In contrast, if the comparison in step S1300 indicates that the bit error rate BER is greater than a predetermined threshold SW, then in this exemplary embodiment, the following steps S700 to S1200, including steps S740 and S760, and also steps S762, S764 and S766, and S780, are specifically repeated.

[0133] To this end, a further step S740 involves verifying whether the current bit error rate BER, determined by evaluating the channel output dataset KAD in step S1100, is less than a predetermined limit value GW.

[0134] Unlike this exemplary embodiment, if the current bit error rate BER is equal to a predetermined limit value GW, the method may also proceed to a further step S1300.

[0135] In this exemplary embodiment, the method includes an initial stage of steps S100 to S600 and a foot-controlled loop in the lower part of steps S700 to S1200. Unlike this exemplary embodiment, the method may also include a head-controlled loop.

[0136] A further step S1400 involves evaluating the channel output signal KAS for error analysis, provided that the bit error rate BER corresponds to a predetermined threshold SW.

[0137] Unlike this exemplary embodiment, the order of the steps may be different. Furthermore, multiple steps may be performed simultaneously or all at once. Moreover, unlike this exemplary embodiment, individual steps may be skipped or omitted.

[0138] As a result, in the iterative process, further test subsequences are identified and added to the test signal to further optimize the test signal in a stepwise manner, in the sense that the test pattern has the most complex (which places the maximum load on the receiver) but is suitable, i.e., possible during actual operation. [Explanation of Symbols]

[0139] 2. Test equipment 4. Composition 6. Test Equipment 8 CPS generators 10 PSS detectors 12 Signal Generator 14 Error Detectors 16 CPS Eye Visualizer 18 PSS classifier 20 post-FEC decision units 22 Single pulse 24 pulse response 26 Eye 28 channels BER (Bit Error Rate) CPS test dataset FV Error Distribution G group Golden Week Limit INV (Reciprocal) IST Initial Examination Dataset KAD channel output dataset KAS channel output signal KES channel input signal m delay MET Similarity Criteria n is the length of the signal. s1 column s2 column S(t) signal s+(t) sub-signal s-(t) sub-signal SBR Single-Bit Response SW threshold PSS Exam Subsequences S100 Step S200 Step S300 Step S400 Step S500 Step S600 Step S700 Step S740 Step S760 Step S762 Step S764 Step S766 Step S780 Step S800 Step S900 Step S1000 Step S1100 Step S1200 Step S1300 Step S1400 Step

Claims

1. A method for testing a data transfer configuration (4), comprising the following steps: generating an initial test data set (S200) with a predetermined minimum number of iterations; applying (S300) the initial test data set (IST) to the data transfer configuration (4); obtaining a channel output data set (KAD) based on the initial test data set (IST) (S400); Evaluating (S500) the channel output data set (KAD) to determine an error distribution (FV) within the channel output data set (KAD); Evaluating the channel output data set (KAD) to determine a bit error rate (BER) within the channel output data set (KAD) (S600); determining (S700) at least one test subsequence (PSS) by evaluating said error distribution (FV); forming (S800) a further test data set (CPS) comprising at least the determined test subsequences (PSS); applying (S900) the further test data set (CPS) to the data transfer configuration (4); Obtaining a current channel output data set (KAD) based on the further test data set (CPS) (S1000); Evaluating the current channel output data set (KAD) to determine a current error distribution (FV) within the current channel output data set (KAD) (S1100); Evaluating the current channel output data set (KAD) to determine a current bit error rate (BER) within the current channel output data set (KAD) (S1200); comparing the current bit error rate (BER) with a predetermined threshold (SW), and if the comparison indicates that the bit error rate (BER) is greater than the predetermined threshold (SW), performing steps (S700) to (S1200), specifically, repeatedly performing steps (S1300); and if the comparison indicates that the current bit error rate (BER) is less than the predetermined threshold (SW), evaluating (S1400) the current channel output data set (KAD) for error analysis.

2. 2. The method of claim 1, wherein the channel parameters of the data transfer configuration (4) are determined in a further step (S100).

3. The step (S700) of determining at least one test subsequence (PSS) by evaluating the error distribution (FV) comprises at least the following steps: checking whether the determined bit error rate (BER) is less than a predetermined limit value (GW), and if the bit error rate (BER) is less than the predetermined limit value (GW), performing the following steps (S740); determining (S760) at least one further test subsequence (PSS) based on the determined test subsequence (PSS); and adding (S780) the further test subsequences (PSS) to the further test data set (CPS).

4. The step (S760) of determining at least one further test subsequence (PSS) based on the determined test subsequence (PSS) comprises: The method of claim 3 , further comprising determining (S762) the inverse (INV) of the test subsequence (PSS) as the further test subsequence (PSS).

5. The step (S760) of determining at least one further test subsequence (PSS) based on the determined test subsequence (PSS) comprises:

4. The method of claim 3, comprising a step (S764) of forming a group (G) of test subsequences (PSS) with the same symbol at a predetermined point of the pulse response, in particular the highest pulse response.

6. The step (S760) of determining at least one further test subsequence (PSS) based on the determined test subsequence (PSS) comprises:

4. The method of claim 3, further comprising determining and evaluating a predetermined similarity metric (MET) for the test subsequence (PSS) to select the test subsequence (PSS).

7. A computer program product arranged to perform the method of any one of claims 1 to 6.

8. A test data set (CPS) determined according to the method of any one of claims 1 to 6.

9. A test device (2) for testing a data transfer configuration (4), the test device (2) generating an initial test data set (IST) with a predetermined minimum number of iterations, applying the initial test data set (IST) to the data transfer configuration (4), obtaining a channel output data set (KAD) based on the initial test data set (IST), evaluating the channel output data set (KAD) to determine an error distribution (FV) within the channel output data set (KAD), evaluating the channel output data set (KAD) to determine a bit error rate (BER) within the channel output data set (KAD), determining a further test data set (CPS) comprising at least a determined test subsequence (PSS), applying the further test data set (CPS) to the data transfer configuration (4), and obtaining a current channel output data set (KAD) based on the further test data set (CPS). a test device (2) configured to: determine a channel output data set (KAD) for error analysis; evaluate the current channel output data set (KAD) to determine a current error distribution (FV) within the channel output data set (KAD); evaluate the current channel output data set (KAD) to determine a current bit error rate (BER) within the current channel output data set (KAD); compare the current bit error rate (BER) with a predetermined threshold (SW); and if the comparison indicates that the bit error rate (BER) is greater than the predetermined threshold (SW), evaluate the further error distribution (FV); and if the comparison indicates that the current bit error rate (BER) is less than the predetermined threshold (SW), evaluate the channel output data set (KAD) for error analysis.

10. 10. The test device (2) of claim 9, wherein the test device (2) is configured to determine channel parameters of the data transfer configuration (4).

11. 11. The test device (2) according to claim 9 or 10, wherein the test device (2) is configured to check whether the bit error rate (BER) determined by evaluating the channel output data set (KAD) is smaller than a predetermined limit value (GW), and if the bit error rate (BER) is smaller than the limit value (GW), to determine at least one further test subsequence (PSS) based on the determined test subsequence (PSS) and to add the further test subsequence (PSS) to the further test data set (CPS).

12. 12. The test device (2) according to claim 11, wherein the test device (2) is configured to determine the inverse of the test subsequence (PSS) as the further test subsequence (PSS).

13. 12. The test device (2) according to claim 11, wherein the test device (2) is configured to form a group of test subsequences (PSS) with the same symbol at a predetermined point of the pulse response, in particular the highest pulse response.

14. 12. The test device (2) of claim 11, wherein the test device (2) is configured to determine and evaluate a predetermined similarity criterion (MET) associated with a test subsequence (PSS) to select the test subsequence (PSS).

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