Wiring board and method for manufacturing the same, identification method for wiring board

JP2024006058A5Active Publication Date: 2025-03-26SHINKO ELECTRIC IND CO LTD
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Patent Information

Application Number
JP2022106602
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2022-06-30
Publication Date
2025-03-26
Estimated Expiration
2042-06-30

AI Technical Summary

Technical Problem

Existing wiring boards require space for embedding identification marks, leading to increased size and potential interference with thinning processes.

Method used

A wiring board design with a laminated structure of an insulating layer, a dispersion layer having a unique dispersion pattern with dispersed fillers, allowing for image recognition from outside, and a solder resist layer, which enables identification without additional space.

Benefits of technology

Enables a small-sized wiring board with embedded identification information, improving traceability and reducing interference with thinning processes while maintaining manufacturing efficiency.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide compact wiring boards with identification information.SOLUTION: The wiring board is a wiring board consisting of an insulating layer, a dispersion layer, and a wiring layer, and the dispersion layer has a unique dispersion pattern of filler dispersed in the main material, and the dispersion pattern is image recognizable from outside the wiring board.SELECTED DRAWING: Figure 2
Need to check novelty before this filing date? Find Prior Art

Description

[Technical field]

[0001] The present invention relates to a wiring board, a manufacturing method thereof, and a method for identifying a wiring board. [Background technology]

[0002] In wiring boards, identification marks may be formed. For example, in wiring boards cut into multiple pieces, marks are formed in the insulating portion at the boundary between each piece, with a part of the mark being exposed from the side. After cutting into pieces, by looking at the side of each piece, position information within the wiring board can be determined from the difference in the number of marks and their embedded positions (for example, see Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2012-39028 A Summary of the Invention [Problem to be solved by the invention]

[0004] However, in the wiring board described in Patent Document 1, the marks need to be embedded accurately at predetermined positions, so the pieces need to be a certain size, and space is also needed to embed the marks, which can easily lead to an increase in the size of the wiring board.

[0005] The present invention has been made in view of the above-mentioned points, and has an object to provide a small wiring board having identification information. [Means for solving the problem]

[0006] This wiring board is a wiring board in which an insulating layer, a dispersion layer, and a wiring layer are laminated, and the dispersion layer has a unique dispersion pattern in which a filler is dispersed in a main material, and the dispersion pattern can be image-recognized from outside the wiring board. Effect of the Invention

[0007] According to the disclosed technique, it is possible to provide a small wiring board equipped with identification information. [Brief description of the drawings]

[0008] [Figure 1] 1 is a cross-sectional view illustrating a wiring board according to an embodiment of the present invention; [Diagram 2] FIG. 2 is a plan view illustrating a dispersion layer. [Diagram 3] 1A to 1C are schematic plan views illustrating an example in which the density of a filler is changed in a dispersion layer. [Figure 4] 10 is a cross-sectional view illustrating an example in which the dispersion layer has a laminated structure of multiple layers. FIG. [Diagram 5] FIG. 11 is a schematic plan view illustrating an example in which the dispersion layer has a laminated structure of multiple layers. [Figure 6] 1A to 1C are schematic plan views illustrating an example of a wiring substrate that is divided into a plurality of pieces. [Figure 7] 1A to 1C are diagrams illustrating a manufacturing process of a wiring board according to an embodiment of the present invention (part 1). [Figure 8] 6A to 6C are diagrams illustrating the manufacturing process of the wiring board according to the embodiment (part 2). [Figure 9] 11A and 11B are diagrams illustrating a method for identifying a wiring board using a distribution layer. [Figure 10] FIG. 11 is a diagram illustrating a method for calculating a matching rate. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the drawings, the same components are denoted by the same reference numerals, and duplicated explanations may be omitted.

[0010] [Wiring board structure] Fig. 1 is a cross-sectional view illustrating a wiring board according to the present embodiment. Referring to Fig. 1, the wiring board 1 according to the present embodiment is a coreless wiring board having a wiring layer 11, an insulating layer 12, a dispersion layer 13, a wiring layer 14, and a solder resist layer 15. The solder resist layer 15 is provided as necessary.

[0011] In this embodiment, for convenience, the solder resist layer 15 side of the wiring board 1 is referred to as the upper side, and the insulating layer 12 side is referred to as the lower side. Also, the surface of each part facing the solder resist layer 15 is referred to as the upper surface, and the surface facing the insulating layer 12 is referred to as the lower surface. However, the wiring board 1 can be used upside down, or can be placed at any angle. Also, a planar view refers to viewing an object from the normal direction of the upper surface of the solder resist layer 15, and a planar shape refers to the shape of the object viewed from the normal direction of the upper surface of the solder resist layer 15.

[0012] In the wiring board 1, the wiring layer 11 is the bottom wiring layer. For example, copper can be used as the material of the wiring layer 11. A laminated film including a copper layer, a gold layer, etc. can be used as the wiring layer 11. The thickness of the wiring layer 11 can be, for example, about 10 μm to 20 μm. The lower surface of the wiring layer 11 is exposed from the insulating layer 12. The wiring layer 11 can be used as, for example, a pad that is electrically connected to another wiring board or the like. The wiring layer 11 may include a wiring pattern in addition to the pad.

[0013] The insulating layer 12 is formed so as to cover the upper and side surfaces of the wiring layer 11 and expose the lower surface. The material of the insulating layer 12 may be, for example, a thermosetting insulating resin mainly composed of an epoxy resin or a polyimide resin. The insulating resin used as the material of the insulating layer 12 may be either photosensitive or non-photosensitive. The insulating layer 12 is made of silica (SiO 2 ) may be contained as a filler.

[0014] The dispersion layer 13 is an insulating layer laminated on the insulating layer 12. The dispersion layer 13 will be described later.

[0015] The insulating layer 12 and the dispersion layer 13 are provided with via holes 12x that continuously penetrate the insulating layer 12 and the dispersion layer 13 and expose the upper surface of the wiring layer 11. The via holes 12x are, for example, inverted truncated cone-shaped recesses whose openings on the solder resist layer 15 side have a diameter larger than the diameter of the bottom of the openings formed by the upper surface of the wiring layer 11.

[0016] The wiring layer 14 fills the via holes 12x to be electrically connected to the wiring layer 11, and extends from within the via holes 12x to the upper surface of the dispersion layer 13. In detail, the wiring layer 14 includes via wiring filled in the via holes 12x and a wiring pattern formed on the upper surface of the dispersion layer 13. The wiring pattern of the wiring layer 14 is electrically connected to the wiring layer 11 through the via wiring in the via holes 12x. The material of the wiring layer 14 and the thickness of the wiring pattern are, for example, similar to those of the wiring layer 11.

[0017] The solder resist layer 15 is an insulating layer located at the outermost layer on one side of the wiring board 1, and is formed on the upper surface of the dispersion layer 13 so as to cover the wiring layer 14. The solder resist layer 15 can be formed from, for example, a photosensitive resin such as an epoxy resin or an acrylic resin. The thickness of the solder resist layer 15 can be, for example, about 15 to 35 μm.

[0018] The solder resist layer 15 has an opening 15x, and a part of the upper surface of the wiring layer 14 is exposed at the bottom of the opening 15x. The planar shape of the opening 15x can be, for example, circular. If necessary, a metal layer may be formed on the upper surface of the wiring layer 14 exposed in the opening 15x, or an oxidation prevention treatment such as an OSP (Organic Solderability Preservative) treatment may be performed. Examples of the metal layer include an Au layer, a Ni / Au layer (a metal layer in which a Ni layer and an Au layer are laminated in this order), and a Ni / Pd / Au layer (a metal layer in which a Ni layer, a Pd layer, and an Au layer are laminated in this order). The wiring layer 14 exposed in the opening 15x can be used as, for example, an external connection terminal for electrically connecting to a semiconductor chip.

[0019] [Dispersion layer] The dispersion layer 13 is a layer having identification information for identifying the wiring board 1, and has a unique dispersion pattern in which a filler is dispersed in a main material such as a resin. The dispersion pattern can be image-recognized from the outside of the wiring board. For example, before the wiring board is shipped, a reference image of the dispersion pattern is taken from the outside of the wiring board, and the reference image is recorded in association with the manufacturing information of the wiring board. Then, for example, when the wiring board is returned as a defective product after shipment, an inspection image of the dispersion pattern is taken from the outside of the wiring board, and the manufacturing information can be known by comparing the inspection image with the reference image. The manufacturing information is, for example, the manufacturing date, the manufacturing site, and the position information of the wiring board before it is divided into individual pieces.

[0020] The main material constituting the dispersion layer 13 can be selected from any material commonly used in wiring boards, such as thermosetting resins such as epoxy resins and phenol resins, thermoplastic resins such as polyimide resins and acrylic resins, various elastomers and their precursors, copolymers, etc. The main material constituting the dispersion layer 13 may be the same as or different from the material constituting the insulating layer 12. The use of an amorphous thermoplastic resin and a crystalline thermoplastic resin having an amorphous portion improves the transparency of the dispersion layer 13, making it easier to detect the filler when using an optical method.

[0021] In the dispersion layer 13, for example, particles, fibers, etc. can be used as the filler. The particles and fibers may be granular, needle-like, angular, plate-like, etc., and may be flexible or not. It is preferable that the filler is non-conductive. In particular, inorganic oxides, inorganic nitrides, or organic substances in the form of particles or fibers can be used as the filler. For example, SiO 2 Or Al 2 O 3 Examples of inorganic nitrides include BN and AlN. Examples of organic materials include polyimide, phenol, rubber, and cellulose. In addition to these, calcium compounds and potassium compounds can also be used. The filler may be colored by kneading or applying dyes, pigments, etc.

[0022] Fig. 2 is a schematic plan view illustrating a dispersion layer. Fig. 2(a) is an example in which particles 132 are dispersed in a main material 131. Although one type of particle 132 may be used, in order to improve the identifiability of the wiring board 1, for example, two or more types of particles with different particle sizes may be mixed. Furthermore, the identifiability of the wiring board 1 can be improved by having the particles 132 not be uniform in size or shape.

[0023] Fig. 2(b) is an example in which fibers 133 are dispersed in main material 131. The identifiability of wiring board 1 can be improved if the size and shape of fibers 133 are not uniform. As shown in Fig. 2(c), particles 132 and fibers 133 may be dispersed in main material 131. This makes it difficult for multiple wiring boards to have similar dispersion patterns, thereby further improving the identifiability of wiring board 1.

[0024] In order to improve the identification of the wiring board 1, it is preferable that the density of the filler is non-uniform in plan view. Here, non-uniform density of the filler means that, in plan view, the dispersion layer is divided into 5 rows and 5 columns of sections of equal area, the density of the filler in each section and the average value of the density of the filler in each section are calculated, and the maximum and minimum values ​​of the density of the filler in each section are more than ±30% from the average value. The density of the filler in each section can be calculated by enlarging an image of the dispersion layer and calculating the area of ​​the filler in each section relative to the area of ​​the section.

[0025] For example, in a plan view, the density of the particles 132 or the fibers 133 may decrease from a predetermined direction toward the opposite direction. In this case, the density of the particles 132 or the fibers 133 may decrease stepwise or continuously from a predetermined direction toward the opposite direction.

[0026] Fig. 3(a) shows an example in which the density of the particles 132 is changed in the dispersion layer 13, with the particles 132 arranged at a high density to the left of the center and at a low density to the right of the center. That is, in Fig. 3(a), the density of the particles 132 decreases stepwise from left to right. The density may be changed in three or more steps.

[0027] Fig. 3(b) shows an example in which the density of the fibers 133 is changed in the dispersion layer 13, where the fibers 133 are arranged at a high density above the center, and at a low density below the center. That is, in Fig. 3(b), the density of the fibers 133 decreases stepwise from the top to the bottom. The density may be changed in three or more steps.

[0028] Fig. 3(c) is an example in which the densities of the particles 132 and the fibers 133 are changed in the dispersion layer 13, where the particles 132 are arranged at a high density to the left of the center, and the particles 132 are arranged at a low density to the right of the center. The fibers 133 are arranged at a high density above the center, and at a low density below the center. That is, in Fig. 3(c), the density of the particles 132 decreases stepwise from the left to the right, and the density of the fibers 133 decreases stepwise from the top to the bottom. The density may change in three or more steps.

[0029] In this way, by making the density of the filler uneven by, for example, gradienting the density of the particles 132 or fibers 133 in one direction within the dispersion layer 13, the accuracy of recognizing the position within the wiring board 1 can be improved.

[0030] In addition, particles such as fillers may be dispersed in normal insulating layers, but the particles such as fillers are dispersed for the purpose of improving the physical properties (e.g., thermal expansion coefficient) of the insulating layer, so that particles of similar size and shape are uniformly dispersed throughout the insulating layer. On the other hand, if the filler dispersed in the dispersion layer is uniformly dispersed, the number of similar reference images increases, and discrimination decreases. Therefore, it is preferable that the filler dispersed in the dispersion layer is non-uniform compared to the particles dispersed in the insulating layer.

[0031] Also, as in the wiring board 1A shown in FIG. 4, the dispersion layer may have a laminated structure of multiple layers. In the wiring board 1A, the dispersion layer 13A has a laminated structure of a first layer 13A1, a second layer 13A2, and a third layer 13A3. As shown in FIG. 5(a), the first layer 13A1 is a layer in which particles 132 are dispersed in a main material 131. As shown in FIG. 5(b), the second layer 13A2 is a layer in which fibers 133 are dispersed in a main material 131. As shown in FIG. 5(c), the third layer 13A3 is a layer in which particles 134 having a different shape from the particles 132 are dispersed in a main material 131. When the dispersion layer 13A is viewed from above, as shown in FIG. 5(d), the particles 132, the fibers 133, and the particles 134 can be visually recognized as being mixed in the main material 131, thereby improving the identification of the wiring board 1. The laminated structure of the dispersion layer is not limited to three layers, but may be two layers, or may be four or more layers.

[0032] The wiring board 1 may be a single wiring board or may be a wiring board that is divided into a plurality of pieces. FIG. 6 is an example of a dispersion layer of a wiring board that is divided into 16 pieces. In FIG. 6, the vertical and horizontal dashed lines indicate the cutting lines when dividing. Normally, the wiring patterns of each wiring board after dividing are the same, so that position information cannot be known by visual inspection, but it can be traced by identifying the pattern of the filler in the dispersion layer 13. For example, in the dispersion layer 13 of FIG. 6, the patterns formed by the particles 132 and fibers 133, which are the filler, are different in the regions a, b, and c, so that they can be identified.

[0033] [Method of manufacturing wiring board] 7 and 8 are diagrams illustrating a manufacturing process of the wiring board according to this embodiment.

[0034] First, in the step shown in FIG. 7(a), a support 500 is prepared, and a wiring layer 11 is formed on the upper surface of the support 500. The support 500 may be a resin plate, a metal plate, a silicon plate, a glass plate, or the like. To form the wiring layer 11, for example, a copper foil is placed on the upper surface of the support 500, and an etching mask of a predetermined shape is further placed on the copper foil, and the copper foil is etched. When the support 500 is a metal plate, the wiring layer 11 may be formed by electrolytic plating using the metal plate as a power supply layer.

[0035] 7(b), the insulating layer 12 and the dispersion layer 13 are sequentially laminated on the upper surface of the support 500 so as to cover the wiring layer 11. Specifically, for example, a film-like insulating resin mainly composed of a thermosetting epoxy resin is prepared as the insulating layer 12, and laminated on the upper surface of the support 500 so as to cover the wiring layer 11. Next, for example, a film-like insulating resin mainly composed of a thermosetting epoxy resin with particles or fibers dispersed as a filler is prepared as the dispersion layer 13, and laminated on the upper surface of the insulating layer 12. Then, while pressing the laminated insulating layer 12, the insulating layer 12 is heated to a curing temperature or higher to be cured.

[0036] Alternatively, for example, an insulating resin mainly composed of a liquid or paste-like epoxy resin having thermosetting properties may be prepared as the material for the insulating layer 12, and applied to the upper surface of the support 500 by a spin coating method or the like so as to cover the wiring layer 11, and then cured. Similarly, an insulating resin mainly composed of a liquid or paste-like epoxy resin having thermosetting properties in which particles or fibers are dispersed as a filler may be prepared as the material for the dispersion layer 13, and then applied to the upper surface of the insulating layer 12 by a spin coating method or the like, and then cured.

[0037] 7(c), a via hole 12x is formed in the insulating layer 12 and the dispersion layer 13 so as to penetrate the insulating layer 12 and the dispersion layer 13 and expose the upper surface of the wiring layer 11. The via hole 12x is formed by, for example, CO 2The via hole 12x can be formed by a laser processing method using a laser or the like. The via hole 12x formed by the laser processing method is an inverted truncated cone-shaped recess in which the diameter of the opening opened on the side where the wiring layer 14 is formed is larger than the diameter of the bottom of the opening formed by the upper surface of the wiring layer 11. When the via hole 12x is formed by the laser processing method, it is preferable to perform a desmear process to remove the resin residue of the insulating layer 12 attached to the upper surface of the wiring layer 11 exposed at the bottom of the via hole 12x. Note that the insulating layer 12 and the dispersion layer 13 may be made of a photosensitive resin, and the via hole 12x may be formed by a photolithography method.

[0038] Next, in the step shown in FIG. 7(d), the wiring layer 14 is formed on the dispersion layer 13. The wiring layer 14 can be formed by using various wiring forming methods such as a semi-additive method or a subtractive method. For example, when the wiring layer 14 is formed by a semi-additive method, a seed layer is first formed on the upper surface of the wiring layer 11 exposed at the bottom of the via hole 12x and the dispersion layer 13 including the inner wall surface of the via hole 12x by electroless plating or sputtering. Next, a resist layer having an opening corresponding to the wiring layer 14 is formed on the seed layer. Then, an electrolytic plating layer is formed in the opening of the resist layer by electrolytic plating using the seed layer as a power supply layer. Next, after removing the resist layer, the electrolytic plating layer is used as a mask to remove the seed layer in the portion not covered by the electrolytic plating layer by etching. As a result, the wiring layer 14 in which the electrolytic plating layer is laminated on the seed layer is formed.

[0039] Next, in the step shown in FIG. 7(e), a solder resist layer 15 is formed on the upper surface of the dispersion layer 13 to cover the wiring layer 14. The solder resist layer 15 can be formed, for example, by applying a liquid or paste insulating resin to cover the wiring layer 14 by screen printing, roll coating, spin coating, or the like. Alternatively, a film-like insulating resin may be laminated to cover the wiring layer 14. As the insulating resin, for example, a photosensitive epoxy insulating resin or an acrylic insulating resin can be used. Then, the applied or laminated insulating resin is exposed and developed to form an opening 15x in the solder resist layer 15 to selectively expose the wiring layer 14 (photolithography method).

[0040] If necessary, a metal layer may be formed on the upper surface of the wiring layer 14 exposed in the opening 15x, for example, by electroless plating. Examples of the metal layer are as described above. In addition, an anti-oxidation treatment such as an OSP treatment may be performed on the upper surface of the wiring layer 14 exposed in the opening 15x. Through the above steps, the shape of the wiring board 1 is completed.

[0041] Next, in step S101 of FIG. 8, a reference image of the dispersion pattern is photographed from the outside of the wiring board 1 (for example, above the solder resist layer 15), and the reference image is recorded in association with the manufacturing information of the wiring board 1. The reference image may be a photograph of the entire wiring board 1 or a part of the wiring board 1, as long as the dispersion pattern of the filler in the dispersion layer 13 can be photographed. The photographing is performed, for example, by an optical method using visible light or a method using electromagnetic waves such as X-rays. Note that, since it is sufficient to identify the wiring board, it is not necessary to photograph only the dispersion pattern, and other information (for example, wiring pattern, etc.) may be photographed in addition to the dispersion pattern. Note that, when the color of the solder resist layer 15 is dark, particles and fibers may not be clearly visible when photographing from above the solder resist layer 15. In that case, the inspection image may be processed by image processing software or the like. In addition, the reference image may also be processed by image processing software, like the inspection image.

[0042] Next, in step S102, the wiring board 1 is singulated (cut). For example, the structure shown in FIG. 7(e) is cut at a predetermined cutting position with a slicer or the like to singulate it. In the case of a single wiring board that does not need to be singulated, step S102 is skipped. Next, in step S103, the wiring board 1 is shipped. Note that product inspection of the wiring board 1 may be performed as necessary between step S101 and step S103. Also, the order of steps S101 and S102 may be reversed. That is, for a wiring board that needs to be singulated, a reference image may be taken after singulation. In this case, the position information of the wiring board before singulation is recorded so as to be associated with the reference image.

[0043] [How to identify wiring boards] Here, an example of a method for identifying a wiring board using a dispersion layer will be described. Fig. 9 is a diagram illustrating a method for identifying a wiring board using a dispersion layer. Here, a case where the wiring board 1 shipped in step S103 of Fig. 8 is returned will be described. The place where the wiring board 1 is returned may be the factory or the like from which the wiring board 1 was shipped, but may be a place other than the factory or the like from which the wiring board 1 was shipped as long as an imaging device of the same type as the imaging device that captured the reference image is installed.

[0044] First, in step S201, an inspection image of the dispersion pattern is taken from the outside of the returned wiring board 1 (for example, above the solder resist layer 15). In order to improve the identification of the wiring board 1, it is preferable that the shooting conditions of the inspection image are the same as those of the reference image. Note that, if there is an object, such as a heat spreader or underfill resin, that has been added to the wiring board 1 after shipping, the object is removed as necessary before the inspection image is taken.

[0045] Next, in step S202, the reference image and the test image are binarized. By binarizing the reference image and the test image, the accuracy of matching between the reference image and the test image may be improved. Note that the color and brightness difference between the main material and the particles constituting the dispersion layer may be small, and it may be difficult to match the binarized test image with the binarized reference image. In that case, step S202 may be skipped, and the reference image and the test image may be matched without binarization. That is, step S202 is executed as necessary. Also, instead of binarization, grayscale processing, contrast adjustment processing, etc. may be applied.

[0046] Next, in step S203, the binarized inspection image is compared with the reference image database. For example, the inspection image is rotated or shifted to compare the distribution pattern of the inspection image with the distribution pattern recorded in the reference image database. If step S202 is skipped, the raw image of the inspection image is compared with the reference image database. When comparing the inspection image with the reference image, wiring, pads, etc. in the wiring board may be used as markers to mark the positions.

[0047] Next, in step S204, it is determined whether the reference image and the inspection image match. Specifically, for example, the matching rate of a specific item between the reference image and the inspection image is calculated, and if the matching rate is equal to or greater than a predetermined threshold, it is determined that the reference image and the inspection image match, and the manufacturing information of the wiring board 1 is identified. The matching rate may be calculated for the entire distribution layer, or may be calculated for a part of the distribution layer. When calculating the matching rate for a part of the distribution layer, it is preferable to calculate the matching rate for two or more parts of the distribution layer, since there is a risk that multiple reference image candidates will appear if the matching rate is calculated for only one part of the distribution layer.

[0048] Any method may be used to calculate the matching rate. For example, a specific particle may be focused on, and a figure may be created by connecting the centers of the particles in order with straight lines, and the areas of the figures may be compared. For example, in the inspection image shown in FIG. 10, six particles are selected, and the area of ​​a hexagon formed by connecting the centers of each particle in order with straight lines is calculated. Next, a reference image in which particles exist in a roughly similar position is extracted from a database of reference images. The area of ​​the hexagon is then calculated in the same manner as the inspection image. For example, if the area of ​​the hexagon in the reference image is within ±10% of the area of ​​the hexagon in the inspection image, the two images are determined to match. Furthermore, if multiple candidates are extracted, the one whose area of ​​the hexagon in the reference image is closest to the area of ​​the hexagon in the inspection image is selected.

[0049] In addition, in Fig. 10, the coincidence between the inspection image and the reference image may be determined based on the coincidence rate of the position, the coincidence rate of the area, and the coincidence rate of the circularity of each of the six selected particles. In this case, the coincidence rate may be used in combination with the above-mentioned area comparison. Furthermore, for identifying the wiring board, the information on the dispersion pattern of the dispersion layer may be used in combination with information on other identifiers such as fiducial marks and engravings.

[0050] In this way, in a wiring board in which an insulating layer, a dispersion layer, and a wiring layer are laminated, by comparing and collating the dispersion patterns of the reference image and the inspection image using image analysis software or the like, it becomes possible to identify the wiring board, and a specific wiring board can be associated with manufacturing information. In other words, the traceability of the wiring board can be improved.

[0051] In addition, since the dispersion layer does not require additional space in the planar direction as in Patent Document 1, it is possible to realize a small wiring board equipped with identification information. In addition, since the dispersion layer can be thinner than the insulating layer, it is unlikely to hinder the thinning of the wiring board.

[0052] In addition, by using materials commonly used in wiring boards, such as silica and cellulose, for forming the dispersion pattern of the dispersion layer, there is no adverse effect on the manufacture of wiring boards or the characteristics of the wiring boards. In addition, when only the dispersion pattern is used to identify the wiring board and no marking such as a serial number is performed, it is possible to suppress the generation of dust during marking and reduce the space required for marking.

[0053] Although the preferred embodiments have been described in detail above, the present invention is not limited to the above-described embodiments, and various modifications and substitutions can be made to the above-described embodiments without departing from the scope of the claims.

[0054] For example, in the above embodiment, a coreless wiring board has been described, but the present invention is applicable to various wiring boards, including wiring boards having a core board.

[0055] Also, if the wiring board has an insulating layer, a dispersion layer, and a wiring layer laminated thereon, the dispersion layer may be laminated at any position. For example, the dispersion layer may be disposed on the bottom layer or the top layer of the wiring board. For example, a filler may be added to the top solder resist layer to function as the dispersion layer. Also, the wiring board may have more wiring layers and insulating layers than the example shown in FIG. 1. [Explanation of symbols]

[0056] 1,1A Wiring board 11,14 wiring layer 12 Insulating layer 12x via holes 13,13A dispersion layer 13A1 1st layer 13A2 2nd layer 13A3 3rd layer 15 Solder resist layer 15x opening 131 Main material 132,134 particles 133 Textiles 500 support

Claims

1. A wiring board in which an insulating layer, a dispersion layer, and a wiring layer are laminated, The dispersion layer has a unique dispersion pattern in which a filler is dispersed in a main material, The distributed pattern is image-recognizable from outside the wiring board.

2. The wiring board according to claim 1 , wherein the filler is non-conductive particles and / or fibers.

3. The wiring board according to claim 1 , wherein the density of the filler is non-uniform in a plan view.

4. A method for manufacturing a wiring board in which an insulating layer, a dispersion layer, and a wiring layer are laminated, comprising the steps of: The dispersion layer has a unique dispersion pattern in which a filler is dispersed in a main material, A method for manufacturing a wiring board, comprising: taking a reference image of the distributed pattern from outside the wiring board; and recording the reference image in association with manufacturing information of the wiring board.

5. The method for manufacturing a wiring board according to claim 4 , wherein the filler is non-conductive particles and / or fibers.

6. The method for manufacturing a wiring board according to claim 4 , wherein the density of the filler is non-uniform in a plan view.

7. A method for identifying a wiring board in which an insulating layer, a dispersion layer, and a wiring layer are laminated, comprising the steps of: The dispersion layer has a unique dispersion pattern in which a filler is dispersed in a main material, taking a reference image of the distribution pattern from outside the wiring board, and recording the reference image in association with manufacturing information of the wiring board; taking an inspection image of the distributed pattern from outside the wiring board; matching the reference image with the inspection image; and determining whether the reference image and the inspection image match.

8. The wiring board identification method of claim 7, wherein in the determining step, a matching rate of a specific item between the reference image and the inspection image is calculated, and if the matching rate is equal to or greater than a predetermined threshold, it is determined that the reference image and the inspection image match.

9. 9. The method for identifying a wiring board according to claim 7, wherein the filler is non-conductive particles and / or fibers.

10. The method for identifying a wiring board according to claim 7 or 8, wherein a density of the filler is non-uniform in a plan view.