Display device

Abstract

To provide a display device with fewer defects, in which the deterioration is suppressed, and provide a display device with a high yield.SOLUTION: A display device includes a plurality of transistors including an oxide semiconductor layer, a first terminal electrically connected to the transistors, a second terminal electrically connected to the transistors and being adjacent to the first terminal, a first wire electrically connected to the transistors and the first terminal and existing between the transistors and the first terminal, and a second wire electrically connected to the transistors and the second terminal and existing between the transistors and the second terminal. The first wire is formed of a metal material and the second wire includes an oxide conductive layer with the same composition as the oxide semiconductor layer.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] One embodiment of the present invention relates to a display device.

Background Art

[0002] A display device using an element utilizing organic electroluminescence (EL) or a liquid crystal element in a display area, for example, has a configuration in which a display area and a plurality of terminals are provided on a substrate. The plurality of terminals are electrically connected to the pixels in the display area by wirings connecting the pixels provided in the display area and the plurality of terminals, and various signals (for example, an image signal or a control signal) or a power supply potential are input thereto. For such a wiring (lead wiring), a metal film such as aluminum, copper, titanium, molybdenum, or chromium may be used (for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In recent years, in a display device, the number of wirings for inputting various signals or a power supply potential has tended to increase in order to realize high-definition image display. Further, there is a tendency to narrow the area around the display area of the display device provided with the plurality of terminals and to widen the display area. Due to these tendencies, a method in which the lead wiring is provided obliquely from within the display area to the terminals is adopted. Such a wiring is likely to have defects such as defective formation of the wiring, and various methods for the lead wiring are required for high definition and narrow bezel.

[0005] One embodiment of the present invention has been made in view of the above problems, and one of the problems is to provide a display device with few defects and suppressed deterioration. Another problem of one embodiment of the present invention is to provide a display device with high yield.

Means for Solving the Problems

[0006] The display device according to one embodiment of the present invention includes a plurality of transistors having an oxide semiconductor layer, a first terminal electrically connected to the plurality of transistors, a second terminal electrically connected to the plurality of transistors and adjacent to the first terminal, a first wiring electrically connected to the plurality of transistors and the first terminal and located between the plurality of transistors and the first terminal, and a second wiring electrically connected to the plurality of transistors and the second terminal and located between the plurality of transistors and the second terminal. The first wiring is formed of a metal material, and the second wiring includes an oxide conductive layer having the same composition as the oxide semiconductor layer.

Brief Description of the Drawings

[0007]

Figure 1

Figure 2A

Figure 2B

Figure 3

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Figure 6A

Figure 6B

Figure 6C

Figure 6D

Figure 6E

Figure 6F

Figure 6G

Figure 6H

Figure 6I

Figure 6J

Figure 6K

Figure 6L

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Figure 10

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Figure 14A

Figure 14B

Embodiments for Carrying Out the Invention

[0008] Hereinafter, each embodiment of the present invention will be described with reference to the drawings. The following disclosure is merely an example. Configurations that can be easily conceived by those skilled in the art by appropriately changing the configuration of the embodiment while maintaining the gist of the invention are naturally included in the scope of the present invention. The drawings are schematically represented in terms of the width, layer thickness, shape, etc. of each part compared to the actual aspect in order to make the explanation clearer. However, the illustrated shape is merely an example and does not limit the interpretation of the present invention. In this specification and each figure, elements that are the same as those described above with respect to the previously shown figures may be given the same reference numerals, and detailed descriptions may be omitted as appropriate.

[0009] The "semiconductor device" generally refers to all devices that can function by utilizing semiconductor characteristics. A transistor and a semiconductor circuit are one form of semiconductor device. The semiconductor device in the embodiment shown below may be, for example, a transistor used in a display device, an integrated circuit (IC) such as a microprocessor (Micro-Processing Unit: MPU), or a memory circuit.

[0010] The "display device" refers to a structure that displays an image using an electro-optical layer. For example, the term "display device" may refer to a display panel including an electro-optical layer, or may refer to a structure in which other optical members (for example, a polarizing member, a backlight, a touch panel, etc.) are attached to a display cell. The "electro-optical layer" may include a liquid crystal layer, an electroluminescence (EL) layer, an electrochromic (EC) layer, and an electrophoretic layer as long as no technical contradiction occurs. Therefore, regarding the embodiments described later, a liquid crystal display device including a liquid crystal layer and an organic EL display device including an organic EL layer will be exemplified and described as display devices, but the structure in this embodiment can be applied to a display device including other electro-optical layers described above.

[0011] In each embodiment of the present invention, the direction from the substrate toward the oxide semiconductor layer is referred to as up or upward. Conversely, the direction from the oxide semiconductor layer toward the substrate is referred to as down or downward. Thus, for the sake of convenience of explanation, the terms up or downward are used for explanation, but for example, the vertical relationship between the substrate and the oxide semiconductor layer may be arranged in the reverse of the illustration. In the following description, for example, the expression an oxide semiconductor layer on a substrate merely explains the vertical relationship between the substrate and the oxide semiconductor layer as described above, and other members may be arranged between the substrate and the oxide semiconductor layer. Up or downward means the stacking order in a structure in which a plurality of layers are stacked. When expressing a pixel electrode above a transistor, in a plan view, the positional relationship may be such that the transistor and the pixel electrode do not overlap. On the other hand, when expressing a pixel electrode directly above the transistor in a plan view, it means the positional relationship in which the transistor and the pixel electrode overlap.

[0012] In this specification, expressions such as "α includes A, B, or C", "α includes any one of A, B, and C", "α includes one selected from the group consisting of A, B, and C" do not exclude the case where α includes a plurality of combinations of A to C unless otherwise specified. Furthermore, these expressions do not exclude the case where α includes other elements.

[0013] <First Embodiment> 1. Configuration of Display Device FIG. 1 shows a schematic top view of a display device 10 according to an embodiment of the present invention. As shown in FIG. 1, the display device 10 has a substrate 102 and a counter substrate 103, and a plurality of pixels 104 are provided on the substrate 102. A single region including the plurality of pixels 104 and a region surrounding the single region are defined as a display region 106 and a peripheral region 107 of the substrate 102, respectively.

[0014] A drive circuit for driving the pixels 104 is provided in the peripheral region. In the example shown in FIG. 1, two scanning line drive circuits 108 sandwiching the display region 106 and a signal line drive circuit 110 including an analog switch and the like are provided. When a liquid crystal element is provided in the display device 10, a seal 111 is provided so as to surround these structures. The seal 111 fixes the substrate 102 and the counter substrate 103 so that the substrate 102 and the counter substrate 103 sandwich a liquid crystal layer. Wiring 118 extends from the display region 106, the scanning line drive circuit 108, and the signal line drive circuit 110 to one side of the substrate 102 and is exposed at an end of the substrate 102 to form a terminal 112. The wiring 118 is located between the display region 106 and the terminal 112. Further, the wiring 118 is located between the scanning line drive circuit 108 and the signal line drive circuit 110 and the terminal 112. The terminal 112 shown in FIG. 1 includes a plurality of terminals 112, although details will be described later. The terminal 112 is electrically connected to a connector 116 such as a flexible printed circuit (FPC) board. A drive IC 114 for controlling the pixels 104 may be further mounted on the connector 116 or on the substrate 102. Note that the signal line drive circuit 110 may not be provided on the peripheral region, and this function may be realized by the drive IC 114.

[0015] In the following description, for convenience, the side of the terminal 112 of the display device 10 is defined as the lower part, and the side opposite to the terminal 112 is defined as the upper part. When the substrate 102 and the display region 106 can be regarded as a quadrangle mainly composed of four sides, the side on the terminal 112 side is called the lower side, and the side opposite to the terminal 112 is called the upper side.

[0016] Here, the pixel circuit 300 for controlling each pixel 104 will be described with reference to FIGS. 2A and 2B. FIG. 2A shows an example of a pixel circuit using a light-emitting element (organic EL element) that utilizes organic electroluminescence in the pixel 104. FIG. 2B shows an example of a pixel circuit using a liquid crystal element in the pixel 104.

[0017] 2. Pixel 2-1. Pixel Circuit - 1 FIG. 2A is a diagram showing the configuration of the pixel circuit 300 in the display device 10 according to an embodiment of the present invention. For convenience of explanation, a basic configuration using two semiconductor devices (thin-film transistors) will be exemplified and described. As shown in FIG. 2A, the pixel circuit 300 includes elements such as a driving transistor 301, a selection transistor 302, a holding capacitor 303, and a light-emitting element 304. The driving transistor 301 and the selection transistor 302 are composed of semiconductor devices such as thin-film transistors.

[0018] The source of the driving transistor 301 is connected to the anode power line 305, and the drain of the driving transistor 301 is connected to one end (anode) of the light-emitting element 304. The other end (cathode) of the light-emitting element 304 is connected to the cathode power line 306. In the present embodiment, a power supply voltage higher than that of the cathode power line 306 is applied to the anode power line 305. In FIG. 1, the illustration of the anode power line 305 is omitted.

[0019] The gate of the selection transistor 302 is connected to the scanning line 122, and the source of the selection transistor 302 is connected to the data signal line 124. The drain of the selection transistor 302 is connected to the gate of the driving transistor 301. Note that the source and drain of the selection transistor 302 may be interchanged depending on the relationship between the voltage applied to the data signal line 124 and the voltage stored in the holding capacitor 303.

[0020] The holding capacitor 303 is connected to the gate and drain of the driving transistor 301 and the drain of the selection transistor 302. A video signal is supplied to the data signal line 124, and a gradation signal that determines the light emission intensity of the light emitting element 304 is supplied. A scanning signal for selecting a pixel to which the gradation signal is written is supplied to the scanning line 122.

[0021] Next, referring to FIG. 2B, an example of a pixel circuit using a liquid crystal element in the pixel 104 will be described.

[0022] 2-2. Pixel Circuit - 2 FIG. 2B is a diagram showing the configuration of the pixel circuit 300 in the display device 10 according to an embodiment of the present invention. As shown in FIG. 2B, the pixel circuit 300 includes elements such as a transistor 307, a holding capacitor 308, and a liquid crystal element 309. The transistor 307 is composed of a semiconductor device such as a thin film transistor.

[0023] The gate of the transistor 307 is connected to the scanning line 122, and the source of the transistor 307 is connected to the data signal line 124. The drain of the transistor 307 is connected to the holding capacitor 308 and the liquid crystal element 309. Although not shown in detail, one electrode of the holding capacitor 308 is connected to the drain of the transistor 307, and the other electrode is connected to the common electrode of the pixel 104. Also, one electrode of the liquid crystal element 309 is connected to the drain of the transistor 307 via the pixel electrode, and the other electrode is connected to the common electrode. Note that the source and drain of the transistor 307 may be interchanged depending on the relationship between the voltage applied to the data signal line 124 and the voltage stored in the holding capacitor 308.

[0024] Returning to the description of FIG. 1. The plurality of terminals 112 are electrically connected to the connector 116. Each of the plurality of terminals 112 is electrically connected to the transistor 307 of the pixel 104, the signal line driving circuit 110, or the scanning line driving circuit 108 via the wiring 118. A signal or a power supply potential supplied from the connector 116 is input to the plurality of terminals 112. The signal is a signal for operating the transistor of the pixel 104, for example, an image signal indicating an image to be displayed in the display area 106, or a control signal for controlling the scanning line driving circuit 108 or the signal line driving circuit 110. Note that the number of terminals 112 included in the display device 10 may be any plurality.

[0025] The connector 116 outputs a signal input from an external circuit (not shown) to the plurality of terminals 112. The connector 116 may be configured by arranging a plurality of wirings on a flexible substrate. Each of the plurality of wirings is electrically connected to any one of the terminals 112.

[0026] Next, referring to FIG. 3, the wiring 118 that electrically connects the terminal 112 to the transistor provided in the display area 106, the scanning line driving circuit 108, or the signal line driving circuit 110 will be described.

[0027] 3. Terminal Peripheral Structure 3-1. Wiring-1 FIG. 3 is a schematic top view showing a terminal of a display device according to an embodiment of the present invention and its periphery. Specifically, FIG. 3 shows the terminal 112 and the wiring 118 connected to the terminal 112 in the region 200 surrounded by the broken line shown in FIG. 1. For convenience of explanation, in FIG. 3, the configuration between the substrate 102 and the counter substrate 103, the connector 116, etc. are omitted, and the terminal 112 and the wiring 118 are described.

[0028] The plurality of wirings 118 are arranged so as to obliquely straddle the seal 111. The plurality of wirings 118 are arranged to overlap with the seal 111. Each of the plurality of wirings 118 is directly or electrically connected to a terminal 112. The same signal or the same power supply potential is input to adjacent terminals. For example, a video signal is input to terminals 112-1, 112-2, 112-3, 112-4, 112 -5, and terminal 112-6.

[0029] Terminals 112-1, 112-2, 112-3, 112-4, 112-5, and terminal 112-6 can be connected to wirings 118-1, 118-2, 118-3, 118-4, 118-5, and wiring 118-6, respectively. These wirings can be electrically connected to, for example, the data signal line 124 as described above.

[0030] The wiring 118 can change the type of wiring configured according to the supplied signal. For example, for wirings 118-1 to 118-6, wirings formed of the same metal material as the scanning line 122 can be used respectively. Also, for wirings 118-1 to 118-6, wirings having the same composition as the active layer of the transistor constituting the pixel 104, the scanning line driving circuit 108, or the signal line driving circuit 110 can be used respectively. Although details will be described later, a material with higher light transmittance than the wiring formed of a metal material is used for the active layer of the transistor.

[0031] Here, when the liquid crystal element 309 is used in the display device 10 as described above, the seal 111 is arranged so as to surround the display area 106 in order to sandwich the liquid crystal layer between the substrate 102 and the counter substrate 103. Since the wiring 118 is arranged between the terminal 112 arranged at the end of the substrate 102 and the display area 106, it will overlap with the seal 111 surrounding the display area 106. The seal 111 is often made of a photocurable resin, although details will be described later. The light for curing the seal 111 is irradiated onto the seal 111 from the surface of the substrate 102 opposite to the surface on which the transistor is formed.

[0032] The light for curing the seal 111 can pass through the highly translucent wirings 118-2, 118-4, and 118-6. Therefore, the light for curing the seal 111 is irradiated onto the seal 111 that overlaps with the wirings 118-2, 118-4, and 118-6. Also, as shown in FIG. 3, since the wirings 118-1, 118-3, 118-5 formed of a metal material and the wirings 118-2, 118-4, and 118-6 are alternately arranged or arranged adjacent to each other, the scattered light of the light passing through the highly translucent wirings 118-2, 118-4, and 118-6 can irradiate the seal 111.

[0033] Here, referring to FIG. 4, an explanation of the wiring 118 using a highly translucent wiring only in the portion overlapping with the seal 111 will be given.

[0034] 3-2. Wiring-2 FIG. 4 is a schematic top view showing the terminals of the display device according to an embodiment of the present invention and its periphery. Specifically, FIG. 4 shows an example in which the wiring 118-2 is composed of a wiring 118-2a and a wiring 118-2c formed of a metal material and a highly translucent wiring 118-2b.

[0035] The wiring 118-2 uses the highly transmissive wiring 118-2b in the portion overlapping with the seal 111. The wiring 118-2b is located between the wiring 118-2a formed of a metal material and the wiring 118-2c formed of a metal material. The wiring 118-2a formed of a metal material is connected to the terminal 112-2. Also, the wiring 118-2c formed of a metal material is directly or electrically connected to the transistor constituting the pixel 104 or the scanning line driving circuit 108 or the signal line driving circuit 110.

[0036] For wirings 118-4, 118-6, 118-8, and 118-10 as well, the same configuration as that of wiring 118-2 can be used. As shown in FIG. 4, in the portion overlapping with the seal 111, by alternately arranging or adjacently arranging the wiring 118 formed of a metal material and the highly light-transmissive wiring 118, the light irradiated from the surface of the substrate 102 where the transistor is not provided can reach the seal 111 overlapping with the wiring 118 formed of the metal material. Further, since there is at least a difference in wiring resistance between the highly light-transmissive wiring 118 and the wiring 118 formed of a metal material, by using the highly light-transmissive wiring 118b only in the portion of the wiring 118 overlapping with the seal 111 and using the wirings 118-2a and 118-2c formed in the same manner as the wiring 118-1 formed of a metal material for the other portions, the difference in wiring resistance between the wiring 118-1 and the wiring 118-2 can be reduced. Therefore, the variation in wiring resistance between the wiring 118-1 and the wiring 118-2 can be reduced.

[0037] Referring to FIG. 5, the cross-sectional structure of the wiring 118-2 using the highly permeable wiring 118-2b in the portion overlapping with the seal 111 will be described.

[0038] FIG. 5 is a schematic end view showing a terminal of a display device according to an embodiment of the present invention and its periphery. Specifically, it corresponds to an end view showing a cross-section cut along A1 - A3 in FIG. 4.

[0039] The display device 10 has a substrate 102. The substrate 102 has a function of supporting a circuit formed thereon and can include glass, quartz, or a polymer. By using a polymer such as polyimide, polyamide, or polycarbonate for the substrate 102, flexibility can be imparted to the display device 10, and it is also possible to provide a so-called flexible display.

[0040] The underlayer film 128 can be provided on the substrate 102. The underlayer film 128 can prevent contamination from the substrate 102, and for example, an inorganic insulating material can be used. As the inorganic insulating material, for example, silicon nitride, silicon oxide, and composites thereof can be used. Also, as shown in FIG. 5, an underlayer film 129 can be provided on the underlayer film 128 to form an underlayer film having a laminated structure.

[0041] The insulating layer 130 can be provided on the underlayer film 129. When the transistor provided in the display region 106 adopts a bottom gate structure or a dual gate structure, the insulating layer 130 can be formed in the same process as the insulating layer provided between the bottom gate electrode and the active layer of the transistor. The same material as that of the underlayer film 128 can be used for the insulating layer 130.

[0042] The wiring 118-2b can be provided on the insulating layer 130. The same material as that of the active layer of the transistor provided in the display region 106 can be used for the wiring 118-2b. Also, the wiring 118-2b can be formed in the same process as the process in which the active layer of the transistor provided in the display region 106 is formed. Although details will be described later, as the active layer of the transistor, an oxide semiconductor layer can be used, and by reducing the resistance of the oxide semiconductor layer, it can be used for the wiring 118-2b. Therefore, the wiring 118-2b is an oxide conductive layer having the same composition as the active layer of the transistor provided in the display region 106.

[0043] The insulating layer 136 can be provided on the wiring 118-2b and the insulating layer 130. When the transistor provided in the display region 106 has a top gate structure or a dual structure, the insulating layer 136 can be formed in the same process as the process of forming the gate insulating layer provided between the active layer and the gate electrode of the transistor. The same material as that of the underlayer film 128 can be used for the insulating layer 136.

[0044] The insulating layer 138 can be provided on the insulating layer 136. The insulating layer 138 can use a single-layer or laminated structure. For the insulating layer 138, for example, silicon nitride, silicon oxide, etc. can be used.

[0045] The wiring 118-2a can be provided on the insulating layer 138. An opening 210 reaching the wiring 118-2b is formed in the insulating layer 138 and the insulating layer 136, and through the opening 210, it can be connected to the wiring 118-2b. The wiring 118-2a can be formed in the same process as the process of forming the source electrode or drain electrode of the transistor provided in the display area 106. The wiring 118-2a can be formed using a general metal material. As the metal material, for example, aluminum (Al), titanium (Ti), chromium (Cr), cobalt (Co), nickel (Ni), molybdenum (Mo), hafnium (Hf), tantalum (Ta), tungsten (W), bismuth (Bi), silver (Ag), copper (Cu), and alloys or compounds thereof can be used. The wiring 118-2a may have a single-layer structure or a laminated structure.

[0046] The insulating layer 140 can be provided on the wiring 118-2a and the insulating layer 138. The same material as the underlayer film 128 can be used for the insulating layer 140.

[0047] The terminal 112-2 can be provided on the insulating layer 140. An opening 220 reaching the wiring 118-2a is formed in the insulating layer 140, and through the opening 220, it can be connected to the wiring 118-2a. As shown in FIG. 5, the terminal 112-2 has a portion exposed from the insulating layer 152, and the exposed portion can be connected to the driving IC 114. The same material as that used for the wiring 118-2a can be used for the terminal 112-2.

[0048] The insulating layer 152 can be provided on the insulating layer 134. The insulating layer 152 can be provided on the terminal 112-2 such that the terminal 112-2 is partially exposed as described above. The light-emitting element or liquid crystal element provided in the pixel 104 is formed on the insulating layer 152. For the insulating layer 152, a photosensitive organic resin material containing an acrylic resin, polysiloxane, polyimide, polyester, etc. can be used, and it can function as an organic insulating layer.

[0049] The seal 111 can be provided on the insulating layer 152. As shown in FIG. 5, it is provided so as to overlap with the wiring 118-2b. Since the wiring 118-2b has high translucency, as described above, the light irradiated from the surface opposite to the surface on which the underlayer film 128 of the substrate 102 is provided can pass through to the seal 111. For the seal 111, for example, a photocurable resin can be used.

[0050] Although not shown in FIG. 4, the counter substrate 103 can be provided on the seal 111 as shown in FIG. 5. The counter substrate 103 is arranged to face the substrate 102. The same substrate as the substrate 102 can be used for the counter substrate 103.

[0051] As described above, in the portion overlapping with the seal 111, the wiring 118-2 is composed of the highly permeable wiring 118-2b. Next, a method for manufacturing a transistor in which an active layer is formed in the same process as the highly permeable wiring 118-2b will be described.

[0052] Referring to FIGS. 6B to 6L, an example of a method for manufacturing a transistor provided in the display region 106 will be described. FIGS. 6B to 6L are diagrams for explaining a method for manufacturing a display device according to an embodiment of the present invention. The method for manufacturing a transistor shown in FIGS. 6B to 6L is, for example, a method for manufacturing a transistor having a top gate structure shown in FIG. 6A.

[0053] 4. Method for manufacturing a display device FIG. 6A is an end view showing the configuration of a display device according to an embodiment of the present invention. In FIG. 6A, transistors 301, 302, and 307 shown in FIG. 2A or FIG. 2B are transistors provided in the signal line driving circuit 110 and the scanning line driving circuit 108. FIG. 6A shows transistor 301 shown in FIG. 2A as an example.

[0054] As shown in FIG. 6A, the transistor includes a base film 128, an insulating layer 130, an oxide semiconductor layer 164, a gate insulating layer 136, a gate electrode 182, insulating layers 138-1, 138-2, a source electrode 172S, and a drain electrode 172D on the substrate 102.

[0055] Next, a method for manufacturing transistor 301 will be described.

[0056] As shown in FIG. 6B, the base film 128 and the insulating layer 130 are formed on the substrate 102.

[0057] Next, as shown in FIG. 6C, an oxide semiconductor layer 162 is formed on the insulating layer 130. A metal oxide having semiconductor characteristics can be used for the oxide semiconductor layer 162. 。

[0058] s When the oxide semiconductor layer 162 is formed by a patterning method, the oxide semiconductor layer 162 is formed while controlling the temperature of the object to be film-formed, for example, the substrate 102. In order to control the temperature of the object to be film-formed, for example, film formation is performed while cooling the object to be film-formed. For example, the object to be film-formed may be cooled from the surface opposite to the film-formed surface so that the temperature of the film-formed surface of the object to be film-formed (hereinafter referred to as "film formation temperature") becomes 100°C or lower, 70°C or lower, 50°C or lower, or 30°C or lower. 。

[0059] Next, as shown in FIG. 6D, a pattern of the oxide semiconductor layer 162 is formed. It is preferable to form a pattern of the oxide semiconductor layer 162 before firing the oxide semiconductor layer 162. 。まEven if the oxide semiconductor layer 162 is damaged by etching, the damage can be repaired by firing the oxide semiconductor layer 162.

[0060] After the patterning of the oxide semiconductor layer 162, the oxide semiconductor layer 162 is fired. In the firing of the oxide semiconductor layer 162, the oxide semiconductor layer 162 is held at a predetermined temperature for a predetermined time. The predetermined temperature is 300°C or higher and 500°C or lower, preferably 350°C or higher and 450°C or lower. Also, the holding time at the temperature is 15 minutes or longer and 120 minutes or shorter, preferably 30 minutes or longer and 60 minutes or shorter. 。

[0061] Next, as shown in FIG. 6E, a gate insulating layer 136 is formed on the oxide semiconductor layer 162. It is preferable to use an insulating layer with few defects for the gate insulating layer 136. In order to form an insulating layer with few defects as the gate insulating layer 136, the gate insulating layer 136 may be formed at a film formation temperature of 350°C or higher. Also, after forming the gate insulating layer 136, a process of implanting oxygen into a part of the gate insulating layer 136 may be performed.

[0062] Next, as shown in FIG. 6F, a metal oxide layer 166 mainly composed of aluminum is formed on the gate insulating layer 136, fired, and then the metal oxide layer 166 is removed.

[0063] Inorganic insulating layers such as aluminum oxide (AlO x ), aluminum oxynitride (AlO x N y ), aluminum nitride oxide (AlN x O y ), and aluminum nitride (AlN x ) are used for the metal oxide layer 166. Here, the ratio of aluminum contained in the metal oxide layer 166 is preferably 1% or more of the entire metal oxide layer 166. Also, the ratio of aluminum contained in the metal oxide layer 166 may be 5% or more and 70% or less, 10% or more and 60% or less, or 30% or more and 50% or less of the entire metal oxide layer 166.

[0064] The film thickness of the metal oxide layer 166 may be, for example, 5 nm or more and 100 nm or less, 5 nm or more and 50 nm or less, 5 nm or more and 30 nm or less, or 7 nm or more and 15 nm or less.

[0065] After the metal oxide layer 166 is formed, the metal oxide layer 166 is fired. After firing the metal oxide layer 166, the metal oxide layer 166 is removed. At least the portion of the metal oxide layer 166 that overlaps with the oxide semiconductor layer 164 may be entirely removed.

[0066] Next, as shown in FIG. 6G, a gate electrode 182 is formed on the gate insulating layer 136. The gate electrode 182 is formed so as to be in contact with the gate insulating layer 136 exposed by removing the metal oxide layer 166. For the gate electrode 182, for example, aluminum (Al), titanium (Ti), chromium (Cr), cobalt (Co), nickel (Ni), molybdenum (Mo), hafnium (Hf), tantalum (Ta), tungsten (W), bismuth (Bi), silver (Ag), copper (Cu), and alloys or compounds thereof can be used.

[0067] A source region 164S and a drain region 164D of the oxide semiconductor layer 164 are formed. Specifically, impurity elements are implanted into the oxide semiconductor layer 164 through the gate insulating layer 136 using the gate electrode 182 as a mask by ion implantation or ion doping method. Impurity elements such as argon (Ar), phosphorus (P), boron (B), etc. are implanted into a part of the oxide semiconductor layer 164 not covered by the gate electrode 182. By implanting such impurities into a part of the oxide semiconductor layer 164, that part is made to have a lower resistance. Specifically, the source region 164S and the drain region 164D sandwiching the channel region 164C of the oxide semiconductor layer 164 shown in FIG. 6H correspond to a part of the oxide semiconductor layer 164 not covered by the gate electrode 182, and impurity elements are implanted. Since the channel region 164C of the oxide semiconductor layer 164 is covered by the gate electrode 182, no impurity elements are implanted.

[0068] Here, the wiring 118-2 shown in FIG. 4 and the wiring 118-2b shown in FIG. 5 are also formed in the same process as the active layer of the transistor 301. Since there is no portion covered by the gate electrode in the wiring 118-2 and the wiring 118-2b like the transistor 301, impurity elements are implanted throughout the wiring 118-2 and the wiring 118-2b. Therefore, the wiring 118-2 and the wiring 118-2b have the same composition as the oxide semiconductor layer 164 and are further made to have a lower resistance by the implantation of impurity elements, thus becoming an oxide conductive layer. The wiring 118-2 and the wiring 118-2b, which are oxide conductive layers, have impurity elements implanted in the same manner as the source region 164S and the drain region 164D of the oxide semiconductor layer 164 described above, and thus contain the same impurity elements as the source region 164S and the drain region 164D.

[0069] Next, as shown in FIG. 6I, an insulating layer 138-1 and an insulating layer 138-2 are formed over the gate electrode 182 and the gate insulating layer 136.

[0070] Next, as shown in FIG. 6J, openings 240 and 250 are formed in the gate insulating layer 136, the insulating layer 138-1, and the insulating layer 138-2. The source region 164S is exposed by the opening 240, and the drain region 164D is exposed by the opening 250. After the source region 164S and the drain region 164D are exposed by the openings 240 and 250, the source electrode 172S and the drain electrode 172D shown in FIG. 6K are formed.

[0071] Through the above manufacturing process, the transistor 301 having a top gate structure can be formed. When forming a transistor having a bottom gate structure and a dual gate structure, a bottom gate electrode may be formed between the underlying film 128 and the insulating layer 130, and the insulating layer 130 may be made to function as a gate insulating film between the bottom gate electrode and the oxide semiconductor layer 164.

[0072] When an organic EL element or a liquid crystal element is mounted on the display device 10, the insulating layer 152 shown in FIG. 5 is formed on the insulating layer 140, and the organic EL element or the liquid crystal element is formed. As shown in FIG. 6L, the insulating layer 140 is formed on the insulating layer 132, the source electrode 172S, and the drain electrode 172D. The terminal 112-2 shown in FIG. 5 is formed on the insulating layer 140.

[0073] Together with each manufacturing process of the above transistor, the wiring 118-2 and the wiring 118-2b can be formed.

[0074] 5. Modification Example of Wiring 5-1. Modification Example 1 Referring to FIG. 7, a modification example of the terminal of the display device 10 and its periphery will be described. FIG. 7 is a schematic top view showing the terminal of the display device according to an embodiment of the present invention and its periphery. Specifically, it shows a modification example of the configuration of the terminal 112 and the wiring 118 in the region 200 surrounded by the broken line shown in FIG. 1. Note that the description of the configuration identical or similar to that of the display device 10 shown in FIGS. 1 to 6 may be omitted.

[0075] The difference from the wiring 118 shown in FIG. 3 is that the wiring 118-1 connected to the terminal 112-1 overlaps the wiring 118-2 connected to the terminal 112-2 to which the video signal is supplied. Further, as shown in FIG. 7, the wiring 118-5 connected to the terminal 112-5 may also overlap the wiring 118-6 connected to the terminal 112-6 to which the video signal is supplied.

[0076] As shown in FIG. 7, wiring 118-1 overlaps with wiring 118-2 at a portion straddling seal 111 and at a portion disposed obliquely with respect to seal 111. By arranging wiring 118-1 to overlap with wiring 118-2, a distance can be provided from wiring 118-11 that connects to terminal 112-11 adjacent to terminal 112-1. At this time, since wiring 118-11 is formed of a metal material, this distance also provides a distance between wiring 118-11 and wiring 118-1 at the portion overlapping seal 111, and the light irradiated for seal 111 to cure can pass between these wirings and reach seal 111 sufficiently.

[0077] Any layer used in the manufacturing process of display device 10 can be combined and used for wiring 118. However, when an oxide conductive layer is used for wiring 118-2 as shown in FIG. 7, it is preferable not to use a layer that constitutes an electrode or wiring to which scanning line driving circuit 108 or scanning line 122 is supplied for wiring 118-1 that overlaps therewith. In other words, when an oxide conductive layer is used for one of the overlapping wirings 118, it is preferable not to use the same layer as the layer that functions as the gate electrode of the transistor constituting pixel 104 or scanning line driving circuit 108 and signal line driving circuit 110 for the layer used for the other wiring 118. When a layer that functions as the gate electrode of a transistor is used for wiring 118 that overlaps with wiring 118 using an oxide conductive layer, the wiring 118 may lose its function as a wiring, so the above configuration is not preferable.

[0078] Next, with reference to FIG. 8, a modified example of wiring 118 shown in FIG. 7 will be described.

[0079] 5-2. Modified Example 2 FIG. 8 is a schematic top view showing terminals and their surroundings of a display device according to an embodiment of the present invention. Specifically, it shows the configuration of terminals 112 and wiring 118 in region 200 surrounded by the broken line shown in FIG. 1. Note that descriptions of the same or similar configurations as those of display device 10 shown in FIGS. 1 to 7 may be omitted.

[0080] The difference from the wiring 118 shown in FIG. 7 is that an oxide conductive layer is used for the wiring 118-2b in the portion overlapping with the seal 111 of the wiring 118-2, and a wiring 118-2a formed of a metal material is used between the wiring 118-2b and the terminal 112-2.

[0081] As shown in FIG. 8, it is a schematic top view showing a terminal of a display device according to an embodiment of the present invention and its surroundings. Specifically, FIG. 8 shows a wiring 118-2 composed of a wiring 118-2a and a wiring 118-2c (not shown) formed of a metal material and a wiring 118-2b using an oxide conductive layer.

[0082] The wiring 118-6 has the same configuration as the wiring 118-2. An oxide conductive layer is used for the wiring 118-6b in the portion overlapping with the seal 111. Also, a wiring 118-6a formed of a metal material is used between the wiring 118-6b and the terminal 112-6, and the wiring 118-6c formed of a metal material is connected to one end different from the end connected to the wiring 118-6a.

[0083] Next, with reference to FIG. 9, the cross-sectional structure of the overlapping portion of the wiring 118-2b using an oxide conductive layer and the wiring 118-1 formed of a metal material in the portion overlapping with the seal 111 will be described.

[0084] FIG. 9 is a schematic end view showing a terminal of a display device according to an embodiment of the present invention and its surroundings. Specifically, it corresponds to an end view showing a cross-section cut along B1-B3 in FIG. 8.

[0085] The wiring 118-1 is disposed on the base film 128. The wiring 118-1 is located between the base film 129 and the wiring 118-2b, and has an insulating layer 130 therebetween. The wiring 118-1 can be formed in the same layer as the bottom gate electrode in the manufacturing process of the transistors constituting the pixel 104 and the scanning line driving circuit 108 or the signal line driving circuit 110 of the heron 14. For the wiring 118-1, for example, aluminum (Al), titanium (Ti), chromium (Cr), cobalt (Co), nickel (Ni), molybdenum (Mo), hafnium (Hf), tantalum (Ta), tungsten (W), bismuth (Bi), silver (Ag), copper (Cu), and alloys or compounds thereof can be used.

[0086] Next, referring to FIG. 10, a modified example of the wiring 118 shown in FIG. 7 will be described.

[0087] 5-3. Modified Example 3 FIG. 10 is a schematic top view showing the terminals of the display device according to an embodiment of the present invention and the periphery thereof. Specifically, a modified example of the configuration of the terminal 112 and the wiring 118 in the region 200 surrounded by the broken line shown in FIG. 1 is shown. Note that descriptions of configurations that are the same as or similar to those of the display device 10 shown in FIGS. 1 to 9 may be omitted.

[0088] The difference from the wiring 118 shown in FIG. 7 is that the wiring 118-1 and the wiring 118-11 overlap. Further, the wiring 118-5 and the wiring 118-12 may further overlap.

[0089] As shown in FIG. 10, wiring 118-1 overlaps with wiring 118-11 in the portion straddling seal 111 and in the portion disposed obliquely with respect to seal 111. Wiring 118-1 formed of a metal material overlaps with wiring 118-11, and wiring 118-2 using an oxide conductive layer is disposed adjacent to them. By disposing wiring 118-1 and wiring 118-11 with low light transmittance and wiring 118-2 with high light transmittance adjacent to each other, it is not necessary to provide a large distance between wirings 118. Further, with such an arrangement, the number of wirings 118 to be overlapped can be reduced. As a result, the height of the portion where a small number of wirings 118 are overlapped is lower than the height of the portion where a large number of wirings 118 are overlapped, for example, lower than the height of the portion where wiring 118-1 and wiring 118-11 are overlapped. By thus reducing the height of the overlapped portion, it is possible to suppress the formation defect of wiring 118 that has occurred due to the high height of the overlapped portion.

[0090] Next, referring to FIG. 11, a modified example of the wiring 118 shown in FIG. 10 will be described.

[0091] 5-4. Modified Example 4 FIG. 11 is a schematic top view showing the terminal of the display device according to an embodiment of the present invention and its periphery. Specifically, it shows the configuration of terminal 112 and wiring 118 in the region 200 surrounded by the broken line shown in FIG. 1. Note that descriptions of the same or similar configurations as those of the display device 10 shown in FIGS. 1 to 10 may be omitted.

[0092] FIG. 11 is a schematic top view showing the terminal of the display device according to an embodiment of the present invention and its periphery. Specifically, it shows the configuration of terminal 112 and wiring 118 in the region 200 surrounded by the broken line shown in FIG. 1. Note that descriptions of the same or similar configurations as those of the display device 10 shown in FIGS. 1 to 10 may be omitted.

[0093] The difference between the wiring 118 shown in FIG. 10 and the wiring 118-2 is that for the wiring 118-2b in the portion overlapping with the seal 111, an oxide conductive layer is used, and for the wiring 118-2a formed of a metal material between the wiring 118-2b and the terminal 112-2. Also, one end of the wiring 118-2b is connected to the wiring 118-2a, and although not shown, the other end of the wiring 118-2b is connected to the wiring 118-2c.

[0094] The wiring 118-6 has the same configuration as the wiring 118-2. For the wiring 118-6b in the portion overlapping with the seal 111, an oxide conductive layer is used. Also, for the wiring 118-6a formed of a metal material between the wiring 118-6b and the terminal 112-6, the wiring 118-6c formed of a metal material is connected to one end different from the end connected to the wiring 118-6a.

[0095] The display device 10 of this embodiment can use an oxide conductive layer formed in the same manner as the formation of the source region 164S and the drain region 164D of the oxide semiconductor layer of the transistor for the wiring 118 that connects the terminals 112 used for connecting the transistors constituting the pixel 104 or the scanning line driving circuit 108 and the signal line driving circuit 110 to an external circuit. Since the oxide conductive layer has high light transmittance, by using the oxide conductive layer for the wiring 118 overlapping with the seal 111, light can be irradiated to the seal 111 through the oxide conductive layer, and the seal 111 can be sufficiently cured even in the overlapping portion of the wiring. Therefore, this embodiment can provide a display device in which defects and deterioration due to insufficient curing of the seal 111 are suppressed.

[0096] Furthermore, the display device 10 of this embodiment can narrow the space between the plurality of wirings 118 and can arrange them densely. Thereby, the display device 10 of this embodiment can have a large number of wirings 118 in a narrow area. Therefore, this embodiment can achieve high definition and narrow bezel.

[0097] <Second Embodiment> In this embodiment, the structure of the wiring 218 of the display device 10 according to one embodiment of the present invention will be described. One of the differences between the wiring 218 and the wiring 118 of the first embodiment is that a plurality of wirings 218 formed of a metal material are provided adjacent to each other, and the wiring 218 using an oxide conductive layer overlaps at least one of the plurality of wirings 218 formed of a metal material. Explanation of the same or similar configurations as those of the first embodiment may be omitted.

[0098] FIG. 12 is a schematic top view showing a terminal of a display device according to an embodiment of the present invention and its surroundings. An automatic gain control voltage is input to the terminals 212-2 and 212-5 shown in FIG. 12, a video signal is supplied to the terminals 212-2 and 212-6, and a scanning signal can be supplied to the terminals 212-11 and 212-12.

[0099] The wirings 218-1 and 218-5 are connected to the terminals 212-1 and 212-5, respectively. The wirings 218-2 and 218-6 are connected to the terminals 212-2 and 212-6, respectively. The wirings 218-11 and 218-12 are connected to the terminals 212-11 and 212-12, respectively.

[0100] The wirings 218-1, 218-5, 218-11, and 218-12 are wirings formed of a metal material. An oxide conductive layer is used for the wirings 218-2 and 218-6. The wirings 218-2 and 218-6 are connected to the terminals 212-2 and 212-6 via the wirings 218-2a and 218-6a formed of a metal material, respectively.

[0101] The wiring 218-1 and the wiring 218-2 can overlap in a portion extending in a direction oblique to the direction in which the plurality of terminals 212 are arranged. However, depending on the routing method of the wiring 218, the wiring 218-1 and the wiring 218-2 can also overlap in a portion extending substantially perpendicular or parallel to the direction in which the plurality of terminals 212 are arranged. The wiring 218-5 and the wiring 218-6 can be arranged in the same manner as the wiring 218-1 and the wiring 218-2.

[0102] The wiring 218-11 is arranged between the wiring 218-2 and the wiring 218-6. Similarly, the wiring 218-12 is also arranged between the wiring 218-2 and the wiring 218-6.

[0103] As described above, the wiring 218-1 formed of a metal material and the wiring 218-2 using an oxide conductive layer are overlapped, and further, the wiring 218-11 formed of a metal material can be arranged adjacent to the overlapping wirings 218-1 and 218-2 as shown in FIG. 12.

[0104] Also, the oxide conductive layer used for the wiring 218-2 is formed in the same process as the oxide semiconductor layer which is the active layer of the transistors constituting the pixel 104 or the scanning line driving circuit 108 and the signal line driving circuit 110. Therefore, the film thickness of the oxide conductive layer is smaller than the film thicknesses of the wiring 218-1 and the wiring 218-11 formed of a metal material. From the above, when the wiring 218-1 formed of a metal material and the wiring 218-2 using an oxide conductive layer overlap, the height of the overlapping portion can be significantly lower than the height of the overlapping portion when the wiring 218-1 and the wiring 218-11 formed of a metal material overlap.

[0105] Next, referring to FIG. 13, a modified example of the wiring 218 shown in FIG. 12 will be described.

[0106] FIG. 13 is a schematic top view showing the terminals of the display device according to an embodiment of the present invention and its periphery. Specifically, it shows the configuration of a terminal 212 corresponding to the terminal 112 and a wiring 218 corresponding to the wiring 118 in a region 200 surrounded by a broken line shown in FIG. 1. Note that descriptions of the same or similar configurations as those of the display device 10 shown in FIGS. 1 to 12 may be omitted.

[0107] The difference from FIG. 12 is that a wiring 218-2b using an oxide conductive layer is used for a portion where the wiring 218-2 overlaps with the wiring 218-1, and a wiring 218-2a formed of a metal material is used for a portion where the wiring 218-2 does not overlap with the wiring 218-1. As shown in FIG. 13, a wiring 218-2a formed of a metal material is used for a portion where the wiring 218-2 does not overlap with the wiring 218-1 around the terminal 212. Although not shown, a wiring 218-2c formed of a metal material can be used for a portion where the wiring 218-2 does not overlap with the wiring 218-1 between the transistor constituting the pixel 104 and the scanning line driving circuit 108 or the signal line driving circuit 110 and the terminal 212.

[0108] Here, referring to FIGS. 14A and 14B, the cross-sectional structure of the portion where the wiring 218-2 overlaps with the wiring 218-1 will be described.

[0109] FIG. 14A is a schematic end view showing the terminals of the display device according to an embodiment of the present invention and its periphery. Specifically, it corresponds to an end view showing a cross-section cut along C1-C2 in FIG. 13. FIG. 14B is a schematic end view showing the periphery of the terminals of the display device according to the comparative example. In the display device according to the comparative example, a wiring formed of a metal material is used for the wiring 218-2 that overlaps with the wiring 218-1.

[0110] FIG. 14A shows an example of this embodiment in which the wiring 218-2b is provided on the wiring 218-1. FIG. 14B shows a comparative example in which a wiring 218-2ex formed of a metal material is provided on the wiring 218-1.

[0111] When comparing the height of the overlapping and stacked portion of wiring 218-1 and wiring 218-2b shown in FIG. 14A with the height of the overlapping and stacked portion of wiring 218-1 and wiring 218-2ex shown in FIG. 14B, the portion where wiring 218-2b overlaps is lower than the height of the portion where wiring 218-2ex overlaps and is stacked.

[0112] Furthermore, when comparing the unevenness of the insulating layer 238 shown in FIG. 14A with the unevenness of the insulating layer 238 shown in FIG. 14B, it can be seen that the unevenness of the insulating layer 238 shown in FIG. 14B is large. This unevenness greatly affects the manufacturing process after the formation of the wiring 218 or after the formation of the insulating layer 238, and mainly tends to cause defects in the formation of wiring and the like. In particular, in the case of defective wiring formation, the metal material or the like used for the wiring may not be completely removed from locations other than the pattern, and the remaining metal material that could not be removed may cause a short circuit in the wiring.

[0113] In the display device 10 of the present embodiment, an oxide conductive layer having the same film thickness as the oxide semiconductor layer of the transistor can be used for the wiring 218-2. Thereby, the overlapping portion between the wiring 218-2 and the wiring 2 18-1 can reduce the influence on the subsequent process after the formation of the wiring 218-2. Therefore, the present embodiment can provide a display device with fewer defects and suppressed deterioration.

[0114] Also, in the display device 10 of the present embodiment, by stacking a plurality of wirings 218, the area occupied by the plurality of wirings 218 in the display device can be reduced. Therefore, the present embodiment can provide a display device with a narrow bezel.

[0115] Furthermore, in the display device 10 of the present embodiment, by stacking a plurality of wirings 218, more wirings 218 can be provided in the display device, so that a high-definition display device can be provided.

[0116] As long as they do not conflict with each other, the embodiments described above as embodiments of the present invention can be implemented in appropriate combinations. Based on each embodiment, those in which a person skilled in the art appropriately adds, deletes, or changes the design of components, or adds, omits, or changes conditions of processes, are also included in the scope of the present invention as long as they have the gist of the present invention.

[0117] In addition, even if there are other operational effects different from those brought about by the aspects of the above-described embodiments, those that are obvious from the description of this specification or can be easily predicted by a person skilled in the art are naturally understood to be brought about by the present invention.

Explanation of Reference Signs

[0118] 10: Display device, 102: Substrate, 103: Opposing substrate, 104: Pixel, 106: Display area, 107: Peripheral area, 108: Scanning line drive circuit, 110: Signal line drive circuit, 111: Seal, 112: Terminal, 112-1: Terminal, 112-11: Terminal, 112-12: Terminal, 112-2: Terminal, 112-3: Terminal, 112-4: Terminal, 112-5: Terminal, 112-6: Terminal, 116: Connector, 118: Wiring, 118-1: Wiring, 118-10: Wiring, 118-11: Wiring, 118-12: Wiring, 118-2: Wiring, 118-2a: Wiring, 118-2b: Wiring, 118-2c: Wiring, 118-3: Wiring, 118-4: Wiring, 118-5: Wiring, 118-6: Wiring, 118-6a: Wiring, 118-6b: Wiring, 118-6c: Wiring, 118-8: Wiring, 118b: Wiring, 122: Scanning line, 124: Data signal line, 128: Underlayer film, 129: Underlayer film, 130: Insulating layer, 132: Insulating layer, 134: Insulating layer, 135: Wiring, 136: Insulating layer, 136: Gate insulating layer, 138: Insulating layer, 138-1: Insulating layer, 138-2: Insulating layer, 140: Insulating layer, 152: Insulating layer, 162: Oxide semiconductor layer, 164: Oxide semiconductor layer, 164C: Channel region, 164D: Drain region, 164S: Source region, 166: Metal oxide layer, 172D: Drain electrode, 172S: Source electrode, 180: Wiring, 182: Gate electrode, 200: Region, 210: Opening, 212: Terminal, 212-1: Terminal, 212-11: Terminal, 212-12: Terminal, 212-2: Terminal, 212-5: Terminal, 212-6: Terminal, 218: Wiring, 218-1: Wiring, 218-11: Wiring, 218-12: Wiring, 218-2: Wiring, 218-2a: Wiring, 218-2b: Wiring, 218-2c: Wiring, 218-2ex: Wiring, 218-5: Wiring, 218-6: Wiring, 218-6a: Wiring, 220: Opening, 238: Insulating layer, 240: Opening, 250: Opening, 300: Pixel circuit, 301: Transistor, 301: Driving transistor, 302: Transistor, 302: Selection transistor, 303: Holding capacitor, 304: Light-emitting element, 305: Anode power line, 306: Cathode power line, 307: Transistor, 308: Holding capacitor, 309: Liquid crystal element

Claims

1. a plurality of transistors each having an oxide semiconductor layer; a first terminal electrically connected to the plurality of transistors; a second terminal electrically connected to the plurality of transistors and adjacent to the first terminal; a first wiring electrically connected to the plurality of transistors and the first terminal and positioned between the plurality of transistors and the first terminal; a second wiring electrically connected to the plurality of transistors and the second terminal and located between the plurality of transistors and the second terminal; The first wiring is formed of a metal material, the second wiring includes an oxide conductive layer having the same composition as the oxide semiconductor layer; Display device.

2. a plurality of pixels in which at least one of the plurality of transistors is disposed; a seal surrounding the plurality of pixels; The seal overlaps with the second wiring. The display device according to claim 1 .

3. the second wiring further includes a third wiring and a fourth wiring formed of a metal material, and a fifth wiring located between the third wiring and the fourth wiring, The third wiring is connected to the second terminal, the fourth wiring is connected to the plurality of transistors, The seal overlaps with the fifth wiring. The display device according to claim 2 .

4. The second wiring and the first wiring overlap each other. The display device according to claim 1 .

5. a substrate on which the plurality of transistors are disposed; The first wiring is provided in a layer between the substrate and the oxide semiconductor layer. The display device according to claim 4.

6. a third terminal electrically connected to the plurality of transistors and adjacent to the first terminal; a sixth wiring electrically connected to the plurality of transistors and the third terminal and located between the plurality of transistors and the third terminal, the plurality of transistors each include the oxide semiconductor layer between the substrate and a gate electrode; the gate electrode and the sixth wiring are electrically connected to each other, The sixth wiring and the second wiring are disposed adjacent to each other. The display device according to claim 5 .

7. The sixth wiring overlaps with the first wiring. The display device according to claim 6.

8. a plurality of pixels in which at least one of the plurality of transistors is disposed; A seal surrounding the plurality of pixels; the second wiring further includes a third wiring and a fourth wiring formed of a metal material, and a fifth wiring located between the third wiring and the fourth wiring, The third wiring is connected to the second terminal, the fourth wiring is connected to the plurality of transistors, The seal overlaps with the fifth wiring. The display device according to claim 7.

9. the oxide semiconductor layer has a channel region and a source region and a drain region sandwiching the channel region; the oxide conductive layer contains the same impurity element as the source region and the drain region; The display device according to claim 1 .

10. The second wiring is electrically connected to the source region or the drain region. The display device according to claim 9.

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