Method and apparatus for plasma etching dielectric substrates
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- SPTS TECH LTD
- Filing Date
- 2023-08-24
- Publication Date
- 2026-06-30
Smart Images
Figure 00000000_0000_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to a method for plasma etching a workpiece and an electrostatic chuck (ESC) for use in a plasma etching apparatus. [Background technology]
[0002] In vacuum-based plasma etch and deposition tools in the semiconductor manufacturing industry, it is difficult to remove heat generated by plasma or exothermic processes from a wafer or substrate due to the subatmospheric pressure in the process chamber. The reduced pressure limits heat transfer due to poor convection and direct conduction of heat from the substrate to the substrate support. To achieve optimal control of the substrate temperature, an electrostatic chuck or "ESC" is used to control the temperature of the substrate in a vacuum system. The electrostatic attraction between the ESC and the substrate allows the cavity or channel between the substrate and the surface of the ESC to be pressurized with an inert gas such as He at a pressure high enough to facilitate good thermal conduction between the substrate and the thermally controlled ESC. This process is known as backside pressurization. Electrostatic clamping of the substrate, and thus tight temperature control, can be maintained even when the processing chamber is operating at a pressure substantially lower than the pressure between the ESC and the substrate.
[0003] There are generally two different kinds of ESCs used to clamp substrates in vacuum systems: bipolar (Coloumb) and monopolar (Johnsen-Rahbek) ESCs. In both types, a metal electrode or electrodes are enclosed within a dielectric structure that is then attached to a metal substrate support, as shown in FIG. 1. The substrate support 2, typically fabricated from aluminum or stainless steel, is connected to an RF power source 4, and an electrostatic chuck ESC 6 is attached to the top surface of the substrate support 2. The ESC 6 has a metal electrode sandwiched between two layers of dielectric material. The electrodes are attached to a high voltage DC power source 8, which can supply up to + / - 9 kV for relatively thick ceramic layers, greater than 0.5 mm in thickness. For thinner polymer layers, such as polyimide, the layer thickness can be less than 0.1 mm, and DC power is typically supplied at less than + / - 2 kV. A backside gas inlet for a coolant gas, typically He or Ar, is provided by a pipe 20 in the substrate support 2, allowing gas to be injected between the substrate 12 and the surface of the ESC 6. Coolant channels 10 allow for the flow of coolant to remove heat from the substrate support 2, while a resistive heater (not shown) can facilitate high temperature operation. Loading and unloading of the substrate 12 with the coating 14 is accomplished using a lift assembly 18. A shield ring 16, typically formed from a ceramic, protects the substrate support 2 from the plasma and helps to shape the plasma in the vicinity of the substrate 12.
[0004] In a bipolar ESC, there are at least two electrodes of opposite polarity that generate an electrostatic field on the backside of the substrate. This requires that the substrate support charge transfer, i.e., the substrate must be formed from a semiconducting or metallic material. Bipolar ESCs are widely used because the majority of substrates processed in the semiconductor and optoelectronic industries are themselves semiconducting. However, as new applications develop where the substrate in contact with the ESC is not conductive, alternative approaches to cooling the wafer are required.
[0005] For example, the production of GaN-based micro-LEDs involves the isolation of discrete regions of GaN that are typically deposited on a sapphire substrate. This type of application highlights significant issues regarding thermal management and wafer retention in vacuum-based process systems. To isolate the micro-LEDs, a mask is applied to the device and a plasma etching process is used to etch the uncovered GaN layer of the device down to the sapphire substrate.
[0006] This results in the separation of tens of thousands of micro-LEDs, with dimensions less than 40 μm, even on a 150 mm sapphire wafer. Once the GaN micro-LEDs are separated, they are removed from the sapphire substrate by a lift-off process and then assembled into arrays. However, traditional forms of bipolar electrostatic clamping fail when the semiconducting GaN layer becomes non-continuous. As shown in Figure 2A, when there is a continuous layer of a semiconductor such as GaN on a dielectric substrate such as sapphire, the bipolar ESC can hold the wafer by electrostatic attraction between the GaN / sapphire and the surface of the ESC. However, when the etching process creates small islands of GaN, as shown in Figure 2B, the clamping fails because the individual metal electrodes bond directly to the individual islands and the bipolar bond is lost.
[0007] A monopolar ESC has electrodes maintained at a single potential and relies on an external electron source to generate an electrostatic field. The generation of plasma by the plasma chamber typically provides a current path to ground, which then allows the monopolar ESC to clamp the substrate to the substrate support. As shown in Figures 3A and 3B, the monopolar ESC secures the substrate to the ESC regardless of whether a continuous layer of conductive or semiconductive material is present. However, this requires the plasma to begin before clamping can occur, so there is some undesirable heating of the wafer before the ESC can clamp the substrate and provide cooling. Charge build-up between the ESC and the dielectric substrate can also be a concern, as it can lead to problems when the substrate is unclamped. This can lead to handling issues that could potentially result in the substrate being mishandled.
[0008] Alternatively, an ESC with interdigitated electrodes as shown in US Patent 9,793,149 B2 can be used to clamp the dielectric substrate. Interdigitated ESCs require a thin top layer of ceramic so that a sufficient electric field can pass through the ceramic to reach the wafer. As the ESC is exposed to plasma, mainly during inter-substrate cleaning, the top ceramic is consumed, so a thinner ceramic means a shorter ESC life.
[0009] Alternative means of holding the substrate include mechanical clamps or an additional conductive coating on the underside of the substrate. However, edge rejection and particle generation are issues with clamp rings, while depositing a conductive layer on the underside of a dielectric substrate adds additional process steps and potential contamination concerns by adding and removing layers from the substrate. [Prior art documents] [Patent documents]
[0010] [Patent Document 1] U.S. Patent No. 9793149 [Patent Document 2] US Patent Application Publication No. 2017 / 278730 Summary of the Invention [Problem to be solved by the invention]
[0011] Therefore, what is needed is an improved method of plasma etching that can maintain the necessary clamping and control of heat transfer between the substrate and the substrate support for dielectric substrates. [Means for solving the problem]
[0012] The present invention, in at least some of its embodiments, seeks to address at least some of the problems, desires and needs set forth above.
[0013] According to a first aspect of the present invention there is provided a method of plasma etching a workpiece, the method comprising: placing a workpiece on a substrate support in a plasma chamber, the workpiece including a dielectric substrate and at least one semiconductor layer on the dielectric substrate, the substrate support including an electrostatic chuck ("ESC"), the ESC including at least two electrodes; in a first bipolar mode of operation, applying a positive voltage to one of the electrodes and a negative voltage to the other of the electrodes to electrostatically clamp the workpiece to the ESC; · plasma etching at least one semiconductor layer by generating a plasma in a plasma chamber, wherein at a period after the plasma is ignited, operation of the ESC is switched to a unipolar operating mode in which the electrodes have the same voltage applied to each electrode; · Switching the operation of the ESC to a second bipolar mode of operation where a positive voltage is applied to one of the electrodes and a negative voltage is applied to the other of the electrodes.
[0014] The inventors have found that by switching the ESC between bipolar and unipolar modes during plasma etching of a semiconductor layer, it is possible to ensure clamping of the substrate and sufficient heat transfer to and from the substrate throughout the etching process, even for dielectric substrates.
[0015] The step of switching the operation of the ESC to the second bipolar mode of operation can be performed after the step of plasma etching the at least one semiconductor layer is completed. Alternatively, the step of switching the operation of the ESC to the second bipolar mode of operation can be performed during the step of plasma etching the at least one semiconductor layer. The presence of plasma in the plasma chamber while the ESC is in the second bipolar mode assists in reducing charge retention in the dielectric substrate, which assists in removal of the workpiece from the chamber when etching is completed.
[0016] The step of plasma etching the at least one semiconductor layer may include a first bulk etch stage performed until the majority of the etch reaches an endpoint, and a second overetch stage, and the step of switching the operation of the ESC to the second bipolar mode of operation is performed when the endpoint is reached or during the second etch stage. The ESC may be maintained in the second bipolar mode of operation for a period of time after the step of plasma etching the at least one semiconductor layer is terminated. The step of plasma etching the at least one semiconductor layer may include etching through the at least one semiconductor layer to form a plurality of discrete regions of semiconductor on the dielectric substrate, and the step of switching the operation of the ESC to the unipolar mode of operation is performed prior to the formation of the discrete regions of semiconductor. When the step of plasma etching the at least one semiconductor layer includes a first etch stage and a second etch stage, the step of switching the operation of the ESC to unipolar operation may be performed prior to the end of the first etch stage.
[0017] The absolute value of the voltage applied to each of the electrodes may be the same in the first bipolar mode of operation. The absolute value of the voltage applied to each of the electrodes may be the same in the second bipolar mode of operation. The absolute value of the voltage applied to the electrodes in the first bipolar mode of operation may be the same as the absolute value of the voltage applied to the electrodes in the second bipolar mode of operation. Alternatively, the absolute value of the voltage applied to the electrodes in the second bipolar mode of operation may be different from the absolute value of the voltage applied to the electrodes in the first bipolar mode of operation. For example, the absolute value of the voltage applied to the electrodes in the second bipolar mode of operation may be lower than the absolute value of the voltage applied to the electrodes in the first bipolar mode of operation. The lower absolute value of the voltage in the second bipolar mode of operation than the absolute value of the voltage applied in the first bipolar mode of operation may help reduce charges that may accumulate on the dielectric substrate.
[0018] In one aspect of the invention, in the first bipolar mode of operation, a positive voltage is applied to the first electrode and a negative voltage is applied to the second electrode, and in the second bipolar mode of operation, a negative voltage is applied to the first electrode and a positive voltage is applied to the second electrode. The inventors have found that reversing the polarity of the electrodes in this manner helps to reduce charge that may build up on the dielectric substrate. Alternatively, in both the first and second bipolar modes of operation, a positive voltage may be applied to the first electrode and a negative voltage may be applied to the second electrode.
[0019] The absolute value of the voltage applied to at least one of the electrodes in the first bipolar operating mode can be up to 9000V, optionally up to 6000V. The absolute value of the voltage applied to at least one of the electrodes in the first bipolar operating mode can be at least 4000V, optionally at least 5000V. The absolute value of the voltage applied to at least one of the electrodes in the second bipolar operating mode can be up to 9000V, optionally up to 6000V. The absolute value of the voltage applied to at least one of the electrodes in the second bipolar operating mode can be at least 4000V, optionally at least 5000V. The absolute value of the voltage applied to the electrodes in the monopolar operating mode can be up to 9000V, optionally up to 6000V. The absolute value of the voltage applied to the electrodes in the monopolar operating mode can be at least 4000V, optionally at least 5000V.
[0020] The step of plasma etching at least one semiconductor layer by generating a plasma in a plasma chamber may include introducing a gas or gas mixture into the plasma chamber and generating a plasma in the plasma chamber from the gas or gas mixture using a plasma generating device. The step of plasma etching at least one semiconductor layer by generating a plasma in the plasma chamber may include evacuating the plasma chamber to a predetermined pressure. The predetermined pressure may be at least 1 mTorr. The predetermined pressure may be up to 200 mTorr.
[0021] The method may further include the steps of:
[0022] One or more inert gases are introduced into at least one channel formed in a surface of the substrate support between the substrate support and the dielectric substrate.
[0023] The one or more inert gases can be introduced into the at least one channel at a flow rate that results in a backside pressure of 3-20 Torr. Introducing the one or more inert gases can include reducing a flow rate of the one or more inert gases or inert gas mixtures during a period when the ESC is in the second bipolar mode of operation. Optionally, the flow rate of the at least one inert gas can be reduced to zero such that flow of the one or more inert gases into the at least one channel is stopped. The one or more inert gases or inert gas mixtures can include at least one of He or Ar.
[0024] The at least one semiconductor layer may include at least one gallium nitride layer. The dielectric substrate may be a ceramic, AlN, SiO 2 , Al 2 O 3 Alternatively, the dielectric substrate may be made of sapphire.
[0025] According to a second aspect of the present invention there is provided a plasma etching apparatus comprising: · Plasma chamber; · Plasma generating device; ·controller; · Substrate support. The substrate support includes an electrostatic chuck ("ESC"), the electrostatic chuck being characterized in that it includes: At least two electrodes; ·Power supply; A layer of dielectric material covering the at least two electrodes and forming a substrate support surface.
[0026] The controller is configured to switch the ESC between a first bipolar mode, a unipolar mode, and a second bipolar mode of operation, the first bipolar mode of operation including applying a positive voltage to one of the electrodes and a negative voltage to another of the electrodes, the second bipolar mode of operation including applying a positive voltage to one of the electrodes and a negative voltage to the other of the electrodes, and the unipolar mode of operation including applying a same voltage to each of the at least two electrodes.
[0027] During generation of plasma in the plasma chamber by the plasma generating device, the controller is configured to switch the ESC from the first bipolar operating mode to a unipolar operating mode while plasma is generated in the plasma chamber.
[0028] The present inventors have discovered that a plasma etching apparatus can successfully maintain clamping and temperature control of the substrate during plasma etching, even when etching dielectric substrates.
[0029] The controller can be configured to switch the ESC from the monopolar operation mode to the second bipolar operation mode when generation of plasma in the plasma chamber is terminated. Alternatively, the controller can be configured to switch the ESC from the monopolar operation mode to the second bipolar operation mode during generation of plasma in the plasma chamber by the plasma generating device. The substrate support can include at least one channel formed in a surface of the substrate support between the substrate support and the substrate.
[0030] The power supply can be configured to apply a voltage having the same absolute value to each of the electrodes. The power supply can be configured to supply a positive voltage to one of the electrodes and a negative voltage to a second of the electrodes. The power supply can be configured to switchably supply a positive or negative voltage to each of the at least two electrodes. The power supply can be configured to supply a voltage having an absolute value of up to 9000V, optionally up to 6000V, to at least one of the at least two electrodes. The power supply can be configured to supply a voltage having an absolute value of at least 4000V, optionally at least 5000V, to at least one of the at least two electrodes.
[0031] The apparatus may further comprise at least one gas inlet for introducing a gas or gas mixture into the plasma chamber, and the controller is configured to control the flow of the gas or gas mixture from the at least one gas inlet into the plasma chamber. The apparatus may further comprise at least one gas inlet for introducing one or more inert gases into at least one channel formed in a surface of the substrate support, and the controller is configured to control the flow of the one or more inert gases from the at least one gas inlet into the at least one channel. The controller may be configured to control the flow rate of the one or more inert gases through the at least one gas inlet into the at least one channel.
[0032] The layer of dielectric material may have a thickness of at least 0.5 mm. Optionally, the layer of dielectric material may have a thickness of at least 1 mm. The layer of dielectric material has a resistivity of at least 10 at a temperature of 25° C. 12 The resistivity of the layer of dielectric material may be 10 Ωcm at a temperature of 25°C. 15 The dielectric constant of the layer of dielectric material may be at least 7 at a temperature of 25° C. The layer of dielectric material may be made of at least one of sapphire, ceramic AlN or Al 2 O 3 It may include layers.
[0033] Although the invention has been described above, the invention extends to any inventive combination of the features set out above or in the following description, drawings or claims. For example, any feature disclosed in relation to one aspect of the invention may be combined with any feature disclosed in relation to any of the other aspects of the invention.
[0034] Whenever reference is made herein to "comprising" or "including" and similar terms, the invention is understood to also include more restrictive terms such as "consisting of" and "consisting essentially of." [Brief description of the drawings]
[0035] [Figure 1] 1 is a schematic diagram of a known substrate support; [Figure 2A] FIG. 1 is a schematic diagram of the operation of an ESC in a bipolar mode of operation while etching a semiconductor layer on a dielectric substrate. [Figure 2B] FIG. 1 is a schematic diagram of the operation of an ESC in a bipolar mode of operation while etching a semiconductor layer on a dielectric substrate. [Figure 3A] FIG. 1 is a schematic diagram of the operation of an ESC in a unipolar operating mode, when etching a semiconductor layer on a dielectric substrate while the semiconductor layer is continuous. [Figure 3B] FIG. 1 is a schematic diagram of the operation of an ESC in a unipolar operating mode, where the semiconductor layer is formed in discrete regions. [Figure 4] 1 is a flow chart of a method for plasma etching a workpiece according to a first embodiment of the present invention. [Diagram 5] 5 is a flow chart of a method for plasma etching a workpiece according to a second embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0036] In the following description, examples were performed on an inductively coupled plasma (ICP)-based SPTS Synapse™ plasma etching tool available from SPTS Technologies Limited (Newport, South Wales, UK). However, the method of the present invention can be performed on alternative plasma etching tools, preferably other ICP-based etching tools. The examples use a 150 mm sapphire wafer with a layer of gallium nitride (GaN) deposited on its surface as the workpiece to be processed. However, the method of the present invention can be equally applied to different substrate materials, layer materials, layer configurations and geometries.
[0037] Here, the same reference numbers are used in different figures and / or embodiments, and the features to which they relate correspond to substantially identical features.
[0038] A method for plasma etching a workpiece according to a first exemplary embodiment of the present invention is shown in the flow chart of Figure 4. A method for plasma etching a workpiece according to a second exemplary embodiment of the present invention is shown in the flow chart of Figure 5.
[0039] The method of the first exemplary embodiment of the present invention can be performed in a plasma etching apparatus comprising a plasma chamber, a substrate support for supporting a workpiece in the plasma chamber, at least one gas inlet for introducing a gas or gas mixture into the plasma chamber, and at least one gas inlet for introducing one or more inert gases into at least one channel formed in a surface of the substrate support. A plasma generating device for generating plasma in the plasma chamber, and a controller. The substrate support comprises an electrostatic chuck (ESC), the electrostatic chuck comprising at least two electrodes, a power supply, and a layer of dielectric material covering the at least two electrodes and forming the substrate support surface, the layer of dielectric material comprising at least one channel.
[0040] In a loading step 101, a workpiece is loaded into the plasma chamber and placed on a substrate support. The workpiece may be loaded into the plasma chamber by any means known in the art. In an exemplary embodiment, the workpiece is loaded into the plasma chamber and placed on the substrate support by an end effector attached to a wafer transport robot.
[0041] The workpiece includes at least one semiconductor layer on a dielectric substrate. In a first embodiment, the at least one semiconductor layer is a layer of GaN and the dielectric substrate is formed of sapphire. However, the method of the present invention can be used with other semiconductor layers, such as silicon, and with ceramics such as AlN, SiO 2 Or Al 2 O 3 The present invention may be equally applicable to other dielectric substrates such as those formed from SiO 2 . The GaN layer may have additional layers or deposits, such as a mask layer or a photoresist layer, deposited on its upper surface. As shown in Figures 2A, 2B, 3A and 3B, the GaN layer is masked by the SiO 2 during the etching of the substrate. 2 SiO formed on the surface of the GaN layer, which acts as a mask to prevent etching of the GaN layer underneath the deposit 2 This mask layer results in the formation of separate "islands" of GaN that do not allow the substrate to be fixed to the ESC and substrate support, as shown in FIG. 2B.
[0042] The plasma chamber may be maintained under vacuum during the loading step 101. Alternatively, the plasma chamber may be at atmospheric pressure during the loading step 101.
[0043] In the operation step 102, the ESC of the substrate support is operated in a first bipolar operating mode to electrostatically clamp the workpiece to the substrate support. In the first bipolar operating mode, a positive voltage is applied by the power supply to one of the electrodes of the ESC and a negative voltage is applied to the other of the electrodes of the ESC. If the ESC includes more than two electrodes, the positive voltage can be applied to the first group of electrodes and the negative voltage can be applied to the second group of electrodes or vice versa. In an exemplary embodiment, the positive and negative voltages have the same absolute value, e.g. +9000V and -9000V. The values of the positive and negative voltages are selected depending on the thickness and dielectric properties of the substrate. Preferably, the means for supplying power to the at least two electrodes is a high voltage power supply capable of applying a positive or negative voltage to each of the at least two electrodes of the ESC, and preferably the high voltage power supply is capable of switchably applying a positive and negative voltage to each of the at least two electrodes. In this way, the polarity of each electrode can be reversed without changing the power supply to the electrodes. The power supply is preferably capable of providing a voltage of up to + / - 9000V to each electrode.
[0044] In an exemplary embodiment, when the ESC is operated in the first bipolar mode of operation, in a gas introduction step, one or more inert gases are introduced into at least one channel formed on the surface of the ESC. This flow of inert gas allows for improved thermal conduction between the substrate support and the substrate, especially when the chamber is evacuated, and the flow of inert gas can be used to heat or, more typically, cool the substrate. When the plasma chamber is maintained under vacuum, the pressure in the chamber is typically between 1 mTorr and 200 mTorr, while the flow of the one or more inert gases typically results in a back pressure of between 3 and 20 Torr. In an exemplary embodiment, the one or more inert gases is He.
[0045] Once the ESC is in the first bipolar operating mode, a plasma is generated in the plasma chamber for plasma etching at least one semiconductor layer in plasma etching step 103. The plasma may be generated in the plasma chamber by any means known in the art using a plasma generating device. In an exemplary embodiment, a gas or gas mixture is introduced into the plasma chamber through at least one gas inlet, and the plasma generating device, which comprises an ICP source and an RF power source for biasing the substrate support, is configured to generate a plasma from the gas or gas mixture. Both the ICP source and the RF power source are operated at a frequency of 13.56 MHz. The gas or gas mixture selected depends on the at least one semiconductor layer to be etched and the particular reaction conditions desired. In an exemplary embodiment for etching a GaN layer on sapphire, the gas or gas mixture is selected from Cl, ... 2 , BCl 3 and Ar gas mixture. When the gas or gas mixture comprises a gas mixture, the gases may be introduced into the plasma chamber through a single gas inlet or may be introduced into the plasma chamber through respective gas inlets for each respective gas component of the gas mixture.
[0046] Once the plasma has been generated and etching of the substrate has commenced, in a first switching step 104, the ESC is switched from a first bipolar mode of operation to a monopolar mode of operation. In the monopolar mode of operation, the same voltage is applied to each of the electrodes in the ESC such that each electrode is maintained at the same polarity. For example, each electrode may have a voltage of -6000V applied by the power supply. The choice of positive or negative voltage depends on the substrate being etched and the nature of the plasma being generated.
[0047] The point at which the ESCs are switched from the first bipolar to monopolar operation mode depends on the particular etch being performed and the substrate being etched. For example, in an exemplary embodiment, the GaN layer is etched down to the underlying sapphire layer, and the ESCs are switched to the monopolar operation mode before the GaN layer is completely etched to form discrete regions of semiconductor to avoid issues with clamping the discrete regions of semiconductor material onto the dielectric substrate in the first bipolar operation mode. However, in each case, the switching of the ESCs from the first bipolar to monopolar operation mode occurs after the plasma is generated to ensure sufficient clamping of the workpiece to the substrate support.
[0048] In a first exemplary embodiment, after the ESC is switched to the monopolar operation mode, the generation of plasma in the plasma chamber is stopped in a stop step 105. In an exemplary embodiment, the stop step 105 includes terminating the flow of gas or gas mixture into the plasma chamber and terminating the operation of the RF power source and the ICP source. The stop step 105 is typically performed using standard techniques, such as optical interferometry, once the plasma etching is determined to be complete. In some embodiments, the plasma etching of the at least one semiconductor layer includes a first bulk etch stage, in which the etching and removal of the majority of the semiconductor material is performed until an endpoint is reached, and a second overetch stage, in which the plasma is maintained until the features formed by the plasma etching process are completely formed. And the stop step 105 is performed after the overetch stage is completed. If backside pressurization is present, the flow of one or more inert gases into the at least one channel can be reduced or stopped with the termination of the plasma generation.
[0049] In the first exemplary embodiment, once the plasma generation is stopped in the stopping step 105, the ESC is switched from the monopolar operation mode to the second bipolar operation mode in the second switching step 106. Similar to the first bipolar operation mode, in the second bipolar operation mode, a positive voltage is applied to one of the electrodes and a negative voltage is applied to the other of the electrodes. The second bipolar operation mode may be similar to the first bipolar operation mode in that an electrode having a positive voltage applied in the first bipolar operation mode also has a positive voltage applied in the second bipolar operation mode, and an electrode having a negative voltage applied in the first bipolar operation mode also has a negative voltage applied in the second bipolar operation mode. Optionally, the absolute value of the voltage applied in the second bipolar operation mode may be the same as the absolute value of the voltage applied in the first bipolar operation mode. For example, in both the first and second bipolar modes of operation, a voltage of +6000V may be applied to one electrode and a voltage of -6000V may be applied to the other electrode. Alternatively, the absolute value of the voltage applied in the second bipolar mode of operation may be different from the absolute value of the voltage applied in the first bipolar mode of operation. For example, in the first bipolar mode of operation, a voltage of +6000V may be applied to one electrode and a voltage of -6000V may be applied to the other electrode, and in the second bipolar mode of operation, a voltage of +5000V and a voltage of -5000V may be applied to the same electrode, respectively. In one embodiment, the polarity of the voltage applied to the electrodes may change between the first and second bipolar modes of operation. For example, in a first bipolar mode of operation, a positive voltage is applied to the first electrode and a negative voltage is applied to the second electrode, and in a second bipolar mode of operation, a negative voltage is applied to the first electrode and a positive voltage is applied to the second electrode. This reversal of the polarities of the electrodes can help reduce charge build-up on the dielectric substrate, which facilitates its removal from the substrate support.
[0050] Once plasma generation has ceased and any charge build-up in the dielectric substrate has been removed, the ESC is turned off and the substrate is removed from the substrate support and subsequently removed from the plasma chamber in a removal step 107. The workpiece may be removed from the substrate support by any method known in the art, such as a lift mechanism to elevate the workpiece above the surface of the substrate support, and the workpiece may be removed from the plasma chamber by the same method introduced in the load step 101, such as an end effector attached to a wafer transport robot.
[0051] In the second embodiment, some features are the same as those described in the first embodiment. For example, the loading step 201, the operating step 202, the plasma etching step 203, the first switching step 204 and the removing step 207 are substantially the same as the loading step 101, the operating step 102, the plasma etching step 103, the first switching step 104 and the removing step 107, respectively. However, the second exemplary embodiment differs from the first exemplary embodiment in that the second switching step 205 is performed before the stopping step 206, such that the ESC operates in the second bipolar operation mode while the plasma is still generated. Switching to the second bipolar operation mode while the plasma is still present can further help reduce charge accumulation on the dielectric substrate.
[0052] In a second exemplary embodiment, the ESCs may be maintained in the second bipolar mode of operation for a period of time after the stopping step 206 until the ESCs are turned off for the removing step 207. In embodiments in which an overetch is performed, the second switching step 205 may be performed at the end of the bulk etch or during the overetch. EXAMPLES
[0053] A 5 μm thick GaN layer was placed on a 1 mm thick sapphire layer, and a 2 μm thick SiO 2The workpiece with the hard mask deposited on the surface of the GaN layer was loaded into a SPTS Technologies Ltd Synapse™ ICP plasma etching tool and subjected to Cl 2 / BCl 3 The GaN layer was etched using a 13.56 MHz RF power supply for both the ICP source and RF bias. The workpiece was clamped by a dual electrode ESC operated in a bipolar operating mode (first electrode at +6000V and second electrode at -6000V) until the GaN layer was etched before being switched to a monopolar operating mode (first and second electrodes both at -6000V) for overetching. After the plasma etching was finished, the ESC was switched to a second bipolar operating mode (first electrode at +6000V and second electrode at -6000V). It was found that the temperature of the workpiece was successfully maintained at the desired level and the substrate was successfully clamped throughout. [Explanation of symbols]
[0054] 2 substrate support, 4 RF power supply, 6 electrostatic chuck ESC, 8 high voltage DC power supply, 10 coolant channel, 12 substrate, 14 coating, 16 shield ring, 18 lift assembly.
Claims
1. A method for plasma etching a workpiece, A step of placing a workpiece on a substrate support in a plasma chamber, wherein the workpiece comprises a dielectric substrate and at least one semiconductor layer on the dielectric substrate, the substrate support comprises an electrostatic chuck (ESC), and the ESC comprises at least two electrodes, In the first bipolar operating mode, the steps include applying a positive voltage to one electrode and a negative voltage to the other electrode to electrostatically clamp the workpiece to the ESC, A step of plasma etching the at least one semiconductor layer by generating plasma in the plasma chamber, wherein during the period after the plasma has been ignited, the operation of the ESC is switched to a unipolar operation mode in which the electrodes have the same voltage applied to each electrode, The steps include switching the operation of the ESC to a second bipolar operation mode in which a positive voltage is applied to one of the electrodes and a negative voltage is applied to the other electrode, A method for providing this.
2. The method according to claim 1, characterized in that the step of switching the operation of the ESC to the second bipolar operation mode is performed after the step of plasma etching the at least one semiconductor layer is completed.
3. The method according to claim 1, characterized in that the step of switching the operation of the ESC to the second bipolar operation mode is performed during the step of plasma etching the at least one semiconductor layer.
4. The method according to 3, wherein the step of plasma etching the at least one semiconductor layer includes a first bulk etching step performed until the majority of the etching reaches an endpoint and a second over-etching step, and the step of switching the operation of the ESC to the second bipolar operation mode is performed when the endpoint is reached or during the second etching step.
5. The method according to claim 3 or 4, characterized in that the ESC is maintained in the second bipolar operating mode for a period of time after the step of plasma etching the at least one semiconductor layer is completed.
6. The method according to claim 1, wherein the step of plasma etching the at least one semiconductor layer includes etching the at least one semiconductor layer to form a plurality of discrete regions of semiconductor on the dielectric substrate, and the step of switching the operation of the ESC to the unipolar operation mode is performed prior to the formation of the discrete regions of semiconductor.
7. The method according to claim 1, characterized in that the absolute value of the voltage applied to the electrodes in the first bipolar operating mode is the same as the absolute value of the voltage applied to the electrodes in the second bipolar operating mode.
8. The method according to claim 1, characterized in that the absolute value of the voltage applied to the electrodes in the second bipolar operating mode is lower than the absolute value of the voltage applied to the electrodes in the first bipolar operating mode.
9. The method according to claim 1, characterized in that in the first bipolar operating mode, a positive voltage is applied to the first electrode and a negative voltage is applied to the second electrode, and in the second bipolar operating mode, a negative voltage is applied to the first electrode and a positive voltage is applied to the second electrode.
10. The method according to claim 1, characterized in that the absolute value of the voltage applied to at least one of the electrodes in the first bipolar operating mode, the unipolar operating mode, and / or the second bipolar operating mode is up to 9000V.
11. The method according to claim 1, characterized in that the absolute value of the voltage applied to at least one of the electrodes in the first bipolar operating mode, the unipolar operating mode, and / or the second bipolar operating mode is at least 4000V.
12. The method according to claim 1, further comprising the step of introducing one or more inert gases into at least one channel formed on the surface of the substrate support between the substrate support and the dielectric substrate.
13. The method according to 12, wherein the step of introducing one or more inert gases includes reducing the flow rate of the one or more inert gases during the period when the ESC is in the second bipolar operating mode.
14. The method according to 13, characterized in that the flow rate of one or more inert gases is reduced to zero so that the flow of the inert gas or inert gas mixture into at least one channel is stopped.
15. The method according to 12, characterized in that the one or more inert gases include at least one of He or Ar.
16. The method according to claim 1, characterized in that the at least one semiconductor layer includes at least one gallium nitride layer.
17. The method according to claim 1, characterized in that the dielectric substrate is made of sapphire.
18. A plasma etching apparatus, Plasma chamber and Plasma generator and Controller and Substrate support and Equipped with, The substrate support includes an electrostatic chuck (ESC), and the electrostatic chuck is At least two electrodes, Power supply unit, A layer of dielectric material covering at least two electrodes and forming a substrate support surface, Equipped with, Plasma etching apparatus, wherein the controller is configured to switch the ESC between a first bipolar operating mode, a unipolar operating mode, and a second bipolar operating mode, the first bipolar operating mode including applying a positive voltage to one of the electrodes and a negative voltage to the other electrode, the second bipolar operating mode including applying a positive voltage to one of the electrodes and a negative voltage to the other electrode, and the unipolar operating mode including applying the same voltage to each of the at least two electrodes, and the controller is configured to switch the ESC from the first bipolar operating mode to the unipolar operating mode while the plasma is being generated in the plasma chamber by the plasma generator.
19. The apparatus according to claim 18, characterized in that the controller is configured to switch the ESC from the unipolar operating mode to the second bipolar operating mode when the generation of the plasma in the plasma chamber is completed.
20. The apparatus according to claim 18, characterized in that, during the generation of the plasma in the plasma chamber by the plasma generating device, the controller is configured to switch the ESC from the unipolar operating mode to the second bipolar operating mode.
21. The apparatus according to claim 18, characterized in that the dielectric material layer has a thickness of at least 0.5 mm.
22. The apparatus according to claim 18, characterized in that the power supply is configured to supply a voltage having an absolute value of up to 9000V to at least one of at least two electrodes.
23. The apparatus according to claim 18, characterized in that the power supply provides a voltage having an absolute value of at least 4000V to at least one of the at least two electrodes.
24. The dielectric material layer comprises at least one sapphire, ceramic AlN, or Al ２ O ３ The apparatus according to claim 18, characterized by including a layer.
25. The resistivity of the dielectric material layer is at least 10 at a temperature of 25°C. １２ The apparatus according to claim 18, characterized in that it is Ωcm.
26. The resistivity of the dielectric material layer is 10 at a temperature of 25°C. １５ The apparatus according to claim 18, characterized in that it is up to Ωcm.
27. The apparatus according to claim 18, characterized in that the dielectric constant of the dielectric material layer is at least 7 at a temperature of 25°C.