Drive controller, program, and display system

Abstract

To suppress generation of allophones in an LED display device of a passive matrix drive system.SOLUTION: A virtual scan blanking period of time is set as a turn-off period of time in one frame so that each virtual scan blanking period of time will be the same period of time to the interval of a scan blanking period of time. In that way, the number of generations of a ripple voltage is increased and an allophone larger than an audible range is generated, whereby the allophone is not perceived as an allophone. The present invention is applicable to an LED display device of a passive matrix drive system.SELECTED DRAWING: Figure 20

Description

[Technical field]

[0001] The present disclosure relates to a drive control device, a program, and an information processing method for a display system, and in particular to a drive control device, a program, and a display system that are capable of suppressing abnormal noise generated in direct-view LED (Light Emitting Diode) displays at low cost. [Background technology]

[0002] In recent years, the market for direct-view displays using LEDs (Light Emitting Diodes) has been expanding.

[0003] Of these, the tiling type uses a board equipped with LEDs (LED module board: hereafter also referred to as the module board), but this module board and its built-in power supply system can sometimes make abnormal noises such as "buzzing" or "beeping."

[0004] This phenomenon is mainly caused by the sound of MLCCs (Multilayer Ceramic Capacitors) installed as bypass capacitors on the power line, or by electromagnetic vibrations in coils and circuit board wiring used in the power supply system, all of which vibrate at a specific frequency.

[0005] Conventionally, the noise generated by MLCCs (the generation of abnormal noise) has been addressed by using low distortion MLCCs (low noise products) or by replacing them with solid capacitors such as tantalum capacitors.

[0006] Coils are generally subjected to vibration suppression treatment such as impregnation treatment. Electromagnetic vibration of board wiring is generally prevented by reducing parallel wiring in the wiring layout.

[0007] Also, a technique has been proposed in which multiple bypass capacitors are provided to generate vibrations in opposite phases to each other, thereby suppressing the generation of vibration noise (see Patent Document 1). [Prior art documents] [Patent documents]

[0008] [Patent Document 1] JP 2000-056727 A Summary of the Invention [Problem to be solved by the invention]

[0009] However, in the technique described in Patent Document 1, the mechanism for generating vibrations of opposite phases actually has a very complicated configuration.

[0010] Even if it were possible to create a mechanism for generating vibrations of opposite phase, the device configuration would be doubled. In particular, parts such as bypass capacitors are used in large numbers, and even if the unit price of each part is low, the overall cost of the set would increase significantly.

[0011] Furthermore, since tantalum capacitors fail in a short circuit mode, the use of a large number of them may degrade product quality.

[0012] The present disclosure has been made in view of such circumstances, and is directed to making it possible to suppress abnormal noise generated in, in particular, direct-view LED (Light Emitting Diode) displays at low cost. [Means for solving the problem]

[0013] A drive control device and a program according to a first aspect of the present disclosure include a light emission control unit that controls the light emission of LEDs that constitute an LED (Light Emitting Diode) array, and the light emission control unit controls the frequency during the period when the LEDs are turned off so that the frequency is higher than a predetermined frequency.

[0014] In a first aspect of the present disclosure, light emission of LEDs constituting an LED (Light Emitting Diode) array is controlled, and a frequency during a period in which the LEDs are turned off is controlled to be higher than a predetermined frequency.

[0015] A display system according to a second aspect of the present disclosure includes a display section consisting of a display unit having LEDs (Light Emitting Diodes) arranged in an array and a drive control device that controls the drive of the LEDs, and a distribution section that receives input of a video signal, performs a predetermined signal processing on the video signal, and distributes it to the display unit, wherein the drive control device includes a light emission control section that controls the light emission of the LEDs, and the light emission control section controls the frequency during the period when the LEDs are off to be higher than a predetermined frequency.

[0016] In a second aspect of the present disclosure, a display unit is provided with a drive control device that controls the drive of LEDs (Light Emitting Diodes) arranged in an array, and receives input of a video signal, undergoes predetermined signal processing on the video signal and distributes it to the display unit, and the drive control device controls the light emission of the LEDs and controls the frequency during the period when the LEDs are off to be higher than a predetermined frequency. [Brief description of the drawings]

[0017] [Figure 1] FIG. 1 is a diagram illustrating an example of the configuration of a display system according to the present disclosure. [Diagram 2] 2 is a diagram for explaining a configuration example of a video wall controller and a display unit in FIG. 1. [Diagram 3] FIG. 1 is a diagram illustrating an example of the configuration of an LED array. [Figure 4] 1A and 1B are diagrams illustrating the principle of generation of abnormal noise. [Diagram 5] 1A and 1B are diagrams illustrating the principle of generation of abnormal noise. [Figure 6] 1A and 1B are diagrams illustrating the principle of generation of abnormal noise. [Figure 7]FIG. 2 is a simplified circuit diagram illustrating a circuit configuration of a substrate. [Figure 8] FIG. 1 is a diagram illustrating distortion of an MLCC. [Figure 9] 1 is a timing chart illustrating a conventional blanking period. [Figure 10] 4 is a timing chart illustrating a blanking period according to the present disclosure. [Figure 11] 10 is a timing chart illustrating light emission timing for each row in an LED array. [Figure 12] 10 is a timing chart illustrating light emission timing for each row in an LED array. [Figure 13] FIG. 11 is a diagram illustrating a method for setting a blanking period. [Figure 14] 11A and 11B are diagrams illustrating the effect of setting a short blanking period. [Figure 15] 11 is a flowchart illustrating a display process. [Figure 16] 4 is a flowchart illustrating a driver control process. [Figure 17] 11A to 11C are diagrams illustrating a first application example in which the occurrence of abnormal noise is suppressed by setting a short scan blanking period. [Figure 18] 11 is a flowchart illustrating a driver control process in a first application example. [Figure 19] 13 is a timing chart illustrating an example in which the scanning frequency is increased to increase the ripple frequency (the frequency at which ripples occur) and make the abnormal noise that occurs difficult to recognize. [Figure 20] 13 is a timing chart illustrating an example in which a virtual scan blanking period is set to suppress the scan frequency while increasing the ripple frequency, thereby making generated abnormal noise less noticeable, as a second application example of the present disclosure. [Figure 21] 21 is a diagram for explaining details of an example of setting the virtual scan blanking period in FIG. 20. FIG. [Figure 22] 13 is a flowchart illustrating a display process in the second application example. [Diagram 23] 13 is a flowchart illustrating a driver control process in a second application example. [Figure 24] 2 shows an example of the configuration of a general-purpose computer. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0018] Hereinafter, preferred embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In this specification and the drawings, components having substantially the same functional configurations are denoted by the same reference numerals, and redundant description will be omitted.

[0019] Hereinafter, an embodiment of the present technology will be described in the following order. 1. Example of display system configuration 2. Detailed configuration of video wall controller and display unit 3. LED array configuration example 4. Ripple voltage 5. Principle behind abnormal noise generation 6. Blanking Period 7. Setting the length of the blanking period 8. Display Processing 9. Driver control processing by display unit 10. First application example 11. Driver control process by the display unit in the first application example 12. Second application example 13. Display processing in the second application example 14. Driver control processing by the display unit in the second application example 15. Software implementation examples

[0020] <<1. Example of display system configuration>> The present disclosure is particularly directed to suppressing abnormal noise generated in direct-view LED (Light Emitting Diode) displays at low cost.

[0021] FIG. 1 shows an example of the configuration of a display system to which the technology of the present disclosure is applied.

[0022] A display system 11 in FIG. 1 displays video content on a large display configured by arranging a plurality of display units in a tiled pattern.

[0023] More specifically, the display system 11 includes a PC (personal computer) 30, a video server 31, a video wall controller 32, and a video wall 33.

[0024] The PC (personal computer) 30 is a general-purpose computer that receives operational inputs from a user and supplies a command to the video wall controller 32 according to the content of the operation.

[0025] The video server 31 is, for example, a server computer, and supplies video signal data such as video contents to the video wall controller 32 .

[0026] The video wall controller 32 operates in response to commands supplied from the PC 30, and distributes data consisting of image signals of video content to the display units 51-1 to 51-n that constitute the video wall 33 for display.

[0027] When there is no need to distinguish between the display units 51-1 to 51-n, they will simply be referred to as display unit 51.

[0028] As shown in the upper right corner of Figure 1, the video wall 33 is made up of display units 51-1 to 51-n, each of which has an array of pixels made of LEDs, arranged in a tiled pattern, and the images displayed by each display unit 51 are combined in a tiled pattern to display a single image as the entire video wall 33.

[0029] The video wall controller 32 performs a predetermined signal processing on the data consisting of the image signals of the video content supplied from the video server 31, distributes and supplies the data according to the arrangement of the display units 51-1 to 51-n, controls the individual displays of the display units 51-1 to 51-n, and controls the video wall 33 as a whole to display a single image.

[0030] The video wall controller 32 and the video wall 33 may be integrated into one unit, or may be integrated into one display device (information processing system).

[0031] <<2. Detailed configuration of the video wall controller and display unit>> Next, a detailed configuration example of the video wall controller 32 and the display unit 51 will be described with reference to FIG.

[0032] The video wall controller 32 includes a LAN (Local Area Network) terminal 71, an HDMI (High Definition Multimedia Interface) (registered trademark) terminal 72, a DP (Display Port) terminal 73, a DVI (Digital Visual Interface) terminal 74, a network IF (Interface) 75, an MPU (Micro Processor Unit) 76, a signal input IF 77, a signal processing unit 78, a DRAM (Dynamic Random Access Memory) 79, a signal distribution unit 80, and output IFs 81-1 to 81-n.

[0033] The LAN (Local Area Network) terminal 71 is, for example, a connection terminal for a LAN cable or the like, and is operated by a user to provide control commands, etc. corresponding to the operation content to the video wall controller 32, realizing communication via a LAN with a personal computer (PC) 30, and supplying the input control commands, etc. to the MPU 76 via the network IF 75.

[0034] The LAN terminal 71 may be configured to be physically connected with a wired LAN cable, or may be configured to be connected with a so-called wireless LAN realized by wireless communication.

[0035] The MPU 76 receives an input of a control command supplied from the PC 30 via the LAN terminal 71 and the network IF 75, and supplies a control signal corresponding to the received control command to the signal processing unit 78.

[0036] The HDMI terminal 72, the DP terminal 73, and the DVI terminal 74 are all input terminals for data consisting of video signals, and are connected to, for example, a server computer that functions as a video server 31, and supply data consisting of video signals to a signal processing unit 78 via a signal input IF 77.

[0037] In addition, FIG. 2 shows an example in which the video server 31 is connected to the HDMI terminal 72, however, the HDMI terminal 72, the DP terminal 73, and the DVI terminal 74 all have basically the same functions and only differ in standard, so any one of them can be selected and connected as necessary.

[0038] Based on the control signal supplied from the MPU 76, the signal processing unit 78 adjusts the color temperature, contrast, brightness, etc. of the data consisting of the video signal supplied via the signal input IF 77, and supplies the adjusted data to the signal distribution unit 80. At this time, the signal processing unit 78 uses the connected DRAM 79 to expand the data consisting of the video signal as necessary, executes signal processing based on the control signal, and supplies the signal processing result to the signal distribution unit 80. The signal processing unit 78 also supplies various information related to display, such as a frame rate, as a control signal to the signal processing unit 112 of the display unit 51 to which the video signal is supplied.

[0039] The signal distribution unit 80 distributes data consisting of a signal-processed video signal supplied from the signal processing unit 78, and distributes and transmits the data individually to the display units 51-1 to 51-n via the output IFs 81-1 to 81-n.

[0040] The display unit 51 includes a driver control unit 91 and an LED block 92 .

[0041] The driver control unit 91 supplies data consisting of video signals for controlling the light emission of the LEDs constituting the LED arrays 122-1 to 122-N to the plurality of LED drivers 121-1 to 121-N constituting the LED block 92.

[0042] More specifically, the driver control unit 91 includes a signal input IF 111, a signal processing unit 112, a DRAM 113, and output IFs 114-1 through 114-N.

[0043] The signal input IF 111 receives input of video signal data supplied from the video wall controller 32 and supplies it to a signal processing unit 112 .

[0044] The signal processing unit 112 corrects the color and brightness for each display unit 51 based on the video signal data supplied from the signal input IF 111, generates data for setting the light emission intensity of each LED that constitutes the LED arrays 122-1 to 122-N, and distributes and supplies the data to the LED drivers 121-1 to 121-N of the LED block 92 via the output IFs 114-1 to 114-N.

[0045] More specifically, the video signal data also includes information such as the length of a blanking period defined by a general standard. Therefore, the signal processing unit 112 generates data for setting the number of LED rows (number of scan lines), the number of times light is repeatedly emitted in one frame (number of cycles), and the light emission intensity of each LED constituting the LED arrays 122-1 to 122-N, taking into consideration information such as the length of a blanking period included in the video data signal, and distributes and supplies the data to the LED drivers 121-1 to 121-N of the LED block 92 via the output IFs 114-1 to 114-N.

[0046] The LED block 92 includes LED drivers 121-1 to 121-N, LED arrays 122-1 to 122-N, and a ROM (Read Only Memory) 123.

[0047] The LED drivers 121-1 to 121-N perform PWM (Pulse Width Modulation) control of the light emission of the LEDs arranged in an array that constitute the corresponding LED arrays 122-1 to 122-N based on data that sets the light emission intensity of the LEDs 141, which data is composed of a video signal supplied from the driver control unit 91.

[0048] ROM 123 stores board mounting information including the type (capacity) and number of capacitors such as MLCCs mounted on board 153 (FIG. 4) constituting LED block 92, and when energized, signal processor 112 sets the processing of the video signal by reading out the board mounting information from ROM 123. More specifically, signal processor 112 sets the length of the blanking period shorter than the blanking period defined by a general standard based on the board mounting information read out from ROM 123 when energized. The setting of the blanking period will be described in detail later.

[0049] <<3. LED array configuration example>> Next, a configuration example of the LED array 122 will be described with reference to Fig. 3. Fig. 3 shows a configuration example of the LED array 122 in a passive matrix driving type LED driving wiring. Therefore, the light emission of the LEDs 141 of the LED array 122 is controlled by a passive matrix driving method.

[0050] In the LED array 122 of FIG. 3, common cathode type LEDs 141 are arranged in an array, and each LED 141 is connected to a Sig line (brightness control wiring) wired vertically and a Scan line (row selection wiring) wired horizontally.

[0051] 3, when the Scan line 1 is set to a predetermined fixed potential and turned ON, a current is supplied to the LED from the Sig line, causing the LED to emit light. Note that the predetermined fixed potential is generally GND=0V potential, but is not limited to this.

[0052] <<4. Ripple voltage>> Next, the ripple voltage that causes the generation of abnormal noise will be described with reference to Figures 4 to 7. First, the power supply configuration for supplying power to the display units 51-1 to 51-n will be described.

[0053] FIG. 4 shows an outline of a power supply configuration for supplying power to the display units 51-1 to 51-n.

[0054] The power supply configuration in Figure 4 is composed of AC power supply device 151 that accepts AC (Alternating Current) power input and supplies power to a subsequent stage, board / wiring (board on which wiring is formed) 152 on which various circuits, wiring, etc. that constitute video wall controller 32 are arranged, and board / wiring (board on which wiring is formed) 153-1 to 153-n on which various circuits, wiring, etc. that constitute each of display units 51-1 to 51-n that constitute video wall 33 are arranged.

[0055] In addition, the AC power supply device 151 and the board 152 are electrically connected via wiring 161, and the board 152 and the boards 153-1 to 153-n are electrically connected respectively via wiring 162-1 to 162-n.

[0056] As shown in FIG. 5, the AC power supply device 151, the circuit boards 152 and 153, and the wiring 161, 162-1 through 162-n have internal impedances Z151, Z152, and Z153, and impedances Z161 and Z162, respectively.

[0057] For this reason, as shown in FIG. 6, if it is assumed that AC power supply device 151 receives an AC power input of voltage V0 when there is no load, then the output voltage of AC power supply device 151 will have a voltage drop of ΔV151 (=Z151×I1 (written as Z151·I1 in the figure, and this applies hereinafter)) corresponding to impedance Z151, where I1 is the internal current relative to voltage V0.

[0058] Similarly, in the wiring 161, if the internal current is the current I2, a voltage drop occurs by a voltage Δ161 (=Z161×I1) corresponding to the impedance Z161.

[0059] Similarly, in the substrate 152, if the internal current is a current I3, a voltage drop occurs by a voltage Δ152 (=Z152×I3) corresponding to the impedance Z152.

[0060] Similarly, in the wiring 162, if the internal current is a current I4, a voltage drop occurs by a voltage Δ162 (=Z162×I4) corresponding to the impedance Z162.

[0061] Similarly, in the substrate 153, if the internal current is a current I5, a voltage drop occurs by a voltage Δ153 (=Z153×I5) corresponding to the impedance Z153.

[0062] As a result, a voltage drop occurs in all voltages ΔV (=ΔV151+ΔV161+ΔV152+ΔV162+ΔV153) of AC power supply device 151, substrates 152, 153, and wiring 161, 162, which is the difference between the power supply voltage V0 supplied by AC power supply device 151 and the voltage Vx applied to substrate 153.

[0063] Furthermore, if the circuit configuration formed on the substrate 153 is expressed by a simplified circuit diagram, as shown in FIG. 7, the LED driver 121 and a capacitance C such as an MLCC provided on the substrate 153 can be regarded as a circuit connected in parallel.

[0064] For this reason, when the LED 141 is emitting light, a current flows through the LED driver 121 and the MLCC, i.e., a load is applied, and a voltage Vx that is a voltage drop of ΔV from the power supply voltage V1 is applied to the LED driver 121.

[0065] In contrast, when the LED 141 is turned off, the current of the LED driver 121 and the MLCC is reduced, resulting in an unloaded state, so that no voltage drop corresponding to the voltage ΔV occurs and the voltage V1 is applied to the LED driver 121.

[0066] That is, the voltage applied to the LED driver 121 and the MLCC changes between voltages V0 and Vx depending on whether a voltage drop of voltage ΔV occurs according to the light emission state of the LED 141. Here, when the voltage Vx in a loaded state temporarily changes to an unloaded state, the voltage changes to voltage V0, and the voltage drop voltage ΔV that appears to be a square wave is the ripple voltage ΔV. This ripple voltage ΔV causes abnormal noise. The principle of abnormal noise caused by the ripple voltage ΔV will be described later.

[0067] <<5. Principle behind abnormal noise generation>> Next, in explaining the principle of abnormal noise caused by ripple voltage ΔV, a description will be given of voltage distortion caused by MLCCs mounted on substrate 153. Note that, although the explanation will be given here using substrate 153 as an example, the same applies to substrate 152.

[0068] FIG. 8 is a side cross-sectional view illustrating distortion that occurs when a voltage is applied to MLCC 171 connected to substrate 153 by connection portion 172 made of solder, adhesive, or the like.

[0069] MLCC171 is configured with ferroelectric ceramic material stacked in the vertical direction in the figure, and when voltage is applied, it expands as indicated by arrow D2 in a direction parallel to the vertical electric field application direction indicated by arrow D1 in the figure (vertical direction in the figure), and also contracts in a direction perpendicular to the electric field application direction arrow D1 in the figure, as indicated by arrow D0 in the horizontal direction in the figure.

[0070] Accordingly, as indicated by dotted arrow D3, substrate 153 is attracted to the side surface of MLCC 171 via connection portion 172 that fixes MLCC 171 on substrate 153.

[0071] As a result, as shown by arrow D4, substrate 153 warps (sags) in a downwardly convex shape in the figure, centered on the portion bonded to MLCC 171.

[0072] That is, as shown in FIG. 8, when ripple voltage ΔV occurs, voltage is applied to MLCC 171, and substrate 153 bends (distorts) as shown in FIG. 8, and when the ripple voltage ΔV is eliminated, voltage is no longer applied to MCLL 171, substrate 153 returns to a flat state, and the distortion is eliminated.

[0073] In this way, the substrate 153 changes from being distorted to being flat depending on the presence or absence of the ripple voltage ΔV, and thus generates abnormal noise from the substrate 153.

[0074] <<6. Blanking Period>> On the other hand, in order to accommodate standards established during the era of conventional cathode ray tube display devices, the standards for displaying images on display devices stipulate that images must be displayed at a predetermined frequency in frame units.

[0075] According to this provision, a blanking period is set between frames, i.e., from the time when the last line of the previous frame is displayed until the first line of the next frame is displayed, during which no image is displayed.

[0076] That is, as shown by the waveform of the LED emission timing in the upper part of FIG. 9, the LED driver 121 causes a current for causing the LED 141 to emit light to flow at times t0 to t1, t2 to t3, t4 to t5, etc., which are the light emission periods of the LED 141 in which an image is displayed in frame units.

[0077] On the other hand, at times t1 to t2, t3 to t4, t5 to t6, etc., which are the blanking periods Tblks between frames, the LED 141 is in a state of being turned off, so the flow of the current for causing light emission is substantially in a state of being almost zero.

[0078] Therefore, the voltage applied to the MLCC 171 changes corresponding to the presence or absence of the current for causing the LED 141 to emit light, as shown by the waveform of the power supply voltage in the lower part of FIG. 9. Thus, a ripple voltage ΔV as shown by a rectangular wave is generated during the blanking period Tblks.

[0079] As a result, during the blanking period Tblks, the applied voltage of the MLCC 171 changes at intervals when the ripple voltage ΔV is generated. Accordingly, distortion of the substrate 153 occurs, and abnormal noise is generated due to this.

[0080] Therefore, in the present disclosure, as shown in FIG. 10, by setting the blanking period Tblks to a shorter blanking period Tblkm (<Tblks), the generated ripple voltage is reduced to a voltage ΔV' (<ΔV), so that the applied voltage applied to the MLCC 171 is reduced, distortion of the substrate 153 is suppressed, and generation of abnormal noise due to this is suppressed.

[0081] Here, with reference to FIGS. 11 and 12, the blanking period will be described in more detail. FIG. 11 shows, on the left side, a configuration diagram of the LED driver 121 and the LED array 122 described with reference to FIG. 3, and on the right side, represents the light emission timing in units of rows (Scan line units) of the LEDs constituting the LED array 122.

[0082] That is, as indicated by the downward arrow on the right side of FIG. 11, LED driver 121 repeats the process of sequentially emitting light from top to bottom row by row, that is, from scan line 1 to scan line N, for each frame.

[0083] It should be noted that the rectangular portion penetrated by the diagonally downward arrow on the right side of FIG. 11 indicates the light emission timing of each row in frames F1, F2, . . . , and indicates that the LEDs emit light in chronological order row by row.

[0084] For example, when the light emission timing of Scan line N in frame F1 ends, the position of the row that emits light changes from Scan line N, the bottom row, to Scan line 1, the top row of the next frame F2, as shown by the diagonally upward arrow. At this timing, the blanking period Tblk is set.

[0085] At this time, the waveforms of the currents flowing through the LED driver 121 and the MLCC 171 in each frame are expressed by the waveforms shown in the top and middle rows of Fig. 12. Note that the top row of Fig. 12 shows a current waveform for explaining the conventional blanking period Tblks, and the middle row of Fig. 12 shows a current waveform for explaining the blanking period Tblkm of the present disclosure.

[0086] Here, in each of frames F1, F2, ..., as shown in the bottom row of Figure 12, the fine rectangular waveforms represent the light emission time for each scan line, the spaces between each rectangular waveform represent the switching time between scan lines, and the timing between frames F1 and F2 where no waveform is present represents the blanking periods Tblks, Tblkm, respectively.

[0087] That is, in the bottom row of FIG. 12, the periods from time t101 to t102, t103 to t104, and t105 to t106 are light emission times in row units, and the periods from time t102 to t103, and t104 to t105 are switching times in row units.

[0088] As described above, the ripple voltage ΔV is generated due to the current becoming substantially zero during this blanking period Tblks.

[0089] Therefore, in the present disclosure, as shown in the middle row of FIG. 12, by making the blanking period Tblks into a shorter blanking period Tblkm (<Tblks), the light emission of the next frame is started before the ripple voltage rises significantly, thereby reducing the generated ripple voltage ΔV to suppress the generation of abnormal noise.

[0090] <<7. Setting the length of the blanking period>> Next, the setting of the length of the blanking period for reducing the ripple voltage ΔV will be described.

[0091] The conventional blanking period Tblks has, as shown in the uppermost row of FIG. 13, a rising period T1 during which the ripple voltage rises exponentially to the voltage Vr, a steady period shown by a dotted line where the voltage remains at Vr, and a falling period T2 during which the voltage drops linearly. As a whole, it is set to be approximately 5 to 8% of the light emission period of one frame.

[0092] In order to reduce the ripple voltage, it is necessary to shorten the blanking period Tblks. However, for example, as shown in the middle row of FIG. 13, even if the steady period is eliminated to obtain a blanking period Tblks’, there is no change in the magnitude of the ripple voltage Vr, so the generation of abnormal noise cannot be suppressed. However, when the steady period becomes short as in the blanking period Tblks’, the frequency of the generated abnormal noise changes, so the sound range changes.

[0093] In order to make the ripple voltage Vr into a smaller ripple voltage Vr’, for example, as shown by the rising period T1’ in the lower row of FIG. 13, it is necessary to set a short blanking period Tblkm such that the falling period T2’ is started at the timing before the ripple voltage rises to Vr, that is, the light emission of the next frame is started quickly.

[0094] Here, the change in the rising period and the change in the falling period of the ripple voltage will be considered.

[0095] The rising voltage Vru of the ripple voltage in the above-mentioned rising period can be expressed by, for example, the following equation (1).

[0096] Vru = Vr (1-e(-T1' / τ)) (1)

[0097] Here, Vru is the ripple voltage in the rising period T1 shown in the upper part of FIG. 13, Vr is the maximum value of the ripple voltage in the steady state, and T1' is the length of the rising period.

[0098] Also, τ is a constant (=R·C) consisting of a DC resistance component R, which is the main component of the impedance Z of the MLCC 171, and a capacitance C.

[0099] Furthermore, the ripple voltage Vrd during the drop period can be expressed by, for example, the following equation (2).

[0100] Vrd = I T2' / C (2)

[0101] where I is the value of the current through the LED, T2' is the length of the fall period, and C is the capacitance of the MLCC 171.

[0102] When the maximum value of the ripple voltage is reduced by 1 / n from the conventional voltage Vr to Vr / n, the rise period T1' and fall period T2' can be calculated using the following equations (3) and (4), respectively.

[0103] Vru = Vr / n = Vr(1-e(-T1' / τ)) 1 / n=1-e(-T1' / τ) T1'=-τ·ln(1-1 / n) (3)

[0104] Vrd = Vr / n = I T2' / C T2' = Vr C / (n I) (4)

[0105] Therefore, the blanking period Tblkm when the voltage Vr / n, which is 1 / n of the voltage Vr that is the maximum value of the conventional ripple voltage, can be set as shown in the following formula (5).

[0106] Tblkm=T1'+T2' =-τ ln(1-1 / n)+Vr C / (n I) =-R·C·ln(1-1 / n)+Vr·C / (n·I) =C(-R ln(1-1 / n)+Vr / (n I)) (5)

[0107] As described above, the signal processing unit 112 of the driver control unit 91 in the display unit 51 reads the mounting board information from ROM 123 at startup, and sets the blanking period Tblkm based on the read mounting board information.The signal processing unit 112 realizes the blanking period Tblkm by controlling a clock (not shown) used to PWM control the LEDs and control the light emission timing of the LEDs.

[0108] In setting the blanking period Tblkm, n is set as a parameter included in the above-mentioned equation (5) to specify the extent to which the ripple voltage is to be reduced.

[0109] Furthermore, by setting the blanking period to the shortest possible value, it is possible to set the capacitance C of the MLCC 171 to the minimum possible value, thereby suppressing the occurrence of abnormal noise and reducing costs by reducing the capacitance of the MLCC 171.

[0110] Furthermore, by increasing the capacitance C of the MLCC 171, it is possible to set the blanking period Tblkm longer while suppressing the occurrence of abnormal noise.

[0111] For example, in the case where the impedance R of the MLCC 171 is 40 mΩ, the capacitance C is 2400 uF, the steady-state ripple voltage Vr is 200 mV, n is 3, and the current I is 4.7 A, when these are substituted into equation (5), the blanking period Tblkm becomes 73 uS.

[0112] In this case, when the frame rate is 60 Hz, the blanking period Tblkm is about 0.43% of the time per frame, and when the frame rate is 120 Hz, it is about 0.86%.

[0113] In other words, the blanking period Tblkm can be set to be smaller than a predetermined value based on the impedance R and capacitance C of the MLCC 171 with respect to the time per frame by applying the above-mentioned formula (5), thereby suppressing the occurrence of abnormal noise.

[0114] More specifically, the force F that generates distortion in the MLCC 171 (the force that vibrates the substrate 153) is generally expressed by the following formula (6).

[0115] F=d ΔV (N: Newton) (6)

[0116] Here, d is the piezoelectric distortion constant that is a constant that each MLCC 171 has, and ΔV is the strength of the applied electric field, that is, the ripple voltage ΔV.

[0117] As described above, abnormal noise is generated by the force F that generates distortion in MLCC 171 vibrating substrate 153. The radiation power W(w) of this abnormal noise satisfies the relationship expressed by the following formula (7) in acoustic engineering, based on the area of ​​substrate 153, the vibration speed of substrate 153, the density of substrate 153 as a medium, and the propagation speed of sound.

[0118] W∝S·(Δv average) 2 ρc (w: watts) (7)

[0119] Here, S is the area of ​​the substrate 153, Δv average is the vibration velocity of the substrate 153, ρ is the density of the substrate 153 which serves as a medium, and c is the propagation velocity of sound.

[0120] Furthermore, since the average vibration velocity Δv of the substrate 153 is proportional to the force F that generates distortion in the MLCC 171 (the force that vibrates the substrate 153), the relationship of the following formula (8) is satisfied.

[0121] Δv average ∝F (8)

[0122] In Newtonian mechanics, the force F that generates distortion in the MLCC 171 (the force that vibrates the substrate 153) is expressed as the product of mass and acceleration (F=m·a (m: mass, a: acceleration)), so the greater the force F that generates distortion in the MLCC 171 (the force that vibrates the substrate 153), the greater the acceleration a. As a result, the following relationship (9) is established.

[0123] W∝S·(F average) 2 ·ρc=S·(d·ΔV average) 2 ρc (w: watts) (9)

[0124] In this way, the radiation power W(w) of the abnormal noise, which indicates the loudness of the sound, is proportional to the square of the ripple voltage ΔV.

[0125] From these facts, when n in the above formula (5) is set to 3, the voltage Vr at which the ripple voltage ΔV is at its maximum value becomes 1 / 3 (=1 / n: n=3), and as a result, the radiation power W(w) of the abnormal sound, which represents the loudness of the sound, becomes 1 / 9 (=(1 / 3) 2 )

[0126] That is, by setting the blanking period so that n is set to 3 or more in equation (5), it is possible to reduce the radiation power W(w) of the abnormal sound, which indicates the loudness of the sound, to approximately 1 / 9 ≒ 1 / 10 or less, making it possible to give the human ear the impression that the sound has become quieter.

[0127] However, since there is a control limit for the Scanline switching time shown at times t102 to t103 and t104 to t105 in the bottom row of Figure 12, the blanking period Tblkm set by equation (5) cannot be set shorter than the control limit for the Scanline switching time.

[0128] If the blanking period is of a length that conforms to the conventional standard, then a ripple voltage will be generated during the blanking period as the current flowing through the LED decreases, as shown, for example, in the area surrounded by a dotted line on the left side of Figure 14.

[0129] In contrast, by setting the blanking period to be short using the method disclosed herein, the decrease in current flowing through the LED is suppressed, as shown by the waveform on the right side of Figure 14, and therefore the generation of ripple voltage is suppressed.

[0130] As a result, distortion of the substrate 153 caused by the expansion and contraction of the MLCC 171 is eliminated, and the generation of abnormal noise is suppressed.

[0131] Incidentally, FIG. 14 shows, from the top, waveforms of a current, a power supply input voltage, a voltage applied to the LED driver 121, and a ground potential.

[0132] Also, for example, when multiple display units 51 are mounted on the substrate 153, it is possible to completely synchronize the operations of the multiple display units 51. By having the multiple display units 51 operate in synchronization in this way, it becomes possible to display high-definition images with movement with higher accuracy. In addition, since it becomes possible to display high-definition images with high accuracy, it becomes possible to realize high-accuracy re-imaging and the like.

[0133] On the other hand, if the operations of the multiple display units 51 are completely synchronized, the blanking period is set according to the conventional regulations, which generates a larger ripple voltage ΔV, and thus generates a larger abnormal noise.

[0134] However, even when the operations of multiple display units 51 are completely synchronized, as described above, it is possible to suppress the generation of ripple voltage ΔV by shortening the blanking period to suppress the generation of ripple voltage ΔV. Therefore, according to the technology disclosed herein, it is possible to suppress the generation of larger abnormal noises that occur when high-definition images are displayed with high accuracy.

[0135] 11, scan lines 1 to N are displayed once for each frame in chronological order, and frames F1, F2, ... are displayed in sequence, but in actual processing, the process of sequentially displaying scan lines 1 to N of the same frame is repeated multiple times in a cyclical manner. The video signal includes information specifying the number of cycles and N, which is the number of scan lines, as well as information on blanking periods defined by general standards, and the signal processing unit 112 takes into account video information including these pieces of information and board mounting information of board 153 stored in ROM 123, and sets a blanking period that is shorter than the blanking period defined by general standards.

[0136] In the above, an example has been described in which LEDs 141 are configured in horizontal rows as ScanLines, and are illuminated sequentially from top to bottom row by row (Scanline unit) to display an image as the entire LED display, but it is also possible to illuminate sequentially row by row (Scanline unit) from bottom to top.

[0137] Also, the LEDs 141 may be configured so that a column of LEDs arranged vertically is set as a ScanLine, and the LEDs 141 are sequentially emitted horizontally in columns (ScanLine units) from right to left or left to right to display an image. That is, the LEDs 141 constituting a ScanLine unit may be configured so that a row arranged horizontally is used as a unit, or a column arranged vertically is used as a unit.

[0138] <<8. Display processing>> Next, the display process performed by the display system 11 in FIG. 1 will be described with reference to the flowchart in FIG.

[0139] In step S 11 , the signal processing unit 78 receives an input of a video signal made up of content data or the like supplied from the video server 31 via any one of the HDMI terminal 72 , DP terminal 73 , and DVI terminal 74 and the signal input IF 77 .

[0140] In step S12, the signal processing unit 78 converts the video format of the received video signal.

[0141] In step S13, the signal processor 78 receives an input of a control signal supplied from the MPU 76 in response to the operation of the PC 30, and executes signal processing such as color temperature, contrast, and brightness.

[0142] In step S14, the signal processing unit 78 allocates and distributes the processed video signals to the display units 51-1 to 51-n of the video wall 33.

[0143] In step S15, the signal processor 78 transmits and outputs the distributed video signals to the corresponding display units 51-1 to 51-n.

[0144] Through the above series of processes, the video signal read out from the video server 31 is subjected to signal processing, and then distributed and transmitted to each of the display units 51-1 to 51-n that make up the video wall 33, so that individual images are displayed by the display units 51-1 to 51-n, thereby enabling the video wall 33 as a whole to display the video content images.

[0145] <<9. Driver control processing by the display unit>> Next, the driver control process by the display unit 51 will be described with reference to the flowchart of FIG.

[0146] In step S31, the signal processing unit 112 in the driver control unit 91 of the display unit 51 accepts the input of the video signals distributed and supplied from the video wall controller 32 via the signal input IF 111 on a row-by-row basis.

[0147] In step S32, the signal processing unit 112 determines whether or not it is a blanking period. That is, the signal processing unit 112 determines whether or not it is time to enter a blanking period based on whether or not the row-by-row video signal received via the signal input IF 111 is the video signal of the top row of the new frame.

[0148] If it is determined in step S32 that the blanking period is occurring, the process proceeds to step S33.

[0149] In step S33, the signal processing unit 112 stops processing for the time set as the length of the blanking period. However, the length of the blanking period set here is a length that can suppress the increase in the ripple voltage ΔV described above and suppress the generation of abnormal noise caused by the distortion of the substrate 153 accompanying the expansion and contraction of the MLCC 171. In other words, the length of the blanking period set here is set to a time shorter than the blanking period included in the video signal that is the input signal received via the signal input IF 111, that is, the length of the blanking period specified by a general standard.

[0150] If it is determined in step S32 that the blanking period is not in progress, the process of step S33 is skipped.

[0151] In step S 34 , the signal processor 112 executes video signal processing for applying color and luminance correction corresponding to each display unit 51 to the row-by-row video signals distributed as the display units 51 .

[0152] In step S35, the signal processing unit 112 allocates the row-by-row video signals that have been subjected to the video signal processing to the LED drivers 121-1 to 121-N in the LED block 92, and transmits them via the corresponding output IFs 114-1 to 114-N.

[0153] In step S36, the LED drivers 121-1 to 121-N in the LED block 92 execute LED drive control processing based on the video signal on a row-by-row basis, and display images on a row-by-row basis with appropriate brightness through PWM control in each of the LED arrays 122-1 to 122-N.

[0154] Through the above processing, appropriate brightness adjustment is performed on each of the display units 51 constituting the video wall 33, and the brightness is output to the LED block 92, making it possible to display images sequentially row by row.

[0155] In addition, at this time, if the input video signal corresponds to the first row of a new frame, processing is stopped for a blanking period set by the above-mentioned equation (5) that is shorter than the length of the blanking period defined by the conventional standard.

[0156] As a result, the time during which the LED is off during the blanking period is shorter than the blanking period defined by conventional standards, making it possible to suppress the generation of ripple voltage ΔV.

[0157] As a result, application of ripple voltage ΔV to MLCC 171 is suppressed, thereby suppressing distortion of substrates 152, 153 caused by expansion and contraction of MLCC 171 due to application of ripple voltage ΔV to MLCC 171, thereby making it possible to suppress the generation of abnormal noise.

[0158] In addition, since the blanking time using the above-mentioned formula (5) is set in proportion to the capacitance C of the MLCC 171, the blanking time can be shortened by reducing the capacitance of the MLCC 171. This makes it possible to reduce costs while suppressing the generation of abnormal noise.

[0159] <<10. First Application Example>> In the above, we have described an example in which the generation of ripple voltage ΔV is suppressed and abnormal noise is suppressed by shortening the time during which the LED is off during the blanking period compared to the blanking period specified in the conventional standard.

[0160] Incidentally, scanning in units of scan lines is repeated multiple times during one frame, and when returning from the last scan line to the first scan line, there is a blanking period that is smaller than the blanking period described above.

[0161] That is, for example, when there are 16 scan lines consisting of scan lines L1 to L16, and these are repeated 32 times in one frame, as shown in FIG. 17, scanning in units of scan lines L1 to L16 is repeated 32 times.

[0162] At this time, when the scan line changes from L16 to L1 in order to proceed to the next scan, a blanking period indicated by Tscanblk in FIG. 17 occurs.

[0163] Hereinafter, the blanking period that occurs when returning from the last scan line to the first scan line in each scan in units of scan lines is referred to as a scan blanking period Tscanblk.

[0164] Therefore, a ripple voltage ΔV occurs even during this scan blanking period Tscanblk.

[0165] Therefore, the scan blanking period Tscanblk may be shortened in the same manner as the above-mentioned blanking period to suppress the generation of the ripple voltage ΔV, thereby suppressing the generation of abnormal noise.

[0166] In this case, the signal processor 112 determines whether or not it is a blanking period or a scan blanking period. Then, when it is time to enter a blanking period or a scan blanking period, processing is stopped for a time period set as the length of the blanking period.

[0167] <<11. Driver control process by the display unit in the first application example>> Next, the driver control process by the display unit 51 in the first application example will be described with reference to the flowchart of Fig. 18. Note that the processes of steps S51, S53 to S56 in Fig. 18 are the same as the processes of steps S31, S33 to S36 in Fig. 16, and therefore the description thereof will be omitted.

[0168] In step S51, the input of the video signal distributed and supplied from the video wall controller 32 is accepted via the signal input IF 111 on a row-by-row basis.

[0169] In step S52, the signal processing unit 112 determines whether or not it is a blanking period or a scan blanking period.

[0170] If it is determined in step S52 that the period is a blanking period or a scan blanking period, the process proceeds to step S53.

[0171] In step S53, the signal processing unit 112 stops processing for a period of time set as the length of the blanking period.

[0172] If it is determined in step S52 that the period is neither a blanking period nor a scan blanking period, the process of step S53 is skipped.

[0173] Then, in steps S54 to S56, video signal processing is performed on the distributed row-by-row video signals, such as performing color and brightness correction corresponding to each display unit 51, and the distributed row-by-row video signals are assigned to and transmitted to LED drivers 121-1 to 121-N in LED block 92. LED drive control processing is performed based on the row-by-row video signals, and images are displayed row-by-row at appropriate brightness using PWM control.

[0174] By the above processing, when it is either a blanking period or a scan blanking period, the processing is stopped for a period of time set by the above-mentioned equation (5) which is shorter than the length of the blanking period defined in the conventional standard.

[0175] As a result, the time during which the LED is off during the blanking period and scan blanking period is shorter than the blanking period defined by conventional standards, making it possible to suppress the generation of ripple voltage ΔV.

[0176] As a result, application of ripple voltage ΔV to MLCC 171 is suppressed, thereby suppressing distortion of substrates 152, 153 caused by expansion and contraction of MLCC 171 due to application of ripple voltage ΔV to MLCC 171, thereby making it possible to suppress the generation of abnormal noise.

[0177] <<12. Second Application Example>> In the above, we have described an example in which the generation of ripple voltage ΔV is suppressed and abnormal noise is suppressed by shortening not only the blanking period but also the time during which the LED is off during the scan blanking period compared to the blanking period specified in the conventional standard.

[0178] However, by setting the scanning frequency high in accordance with the frame rate, any abnormal sound that occurs may be outside the audible range, making it difficult for humans to recognize the abnormal sound even if it is occurring.

[0179] 17, when the frame rate is 60 Hz and 32 scans are performed per frame, the scan frequency, which is the number of scans per second, is 1920 Hz (=32×60). In this case, the ripple voltage ΔV occurs 1920 times per second, resulting in an abnormal noise having a frequency of 1920 Hz (=32×60).

[0180] For example, when the frame rate is 60 Hz, the scanning state when 32 scans are performed is expressed as shown in the top part of FIG.

[0181] 19, scan lines L1 to L16 (represented by numbers 1 to 16 in the left column in the figure) are set from the top of the figure, scanning is performed at the timing of a lattice pattern in the time direction represented in the right direction in the figure, and a scan blanking period Tscanblk, that is, a ripple voltage ΔV' is generated every time 16 rows are scanned. Note that the ripple voltage ΔV' in the scan blanking period Tscanblk is not the same as the ripple voltage ΔV in the blanking period described above, but is a similar and approximately the same voltage, so "'" is added.

[0182] However, in FIG. 19, the timing of the scan and blanking periods for the 32 scan lines is expressed using 16 scan lines in order to make it easier to understand visually, and based on the timing chart shown at the top of FIG. 19, the abnormal noise that occurs is assumed to be 1920 Hz.

[0183] In the following description, the number of times per second that the ripple voltage ΔV occurs during the scan blanking period Tscanblk, which causes abnormal noise, is also referred to as the ripple frequency.

[0184] For example, if the scan frequency is doubled from 1920 Hz to 3840 Hz, as shown in the middle of Fig. 19, the number of occurrences of the scan blanking period Tscanblk, i.e., the ripple voltage ΔV', will be twice as many as in the case shown in the top of Fig. 19. Therefore, in this case, the ripple frequency will be 3840 Hz, and a higher frequency abnormal noise will be generated.

[0185] Furthermore, for example, if the scan frequency of 1920 Hz is increased to 7680 Hz, which is four times as high, as shown in the middle part of Fig. 19, the number of occurrences of the scan blanking period Tscanblk, i.e., the ripple voltage ΔV', will be four times as high as that shown in the top part of Fig. 19. Therefore, in this case, the ripple frequency will be 7680 Hz, and an even higher frequency abnormal noise will occur.

[0186] Since abnormal noise occurs with each scan, increasing the scan frequency in this way shortens the scan time for each scan line, thereby reducing the radiation power of the abnormal noise, thereby achieving the effect of reducing the abnormal noise.

[0187] However, the human audible band includes the range from 1920 Hz to 7680 Hz, and the control described with reference to FIG. 19 will result in abnormal noise in the audible band.

[0188] For this reason, it is conceivable that by further increasing the scanning frequency and raising the ripple frequency, abnormal noise exceeding 10 kHz, which is close to the upper limit of the audible range, may be generated.

[0189] That is, for example, if the scan frequency is eight times that of 1920 Hz, abnormal sounds exceeding 10 kHz, that is, abnormal sounds in the audible range but in the range of reduced hearing sensitivity, will be difficult to perceive with human hearing and will not be recognized as abnormal sounds, so that it is possible to essentially suppress abnormal sounds.

[0190] However, there are limitations to the scan frequency that can be realized by hardware, such as the PWM (Pulse Width Modulation) control limit in the LED driver 121 and the operating limits of other ICs. Although it is possible to quadruple the scan frequency, this would result in an expensive configuration, and therefore control with a ripple frequency exceeding 3840 Hz is not realistic in terms of suppressing abnormal noise with an inexpensive configuration.

[0191] Therefore, in the present disclosure, as shown in FIG. 20, a virtual blanking period is set in the scan section of one frame, and only the ripple frequency is increased without increasing the scan frequency, thereby reducing the burden on hardware and making the abnormal sound difficult for humans to perceive, thereby achieving substantial suppression of abnormal sound.

[0192] In Fig. 20, the top and middle sections are the same as Fig. 19. In the bottom section of Fig. 20, the scan frequency of 1920 Hz is set to about twice the frequency that allows for realistic control, and one virtual scan blanking period (hereinafter referred to as a virtual scan blanking period) VTscanblk is set for each scan section.

[0193] That is, as shown in the bottom row of Figure 20, the virtual scan blanking period VTscanblk is set at the timing when half of all scan lines have been scanned during one scan, so that the blanking period Tblk and the virtual scan blanking period VTscanblk are set at equal intervals.

[0194] More specifically, the scan blanking period Tscanblk and the virtual scan blanking period VTvscanblk have a relationship as shown in FIG.

[0195] That is, when the scan lines L1 to L16 are scanned once, the virtual scan blanking period VTvscanblk is set at the timing when the scan lines L1 to L8 are completed, and the blanking period Tblk is set at the time when the scan lines L9 to L16 are completed.

[0196] This makes it possible to obtain a ripple frequency that is substantially the same as that obtained when the scan frequency is eight times 1920 Hz. When the ripple frequency exceeds 7680 Hz, a part of the vibration is absorbed by the substrate 153, and the radiation power of the abnormal sound is reduced, resulting in the effect of reducing the occurrence of the abnormal sound. In addition, since the ripple frequency approaches 10 kHz, which is close to the upper limit of the audible band, the abnormal sound is less likely to be perceived. In either case, the result is that it is possible to substantially reduce the abnormal sound. Furthermore, by adding a virtual scan blanking period VTscanvblk and setting the ripple frequency to, for example, 10 kHz or more, it is possible to further enhance the effect of reducing the abnormal sound.

[0197] In addition, the bottom row of Figure 20 illustrates an example in which the virtual scan blanking period VTscanblk is set at the timing when scanning of half of all scan lines in one scan has been completed, but the virtual scan blanking period VTscanvblk may be set longer than this as long as the blanking period and the virtual scan blanking period are set at equal intervals.

[0198] For example, if the total number of scan lines in one scan is 12, two virtual scan blanking periods VTscanblk may be set, one at the timing when scanning of the fourth line, which is the first 1 / 3 of the scan lines, is completed, and the other at the timing when scanning of the eighth line, which is the next 1 / 3 of the scan lines, is completed.

[0199] In other words, as long as the scan blanking periods Tscanblk and the virtual scan blanking periods VTscanblk are set at equal intervals, a greater number of virtual scan blanking periods VTscanblk may be set.

[0200] Furthermore, as shown in the bottom row of FIG. 20, when the virtual scan blanking period VTscanblk is set at the timing when scanning of half the scan lines is completed, the ripple frequency is twice the frame rate.

[0201] Furthermore, as described above, when the number of scan lines per scan is 12, when a total of two virtual scan blanking periods VTcanblk are set at the timing when scanning of the fourth line (the first 1 / 3 of the scan lines) is completed and at the timing when scanning of the eighth line (the next 1 / 3 of the scan lines) is completed, the ripple frequency will be three times the scan frequency.

[0202] This makes it possible to set the ripple frequency to a value that is substantially a multiple ((n+1) times) of the frame rate, where n is the number of virtual scan blanking periods set in one frame.

[0203] However, the human audible band does not exist in the region above 20 kHz, and in addition, if the virtual scan blanking period VTscanblk increases too much, the light emission time becomes shorter and the illuminance decreases.

[0204] Therefore, the virtual scan blanking period VTscanblk is set in such a way that the ripple frequency, which is set together with the blanking period Tblk and the scan blanking period Tscanblk, is set in the range from near the upper limit of the human audible band but not reaching the upper limit to the lower limit of the band (inaudible band) where the sound is completely undetectable as an abnormal sound, and it is desirable to set the upper limit to, for example, more than 10 kHz.

[0205] The reason why the range includes the vicinity of the upper limit of the human audible range but does not reach the upper limit of the audible range is that even simply approaching the upper limit of the audible range makes it less likely to be perceived as an abnormal sound, and has the effect of substantially reducing abnormal sounds while ensuring the lights-out time.

[0206] As described above, the source of the abnormal noise is the deflection of substrate 153 that occurs with the change in ripple voltage ΔV. The change in ripple voltage ΔV depends on the brightness, and the vibration of substrate 153 is also affected by the material (hardness) of substrate 153.

[0207] That is, the current value and voltage value flowing through the pixel change according to the brightness, and as a result, the ripple voltage ΔV changes according to the brightness.

[0208] For this reason, the signal processing unit 112 in the driver control unit 91 of the display unit 51 sets the virtual scan blanking period VTscanblk according to the frame rate supplied as a control signal from the video wall controller 32, the brightness of the video signal, and information on the material (hardness) of the substrate 153 that is stored in advance in the DRAM 113.

[0209] For example, when the luminance is higher than a predetermined value, the ripple voltage ΔV becomes large, so the signal processing unit 112 may set the virtual scan blanking period so that the ripple frequency becomes higher than a predetermined value.

[0210] However, as described above, if the ripple frequency becomes too high, the off period becomes longer, resulting in a decrease in illuminance, so for example, when the luminance is higher than a predetermined value, the virtual scan blanking period may be set to have the above-mentioned upper limit ripple frequency, whereas when the luminance is not higher than the predetermined value, the virtual scan blanking period may be set to have a ripple frequency lower than the upper limit.

[0211] Also, in the bottom row of Fig. 18, the scan frequency in the top row of Fig. 20 is doubled, and then one virtual scan blanking period is set for each scan, thereby achieving a ripple frequency that is essentially four times that of the scan frequency in the top row. However, it is also possible to keep the scan frequency in the top row of Fig. 20 and set three virtual scan blanking periods for each scan, thereby achieving a ripple frequency that is essentially four times that of the scan frequency in the top row.

[0212] Setting a virtual scan blanking period without multiplying the scan frequency and increasing the ripple frequency reduces the burden on the hardware related to PWM control; however, the scan time for each scan line is shortened, making it easier for abnormal noise to occur and reducing the effect of reducing abnormal noise compared to when the scan frequency is multiplied.

[0213] In other words, when setting a virtual scan blanking period to increase the ripple frequency, whether or not to multiply the scan frequency before processing is a trade-off between the burden on the hardware related to PWM control and the degree of effect on reducing abnormal noise.

[0214] Furthermore, with current technology, the processing with a ripple frequency of 1920 Hz described with reference to the top row of Figure 20 is common, and furthermore, doubling the scan frequency and processing with a ripple frequency of 3840 Hz is a technology that can be implemented at low cost, so it can be said that the processing up to the middle row of Figure 20 is a technology that can be implemented at low cost.

[0215] However, to achieve processing with a higher scan frequency would require high hardware costs for PWM control.For this reason, in the current technology, a method that reduces abnormal noise by doubling the scan frequency for a configuration with a typical ripple frequency of 1920 Hz, and then setting a virtual scan blanking period so that the ripple frequency is a multiple of the scan frequency, is a method that can be said to be excellent in terms of the degree of abnormal noise reduction and cost performance.

[0216] The signal processing unit 112 stops processing during the scan blanking period Tscanblk and the virtual scan blanking period VTscanblk in the same manner as during the blanking period Tblk.

[0217] The lengths of the scan blanking period Tscanblk and the virtual scan blanking period VTscanblk may be set in the same manner as the blanking period.

[0218] However, since the process described with reference to FIG. 20 is not a process for actually suppressing the occurrence of abnormal sounds, if the virtual scan blanking period is set so that the ripple frequency is a multiple of the frequency of the scan blanking period, even if the lengths of the blanking period, scan blanking period and virtual scan blanking period are of conventional lengths, they will not be recognized as abnormal sounds, and it is therefore possible to obtain the effect of substantially reducing abnormal sounds.

[0219] However, just like the length of the blanking period, by making the scan blanking period and the virtual scan blanking period shorter, the fluctuations in the ripple voltage ΔV can be made smaller, which in turn suppresses vibration and the occurrence of abnormal noise itself, thereby making it possible to achieve a greater effect in reducing abnormal noise.

[0220] In the second application example, the occurrence of abnormal noise itself is not suppressed, but the abnormal noise that occurs is made difficult to perceive as abnormal noise. For this reason, for example, in other devices such as LED backlights, abnormal noise caused by vibrations due to a ripple voltage ΔV that occurs at a predetermined cycle in a substrate having MLCCs and wiring can be made difficult to perceive as abnormal noise by setting LED off periods such as blanking periods, scan blanking periods, and virtual scan blanking periods so that the ripple frequency exceeds the audible range.

[0221] <<13. Display processing in the second application example>> Next, the display process in the second application example by the display system 11 in Fig. 1 will be described with reference to the flowchart in Fig. 22. Note that the processes in steps S71 to S73, and steps S75 and S76 in the flowchart in Fig. 22 are similar to the processes in steps S11 to S13, and steps S15 and S16 in the flowchart in Fig. 15, and therefore the description thereof will be omitted.

[0222] That is, in steps S71 to S73, the input of a video signal is accepted, the video format is converted, and the input of a control signal supplied from the MPU 76 in response to the operation content of the PC 30 is accepted, and signal processing such as color temperature, contrast, and brightness is performed.

[0223] In step S74, the signal processor 78 supplies information on the frame rate of the video signal that has been subjected to the signal processing to the signal processor 112 in the driver controller 91 of the display unit 51 as a control signal.

[0224] Thereafter, in steps S75 and S76, the processed video signals are allocated and distributed to the display units 51-1 to 51-n of the video wall 33 and transmitted to each of them.

[0225] Through the above series of processes, the video signal read out from the video server 31 is subjected to signal processing, and then distributed and transmitted to each of the display units 51-1 to 51-n that make up the video wall 33, and the frame rate is further supplied to the display unit 51.

[0226] As a result, each image is displayed by the display units 51-1 to 51-n, making it possible to display the image of the video content as a whole on the video wall 33. Also, in each of the display units 51, it becomes possible to set the virtual scan blanking period VTscanblk based on the frame rate, making it possible to suppress abnormal noise.

[0227] <<14. Driver control process by the display unit in the second application example>> Next, an application example of the driver control process by the display unit 51 will be described with reference to the flowchart of Fig. 23. Note that the processes of steps S91, and S95 to S98 in Fig. 23 are similar to the processes of steps S33 to S36 in the flowchart of Fig. 16, and therefore will be omitted as appropriate.

[0228] That is, in step S91, the input of the video signal distributed and supplied from the video wall controller 32 is accepted via the signal input IF 111 on a row-by-row basis.

[0229] In step S92, the signal processing unit 112 receives the frame rate information supplied from the video wall controller 32 as a control signal.

[0230] In step S93, the signal processing unit 112 sets the virtual scan blanking period VTscanblk to a ripple frequency higher than a predetermined frequency that is unlikely to be recognized as an abnormal sound, based on the brightness based on the video signal, information on the material (hardness) of the substrate 153 pre-stored in the DRAM 113, and information on the frame rate.

[0231] That is, based on the brightness based on the video signal, information on the material (hardness) of the substrate 153, and information on the frame rate, the signal processing unit 112 sets the blanking period, scan blanking period, and virtual scan blanking period, along with their respective lengths, so as to realize a ripple frequency that is higher than a predetermined frequency (higher than the audible range) that is unlikely to be recognized as an abnormal sound and is multiplied with the frequency of the scan blanking period.

[0232] In step S94, the signal processing unit 112 determines whether it is a blanking period, a scan blanking period, or a virtual scan blanking period. That is, the signal processing unit 112 determines whether it is the timing to enter a blanking period, a scan blanking period, or a virtual scan blanking period.

[0233] If it is determined in step S94 that the period is any of a blanking period, a scan blanking period, and a virtual scan blanking period, the process proceeds to step S95.

[0234] In step S95, the signal processing unit 112 stops processing for a time period set as the lengths of the blanking period, the scan blanking period, and the virtual scan blanking period.

[0235] If it is determined in step S94 that the period is not a blanking period, a scan blanking period, or a virtual scan blanking period, the process of step S95 is skipped.

[0236] Then, in steps S96 to S98, video signal processing is performed to perform color and brightness correction corresponding to each display unit 51, the signal is assigned to LED drivers 121-1 to 121-N in LED block 92, and transmitted via corresponding output IFs 114-1 to 114-N. LED drive control processing is performed based on the video signal on a row-by-row basis, and images are displayed on a row-by-row basis with appropriate brightness through PWM control.

[0237] Since processing is stopped during blanking periods, scan blanking periods, and virtual scan blanking periods that are set to a length shorter than the length of the blanking periods defined in conventional standards, the time that the LED is in an off state is shortened, thereby suppressing the generation of ripple voltage ΔV.

[0238] Furthermore, by setting a virtual scan blanking period in addition to the blanking period and scan blanking period, it is possible to increase the ripple frequency without increasing the scan frequency. Therefore, by placing any abnormal noise outside the audible range, it is possible to make it difficult to recognize the abnormal noise, thereby making it possible to substantially reduce the abnormal noise.

[0239] This makes it possible to suppress the occurrence of abnormal noise by shortening the blanking period, scan blanking period, and virtual scan blanking period, while setting the virtual scan blanking period increases the ripple frequency without increasing the scan frequency, making it difficult to recognize any abnormal noise that occurs as an abnormal noise.

[0240] As a result, it is possible to achieve noise suppression effects at low cost.

[0241] <<15. Example of execution by software>> The above-mentioned series of processes can be executed by hardware, but can also be executed by software. When the series of processes are executed by software, the programs constituting the software are installed from a recording medium into a computer built into dedicated hardware, or into, for example, a general-purpose computer capable of executing various functions by installing various programs.

[0242] 24 shows an example of the configuration of a general-purpose computer. This computer has a built-in CPU (Central Processing Unit) 1001. An input / output interface 1005 is connected to the CPU 1001 via a bus 1004. A ROM (Read Only Memory) 1002 and a RAM (Random Access Memory) 1003 are connected to the bus 1004.

[0243] An input unit 1006 consisting of input devices such as a keyboard and a mouse through which a user inputs operation commands, an output unit 1007 for outputting a processing operation screen and an image of the processing result to a display device, a storage unit 1008 consisting of a hard disk drive for storing programs and various data, and a communication unit 1009 consisting of a LAN (Local Area Network) adapter and the like for executing communication processing via a network such as the Internet are connected to the input / output interface 1005. Also connected is a drive 1010 for reading and writing data from and to a removable storage medium 1011 such as a magnetic disk (including a flexible disk), an optical disk (including a CD-ROM (Compact Disc-Read Only Memory) and a DVD (Digital Versatile Disc)), a magneto-optical disk (including an MD (Mini Disc)), or a semiconductor memory.

[0244] The CPU 1001 executes various processes according to a program stored in a ROM 1002 or a program read from a removable storage medium 1011 such as a magnetic disk, an optical disk, a magneto-optical disk, or a semiconductor memory and installed in a storage unit 1008, and loaded from the storage unit 1008 to a RAM 1003. The RAM 1003 also stores data and the like necessary for the CPU 1001 to execute various processes, as appropriate.

[0245] In a computer configured as described above, the CPU 1001 loads a program stored in the memory unit 1008, for example, into the RAM 1003 via the input / output interface 1005 and the bus 1004, and executes the program, thereby performing the series of processes described above.

[0246] The program executed by the computer (CPU 1001) can be provided by being recorded on a removable storage medium 1011 such as a package medium, for example. The program can also be provided via a wired or wireless transmission medium such as a local area network, the Internet, or digital satellite broadcasting.

[0247] In the computer, the program can be installed in the storage unit 1008 via the input / output interface 1005 by mounting the removable storage medium 1011 in the drive 1010. The program can also be received by the communication unit 1009 via a wired or wireless transmission medium and installed in the storage unit 1008. Alternatively, the program can be pre-installed in the ROM 1002 or the storage unit 1008.

[0248] In addition, the program executed by the computer may be a program in which processing is performed chronologically in the order described in this specification, or it may be a program in which processing is performed in parallel or at the required timing, such as when called.

[0249] It should be noted that the CPU 1001 in FIG.

[0250] In this specification, a system refers to a collection of multiple components (devices, modules (parts), etc.), regardless of whether all the components are in the same case. Therefore, multiple devices housed in separate cases and connected via a network, and a single device in which multiple modules are housed in a single case, are both systems.

[0251] The embodiments of the present disclosure are not limited to the above-described embodiments, and various modifications are possible without departing from the gist of the present disclosure.

[0252] For example, the present disclosure can take the form of cloud computing in which a single function is shared and processed collaboratively by multiple devices via a network.

[0253] Furthermore, each step described in the above flow chart can be executed by one device, or can be shared and executed by a plurality of devices.

[0254] Furthermore, when a single step includes multiple processes, the multiple processes included in the single step can be executed by a single device, or can be shared and executed by multiple devices.

[0255] The present disclosure can also be configured as follows. <1> Equipped with a light emission control unit that controls the light emission of the LEDs that make up the LED (Light Emitting Diode) array, The light emission control unit controls the frequency during the period in which the LED is turned off to be higher than a predetermined frequency. Drive control device. <2> The light emission control unit controls the frequency during which the LED is turned off to be higher than a frequency in the human audible range. <1> The drive control device described in. <3> The light emission control unit controls the light emission of the LEDs constituting the LED array in units of scan lines using a passive matrix driving method. <1> The drive control device described in. <4> The light emission control unit controls the frequency during which the LED is turned off based on the frame rate of the input signal so that the frequency is higher than the frequency in the human audible range. <2> The drive control device described in. <5> The light emission control unit controls a scan frequency during which the LED is turned off to a frequency that is a multiple of the frame rate and is higher than a frequency in the human audible range. <4> The drive control device described in. <6> The periods during which the LED is turned off are a first period from when the last line of the previous scan is displayed until the first line of the next scan is displayed, based on a scan frequency that is a multiple of the frame rate, and a second period set at equal intervals between successive first periods. <5> The drive control device described in. <7> The light emission control unit controls the length of the period during which the LED is turned off to be shorter than the time indicated by the input signal. <6> The drive control device described in. <8> The time indicated by the input signal corresponds to a blanking period of the input signal. <7> The drive control device described in. <9> The light emission control unit controls the length of the period during which the LED is turned off so as to change the voltage applied to a capacitor provided on a substrate constituting the device. <7> The drive control device described in. <10> The light emission control unit controls the length of the period during which the LED is turned off so that the voltage applied to the capacitor becomes one-third or less. <9> The drive control device described in. <11> The light emission control unit controls the length of the period during which the LED is turned off in accordance with the capacitance or impedance of a capacitor provided on a substrate constituting the device. <7> The drive control device described in. <12> The capacitor is an MLCC (Multilayer Ceramic Capacitor). <11> The drive control device described in. <13> The light emission control unit acquires information about the capacitor provided on the board constituting the device, and controls the length of the period during which the LED is turned off based on the acquired information about the capacitor. <12> The drive control device described in. <14> The light emission control unit controls the frequency during which the LED is turned off based on the scan frequency and the hardness of a substrate constituting the device so that the frequency is higher than the frequency in the human audible range. <5> The drive control device described in. <15> The light emission control unit controls the frequency during which the LED is turned off based on the scan frequency, the hardness of the substrate, and the brightness of the LED so that the frequency is higher than the frequency in the human audible range. <14> The drive control device described in. <16> The light emission control unit controls the frequency during the period in which the LED is turned off to be higher as the luminance of the LED becomes higher. <15> The drive control device described in. <17> The light emission control unit controls a frequency during which the LED is turned off to be higher than an upper limit of the human audible band and lower than a lower limit of the human inaudible band. <15> The drive control device described in. <18> The light emission control unit multiplies the scan frequency based on the scan frequency, and controls the frequency during which the LED is turned off to be higher than a frequency in the human audible range. <5> The drive control device described in. <19> The computer functions as a light emission control unit that controls the light emission of the LEDs that make up the LED (Light Emitting Diode) array. The light emission control unit controls the frequency during the period in which the LED is turned off to be higher than a predetermined frequency. program. <20> A display unit including a display unit having an array of LEDs (Light Emitting Diodes) and a drive control device for controlling the drive of the LEDs; a distribution unit that receives an input of a video signal, performs a predetermined signal processing on the video signal, and distributes the video signal to the display unit; The drive control device includes: A light emission control unit is provided to control the light emission of the LED. The light emission control unit controls the frequency during the period in which the LED is turned off to be higher than a predetermined frequency. Display system. [Explanation of symbols]

[0256] 11 display system, 30 PC, 31 video server, 32 video wall controller, 33 video wall, 51, 51-1 to 51-n display unit, 78 signal processing section, 91 driver control section, 92 driver block, 112 signal processing section, 121, 121-1 to 121-N drive circuit, 122 pixel array, 151 AC power supply, 152, 153 substrate / wiring, 161, 162 wiring, 171 MLCC, 172 connection section

Claims

1. Equipped with a light emission control unit that controls the light emission of the LEDs that make up the LED (Light Emitting Diode) array, The light emission control unit controls the frequency during the period in which the LED is turned off to be higher than a predetermined frequency. Drive control device.

2. The light emission control unit controls the frequency during which the LED is turned off to be higher than a frequency in the human audible range. The drive control device according to claim 1.

3. The light emission control unit controls the light emission of the LEDs constituting the LED array in units of scan lines using a passive matrix driving method. The drive control device according to claim 1.

4. The light emission control unit controls the frequency during which the LED is turned off based on the frame rate of the input signal so that the frequency is higher than the frequency in the human audible range. The drive control device according to claim 2.

5. The light emission control unit controls a scan frequency during which the LED is turned off to a frequency that is a multiple of the frame rate and is higher than a frequency in the human audible range. The drive control device according to claim 4.

6. The period during which the LED is turned off is a first period from when the last line of the previous scan is displayed until the first line of the next scan is displayed, based on a scan frequency that is a multiple of the frame rate, and a second period set at equal intervals between successive first periods. The drive control device according to claim 5.

7. The light emission control unit controls the length of the period during which the LED is turned off to be shorter than the time indicated by the input signal. The drive control device according to claim 6.

8. The time indicated by the input signal corresponds to a blanking period of the input signal. The drive control device according to claim 7.

9. The light emission control unit controls the length of the period during which the LED is turned off so as to change the voltage applied to a capacitor provided on a substrate constituting the device. The drive control device according to claim 7.

10. The light emission control unit controls the length of the period during which the LED is turned off so that the voltage applied to the capacitor becomes one-third or less. The drive control device according to claim 9.

11. The light emission control unit controls the length of the period during which the LED is turned off in accordance with the capacitance or impedance of a capacitor provided on a substrate constituting the device. The drive control device according to claim 7.

12. The capacitor is an MLCC (Multilayer Ceramic Capacitor). The drive control device according to claim 11.

13. The light emission control unit acquires information about the capacitor provided on the board constituting the device, and controls the length of the period during which the LED is turned off based on the acquired information about the capacitor. The drive control device according to claim 12.

14. The light emission control unit controls the frequency during which the LED is turned off based on the scan frequency and the hardness of a substrate constituting the device so that the frequency is higher than the frequency in the human audible range. The drive control device according to claim 5.

15. The light emission control unit controls the frequency during which the LED is turned off based on the scan frequency, the hardness of the substrate, and the brightness of the LED so that the frequency is higher than the frequency in the human audible range. The drive control device according to claim 14.

16. The light emission control unit controls the frequency during the period in which the LED is turned off to be higher as the luminance of the LED becomes higher. The drive control device according to claim 15.

17. The light emission control unit controls a frequency during which the LED is turned off to be higher than an upper limit of the human audible band and lower than a lower limit of the human inaudible band. The drive control device according to claim 15.

18. The light emission control unit multiplies the scan frequency based on the scan frequency, and controls the frequency during which the LED is turned off to be higher than a frequency in the human audible range. The drive control device according to claim 5.

19. The computer functions as a light emission control unit that controls the light emission of the LEDs that make up the LED (Light Emitting Diode) array. The light emission control unit controls the frequency during the period in which the LED is turned off to be higher than a predetermined frequency. program.

20. A display unit including a display unit having an array of light emitting diodes (LEDs) and a drive control device for controlling the drive of the LEDs; a distribution unit that receives an input of a video signal, performs a predetermined signal processing on the video signal, and distributes the video signal to the display unit; The drive control device includes: A light emission control unit is provided to control the light emission of the LED. The light emission control unit controls the frequency during the period in which the LED is turned off to be higher than a predetermined frequency. Display system.

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