Light-emitting device

Abstract

To provide a technique advantageous for ensuring uniformity in a screen.SOLUTION: A light-emitting device has a plurality of light-emitting elements and a plurality of pixel circuits, and each of the plurality of pixel circuits has a drive transistor that drives the light-emitting element, a write transistor that writes a signal in a gate of the drive transistor, and a light-emission control transistor that controls a connection between the gate of the drive transistor and a power supply. The light-emitting device has a first control line for controlling the write transistor, a second control line for controlling the light-emission control transistor, and means that causes the signal waveform of the second control line to be inclined.SELECTED DRAWING: Figure 6

Description

[Technical field]

[0001] The present invention relates to a light-emitting device, for example, a light-emitting device having an organic light-emitting element. [Background technology]

[0002] Display devices having organic light-emitting elements and the like are used for various purposes such as mobile devices, televisions, and wearable devices. If the same level of video signal is supplied to each pixel constituting the screen, all pixels will emit light with the same brightness, and uniformity of the screen should be obtained. However, the uniformity of the screen in terms of brightness may be lost due to differences in the characteristics of the devices constituting the pixels. In particular, when larger screens and more pixels are required, ensuring uniformity of the screen in terms of brightness leads to high image quality, so technologies to ensure uniformity of brightness within the screen have been developed.

[0003] Patent Document 1 describes a configuration in which a control signal WS has a slope when a sampling transistor is turned off in order to correct the mobility of a drive transistor. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2008-310352 A Summary of the Invention [Problem to be solved by the invention]

[0005] In Patent Document 1, a gradient is imparted to the control signal of the sampling transistor in order to correct the mobility of the drive transistor, but no consideration is given to control signals of other transistors.

[0006] The present invention has been made in view of the above-mentioned problems, and has an object to provide a technique that is advantageous in ensuring uniformity within a screen. [Means for solving the problem]

[0007] The light-emitting device of the present invention is a light-emitting device having a plurality of light-emitting elements and a plurality of pixel circuits, each of the plurality of pixel circuits including a drive transistor for driving the light-emitting element, a write transistor for writing a signal to a gate of the drive transistor, and a light-emitting control transistor for controlling a connection between the gate of the drive transistor and a power source, and further including a first control line for controlling the write transistor, a second control line for controlling the light-emitting control transistor, and a means for tilting the signal waveform of the second control line. Effect of the Invention

[0008] According to the present invention, it is possible to provide a technique that is advantageous in ensuring uniformity within a screen. [Brief description of the drawings]

[0009] [Figure 1] Light emitting device according to embodiment 1 [Diagram 2] Pixel circuit of the light emitting device according to embodiment 1 [Diagram 3] FIG. 1 is a schematic diagram of a circuit diagram of a scanning line and a timing relationship of a control signal according to the first embodiment; [Figure 4] Configuration example of a vertical scanning circuit according to the first embodiment [Diagram 5] Configuration example of output buffer according to embodiment 1 [Figure 6] Timing diagram of the pixel circuit according to the first embodiment [Figure 7] Timing diagram of the pixel circuit according to the second embodiment [Figure 8] Configuration example of output buffer according to the third embodiment [Figure 9] FIG. 11 is a schematic cross-sectional view illustrating an example of a pixel of a light-emitting device according to embodiment 4. [Figure 10] FIG. 13 is a schematic diagram illustrating an example of a light-emitting device according to embodiment 5. [Figure 11] FIG. 13 is a schematic diagram illustrating an example of an imaging device and an electronic device according to a sixth embodiment. [Figure 12] FIG. 13 is a schematic diagram illustrating an example of a display device according to a seventh embodiment. [Figure 13] FIG. 13 is a schematic diagram showing an example of an automobile having an illumination device and a vehicle lamp according to embodiment 8. [Figure 14] FIG. 13 is a schematic diagram illustrating an example of a wearable device according to a ninth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Hereinafter, the embodiments will be described in detail with reference to the attached drawings. Note that the following embodiments do not limit the invention according to the claims. Although the embodiments describe a number of features, not all of these features are essential to the invention, and the features may be combined in any manner. Furthermore, in the attached drawings, the same reference numbers are used for the same or similar configurations, and duplicated descriptions are omitted.

[0011] (Embodiment 1) (Overall composition) FIG. 1 is a diagram showing a light-emitting device according to the present embodiment. As shown in FIG. 1, a light-emitting device 101 equipped with an organic light-emitting element has a pixel array section 103 and a driving section arranged around the pixel array section 103. The pixel array section 103 has a plurality of pixels 102 arranged two-dimensionally in a matrix, and each pixel 102 has an organic light-emitting element 201 (shown in FIG. 2). The organic light-emitting element 201 has an organic layer including a light-emitting layer between an anode and a cathode. The organic layer may appropriately have one or a plurality of a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer in addition to the light-emitting layer.

[0012] The light emitting device 101 has a driving section that drives each pixel 102. For example, the driving section has a vertical scanning circuit 104 and a signal output circuit 105. In the pixel array section 103, a first control line 106 and a second control line 107 are arranged for each row of pixels along the row direction. Also, a signal line 108 is arranged for each column of pixels along the column direction.

[0013] The first control line 106 and the second control line 107 are connected to output terminals of the corresponding rows of the vertical scanning circuit 104. Furthermore, the signal line 108 is connected to an output terminal of the signal output circuit 105. The vertical scanning circuit 104 is arranged on the left and right of the pixel array section 103, and supplies a write control signal to the first control line 106 when writing a video signal to each pixel 102 of the pixel array section 103. Furthermore, the vertical scanning circuit 104 supplies a light emission control signal for controlling the on / off of light emission to the second control line 107.

[0014] (Pixel circuit) Fig. 2 is a circuit diagram of a pixel 102 included in the light emitting device 101 of Fig. 1. As shown in Fig. 2, the pixel 102 includes an organic light emitting element 201, a driving transistor 202 (DRV), a writing transistor 203 (SEL), a light emission control transistor 204 (SW), a first capacitance element 205, and a second capacitance element 206. Here, the driving transistor 202, the writing transistor 203, and the light emission control transistor 204 are P-type transistors. The first capacitance element 205 and the second capacitance element 206 have, for example, a MIM (Metal-Insulator-Metal) structure.

[0015] Specifically, the drain of the driving transistor 202 is connected to the anode of the organic light emitting element 201. The source of the light emission control transistor 204 is connected to a first power supply 207 (hereinafter, PVDD). The cathode of the organic light emitting element 201 is connected to a second power supply 208 (hereinafter, PVSS). The gate of the light emission control transistor 204 is connected to a second control line 107.

[0016] The drain of the write transistor 203 is connected to the gate of the drive transistor 202, and the source of the write transistor 203 is connected to the signal line . The gate of the write transistor 203 is connected to the first control line .

[0017] The first capacitance element 205 is connected between the gate of the driving transistor 202 and the source of the driving transistor 202. In addition, the second capacitance element 206 is connected between the source of the emission control transistor 204 and the drain of the emission control transistor 204.

[0018] In a light emitting device, the threshold voltage of the driving transistor 202 may differ for each pixel due to manufacturing variations. When the same signal voltage is written to multiple pixels of the same color, if the threshold voltage of the driving transistor 202 differs for each pixel, the drain current of the driving transistor 202 differs for each pixel, resulting in variation in the amount of light emitted. Therefore, an operation is performed to hold the threshold voltage of the driving transistor 202 between the gate and source of the driving transistor 202 before writing the signal voltage (so-called threshold correction operation). This threshold correction operation can reduce the variation in the amount of current of the driving transistor 202 in each pixel, thereby achieving uniform light emission.

[0019] In the threshold correction operation, first, while the writing transistor 203 and the emission control transistor 204 are in the ON state, a current is passed through the organic light emitting element 201 via the emission control transistor 204 and the driving transistor 202. Next, the emission control transistor 204 is turned off, and the charge held in the first capacitance element 205 flows out due to the ON current of the driving transistor 202, and the gate-source voltage of the driving transistor decreases toward the threshold voltage. This causes the threshold correction. Then, the writing transistor 203 is turned off, and the threshold correction ends. Since the gate-source voltage of the driving transistor 202 varies depending on the period of threshold correction, it is important to align the period of threshold correction for each pixel. Details will be described below.

[0020] (Scanning circuit and control signal) Fig. 3 is a diagram showing a schematic diagram of the relationship between the equivalent circuit of the scanning line and the timing of the control signal. Fig. 3(a) shows the equivalent circuit of the buffer of the vertical scanning circuit 104 and the scanning line. Fig. 3(b) shows the equivalent circuit in the logical state when the output of the buffer transitions from Low to High. Fig. 3(c) shows the equivalent circuit in the logical state when the output of the buffer transitions from High to Low.

[0021] In FIG. 3(a), an input signal is input to an inverter that constitutes a buffer of the vertical scanning circuit 104, and the buffered signal is supplied to a scanning line. Here, the delay amount is the time it takes for the control signal to reach 50% of VDD from 0V or 50% of VDD from VDD. When the output of the buffer transitions from Low to High, the on-resistance of a P-type transistor (a transistor of a first conductivity type) of the inverter that constitutes the buffer affects the delay amount. On the other hand, when the output of the buffer transitions from High to Low, the on-resistance of an N-type transistor (a transistor of a second conductivity type) of the inverter that constitutes the buffer affects the delay amount.

[0022] Next, a description will be given with reference to Figures 3(b) and 3(c). The on-resistance of the P-type transistor constituting the buffer of the vertical scanning circuit 104 is Ronp, the on-resistance of the N-type transistor is Ronn, the wiring resistance of the scanning line is R, and the parasitic capacitance is C. In this case, the delay amount τ1 of the control signal at the rising timing of the control signal when the P-type transistor is in the on state is given by: τ1=(Rpon+R)×C In addition, the delay amount τ2 of the control signal at the rising edge of the control signal when the N-type transistor is in the ON state is τ2=(Rnon+R)×C In addition, if the wiring length of the scan line is L, the resistance per unit length is r, and the capacitance per unit length is c, the delay amount τ1' of the control signal at the timing of the rise of the control signal when the P-type transistor is in the on state is τ1'=(Rpon+r×L)×c×L In addition, the delay amount τ2' of the control signal at the rising edge of the control signal when the N-type transistor is in the ON state is τ2'=(Rnon+r×L)×c×L It can be seen that the delay amount increases as the wiring length L increases. When the delay amount increases, a slope is imparted to the rising and falling edges of the waveform, so that the slope of the rising and falling edges of the control signal becomes gentler from the end portion to the center portion of the pixel array unit 103 in the process of propagating along the scanning line.

[0023] 3(d) shows the waveforms of the input signal to the buffer and the control signal when the end of the pixel array 103 is designated as nodeA and the center of the pixel array 103 is designated as nodeB. Here, the end of the pixel array section 103 refers to the end of the pixel array 103 closest to the vertical scanning circuit 104. Also, the center of the pixel array 103 refers to the center of the pixel array 103 farthest from the left and right vertical scanning circuits 104. When the vertical scanning circuit 104 is disposed on only one of the left and right sides, the above-mentioned "end" refers to the first end (e.g., the left end), and the above-mentioned "center" refers to the second end (e.g., the right end) disposed opposite to the first end.

[0024] At time t1 in FIG. 3(d), the input signal rises.

[0025] At time t2, the waveform of nodeA reaches a voltage of about 50% of VDD from 0 V. The time from time t1 to time t2 is the delay amount τ3 at nodeA.

[0026] At time t3, the waveform of nodeB reaches a voltage of approximately 50% of VDD from 0V. The time from time t1 to time t3 is the delay amount τ4 at nodeB. Compared to the waveform of nodeA at the end of the pixel array 103, the waveform of nodeB at the center of the pixel array 103 has a larger delay amount. This is because the wiring length L is longer in the center of the pixel array 103 than at the end.

[0027] At time t5, the input signal falls.

[0028] At time t6, the waveform of nodeA reaches a voltage of about 50% of VDD from VDD. The time from time t5 to time t6 is the delay amount τ5 at nodeA.

[0029] At time t7, the waveform of nodeB reaches a voltage of about 50% of VDD from 0 V. The time from time t5 to time t7 is a delay amount τ6 at nodeB. Compared to the waveform of nodeA at the end of the pixel array 103, the waveform of nodeB at the center of the pixel array 103 has a larger delay amount.

[0030] In general, when buffering a control signal, the quality of the signal is improved by reducing the on-resistance of the P-type transistor and the N-type transistor and reducing the delay of the control signal. However, here, a configuration is used in which a slope is applied to the rising and / or falling of the waveform at the end of the pixel array 103. For example, the on-resistance of the P-type transistor or the N-type transistor is increased. Alternatively, a resistive element may be inserted between nodeA and the end of the pixel array 103. This can reduce the difference in the slope of the rising and falling of the waveform when comparing the end and center of the pixel array 103. It is possible to increase the on-resistance of only one of the P-type transistor and the N-type transistor. When the on-resistance of the P-type transistor is increased, a slope can be applied to the rising waveform at the end of the pixel array 103. Also, when the on-resistance of the N-type transistor is increased, a slope can be applied to the falling waveform at the end of the pixel array 103.

[0031] (Scanning circuit: control signal for write transistor) 4 shows an example of the configuration of the vertical scanning circuit 104 according to this embodiment. Specifically, this is an example of the configuration for inclining the signal waveform input to the writing transistor 203.

[0032] The vertical scanning circuit 104 includes a writing / emission scanning circuit 301 and a pixel control signal output circuit 302. The writing / emission scanning circuit 301 is provided with an output for each row, and selects writing rows and emission rows in row sequence. The pixel control signal output circuit 302 outputs a writing control signal via a first control line 106 based on the output of the writing / emission scanning circuit 301. The pixel control signal output circuit 302 also outputs an emission control signal via a second control line 107 based on the output of the writing / emission scanning circuit 301. The pixel control signal output circuit 302 includes an output buffer 303 and a resistive element 304. The output buffer 303 buffers signals to be supplied to the first control line 106 and the second control line 107. The resistive element 304 is disposed between the output buffer 303 and the first control line 106.

[0033] By disposing the resistive element 304, it is possible to supply a waveform with a large amount of delay in the rising and falling edges at the ends of the pixel array 103 in advance, compared to the case where the resistive element 304 is not disposed. Therefore, the effect of an increase in the amount of delay caused by an increase in the wiring length L becomes relatively small, and it is possible to suppress changes in the slope of the rising and falling edges of the waveform that occur during the propagation process. Therefore, it is possible to reduce the difference in the slope of the rising and falling edges of the waveform between the ends and the center of the pixel array 103.

[0034] In the above, an example in which the waveform of the control signal input to the writing transistor 203 is inclined has been described, but the present invention may be applied to a configuration in which the waveform of the control signal input to the light emission control transistor 204 is inclined.

[0035] (Scanning circuit: control signal for light emission control transistor) 5 is a diagram showing an example of the configuration of the output buffer 303 according to the present embodiment. Specifically, this is an example of the configuration for inclining the rising edge of the waveform of the control signal input to the light emission control transistor 204.

[0036] 5, output buffer 303 is made up of a two-stage inverter, and is composed of P-type transistors 401, 403 and N-type transistors 402, 404. The sources of P-type transistors 401, 403 are connected to a third power supply 405 (hereinafter, DVDD). The sources of N-type transistors 402, 404 are connected to a fourth power supply 405 (hereinafter, DVSS). An output terminal 407 receives the output signal of output buffer 302 and is connected to the drain of P-type transistor 403 and the drain of N-type transistor 404.

[0037] The P-type transistor 403 is designed to have a larger on-resistance than the N-type transistor 404. In general, the mobility of holes is lower than that of electrons, so that, for example, if the transistor size is the same, the driving capability of the P-type transistor is smaller than that of the N-type transistor, and the on-resistance is larger. Here, the size of a transistor is expressed as the ratio of the channel width W to the channel length L, W / L. For example, the channel length and channel width of the P-type transistor are Lp and Wp, respectively, and the channel length and channel width of the N-type transistor are Ln and Wn. In this case, in order to make the on-resistance of the P-type transistor 403 larger than that of the N-type transistor 404, it is sufficient that Wn / Ln is at least equal to or larger than Wp / Lp. Also, the resistance from the drain to the output terminal 407 of the P-type transistor 404 may be made higher than that of the N-type transistor 403, thereby making the resistance of the P-type transistor larger than that of the N-type transistor.

[0038] By making the on-resistance of P-type transistor 403 larger than that of N-type transistor 404, the rising slope of the control signal can be made gentler than the falling slope.

[0039] In the above, an example has been described in which the waveform of the control signal input to the light emission control transistor 204 is inclined, but the present invention may be applied to a configuration in which the waveform of the control signal input to the writing transistor 203 is inclined.

[0040] (Timing diagram) The circuit operation of the light emitting device 101 according to the first embodiment will be described with reference to the timing diagram of Fig. 6. The timing diagram of Fig. 6 shows the write control signal PSEL and the light emission control signal PSW at the end and center of the pixel array section 103. As described above, the center refers to the control signal for the pixel that is the furthest away from the vertical scanning circuit 106.

[0041] In the following, the period from time t1 to time t12 is a non-light emitting period, and the period from time t12 onwards is a light emitting period.

[0042] (Emission period of previous frame) The period before time t1 is the light emission period of the previous horizontal scanning period of the organic light emitting element 201. During the light emission period, the light emission control transistor 204 is in the ON state, and the writing transistor 203 is in the OFF state.

[0043] (No light emission period of the current frame) A new horizontal scanning period begins from time t1. At time t1, the light emission control signal PSW at the end of the pixel array 103 transitions from low to high, causing the light emission control transistor 204 at the end of the pixel array 103 to turn off. Therefore, no current is supplied from PVDD 207 to the organic light emitting element 201 via the light emission control transistor 204 and the drive transistor 202, and the organic light emitting element 201 goes into a non-emitting state. After a certain time has elapsed from time t1, the signal voltage of the signal line 108 switches from Vsig to a threshold correction voltage (hereinafter, Vofs).

[0044] At time t2, the write control signal PSEL at the end of the pixel array 103 transitions from High to Low, turning on the write transistor 203 at the end of the pixel array 103. As a result, Vofs of the signal line 108 is written to the gate of the drive transistor 202. In addition, since the light emission control transistor 204 maintains the off state, the source voltage of the drive transistor 202 is in a floating state. Therefore, the source voltage of the drive transistor 202 is affected by the capacitive coupling between the gate and source of the drive transistor 202, and the potential fluctuates in the same direction as the fluctuation of the gate potential so as to follow it.

[0045] (Reset period) At time t3, the emission control signal PSW at the end of the pixel array 103 transitions from High to Low, and the emission control transistor 204 at the end of the pixel array 103 is turned on. As a result, the source of the drive transistor 202 has a voltage substantially equal to PVDD 207. At this time, the gate potential of the drive transistor 202 is set to Vofs, and the source potential is set to PVDD. This operation is an initialization operation, which is a reset period. During the reset period, a current is supplied from PVDD 207 to the organic light emitting element 201 via the emission control transistor 204 and the drive transistor 202, and the anode of the organic light emitting element 201 is charged, so that the anode potential (hereinafter, Vel) increases. At this time, Vel is preferably a potential less than the emission threshold of the organic light emitting element 201, but this is not the case when the reset period is sufficiently short, since the amount of light emission is also sufficiently small. Note that a switching transistor may be provided between the organic light emitting element 201 and the drive transistor 202, and a current may be discharged to a predetermined power line via the switching transistor during the reset period.

[0046] At time t4, the light emission control signal PSW in the central portion of the pixel array 103 transitions from High to Low, causing the light emission control transistor 204 in the central portion of the pixel array 103 to be turned on.

[0047] At times t3 and t4, when attention is paid to the waveform of the light emission control signal PSW, the signal delay is greater and the falling slope is gentler in the center of the pixel array compared to the ends of the pixel array 103. This is because no means for imparting a slope to the falling edge of the signal is provided at the ends of the pixel array 103. In other words, the relative effect on the delay due to the wiring resistance and parasitic capacitance of the scanning lines is greater in the center compared to the ends of the pixel array 103, and the change in the falling slope is greater in the center compared to the ends of the pixel array 103.

[0048] (Start of threshold correction period) At time t5, the light emission control signal PSW at the end of the pixel array 103 transitions from low to high, turning off the light emission control transistor 204 at the end of the pixel array 103. This causes the source potential (hereinafter, Vs) of the driving transistor 202 to change to Vs=Vofs-Vth, which is the difference voltage between Vofs and the threshold voltage (hereinafter, Vth) of the driving transistor 202. Since the gate voltage (hereinafter, Vg) of the driving transistor 202 is Vg=Vofs, Vth is held in the first capacitance element 205.

[0049] At time t6, the light emission control signal PSW in the central portion of the pixel array 103 transitions from Low to High, causing the light emission control transistor 204 in the central portion of the pixel array 103 to be turned off.

[0050] Comparing the waveforms of the light emission control signal PSW at time t5 and time t6, it can be seen that there is almost no change in the slope of the rising edge at the center compared to the ends of the pixel array 103. This is because the rising edge of the light emission control signal PSW is supplied to the scanning line with a gentle slope in advance at the ends of the pixel array 103. In other words, the relative effect on the delay amount due to the wiring resistance and parasitic capacitance of the scanning line is smaller at the center compared to the ends of the pixel array 103, and the change in the slope of the rising edge is smaller at the center compared to the ends of the pixel array 103.

[0051] (End of threshold correction period) At time t7, the write control signal PSEL at the end of the pixel array 103 transitions from Low to High, causing the write transistor 203 at the end of the pixel array 103 to be turned off.

[0052] The period from time t5 to time t7 is a threshold correction period at the end of the pixel array 103. The light emission control transistor 204 and the first capacitor element 205 function as a threshold correction unit that compensates for the threshold voltage Vth of the drive transistor 202.

[0053] At time t8, the write control signal PSEL in the central portion of the pixel array 103 transitions from Low to High, causing the write transistor 203 in the central portion of the pixel array 103 to be turned off.

[0054] The period from time t6 to time t8 is a threshold correction period for the central portion of the pixel array 103.

[0055] Comparing the waveforms of the write control signal PSEL at time t7 and time t8, it can be seen that there is almost no change in the slope of the rising edge at the center compared to the ends of the pixel array 103. This is because the write signal PSEL is supplied to the scanning line with a slope applied to the rising edge waveform at the ends of the pixel array 103. In other words, the relative effect on the delay amount due to the wiring resistance and parasitic capacitance of the scanning line is smaller at the center compared to the ends of the pixel array 103, and the change in the slope of the rising edge is smaller at the center compared to the ends of the pixel array 103.

[0056] In this way, by reducing the difference in the slope of the rising edge of the waveform between the end and center of the pixel array 103, the difference in time until the transistors constituting the pixels 102 are turned off can be reduced between the end and center of the pixel array 103. Therefore, the difference between the end and center of the "threshold correction period", which is the period from when the light emission control transistor is turned off to when the write control transistor is turned off, can be reduced. Therefore, the difference in the gate-source voltage of the drive transistor 202 between the end and center of the pixel array 103 can be reduced. Therefore, it is possible to realize uniform light emission of the organic light emitting element 201 and to suppress the occurrence of luminance shading in the horizontal direction.

[0057] (signal writing period) After a certain period of time has elapsed from time t8, the signal voltage of the signal line 108 switches from Vofs to Vsig.

[0058] At time t9, the write control signal PSEL at the end of the pixel array 103 transitions from High to Low, turning on the write transistor 203 at the end of the pixel array 103. As a result, Vsig of the signal line 108 is written to the gate of the drive transistor 202. In addition, since the source voltage of the drive transistor 202 is in a floating state, it is affected by capacitive coupling between the gate and source of the drive transistor 202, and the potential fluctuates in the same direction as the fluctuation of the gate potential. The source voltage Vs of the drive transistor 202 is Vs=Vofs-Vth+ΔVs, where ΔVs is the amount of change. At time t10, the write control signal PSEL at the end of the pixel array 103 transitions from Low to High, turning off the write transistor 203 at the end of the pixel array 103.

[0059] The period from time t9 to time t10 is a signal writing period in which the gate voltage of the driving transistor 202 at the end of the pixel array 103 is set to the signal voltage Vsig.

[0060] At time t11, the write control signal PSEL in the central portion of the pixel array 103 transitions from Low to High, causing the write transistor 203 in the central portion of the pixel array 103 to be turned off.

[0061] Comparing the waveforms of the write control signal PSEL at time t10 and time t11, it can be seen that there is almost no change in the rising slope at the center of the pixel array 103 compared to the ends of the pixel array 103.

[0062] When the write transistor 203 is turned off, the charge induced in the inversion layer immediately below the channel of the write transistor 203 is distributed to the source and drain of the write transistor 203. As a result, the potential of the gate of the drive transistor 202 connected to the drain of the write transistor 203 fluctuates. This is a phenomenon called charge injection. The amount of fluctuation in the gate potential of the drive transistor 202 due to charge injection varies depending on the rising waveform of the write control signal PSEL. Therefore, by suppressing the difference in the slope of the rising edge of the write control signal at the end and center of the pixel array 103, the difference in the gate-source voltage of the drive transistor 202 due to charge injection can be suppressed. This makes it possible to realize uniform light emission of the organic light emitting element 201 and suppress the occurrence of shading in the horizontal direction.

[0063] (Light emission period of the current frame) At time t12, the emission control signal PSW at the end of the pixel array 103 transitions from High to Low, and the emission control transistor 204 at the end of the pixel array 103 is turned on. At this time, the source voltage of the driving transistor 202 becomes a voltage substantially equal to PVDD 207. Then, a current is supplied from PVDD 207 to the organic light emitting element 201 via the emission control transistor 204 and the driving transistor 202, and the organic light emitting element 201 emits light. In addition, the gate voltage of the driving transistor 202 changes due to the influence of capacitive coupling between the gate and source and between the gate and drain. The gate voltage Vg of the driving transistor 202 is Vg=Vsig+ΔVg, where the amount of change is ΔVg.

[0064] At time t13, the light emission control signal PSW in the central portion of the pixel array 103 transitions from High to Low, causing the light emission control transistor 204 in the central portion of the pixel array 103 to be turned on.

[0065] Comparing the waveforms of the light emission control signal PSW at time t12 and time t13, it can be seen that the falling slope is greater and gentler in the center than at the ends of the pixel array 103. By making the falling slope of the light emission control signal more gentle in the center than at the ends of the pixel array 103, it is possible to shift the timing at which the light emission control transistor 204 is turned on.

[0066] (Effect of this embodiment: Suppression of variation in threshold correction period) In this embodiment, the on-resistance of the P-type transistor is made higher than that of the resistor element 304 and the N-type transistor arranged between the output buffer 303 and the first control line 106. Therefore, at the end of the pixel array unit 103, the write control signal PSEL and the light emission control signal PSW are supplied to the scanning line with a slope applied to their rising waveforms. As a result, the difference in the rising edges of the write control signal PSEL and the light emission control signal PSW between the end and center of the pixel array unit 103 is suppressed. This makes it possible to suppress the difference in the threshold correction period between the end and center of the pixel array unit 103, making it possible to realize uniform light emission of the organic light emitting element 201 and suppress the occurrence of shading in the horizontal direction.

[0067] In light-emitting devices, the on-resistance of transistors, resistance elements, wiring resistance of scanning lines, and parasitic capacitance may differ from one light-emitting device to another due to manufacturing variations. When the slope of the rising and falling edges of the write control signal is optimally set to align the threshold correction period between the end and center of the pixel array 103, the threshold correction period will vary. Therefore, the resistance element 304 may be provided with a plurality of elements with different resistance values, so that a certain resistance value can be selected from the plurality of resistance values.

[0068] As described above, according to the light emitting device 101 of the first embodiment, the resistive element 304 is disposed between the output buffer 303 and the first control line 106, thereby providing a slope to the write control signal at the end of the pixel array 103. This reduces the difference in time until the write control transistor is turned off at the end and the center of the pixel array 103. In addition, the on-resistance of the P-type transistor 403 of the output buffer 303 is increased, thereby providing a slope to the light emission control signal at the end of the pixel array 103. This reduces the difference in time until the light emission control transistor is turned off at the end and the center of the pixel array 103. This makes it possible to reduce the difference in the threshold correction period from when the light emission control transistor is turned off to when the write control transistor is turned off at the end and the center of the pixel array 103, thereby reducing the occurrence of luminance shading in the horizontal direction.

[0069] Incidentally, at the start of the light emission period, the moment the light emission control transistor 204 turns on, a charge is supplied to the parasitic capacitance of the anode of the organic light emitting element 201. For this reason, there is a possibility that a current larger than that in the steady light emission state of the organic light emitting element 201 flows instantaneously from the PVDD to the anode of the organic light emitting element 201. Therefore, by shifting the timing at which the light emission control transistor 204 turns on, the timing at which a large current flows instantaneously can be distributed for each pixel. By distributing the current, it is possible to reduce the voltage drop of the PVDD, and it is possible to suppress the difference in the light emission luminance of the organic light emitting element 201 at the moment the light emission control transistor 204 turns on between the end and the center of the pixel array 103. That is, based on this viewpoint, it is better to shift the timing at which the light emission control transistor turns on from the end to the center of the pixel array 103 by changing the slope of the fall of the light emission control signal more at the center than at the end of the pixel array 103. For this reason, since it is better not to actively incline the falling signal that turns on the light emission control transistor 204, the above embodiment employs a configuration in which only the rising signal is delayed. With this configuration, it is possible to suppress the effect on image quality caused by the momentary IR drop of PVDD when the organic light emitting element 201 turns on.

[0070] (Embodiment 2) The circuit operation of the light emitting device 101 according to the third embodiment will be described with reference to the timing chart of Fig. 7. The first embodiment is different in that no means is provided for inclining the falling edge of the light emission control signal PSW, whereas the present embodiment is provided with a means for inclining the falling edge of the light emission control signal PSW.

[0071] At time t12, the light emission control signal PSW at the end of the pixel array 103 transitions from High to Low, turning on the light emission control transistor 204 at the end of the pixel array 103 and starting the light emission period.

[0072] At time t13, the light emission control signal PSW in the central portion of the pixel array 103 transitions from High to Low, turning on the light emission control transistor 204 in the central portion of the pixel array 103 and starting a light emission period.

[0073] If the start timing of the light emission period differs significantly between the edge and center of the pixel array, it may not be possible to ensure uniformity in the screen between the edge and center. Therefore, in this embodiment, a means is provided for imparting a slope to the falling edge of the light emission control signal PSW.

[0074] For example, by providing a resistive element 304 after the output buffer 303 in the control signal output circuit 302 in FIG. 4, it is possible to provide slopes to both the rising and falling edges of the light emission control signal PSW.

[0075] In this way, by reducing the difference in the slope of the falling edge of the waveform of the light emission control signal PSW at the ends and center of the pixel array 103, it is possible to prevent the start timing of the light emission period from differing significantly between the ends and center of the pixel array 103.

[0076] (Embodiment 3) A light emitting device 101 according to the third embodiment will be described with reference to Fig. 8. In the first embodiment, an example was described in which a transistor constituting a buffer in the vertical scanning circuit 104 is used to incline the waveform, but this embodiment is a modified example. Specifically, a configuration will be described in which a resistive element 601 is disposed between the P-type transistor 403 of the output buffer 303 and the output terminal 602, so that a control signal is supplied to a scanning line with a rising waveform having an incline.

[0077] FIG. 8 is a diagram showing an example of the configuration of the output buffer 303 according to this embodiment. The resistive element 601 is disposed between the P-type transistor 403 and the output terminal 602. The output terminal 602 is supplied with an output signal from the output buffer 302. By disposing the resistive element 601, it is possible to supply a waveform with a large amount of delay in the rising edge at the end of the pixel array 103 in advance, compared to the case where the resistive element 601 is not disposed. Therefore, the influence of the increase in the amount of delay due to the increase in the wiring length L becomes relatively small, and it is possible to suppress the change in the slope of the rising edge of the waveform that occurs during the propagation process. Therefore, it is possible to reduce the difference in the rising edge of the waveform between the end and center of the pixel array 103.

[0078] In a light emitting device, the driving force of the output buffer 303, the resistive element 601, and the load resistance and load capacitance of the scanning line may differ from one light emitting device to another due to manufacturing variations. Even if the slope of the rising and falling edges of the write control signal is optimally set to align the threshold correction period between the end and center of the pixel array 103, the threshold correction period will vary. Therefore, the resistive element 601 may be provided with a plurality of elements with different resistance values ​​so that a certain resistance value can be selected from the plurality of resistance values.

[0079] By supplying the light emission control signal to the scanning line with a slope applied to the rising waveform, it is possible to suppress changes in the slope of the rising waveform that occur during the signal propagation process. This makes it possible to suppress the difference in the slope of the rising edge of the light emission control signal between the end and center of the pixel array 103. This makes it possible to suppress the difference in the period from the rising edge of the light emission control signal to the rising edge of the write control signal, that is, the difference in the threshold correction period, between the end and center of the pixel array 103. This makes it possible to suppress the difference in the gate-source voltage of the drive transistor 202 between the end and center of the pixel array 103, thereby achieving uniform light emission of the organic light emitting element 201.

[0080] 8, if a resistive element 601 is placed between the N-type transistor 404 and the output terminal 602, a slope can be imparted to the falling waveform of the light emission control signal. This makes it possible to prevent the start timing of the light emission period from differing greatly between the end and center of the pixel array 103.

[0081] (Modification) As described above, the case where the driving transistor is connected to the anode of the organic light-emitting element and all the transistors are P-type transistors has been described, but the light-emitting device according to this embodiment is not limited to this. The polarity and conductivity type may all be reversed. In addition, the driving transistor may be a P-type transistor and the other transistors may be N-type transistors, and the supplied potential and connection may be changed appropriately according to the conductivity type and polarity.

[0082] (Embodiment 4) In this embodiment, an example of a display device having an organic light-emitting element and a transistor connected to the organic light-emitting element is shown. The transistor is an example of an active element. In the following, a thin film transistor (TFT) is described as the transistor, but a MOS transistor may also be used.

[0083] 9(a) is an example of a pixel that is a component of the display device according to this embodiment. The pixel has a sub-pixel 10. The sub-pixels are divided into 10R, 10G, and 10B according to their light emission. The emitted color may be distinguished by the wavelength emitted from the light-emitting layer, or the light emitted from the sub-pixel may be selectively transmitted or color-converted by a color filter or the like. Each sub-pixel has a reflective electrode 2 that is a first electrode on an interlayer insulating layer 1, an insulating layer 3 that covers the edge of the reflective electrode 2, an organic compound layer 4 that covers the first electrode and the insulating layer, a second electrode 5 (transparent electrode 5), a protective layer 6, and a color filter 7.

[0084] A transistor and a capacitor may be disposed below or inside the interlayer insulating layer 1. The transistor and the first electrode may be electrically connected via a contact hole or the like (not shown).

[0085] The insulating layer 3 is also called a bank or a pixel separation film. It covers the edge of the first electrode and is disposed so as to surround the first electrode. The part where the insulating layer is not disposed contacts the organic compound layer 4 and becomes a light-emitting region.

[0086] The organic compound layer 4 has a hole injection layer 41 , a hole transport layer 42 , a first light emitting layer 43 , a second light emitting layer 44 , and an electron transport layer 45 .

[0087] The second electrode 5 may be a transparent electrode, a reflective electrode, or a semi-transparent electrode.

[0088] The protective layer 6 reduces the penetration of moisture into the organic compound layer. Although the protective layer is illustrated as being a single layer, it may be a multi-layer. Each layer may be an inorganic compound layer and an organic compound layer.

[0089] The color filters 7 are divided into 7R, 7G, and 7B according to their colors. The color filters may be formed on a planarization film (not shown). A resin protective layer (not shown) may be provided on the color filters. The color filters may be formed on a protective layer 6. Alternatively, the color filters may be provided on an opposing substrate such as a glass substrate and then bonded to each other.

[0090] The display device 100 in FIG. 9(b) includes an organic light-emitting element 26 and a TFT 18 as an example of a transistor. A substrate 11 made of glass, silicon, or the like is provided with an insulating layer 12 on the substrate. An active element 18 such as a TFT is disposed on the insulating layer, and a gate electrode 13, a gate insulating film 14, and a semiconductor layer 15 of the active element are disposed on the insulating layer. The TFT 18 also includes the semiconductor layer 15, a drain electrode 16, and a source electrode 17. An insulating film 19 is disposed on the upper portion of the TFT 18. An anode 21 constituting the organic light-emitting element 26 and the source electrode 17 are connected via a contact hole 20 provided in the insulating film.

[0091] The electrical connection between the electrodes (anode, cathode) included in the organic light-emitting element 26 and the electrodes (source electrode, drain electrode) included in the TFT is not limited to the embodiment shown in Fig. 9(b). In other words, it is sufficient that either the anode or the cathode is electrically connected to either the TFT source electrode or the drain electrode. TFT stands for thin film transistor.

[0092] 9(b), the organic compound layer 22 is illustrated as a single layer, but may be a multi-layer organic compound layer 22. A first protective layer 24 and a second protective layer 25 are provided on the cathode 23 to reduce deterioration of the organic light-emitting element.

[0093] In the display device 100 of FIG. 9(b), transistors are used as switching elements, but other switching elements may be used instead.

[0094] The transistor used in the display device 100 of Fig. 9(b) is not limited to a transistor using a single crystal silicon wafer, but may be a thin film transistor having an active layer on an insulating surface of a substrate. Examples of the active layer include single crystal silicon, amorphous silicon, non-single crystal silicon such as microcrystalline silicon, and non-single crystal oxide semiconductors such as indium zinc oxide and indium gallium zinc oxide. Thin film transistors are also called TFT elements.

[0095] The transistors included in the display device 100 of Fig. 9(b) may be formed in a substrate such as a Si substrate, that is, may be MOS transistors.

[0096] The organic light-emitting element according to this embodiment has its light emission brightness controlled by a TFT, which is an example of a switching element, and by providing the organic light-emitting element on a plurality of surfaces, an image can be displayed based on the respective light emission brightnesses. The switching element according to this embodiment is not limited to a TFT, and may be a transistor formed of low-temperature polysilicon, or an active matrix driver formed on a substrate such as a Si substrate. On the substrate may also be within the substrate. Whether to provide a transistor within the substrate or to use a TFT is selected according to the size of the display unit. For example, if the size is about 0.5 inches, it is preferable to provide the organic light-emitting element on a Si substrate.

[0097] (Embodiment 5) 10 is a schematic diagram showing an example of a display device according to this embodiment. The display device 1000 may have a touch panel 1003, a display panel 1005, a frame 1006, a circuit board 1007, and a battery 1008 between an upper cover 1001 and a lower cover 1009. Flexible printed circuits FPC1002 and 1004 are connected to the touch panel 1003 and the display panel 1005. A transistor is printed on the circuit board 1007. The battery 1008 may not be provided if the display device is not a portable device, and may be provided in a different position even if the display device is a portable device.

[0098] The display device according to this embodiment may have color filters having red, green, and blue colors, the red, green, and blue colors being arranged in a delta arrangement.

[0099] The display device according to the present embodiment may be used as a display unit of a mobile terminal. In this case, the display device may have both a display function and an operation function. Examples of the mobile terminal include mobile phones such as smartphones, tablets, and head-mounted displays.

[0100] The display device according to the present embodiment may be used as a display unit of an imaging device having an optical unit with a plurality of lenses and an imaging element that receives light that has passed through the optical unit. The imaging device may have a display unit that displays information acquired by the imaging element. The display unit may be a display unit exposed to the outside of the imaging device, or may be a display unit disposed within a viewfinder. The imaging device may be a digital camera or a digital video camera.

[0101] (Embodiment 6) 11(a) is a schematic diagram showing an example of an imaging device according to this embodiment. The imaging device 1100 may have a viewfinder 1101, a rear display 1102, an operation unit 1103, and a housing 1104. The viewfinder 1101 may have a display device according to this embodiment. In this case, the display device may display not only an image to be captured, but also environmental information, imaging instructions, and the like. The environmental information may include the intensity of external light, the direction of external light, the moving speed of the subject, the possibility that the subject will be blocked by an obstruction, and the like.

[0102] Since the timing suitable for imaging is short, it is better to display information as soon as possible. Therefore, it is preferable to use a display device using the organic light-emitting element of the present invention. This is because the organic light-emitting element has a fast response speed. A display device using an organic light-emitting element can be used more preferably than a liquid crystal display device, which requires a high display speed.

[0103] The imaging device 1100 has an optical section (not shown). The optical section has a plurality of lenses, which form an image on an imaging element housed in a housing 1104. The focus of the plurality of lenses can be adjusted by adjusting their relative positions. This operation can also be performed automatically. The imaging device may be called a photoelectric conversion device. The photoelectric conversion device can include an imaging method that does not capture images sequentially, but detects the difference from the previous image, cuts out an image from an image that is always recorded, and the like.

[0104] FIG. 11(b) is a schematic diagram showing an example of an electronic device according to this embodiment. The electronic device 1200 has a display unit 1201, an operation unit 1202, and a housing 1203. The housing 1203 may have a circuit, a printed circuit board having the circuit, a battery, and a communication unit. The operation unit 1202 may be a button or a touch panel type reaction unit. The operation unit may be a biometric recognition unit that recognizes a fingerprint and performs unlocking or the like. An electronic device having a communication unit can also be called a communication device. The electronic device may further have a camera function by including a lens and an image sensor. An image captured by the camera function is displayed on the display unit. Examples of the electronic device include a smartphone and a notebook computer.

[0105] (Embodiment 7) Fig. 12 is a schematic diagram showing an example of a display device according to this embodiment. Fig. 12(a) shows a display device such as a television monitor or a PC monitor. The display device 1300 has a frame 1301 and a display unit 1302. The light-emitting device according to this embodiment may be used for the display unit 1302.

[0106] It has a frame 1301 and a base 1303 that supports a display unit 1302. The base 1303 is not limited to the form shown in Fig. 12(a). The lower side of the frame 1301 may also serve as the base.

[0107] The frame 1301 and the display unit 1302 may be curved. The radius of curvature may be 5000 mm or more and 6000 mm or less.

[0108] FIG. 12(b) is a schematic diagram showing another example of the display device according to the present embodiment. The display device 1310 of FIG. 12(b) is configured to be bendable, and is a so-called foldable display device. The display device 1310 has a first display unit 1311, a second display unit 1312, a housing 1313, and a bending point 1314. The first display unit 1311 and the second display unit 1312 may have the light-emitting device according to the present embodiment. The first display unit 1311 and the second display unit 1312 may be one display unit without a joint. The first display unit 1311 and the second display unit 1312 can be separated at the bending point. The first display unit 1311 and the second display unit 1312 may display different images, or the first and second display units may display one image.

[0109] (Embodiment 8) FIG. 13(a) is a schematic diagram showing an example of a lighting device according to the present embodiment. The lighting device 1400 may have a housing 1401, a light source 1402, a circuit board 1403, an optical film 1404, and a light diffusion unit 1405. The light source may have an organic light-emitting element according to the present embodiment. The optical filter may be a filter that improves the color rendering of the light source. The light diffusion unit can effectively diffuse the light of the light source, such as for lighting up, and deliver the light over a wide range. The optical filter and the light diffusion unit may be provided on the light emission side of the lighting. If necessary, a cover may be provided on the outermost part.

[0110] The lighting device is, for example, a device that illuminates a room. The lighting device may emit white light, neutral white light, or any other color from blue to red. It may have a dimming circuit that adjusts the light intensity. The lighting device may have the organic light-emitting element of the present invention and a power supply circuit connected thereto. The power supply circuit is a circuit that converts AC voltage into DC voltage. Moreover, white has a color temperature of 4200K, and neutral white has a color temperature of 5000K. The lighting device may have a color filter.

[0111] The lighting device according to the present embodiment may also include a heat dissipation section that dissipates heat from within the device to the outside, and examples of the heat dissipation section include metals with high specific heat, liquid silicon, and the like.

[0112] Fig. 13(b) is a schematic diagram of an automobile, which is an example of a moving body according to this embodiment. The automobile has tail lamps, which are an example of a lamp. The automobile 1500 has tail lamps 1501, and may be configured to turn on the tail lamps when braking or the like is performed.

[0113] A tail lamp 1501 may have an organic light-emitting element according to this embodiment. The tail lamp may have a protective member for protecting the organic EL element. The protective member may be made of any material as long as it has a certain degree of strength and is transparent, but is preferably made of polycarbonate or the like. Polycarbonate may be mixed with a furandicarboxylic acid derivative, an acrylonitrile derivative, or the like.

[0114] The automobile 1500 may have a body 1503 and a window 1502 attached thereto. The window may be a transparent display as long as it is not a window for checking the front and rear of the automobile. The transparent display may have an organic light-emitting element according to this embodiment. In this case, the constituent materials of the electrodes and the like of the organic light-emitting element are made of transparent members.

[0115] The moving body according to the present embodiment may be a ship, an aircraft, a drone, or the like. The moving body may have a body and a lamp provided on the body. The lamp may emit light to indicate the position of the body. The lamp has the organic light-emitting element according to the present embodiment.

[0116] (Embodiment 9) An application example of the display device of each of the above-mentioned embodiments will be described with reference to Fig. 14. The display device can be applied to a system that can be worn as a wearable device such as smart glasses, HMD, and smart contacts. An image capturing and display device used in such an application example has an image capturing device capable of photoelectrically converting visible light, and a display device capable of emitting visible light.

[0117] 14(a) illustrates glasses 1600 (smart glasses) according to one application example. An imaging device 1602 such as a CMOS sensor or a SPAD is provided on the front side of a lens 1601 of the glasses 1600. In addition, a display device according to each of the above-mentioned embodiments is provided on the back side of the lens 1601.

[0118] The glasses 1600 further include a control device 1603. The control device 1603 functions as a power source that supplies power to the image capture device 1602 and the display device according to each embodiment. The control device 1603 also controls the operations of the image capture device 1602 and the display device. The lens 1601 is formed with an optical system for focusing light on the image capture device 1602.

[0119] FIG. 14(b) illustrates glasses 1610 (smart glasses) according to one application example. The glasses 1610 have a control device 1612, and the control device 1612 is equipped with an imaging device corresponding to the imaging device 1602 and a display device. The lens 1611 is formed with an optical system for projecting light emitted from the imaging device in the control device 1612 and the display device, and an image is projected onto the lens 1611. The control device 1612 functions as a power source for supplying power to the imaging device and the display device, and controls the operation of the imaging device and the display device. The control device may have a line-of-sight detection unit that detects the line of sight of the wearer. Infrared light may be used for detecting the line of sight. The infrared light emitting unit emits infrared light toward the eyeball of a user gazing at a display image. An imaging unit having a light receiving element detects the reflected light of the emitted infrared light from the eyeball, thereby obtaining an image of the eyeball. By having a reduction means for reducing light from the infrared light emitting unit to the display unit in a planar view, deterioration of image quality is reduced.

[0120] The gaze of the user with respect to the displayed image is detected from an image of the eyeball obtained by capturing infrared light. Any known method can be applied to gaze detection using the image of the eyeball. As an example, a gaze detection method based on a Purkinje image formed by reflection of irradiated light on the cornea can be used.

[0121] More specifically, the gaze detection process is performed based on the pupil-corneal reflex method. Using the pupil-corneal reflex method, a gaze vector that indicates the direction (rotation angle) of the eyeball is calculated based on the pupil image and the Purkinje image included in the captured image of the eyeball, thereby detecting the user's gaze.

[0122] A display device according to an embodiment of the present invention may have an imaging device having a light receiving element, and may control a display image on the display device based on information about a user's line of sight from the imaging device.

[0123] Specifically, the display device determines a first field of view area to which the user gazes and a second field of view area other than the first field of view area based on the line-of-sight information. The first field of view area and the second field of view area may be determined by a control device of the display device, or may be received from an external control device. In the display area of ​​the display device, the display resolution of the first field of view area may be controlled to be higher than the display resolution of the second field of view area. In other words, the resolution of the second field of view area may be lower than that of the first field of view area.

[0124] The display area includes a first display area and a second display area different from the first display area, and an area having a high priority is determined from the first display area and the second display area based on line-of-sight information. The first field of view area and the second field of view area may be determined by a control device of the display device, or may be determined by an external control device and received. The resolution of the area having a high priority may be controlled to be higher than the resolution of areas other than the area having a high priority. In other words, the resolution of an area having a relatively low priority may be lowered.

[0125] AI may be used to determine the first field of view area and the area with high priority. The AI ​​may be a model configured to estimate the angle of the line of sight and the distance to an object at the end of the line of sight from the image of the eyeball, using the image of the eyeball and the direction in which the eyeball in the image was actually looking as teacher data. The AI ​​program may be included in the display device, the imaging device, or an external device. If included in the external device, it is transmitted to the display device via communication.

[0126] When display control is performed based on visual recognition detection, the present invention is preferably applicable to smart glasses that further include an imaging device for capturing images of the outside world. The smart glasses can display captured outside information in real time.

[0127] (others) The elements of the above-described embodiments can be interchanged.

[0128] The present disclosure has the following configuration.

[0129] (Configuration 1) A light-emitting device having a plurality of light-emitting elements and a plurality of pixel circuits, Each of the plurality of pixel circuits A driving transistor that drives the light-emitting element; a write transistor for writing a signal to a gate of the drive transistor; a light-emitting control transistor that controls a connection between the gate of the drive transistor and a power source, a first control line for controlling the write transistor; a second control line for controlling the light emission control transistor; and a means for tilting the signal waveform of the second control line.

[0130] (Configuration 2) 2. The light emitting device according to configuration 1, wherein the means for inclining the signal waveform of the second control line inclines a waveform that turns off the light emission control transistor.

[0131] (Configuration 3) 2. The light emitting device according to configuration 1, wherein the means for inclining the signal waveform of the second control line inclines a waveform that turns on the light emission control transistor.

[0132] (Configuration 4) The first control line further includes a means for tilting a signal waveform of the first control line, 4. The light emitting device according to any one of configurations 1 to 3, wherein the means for tilting the signal waveform of the first control line tilts the waveform that turns off the write transistor.

[0133] (Configuration 5) At a first time, while maintaining the writing transistor in an on state, the light emission control transistor is turned on; At a second time later than the first time, while maintaining the writing transistor in an on state, the light emission control transistor is turned off; 5. The light emitting device according to configuration 4, wherein, at a third time point that is later than the second time point, the light emission control transistor is maintained in an off state, and the writing transistor is turned off.

[0134] (Configuration 6) A light-emitting device described in any one of configurations 1 to 5, wherein the means for inclining the signal waveform of the second control line makes the slope of the waveform that turns the light-emitting control transistor to an off state gentler than the slope of the waveform that turns the light-emitting control transistor to an on state.

[0135] (Configuration 7) 5. The light emitting device according to configuration 4, wherein the means for inclining the signal waveform of the first control line inclines a waveform that turns on the write transistor.

[0136] (Configuration 8) a scanning circuit that supplies signals to the first control line and the second control line; 8. The light emitting device according to any one of configurations 1 to 7, wherein the scanning circuit is provided with a buffer that outputs the signal.

[0137] (Configuration 9) Further comprising a resistive element provided in a stage subsequent to the buffer, 9. The light emitting device according to configuration 8, wherein the resistive element is a means for tilting the signal waveform of the second control line.

[0138] (Configuration 10) Further comprising a resistive element provided in a stage subsequent to the buffer, 9. The light emitting device according to configuration 8, wherein the resistive element is a means for tilting the signal waveform of the first control line.

[0139] (Configuration 11) the buffer comprises an inverter having a transistor of a first conductivity type and a transistor of a second conductivity type different from the first conductivity type; 9. The light emitting device according to configuration 8, wherein an on-resistance of the first conductivity type transistor is different from an on-resistance of the second conductivity type transistor.

[0140] (Configuration 12) the first conductivity type transistor is a P-type transistor, the second conductivity type transistor is an N-type transistor, 12. The light emitting device according to configuration 11, wherein an on-resistance of the first conductivity type transistor is higher than an on-resistance of the second conductivity type transistor.

[0141] (Configuration 13) an optical unit having a plurality of lenses, an image sensor that receives light that has passed through the optical unit, and a display unit that displays an image captured by the image sensor; The display unit is a photoelectric conversion device having the light-emitting device according to any one of the first to second aspects.

[0142] (Configuration 14) 13. An electronic device comprising: a display unit having the light-emitting device according to any one of configurations 1 to 12; a housing in which the display unit is provided; and a communication unit provided in the housing for communicating with the outside.

[0143] (Configuration 15) 13. An illumination device comprising: a light source having the light-emitting device according to any one of configurations 1 to 12; and a light diffusion section or optical film that transmits light emitted by the light source.

[0144] (Configuration 16) A moving body comprising: a lighting fixture having the light-emitting device according to any one of configurations 1 to 12; and a body on which the lighting fixture is provided. [Explanation of symbols]

[0145] 101 Light emitting device 102 pixels 103 Pixel array section 104 Vertical scanning circuit 105 Signal output circuit 106 First control line 107 Second control line 108 Signal Line 201 Organic light-emitting devices 202 Drive transistor 203 Write transistor 204 Light Emitting Control Transistor 303 Output Buffer 304 Resistance element 403 P-type transistor 405 N-type transistor

Claims

1. A light-emitting device having a plurality of light-emitting elements and a plurality of pixel circuits, Each of the plurality of pixel circuits a driving transistor that drives the light-emitting element; a write transistor that writes a signal to the gate of the drive transistor; a light-emitting control transistor that controls a connection between the gate of the drive transistor and a power supply, a first control line for controlling the write transistor; a second control line for controlling the light-emitting control transistor; means for tilting the signal waveform of the first control line; means for tilting the signal waveform of the second control line; the means for tilting the signal waveform of the first control line tilts the waveform that turns off the write transistor; The light emitting device, wherein the means for tilting the signal waveform of the second control line tilts the waveform that turns off the light emitting control transistor.

2. At a first time, the light-emitting control transistor is turned on while the writing transistor is maintained on; At a second time later than the first time, the light-emitting control transistor is turned off while the writing transistor is maintained in an on state; 2. The light emitting device according to claim 1, wherein, at a third time point that is later than the second time point, the light emitting control transistor is maintained in an off state while the writing transistor is turned off.

3. 2. The light-emitting device according to claim 1, wherein the means for inclining the signal waveform of the second control line makes the slope of the waveform that turns the light-emitting control transistor into an off state gentler than the slope of the waveform that turns the light-emitting control transistor into an on state.

4. a scanning circuit that supplies signals to the first control line and the second control line; The light emitting device according to claim 1 , wherein the scanning circuit is provided with a buffer for outputting the signal.

5. further comprising a resistive element provided in a subsequent stage of the buffer; 5. The light emitting device according to claim 4, wherein the resistive element is a means for tilting the signal waveform of the second control line.

6. further comprising a resistive element provided in a subsequent stage of the buffer; 5. The light emitting device according to claim 4, wherein the resistive element is a means for tilting the signal waveform of the first control line.

7. the buffer comprises an inverter having a transistor of a first conductivity type and a transistor of a second conductivity type different from the first conductivity type; 5. The light emitting device according to claim 4, wherein the on-resistance of the first conductivity type transistor is different from the on-resistance of the second conductivity type transistor.

8. the first conductivity type transistor is a P-type transistor, the second conductivity type transistor is an N-type transistor, 8. The light emitting device according to claim 7, wherein the on-resistance of the first conductivity type transistor is higher than the on-resistance of the second conductivity type transistor.

9. an optical unit having a plurality of lenses, an image pickup element that receives light that has passed through the optical unit, and a display unit that displays an image picked up by the image pickup element; The display unit is a photoelectric conversion device having the light-emitting device according to claim 1 .

10. 9. An electronic device comprising: a display unit having the light-emitting device according to claim 1; a housing in which the display unit is provided; and a communication unit provided in the housing for communicating with an external device.

11. 9. A lighting device comprising: a light source having the light-emitting device according to claim 1; and a light diffusion portion or an optical film that transmits light emitted by the light source.

12. A moving body comprising: a lamp having the light-emitting device according to any one of claims 1 to 8; and a body on which the lamp is provided.

Images