Systems and methods for mitigating wafer bonding tool induced overlay distortion patterns - Patents.com

Abstract

The system includes a wafer shape metrology subsystem configured to perform one or more shape measurements on a post-bonded pair of wafers. The system includes a controller communicatively coupled to the wafer shape metrology subsystem. The controller receives a set of measured distortion patterns. The controller applies a bonder control model to the measured distortion patterns to determine a set of overlay distortion signatures. The bonder control model is comprised of a set of orthogonal wafer signatures that represent achievable adjustments. The controller determines whether the set of overlay distortion signatures associated with the measured distortion patterns are outside of tolerance limits that provide one or more feedback adjustments to the bonder tool.

Description

[Technical field]

[0001] The present invention relates generally to the field of wafer shape metrology, and more particularly to a system and method for modeling and minimizing overlay distortion patterns induced by bonding tools. [Background technology]

[0002] REFERENCE TO RELATED APPLICATIONS This application claims the benefit under 35 U.S.C. §119(e) of U.S. Provisional Application No. 63 / 226,635 (filed July 28, 2021), which is incorporated herein by reference in its entirety.

[0003] It has long been known that bonding tools used in the manufacture of bonded wafer pairs can introduce distortions into the overlay between the features of the various bonded wafers. These distortions in the overlay can lead to reliability concerns over time, or in extreme cases, a lack of electrical continuity. Thus, there is a need for the ability of the bonding tool to provide compensation to minimize distortions in the overlay.

[0004] Traditional methods of controlling the bonding tool to minimize overlay distortion are rapidly becoming outdated as new techniques are developed to adjust the bonding tool, and the models used to adjust the bonding tool can no longer take into account the new ways in which the bonding tool can be adjusted to prevent distortion. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] US Patent Application Publication No. 2015 / 0120216 Summary of the Invention [Problem to be solved by the invention]

[0006] It would therefore be desirable to provide a system and method that addresses the shortcomings of previous approaches identified above. [Means for solving the problem]

[0007] A system is disclosed according to one or more embodiments of the present disclosure. In one embodiment, the system includes a wafer shape metrology subsystem configured to perform one or more shape measurements on two pre-bonding wafers and a corresponding post-bonding pair of wafers. In another embodiment, the system includes a controller communicatively coupled to the wafer shape metrology subsystem, the controller including one or more processors configured to execute a set of program instructions stored in a memory. In another embodiment, the set of program instructions is configured to cause the one or more processors to: receive a set of measured bonding strains; apply a bonder control model to the set of measured bonding strains, the bonder control model associating a set of adjustments of the bonder tool to a set of overlay strain signatures between a first wafer and a second wafer of the bonded wafer pair; determine whether the set of overlay strain signatures associated with the measured bonding strains are outside of tolerance limits; and provide one or more feedback adjustments to the bonder tool to adjust one or more bonder tool adjusters when the set of overlay strain signatures are outside of tolerance limits.

[0008] A method according to one or more embodiments of the present disclosure is disclosed. In one embodiment, for the purpose of calibrating a bonder, the method can include running a set of wafers with a set of known bonder adjustments. Through measurements of pre-bonding and post-bonding wafer shapes, the resulting distortions are extracted. The resulting distortion patterns are stored as numerical vector patterns or described through an analytical description of a vector map. This analytical description can use wafer position as a descriptor. It can also describe actuator-induced distortions in the form of relative modifications of existing patterns. In another embodiment, the method can include applying a bonder control model to the proposed bonder tool adjustments to determine a set of overlay distortion signatures between a first wafer and a second wafer of a bonded wafer pair. The bonder control model is an orthogonal set of wafer signatures that relate a set of adjustments of the bonder tool to a set of overlay distortion signatures between a first wafer and a second wafer of a bonded wafer pair.

[0009] In another embodiment, the method may include determining whether a set of overlay distortion signatures associated with the proposed bonder tool adjustments are outside of acceptable limits. In another embodiment, the method may include providing feedback adjustments to the bonder tool to adjust one or more adjusters of the bonder tool when the set of overlay distortion signatures are outside of acceptable limits.

[0010] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not necessarily restrictive of the invention as claimed. The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the invention and, together with the general description, serve to explain the principles of the invention. [Brief description of the drawings]

[0011] Many advantages of the present disclosure may be better understood by those skilled in the art by reference to the following drawings. [Figure 1A] FIG. 1 illustrates a simplified block diagram of a wafer shape metrology system showing feedback control of a bonding tool in accordance with one or more embodiments of the present disclosure. [Figure 1B] FIG. 1 illustrates a conceptual diagram of a wafer shape metrology system performing wafer shape measurements on a first wafer, a second wafer, and a post-bonding pair wafer in accordance with one or more embodiments of the present disclosure. [Diagram 2] 1 shows a flow diagram illustrating a method for generating a bonder control model in accordance with one or more embodiments of the present disclosure. [Diagram 3] 1 is a flow diagram illustrating a method of utilizing a bonder control model to report feedback to a bonding tool in accordance with one or more embodiments of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] The present disclosure has been specifically shown and described with respect to certain embodiments and certain features thereof. The embodiments described herein are to be construed as illustrative and not restrictive. It should be readily apparent to those skilled in the art that various changes and modifications in form and details may be made without departing from the spirit and scope of the present disclosure. Reference will now be made in detail to the disclosed subject matter, which is illustrated in the accompanying drawings.

[0013] 1-3, systems and methods for mitigating overlay distortion patterns induced by a wafer bonding tool are described in accordance with one or more embodiments of the present disclosure.

[0014] Embodiments of the present disclosure are directed to systems and methods for modeling overlay distortion patterns induced by a bonding tool during bonding of a pair of wafers. Embodiments of the present disclosure may implement a bonder control model to determine whether post-bonding distortion patterns are within an acceptable tolerance level. For example, embodiments of the present disclosure may implement a bonder control model to minimize post-bonding induced distortion patterns. Embodiments of the present disclosure may generate a bonder control model by analyzing overlay distortion patterns from a bonded wafer pair using one or more algorithms. Additional embodiments of the present disclosure may provide feedback to a bonding tool if a given set of distortion patterns is not within an acceptable tolerance range. The feedback to the bonding tool may be in the form of one or more adjustments to one or more adjusters on the bonding tool.

[0015] The embodiments of the present disclosure may be implemented to achieve tight overlay requirements on two wafers after a wafer-to-wafer bonding process (e.g., hybrid or fusion bonding). For example, the embodiments of the present disclosure may be utilized to minimize / mitigate overlay in wafer-to-wafer bonding processes including: image sensor manufacturing (e.g., backlit image sensor technology); 3D NAND technology where a device wafer and a memory wafer are bonded; and backside power rail processes in logic devices where a device wafer is bonded to a carrier wafer. In all these examples, tight overlay tolerance requirements exist. In image sensor and 3D NAND technologies, the overlay requirements are implemented to ensure reliable connection between Cu pads on one wafer and Cu pads on the other wafer for direct electrical connection. In the case of backside power rail technology, it is desirable to achieve low wafer distortion to ensure that subsequent lithography exposure of through silicon vias can achieve the required overlay tolerance given the typical correction capabilities of the scanner (e.g., correction per field (CPE) correction).

[0016] A process for modeling and minimizing the distortion controlled by the bonding tool may include, but is not limited to, i) receiving a set of measured distortion patterns, ii) applying a bonder control model to the measured distortion patterns, iii) determining whether the bonding tool adjustments are within an acceptable tolerance range, and iv) if not, providing a feedback adjustment to the bonding tool, where the adjustment may be used to optimize the bonder settings for subsequent wafers.

[0017] FIG. 1 illustrates a simplified block diagram of a wafer shape metrology system illustrating feedback control of a bonding tool in accordance with one or more embodiments of the present disclosure.

[0018] In an embodiment, the system 100 includes a wafer shape metrology subsystem 102. The system 100 may also include a controller 104 communicatively coupled to a detector output of the wafer shape metrology subsystem 102. The controller 104 may include one or more processors 106 and a memory 108. The one or more processors 106 of the controller 104 may be configured to execute a set of program instructions stored in the memory 108. The set of program instructions may be configured to cause the one or more processors 106 to perform various steps and processes of the present disclosure.

[0019] The wafer shape metrology subsystem 102 may include any wafer metrology tool or system known in the art that may obtain one or more shape parameters from one or more wafers. In an embodiment, the wafer shape metrology subsystem 102 includes an interferometer subsystem configured to perform one or more metrology and / or characterization processes on one or more wafers. For example, the wafer shape metrology subsystem 102 may include a dual interferometer system (e.g., a dual Fizeau interferometer) configured to perform measurements on both sides of the wafer. For example, the wafer shape metrology subsystem 102 may include a first interferometer subsystem 105a configured to generate a first illumination beam 101a to perform one or more measurements on a first surface of the wafer, and a second interferometer subsystem 105b configured to generate a second illumination beam 101b to perform one or more measurements on a second surface of the wafer opposite the first surface. The wafer shape metrology subsystem 102 may include a patterned wafer shape (PWG) tool, such as a PWG tool manufactured by KLA INC. The use of interferometry for wafer characterization is generally described in U.S. Patent No. 6,847,458 (March 20, 2003), filed January 15, 2013; U.S. Patent No. 8,949,057 (October 27, 2011); and U.S. Patent No. 9,121,684, each of which is incorporated by reference in its entirety.

[0020] It is noted that additional or alternative embodiments of the wafer shape metrology subsystem 102 are described in detail in U.S. patent application Ser. No. 17 / 161,369 (Jan. 28, 2021), which is incorporated herein by reference in its entirety.

[0021] It is further noted that the scope of the present disclosure is not limited to PWG-implemented dual interferometer systems, but may be extended to encompass any wafer shape metrology subsystem or tool known in the art, including, but not limited to, single-sided interferometer systems.

[0022] 1B, the wafer shape metrology subsystem 102 can perform (1) shape measurements on a pre-bonding first wafer, (2) shape measurements on a pre-bonding second wafer, and (3) shape measurements on a post-bonding wafer pair. Note that the measurements on the pre-bonded first and second wafers can be used to predict the shape of the post-bonded wafer pair based on the shape mismatch of the first and second wafers and the effect of the bonder and bonding process on the post-bonded pair.

[0023] In an embodiment, the wafer shape metrology subsystem 102 can perform a first shape measurement on the first wafer 110 and then transmit the shape measurement data to the controller 104 via data signal 103a. The wafer shape metrology subsystem 102 can perform a second shape measurement on the second wafer 110 and then transmit the shape measurement data to the controller 104 via data signal 103b. The first wafer 110 and the second wafer 110 can then undergo a bonding process via a bonding tool 112 to form a post-bonded wafer pair 110. The wafer shape metrology subsystem 102 can perform a third shape measurement on the post-bonded wafer pair 110 and then transmit the shape measurement data to the controller 104 via data signal 103c.

[0024] In an embodiment, the bonding tool 112 can include one or more adjusters 114, which correspond to one or more actuators on the bonding tool 112. For example, the bonding tool 112 can include three adjusters 114a, 114b, and 114c, each of which corresponds to a single actuator. In an embodiment, the adjusters 114 can be changed automatically or manually. In some embodiments, the one or more actuators can be controlled heaters to adjust the temperature of one of the wafers relative to the other wafer during the bonding process. For example, one wafer experiences a greater thermal expansion relative to the other wafer, generating a distortion pattern. Similarly, a controlled bow deformation of one of the chucks results in a distortion pattern. The resulting distortion pattern can be modeled using a standard model that describes a vector map using a linear function of the wafer coordinates. In another example, the distortion pattern is generated when the bonding process is initiated by pressing the wafers into contact via pins. The resulting distortion pattern is a distortion pattern that depends on the gap between the wafers, the pressure applied to the pins, and the distance at which the wafers are held. In this case, new modeling patterns need to be applied to generate the adjustments.

[0025] In an embodiment, the controller 104 can generate a bonder control model of the overlay distortion patterns. For example, the controller 104 can determine a set of overlay distortion patterns from a wafer shape metrology subsystem and extract differences in the overlay distortion patterns that correlate to adjustments made with the actuators. The differences in the overlay distortion patterns that correlate with adjustments (i.e., signatures) made with the actuators can be analyzed to generate a set of orthogonal wafer signatures that can be indirectly or directly mapped to the adjusters 114 on the bonding tool 112.

[0026] In an embodiment, the set of orthogonal wafer signatures may be generated using one or more algorithms. In an additional embodiment, the set of orthogonal wafer signatures may be mapped to one or more adjusters 114 on the bonding tool 112. For example, the changes induced by the adjusters may be analyzed using principal component analysis (PCA) to generate an orthogonal set of wafer signatures, and the output of the PCA is a new set of distortion signatures. The set of distortion signatures may capture the observed variations and represent a set of orthogonal signatures, where the signatures represent the bonding tool adjustments. In a further embodiment, the bonding tool adjustments may be mapped to virtual actuators. Additional steps may be required to convert the virtual actuator adjustments to actual actuator adjustments.

[0027] The following example demonstrates the use of one or more algorithms to generate a set of orthogonal wafer signatures. For example, a number of wafer bonding experiments are run, each run representing a specific setting of the bonder actuators. The resulting distortion patterns are measured using wafer profilometry on pre-bonding and post-bonding wafers. The resulting distortion signatures are collected as individual observations and analyzed using principal component analysis (PCA). The output of the PCA is a new set of optimal distortion signatures. In this example, optimal refers to the fact that the distortion signatures capture the observed variations and at the same time represent a set of orthogonal signatures. These signatures represent a combination of the bonder actuators. In an embodiment, the bonder actuators can be "virtual actuators", meaning that they no longer represent the adjustment of a single actuator; rather, they represent the coordinated adjustment of two or more bonder actuators. Thus, an additional step is required to convert the virtual actuator settings into actual actuator adjustments.

[0028] Advantages of the present disclosure include the generation of a set of orthogonal wafer signatures that can be indirectly or directly mapped to the adjusters 114 on the bonding tool 112. The orthogonal set of wafer signatures generates a unique set of bonder tool adjustments, which has been found to be advantageous for advanced process control where results generated from multiple successive lots are averaged to predict new adjustments.

[0029] In an embodiment, the controller 104 can provide one or more control signals 113 to one or more adjusters 114 on one or more bonding tools 112. For example, the controller 104 can generate one or more feed-forward and / or feedback control signals corresponding to the one or more adjusters 114. In an embodiment, the controller 104 can apply the generated bonder control model to the measured distortion pattern to extract the type and magnitude of overlay distortion signatures between the first and second wafers of the bonded wafer pair. The controller 104 can then determine a set of bonding tool adjustments based on the determined type of signatures and their magnitudes. For example, the controller 104 may determine a new set of actuator conditions based on the determined type of signatures and their magnitudes. These settings may be transferred directly to the bonder (in case of rework) or to an APC system, where the corrections are stored and potentially combined with other results to determine the actuator settings for the next lot. The controller can also determine whether the proposed set of bonder tool adjustments is within acceptable overlay distortion tolerance limits. The controller 104 can provide one or more feedback adjustments to the bonding tool 112 to adjust one or more adjusters 114 if the overlay distortion signature determined from applying the bonder control model to the set of proposed bonder tool adjustments is not within acceptable overlay distortion tolerance limits. In further embodiments, the controller 104 may then determine a new set of actuator conditions based on the types of signatures determined and their magnitudes. These settings may be transferred directly to the bonder or APC system, where the corrections are stored and potentially combined with other results to determine actuator settings for future wafer bonding.

[0030] The one or more processors 106 of the controller 104 may include any processor or processing element known in the art. For purposes of this disclosure, the term "processor" or "processing element" may be broadly defined to encompass any device having one or more processing or logic elements (e.g., one or more microprocessor devices, one or more application specific integrated circuits (ASIC) devices, one or more field programmable gate arrays (FPGAs), or one or more digital signal processors (DSPs)). In this sense, the one or more processors 106 may include any device configured to execute algorithms and / or instructions (e.g., program instructions stored in a memory). In an embodiment, the one or more processors 106 may be embodied as a desktop computer, a mainframe computer system, a workstation, an image computer, a parallel processor, a networked computer, or any other computer system configured to execute programs that operate or are configured to operate with the measurement system 100 as described throughout this disclosure. Additionally, different subsystems of the system 100 may include processors or logic elements suitable for performing at least some of the steps described in this disclosure. Therefore, the above description should not be construed as a limitation on the embodiments of the present disclosure, but merely as an example. Furthermore, the steps described throughout the present disclosure may be performed by a single controller, or alternatively, by multiple controllers. Furthermore, the controller 104 may include one or more controllers housed in a common housing or multiple housings. In this manner, any controller or combination of controllers may be packaged separately as a module suitable for integration into the metrology system 100. Furthermore, the controller 104 may analyze data received from the wafer shape metrology subsystem 102 and provide data to additional components within or outside the metrology system 100.

[0031] The memory medium 108 may include any storage medium known in the art suitable for storing program instructions executable by the associated one or more processors 106. For example, the storage medium 108 may include a non-transitory storage medium. As another example, the storage medium 108 may include, but is not limited to, a read-only memory (ROM), a random access memory (RAM), a magnetic or optical memory device (e.g., disk), a magnetic tape, a solid-state drive, and the like. Additionally, it is noted that the storage medium 108 may be housed within a common controller housing along with one or more processors 106. In one embodiment, the memory medium 108 may be located remotely relative to the physical location of the one or more processors 106 and the controller 104. For example, one or more processors 106 of the controller 104 may access a remote memory (e.g., a server) accessible via a network (e.g., the Internet, an intranet, etc.).

[0032] It is noted herein that one or more components of the disclosed system 100 may be communicatively bonded to various other components of the system in any manner known in the art. For example, the wafer shape metrology subsystem 102, the controller 104, the bonding tool 112, and the user interface may be communicatively bonded to each other and to the other components via wireline (e.g., copper wire, fiber optic cable, etc.) or wireless connections (e.g., RF bonding, IR bonding, data network communications (e.g., WiFi, WiMax, 3G, 4G, 4G LTE, 5G, Bluetooth, etc.)).

[0033] 2 illustrates a flow chart of a method 200 for generating a bonder control model in accordance with one or more embodiments of the present disclosure. It is noted herein that the steps of the method 200 may be implemented in whole or in part by the system 100. However, it is further recognized that the method 200 is not limited to the system 100 in that additional or alternative system level embodiments may perform all or a portion of the steps of the method 200.

[0034] A set of wafer pairs having different settings of bonding actuators are bonded to generate a set of overlay distortion patterns in step 202. In an embodiment, one or more adjusters 114 on the bonding tool 112 can be adjusted with respect to a control set of adjusters 114 and the first wafer 110 and the second wafer 110 bonded to the wafer pair 110.

[0035] In step 204, the overlay distortion pattern is measured using a wafer shape metrology subsystem. In an embodiment, as illustrated in FIG. 1B, the wafer shape metrology subsystem 102 may be used to measure the first wafer 110a, the second wafer 110b, and the bonded wafer pair 110a and 110b. For example, the wafer shape metrology subsystem 102 may measure the bonded wafer pair 110a, 110b and then provide one or more measurements to the controller 104.

[0036] In step 206, the adjuster-induced changes are extracted as differences in the overlay distortion patterns. In an embodiment, the overlay distortion patterns may be associated with a known set of actuator settings. In an embodiment, the adjuster-induced changes may be compared to a set of control adjuster positions to extract differences in the overlay distortion patterns. For example, as shown in FIG. 1A, differences between a first overlay distortion pattern generated by adjuster 114a at a first position and a second overlay distortion pattern generated by adjuster 114a at a second position may be extracted.

[0037] In step 208, a set of orthogonal wafer signatures is generated by analyzing the changes induced by the conditioners. In an embodiment, the set of orthogonal wafer signatures may be generated using various algorithms. In an additional embodiment, the set of orthogonal wafer signatures may be mapped to one or more conditioners 114 on the bonding tool 112. For example, the changes induced by the conditioners may be analyzed using PCA to generate an orthogonal set of wafer signatures that represent achievable control modes and map to one or more conditioners 114 on the bonding tool 112. The use of PCA may be beneficial in that the resulting wafer signatures are orthogonal by construction. With the use of PCA, no additional algorithms are required to establish orthogonality. In an additional embodiment, non-orthogonal signatures may be prioritized during the optimization process such that a set of unique control may be generated.

[0038] 3 illustrates a flowchart of a method 300 for utilizing a bonder control model to report feedback to a bonding tool, in accordance with one or more embodiments of the present disclosure. It is noted herein that the steps of method 300 may be implemented in whole or in part by system 100. However, it is further recognized that method 300 is not limited to system 100 in that additional or alternative system level embodiments may perform all or a portion of the steps of method 300.

[0039] A set of proposed bonder tool adjustments is received by the controller in step 302. For example, the controller 104 can receive a set of proposed bonder tool adjustments from one or more bonding tools 112, where the bonder tool adjustments correspond to one or more adjusters 114 on the one or more bonding tools 112.

[0040] In step 304, a bonder control model is applied to the set of measured wafer distortions to determine a set of overlay distortion signatures between the first and second wafers of the bonded wafer pair. For example, the controller 104 can apply the bonder control model to the set of measured wafer distortions received from one or more bonding tools 112 to determine a set of overlay distortion signatures between the first and second wafers of the bonded wafer pair.

[0041] For example, the controller 104 can collect and store pre-bonding shape measurements and then combine them with shape measurements of post-bonding measurements to obtain overlay distortions induced by one or more bonding tools 112. The controller can then use the stored distortion signatures to minimize the measured distortion signatures by modeling the type and magnitude of the distortion signatures to attempt to minimize the predicted signature that may be achieved.

[0042] In step 306, it is determined whether the set of overlay distortion signatures associated with the proposed bonder tool adjustments are outside of acceptable limits. For example, the controller 104 can determine whether the set of overlay distortion signatures associated with the proposed bonder tool adjustments are outside of acceptable tolerances by referencing acceptable tolerance data stored in the memory 108.

[0043] In step 308, feedback adjustments are provided to the bonder tool to adjust one or more actuators of the bonder tool. For example, the controller 104 can send the feedback adjustments to the bonding tool 112 corresponding to one or more adjusters 114. In another embodiment, the corrections may be sent to an advanced process control system, and the control system may generate the bonder tool adjustments.

[0044] Those skilled in the art will recognize that the components, operations, devices, objects, and accompanying discussion described herein are used as examples for conceptual clarity, and that various configuration modifications are contemplated. Thus, as used herein, the specific examples described and accompanying discussion are intended to be representative of their more general classes. In general, the use of any specific example is intended to represent its class, and non-inclusion of specific components, operations, devices, and objects should not be construed as limiting.

[0045] These may be performed using various processes and / or systems and / or other techniques that are understandable to those skilled in the art (e.g., hardware, software, and / or firmware). The preferred implementation will vary in the context of the various processes and / or systems and / or other techniques used. For example, if the implementer determines that speed and accuracy are paramount, the implementer may choose a primarily hardware and / or firmware implementation; alternatively, if flexibility is paramount, the implementer may choose a primarily software implementation; or, again alternatively, the implementer may choose some combination of hardware, software, and / or firmware. Thus, there are several possible implementations by which the processes and / or devices and / or other techniques described herein may be accomplished, and any implementation utilized is a choice that depends on the context in which it is deployed and the implementer's specific concerns (e.g., speed, flexibility, or predictability), and is not inherently better than others in that any of them may vary.

[0046] The preceding description is presented to enable one skilled in the art to make and use the invention as provided in the context of a particular application and its requirements. As used herein, directional terms such as "up", "down", "up", "down", "up", "upper", "lower", "lower" and the like are intended to provide relative positions for purposes of description and are not intended to provide an absolute frame of reference. Various modifications to the described embodiments will be apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments. Thus, the present invention is not limited to the specific embodiments shown and described, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0047] With respect to the use of virtually any plural and / or singular term herein, those of skill in the art can convert from plural to singular and / or from singular to plural as appropriate to the context and / or application. The various singular / plural permutations are not expressly set forth herein for ease of understanding.

[0048] All of the methods described herein may include storing results of one or more steps of the method embodiments in a memory. The results may include any of the results described herein and may be stored in any manner known in the art. The memory may include any memory described herein, or any other suitable storage medium known in the art. After the results are stored, they can be accessed in the memory, used by any of the method or system embodiments described herein, formatted for display to a user, used by another software module, method, or system, etc. Furthermore, the results may be stored "permanently," "semi-permanently," "temporarily," or for a period of time. For example, the memory may be a random access memory (RAM), and the results may not necessarily persist in the memory indefinitely.

[0049] It is further contemplated that each of the method embodiments described above may include any other step(s) of any other method described herein. In addition, each of the method embodiments described above may be performed by any of the systems described herein.

[0050] The subject matter described herein illustrates different components that are sometimes included within or connected to other components. It should be understood that such depicted architectures are merely exemplary, and that in fact many other architectures that achieve the same functionality may be implemented. In a conceptual sense, any arrangement of components to achieve the same functionality is effectively "associated" such that the desired functionality is achieved. Thus, any two components herein that are combined to achieve a particular functionality can be considered to be "associated" with one another such that the desired functionality is achieved, regardless of the architecture or intermediate components. Similarly, any two components so associated can also be considered to be "connected" or "bonded" to one another to achieve the desired functionality, and any two components capable of being so associated can also be considered to be "bondable" to one another to achieve the desired functionality. Specific examples of bondable include, but are not limited to, physically bondable and / or physically interacting components and / or wirelessly interactable and / or wirelessly interacting components and / or logically interacting and / or logically interacting components.

[0051] It should further be understood that the present invention is defined by the appended claims. In general, those skilled in the art will understand that the terms used in this specification and in particular in the appended claims (e.g., the body of the appended claims) are generally intended as "open" terms (e.g., the term "including" should be interpreted as "including but not limited to", the term "having" should be interpreted as "having at least", the term "includes" should be interpreted as "includes but not limited to", etc.). Those skilled in the art will further understand that if a specific number of claim recitations introduced are intended, such intention will be expressly recited in the claim, and in the absence of such recitation, no such intention exists. For example, as an aid to understanding, the following appended claims may include the use of the introductory phrases "at least one" and "one or more" to introduce the claim recitation. However, the use of such phrases should not be interpreted as meaning that the introduction of a claim recitation with the indefinite article "a" or "an" limits any particular claim that includes such an introduced claim recitation to an invention that includes only one such recitation. The same applies to the use of clear articles used to introduce claim recitations, even when the same claim includes the introductory phrase "one or more" or "at least one" and an indefinite article such as "a" or "an" (e.g., "a" and / or "an" should typically be interpreted to mean "at least one" or "one or more"). Also, those skilled in the art will recognize that even when a specific number of introduced claim recitations is explicitly recited, such recitation should typically be interpreted to mean at least the recited number (e.g., a bare recitation of "two recitations" without other modifiers typically means at least two recitations, or two or more recitations).Furthermore, in instances where a conventional expression similar to "such as at least one of A, B, and C" is used, such a configuration is generally intended in the sense that one of ordinary skill in the art would understand the conventional expression (e.g., "a system having at least one of A, B, and C" includes, but is not limited to, systems having only A, only B, only C, A and B together, A and C together, B and C together, and / or A, B, and C together). In instances where a conventional expression similar to "such as at least one of A, B, or C" is used, such a configuration is generally intended in the sense that one of ordinary skill in the art would understand the conventional expression (e.g., "a system having at least one of A, B, or C" includes, but is not limited to, systems having only A, only B, only C, A and B together, A and C together, B and C together, and / or A, B, and C together). Those skilled in the art will further appreciate that virtually any disjunctive word and / or phrase presenting two or more alternative terms, wherever in the description, claims, or drawings, should be understood to contemplate the possibility of including one of the terms, either of the terms, or both terms. For example, the phrase "A or B" will be understood to include the possibilities of "A" or "B" or "A and B."

[0052] It is believed that the present disclosure and many of its attendant advantages will be understood from the foregoing description, and it will be apparent that various changes can be made in the form, construction and arrangement of the elements without departing from the disclosed subject matter or sacrificing all of its material advantages. The forms described are merely illustrative, and it is the intent of the following claims to embrace and include such modifications. It is to be understood, further, that the invention is defined by the appended claims.

Claims

1. 1. A system comprising: a wafer shape metrology subsystem configured to perform one or more shape measurements on a pair of pre-bonding wafers and a corresponding pair of post-bonding wafers; a controller communicatively coupled to the wafer shape metrology subsystem, the controller comprising one or more processors configured to execute a set of program instructions stored in a memory, the set of program instructions configuring the one or more processors to: receiving a set of measured bonding strains; applying a bonder control model to the measured bonding distortions, the bonder control model being generated by: bonding wafer pairs at different settings of one or more bonder tool adjusters to generate a set of overlay distortion patterns; measuring overlay distortion patterns of at least some of the set of overlay distortion patterns using the wafer shape metrology subsystem; extracting actuator induced changes as differences in the overlay distortion patterns relative to a set of control adjuster positions; and generating a set of stored orthogonal wafer signatures based on the actuator induced changes; determining whether a set of predicted overlay distortion signatures associated with the set of measured bonding distortions is outside of acceptable limits by comparing the set of predicted overlay distortion signatures to the stored orthogonal wafer signatures; providing one or more feedback adjustments to the bonder tool to adjust one or more bonder tool adjusters when the set of predicted overlay distortion signatures is outside of acceptable limits; a controller configured to cause A system comprising:

2. providing one or more feedback adjustments to the bonder tool to adjust one or more bonder tool adjusters when the set of predicted overlay distortion signatures is outside of acceptable limits; providing one or more feedback adjustments to the one or more bonder tool tuners to minimize a predicted overlay distortion signature; 2. The system of claim 1, comprising:

3. The system of claim 2 , wherein the one or more bonder tool conditioners are communicatively coupled to one or more actuators on the bonder tool.

4. 2. The system of claim 1, wherein the wafer shape metrology subsystem comprises a first interferometer subsystem and a second interferometer subsystem.

5. 1. A system comprising: A controller communicatively coupled to a wafer shape metrology subsystem, the controller including one or more processors configured to execute a set of program instructions stored in a memory, the set of program instructions configuring the one or more processors to: receiving a set of measured bonding strains; applying a bonder control model to the set of measured distortion patterns, the bonder control model being generated by: bonding wafer pairs with different settings of one or more bonder tool adjusters to generate a set of overlay distortion patterns; measuring overlay distortion patterns of at least some of the set of overlay distortion patterns using the wafer shape metrology subsystem; extracting actuator induced changes as differences in the overlay distortion patterns relative to a set of control adjuster positions; and generating a set of stored orthogonal wafer signatures based on the actuator induced changes; determining whether a set of predicted overlay distortion signatures associated with the set of measured bonding distortions is outside acceptable limits; providing one or more feedback adjustments to the bonder tool to adjust the one or more bonder tool adjusters when the set of predicted overlay distortion signatures is outside of acceptable limits; a controller configured to cause A system comprising:

6. Providing the one or more feedback adjustments when the set of predicted overlay distortion signatures is outside of acceptable limits comprises: providing the one or more feedback adjustments to the one or more bonder tool tuners to minimize a predicted overlay distortion signature.

6. The system of claim 5, further comprising:

7. The system of claim 6 , wherein the one or more bonder tool conditioners are communicatively coupled to one or more actuators on the bonder tool.

8. 6. The system of claim 5, wherein the wafer shape metrology subsystem comprises a first interferometer subsystem and a second interferometer subsystem.

9. 1. A method comprising: receiving a set of measured bonding strains; applying a bonder control model to the set of measured bonding distortions to determine a set of predicted overlay distortion signatures between a first wafer and a second wafer of a bonded wafer pair, the bonder control model being generated by: bonding a wafer pair at different settings of one or more bonder tool conditioners to generate a set of overlay distortion patterns, measuring overlay distortion patterns of at least some of the set of overlay distortion patterns using a wafer shape metrology subsystem, extracting actuator induced changes as differences in the overlay distortion patterns relative to a set of control conditioner positions, and generating a set of stored orthogonal wafer signatures based on the actuator induced changes; determining whether the set of predicted overlay distortion signatures associated with the set of measured bonding distortions is outside acceptable limits; providing one or more feedback adjustments to the bonder tool to adjust the one or more bonder tool adjusters when the set of predicted overlay distortion signatures is outside of acceptable limits. A method for providing the above.

10. generating a regulator control group by bonding wafer pairs with known regulator settings; The method of claim 9 further comprising:

11. 10. The method of claim 9, wherein generating the set of orthogonal wafer signatures is accomplished by principal component analysis.

12. 10. The method of claim 9, wherein the orthogonal wafer signature is mappable to the one or more bonder tool aligners.

13. The method of claim 12 , wherein the one or more bonder tool regulators are manually controlled.

14. 13. The method of claim 12, wherein the one or more bonder tool conditioners are controlled via a computer system.

15. Extracting actuator induced changes as differences in the overlay distortion patterns for the set of control regulators, comparing the actuator induced changes to a regulator control group; 10. The method of claim 9, comprising:

16. A system comprising: a wafer shape metrology subsystem configured to perform one or more shape measurements on a pair of pre-bonding wafers and a corresponding pair of post-bonding wafers; a controller communicatively coupled to the wafer shape metrology subsystem, the controller comprising one or more processors configured to execute a set of program instructions stored in a memory, the set of program instructions configuring the one or more processors to: generating a bonder control model, the generating the bonder control model comprising generating a set of stored orthogonal wafer signatures based on the actuator induced changes; receiving a set of measured bonding strains; applying the bonder control model to the measured bond distortion; determining whether a set of predicted overlay distortion signatures associated with the set of measured bonding distortions is outside acceptable limits; providing one or more feedback adjustments to the bonder tool to adjust one or more bonder tool adjusters when the set of predicted overlay distortion signatures is outside of acceptable limits; a controller configured to cause A system comprising:

17. The step of generating the bonder control model comprises: bonding wafer pairs at different settings of the one or more bonder tool tuners to generate a set of overlay distortion patterns; measuring at least some of the set of overlay distortion patterns using the wafer shape metrology subsystem; extracting actuator induced changes as the difference in the overlay distortion pattern for a set of control adjuster positions; generating the set of stored orthogonal wafer signatures based on the actuator induced changes; 20. The system of claim 16, comprising:

18. The method of claim 17, further comprising the steps of: providing one or more feedback adjustments when the set of predicted overlay distortion signatures is outside of acceptable limits; providing one or more feedback adjustments to the one or more bonder tool tuners to minimize a predicted overlay distortion signature; 20. The system of claim 16, comprising:

19. The system of claim 18, wherein the one or more bonder tool adjusters are communicatively coupled to one or more actuators on the bonder tool.

20. The system of claim 16, wherein the wafer shape measurement subsystem includes a first interferometer subsystem and a second interferometer subsystem.

21. A system comprising: A controller communicatively coupled to a wafer shape metrology subsystem, the controller including one or more processors configured to execute a set of program instructions stored in a memory, the set of program instructions configuring the one or more processors to: generating a bonder control model, the generating the bonder control model comprising generating a set of stored orthogonal wafer signatures based on the actuator induced changes; receiving a set of measured bonding strains; applying the bonder control model to the measured bonding distortion; determining whether a set of predicted overlay distortion signatures associated with the set of measured bonding distortions is outside acceptable limits; providing one or more feedback adjustments to the bonder tool to adjust one or more bonder tool adjusters when the set of predicted overlay distortion signatures is outside of acceptable limits; a controller configured to cause A system comprising:

22. The step of generating the bonder control model includes: bonding wafer pairs at different settings of the one or more bonder tool tuners to generate a set of overlay distortion patterns; measuring at least some of the set of overlay distortion patterns using the wafer shape metrology subsystem; extracting actuator induced changes as the difference in the overlay distortion pattern for a set of control adjuster positions; generating the set of stored orthogonal wafer signatures based on the actuator induced changes; 22. The system of claim 21, comprising:

23. The step of providing one or more feedback adjustments when the set of predicted overlay distortion signatures is outside of acceptable limits, comprising: providing the one or more feedback adjustments to the one or more bonder tool tuners to minimize a predicted overlay distortion signature.

22. The system of claim 21, comprising:

24. The system of claim 21, wherein the one or more bonder tool adjusters are communicatively coupled to one or more actuators on the bonder tool.

25. The system of claim 21, wherein the wafer shape measurement subsystem includes a first interferometer subsystem and a second interferometer subsystem.

26. A method comprising: generating a bonder control model, the generating the bonder control model comprising generating a set of stored orthogonal wafer signatures based on the actuator induced changes; receiving a set of measured bonding strains; applying the bonder control model to the measured bond distortion; determining whether a set of predicted overlay distortion signatures associated with the set of measured bonding distortions is outside acceptable limits; providing one or more feedback adjustments to the bonder tool to adjust one or more bonder tool adjusters when the set of predicted overlay distortion signatures is outside of acceptable limits; A method for providing the above.

27. ​​The step of generating the bonder control model includes: bonding wafer pairs at different settings of the one or more bonder tool tuners to generate a set of overlay distortion patterns; measuring at least some of the set of overlay distortion patterns using a wafer shape metrology subsystem; extracting actuator induced changes as the difference in the overlay distortion pattern for a set of control adjuster positions; generating the set of stored orthogonal wafer signatures based on the actuator induced changes; 27. The method of claim 26, comprising:

28. The steps of: generating a regulator control group by bonding wafer pairs with known regulator settings; 27. The method of claim 26 further comprising:

29. The method of claim 26, wherein the step of generating a set of orthogonal wafer signatures is accomplished by principal component analysis.

30. The method of claim 26, wherein the orthogonal wafer signature is mapped to the one or more bonder tool aligners.

31. The method of claim 26, wherein the one or more bonder tool adjusters are manually controlled.

32. The method of claim 26, wherein the one or more bonder tool adjusters are controlled via a computer system.

33. The step of extracting actuator induced changes as differences in the overlay distortion patterns for a set of control adjuster positions, comprising: comparing the actuator induced changes to a regulator control group; 27. The method of claim 26, comprising:

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