Highly temperature stable MEMS resonators

Abstract

A MEMS resonator (150) comprising a substrate (105), a resonating element (100) and a cavity (110). The resonating element is separated from the substrate by the cavity, and the resonating element comprises a layer (101) of monocrystalline silicon. The layer of monocrystalline silicon is doped with phosphorus atoms to obtain a specific doping profile.

Description

[Technical field]

[0001] The present invention relates generally to micro-electro-mechanical system (MEMS) resonators.

[0002] 2. Background of the Invention

[0003] Please note that this section provides useful background information, but is not an admission that the technology described herein represents the state of the art.

[0004] MEMS (Micro Electro Mechanical System) resonators have been developed that offer similar functionality to quartz resonators, but with smaller chip size, lower cost, and improved robustness against shock and vibration. Wafer processing techniques are used to manufacture MEMS resonators. A single MEMS resonator wafer before dicing may contain 10,000 to 500,000 resonators, depending on the wafer size, resonator dimensions, and layout. Key performance parameters of MEMS resonators, such as silicon MEMS resonators used in frequency reference applications, include small variation in resonant frequency over the operating temperature range, low equivalent series resistance (ESR), and good long-term stability of the resonant frequency (small aging change). Abstract

[0005] It is an aim of certain embodiments of the present invention to provide a MEMS resonator having desired characteristics, or at least to provide an alternative to existing technology.

[0006] A particular objective of certain embodiments is to reduce the variation of the resonant frequency over the operating temperature range.

[0007] According to a first aspect of the present invention, there is provided a MEMS (microelectromechanical system) resonator as follows. With the substrate; With resonating elements; Cavity; Equipped with the resonating element is separated from the substrate by the cavity, the resonating element including a layer of single crystal silicon; The layer of single crystal silicon is doped with phosphorus atoms, the concentration of the phosphorus atoms being n dop teeth, (i)d / t DEV At =0.1, it is 1.99 × 10 20 cm -3 From 2.97 x 10 20 cm -3 Within the range of d / t DEV At =0.9, it is 1.20 x 10 20 cm -3 to 1.78 × 10 20 cm -3 is within the range Or, (ii)d / t DEV At =0.1, it is 1.20 x 10 20 cm -3 From 1.80 x 10 20 cm -3 Within the range of d / t DEV At = 0.9, it is 2.02 × 10 20 cm -3 From 2.97 x 10 20 cm -3 is within the range Or, (iii)d / t DEV At =0.1, it is 2.08 x 10 20 cm -3 From 2.97 x 10 20 cm -3 Within the range of d / t DEV At =0.5, it is 1.20 x 10 20 cm -3 From 1.86 × 10 20 cm -3 Within the range of d / t DEV = 0.9, 2.08 × 10 20 cm -3 From 2.97 x 10 20 cm -3 is within the range where d is the distance between a position within the layer of single crystal silicon and the top surface of the layer of single crystal silicon, and t DEV is the thickness of the single crystal silicon layer.

[0008] In some embodiments, the resonator or resonating element further comprises a layer of piezoelectric material for exciting the resonating element into a resonant mode.

[0009] In some embodiments, the layer of piezoelectric material is on top of the layer of single crystal silicon. In some embodiments, the resonant element comprises a top electrode layer on top of the layer of piezoelectric material. In some embodiments, the top electrode layer comprises single crystal silicon doped with phosphorus (phosphorus doped single crystal silicon). In some embodiments, the resonant element comprises a layer of phosphorus doped single crystal silicon on either side of the layer of piezoelectric material. The doping concentration in the top electrode layer may be any of options (i), (ii) or (iii) above. The doping concentration and / or profile in the top electrode layer may be the same or different compared to the doping concentration and / or profile in the phosphorus doped single crystal silicon layer on the opposite side of the piezoelectric layer.

[0010] In some embodiments, the layer of piezoelectric material has a thickness in the range of 0.5 μm to 3 μm, such as in the range of 1 μm to 2 μm, to excite the resonating element into a resonant mode.

[0011] In some embodiments, the thickness of the layer of single crystal silicon is in the range of 2 μm to 40 μm, such as in the range of 5 μm to 20 μm, or in the range of 9 μm to 17 μm.

[0012] In some embodiments, phosphorus-doped single crystal silicon forms 50% or more of the mass of the resonating element.

[0013] In some embodiments, the variation of the resonant frequency in the temperature range of -30°C to 85°C is within ±30 ppm of said resonant frequency at a temperature of 25°C.

[0014] In some embodiments, the resonating element is a resonant element of the monocrystalline silicon layer in the plane of the monocrystalline silicon layer. <100> It has elongated portions of material that are substantially parallel to the crystal axes.

[0015] In some embodiments, the resonating element comprises an elongate portion of material that resonates in a length extension or bending resonance mode.

[0016] The negative temperature coefficient associated with the piezoelectric layer makes it difficult to achieve a thermally stable silicon MEMS resonator, so embodiments of the present invention are particularly useful for silicon MEMS resonators having a piezoelectric layer. Considering the ease of deposition of the piezoelectric layer by sputtering and the avoidance of too large an electrical shunt capacitance across the piezoelectric layer, which tends to reduce the figure of merit (FOM) of the MEMS resonator, an advantageous thickness of the piezoelectric layer is in the range of 0.5 μm to 3 μm, for example 1 μm to 2 μm. For a piezoelectric layer having a thickness in the range of 0.5 μm to 3 μm, the thickness of the single crystal silicon layer is preferably in the range of 2 μm to 40 μm. More preferably, for a piezoelectric layer having a thickness in the range of 1 μm to 2 μm, the thickness of the single crystal silicon layer is in the range of 5 μm to 20 μm. Even more preferably, for a piezoelectric layer having a thickness in the range of 1 μm to 2 μm, the thickness of the single crystal silicon layer is in the range of 9 μm to 17 μm. The thickness of the doped monocrystalline silicon layer must be sufficiently thick compared to the thickness of the piezoelectric layer in order to realize a thermally stable (composite) MEMS resonator with the monocrystalline silicon layer and the piezoelectric layer. The thickness of the monocrystalline silicon layer mentioned above is not too thick, considering the ease of deep reactive etching of high aspect ratio trenches through the material layers of the resonant elements, or considering the strength of the electromechanical coupling, which decreases with increasing thickness of the monocrystalline silicon layer. However, in some embodiments, the phosphorus doping of the monocrystalline silicon becomes difficult with the above thickness of the monocrystalline silicon layer. The (average) phosphorus doping level of the monocrystalline silicon must be large enough for thermal compensation, but the local phosphorus doping level should not be too large. This is, for example, to avoid the precipitation of undesirable compounds of silicon and phosphorus (such as SiP) and the associated increased process variability and reduced yield, and to avoid excessively long high temperature annealing. The phosphorus doping profile (depth concentration distribution) of the present invention solves these problems and results in a thermally stable (compound) MEMS resonator whose resonant frequency varies within ±30 ppm (or less, e.g., within ±10 ppm) in the temperature range of -30°C to 85°C with respect to the resonant frequency at a temperature of 25°C.The phosphorus doping profile according to the invention is also suitable for MEMS resonators formed in cavity SOI wafers, where excessive impurity doping near the surface of the monocrystalline silicon layer facing the cavity is particularly susceptible to stress relaxation effects. In an exemplary embodiment, phosphorus impurity atoms are introduced into the monocrystalline silicon from a silicon wafer surface (doping plane) perpendicular to the wafer surface. Thus, the phosphorus doping concentration varies only in a direction perpendicular to the wafer surface. That is, the doping concentration varies as a function of distance from the doping plane. The thickness of the silicon device layer can be precisely controlled, for example, by using ion beam trimming of the silicon to reduce the thickness variation of the silicon device layer. This allows the MEMS resonators according to the invention to maintain low process variations (such as variations in frequency vs. temperature characteristics and variations in resonant frequency values ​​depending on the position in the wafer). To further reduce the variation in frequency vs. temperature characteristics, the shape of the resonant element, the resonant mode, and the orientation of the crystal axis in the single crystal silicon layer may be designed in parallel with the phosphorus doping profile and the thickness of the single crystal silicon layer and the piezoelectric layer.

[0017] In some embodiments, the resonating element comprises a layer of monocrystalline silicon doped with phosphorus atoms, the phosphorus atoms having a concentration n dop according to equation (i) or (ii) or (iii) of the first approach, the resonator further comprising a layer of piezoelectric material for exciting the resonating element into a resonant mode, the layer of piezoelectric material having a thickness in the range of 1 μm to 2 μm, and the layer of single crystal silicon having a thickness in the range of 9 μm to 17 μm.

[0018] In some embodiments, the resonating element includes a layer of single crystal silicon doped with phosphorus atoms, the phosphorus atoms being introduced into the single crystal silicon from a surface of a silicon wafer perpendicular to the wafer surface, the concentration of the phosphorus atoms being n dopaccording to equation (i) or (ii) or (iii) of the first approach, the resonator further comprising a layer of piezoelectric material for exciting the resonating element into a resonant mode, the layer of piezoelectric material having a thickness in the range of 1 μm to 2 μm, and the layer of single crystal silicon having a thickness in the range of 9 μm to 17 μm.

[0019] In some embodiments, the resonating element includes a layer of single crystal silicon doped with phosphorus atoms, the phosphorus atoms being introduced into the single crystal silicon from a surface of a silicon wafer perpendicular to the wafer surface, the concentration of the phosphorus atoms being n dop according to equation (i) or (ii) or (iii) of the first approach, the resonator further comprising a layer of piezoelectric material for exciting the resonating element into a resonant mode, the layer of piezoelectric material having a thickness in the range of 1 μm to 2 μm, the layer of single crystal silicon having a thickness in the range of 9 μm to 17 μm, and a variation in resonant frequency in the temperature range of -30°C to 85°C is within ±30 ppm of the resonant frequency at a temperature of 25°C.

[0020] In some embodiments, the resonating element comprises a layer of monocrystalline silicon doped with phosphorus atoms, the phosphorus atoms having a concentration n dop is according to equation (i) or (ii) or (iii) of the first approach, the resonator further comprising a layer of piezoelectric material for exciting the resonating element into a resonant mode, the layer of piezoelectric material having a thickness in the range of 1 μm to 2 μm, the layer of monocrystalline silicon having a thickness in the range of 9 μm to 17 μm, and the resonating element being a lattice of the monocrystalline silicon layer in a plane of the monocrystalline silicon layer. <100> The piezoelectric element has an elongated material portion substantially parallel to a crystal axis, the elongated material portion configured to resonate in a length extension resonance mode or a bending resonance mode.

[0021] In some embodiments, the resonating element includes a layer of single crystal silicon doped with phosphorus atoms, the phosphorus atoms being introduced into the single crystal silicon from a surface of a silicon wafer perpendicular to the wafer surface, the concentration of the phosphorus atoms being n dopis according to equation (i) or (ii) or (iii) of the first approach, the resonator further comprising a layer of piezoelectric material for exciting the resonating element into a resonant mode, the layer of piezoelectric material having a thickness in the range of 1 μm to 2 μm, the layer of monocrystalline silicon having a thickness in the range of 9 μm to 17 μm, and the resonating element being a lattice of the monocrystalline silicon layer in a plane of the monocrystalline silicon layer. <100> The piezoelectric element has an elongated material portion substantially parallel to a crystal axis, the elongated material portion configured to resonate in a length extension resonance mode or a bending resonance mode.

[0022] In some embodiments, the resonating element includes a layer of single crystal silicon doped with phosphorus atoms, the phosphorus atoms being introduced into the single crystal silicon from a surface of a silicon wafer perpendicular to the wafer surface, the concentration of the phosphorus atoms being n dop is according to equation (i) or (ii) or (iii) of the first approach, the resonator further comprising a layer of piezoelectric material for exciting the resonating element into a resonant mode, the layer of piezoelectric material having a thickness in the range of 1 μm to 2 μm, the layer of monocrystalline silicon having a thickness in the range of 9 μm to 17 μm, and the resonating element being a lattice of the monocrystalline silicon layer in a plane of the monocrystalline silicon layer. <100> The device has an elongated material portion substantially parallel to a crystal axis, the elongated material portion configured to resonate in a length-extensional resonance mode or a bending resonance mode, and a variation in resonant frequency over a temperature range of -30°C to 85°C is within ±30 ppm of the resonant frequency at a temperature of 25°C.

[0023] In a preferred embodiment, the concentration n dop teeth, (i)d / t DEV At =0.1, it is 2.10 x 10 20 cm -3 From 2.86 × 10 20 cm -3 Within the range of d / t DEV At =0.9, it is 1.26 x 10 20 cm -3 to 1.72 × 10 20 cm -3 is within the range Or, (ii)d / t DEV At =0.1, it is 1.26 × 10 20 cm -3 to 1.73 × 10 20 cm -3 Within the range of d / t DEV At =0.9, it is 2.10 x 10 20 cm -3 From 2.86 × 10 20 cm -3 is within the range Or, (iii)d / t DEV At =0.1, it is 2.17×10 20 cm -3 From 2.86 × 10 20 cm -3 Within the range of d / t DEV At =0.5, it is 1.27 x 10 20 cm -3 to 1.77 × 10 20 cm -3 Within the range of d / t DEV At =0.9, it is 2.17×10 20 cm -3 From 2.86 × 10 20 cm -3 is within the range.

[0024] In a further preferred embodiment, the concentration n dop teeth, (i)d / t DEV At =0.1, it is 2.14 × 10 20 cm -3 From 2.75 × 10 20 cm -3 Within the range of d / t DEV At =0.9, it is 1.28 x 10 20 cm -3 From 1.70 x 10 20 cm -3 is within the range Or, (ii)d / t DEV At =0.1, it is 1.28 x 10 20 cm -3 to 1.71 × 10 20cm -3 Within the range of d / t DEV = 0.9, 2.14 × 10 20 cm -3 From 2.75 × 10 20 cm -3 is within the range Or, (iii)d / t DEV At =0.1, it is 2.18×10 20 cm -3 From 2.75 × 10 20 cm -3 Within the range of d / t DEV At =0.5, it is 1.28 x 10 20 cm -3 From 1.75 × 10 20 cm -3 Within the range of d / t DEV At =0.9, it is 2.18×10 20 cm -3 From 2.75 × 10 20 cm -3 is within the range.

[0025] In some embodiments, the resonating element comprises two layers of single crystal silicon.

[0026] In some embodiments, the resonant element comprises two layers of monocrystalline silicon, one of which is doped with phosphorus atoms according to one of options (i), (ii) or (iii), and the other of which is doped with phosphorus atoms according to one of options (i), (ii) or (iii).

[0027] In some embodiments, the resonating element does not include precipitates of compounds containing silicon and phosphorus.

[0028] In some embodiments, the layer of single crystal silicon is doped with phosphorus atoms using thermal diffusion doping.

[0029] In some embodiments, the concentration of phosphorus atoms, n dop d / t DEVexhibits a local maximum concentration in the range of 0.85 to 0.95.

[0030]

[0008] In some embodiments, the resonating element comprises two layers of single crystal silicon, the first of the two layers having a <100> The crystal axis of the second of the two layers. <100> The crystal axes are aligned substantially parallel to one another within the plane of each layer.

[0031] According to a second aspect of the present invention, there is provided a method for manufacturing the MEMS resonator described above, the method comprising the steps of: Taking the starting wafer substrate; performing a process to create the resonating element and the cavity; Including, The layer of single crystal silicon is doped using thermal diffusion doping.

[0032] Although various concepts and embodiments have been introduced, they are not presented to limit the scope of the invention. These and the following embodiments are merely used to explain specific aspects and steps that can be used in implementing the present invention. It should be understood that some embodiments can be applied to other embodiments. The embodiments introduced can be appropriately combined. [Brief description of the drawings]

[0033] The invention will now be described, by way of example only, with reference to the accompanying drawings, in which: FIG. 1 is a simplified cross-sectional view of a MEMS resonator according to an embodiment. 2A-2C illustrate the fabrication process for a MEMS resonator of the type shown in FIG. 1, according to one embodiment. FIG. 3 illustrates the variation of impurity (dopant) concentrations in one embodiment. 4A-4C show further manufacturing steps according to some embodiments. 5A-5F show an alternative manufacturing method. FIG. 6 shows dopant concentration as a function of distance in one embodiment. 7A-7D illustrate certain manufacturing steps according to certain embodiments. 8-10 show the concentration of dopants in one embodiment. FIG. 11 illustrates a layout of a MEMS resonator according to an embodiment. 12A-12C show further features of the MEMS resonator of FIG. 11, according to an embodiment. 13A-13B show the temperature variation of the resonant frequency of a MEMS resonator according to one embodiment. 14A-14B show another MEMS resonator according to an embodiment. 15A-15C illustrate further embodiments of MEMS resonators in accordance with certain embodiments.

[0034] Embodiments of the present invention disclose phosphorus doping profiles for silicon MEMS resonators that significantly reduce the temperature variation of the resonant frequency of the resonator (i.e., increase thermal stability). Resonators according to certain embodiments have thermal stability equal to or greater than that of AT-cut quartz resonators. Embodiments of the present invention also have other advantages. The phosphorus dopant concentration according to embodiments of the present invention is such that precipitation of undesirable compounds of phosphorus and silicon (e.g., SiP) is minimized. Additionally, the phosphorus doping profile is achieved at relatively low annealing temperatures with annealing times suitable for cost-effective mass production.

[0035] A temperature stable MEMS resonator structure according to one embodiment of the invention includes a single crystal silicon layer, a piezoelectric layer, and a conductive top electrode layer. In some embodiments, a cross section of such a resonator 150 may be as shown in Figure 1. Layers 101-105 are shown in the drawing. These are: Layer 101: Doped single crystal silicon layer (also called device layer). The single crystal silicon doped with phosphorus forms more than 50% of the mass of the resonating element 100. In some embodiments, the doped silicon layer functions as a bottom electrode layer. Layer 102: Piezoelectric layer. The materials of this layer are AlN, ZnO, Sc doped AlN(Sc x Al1-x N,x<0.5), or other piezoelectric crystalline compounds. The electromechanical transduction of the resonator is based on the application of an alternating electric field to the piezoelectric layer. Layer 103: Top electrode layer. On top of the piezoelectric layer is the top electrode layer. The material of this layer is Al, Mo, Au, alloys, or degenerately doped polysilicon, or degenerately doped single crystal silicon, or any other suitable material that is electrically conductive. Layer 104: A buried silicon oxide layer. This layer provides galvanic isolation between the doped monocrystalline layer 101 and the handle layer 105. Layer 105: (single crystal) silicon handle layer (or a handle layer made of other material), also called substrate.

[0036] The resonator 150 comprises a resonating element 100. The resonating element 100 contains the vibrational energy of the resonator (except for a small amount of energy leaking into the structure surrounding the resonating element). The resonating element 100 comprises material portions in layers 101 (doped single crystal silicon layer), 102 (piezoelectric layer), and 103 (top electrode layer). The material portion of the piezoelectric layer 102 in the resonating element 100 forms a piezoelectric actuator that can be used to excite the resonating element 100 into a resonant mode. A cavity 110 separates the lower surface of the resonating element 100 from the handle layer 105.

[0037] In some embodiments, the lateral dimensions of the cavity 110 are in the range of 100 m to 800 m. The depth of the cavity 110 is in the range of 0.5 m to 200 m, for example in the range of 2 μm to 50 μm.

[0038] In some embodiments, the thickness of the single crystal silicon layer 101 is preferably in the range of 2 μm to 40 μm, more preferably in the range of 5 μm to 20 μm, and even more preferably in the range of 9 μm to 17 μm.

[0039] In some embodiments, the thickness of the piezoelectric layer 102 ranges from 0.5 μm to 3 μm, such as from 1 μm to 2 μm.

[0040] In some embodiments, the thickness of the top electrode layer 103 is in the range of 0.15 μm to 0.4 μm, for example in the range of 0.05 μm to 1 μm. In some embodiments, the material of the top electrode layer 103 is degenerately doped monocrystalline silicon and the thickness of the layer 103 is in the range of 2 μm to 40 μm, for example in the range of 5 μm to 20 μm.

[0041] In some embodiments, a cavity-SOI (CSOI) wafer, as shown in FIG. 2A, is the starting wafer substrate for the fabrication of a MEMS resonator 150. The cavity-SOI wafer includes a cavity 110 formed in a single crystal silicon handle layer 105, a silicon oxide layer 104 formed on top of the silicon handle layer 105, and a single crystal silicon device layer 101 bonded to the silicon oxide layer 104. In some embodiments, as shown in FIG. 2B, a film of PSG glass 120 containing phosphorus for n-type doping is formed using POCl. 3The PSG is deposited on the top surface of the cavity SOI wafer in a furnace. In some embodiments, the deposition time is in the range of 30 minutes to 200 minutes, and the temperature is in the range of 1000° C. to 1100° C. After the PSG deposition, phosphorus is diffused into the single crystal silicon device layer 101 by a drive-in process step, for example, at a temperature in the range of 1000° C. to 1100° C. for a time in the range of 120 minutes to 600 minutes. In an advantageous embodiment, the PSG layer 120 is removed by a wet etchant containing hydrofluoric acid. The phosphorus dopant is then diffused into the device layer 101 during an anneal, for example, at a temperature in the range of 1100° C. to 1220° C. During the anneal, the phosphorus dopant diffuses from the top layer of the single crystal silicon device layer 101 toward the bottom of the device layer 101, as shown in FIG. 2C. (In FIG. 2C, d indicates the distance from the top layer.) In the exemplary case with a device layer 101 that is 11 um thick, the annealing will take between 10 and 45 hours. In other embodiments with a device layer 101 that is 5 um thick, the annealing will take between 2 and 10 hours. In other embodiments of the invention with a device layer 101 that is 15 um thick, the annealing will take between 19 and 84 hours.

[0042] The change in concentration of phosphorus dopant in device layer 101 during annealing is shown in Figure 3. After a short annealing step, the gradient of the phosphorus dopant concentration remains relatively high. After a longer anneal, the dopant concentration becomes more uniform.

[0043] In some embodiments, the phosphorus dopant anneal is followed by a wet oxidation at a temperature ranging from 1050° C. to 1150° C. for a time ranging from 5 hours to 15 hours. The oxide may then be removed by a wet etchant containing hydrofluoric acid.

[0044] In some embodiments, following the phosphorus dopant anneal, a shallow etch is performed on the surface layer of the device layer to remove areas of excessive dopant concentration in the single crystal silicon layer structure, the etch depth may be in the range of 50 nm to 500 nm.

[0045] In some embodiments, the doping of the single crystal silicon layer 101 with phosphorus is performed by thermal diffusion doping starting from a solid doping material such as a spin-on phosphorus doped glass.

[0046] In some embodiments, the next step in the manufacturing method is to deposit a piezoelectric layer 102 or another piezoelectric material, such as AlN or Sc-doped AlN, on the top surface of the cavity SOI wafer, as shown in FIG. 4A. In some embodiments, an electrode layer 103 is then deposited, as shown in FIG. 4B. The material of the electrode layer may be gold, aluminum, molybdenum, tungsten, (doped) polysilicon, or other conductive material. In some embodiments, vertical trenches 111 are then etched, for example using deep reactive ion etching, through the material layers (single crystal silicon device layer 101, piezoelectric layer 102, top electrode layer 103) that form the resonating element 100, to pattern the layout of the MEMS resonating element 100, as shown in FIG. 4C.

[0047] In an alternative embodiment, the fabrication of the resonator uses a silicon-on-insulator (SOI) wafer as a starting wafer. Figures 5A-F show exemplary fabrication steps that can be used to create a resonating element 100 on an SOI wafer. Figure 5A shows a silicon oxide layer (204) on top of a handle layer (205), and a single crystal device layer 101 on top of the silicon oxide layer 204. Doping of the single crystal device layer 101 of the SOI wafer proceeds similarly to that of a CSOI wafer. As shown in Figure 5B, a PSG layer 120 is deposited on the device layer, and a drive-in process step diffuses phosphorus atoms into the interior of the device layer. The PSG layer is then removed and the SOI wafer is annealed to diffuse phosphorus atoms deep into the device layer 101, as shown in Figure 5C. Substantially the same process parameters (i.e., drive-in and anneal temperature vs. time profiles) can be used to dope SOI and cavity SOI wafers of the same device layer thickness. A piezoelectric layer 102 and a top electrode layer 103 are deposited, as shown in Figure 5D. Etching a vertical trench 111, shown in Figure 5E, defines the lateral dimensions of the resonating element 100. An HF vapor etch, for example, is then used to form a cavity 110 beneath the resonating element 100, thereby isolating it from the handle layer 205, as shown in Figure 5F.

[0048] In some embodiments, the concentration of the phosphorus dopant varies with distance from the top surface of the single crystal silicon layer 101, as shown in Figure 6. The vertical axis of Figure 6 represents the absolute concentration of the phosphorus dopant, n dop The horizontal axis of Fig. 6 is the relative depth d REL Relative depth d REL is defined as the distance d from the top surface of the single crystal silicon layer 101, and the thickness t of the single crystal silicon layer 101. DEV That is, d REL =d / t DEV In the exemplary embodiment illustrated by the data in FIG. DEV= 11 μm. The data show that the general trend is that the phosphorus dopant concentration decreases (monotonically) with distance, i.e., the deeper into the single crystal silicon layer 101. Near the top surface of the single crystal silicon layer 101, d REL At n = 0.1, the phosphorus dopant concentration dop is 2.48 x 10 20 cm -3 On the other hand, near the bottom surface of the single crystal silicon layer 101, d REL At n = 0.9, the phosphorus dopant concentration dop is 1.49 x 10 20 cm -3 d REL The concentration at d = 0.1 is REL = 66% higher than the concentration at 0.9.

[0049] The sheet resistance of a 10.9±0.2 μm thick device layer having a doping profile according to FIG. 6 was measured to be 0.48±0.01 ohms / square, which corresponds to an average silicon resistivity of 0.52±0.02 mOhm-cm.

[0050] As described below with reference to Figures 11-13, phosphorus dopant profiles according to embodiments of the present invention improve the thermal stability of silicon MEMS resonators to the same level as state-of-the-art quartz resonators.

[0051] The substantially same phosphorus dopant distribution provides quark-level thermal stability for silicon MEMS resonators in various embodiments of the present invention. The resonant mode of the resonator may be, for example, length-extensional, flexural, bulk-acoustic, or torsional. The geometry of the resonator may also vary depending on the mode. The main motion during resonant motion may occur in-plane or out-of-plane. Here, the term "plane" refers to the plane of the device layer 101. The nominal frequency of the resonator may also be in the MHz range, such as 1 MHz to 200 MHz, or in the kHz range, such as 30 kHz to 1000 kHz, for example 32 kHz. The thicknesses of the device layer 101, the piezoelectric layer 102, and the top electrode layer 103 may vary depending on the implementation.

[0052] In some embodiments, the phosphorus dopant concentration n dop is preferably d / t DEV At =0.1, it is 1.99 × 10 20 cm -3 From 2.97 x 10 20 cm -3 Within the range of d / t DEV At =0.9, it is 1.20 x 10 20 cm -3 to 1.78 × 10 20 cm -3 n dop More preferably, d / t DEV At =0.1, it is 2.10 x 10 20 cm -3 From 2.86 × 10 20 cm -3 Within the range of d / t DEV At =0.9, it is 1.26 x 10 20 cm -3 to 1.72 × 10 20 cm -3 n dop is even more preferably d / t DEV At =0.1, it is 2.14 × 1020 cm -3 From 2.75 × 10 20 cm -3 Within the range of d / t DEV At =0.9, it is 1.28 x 10 20 cm -3 From 1.70 x 10 20 cm -3 is within the range.

[0053] It should be noted that doping of the outer silicon layer of the resonating element 100 does not affect the resonant frequency of the MEMS resonator, so the values ​​of phosphorus doping concentration in this disclosure always refer to the phosphorus concentration within the resonating element 100, even if not explicitly stated.

[0054] In a particular alternative embodiment, in the so-called Doping-Before-Bonding Method, a (raw) single crystal silicon wafer 301 is the starting wafer substrate for the fabrication of MEMS resonators. As shown in FIG. 7A, POCl 3 A film of PSG glass 320 is deposited on silicon wafer 301 in a furnace. A drive-in process diffuses phosphorus dopants into a surface layer 321 of silicon wafer 301. PSG layer 320 may then be etched away. Annealing at a temperature in the range of 1100° C. to 1220° C. diffuses the phosphorus dopants from surface layer 321 into deeper layers of the wafer, as shown in FIG. 7B. In some embodiments, a portion of surface layer 321 of silicon wafer 301 is then etched away. The etching depth may be 50 nm to 500 nm.

[0055] The doped silicon wafer 301 is then bonded to a silicon (handle) wafer. In some embodiments, the handle wafer 305 has a cavity 310 (cavity wafer), as shown in the exemplary embodiment of FIG. 7C. In this example, the doped silicon wafer 301 is bonded to the handle wafer 305 such that a bonded interface is formed between the original surface layer 321 of the silicon wafer 301 and the silicon oxide layer 304 on the handle wafer 305. The (undoped) backside of the doped silicon wafer 301, which is now part of the bonded wafer pair, is then removed, for example by grinding and polishing, and the remaining (doped) front side of the doped silicon wafer 301 becomes the device layer 101 (of the resonator 150) with the designed thickness. The fabrication of the resonator may proceed as described above with reference to FIGS. 4A-C.

[0056] In the embodiment shown in Figure 7D, a doped silicon wafer 301 is bonded to a silicon handle wafer 335 having a silicon oxide layer 334. The (undoped) backside of the doped silicon wafer 301, now part of the bonded wafer pair, is then removed, for example by grinding and polishing, and the remaining (doped) frontside of the doped silicon wafer 301 becomes the device layer 101 (of the resonator 150) with the designed thickness. Fabrication of the resonator may proceed as described above with reference to Figures 5D-F. In some embodiments using pre-junction doping (illustrated in FIGS. 7A-D), the phosphorus dopant concentration (n dop ) increases from the top surface 322 in the device layer 301 (of a bonded wafer pair) towards the surface 321 facing the (handle) layer. (The handle layer is formed by the cavity wafer 305 or the silicon wafer 335.) This concentration profile is illustrated in FIG.

[0057] In one embodiment, the concentration of phosphorus dopant varies with distance from the top surface of the single crystal silicon layer 301, as shown in Figure 9. The vertical axis of Figure 9 represents the absolute concentration of phosphorus dopant n dopThe horizontal axis of Fig. 9 is the relative depth d REL Relative depth d REL is defined as the distance d from the top surface of the single crystal silicon layer 301, and the thickness t of the single crystal silicon layer 301. DEV That is, d REL =d / t DEV In the exemplary embodiment illustrated by the data in FIG. DEV = 10.5 μm.

[0058] According to this data, except for the regions close to the top and bottom surfaces of the single crystal silicon layer 301, the phosphorus dopant concentration increases (monotonically) with distance d, i.e., the deeper into the single crystal silicon layer 301. Near the top surface of the single crystal silicon layer 301, d REL At n = 0.1, the phosphorus dopant concentration dop is 1.71 x 10 20 cm -3 On the other hand, near the bottom surface of the single crystal silicon layer 301, d REL At n = 0.9, the phosphorus dopant concentration dop is 2.12 × 10 20 cm -3 d REL The concentration at =0.9 is d REL = 24% higher than the concentration at 0.1.

[0059] In some embodiments, in MEMS resonators fabricated using pre-bond doping, a maximum of the phosphorus dopant concentration exists near the bottom surface of the single crystal silicon layer 301. The location of the maximum concentration is at a distance d REL may be in the range from 0.85 to 0.95.

[0060] There are several embodiments that utilize pre-junction doping techniques. A phosphorus dopant profile substantially similar to that shown in Figure 9 provides quartz levels of thermal stability for silicon MEMS resonators.

[0061] The resonant mode of the resonator may be, for example, a length extensional mode, a bending mode, a bulk acoustic mode, or a torsional mode. The shape of the resonator may also vary depending on the mode. The main motion during resonant motion may occur in-plane or out-of-plane. Here, the term "plane" refers to the plane of the device layer 301. The nominal frequency of the resonator may also be in the MHz range, such as 1 MHz to 200 MHz, or in the kHz range, such as 30 kHz to 1000 kHz, for example 32 kHz. The thicknesses of the device layer 101, the piezoelectric layer 102, and the top electrode layer 103 may vary depending on the implementation.

[0062] The inventors have performed several experiments on the thermal stability of silicon MEMS resonators with various phosphorus dopant distributions using the pre-junction doping method. The findings of these experiments can be summarized as follows: In some embodiments, the phosphorus dopant concentration n dop is preferably d / t DEV At =0.1, it is 1.20 x 10 20 cm -3 From 1.80 x 10 20 cm -3 Within the range of d / t DEV At = 0.9, it is 2.02 × 10 20 cm -3 From 2.97 x 10 20 cm -3 n dop More preferably, d / t DEV At =0.1, it is 1.26 × 10 20 cm -3 to 1.73 × 10 20 cm -3 Within the range of d / t DEV At =0.9, it is 2.10 x 10 20 cm -3 From 2.86 × 10 20 cm -3 n dop is even more preferably d / t DEV At =0.1, it is 1.28 x 10 20 cm -3to 1.71 × 10 20 cm -3 Within the range of d / t DEV = 0.9, 2.14 × 10 20 cm -3 From 2.75 × 10 20 cm -3 is within the range.

[0063] In an alternative embodiment utilizing a double-sided doping method, a single crystal device layer of silicon is doped both before and after the silicon wafer forming the device layer is bonded to a handle layer. In the first doping, phosphorus dopants are introduced into the device layer as described in connection with the pre-bond doping method with reference to Figures 7A-D. In the second doping, phosphorus dopants are introduced into the device layer as described in connection with the doping of cavity SOI and SOI wafers with reference to Figures 2A-C and 5A-C. In the double-sided doping method, the phosphorus dopant concentration profile is proportional to the relative depth d as shown in Figure 10. REL Varies as a function of .

[0064] When moving from the upper surface to the lower surface of the single crystal silicon layer 101, 301, that is, when the distance d is from 0 to t DEV When the concentration of phosphorus dopant increases to d min The phosphorus dopant concentration then increases again as one moves toward the bottom surface of the silicon layer 101, 301. However, in some embodiments, this general behavior of the phosphorus concentration near the bottom and top surfaces may be slightly different. In particular, in some embodiments, the phosphorus dopant concentration may be at a minimum at a distance d / t DEV In some cases, the phosphorus concentration reaches a maximum at a shallow depth of approximately 0.9, which is similar to the behavior shown by the data in Figure 9.

[0065] In one embodiment using double-sided doping, the doping process parameters (PSG layer thickness, drive-in time, anneal time, etc.) for the two doping steps are substantially identical. In this case, the dopant concentration is approximately at the center of the device layer (d min is about 0.5t DEV ) is a minimum. Such "symmetric" double-sided doping allows for strong doping of resonators with relatively thick device layers with relatively short annealing times. By increasing the thickness of the device layer of the resonating element, it is possible to reach higher vibration energies and thus improve the noise characteristics of the oscillator circuit using the resonator. In the exemplary case of a thermally stable silicon MEMS resonator, the device layer 101 is 22 μm thick, and the two annealing steps of the symmetric double-sided phosphorus doping may take 10 to 45 hours each. In another exemplary case of a thermally stable silicon MEMS resonator, the device layer 101 is 10 μm thick, and the two annealing steps of the symmetric double-sided phosphorus doping may take 2 to 10 hours each. In yet another exemplary case with a device layer 101 that is 30 μm thick, the two annealing steps may take 19 to 84 hours each.

[0066] In some embodiments, the phosphorus dopant concentration n dop is preferably d / t DEV At =0.1, it is 2.08 x 10 20 cm -3 From 2.97 x 10 20 cm -3 Within the range of d / t DEV At =0.5, it is 1.20 x 10 20 cm -3 From 1.86 × 10 20 cm -3 Within the range of d / t DEV = 0.9, 2.08 × 10 20 cm -3 From 2.97 x 10 20 cm -3 n dop More preferably, d / t DEVAt =0.1, it is 2.17×10 20 cm -3 From 2.86 × 10 20 cm -3 Within the range of d / t DEV At =0.5, it is 1.27 x 10 20 cm -3 to 1.77 × 10 20 cm -3 Within the range of d / t DEV At =0.9, it is 2.17×10 20 cm -3 From 2.86 × 10 20 cm -3 n dop is even more preferably d / t DEV At =0.1, it is 2.18×10 20 cm -3 From 2.75 × 10 20 cm -3 Within the range of d / t DEV At =0.5, it is 1.28 x 10 20 cm -3 From 1.75 × 10 20 cm -3 Within the range of d / t DEV At =0.9, it is 2.18×10 20 cm -3 From 2.75 × 10 20 cm -3 is within the range.

[0067] An exemplary layout of a temperature-stable MEMS resonator 150 is shown in FIG. 11. This figure shows a length-extensional-mode resonator including a resonating element 100. A vertical trench 511 passing through the material layers 101, 102, 103 defines the lateral dimension of the resonating element 100. The resonating element 100 is formed of a number (here five) of elongated resonator sub-elements 501. These sub-elements 501 are separated from adjacent sub-elements 501 by vertical trenches 512, except at their distal end portions. These distal end portions are coupled to each other by coupling elements 502.

[0068] The resonating element 100 vibrates in a single collective length-extensional resonant mode dominated by motion along the longitudinal axis (y-direction) of the elongated sub-elements 501. The resonating element 100 is tethered using suspension elements (521, 522) fixed at the nodal positions (526, 527) of the length-extensional resonant mode (and fixed at the other end to a respective support structure or structures). The suspension elements (521, 522) have elongated material portions in the y-direction to provide mechanical flexibility along the x-direction. This is to relieve mechanical stresses in the resonator material stack (layers 101, 102, 103).

[0069] In some embodiments, to minimize the variation of resonant frequency with temperature, the longitudinal axis (y direction) of the sub-element 501 is aligned along the length of the monocrystalline silicon in the element layer 101. <100> are substantially aligned with the crystal axes.

[0070] 12A-C show further features of the MEMS resonator of FIG. 11. In FIG. 12A, cross section AA′ along the axis of symmetry in the y-direction is shown. Contact pads 621 are provided for making electrical connection to the doped single crystal silicon layer 101, which in this embodiment is used as the bottom electrode layer. Openings 630 in the piezoelectric layer 102 are formed to provide a path for the electrical interconnection through the piezoelectric layer 102. Contact pads 622 are provided for electrical connection to the top electrode layer 103. The top electrode 103 is removed in several areas 631, 632 to provide galvanic isolation between the two electrodes. To excite mechanical resonant motion, an AC voltage at the resonant frequency of the in-plane length-extension resonating element 100 is connected to the contact pads 621, 622. This creates an AC electric field in the piezoelectric membrane 102, which generates forces in the plane of the piezoelectric membrane, exciting resonant motion.

[0071] A cross section BB' of the resonator of Figure 11 is shown in Figure 12B, in which trenches 512 separate the five resonator sub-elements 501.

[0072] A cross section CC' of the resonator of Figure 11 is shown in Figure 12C, in which the five resonator sub-elements 501 and their coupling elements 502 form a single piece of material.

[0073] Embodiments of the present invention significantly reduce the temperature variation of the resonant frequency of a MEMS resonator. To illustrate this point, FIG. 13A shows measurements of the resonant frequency of a 24 MHz length-extension mode resonator as the temperature varies from −30° C. to 85° C. The vertical axis of FIG. 13A shows the difference in frequency of a particular resonator relative to the frequency of the resonator at a temperature of 30° C. The frequency difference is in parts per million (ppm) relative to the frequency at a temperature of 30° C. The data in FIG. 13A shows that the variation in resonant frequency ranges from −7.5 ppm to +2.5 ppm over the temperature range of −30° C. to 85° C. The data in FIG. 13A is for an interconnected length-extension resonator having a design substantially in accordance with the diagrams of FIGS. 11 and 12A-C, with a phosphorus doping concentration profile substantially identical to the doping profile shown in FIG. 6.

[0074] FIG. 13B shows the measured resonant frequency of a length-extension mode resonator at 24 MHz using the pre-junction doping method for phosphorus doping.

[0075] The vertical axis of FIG. 13B represents the frequency difference of a resonator relative to the frequency of the resonator at a temperature of 25° C. The frequency difference is in parts per million (ppm) relative to the frequency at a temperature of 25° C. The data in FIG. 13B shows that for two particular resonator samples, the resonant frequency decreases by about 20 ppm as the temperature increases from 25° C. to 85° C. The data in FIG. 13B is for interconnected length-extended resonators having a design substantially in accordance with the diagrams of FIGS. 11 and 12A-C, with a phosphorus doping concentration profile substantially identical to the doping profile illustrated in FIG. 9.

[0076] Similar results are obtained with a MEMS resonator having the phosphorus doping profile described above with reference to FIG.

[0077] In an advantageous embodiment of a thermally stable silicon MEMS resonator having a phosphorus doping profile according to the invention, the resonant frequency varies within ±30 ppm in the temperature range of −30° C. to 85° C. relative to its resonant frequency at a temperature of 25° C. In an advantageous embodiment of a thermally stable silicon MEMS resonator having a phosphorus doping profile according to the invention, the resonant frequency varies within ±10 ppm in the temperature range of −30° C. to 85° C. relative to its resonant frequency at a temperature of 25° C.

[0078] Another embodiment of a thermally stable MEMS resonator 150 according to the present invention is shown in Figures 14A-B. This resonator is a flexural-mode resonator that vibrates in an out-of-plane mode. As shown in Figure 14A, vertical trenches 111 through material layers 101, 102, and 103 define the lateral dimensions of a beam-type resonating element 100 that vibrates in a resonant mode dominated by motion perpendicular to the plane of material layers 101, 102, and 103 (i.e., out-of-plane, along the z-direction). In some embodiments, to minimize the variation in resonant frequency with temperature, the longitudinal axis (y-direction) of the beam-type resonating element 100 is aligned along the y-axis of the single crystal silicon in element layer 101. <100> are substantially aligned with the crystal axes.

[0079] Figure 14B shows further features of the resonator of Figure 14A along cross section AA' along the y-direction. Contact pads 621 are provided to make electrical connection to the doped single crystal silicon layer 101, which in this embodiment is used as the bottom electrode layer. Openings 630 in the piezoelectric layer 102 are formed to provide paths for electrical interconnects through the piezoelectric layer 102. Contact pads 622 are provided for electrical connection to the top electrode layer 103. The top electrode has been removed in some areas 632 to provide galvanic isolation between the two electrodes.

[0080] Another embodiment of a thermally stable MEMS resonator 150 according to the invention is shown in Figures 15A-C. This resonator has two monocrystalline layers 101 and 803 doped with phosphorus atoms with a concentration distribution according to one or more of the previous embodiments. In a preferred embodiment, the doping concentration of phosphorus in at least one of the monocrystalline silicon layers 101 or 803 is at a position d REL = 0.1 and d REL In a more preferred embodiment, both the single crystal silicon layers 101 and 803 have a concentration profile at a position d REL = 0.1 and d REL The doping concentration of phosphorus at .mu.m=0.9 follows any of the preferred concentration ranges shown above. The doped silicon layer 101 may be used as the bottom electrode layer and the doped silicon layer 803 may be used as the top electrode. In some embodiments, the thickness of layer 803 ranges from 2 .mu.m to 20 .mu.m. In some embodiments, the phosphorus doped single crystal silicon (i.e., layers 101 and 803) forms 50% or more of the mass of the resonating element 100. Methods used to dope layers 101 and 803 include the doping of a CSOI or SOI starting wafer as described with reference to FIGS. 2A-C and 5A-F, the pre-bonding doping method as described with reference to FIGS. 7A-D, and the double-sided doping method as described with reference to FIG. 10.

[0081] A cross section AA' of the resonator of FIG. 15A is illustrated in FIG. 15C, and a cross section CC' of the resonator of FIG. 15A is illustrated in FIG. 15B. In some embodiments, as shown in FIG. 15B and FIG. 15C, an intermediate material layer 102' is provided between the piezoelectric layer 102 and the silicon layer 803. This layer 102' may be used to bond the silicon layer 803 to the piezoelectric layer 102. In some embodiments, there is a material layer 803' (patterned as shown in FIG. 15A and FIG. 15B or a uniform layer) on the resonating element that can be used, for example, to tweak the resonant frequency of the resonator. The thickness of the material layer 803' may be in the range of 0.1 μm to 0.4 μm.

[0082] In the embodiment shown in Fig. 15A, the layout of the resonating element 100 corresponds to that of a length-extension mode resonator. The resonating element 100 vibrates in a resonant mode dominated by longitudinal (y-direction) motion. Vertical trenches 111 through the material layers (101, 102, 102', 803) define the lateral dimensions of the resonating element 100. The resonating element 100 is anchored using suspension elements (821, 822) fixed to the resonating element 100 at the nodal points of the length-extension resonant mode. The other ends of the suspension elements (821, 822) are fixed to one or more support structures.

[0083] FIG. 15C shows further features of the resonator at cross section AA′ along the x-direction. In this embodiment, a contact pad 621 is provided to make electrical connection to the doped single crystal silicon layer 101 used as the bottom electrode layer. An opening 630 through the piezoelectric layer 102, the intermediate layer 102′, and the top electrode layer 803 is formed to provide a passage to the bottom electrode 101. A contact pad 622 is provided for electrical connection to the top electrode layer 803. The top electrode (single crystal silicon) layer 803 is patterned with a trench 632 that extends down to the intermediate layer 102′ to provide galvanic isolation between the electrical (inter)connections. (In the embodiment shown in FIG. 15C, the intermediate layer 102′ is assumed to be electrically insulating).

[0084] In some embodiments, to minimize the temperature variation of the resonant frequency, the crystal orientation of the monocrystalline silicon layers 101 and 803 and the layout of the resonant element 100 are determined by the crystal orientation of the monocrystalline silicon in the (underlying) silicon layer 101. <100> The crystal axis and the single crystal silicon in the (upper) silicon layer 803 <100> The crystal axes and the longitudinal axis of the resonating element 100 (the y-direction and the direction of the elongated material portion of the resonating element) are all aligned substantially parallel to one another.

[0085] Without limiting the scope and interpretation of the claimed invention, one or more technical effects of the exemplary embodiments disclosed herein are listed below. One technical effect is that the resonant frequency of the silicon MEMS resonator has a small temperature variation (i.e., good thermal stability). Another technical effect is that the phosphorus doping profile is achieved at a relatively low annealing temperature with an annealing time suitable for cost-effective mass production.

[0086] The above description provides a complete and informative description of the best mode currently contemplated by the inventors for carrying out the present invention, by way of non-limiting examples of specific implementations and embodiments of the present invention. However, as will be apparent to those skilled in the art, the details of the above-described embodiments do not limit the present invention, and may be implemented in other embodiments using equivalent means without departing from the characteristics of the present invention.

[0087] Moreover, features of the embodiments of the present invention disclosed above may be used without the corresponding use of other features. Accordingly, the foregoing description should be considered as merely illustrative of the principles of the present invention, and not in limitation thereof. The scope of the present invention is therefore limited only by the appended claims.

Claims

1. A MEMS resonator, comprising: a substrate; a resonance element; a cavity; wherein the resonance element is separated from the substrate by the cavity, and the resonance element includes a layer of single-crystalline silicon, or, The layer of the single-crystalline silicon is doped with phosphorus atoms, and the concentration n of the phosphorus atoms ｄｏｐ is (i) d / t ＤＥＶ = 0.1, in the range of 1.99×10 ２０ cm －３ to 2.97×10 ２０ cm －３ and when d / t ＤＥＶ = 0.9, in the range of 1.20×10 ２０ cm －３ to 1.78×10 ２０ cm －３ and or, (ii) d / t ＤＥＶ = 0.1, in the range of 1.20×10 ２０ cm －３ to 1.80×10 ２０ cm －３ and when d / t ＤＥＶ = 0.9, in the range of 2.02×10 ２０ cm －３ to 2.97×10 ２０ cm －３ and a MEMS resonator. (iii) d / t ＤＥＶ At d / t = 0.1, it is in the range of 2.08×10 ２０ cm －３ to 2.97×10 ２０ cm －３ ; at d / t ＤＥＶ = 0.5, it is in the range of 1.20×10 ２０ cm －３ to 1.86×10 ２０ cm －３ ; at d / t ＤＥＶ = 0.9, it is in the range of 2.08×10 ２０ cm －３ to 2.97×10 ２０ cm －３ ; and Here, d is the distance between the position within the layer of the single-crystal silicon and the upper surface of the layer of the single-crystal silicon, and t ＤＥＶ is the thickness of the single-crystal silicon layer.

2. The MEMS resonator according to claim 1, further comprising a layer of piezoelectric material for exciting the resonance element into a resonance mode.

3. The MEMS resonator according to claim 2, wherein the thickness of the layer of piezoelectric material ranges from 1 μm to 2 μm.

4. The MEMS resonator according to claim 1, wherein the thickness of the layer of single-crystalline silicon ranges from 9 μm to 17 μm.

5. The MEMS resonator according to claim 1, wherein phosphorus-doped single-crystalline silicon forms 50% or more of the mass of the resonance element.

6. The MEMS resonator according to claim 1, wherein the variation in resonance frequency in the temperature range from -30°C to 85°C is within ±30 ppm with respect to the resonance frequency at a temperature of 25°C.

7. The MEMS resonator according to claim 1, wherein the resonance element has an elongate material portion substantially parallel to the <100> crystal axis of the layer of single-crystalline silicon within the plane of the layer of single-crystalline silicon.

8. The MEMS resonator according to claim 1, wherein the resonance element has an elongate material portion configured to resonate in a length-extension resonance mode or a bending resonance mode.

9. or, the concentration n of the phosphorus atom ｄｏｐ is (i) d / t ＤＥＶ = 0.1, it is within the range of 2.10×10 ２０ cm －３ to 2.86×10 ２０ cm －３ and when d / t ＤＥＶ = 0.9, it is within the range of 1.26×10 ２０ cm －３ to 1.72×10 ２０ cm －３ and or, (ii) d / t ＤＥＶ = 0.1, in the range of 1.26×10 ２０ cm －３ to 1.73×10 ２０ cm －３ and when d / t ＤＥＶ = 0.9, in the range of 2.10×10 ２０ cm －３ to 2.86×10 ２０ cm －３ and the MEMS resonator according to claim 1. (iii) d / t ＤＥＶ At d / t = 0.1, it is in the range from 2.17×10 ２０ cm －３ to 2.86×10 ２０ cm －３ ; at d / t ＤＥＶ = 0.5, it is in the range from 1.27×10 ２０ cm －３ to 1.77×10 ２０ cm －３ ; and at d / t ＤＥＶ = 0.9, it is in the range from 2.17×10 ２０ cm －３ to 2.86×10 ２０ cm －３ .

10. or, the concentration n of the phosphorus atom ｄｏｐ is (i) d / t ＤＥＶ = 0.1, it is within the range of 2.14×10 ２０ cm －３ to 2.75×10 ２０ cm －３ and when d / t ＤＥＶ = 0.9, it is within the range of 1.28×10 ２０ cm －３ to 1.70×10 ２０ cm －３ and or, (ii) d / t ＤＥＶ = 0.1, it is in the range of 1.28×10 ２０ cm －３ to 1.71×10 ２０ cm －３ and when d / t ＤＥＶ = 0.9, it is in the range of 2.14×10 ２０ cm －３ to 2.75×10 ２０ cm －３ and the MEMS resonator according to claim 1. (iii) d / t ＤＥＶ = 0.1, it is in the range of 2.18×10 ２０ cm －３ to 2.75×10 ２０ cm －３ ; when d / t ＤＥＶ = 0.5, it is in the range of 1.28×10 ２０ cm －３ to 1.75×10 ２０ cm －３ ; when d / t ＤＥＶ = 0.9, it is in the range of 2.18×10 ２０ cm －３ to 2.75×10 ２０ cm －３ within this range.

11. The MEMS resonator according to claim 1, wherein the resonance element has two layers of single-crystalline silicon.

12. The MEMS resonator according to claim 1, wherein the resonance element does not contain precipitates of a compound containing silicon and phosphorus.

13.

14. The concentration n of the phosphorus atom ｄｏｐ is d / t ＤＥＶ The MEMS resonator according to claim 1, which exhibits a local maximum concentration in the range of 0.85 to 0.95 for d / t. The MEMS resonator according to claim 1, wherein the resonance element includes two layers of single-crystalline silicon, and the <100> crystal axis of the first layer among the two layers and the <100> crystal axis of the second layer among the two layers are aligned substantially parallel to each other within the plane of each layer.

15. A method of manufacturing the MEMS resonator according to any one of claims 1 to 14, comprising: taking a starting wafer substrate; performing a process of creating the resonance element and the cavity, wherein the layer of single-crystalline silicon is doped using thermal diffusion doping.

16. ​ The resonance element includes two layers of single-crystalline silicon, one of the two layers being doped with phosphorus atoms according to one of (i), (ii), and (iii) as recited in claim 1, and the other of the two layers also being doped with phosphorus atoms according to one of (i), (ii), and (iii) as recited in claim 1, the method according to claim 15.

17. A wafer having a MEMS resonator, wherein the MEMS resonator includes a substrate, a resonance element, and a cavity, the resonance element being separated from the substrate by the cavity, the resonance element including a layer of single-crystalline silicon, the layer of single-crystalline silicon being doped with phosphorus atoms, and the concentration n dop of the phosphorus atoms being (i) in the range of 1.99×10 20 cm -3 to 2.97×10 20 cm -3 at d / t DEV = 0.1, and in the range of 1.20×10 20 cm -3 to 1.78×10 20 cm -3 at d / t DEV = 0.9, or (ii) in the range of 1.20×10 20 cm -3 to 1.80×10 20 cm -3 at d / t DEV = 0.1, and in the range of 2.02×10 20 cm -3 to 2.97×10 20 cm -3 at d / t DEV = 0.9, or (iii) in the range of 2.08×10 20 cm -3 to 2.97×10 20 cm -3 at d / t DEV = 0.1, in the range of 1.20×10 20 cm -3 to 1.86×10 20 cm -3 at d / t DEV = 0.5, and in the range of 2.08×10 20 cm -3 to 2.97×10 20 cm -3 at d / t DEV = 0.9, where d is the distance between the position within the layer of single-crystalline silicon and the upper surface of the layer of single-crystalline silicon, and t DEV is the thickness of the layer of single-crystalline silicon, wafer.

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