Filtering intracardiac electrograms in presence of pacing spikes

Abstract

To remove a pacing artifact.SOLUTION: A method for removal of a pacing artifact includes registering the fact that a pacing signal has been applied to a pacing location in a heart of a patient. First and second electrodes are positioned respectively in first and second locations in proximity to the pacing location. First and second circuits, having different respective first and second transfer functions, are coupled to receive respective first and second ECG signals, generated in response to the pacing signal, from the first and second electrodes. First and second derived ECG signals are recorded from the first and second circuits in response to the first and second ECG signals. At least one of the first and second derived ECG signals is analyzed in response to registering the pacing signal. In response to the analysis, the pacing artifact is removed from the least one of the first and second derived ECG signals.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] (CROSS REFERENCE TO RELATED APPLICATIONS) This application claims the benefit of U.S. Provisional Patent Application No. 63 / 528,709, filed July 25, 2023, which is incorporated herein by reference.

[0002] FIELD OF THEINVENTION The present disclosure relates generally to electrophysiology, and specifically to signal acquisition during electrophysiology procedures. [Background technology]

[0003] During electrophysiology procedures, such as mapping the electrical properties of one or more chambers of the heart, it may be advantageous to apply a pacing signal to the heart. Such a signal injects an electrical current into the heart. [Brief description of the drawings]

[0004] The present disclosure will be understood from the following detailed description taken in conjunction with the accompanying drawings. [Figure 1] 1 illustrates a catheter-based electrophysiological mapping and ablation system according to an example of the present disclosure. [Figure 2A] FIG. 1 is a schematic block diagram illustrating elements of a system used during a pacing procedure performed on the heart, according to an example of the present disclosure. [Figure 2B] FIG. 1 is a schematic block diagram illustrating elements of a system used during a pacing procedure performed on the heart, according to an example of the present disclosure. [Diagram 3] 1 shows a schematic diagram of pacing artifacts for balanced and unbalanced systems according to an example of the present disclosure. [Figure 4] FIG. 13 is a block diagram illustrating the functionality of a signal analysis and pacing artifact removal block according to an example of the present disclosure. [Diagram 5] FIG. 11 is a flow diagram illustrating steps performed by a processor to implement DC correction in a DC correction block according to an example of the present disclosure. [Figure 6] 13 shows a graph illustrating the operation of a DC correction block according to an example of the present disclosure. [Figure 7] 1 shows a flow diagram of steps performed by a processor in calculating artifact reference time (ART) points in time according to an example of the present disclosure. [Figure 8] FIG. 13 is a flow diagram showing steps for calculating a fit function and applying a decay function for baseline correction according to an example of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0005] overview During electrophysiology procedures, pacing provides the practitioner performing the procedure with a means of characterizing the myocardium. Pacing involves injecting an electrical pulse, called a pacing signal, into a location in the myocardium and sensing intracardiac electrophysiological (EP) signals that are generated in regions of the myocardium other than the location of injection. Intracardiac EP signals are assumed herein to include unipolar EP signals, unless otherwise indicated, and are generated as a result of the action of the pacing signal on the myocardium. Pacing may be provided by an electrode on the catheter, and unipolar EP signal sensing may be performed by one or more other electrodes, referred to herein as acquisition electrodes, that may be on that catheter or other catheters.

[0006] In addition to the detected EP signal, pacing may generate electrical signals other than the EP signal on the acquisition electrodes. Such signals, referred to herein as pacing artifacts, are typically caused by changes in the electrical potential field within the heart due to the pacing signal, where the acquisition electrodes are placed. The EP signal, along with the artifacts, are typically recorded on an intracardiac electrocardiogram (ECG) generated during the procedure, and the ECG may be analyzed to accomplish multiple clinical needs, such as, for example, determination of local activation times (LAT) and wavefront mapping.

[0007] However, the presence of pacing artifacts in the ECG can lead to errors in the ECG analysis.

[0008] In the examples of the present disclosure, the ECG analysis is assumed to include analysis of two unipolar EP signals acquired from two acquisition electrodes, as well as analysis of a bipolar EP signal derived from the two unipolar signals. The two acquisition electrodes are each connected to an ECG recording system by a respective transfer circuit. Each transfer circuit applies a respective transfer function to its received signal such that two derived unipolar EP signals are provided to the ECG recording system. The derived bipolar EP signal analyzed by the recording system is formulated by calculating the difference between the two derived unipolar EP signals.

[0009] In some instances, the two transfer circuits for the two electrodes are nominally the same, with components having the same nominal values ​​located identically, so that both circuits have the same nominal transfer function. Although pacing artifacts may be substantially reduced in ECG analysis of the derived bipolar EP signal, deviations from component nominal values, as well as the fact that the two acquisition electrodes do not acquire exactly the same pacing artifacts due to their different spatial locations relative to the pacing source and / or the electrode difference itself, typically leave residual pacing artifacts in the derived bipolar signal. The residual pacing artifacts are referred to herein as common transfer function pacing artifacts.

[0010] In some instances, the two transfer circuits for the two electrodes are different, such that each circuit applies a different transfer function to its received signal, in which case the pacing artifact, referred to herein as a different transfer function pacing artifact, is typically larger than a common transfer function pacing artifact.

[0011] Examples of the present disclosure provide algorithms that analyze derived EP signals to identify and compensate for the presence of both types of pacing artifacts described above.

[0012] Artifacts typically modify the signal acquired by the acquisition electrodes in several ways, including altering the DC (direct current) voltage level of the signal and altering the slope of the baseline of the signal, i.e., imparting baseline wander to the signal. The algorithm corrects for any altered DC level and any baseline wander, and also corrects for any remaining modifications to the signal.

[0013] The following algorithm is applied: Minimize the effect of artifacts on ECG display Eliminates inaccurate bipolar voltage measurements that can be caused by artifacts Eliminate false candidate annotations on ECG.

[0014] System Description In the following description, similar elements will be identified by the same numerals and, where necessary, distinguished by adding a letter as a suffix to the numerals.

[0015] Reference is now made to FIG. 1, which shows a catheter-based electrophysiological mapping and ablation system 10 according to one example of the present disclosure. The system 10 includes multiple catheters that are percutaneously inserted by a physician 24 through a patient's vascular system into a cavity or vasculature of the heart 12. Typically, a delivery sheath catheter is inserted into the left or right atrium near a desired location of the heart 12. The multiple catheters can then be inserted into the delivery sheath catheter to reach the desired location. The multiple catheters may include catheters dedicated to sensing Intracardiac Electrogram (IEGM) signals, catheters dedicated to ablation, and / or catheters dedicated to both sensing and ablation. An exemplary catheter 14 configured for sensing is illustrated herein. The physician 24 brings a distal tip 28 of the catheter 14 into contact with the heart wall to sense an electropotential (EP) at a target site of the heart 12.

[0016] The catheter 14 is an exemplary multi-spine catheter that includes multiple electrodes 26 distributed on the spines of the catheter. The catheter 14 may additionally include a position sensor 29 embedded in or near the distal tip 28 for tracking the position and orientation of the distal tip 28. Optionally and preferably, the position sensor 29 is a magnetic-based position sensor that includes three magnetic coils for sensing three-dimensional (3D) position and orientation.

[0017] The magnetic-based position sensor 29 may operate in conjunction with a location pad 25 that includes a plurality of magnetic coils 32 configured to generate a magnetic field within a predetermined working volume. The real-time position of the distal tip 28 of the catheter 14 may be tracked based on the magnetic fields generated by the location pad 25 and sensed by the magnetic-based position sensor 29. Details of magnetic-based position sensing technology are described in U.S. Patent Nos. 5,539,199; 5,443,489; 5,558,091; 6,172,499; 6,239,724; 6,332,089; 6,484,118; 6,618,612; 6,690,963; 6,788,967; and 6,892,091.

[0018] The system 10 includes one or more electrode patches 38 positioned for skin contact on the patient 23 to establish a positional reference for the location pads 25 and impedance-based tracking of at least some of the electrodes 26. For impedance-based tracking, a current is directed to the electrodes 26 and sensed at the electrode skin patch 38, so that the location of each electrode can be triangulated via the electrode patch 38. Details of impedance-based position tracking techniques are described in U.S. Patent Nos. 7,536,218, 7,756,576, 7,848,787, 7,869,865, and 8,456,182, which are incorporated herein by reference.

[0019] Recorder 11 displays electrograms 21 captured by body surface ECG electrodes 18 and intracardiac electrograms (IEGMs), which may be captured by electrodes 26 of catheter 14. Recorder 11 may include pacing capability for pacing the cardiac rhythm and / or may be electrically connected to a stand-alone pacer. As described further below, in some examples, a pacing signal may be delivered through one of electrodes 26 or through a separate intracardiac electrode.

[0020] System 10 may include an ablation energy generator 50 adapted to deliver ablation energy to one or more of electrodes 26. The energy generated by ablation energy generator 50 may include, but is not limited to, radiofrequency (RF) energy or pulsed-field ablation (PFA) energy, including unipolar or bipolar high-voltage DC pulses, such as may be used to effect irreversible electroporation (IRE), or combinations thereof.

[0021] The patient interface unit (PIU) 30 is an interface configured to establish electrical communication between the catheters, the electrophysiological equipment, a power source, and a workstation 55 for controlling the operation of the system 10. The electrophysiological equipment of the system 10 may include, for example, multiple catheters, location pads 25, body surface ECG electrodes 18, electrode patches 38, an ablation energy generator 50, and a recorder 11. Optionally and preferably, the PIU 30 additionally includes processing capabilities for implementing real-time calculations of the catheter positions and performing ECG calculations.

[0022] A system processing unit (SPU) 60 between the PIU 30 and the catheter 14 couples the PIU to the catheter's electrodes 26 via cabling 65 between the PIU and the SPU and cabling 63 between the SPU and the electrodes. In some examples, the SPUs 60 include respective front-end circuitry 64, assumed herein to include low noise preamplifier, analog-to-digital (A / D) converter, and filter circuitry, that is applied to the EP signals acquired by each electrode 26 before the signals are transmitted to the PIU. In some examples, the SPUs include respective modified front-end circuitry 68 that includes circuitry 64 plus further elements that enable current to be injected into the corresponding electrode 26 so that the electrode can be used for impedance-based tracking, as described above.

[0023] In the examples of this disclosure, the A / D converters referred to above are assumed to sample and digitize their analog signals at a rate of 1 ms.

[0024] The workstation 55 includes a processor 22 having a memory, a memory or storage device having suitable operating software stored therein, and a user interface capability. The workstation 55 may optionally provide multiple functions including: (1) modeling the endocardial anatomical structures in three dimensions (3D) and rendering a model or anatomical map 20 for display on a display device 27; (2) displaying activation sequences (or other data) compiled from recorded electrograms 21 in a representative visual display or image superimposed on the rendered anatomical map 20 on the display device 27; (3) displaying the real-time position and orientation of the distal tip 28 within the heart chamber; and (4) displaying sites of interest, such as where ablation energy has been applied, on the display device 27. One commercially available product embodying elements of the system 10 is available as the CARTO™ 3 system, available from Biosense Webster, Inc., 31A Technology Drive, Irvine, CA 92618.

[0025] Pacing with System 10 2A and 2B are schematic block diagrams illustrating elements of the system 10 used during a pacing procedure performed by the system on the heart 12, according to one example of the present disclosure. In this procedure, a pacing signal is injected into a region of the heart, and a resultant intracardiac EP signal generated in response to the pacing signal is acquired by electrodes on the distal tip 28 of the catheter 14 in contact with the heart 12. The figures show two such electrodes, electrodes 26A, 26B, which are assumed herein, by way of example, to be on a common spine of the distal tip. However, in other examples of the present disclosure, the electrodes 26A, 26B are not on a common spine of the distal tip 28. The electrodes 26A, 26B are also referred to herein as acquisition electrodes 26A, 26B. As described below, the signals acquired by the electrodes 26A, 26B are used to calculate a bipolar EP signal between the two electrodes.

[0026] 2A, each acquisition electrode 26A, 26B is connected by a respective transfer circuitry 72A, 72B to a signal analysis and pacing artifact removal block 76. The structure and function of block 76 is described below, and by way of example, it is assumed that the elements of the block are located in the PIU 30. The output of block 76 includes resultant unipolar and bipolar signals derived from the respective signals acquired by electrodes 26A, 26B, with any pacing artifacts present on the acquired signals removed. The resultant signals from block 76 may be provided to the workstation 55, which may use the resultant signals, for example, to display and analyze the corresponding IEGMs with the pacing artifacts removed.

[0027] 2A, transfer circuitry 72A and 72B have the same physical components. Thus, circuitry 72A includes cabling 63A coupling electrode 26A to front-end circuitry 64A, front-end circuitry 64A, and cabling 65A coupling front-end circuitry 64A to block 76, and circuitry 72B includes cabling 63B coupling electrode 26B to front-end circuitry 64B, front-end circuitry 64B, and cabling 65B coupling front-end circuitry 64B to block 76.

[0028] The components of the two transmission circuit sections illustrated in Figure 2A are connected in the same configuration in the two circuit sections, so this figure illustrates a balanced system. However, it will be understood that although the physical components of the two transmission circuit sections may have the same nominal values, the actual electrical parameters associated with the components, such as their gain and / or impedance, will typically be different because the respective components of the circuits, such as their respective preamplifiers, are physically different.

[0029] Due to differences in the actual electrical parameters of the components of circuitry 72A and 72B, including differences in the characteristics of the individual electrodes, the respective signal transfer functions associated with each circuitry are different. The signal transfer function of a given transfer circuitry includes a function that defines the resultant signal generated by the transfer circuitry for a given input signal.

[0030] The input signal acquired by a given electrode 26 is composed of two sub-signals: a unipolar EP signal, which is generated at least in part in response to a pacing signal injected into heart 12, and a pacing artifact, which is also generated by direct conduction, induction, and / or radiation in response to the pacing signal. Due to the physical separation of electrodes 26A, 26B, the unipolar EP signal component acquired by electrode 26A is different from the unipolar EP signal component of electrode 26B. Similarly, the pacing artifact acquired by electrode 26A is different from the artifact acquired by electrode 26B.

[0031] In the example of the present disclosure, block 76 receives the resulting unipolar EP signals of circuitry 72A and circuitry 72B, also referred to herein as the raw or derived unipolar EP signals of circuitry 72A and circuitry 72B, and first calculates the difference of the derived signals to form a raw bipolar EP signal. As described below, block 76 is configured to remove pacing artifacts from the two raw unipolar EP signals and from the raw bipolar EP signal output by the block.

[0032] Reference is now made to Figure 2B. Except for differences that will be described below, the operation of the elements illustrated in Figure 2B is generally similar to that of the elements in Figure 2A, and elements designated by the same reference numbers in both figures are generally similar in structure and operation.

[0033] In contrast to the balanced system illustrated in Fig. 2A, the system illustrated in Fig. 2B is an unbalanced system. In Fig. 2B, electrode 26A is connected to block 76 by transfer circuitry 72A, which comprises cabling 63A, front-end circuitry 64A, and cabling 65A, as described above. However, electrode 26B is connected to block 76 by transfer circuitry 80B. Transfer circuitry 80B comprises modified front-end circuitry 68B, cabling 63B connecting circuitry 68B to electrode 26B, and cabling 65B connecting circuitry 68B to block 76.

[0034] As with the balanced system of FIG. 2A, in the unbalanced system of FIG. 2B, block 76 receives the raw unipolar EP signal of circuit portion 72A and the raw unipolar EP signal of circuit portion 80B and first calculates the difference of the raw signals to form a raw bipolar EP signal. As with the balanced system, block 76 is configured to remove pacing artifacts from the two raw unipolar EP signals and from the raw bipolar EP signal output by the block. Typically, pacing artifacts in the raw bipolar EP signal of an unbalanced system are larger than pacing artifacts in the raw bipolar EP signal of a balanced system.

[0035] 3 shows a schematic diagram of pacing artifacts for balanced and unbalanced systems, according to one example of the present disclosure. Graph 90 is a graph of voltage versus time of the raw bipolar EP signal for a balanced system, as initially calculated by block 76, and graph 94 is a graph of voltage versus time of the raw bipolar EP signal for an unbalanced system. The pacing artifacts occur approximately at time T 1 and T 2 and as is evident from the graph, the pacing artifact for the unbalanced system, referred to herein as the different transfer function pacing artifact, is larger than the pacing artifact for the balanced system, referred to herein as the common transfer function pacing artifact.

[0036] In the example of the present disclosure, block 76 is configured to remove pacing artifacts, illustrated in FIG. 3 for the balanced system shown in FIG. 2A and the unbalanced system shown in FIG. 2B, from the signal output by the block.

[0037] 4 is a block diagram illustrating the functionality of signal analysis and pacing artifact removal block 76, according to one example of the present disclosure. The pacing artifacts imparted to each of the raw unipolar EP signals derived from the electrodes 26, and to the raw bipolar EP signals formed from the unipolar signals, typically include the following elements: DC level change Baseline Slope Change Residual signal change.

[0038] For each of the three raw signals, two raw unipolar EP signals and one raw bipolar EP signal, the disclosed example analyzes the signals received from the electrodes 26 to calculate the DC level change and uses the calculation to correct for that change in a DC correction block 100. The DC corrected signal is then communicated to a baseline correction block 104, where the baseline slope is measured at two different times and the measured slope is used to generate a function that is applied to the baseline to correct for the slope change. The baseline corrected signal is communicated to a filtering block 108, where typically small but residual signal changes are removed by applying a filtering network to the baseline corrected signal.

[0039] The following sections describe the operation of each block in the signal analysis and pacing artifact removal block 76. The operations are performed under the overall control of the processor 22.

[0040] DC Correction Figure 5 is a flow diagram 120 showing steps performed by the processor 22 to implement the DC correction of block 100, and Figure 6 shows a graph illustrating the operation of the block, according to an example of the disclosure. The processor operates on the sampled digitized signal and calculates the DC correction.

[0041] In an initial pacing registration step 124, the processor 22 registers that a pacing signal has been injected into the heart 12 and uses the time of registration as a pacing indication, also referred to herein as a fiducial time point. The processor also identifies the sample at the fiducial time point as a fiducial sample. The injection of the pacing signal typically generates a voltage on the electrodes 26 of the catheter 14 other than electrodes 26A, 26B, or on an electrode of another catheter that may be positioned within the heart 12. Because the voltage generated is usually at least twice the typical maximum EP voltage generated by the heart 12, the processor can assume that this voltage is caused by the injection of the pacing signal.

[0042] The following description applies to the analysis performed on each of the three signals received by block 76: two raw unipolar EP signals and one raw bipolar EP signal.

[0043] In a prior DC level step 128, the processor measures the average DC level of the raw EP signal over a pre-set prior time window before the reference time point. In one example, the prior time window has a fixed width of 3 ms between 5 ms and 2 ms before the reference time point. The time window boundaries are typically selected to be as close as possible to the reference time point.

[0044] In a post-DC level step 132, the processor measures the DC level at a dynamic time point within a post-time window after the reference time point. In one example, the post-time window is 10 ms to 20 ms after the reference time point, and the dynamic time point within the window, also referred to herein as the artifact reference time (ART), may be determined by an algorithm described below with reference to flow diagram 160 of FIG.

[0045] In a final step 136, the processor determines the difference between the DC levels of step 132 and step 128 and applies this difference to correct the raw EP signal after the reference time point. The DC corrected signal formed in step 136 is communicated to the baseline correction block 104.

[0046] 6 illustrates DC correction applied to a raw bipolar EP signal according to one example of the present disclosure. Graph 148 is a graph of voltage versus time of the raw EP bipolar signal before application of the DC correction, and graph 152 is a graph of voltage versus time after application of the correction (translated parallel to the voltage axis for clarity). As illustrated by the graphs, the DC correction shifts the baseline after the input signal, including the pacing response and artifacts, so that the shifted baseline begins at the same voltage level as the baseline before the input signal.

[0047] 7, which shows a flow diagram 160 of steps performed by processor 22 in calculating the artifact reference time (ART) point in time, according to one example of the present disclosure. In contrast to the pre-set time windows described above, which use pre-set points in time, the ART is a dynamic point in time that can change from signal to signal, as noted above.

[0048] As explained above, to correct for the presence of pacing artifacts, examples of the present disclosure apply DC correction and baseline correction. The ART serves as a dynamic time point used to separate the application of DC correction from the application of baseline correction, providing a balance between the short artifact period from the reference time point, i.e., pacing instruction to ART, and the period following ART with a smaller residual voltage artifact.

[0049] In a first step 164, the processor delineates preset boundaries of a time window over which the ART is to be calculated. In one example, the first boundary is set 10 ms after the pacing instruction and the last boundary is set 20 ms after the pacing instruction, although the preset boundaries may be different in other examples.

[0050] In a first calculation step 168, the processor calculates the absolute value of the moving average of the averages of the differences of the subsets of samples up to the last window boundary. In one example, the processor uses subsets of three consecutive samples and calculates the average of each of the differences of each of the subsets according to the following formula:

[0051]

number

[0052] It will be understood that equation (1) is one way to calculate the average value, and that one of ordinary skill in the art will recognize other ways, and all such ways are intended to be within the scope of the present disclosure.

[0053] In a second calculation step 172, the processor determines the difference between the average value calculated in step 168 and the average value of the last window boundary according to equation (2).

[0054]

number

[0055] In a final step 176, the processor searches backwards from the last boundary difference for the first sample that crosses the preset threshold and occurs after the first window boundary. In one example of the present disclosure, the preset threshold is 0.5 mV / ms.

[0056] The processor uses the sample time determined in this step as the ART.

[0057] Baseline correction In addition to the DC changes mentioned above, pacing artifacts include changes in the slope of the EP baseline. To counter this, examples of the present disclosure analyze the baseline and generate a baseline fitness function and a decay function in response to the analysis. The fitness function is designed to eliminate the baseline slope artifact, and the decay function is designed to ensure that the fitness function decreases over time, eventually eliminating the effect of the fitness function.

[0058] Examples of the present disclosure use a fitness function of the form given by equation (3) below: Equation (3) is a time-decaying exponential function corresponding to the charge / discharge characteristics of a fixed impedance RC circuit.

[0059]

number

[0060] Examples of the present disclosure use a high-pass infinite impulse response (IIR) filter on the acquired signal, which effectively generates the derivative of the signal being filtered for low frequencies. To accommodate this, the derivative of the fitting function is matched to the measured derivative of the EP signal. By performing this matching, the IIR filter does not introduce any additional artifacts into the signal.

[0061] FIG. 8 is a flow diagram 200 illustrating steps performed by the processor 22 to calculate a fitting function and apply a decay function for baseline correction of block 104 (FIG. 4) according to one example of the present disclosure.

[0062] In an initial pacing registration step 204, the processor identifies the artifact reference time (ART) of the EP signal as described above with reference to flow diagram 160 (FIG. 7).

[0063] In a sample selection step 208, the processor selects a preset number of sample EP signals following the ART from the DC corrected signal received from block 100. In the disclosed example described herein, ten samples s[1], s[2], ... s

[10] are selected, although other examples may have more or less than ten samples.

[0064] From the selected samples, the processor calculates the average value of the derivative of the first sample of the selected set and the average value of the derivative of the last sample of the selected set, in a calculation step 212. In one example, assume there are three first samples with values ​​s[1], s[2], s[3] and three last samples with values ​​s[8], s[9], s

[10] .

[0065] The first three samples have an average derivative, referred to herein as K1, given by equation (4).

[0066]

number

[0067] The last three samples have an average derivative, referred to herein as K9, given by equation (5).

[0068]

number

[0069] Processor 22 uses the calculated values ​​of K1 and K9 to determine the values ​​of α and γ in equation (3), as described below.

[0070] From equation (3), the partial derivative of F(n) with respect to n is given by:

[0071]

number

[0072] If n=0,

[0073]

number

[0074]

number

[0075] For n=9,

[0076]

number

[0077]

number

[0078] Using equations (7) and (8), one can solve for α and γ to obtain:

[0079]

number

[0080] In an application step 216, the processor substitutes the values ​​of α and γ calculated in equations (9) and (10) into equation (3) to give the following equation for the baseline fitting function:

[0081]

number

[0082] To ensure that the baseline fit function eventually reduces to zero for large values ​​of n, the processor applies a damping function D to the fit function. The damping function prevents the EP signal from exceeding the allowable dynamic range and also prevents the signal from having baseline variations in the IIR filters of the system.

[0083] In one example, the decay function D is defined according to the following equation:

[0084]

number

[0085] The time constant τ is expressed as follows according to equation (14): p It is set to be proportional to

[0086]

number

[0087] In one example, K is equal to the product of the time interval corresponding to the maximum possible rate of pacing in a clinical setting and the maximum saturation value of the ECG signal. In the disclosed example, the time interval is about 300 ms and the maximum saturation value is about 50 mV.

[0088] The processor calculates a correction value C(n) according to the following formula: C(n)=(B p -F(n))·D (15) In the formula, B p is as defined by equation (13), F(n) is as defined by equation (11), D is as defined by equation (12); n is the sample number for the ART (flow diagram 160).

[0089] In step 216, the processor subtracts a correction value C(n) from each sample n of the DC corrected signal to arrive at a baseline corrected signal.

[0090] Returning to FIG. 4, as shown, the results from the baseline correction block 104, ie, the results generated by step 216 of the flow diagram 200, are communicated to a filtering block .

[0091] In block 108, the processor 22 applies a filter to the signal received from the baseline correction block 104. However, to avoid introducing anomalies into the signal by using a filter, the received signal is first "chopped" to isolate the pacing signal, and the remaining signal is filtered, as described below.

[0092] In one example of the present disclosure, the processor performs chopping as follows.

[0093] The processor identifies and cuts pacing peaks from the signal received from the baseline correction block 104 and stores the cut pacing peaks in the memory of the workstation 55.

[0094] The cut peaks leave "holes" in the signal, and the processor interpolates the areas of the holes.

[0095] The processor then filters the signal including the interpolated section, for example using a high pass IIR filter.

[0096] After filtering, processor 22 accesses memory to restore the truncated pacing signal to a filtered signal to produce a pacing signal without noticeable artifacts. EXAMPLES

[0097] Example 1. A method for eliminating pacing artifacts, comprising: registering that a pacing signal has been applied to a pacing location within the patient's heart; positioning a first electrode at a first location proximate the pacing location and coupling a first circuit portion having a first transfer function to receive from the first electrode a first electrocardiogram (ECG) signal generated in response to the pacing signal; recording a first derived ECG signal from the first circuitry in response to the first ECG signal; positioning a second electrode at a second location proximate the pacing location and coupling a second circuit portion having a second transfer function different from the first transfer function to receive from the second electrode a second ECG signal generated in response to the pacing signal; recording a second derived ECG signal from the second circuitry in response to the second ECG signal; analyzing at least one of the first derived ECG signal and the second derived ECG signal in response to registering the pacing signal; and removing pacing artifacts from at least one of the first derived ECG signal and the second derived ECG signal in response to the analyzing.

[0098] Example 2. The method of example 1, wherein the first circuit portion and the second circuit portion comprise common circuit components arranged in a common configuration.

[0099] Example 3. The method of example 2, wherein one of the common circuit components of the first circuit portion has an electrical parameter value that is different from the electrical parameter value of the respective component of the second circuit portion.

[0100] Example 4. The method of example 1, wherein the first circuit portion and the second circuit portion comprise different circuit components.

[0101] Example 5. The method of example 1, wherein the first circuit portion and the second circuit portion comprise common circuit components arranged in different configurations.

[0102] Example 6. The method of example 1, wherein analyzing at least one of the first derived ECG signal and the second derived ECG signal includes calculating a direct current (DC) voltage level thereof, and removing pacing artifacts includes applying the DC voltage level as a DC correction to at least one of the first derived ECG signal and the second derived ECG signal.

[0103] Example 7. The method of example 1, wherein analyzing at least one of the first derived ECG signal and the second derived ECG signal includes calculating a baseline fitting function to account for changes in baseline slope of at least one of the first derived ECG signal and the second derived ECG signal.

[0104] Example 8. The method of Example 7, comprising applying a decay function to a baseline fitted function.

[0105] Example 9. The method of example 1, wherein analyzing at least one of the first derived ECG signal and the second derived ECG signal includes calculating a bipolar ECG signal from the first derived ECG signal and the second derived ECG signal, and removing artifacts includes removing artifacts from the bipolar ECG signal.

[0106] Example 10. The method of example 1, wherein analyzing at least one of the first derived ECG signal and the second derived ECG signal includes cutting pacing peaks therefrom to generate a chopped signal, interpolating and filtering the chopped signal to generate a filtered signal, and restoring the pacing peaks to the filtered signal.

[0107] Example 11. A device for eliminating pacing artifacts, comprising: a first electrode positioned at a first location proximate a pacing location within the patient's heart to which a pacing signal is applied; a first circuit portion having a first transfer function and coupled to receive from a first electrode a first electrocardiogram (ECG) signal generated in response to a pacing signal; a second electrode positioned at a second location proximate the pacing location; a second circuit portion having a second transfer function different from the first transfer function and coupled to receive from a second electrode a second ECG signal generated in response to the pacing signal; 1. A processor comprising: recording a first derived ECG signal from the first circuitry in response to the first ECG signal; recording a second derived ECG signal from the second circuitry in response to the second ECG signal; registering that a pacing signal has been applied; analyzing at least one of the first derived ECG signal and the second derived ECG signal in response to registering the pacing signal; and a processor configured to: in response to the analyzing, remove pacing artifacts from at least one of the first derived ECG signal and the second derived ECG signal.

[0108] The above-described embodiments are cited by way of example, and the disclosure is not limited to what has been particularly shown and described in the above specification. Rather, the scope of the disclosure includes both combinations and subcombinations of the various features described in the above specification, as well as variations and modifications thereof not disclosed in the prior art that would occur to one skilled in the art upon reading the above description.

[0109] [Embodiment] (1) A method for eliminating pacing artifacts, comprising: registering that a pacing signal has been applied to a pacing location within the patient's heart; positioning a first electrode at a first location proximate the pacing location and coupling a first circuit portion having a first transfer function to receive from the first electrode a first electrocardiogram (ECG) signal generated in response to the pacing signal; recording a first derived ECG signal from the first circuitry in response to the first ECG signal; positioning a second electrode at a second location proximate the pacing location and coupling a second circuit portion having a second transfer function different from the first transfer function to receive from the second electrode a second ECG signal generated in response to the pacing signal; recording a second derived ECG signal from the second circuitry in response to the second ECG signal; analyzing at least one of the first derived ECG signal and the second derived ECG signal in response to registering the pacing signal; and removing the pacing artifacts from the at least one of the first derived ECG signal and the second derived ECG signal in response to the analyzing. (2) The method of embodiment 1, wherein the first circuit portion and the second circuit portion comprise common circuit components arranged in a common configuration. (3) The method of embodiment 2, wherein one of the common circuit components of the first circuit portion has an electrical parameter value that is different from an electrical parameter value of each component of the second circuit portion. (4) The method of embodiment 1, wherein the first circuit portion and the second circuit portion comprise different circuit components. (5) The method of embodiment 1, wherein the first circuit portion and the second circuit portion comprise common circuit components arranged in different configurations.

[0110] (6) The method of embodiment 1, wherein analyzing the at least one of the first derived ECG signal and the second derived ECG signal includes calculating a direct current (DC) voltage level thereof, and removing the pacing artifacts includes applying the DC voltage level as a DC correction to the at least one of the first derived ECG signal and the second derived ECG signal. (7) The method of embodiment 1, wherein analyzing the at least one of the first derived ECG signal and the second derived ECG signal includes calculating a baseline fit function to account for changes in baseline slope of the at least one of the first derived ECG signal and the second derived ECG signal. (8) The method of embodiment 7, comprising applying a decay function to the baseline fitted function. (9) The method of embodiment 1, wherein analyzing at least one of the first derived ECG signal and the second derived ECG signal includes calculating a bipolar ECG signal from the first derived ECG signal and the second derived ECG signal, and removing the artifacts includes removing the artifacts from the bipolar ECG signal. (10) The method of embodiment 1, wherein analyzing at least one of the first derived ECG signal and the second derived ECG signal includes cutting pacing peaks therefrom to generate a chopped signal, interpolating and filtering the chopped signal to generate a filtered signal, and restoring the pacing peaks to the filtered signal.

[0111] (11) A device for removing pacing artifacts, comprising: a first electrode positioned at a first location proximate a pacing location within the patient's heart to which a pacing signal is applied; a first circuit portion having a first transfer function and coupled to receive from the first electrode a first electrocardiogram (ECG) signal generated in response to the pacing signal; a second electrode positioned at a second location proximate the pacing location; and a second circuit portion having a second transfer function different from the first transfer function and coupled to receive a second ECG signal from the second electrode generated in response to the pacing signal; 1. A processor comprising: recording a first derived ECG signal from the first circuitry in response to the first ECG signal; recording a second derived ECG signal from the second circuitry in response to the second ECG signal; registering that the pacing signal has been applied; and analyzing at least one of the first derived ECG signal and the second derived ECG signal in response to registering the pacing signal; and a processor configured to: in response to the analyzing, remove the pacing artifacts from the at least one of the first derived ECG signal and the second derived ECG signal. (12) The apparatus of embodiment 11, wherein the first circuit portion and the second circuit portion comprise common circuit components arranged in a common configuration. (13) The apparatus of embodiment 12, wherein one of the common circuit components of the first circuit portion has an electrical parameter value that is different from an electrical parameter value of each component of the second circuit portion. (14) The device of embodiment 11, wherein the first circuit portion and the second circuit portion comprise different circuit components. (15) The apparatus of embodiment 11, wherein the first circuit portion and the second circuit portion comprise common circuit components arranged in different configurations.

[0112] (16) The apparatus of embodiment 11, wherein analyzing the at least one of the first derived ECG signal and the second derived ECG signal includes calculating a direct current (DC) voltage level thereof, and removing the pacing artifacts includes applying the DC voltage level as a DC correction to the at least one of the first derived ECG signal and the second derived ECG signal. (17) The apparatus of embodiment 1, wherein analyzing the at least one of the first derived ECG signal and the second derived ECG signal includes calculating a baseline fitting function to account for changes in baseline slope of the at least one of the first derived ECG signal and the second derived ECG signal. (18) The apparatus of embodiment 17, further comprising applying a decay function to the baseline fitting function. (19) The apparatus of embodiment 11, wherein analyzing the at least one of the first derived ECG signal and the second derived ECG signal includes calculating a bipolar ECG signal from the first derived ECG signal and the second derived ECG signal, and removing the artifacts includes removing the artifacts from the bipolar ECG signal. (20) The apparatus of embodiment 11, wherein analyzing the at least one of the first derived ECG signal and the second derived ECG signal includes cutting pacing peaks therefrom to generate a chopped signal, interpolating and filtering the chopped signal to generate a filtered signal, and restoring the pacing peaks to the filtered signal.

Claims

1. 1. An apparatus for eliminating pacing artifacts, comprising: a first electrode positioned at a first location proximate a pacing location within the patient's heart to which a pacing signal is applied; a first circuit portion having a first transfer function and coupled to receive from the first electrode a first electrocardiogram (ECG) signal generated in response to the pacing signal; a second electrode positioned at a second location proximate the pacing location; a second circuit portion having a second transfer function different from the first transfer function and coupled to receive a second ECG signal from the second electrode generated in response to the pacing signal; 1. A processor comprising: recording a first derived ECG signal from the first circuitry in response to the first ECG signal; recording a second derived ECG signal from the second circuitry in response to the second ECG signal; registering that the pacing signal has been applied; and analyzing at least one of the first derived ECG signal and the second derived ECG signal in response to registering the pacing signal; and a processor configured to: in response to the analyzing, remove the pacing artifacts from the at least one of the first derived ECG signal and the second derived ECG signal.

2. The apparatus of claim 1 , wherein the first circuit portion and the second circuit portion comprise common circuit components arranged in a common configuration.

3. 3. The apparatus of claim 2, wherein one of the common circuit components of the first circuit portion has an electrical parameter value that is different from an electrical parameter value of a respective component of the second circuit portion.

4. The apparatus of claim 1 , wherein the first circuit portion and the second circuit portion comprise different circuit components.

5. The apparatus of claim 1 , wherein the first circuit portion and the second circuit portion comprise common circuit components arranged in different configurations.

6. 2. The apparatus of claim 1, wherein analyzing the at least one of the first derived ECG signal and the second derived ECG signal includes calculating a direct current (DC) voltage level thereof, and removing the pacing artifacts includes applying the DC voltage level as a DC correction to the at least one of the first derived ECG signal and the second derived ECG signal.

7. 2. The apparatus of claim 1, wherein analyzing the at least one of the first derived ECG signal and the second derived ECG signal includes calculating a baseline fitting function to account for changes in baseline slope of the at least one of the first derived ECG signal and the second derived ECG signal.

8. The apparatus of claim 7 further comprising applying a decay function to the baseline fitted function.

9. 2. The apparatus of claim 1, wherein analyzing the at least one of the first derived ECG signal and the second derived ECG signal comprises calculating a bipolar ECG signal from the first derived ECG signal and the second derived ECG signal, and removing the artifact comprises removing the artifact from the bipolar ECG signal.

10. 2. The apparatus of claim 1, wherein analyzing the at least one of the first derived ECG signal and the second derived ECG signal comprises cutting pacing peaks therefrom to produce a chopped signal, interpolating and filtering the chopped signal to produce a filtered signal, and restoring the pacing peaks to the filtered signal.

11. 1. A method for eliminating pacing artifacts, comprising: registering that a pacing signal has been applied to a pacing location within the patient's heart; positioning a first electrode at a first location proximate the pacing location and coupling a first circuit portion having a first transfer function to receive from the first electrode a first electrocardiogram (ECG) signal generated in response to the pacing signal; recording a first derived ECG signal from the first circuitry in response to the first ECG signal; positioning a second electrode at a second location proximate the pacing location and coupling a second circuit portion having a second transfer function different from the first transfer function to receive from the second electrode a second ECG signal generated in response to the pacing signal; recording a second derived ECG signal from the second circuitry in response to the second ECG signal; analyzing at least one of the first derived ECG signal and the second derived ECG signal in response to registering the pacing signal; and removing the pacing artifacts from the at least one of the first derived ECG signal and the second derived ECG signal in response to the analyzing.

12. The method of claim 11 , wherein the first circuit portion and the second circuit portion comprise common circuit components arranged in a common configuration.

13. The method of claim 12 , wherein one of the common circuit components of the first circuit portion has an electrical parameter value that is different from an electrical parameter value of a respective component of the second circuit portion.

14. The method of claim 11 , wherein the first circuit portion and the second circuit portion comprise different circuit components.

15. The method of claim 11 , wherein the first circuit portion and the second circuit portion comprise common circuit components arranged in different configurations.

16. 12. The method of claim 11, wherein analyzing the at least one of the first derived ECG signal and the second derived ECG signal includes calculating a direct current (DC) voltage level thereof, and removing the pacing artifacts includes applying the DC voltage level as a DC correction to the at least one of the first derived ECG signal and the second derived ECG signal.

17. 12. The method of claim 11, wherein analyzing the at least one of the first derived ECG signal and the second derived ECG signal includes calculating a baseline fitting function to account for changes in baseline slope of the at least one of the first derived ECG signal and the second derived ECG signal.

18. The method of claim 17 comprising applying a decay function to the baseline fit function.

19. 12. The method of claim 11, wherein analyzing the at least one of the first derived ECG signal and the second derived ECG signal comprises calculating a bipolar ECG signal from the first derived ECG signal and the second derived ECG signal, and removing the artifact comprises removing the artifact from the bipolar ECG signal.

20. 12. The method of claim 11, wherein analyzing the at least one of the first derived ECG signal and the second derived ECG signal comprises cutting pacing peaks therefrom to produce a chopped signal, interpolating and filtering the chopped signal to produce a filtered signal, and restoring the pacing peaks to the filtered signal.

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