Codeword synchronization method, receiver, network device, and network system

Abstract

To provide a codeword synchronization method for self-synchronization, a receiver, and a network device, to resolve a technical problem that additional data is added in an AM synchronization solution.SOLUTION: A codeword synchronization method, a receiver, and a network device are provided. In the method, a candidate bit is determined in a plurality of bits of a data sequence received by a receive end, and a synchronization position is determined on the basis of the candidate bit, where the synchronization position indicates a start position of a codeword in the data sequence. The method is a self-synchronization method, and a technical effect of high-precision codeword synchronization for a data stream at the receive end can be achieved without inserting additional data into a data stream at a transmit end, and synchronization performance achieves high reliability.SELECTED DRAWING: Figure 11

Description

[Technical field]

[0001] This application claims priority to Chinese Patent Application No. 202010280832.9, filed on April 10, 2020, and entitled "Codeword Synchronization Method, Receiver, and Network Device," and Chinese Patent Application No. 202010424884.9, filed on May 19, 2020, and entitled "Codeword Synchronization Method, Receiver, Network Device, and Network System," each of which is incorporated by reference in its entirety.

[0002] The present application relates to the field of communications, and in particular to a codeword synchronization method, a receiver, a network device, and a network system. [Background technology]

[0003] With the improvement of manufacturing process level, channel loss and noise become important factors limiting data transmission speed and distance. The advent of Forward Error Correction provides error correction protection for data during transmission, thereby increasing the data transmission speed and distance of the channel. FEC can be classified into block code and convolutional code based on different processing methods for information sequence. Block code may be further subdivided into linear block code and non-linear block code. Because the encoding and decoding implementation of linear block code is simple, linear block code is widely used in the physical layer and media access control sublayer of the data link layer in the Open System Interconnection Model (OSI) of Ethernet.

[0004] The error detection and error correction functions of linear block codes need to be implemented based on complete codewords. Therefore, codeword boundaries need to be determined in the data stream. In particular, the beginning and end of a complete codeword need to be found. This process is called codeword synchronization or frame synchronization.

[0005] Currently, synchronization solutions applicable to linear block codes are available in the industry. The alignment marker (AM) synchronization solution used in 200 / 400 GE of the 802.3 standard is used as an example. This solution requires that a fixed AM sequence is inserted at the interval of a codeword with a certain length, and the receiver can perform codeword synchronization by identifying the AM sequence. However, the presence of the AM sequence is equivalent to the insertion of additional data into the data stream at the transmitter, thus adding redundant information. Summary of the Invention [Means for solving the problem]

[0006] The present application provides a codeword synchronization method, a receiver, and a network device for self-synchronization to solve the technical problem that additional data is added to the AM synchronization solution.

[0007] According to a first aspect, the present application provides a codeword synchronization method, the method includes the steps of: step 1: receiving a data sequence, the data sequence including a plurality of bits; step 2: determining candidate bits in the data sequence, the candidate bits being included in the plurality of bits; and step 3: determining a synchronization position based on the candidate bits, the synchronization position indicating a starting position of a codeword in the data sequence.

[0008] The method is performed by a receiving device on a network, in which the technical effect of high precision codeword synchronization for a data stream at a receiving end can be achieved without inserting additional data into the data stream at a transmitting end, and the synchronization performance achieves high reliability.

[0009] In a possible implementation, step 3 includes performing a verification on the candidate bit, and if the verification is successful, determining that the position of the candidate bit is a synchronization position.

[0010] In a possible implementation form, at least one second test data block is obtained from the data sequence through division based on the candidate bit, the position of the candidate bit is a starting position of the at least one second test data block, and a verification is performed against a characteristic value of the at least one second test data block, and if the verification is successful, the position of the candidate bit is determined to be a synchronization position.

[0011] In a possible implementation, performing verification on the characteristic values ​​of the at least one second test data block includes a step of sequentially accumulating each characteristic value of the at least one second test data block to obtain an accumulated value, and the verification is successful when the accumulated value satisfies the synchronization condition.

[0012] In a possible implementation, the accumulated value of the characteristic value is the number of second test data blocks in the at least one second test data block that are determined to be correct code words, and the synchronization condition is that the accumulated value is greater than or equal to a synchronization threshold, or the characteristic value is the number of all-zero syndromes in the syndrome, and the synchronization condition is that the accumulated value is greater than or equal to a synchronization threshold, or the characteristic value is the number of zero elements in the syndrome, and the synchronization condition is that the accumulated value is greater than or equal to a synchronization threshold, or the characteristic value is the number of correctable test data blocks, and the synchronization condition is that the accumulated value is greater than or equal to the synchronization threshold, or the characteristic value is the number of test data blocks whose reconstructed parity bits are the same as the received parity bits, and the synchronization condition is that the accumulated value is greater than or equal to the synchronization threshold, the length of the test data block is n bits, the first k bits of the test data block are information bits, and the last nk bits of the test data block are received parity bits, the reconstructed parity bits are obtained based on the information bits, and the length of the reconstructed parity bits is nk bits, where n and k are integers.

[0013] In a possible implementation, the verification based on the characteristic values ​​of the at least one second test data block includes a step of adding up all the characteristic values ​​of the at least one second test data block to obtain a sum value, and the verification is successful if the sum value satisfies the synchronization condition.

[0014] In possible implementations, the sum of the characteristic values ​​is the number of second test data blocks in the at least one second test data block that are determined to be correct code words, or the sum of the characteristic values ​​is the number of second test data blocks in the at least one second test data block that are determined to be incorrect code words, and the synchronization condition is that the sum is less than or equal to a synchronization threshold, or the characteristic value is the number of all-zero syndromes in the syndrome and the synchronization condition is that the sum is greater than or equal to a synchronization threshold, or the characteristic value is the number of non-all-zero syndromes in the syndrome and the synchronization condition is that the sum is less than or equal to a synchronization threshold, or the characteristic value is the number of zero elements in the syndrome and the synchronization condition is that the sum is greater than or equal to a synchronization threshold, or the characteristic value is the number of non-zero elements in the syndrome and the synchronization condition is that the sum is less than or equal to a synchronization threshold, or the characteristic value is the number of correctable test data blocks, the synchronization condition is that the sum is greater than or equal to the synchronization threshold, or the characteristic value is the number of uncorrectable test data blocks, the synchronization condition is that the sum is less than or equal to the synchronization threshold, or the characteristic value is the number of test data blocks whose reconstructed parity bits are the same as the received parity bits, the synchronization condition is that the sum is greater than or equal to the synchronization threshold, or the characteristic value is the number of test data blocks whose reconstructed parity bits differ from the received parity bits, the synchronization condition is that the sum is less than or equal to the synchronization threshold, the length of the test data block is n bits, the first k bits of the test data block are information bits, and the last nk bits of the test data block are the received parity bits, the reconstructed parity bits are obtained based on the information bits, and the length of the reconstructed parity bits is nk bits, where n and k are integers.

[0015] In a possible implementation, the position of the candidate bit is used as a synchronization position.

[0016] In a possible implementation, a plurality of observed bits are selected from the data sequence, and candidate bits are selected from the plurality of observed bits.

[0017] In a possible implementation, selecting a candidate bit from the plurality of observation bits includes determining a plurality of groups of first test data blocks in the data sequence based on the plurality of observation bits, each of the plurality of groups of first test data blocks including at least one first test data block, and a position of each of the plurality of observation bits being a starting position of each of the plurality of groups of first test data blocks; and selecting one observation bit from the plurality of observation bits as a candidate bit based on characteristic values ​​of the plurality of groups of first test data blocks.

[0018] In a possible implementation, the step of selecting one observation bit from the plurality of observation bits as a candidate bit based on the characteristic values ​​of the plurality of groups of first test data blocks includes the steps of sequentially determining whether the characteristic value of each of the plurality of groups of first test data blocks satisfies a candidate condition until it is determined that the characteristic value of the group of first test data blocks satisfies a candidate condition, and using the observation bit corresponding to the group of first test data blocks that satisfies the candidate condition as the candidate bit.

[0019] In a possible implementation, the characteristic value of the group of first test data blocks is the total number of all-zero syndromes in the syndromes of all first test data blocks in the group of first test data blocks, and the candidate condition is that the total number is equal to or greater than the synchronization threshold; or the characteristic value of the group of first test data blocks is the total number of non-all-zero syndromes in the syndromes of all first test data blocks in the group of first test data blocks, and the candidate condition is that the total number is equal to or less than the synchronization threshold; or the characteristic value of the group of first test data blocks is the total number of zero elements in the syndromes of all first test data blocks in the group of first test data blocks, and the candidate condition is that the total number is equal to or greater than the synchronization threshold; or the characteristic value of the group of first test data blocks is the total number of non-zero elements in the syndromes of all first test data blocks in the group of first test data blocks, and the candidate condition is that the total number is equal to or less than the synchronization threshold; the characteristic value is the total number of correctable test data blocks in all first test data blocks in the group of first test data blocks, and the candidate condition is that the total number is equal to or greater than a synchronization threshold; or the characteristic value of the group of first test data blocks is the total number of uncorrectable test data blocks in all first test data blocks in the group of first test data blocks, and the candidate condition is that the total number is equal to or less than a synchronization threshold; or the characteristic value of the group of first test data blocks is the total number of test data blocks whose reconstructed parity bit is the same as the received parity bit in all first test data blocks in the group of first test data blocks, and the candidate condition is that the total number is equal to or greater than a synchronization threshold; or the characteristic value of the group of first test data blocks is the total number of test data blocks whose reconstructed parity bit differs from the received parity bit in all first test data blocks in the group of first test data blocks, and the candidate condition is that the total number is equal to or less than a synchronization threshold;Or the characteristic value of the group of first test data blocks is a cumulative number of all-zero syndromes in the syndromes of the first X first test data blocks in the group of first test data blocks, and the candidate condition is that the cumulative number is greater than or equal to a synchronization threshold value; or the characteristic value of the group of first test data blocks is a cumulative number of zero elements in the syndromes of the first X first test data blocks in the group of first test data blocks, and the candidate condition is that the cumulative number is greater than or equal to a synchronization threshold value; or the characteristic value of the group of first test data blocks is a cumulative number of zero elements in the syndromes of the first X first test data blocks in the group of first test data blocks, and the candidate condition is that the cumulative number is greater than or equal to a synchronization threshold value; the characteristic value of the group of first test data blocks is a cumulative number of test data blocks whose reconstructed parity bits are the same as the received parity bits in the first X first test data blocks in the group of first test data blocks, the candidate condition is that the cumulative number is greater than or equal to the synchronization threshold, the length of the test data block is n bits, the first k bits of the test data block are information bits, the last nk bits of the test data block are received parity bits, the reconstructed parity bits are obtained based on the information bits, and the length of the reconstructed parity bits is nk bits, where n, k, and X are integers;

[0020] In a possible implementation, the step of selecting one observation bit from the plurality of observation bits as a candidate bit based on the characteristic values ​​of the plurality of groups of first test data blocks includes a step of comparing all the characteristic values ​​of the plurality of groups of first test data blocks and a step of using the observation bit corresponding to the group of first test data blocks whose characteristic value is an extreme value as the candidate bit.

[0021] In possible implementations, the characteristic value is the number of all-zero syndromes in the syndrome, and the extreme value is a maximum value, or the characteristic value is the number of non-all-zero syndromes in the syndrome, and the extreme value is a minimum value, or the characteristic value is the number of zero elements in the syndrome, and the extreme value is a maximum value, or the characteristic value is the number of non-zero elements in the syndrome, and the extreme value is a minimum value, or the characteristic value is the number of correctable test data blocks, and the extreme value is a maximum value, or the characteristic value is the number of uncorrectable test data blocks, and the extreme value is a minimum value, or the characteristic value is the number of test data blocks whose reconstructed parity bits are the same as the received parity bits, and the extreme value is a minimum value, the test data block has a length of n bits, the first k bits of the test data block are information bits, and the last nk bits of the test data block are received parity bits, the reconstructed parity bits are obtained based on the information bits, and the length of the reconstructed parity bits is nk bits, where n and k are integers.

[0022] In a possible implementation, selecting a plurality of observation bits from the data sequence includes the steps of selecting one bit from the data sequence at intervals of T bits and using this bit as the observation bit, where T is an integer greater than 0, or selecting one bit from the data sequence at intervals of L×n+T bits and using this bit as the observation bit, where L is the number of test data blocks in the interval, the length of the test data block is n bits, and L and T are integers greater than 0.

[0023] In a possible implementation, the data sequence is a modulated signal, the data sequence includes a plurality of modulation symbols, and the selection of a plurality of observation bits from the initial data includes a step of selecting a start bit of a modulation symbol from the data sequence at an interval of T modulation symbols and using the start bit as the observation bit, where T is an integer greater than 0, or a step of selecting a start bit of a modulation symbol from the data sequence at an interval of L×m+T modulation symbols and using the start bit as the observation bit, where L is the number of test data blocks in the interval, the length of the test data block is m modulation symbols, and L and T are integers greater than 0.

[0024] In a possible implementation, the number of observation bits is P, where P is a positive integer, and the length of the codeword is P bits.

[0025] In a possible implementation, determining candidate bits in the data sequence in step 2 includes determining candidate bits in a first subsequence, and obtaining at least one second test data block from the data sequence through division based on the candidate bits in step 3 includes obtaining at least one second test data block from the second subsequence through division based on the candidate bits, where the first subsequence and the second subsequence are included in the data sequence, and the second subsequence is the same, partially the same or different from the first subsequence.

[0026] In a possible implementation, after step 3, the method further includes step 4: determining an updated synchronization position of the data sequence in response to the data sequence being in an out-of-lock state.

[0027] In a possible implementation, the step of determining an updated synchronization position of the data sequence includes a step of performing steps 2 and 3 again and using the synchronization position determined in the re-performed step 3 as the updated synchronization position.

[0028] In a possible implementation form, after step 3 and before step 4, the method further includes a step of obtaining multiple synchronization code words from the data sequence through division based on a synchronization position, where the synchronization position is a starting position of the multiple synchronization code words, and a step of performing verification on characteristic values ​​of the multiple synchronization code words and determining that the data sequence is in an out-of-lock state when the verification fails.

[0029] In a possible implementation, the step of performing verification on the characteristic values ​​of the multiple synchronization code words includes a step of sequentially accumulating the characteristic values ​​of each of the multiple synchronization code words to obtain an accumulated value, and the verification fails if the accumulated value satisfies an out-of-lock condition.

[0030] In a possible implementation, the characteristic value is the number of non-all-zero syndromes in the syndrome, and the out-of-lock condition is that the accumulated value is greater than or equal to a synchronization threshold, or the characteristic value is the number of non-zero elements in the syndrome, and the out-of-lock condition is that the accumulated value is greater than or equal to a synchronization threshold, or the characteristic value is the number of uncorrectable codewords, and the out-of-lock condition is that the accumulated value is greater than or equal to a synchronization threshold, or the characteristic value is the number of codewords whose reconstructed parity bits differ from the received parity bits, and the out-of-lock condition is that the accumulated value is greater than or equal to the synchronization threshold, the length of the codeword is n bits, the first k bits of the codeword are information bits, and the last nk bits of the codeword are received parity bits, the reconstructed parity bits are obtained based on the information bits, and the length of the reconstructed parity bits is nk bits, where n and k are integers.

[0031] In a possible implementation, the step of performing a verification on the characteristic values ​​of the multiple synchronization codewords includes a step of adding up all the characteristic values ​​of the multiple synchronization codewords to obtain a sum value, and the verification fails if the sum value satisfies an out-of-lock condition.

[0032] In possible implementations, the characteristic value is the number of all-zero syndromes in the syndrome and the out-of-lock condition is that the sum is less than or equal to a synchronization threshold, or the characteristic value is the number of non-all-zero syndromes in the syndrome and the out-of-lock condition is that the sum is greater than or equal to a synchronization threshold, or the characteristic value is the number of zero elements in the syndrome and the out-of-lock condition is that the sum is less than or equal to a synchronization threshold, or the characteristic value is the number of non-zero elements in the syndrome and the out-of-lock condition is that the sum is greater than or equal to a synchronization threshold, or the characteristic value is the number of correctable codewords and the out-of-lock condition is that the sum is less than or equal to a synchronization threshold, or the characteristic value is the number of correctable codewords. the characteristic value is the number of codewords whose reconstructed parity bit is the same as the received parity bit, the out-of-lock condition is that the sum value is less than or equal to the synchronization threshold, or the characteristic value is the number of codewords whose reconstructed parity bit differs from the received parity bit, the out-of-lock condition is that the sum value is greater than or equal to the synchronization threshold, the length of the codeword is n bits, the first k bits of the codeword are information bits, the last nk bits of the codeword are received parity bits, the reconstructed parity bits are obtained based on the information bits, the length of the reconstructed parity bits is nk bits, and n and k are integers.

[0033] In a possible implementation, the data sequence is a linear block code.

[0034] According to a second aspect, the present application provides a communication device for performing the method of the first aspect or any one of the possible implementations of the first aspect. In particular, the network device comprises a unit configured to perform the method of the first aspect or any one of the possible implementations of the first aspect.

[0035] According to a third aspect, the present application provides a communication device, the communication device includes a processor, a communication interface, and a memory. The communication interface may be a transceiver. The memory may be configured to store a program code. The processor is configured to call the program code in the memory to execute the method in the first aspect or any one of the possible implementation forms of the first aspect. Details are not described again in this specification.

[0036] According to a fourth aspect, the present application provides a network system, including a transmitting device and a receiving device, the receiving device being a communication device provided in the second or third aspect, the receiving device being configured to receive a data sequence transmitted by the transmitting device.

[0037] According to a fifth aspect, the present application provides a computer readable storage medium having stored thereon instructions which, when executed on a computer, enable the computer to perform the method of the previous aspect.

[0038] According to a sixth aspect, the present application provides a computer program product comprising computer program instructions, which when run on a network device, enables the network device to perform the method provided in the first aspect or any one of the possible implementations of the first aspect.

[0039] According to a seventh aspect, the present application provides a chip including a memory and a processor. The memory is configured to store a computer program. The processor is configured to call and execute the computer program from the memory to perform a method according to the first aspect or any one of the possible implementations of the first aspect.

[0040] Optionally, the chip includes only a processor. The processor is configured to read the computer program stored in the memory and execute the computer program. When the computer program is executed, the processor performs the method according to the first aspect or any one of the possible implementation forms of the first aspect.

[0041] According to an eighth aspect, the present application provides a network node. The network node includes a main control board and an interface board. The main control board includes a first processor and a first memory. The interface board includes a second processor, a second memory, and an interface card. The main control board is coupled to the interface board.

[0042] The first memory may be configured to store program code, and the first processor is configured to invoke the program code in the first memory to perform the following operations: determining a candidate bit in a data sequence, the candidate bit being included in the plurality of bits, and determining a synchronization position based on the candidate bit, the synchronization position indicating a starting position of a codeword in the data sequence.

[0043] The second memory can be configured to store program code, and the second processor is configured to invoke the program code in the second memory to trigger the interface card to perform the following operations: receiving a data sequence, the data sequence including a plurality of bits.

[0044] In a possible implementation, an inter-process communication (IPC) channel is established between the main control board and the interface board, and the main control board and the interface board communicate with each other through the IPC channel.

[0045] In order to more clearly describe the technical solutions of the present application, the following briefly describes the accompanying drawings for describing the embodiments. The accompanying drawings in the following description only illustrate some embodiments of the present application, and those skilled in the art can derive other technical solutions and accompanying drawings from these accompanying drawings without creative efforts. [Brief description of the drawings]

[0046] [Figure 1] FIG. 2 illustrates a synchronization position of a codeword according to an embodiment of the present application; [Diagram 2] 2 is a synchronization flow chart according to an embodiment of the present application; [Diagram 3] 2 is a synchronization flow chart according to an embodiment of the present application; [Figure 4] FIG. 2 illustrates an observation bit selection method according to an embodiment of the present application. [Diagram 5] FIG. 2 illustrates an observation bit selection method according to an embodiment of the present application. [Figure 6] FIG. 2 illustrates an observation bit selection method according to an embodiment of the present application. [Figure 7] FIG. 2 illustrates an observation bit selection method according to an embodiment of the present application. [Figure 8A] FIG. 2 illustrates a first stage of synchronous lock determination according to an embodiment of the present application. [Figure 8B] FIG. 2 illustrates a first stage of synchronous lock determination according to an embodiment of the present application. [Figure 9] FIG. 13 illustrates a second stage of synchronization lock determination according to an embodiment of the present application. [Figure 10] FIG. 1 illustrates a synchronization out-of-lock determination according to an embodiment of the present application. [Figure 11] 2 is a synchronization flow chart according to an embodiment of the present application; [Figure 12] 1 is a schematic diagram of the structure of a communication device according to an embodiment of the present application; [Figure 13] 1 is a schematic diagram of the structure of a communication device according to an embodiment of the present application; [Figure 14]1 is a schematic diagram of the structure of a communication device according to an embodiment of the present application; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0047] Hereinafter, embodiments of the present application will be described with reference to the accompanying drawings.

[0048] Due to the influence of channel loss and noise, errors occur when a signal is transmitted in a channel, which affects the reliability of the communication system. When a signal is represented in the form of a data sequence containing multiple bits, the transmission error is specifically embodied as a change in the value of some bits in the data sequence, that is, bit errors occur. FEC is a technique for controlling transmission errors in a communication system. In the FEC technique, redundant information is transmitted along with the original data sequence to recover errors and reduce the bit error rate during transmission. FEC can be classified into block codes and convolutional codes based on different processing schemes for the information sequence. Block codes may be further subdivided into linear block codes and nonlinear block codes. A systematic code of a linear block code is used as an example. The transmitting side divides the original data sequence into groups, each of which has a length of k bits. In addition, nk bits of redundant information are added to each group according to a specific encoding rule to finally obtain a codeword having a length of n bits, and the redundant information is also called parity bits. Therefore, in a codeword with a length of n bits, the first k bits are the original data, also called information bits, and the last nk bits are parity bits, and the whole codeword includes information bits and parity bits. After the codeword reaches the receiver through the channel, if the number of bit errors in the codeword is within the correctable range, the receiver checks and corrects the errors in the decoding process, and restores the received codeword to the original data sent by the transmitter, thereby withstanding interference from the channel and improving the reliability of the communication system. The error detection and error correction functions of linear block codes need to be implemented based on the complete codeword. Therefore, before the data sequence received by the receiver is decoded, the codeword boundaries need to be determined in the data sequence. Specifically, the start and end positions of the complete codeword need to be found. This process is called codeword synchronization or frame synchronization.If the codeword synchronization is not performed correctly, in particular if the actual codeword boundaries are not determined, the expected effect of error detection or error correction in the subsequent decoding process may not be achieved, or the number of bit errors may further increase, causing degradation of the performance of the communication system.

[0049] The start position of each codeword may also be called a synchronization position. Continuing, a systematic code is used as an example. Figure 1 shows the synchronization positions of a codeword. As shown in Figure 1, the length of the entire codeword is n bits, the first k bits are the original data (information bits), and the last nk bits are additional parity bits added according to the encoding rule, and the synchronization position is the start position of the codeword, i.e., the position of the first bit in the codeword. n and k are both integers. It can be known that there are multiple synchronization positions in the data sequence, the multiple synchronization positions are correlated with each other, the interval between the synchronization positions is fixed, and the interval is the length of the codeword.

[0050] In this embodiment of the present application, a systematic code is used as an example for explanation, but the present application is not limited to systematic codes and is also applicable to non-systematic codes. The present application is applicable to all communication systems that use linear block codes. Linear block codes include, but are not limited to, Reed-Solomon codes, Bose-Chaudhuri-Hocquenghem codes (BCH codes), Low-Density Parity-Check codes (LDPC codes), Hamming codes, Golay codes, and Reed-Muller codes.

[0051] The embodiment of the present application provides a codeword synchronization method, and a device and a system based on the method. The method, the device and the system are based on the same inventive concept. The method can include two stages. In the first stage, a plurality of groups of first test data blocks are obtained through division based on a plurality of observation bits, and an observation bit that is most likely to be at a synchronization position is selected from the plurality of observation bits based on the plurality of groups of first test data blocks. In the second stage, a group of second test data blocks is obtained through division based on the observation bit that is most likely to be at a synchronization position, and it is determined whether the observation bit that is most likely to be at a synchronization position is at a synchronization position based on the group of second test data blocks. Alternatively, the method may only include the first stage. After the observation bit that is most likely to be at a synchronization position is determined and selected, the observation bit that is most likely to be at a synchronization position is directly used as a synchronization position. In this method, the technical effect of high-precision codeword synchronization for a data stream at a receiving side can be achieved without inserting additional data into the data stream at a transmitting side, and the synchronization performance achieves high reliability.

[0052] 2 is a flowchart of a method according to an embodiment of the present application. The method is applied to a receiving device on a communication network. The receiving device can be various devices for performing FEC, including but not limited to routers, switches, and servers. The method includes the following steps:

[0053] S210: Receive a data sequence.

[0054] Specifically, the receiving side receives a data sequence from the transmitting side, where the data sequence includes multiple bits, and each bit is binary data. That is, the data sequence is a sequence including multiple bits, and may also be called a bit sequence. In some embodiments, the data sequence is a linear block code. The data sequence is transmitted through a channel, and bit errors may occur. Operations such as error detection and error correction need to be performed.

[0055] S220: In a first step, a candidate bit in a data sequence is determined, the candidate bit being included in a plurality of bits. The candidate bit is an observed bit that is most likely to be at a synchronization position among a plurality of observed bits, in other words, the position of the candidate bit is most likely to be the synchronization position.

[0056] As shown in FIG. 3, the first stage may include two steps: S221 and S222.

[0057] S221: The receiving side selects a plurality of observation bits from the received data sequence. The positions of the observation bits include a synchronization position, and specifically, one position of the observation bits may be a synchronization position, in other words, the positions of the observation bits can cover the synchronization position.

[0058] Optionally, in the first stage, when the candidate bits of the data sequence are determined in the method, only a part of the data sequence is used, for example, a first subsequence of the data sequence, i.e., the candidate bits in the first subsequence are determined. The first subsequence includes a plurality of bits, and the first subsequence may be any part of the data sequence. The receiver selects a plurality of observation bits from the first subsequence, and the position of the observation bits may be a synchronization position. For example, the number of observation bits is P, and P is an integer greater than 1.

[0059] Optionally, when the plurality of observation bits are selected from the received data sequence, the interval between every two adjacent observation bits in the plurality of observation bits is the same, and the position of each of the plurality of observation bits is sequentially arranged backwards.

[0060] The concept of a test data block is introduced into the codeword synchronization process. A test data block is a part of a data sequence. A test data block contains several consecutive bits. The length of a test data block is the same as the length of a codeword. It can be said that a test data block is used to simulate a codeword.

[0061] Optionally, the multiple observation bits may be located in a single test data block, and the positions of each of the multiple observation bits in the single test data block are sequentially arranged backward. Specifically, one bit is selected as the observation bit at an interval of T bits, where T is an integer greater than 0. FIG. 4 shows a block diagram of the multiple observation bits. 1 , b 2 , and b 3 are three adjacent observation bits, corresponding to three bits x(0), x(1), and x(2) in the data sequence, respectively. The interval between the observation bits is 1 bit, i.e., T is 1. The three observation bits are located in a single test data block, e.g., a test data block obtained through splitting using x(0) as the starting position in Figure 4. In the test data block, b 1 is the first position in the test data block, and b 2 and b 3 are the second and third positions in the test data block, respectively. That is, the positions of each of the three observation bits in a single test data block are arranged sequentially backwards. Although FIG. 4 shows only three observation bits, the manner of selecting more observation bits can be inferred by analogy. The details will not be described again in this specification.

[0062] Optionally, the observation bits may be located in multiple test data blocks respectively, and the positions of each of the observation bits in each test data block are arranged sequentially backward. Specifically, one bit is selected as the observation bit in an interval of L×n+T bits, where L is the number of test data blocks in the interval, the length of the test data block is n bits, and L and T are integers greater than 0. FIG. 5 shows a block diagram of a 1 and b 2 are two adjacent observation bits, corresponding to two bits x(0) and x(L×n+1) in the data sequence, respectively. The two observation bits are located in two different test data blocks, e.g., in a test data block obtained through splitting using x(0) as the starting position in FIG. 5 and a test data block obtained through splitting using x(L×n) as the starting position, respectively. The interval between the two test data blocks is L test data blocks, and the interval between the two observation bits is L×n+1 bits, i.e., T is 1. In the test data block obtained through splitting using x(0) as the starting position, b 1 The position of is the first position in the test data block. In the test data block obtained through splitting using x(L×n) as the starting position, b 2 The position of is the second position in the test data block. That is, the positions of each of the two observation bits in each test data block are arranged sequentially backward. Although FIG. 5 shows only two observation bits, the method of selecting more observation bits can be inferred by analogy. Details are not described again in this specification. In this case, the interval between adjacent observation bits is longer, and the correlation between the observation bits is lower, thereby reducing the effect caused by burst bit errors and improving the accuracy of codeword synchronization.

[0063] Optionally, when multiple observation bits are selected, the positions of the multiple observation bits may traverse all positions in the test data block.

[0064] For example, when multiple observation bits are located in a single test data block, the multiple observation bit positions can traverse all positions in the test data block, in other words, the multiple observation bit positions traverse all positions in the codeword. In the observation bit selection scheme shown in Figure 4, the codeword is n bits long and the number of observation bits is P. When P is equal to n, the multiple observation bit positions can traverse all positions in the single test data block.

[0065] For example, when multiple observation bits are located in multiple test data blocks respectively, the same position in each of the multiple test data blocks is regarded as an equivalent position. For example, the first position in the multiple test data blocks is regarded as an equivalent position. In this way, the positions of the multiple observation bits can traverse all the equivalent positions, in other words, the positions of the multiple observation bits traverse all the positions in the multiple test data blocks. In the observation bit selection scheme shown in FIG. 5, the length of the codeword is n bits, in this case, the number of equivalent positions is n, and the number of observation bits is P. When P is equal to n, the positions of the multiple observation bits can traverse all the equivalent positions, in other words, the positions of the multiple observation bits can traverse all the positions in the multiple test data blocks.

[0066] Optionally, if multiple observation bits are selected, the positions of the multiple observation bits may alternatively not traverse all positions in the codeword, i.e., the value of P may be less than n.

[0067] If multiple observation bit positions traverse all positions in the test data block, the accuracy of the codeword synchronization result will be higher. However, as the number of observation bits increases, the system resources consumed in the codeword synchronization process also increases.

[0068] A signal may be modulated at the transmitting side to obtain a modulated signal. Common modulation methods include Pulse-Amplitude Modulation (PAM), Quadrature Amplitude Modulation (QAM), Phase-Shift Keying (PSK), etc. The pulse amplitude of the modulated signal may include multiple orders, and the number of the multiple orders may be called the modulation order. PAM is used as an example. When the pulse amplitude of the modulated signal has two orders, the modulation order is 2, and the modulation scheme may be called PAM2, and when the pulse amplitude of the modulated signal has four orders, the modulation order is 4, and the modulation scheme may be called PAM4, and so on. The modulated signal may be represented as a modulated data sequence. Compared with a non-modulated data sequence, the basic unit of a modulated data sequence changes from a bit to a symbol. Specifically, in a modulated data sequence, a codeword includes some symbols, and a symbol includes some bits. The number of bits included in a symbol is related to the modulation order. When the modulation order is M, the number of bits contained in a symbol is log 2 M, where M is an integer multiple of 2. For example, when the modulation order is 2, the symbol contains 1 bit, or when the modulation order is 4, the symbol contains 2 bits. It can be known that the start position of the codeword is indeed the start position of a particular symbol, but not other positions of the symbol. Therefore, for a modulated signal, when multiple observation bits are selected, only the start bit of the symbol may be considered, without considering other bits of the symbol.

[0069] Optionally, the multiple observation bits are respectively start bits of multiple symbols, the multiple symbols are in a single test data block, and the positions of the multiple symbols in the test data block are sequentially arranged backward. Specifically, the start bits of the modulation symbols are selected as the observation bits at intervals of T modulation symbols, where T is an integer greater than 0. In other words, the start bits of the modulation symbols are selected as T log 2The observation bits are selected at intervals of M bits. Figure 6 shows an observation bit selection scheme where the data sequence is a modulated signal and the modulation order is 4. In this case, the data sequence includes multiple modulation symbols, each of which includes two bits, e.g., one symbol includes x(0) and x(1), one symbol includes x(2) and x(3), one symbol includes x(4) and x(5), and so on. 1 , b 2 , and b 3 are three adjacent observation bits, corresponding to three bits x(0), x(2), and x(4) in the data sequence. The three observation bits are the start bits of three symbols, respectively, the three symbols are the symbol containing x(0) and x(1), the symbol containing x(2) and x(3), and the symbol containing x(4) and x(5). The interval between two adjacent symbols in the three symbols is one symbol, i.e., T is 1. In addition, the positions of the three symbols in a single test data block are arranged sequentially backward. Although FIG. 6 shows only three observation bits, the manner of selecting more observation bits can be inferred by analogy. Details will not be described again in this specification.

[0070] Optionally, the multiple observation bits are start bits of multiple symbols respectively, the multiple symbols are located in multiple test data blocks respectively, and the positions of each of the multiple symbols in each test data block are sequentially arranged backwards. Specifically, the start bits of the modulation symbols are selected as the observation bits in an interval of L×m+T modulation symbols, where L is the number of test data blocks in the interval, the length of the test data block is m modulation symbols, and L and T are integers greater than 0. In other words, the start bits of the modulation symbols are selected as (L·m+T)·log 2The observation bits are selected at intervals of M bits. Figure 7 shows an observation bit selection scheme where the data sequence is a modulated signal and the modulation order is 4. In this case, the data sequence includes multiple modulation symbols, each of which includes two bits, e.g., one symbol includes x(0) and x(1), one symbol includes x(L×n) and x(L×n+1), one symbol includes x(L×n+2) and x(L×n+3), and so on. 1 and b 2 are two adjacent observation bits, corresponding to two bits x(0) and x(L×n+2) in the data sequence. The two observation bits are the start bits of two symbols, respectively, the two symbols being the symbol containing x(0) and x(1) and the symbol containing x(L×n+2) and x(L×n+3). In addition, the two observation bits are located in two different test data blocks, for example, in the test data block obtained through the split using x(0) as the start position of FIG. 7 and the test data block obtained through the split using x(L×n) as the start position, respectively. The interval between the two test data blocks is L test data blocks, and the interval between the two observation bits is L×m+1 symbols, i.e., T is 1. In the test data block obtained through the split using x(0) as the start position, b 1 The symbol in which is located is the first symbol in the test data block. In the test data block obtained through division using x(L×n) as the starting position, b 2 The symbol in which is located is the second symbol in the test data block. That is, the positions of each of the two symbols in each test data block are arranged sequentially backward. Although FIG. 7 shows only two observation bits, the method of selecting more observation bits can be inferred by analogy. Details are not described again in this specification. In this case, the interval between adjacent observation bits is longer, and the correlation between observation bits is lower, which reduces the effect caused by burst bit errors and improves the accuracy of codeword synchronization.

[0071] S222: Select a candidate bit from a plurality of observed bits. The candidate bit is one of the plurality of observed bits, and the candidate bit is an observed bit that is most likely to be at a synchronization position. Specifically, S222 can include two steps: S2221 and S2222.

[0072] S2221: Obtain a plurality of groups of first test data blocks from the data sequence through division based on a plurality of observation bits, and the plurality of groups of first test data blocks have a one-to-one correspondence with the plurality of observation bits. Specifically, each of the plurality of groups of first test data blocks includes at least one first test data block, and a position of each of the plurality of observation bits is a starting position of each of the plurality of groups of first test data blocks.

[0073] Optionally, each of the plurality of observation bits is used as a starting position, and N test data blocks after the observation bit are selected, where N is an integer equal to or greater than 1. The position of each of the plurality of observation bits is a starting position of each of the plurality of groups of first test data blocks. The N test data blocks selected using each of the plurality of observation bits as a starting position are a group of first test data blocks. In this case, the N test data blocks of the plurality of groups selected using each of the plurality of observation bits as a starting position are the plurality of groups of first test data blocks. Each of the plurality of groups of first test data blocks corresponds to one observation bit used as a starting position of a group of first test data blocks, i.e., the plurality of groups of first test data blocks have a one-to-one correspondence with the plurality of observation bits.

[0074] Optionally, the N test data blocks may be consecutive, i.e., each of the first test data blocks includes N consecutive data blocks. When each test data block has a length of n bits, N×n consecutive bits after the observation bit are selected to obtain the N test data blocks.

[0075] Optionally, the N test data blocks may be non-contiguous, and the starting position of each of the N test data blocks is correlated with the observation bit corresponding to the group of the test data blocks. Specifically, the interval between the starting position of each test data block and the observation bit corresponding to the group of the test data blocks is an integer multiple of the length of the codeword, that is, the interval between every two of the N test data blocks is an integer multiple of the length of the codeword. In addition, the interval between every two of the N test data blocks may be the same or different.

[0076] As shown in Fig. 4, the observed bit b 1 is used as the starting position, and the observed bit b 1 The first group of test data blocks is selected after N test data blocks B 1 , B 2 , ..., and B N Each test data block is n bits long. Similarly, the observation bit b 2 or b 3 If is used as the starting position, then the observed bit b 2 or b 3 It is also possible that the first group of test data blocks after the observation bit b 1 , b 2 , or b 3 When the first test data block of the plurality of groups is selected when the first test data block of the plurality of groups is used as the starting position separately. The method of selecting the first test data block of the plurality of groups in Figures 5, 6 and 7 is the same as that in Figure 4. The details are not described again in this specification.

[0077] S2222: Select one observed bit from the multiple observed bits, ie, the observed bit most likely to be at a synchronization position, as a candidate bit based on the characteristic values ​​of the first test data blocks of the multiple groups.

[0078] Optionally, when one observation bit is selected from the plurality of observation bits as the observation bit most likely to be in the synchronization position based on the characteristic values ​​of the plurality of groups of first test data blocks, the selection scheme may be an early-termination selection scheme. Specifically, whether the characteristic value of each of the plurality of groups of first test data blocks satisfies the candidate condition is determined sequentially until it is determined that the characteristic value of the group of first test data blocks satisfies the candidate condition, and the observation bit corresponding to the group of first test data blocks that satisfies the candidate condition is used as the candidate bit.

[0079] Optionally, when one observed bit is selected from the plurality of observed bits as the observed bit most likely to be in the synchronization position based on the characteristic values ​​of the first test data blocks of the plurality of groups, the selection scheme may be a traversal selection scheme, specifically, all the characteristic values ​​of the first test data blocks of the plurality of groups are compared, and the observed bit corresponding to the group of the first test data blocks whose characteristic value is an extreme value is used as the candidate bit.

[0080] In the early termination selection method and the traversal selection method, the characteristic values ​​can be calculated in parallel. Specifically, multiple calculation units are used to simultaneously calculate the characteristic values ​​of multiple test data blocks. For example, 10 calculation units are used to simultaneously calculate the characteristic values ​​of 10 test data blocks. In the parallel calculation method, the calculation time can be reduced and the waiting time can be reduced.

[0081] Optionally, the characteristic value may be a characteristic value of a syndrome.

[0082] A parity-check matrix may be generated for each linear block code. The parity-check matrix describes the linear relationship between data in the codewords of the linear block code, and the parity-check matrix may be applied to the decoding process. When the data sequence is a linear block code, a parity-check matrix also exists for the data sequence and may be called the parity-check matrix of the data sequence. Specifically, the data sequence and the parity-check matrix of the data sequence satisfy the following equation:

number

[0083] As mentioned above, when a data sequence is received at the receiving end, the starting position of the codeword in the data sequence needs to be determined. If the codeword is not obtained from the data sequence through division at the correct starting position, the obtained codeword no longer satisfies equation (1). In this case, the syndrome of the codeword in the data sequence can be expressed using the following equation: S R = R H T (2), where: R is the codeword in the data sequence received by the receiver, and S R is the syndrome of the codeword, and H is the parity check matrix of the original data sequence sent by the sender. In equation (2), the syndrome of a codeword in the data sequence received by the receiver is the product of the codeword and the transpose of the parity check matrix of the original data sequence sent by the sender. From the above analysis, for a received codeword, when no bit errors occur in the codeword, S Ris an all-zero matrix, or when a bit error occurs in the codeword, S R It can be seen that it is highly likely that is no longer an all-zero matrix. Therefore, codeword synchronization can be performed using the syndrome of the test data block in the data sequence received by the receiver. Specifically, using the syndrome of the test data block in the data sequence received by the receiver, one observed bit from the multiple observed bits can be selected as the observed bit that is most likely to be at the synchronization position.

[0084] Optionally, the syndrome of each of the first test data blocks of the multiple groups is calculated separately.

[0085] As shown in Figure 4, the observed bit b 1 The syndrome of the first group of test data blocks having 1 (1) , S 2 (1) , ..., and S N (1) S shown in FIG. (1) are test data blocks B 1 , B 2 , ..., and B N By analogy, the start bit is the observed bit b 2 and the observation bit b as the start bit of the syndrome of the first test data block group having 3 The syndromes of the first group of test data blocks having (2) and S (3) is shown in FIG. 4. FIG. 4 only shows the scheme of calculating the syndrome of the first group of test data blocks with each of the three observation bits as the starting bit, but the scheme of calculating more syndromes can be obtained by analogy. The details are not described again in this specification. The schemes of calculating the syndrome of the first group of test data blocks in FIG. 5, FIG. 6 and FIG. 7 are similar to those in FIG. 4. The details are not described again in this specification.

[0086] For example, the characteristic value may be the number of all-zero syndromes in the syndrome. When an early termination selection scheme is used, the candidate condition is correlated with the characteristic value. The candidate condition may be that the characteristic value of the first group of test data blocks is equal to or greater than the synchronization threshold. Specifically, a relationship between the synchronization threshold and the number of all-zero syndromes in the syndrome of each group of first test data blocks is sequentially determined, and when it is determined that the number of all-zero syndromes in the syndrome of the first group of test data blocks is equal to or greater than the synchronization threshold, the observation bit corresponding to the first group of test data blocks that satisfies the candidate condition is used as the candidate bit. The observation bit corresponding to the first group of test data blocks is the observation bit used as the start bit of the first group of test data blocks.

[0087] The value of the synchronization threshold can be obtained through simulation analysis. For example, a data sequence is used as the data sequence received by the receiving side, the bit error rate of the data sequence is designed to be within an acceptable range, the number of all-zero syndromes in the syndrome of the group of test data blocks obtained through division based on the synchronization position and the number of all-zero syndromes in the syndrome of the group of test data blocks obtained through division based on the asynchronous position are counted separately, and the synchronization threshold is determined based on the difference between the two numbers, so that the synchronization threshold can be used to distinguish between the synchronization position and the asynchronous position.

[0088] When the characteristic value is the number of all-zero syndromes in the syndrome and an early termination selection scheme is used, see FIG. 4 for the process of selecting the observed bit that is most likely to be in the synchronization position. The synchronization threshold may be 2. As shown in FIG. 4, the synchronization threshold and syndrome S (1) , S (2) , and S (3)The relationship between the number of all-zero syndromes in each of the first group of syndromes of the first test data block and the number of all-zero syndromes in each of the first group of syndromes is determined in turn. For example, 1 is equal to 0, which is less than the synchronization threshold. The number Q of all-zero syndromes in the syndromes of the second group of the first test data block 2 is equal to 2, which is equal to the synchronization threshold. In this case, b 2 is selected as the most likely observed bit in the synchronization position. In addition, if the decision is 2 If you go to b 2 If it is determined that satisfies the candidate condition, the relationship between the synchronization threshold and the number of all-zero syndromes in the syndrome corresponding to the subsequent observed bit is no longer determined, i.e., the relationship between the synchronization threshold and S (3) The relationship of the number of all-zero syndromes in is no longer determined.

[0089] Optionally, the selection scheme for early termination may use a characteristic value for each group of first test data blocks, or a statistical scheme for early termination. Specifically, the characteristic value of the group of first test data blocks may be the total number of all-zero syndromes in the syndromes of all first test data blocks in the group of first test data blocks, and correspondingly, the candidate condition may be that the total number is greater than or equal to the synchronization threshold. In the selection process shown in FIG. 4, the synchronization threshold and the syndrome S (1) , S (2) , and S (3)When the relationship between the number of all-zero syndromes in each of S and S is determined in sequence, the syndrome of each test data block in each group of first test data blocks is calculated in sequence, and when the syndrome is an all-zero syndrome, the number of all-zero syndromes is increased by one, and when the accumulated number of all-zero syndromes satisfies the candidate condition, in other words when the accumulated number of all-zero syndromes is equal to or greater than the synchronization threshold, the first group of test data blocks is considered to have already satisfied the candidate condition, and no further calculations are performed for subsequent test data blocks in the group whose syndromes have not been calculated. For example, for the second group of first test data blocks, S 1 (2) and S 2 (2) If both of the first test data block and the second group are all-zero syndromes, then the number of all-zero syndromes in the syndromes of the second group of the first test data block, Q 2 is accumulated up to 2, which is the synchronization threshold, and the first group of test data blocks already meets the candidate condition. In this case, b is selected as the observed bit most likely to be in the synchronization position. 2 is selected and the subsequent S 3 (2) From S N (2) The syndromes of the first test data blocks are no longer calculated. Optionally, in the selection manner of early termination, a statistical manner of traversal may be used for the characteristic value of each group of first test data blocks. Specifically, the characteristic value of the group of first test data blocks may be the cumulative number of all-zero syndromes in the syndromes of the first X first test data blocks in the group of first test data blocks, and correspondingly, the candidate condition may be that the cumulative number is equal to or greater than the synchronization threshold. In a specific selection process, the syndromes of each first test data block in the group are calculated to determine whether the total number of all-zero syndromes in the group of syndromes meets the candidate condition, in other words, whether the total number of all-zero syndromes in the group of syndromes is equal to or greater than the synchronization threshold. The specific operation process is not described again in this specification.

[0090] For example, the characteristic value may be the number of all-zero syndromes in the syndrome. When the traversal selection method is used, the extreme value is correlated with the characteristic value. The extreme value may be a maximum value. Specifically, the number of all-zero syndromes in the syndrome of each group of first test data blocks may be counted, the group of first test data blocks having the maximum number of all-zero syndromes is determined, and the observation bit corresponding to the group of first test data blocks is used as the observation bit most likely to be at the synchronization position.

[0091] When the characteristic value is the number of all-zero syndromes in the syndrome and a traversal selection scheme is used, see further FIG. 4 for the process of selecting the observation bit that is most likely to be in the synchronization position. As shown in FIG. 4, (1) , S (2) , and S (3) The number of all-zero syndromes in each of Q is counted separately, 1 , Q 2 , and Q 3 The maximum value of the number is determined, for example, Q 1 =0, Q 2 =0, and Q 3 = 2, and the maximum value is: Q 3 = 2. In this case, b is the most likely observed bit to be in the synchronous position. 3 is selected, and b 3 is the most probable synchronization position.

[0092] For example, the characteristic value may be the number of non-all-zero syndromes in the syndrome. When an early termination selection method is used, the candidate condition is correlated with the characteristic value. The candidate condition may be that the characteristic value of the group of first test data blocks is equal to or less than the synchronization threshold. Specifically, the relationship between the synchronization threshold and the number of non-all-zero syndromes in the syndrome of each group of first test data blocks is determined sequentially, and when it is determined that the number of non-all-zero syndromes in the syndrome of the group of first test data blocks is equal to or less than the synchronization threshold, the observation bit corresponding to the group of first test data blocks that satisfies the candidate condition is used as the candidate bit. The value of the synchronization threshold may alternatively be obtained through simulation analysis. The specific process is similar to that of the synchronization threshold corresponding to the all-zero syndrome. Details will not be described again in this specification.

[0093] For example, the characteristic value may be the number of non-all-zero syndromes in the syndrome. When a traversal selection scheme is used, the extreme value is correlated with the characteristic value. The extreme value may be a minimum value. Specifically, the number of non-all-zero syndromes in the syndrome of each group of first test data blocks may be counted, a group of first test data blocks having a minimum number of non-all-zero syndromes is determined, and the observation bit corresponding to the group of first test data blocks is used as the observation bit most likely to be at the synchronization position.

[0094] For example, the characteristic value may be the number of zero elements in the syndrome. When an early termination selection scheme is used, the candidate condition is correlated with the characteristic value. The candidate condition may be that the characteristic value of the group of first test data blocks is equal to or greater than the synchronization threshold. Specifically, a relationship between the synchronization threshold and the number of zero elements in the syndrome of each group of first test data blocks is sequentially determined, and when it is determined that the number of zero elements in the syndrome of the group of first test data blocks is equal to or greater than the synchronization threshold, the observation bits corresponding to the group of first test data blocks that satisfy the candidate condition are used as candidate bits. The value of the synchronization threshold may alternatively be obtained through simulation analysis.

[0095] For example, the characteristic value may be the number of zero elements in the syndrome. When the traversal selection method is used, the extreme value is correlated with the characteristic value. The extreme value may be a maximum value. Specifically, the number of zero elements in the syndrome of each group of first test data blocks may be counted, the group of first test data blocks having the largest number of zero elements is determined, and the observation bit corresponding to the group of first test data blocks is used as the observation bit most likely to be in the synchronization position.

[0096] For example, the characteristic value may be the number of non-zero elements in the syndrome. When an early termination selection scheme is used, the candidate condition is correlated with the characteristic value. The candidate condition may be that the characteristic value of the group of first test data blocks is less than or equal to a synchronization threshold. Specifically, a relationship between the synchronization threshold and the number of non-zero elements in the syndrome of each group of first test data blocks is sequentially determined, and when it is determined that the number of non-zero elements in the syndrome of the group of first test data blocks is less than or equal to the synchronization threshold, the observation bits corresponding to the group of first test data blocks that satisfy the candidate condition are used as candidate bits. The value of the synchronization threshold may alternatively be obtained through simulation analysis.

[0097] For example, the characteristic value may be the number of non-zero elements in the syndrome. When a traversal selection scheme is used, the extreme value is correlated with the characteristic value. The extreme value may be a minimum value. Specifically, the number of non-zero elements in the syndrome of each group of first test data blocks may be counted, a group of first test data blocks having a minimum number of non-zero elements is determined, and the observation bit corresponding to the group of first test data blocks is used as the observation bit most likely to be at the synchronization position.

[0098] When the characteristic value is the number of non-all-zero syndromes, zero elements, or non-zero elements in the syndrome, please refer to the specific implementation process of the data sequence shown in Figure 4 for the description when the characteristic value is the number of all-zero syndromes in the syndrome. Details will not be described again in this specification.

[0099] Optionally, the characteristic value may be a correctability characteristic value. After obtaining the codeword from the data sequence through the splitting, the receiver may determine a state of the codeword, the state including a correctable state and an uncorrectable state. When the codeword is in a correctable state, the codeword is also referred to as a correctable codeword. When the codeword is in an uncorrectable state, the codeword is also referred to as an uncorrectable codeword. The correctability characteristic value of the group of codewords may be correlated with the state of the codeword in the group of codewords. Similarly, for the test data blocks obtained from the data sequence received by the receiver through the splitting, the state of the test data block may be determined, the state including a correctable state and an uncorrectable state. When the test data block is in a correctable state, the test data block is also referred to as a correctable test data block. When the test data block is in an uncorrectable state, the test data block is also referred to as an uncorrectable test data block. The correctability characteristic value of the group of test data blocks may be correlated with the state of the test data block in the group of test data blocks.

[0100] For example, the correctability characteristic value may be the number of correctable test data blocks. When an early termination selection scheme is used, the candidate condition is correlated with the characteristic value. The candidate condition may be that the characteristic value of the group of first test data blocks is equal to or greater than the synchronization threshold. Specifically, a relationship between the synchronization threshold and the number of correctable test data blocks in each group of first test data blocks is sequentially determined, and when it is determined that the number of correctable test data blocks in each group of first test data blocks is equal to or greater than the synchronization threshold, the observed bits corresponding to the group of first test data blocks that meets the candidate condition are used as candidate bits. The value of the synchronization threshold may alternatively be obtained through simulation analysis.

[0101] When the correctability characteristic value is a correctable test data block and an early termination selection scheme is used, see FIG. 4 for the process of selecting the observation bit that is most likely to be at the synchronization position. The synchronization threshold may be 2. As shown in FIG. 4, the relationship between the synchronization threshold and the number of correctable test data blocks in each group of the first test data blocks is determined sequentially. For example, the number Q of correctable test data blocks in the first group of the first test data blocks is determined sequentially. 1 is equal to 0, which is less than the synchronization threshold. The number Q of correctable test data blocks in the second group of the first test data blocks 2 is equal to 2, which is equal to the synchronization threshold. In this case, b 2 is selected as the most likely observed bit in the synchronization position. In addition, if the decision is 2 If you go to b 2 If it is determined that Q satisfies the candidate condition, the relationship between the synchronization threshold and the number of correctable test data blocks corresponding to the subsequent observed bits is no longer determined, i.e., Q 3 The relationship between the sync threshold is no longer determined.

[0102] For example, the correctability characteristic value may be the number of correctable test data blocks. When a traversal selection scheme is used, the extreme value is correlated with the characteristic value. The extreme value may be a maximum value. Specifically, the number of correctable test data blocks in the syndrome of each group of first test data blocks may be counted, a group of first test data blocks having a maximum number of correctable test data blocks is determined, and the observation bit corresponding to the group of first test data blocks is used as the observation bit most likely to be at the synchronization position.

[0103] When the correctability characteristic value is a correctable test data block and a traversal selection scheme is used, please refer to FIG. 4 for the process of selecting the observed bit that is most likely to be at the synchronization position. As shown in FIG. 4, the observed bit b 1 , b 2 , and b 3 The number of correctable test data blocks in each group of first test data blocks having each of Q 1 , Q 2 , and Q 3 The maximum value of the number is determined, for example, Q 1 =0, Q 2 =0, and Q 3 = 2, and the maximum value is: Q 3 = 2. In this case, b is the most likely observed bit to be in the synchronous position. 3 is selected, and b 3 is the most probable synchronization position.

[0104] For example, the correctability characteristic value may be the number of uncorrectable test data blocks. When an early termination selection scheme is used, the candidate condition is correlated with the characteristic value. The candidate condition may be that the characteristic value of the group of first test data blocks is less than or equal to a synchronization threshold. Specifically, a relationship between the synchronization threshold and the number of uncorrectable test data blocks in each group of first test data blocks is sequentially determined, and when it is determined that the number of uncorrectable test data blocks in each group of first test data blocks is less than or equal to the synchronization threshold, the observed bits corresponding to the group of first test data blocks that meets the candidate condition are used as candidate bits. The value of the synchronization threshold may alternatively be obtained through simulation analysis.

[0105] For example, the correctability characteristic value may be the number of uncorrectable test data blocks. When a traversal selection scheme is used, the extreme value is correlated with the characteristic value. The extreme value may be a minimum value. Specifically, the number of uncorrectable test data blocks in the syndrome of each group of first test data blocks may be counted, a group of first test data blocks having a minimum number of uncorrectable test data blocks is determined, and the observation bit corresponding to the group of first test data blocks is used as the observation bit most likely to be at the synchronization position.

[0106] Optionally, the characteristic value may be a reconstructed parity characteristic value. The reconstructed parity characteristic value correlates with the relationship between the reconstructed parity bit and the original parity bit. Referring to the above description, in a codeword having a length of n bits, the first k bits are information bits and the last nk bits are parity bits. The parity bits of the last nk bits are calculated based on the first k information bits according to a specific encoding rule. For a data sequence received by the receiver, if the start position of the codeword in the data sequence is not found, the codeword obtained through the division no longer satisfies the above-mentioned relationship between the information bits and the parity bits. That is, the content that is the same as the last nk bits in each test data block cannot be obtained using the first k bits as a reference according to the same characteristic encoding rule. For each test data block in the data sequence received by the receiver, the last nk bits and the first k bits may no longer satisfy the above-mentioned specific encoding rule. Therefore, the last nk bits recalculated using the first k bits of each test data block in the data sequence received by the receiver as a reference according to a specific encoding rule may be different from the last nk bits of each test data block in the data sequence received by the receiver. The last nk bits of each test data block in the data sequence received by the receiver may be called received parity bits. The last nk bits recalculated using the first k bits of each test data block in the data sequence received by the receiver as a reference according to a specific encoding rule may be called reconstructed parity bits.

[0107] From the above analysis, it can be known that the reconstructed parity bit is different from the received parity bit when a bit error occurs in the test data block. Therefore, the reconstructed parity bit in each test data block in the data sequence received by the receiving side can be compared with the received parity bit to perform codeword synchronization. Specifically, the reconstructed parity bit in each test data block in the data sequence received by the receiving side can be compared with the received parity bit, and one observed bit from the multiple observed bits is selected as the observed bit that is most likely to be in the synchronization position.

[0108] For example, the reconstructed parity characteristic value may be the number of test data blocks whose reconstructed parity bit is the same as the received parity bit. When an early termination selection scheme is used, the candidate condition is correlated with the characteristic value. The candidate condition may be equal to or greater than a synchronization threshold. Specifically, a relationship between the synchronization threshold and the number of test data blocks whose reconstructed parity bit is the same as the received parity bit in each group of first test data blocks is sequentially determined, and when it is determined that the number of test data blocks whose reconstructed parity bit is the same as the received parity bit in the group of first test data blocks is equal to or greater than the synchronization threshold, the observed bits corresponding to the group of first test data blocks that satisfy the candidate condition are used as candidate bits. The value of the synchronization threshold may alternatively be obtained through simulation analysis.

[0109] When the reconstructed parity characteristic value is the number of test data blocks whose reconstructed parity bit is the same as the received parity bit and an early termination selection scheme is used, see FIG. 4 for the process of selecting the observed bit that is most likely to be in the synchronization position. The synchronization threshold may be 2. As shown in FIG. 4, the relationship between the synchronization threshold and the number of test data blocks whose reconstructed parity bit is the same as the received parity bit in each group of the first test data blocks is determined sequentially. For example, the number Q of test data blocks whose reconstructed parity bit is the same as the received parity bit in the first group of the first test data blocks is determined as follows: 1 is equal to 0, which is less than the synchronization threshold. The number Q of test data blocks whose reconstructed parity bits are the same as the received parity bits in the second group of the first test data blocks. 2 is equal to 2, which is equal to the synchronization threshold. In this case, b 2 is selected as the most likely observed bit in the synchronization position. In addition, if the decision is 2 If you go to b 2 If it is determined that Q satisfies the candidate condition, the relationship between the synchronization threshold and the number of test data blocks whose reconstructed parity bits are the same as the received parity bits and correspond to the subsequent observed bits is no longer determined, i.e., Q 3 The relationship between the sync threshold is no longer determined.

[0110] For example, the reconstructed parity characteristic value may be the number of test data blocks whose reconstructed parity bit is the same as the received parity bit. When a traversal selection scheme is used, the extreme value is correlated with the characteristic value. The extreme value may be a maximum value. Specifically, the number of test data blocks whose reconstructed parity bit is the same as the received parity bit in each group of first test data blocks may be counted, a group of first test data blocks having a maximum number of test data blocks whose reconstructed parity bit is the same as the received parity bit is determined, and the observation bit corresponding to the group of first test data blocks is used as the observation bit most likely to be in a synchronization position.

[0111] When the reconstructed parity characteristic value is the number of test data blocks whose reconstructed parity bits are the same as the received parity bits, and a traversal selection scheme is used, see further FIG. 4 for the process of selecting the observed bit that is most likely to be in the synchronization position. As shown in FIG. 4, the observed bit b 1 , b 2 , and b 3 The number of test data blocks whose reconstructed parity bits are the same as the received parity bits in each group of the first test data blocks, each having Q 1 , Q 2 , and Q 3 The maximum value of the number is determined, for example, Q 1 =0, Q 2 =0, and Q 3 = 2, and the maximum value is: Q 3 = 2. In this case, b is the most likely observed bit to be in the synchronous position. 3 is selected, and b 3 is the most probable synchronization position.

[0112] For example, the reconstructed parity characteristic value may be the number of test data blocks whose reconstructed parity bits differ from the received parity bits. When an early termination selection scheme is used, the candidate condition is correlated with the characteristic value. The candidate condition may be less than or equal to a synchronization threshold. Specifically, a relationship between the synchronization threshold and the number of test data blocks whose reconstructed parity bits differ from the received parity bits in each group of first test data blocks is sequentially determined, and when it is determined that the number of test data blocks whose reconstructed parity bits differ from the received parity bits in the group of first test data blocks is less than or equal to the synchronization threshold, the observed bits corresponding to the group of first test data blocks that satisfy the candidate condition are used as candidate bits. The value of the synchronization threshold may alternatively be obtained through simulation analysis.

[0113] For example, the reconstructed parity characteristic value may be the number of test data blocks whose reconstructed parity bits differ from the received parity bits. When a traversal selection scheme is used, the extreme value is correlated with the characteristic value. The extreme value may be a minimum value. Specifically, the number of test data blocks whose reconstructed parity bits differ from the received parity bits in each group of first test data blocks may be counted, a group of first test data blocks having a minimum number of test data blocks whose reconstructed parity bits differ from the received parity bits is determined, and the observation bit corresponding to the group of first test data blocks is used as the observation bit most likely to be in a synchronization position.

[0114] Optionally, a synchronization possibility index of the plurality of observation bits is respectively determined based on the characteristic values ​​of the first test data blocks of the plurality of groups, and a larger value of the synchronization possibility index indicates that the position of the observation bit is more likely to be a synchronization position. For example, when the characteristic value of the first test data blocks of the plurality of groups is the number of all-zero syndromes in the syndrome of each of the first test data blocks of the plurality of groups, the synchronization possibility index may be positively correlated with the number of all-zero syndromes. Specifically, a larger number of all-zero syndromes and a larger value of the synchronization possibility index indicate that the position of the observation bit is more likely to be a synchronization position. For example, when the characteristic value of the first test data blocks of the plurality of groups is the number of non-all-zero syndromes in the syndrome of each of the first test data blocks of the plurality of groups, the synchronization possibility index may be negatively correlated with the number of non-all-zero syndromes. Specifically, a smaller number of non-all-zero syndromes and a larger value of the synchronization possibility index indicate that the position of the observation bit is more likely to be a synchronization position.Similarly, when the characteristic value of the first test data blocks of the plurality of groups is the number of zero elements in a syndrome of each of the first test data blocks of the plurality of groups, or the characteristic value of the first test data blocks of the plurality of groups is the number of correctable test data blocks of each of the first test data blocks of the plurality of groups, or the characteristic value of the first test data blocks of the plurality of groups is the number of test data blocks whose reconstructed parity bits are the same as the received parity bits of each of the first test data blocks of the plurality of groups, the synchronizability index is positively correlated with the number of zero elements, the number of correctable test data blocks, or the number of test data blocks whose reconstructed parity bits are the same as the received parity bits of each of the first test data blocks of the plurality of groups. When the characteristic value of the first test data blocks of the plurality of groups is the number of non-zero elements in the syndrome of each of the first test data blocks of the plurality of groups, or the characteristic value of the first test data blocks of the plurality of groups is the number of uncorrectable test data blocks of each of the first test data blocks of the plurality of groups, or the characteristic value of the first test data blocks of the plurality of groups is the number of test data blocks whose reconstructed parity bits differ from the received parity bits of each of the first test data blocks of the plurality of groups, the synchronizability index may be negatively correlated with the number of non-zero elements, the number of uncorrectable test data blocks, or the number of test data blocks whose reconstructed parity bits differ from the received parity bits. Details will not be described again in this specification.

[0115] Optionally, when the number of observation bits having the maximum value of the synchronization possibility index in the first test data block of the multiple groups is greater than 1, one of the observation bits may be selected as the observation bit most likely to be in the synchronization position based on other conditions. For example, one observation bit is randomly selected as the observation bit most likely to be in the synchronization position from the observation bits having the maximum value of the synchronization possibility index. For example, the observation bit ranked first in the data sequence is selected as the observation bit most likely to be in the synchronization position from the observation bits having the maximum value of the synchronization possibility index.

[0116] S230: In the second stage, a verification is performed on the candidate bit, and if the verification is successful, the position of the candidate bit is determined to be a synchronization position. Specifically, S230 may include two steps: S231 and S232.

[0117] S231: Obtain a group of second test data blocks from a data sequence through division based on a candidate bit, and the group of second test data blocks includes at least one second test data block. The candidate bit is an observed bit that is most likely to be at a synchronization position.

[0118] Optionally, in the second stage, when at least one second test data block is obtained from the data sequence through partitioning based on the candidate bits in the method, only a part of the data sequence may be used, for example a second subsequence of the data sequence. The step of obtaining a group of second test data blocks from the data sequence through partitioning based on the candidate bits is a step of obtaining a group of second test data blocks from the second subsequence through partitioning based on the candidate bits.

[0119] Optionally, the second subsequence may be the same as the first subsequence in the first stage. In particular, all bits of the second subsequence are the same as those of the first subsequence, and the two subsequences completely overlap. Optionally, the second subsequence may alternatively be partially the same as the first subsequence in the first stage. In particular, some bits of the second subsequence are the same as those of the first subsequence, and the two subsequences partially overlap. Optionally, the second subsequence may alternatively be different from the first subsequence in the first stage. In particular, all bits of the second subsequence are different from those of the first subsequence, and the two subsequences do not intersect.

[0120] The smaller the intersection between the data used in the first stage and the data used in the second stage, the higher the independence between the data used in the first stage and the data used in the second stage, and the higher the accuracy of the coding synchronization result. Therefore, when the first subsequence is different from the second subsequence, the higher the accuracy of the coding synchronization result.

[0121] In a second stage, a second group of test data blocks is obtained from the second subsequence through a division based on candidate bits, i.e., the observed bits most likely to be in a synchronization position, and the second group of test data blocks includes at least one second test data block.

[0122] The step of obtaining a group of second test data blocks from the second subsequence through partitioning based on the candidate bits may comprise using the candidate bits as starting bits of the at least one second test data block to obtain the at least one second test data block through partitioning.

[0123] Alternatively, obtaining a group of second test data blocks from the second subsequence through a division based on the observed bit most likely to be in the synchronization position may include the steps of: using the observed bit most likely to be in the synchronization position as a start bit of a test data block to divide the second subsequence into a plurality of test data blocks; and selecting at least one test data block from the plurality of test data blocks as the at least one second test data block, where there are some test data blocks between the at least one second test data block and the observed bit most likely to be in the synchronization position, and the at least one second test data block can be located before or after the observed bit most likely to be in the synchronization position.

[0124] Optionally, the at least one second test data block may be consecutive. Specifically, the at least one second test data block includes N consecutive data blocks. When the length of each test data block is n bits, N×n consecutive bits after the observation bit are selected to obtain the at least one second test data block.

[0125] Optionally, the at least one second test data block may be discontinuous, and the starting position of each of the at least one second test data block is correlated with the candidate bit. Specifically, the interval between the starting position of each test data block and the candidate bit is an integer multiple of the length of the codeword, that is, the interval between every two test data blocks of the at least one second test data block is an integer multiple of the length of the codeword. In addition, the interval between every two test data blocks of the at least one second test data block may be the same or different.

[0126] S232: Perform a verification on the characteristic value of at least one second test data block, and if the verification is successful, determine that the position of the candidate bit is a synchronization position.

[0127] Optionally, a verification is performed on the characteristic value of at least one second test data block, and the verification manner may be an early-termination verification manner. Specifically, the characteristic value of each of the at least one second test data block is sequentially accumulated to obtain an accumulated value, and when the accumulated value satisfies a synchronization condition, the verification is successful and the position of the candidate bit is determined to be a synchronization position.

[0128] The synchronization conditions are correlated with the characteristic values. Specifically, The characteristic value is the number of all-zero syndromes in the syndrome, and the synchronization condition is that the accumulated value is greater than or equal to the synchronization threshold, or The characteristic value is the number of zero elements in the syndrome, and the synchronization condition is that the cumulative value is greater than or equal to the synchronization threshold, or The characteristic value is the number of correctable test data blocks, and the synchronization condition is that the cumulative value is greater than or equal to a synchronization threshold value; or The characteristic value is the number of test data blocks whose reconstructed parity bits are the same as the received parity bits, and the synchronization condition is that the accumulated value is greater than or equal to a synchronization threshold; The value of the synchronization threshold may alternatively be obtained through simulation analysis, and the synchronization threshold in step 230 and the synchronization threshold in step 2222 may have the same value or different values.

[0129] Optionally, a verification is performed on the characteristic values ​​of at least one second test data block, and the verification manner may be a traversal verification manner. Specifically, all the characteristic values ​​of the at least one second test data block are added to obtain a sum value, and when the sum value satisfies a synchronization condition, the verification is successful and the position of the candidate bit is determined to be a synchronization position.

[0130] The synchronization conditions are correlated with the characteristic values. Specifically, The characteristic value is the number of all-zero syndromes in the syndrome, and the synchronization condition is that the sum is greater than or equal to the synchronization threshold, or The characteristic value is the number of non-all-zero syndromes in the syndrome, and the synchronization condition is that the sum is less than or equal to a synchronization threshold, or The characteristic value is the number of zero elements in the syndrome, and the synchronization condition is that the sum is greater than or equal to the synchronization threshold, or The characteristic value is the number of nonzero elements in the syndrome, and the synchronization condition is that the sum is less than or equal to a synchronization threshold, or The characteristic value is the number of correctable test data blocks, and the synchronization condition is that the sum is greater than or equal to a synchronization threshold, or The characteristic value is the number of uncorrectable test data blocks, and the synchronization condition is that the sum is less than or equal to a synchronization threshold, or The characteristic value is the number of test data blocks whose reconstructed parity bits are the same as the received parity bits, and the synchronization condition is that the sum is greater than or equal to a synchronization threshold, or the characteristic value is the number of test data blocks whose reconstructed parity bits differ from the received parity bits, and the synchronization condition is that the sum is less than or equal to a synchronization threshold; The value of the synchronization threshold may alternatively be obtained through simulation analysis, and the synchronization threshold in step 230 and the synchronization threshold in step 2222 may have the same value or different values.

[0131] In the early termination verification scheme and the traversal verification scheme, the characteristic values ​​may be calculated in parallel. Specifically, multiple calculation units are used to simultaneously calculate the characteristic values ​​of multiple test data blocks. For example, 10 calculation units are used to simultaneously calculate the characteristic values ​​of 10 test data blocks. In the parallel calculation scheme, the calculation time can be reduced and the waiting time can be reduced.

[0132] 8A to 9 show an example of a process for determining an observed bit that is most likely to be at a synchronization position in a data sequence and verifying whether the position of the observed bit that is most likely to be at a synchronization position is a synchronization position. The linear block code shown in FIG. 8A and FIG. 8B is a BCH(360,340) code. Specifically, the length of the codeword is 360 bits, and the length of the information data in each codeword is 340 bits. The modulation method of the BCH(360,340) code is a Non-Return-to-Zero (NRZ) code, and the modulation order M is 2. In this case, each symbol contains 1 bit. The parity check matrix of each BCH(360,340) code is shown as follows:

number

[0133] 8A and 8B show a portion of a data sequence received by a receiver, where the starting position of a codeword in the data sequence, i.e., the synchronization position, needs to be determined. Referring to the above description, in a first step, the observed bit that is most likely to be at the synchronization position in the data sequence is determined. As shown in FIG. 8A and 8B, in the first step, the starting bit of the modulation symbol is determined by the following formula: T log 2 The observation bits are selected at intervals of M bits, where T is 1, i.e., the start bit of the modulation symbol is selected as the observation bit at intervals of 1 bit. Thus, 360 consecutive bits are selected as the observation bits, i.e., the number P of the observation bits is 360, e.g., b 1 , b 2 , b 3 , ..., b 359 , and b 360A plurality of groups of first test data blocks are obtained from the data sequence through division based on the observation bits. The number N of test data blocks in each group of the first test data blocks is 2, that is, each group of the first test data blocks includes two test data blocks, for example, B 1 and B. 2 Includes multiple groups of.

[0134] Referring to the above description, in the positions of the multiple observation bits in the data sequence shown in Figures 8A and 8B, only one observation bit is the actual synchronization position of the data sequence. The number of all-zero syndromes in the syndrome of each group of the first test data block is used as a criterion for selecting the observation bit that is most likely to be at the synchronization position. As shown in Figures 8A and 8B, the syndrome S is a row vector with a length of 4. For example, the observation bit b as the start bit is used as the criterion for selecting the observation bit that is most likely to be at the synchronization position. 1 The syndrome sets of the first group of test data blocks having 1 and B. 2 Corresponding to S 1 (1) and S 2 (1) Including, S (1) Similarly, the observed bit b 2 , b 3 , ..., b 359 , and b 360 The syndrome sets of the first group of test data blocks each having (2) , S (3) , ..., S (359) , and S (360) The number of all-zero syndromes in the syndromes of each group of the first test data block is counted, and Q 1 , Q 2 , Q 3 , ..., Q 359 , and Q 360 As shown in Figures 8A and 8B, Q1 = 0, specifically, the observed bit b 1 The syndromes of the first group of test data blocks having Q 2 =0, Q 3 =1, ..., Q 359 = 2, and Q 360 =0. Q 359 Assuming that the value of is finally the largest among all 360 Q values, the observed bit b 359 is used as the observed bit that is most likely to be in the synchronous position. 359 is considered the start bit of a test data block, and the bit at every 360 bit interval after the observed bit is the start bit of the subsequent test data block.

[0135] b 359 After b is selected as the most likely observed bit in the synchronization position, the part of the data sequence used in the first stage, i.e., the first subsequence, is 359 A group of second test data blocks is obtained through division based on . That is, the group of second test data blocks is obtained from the second subsequence through division, and the second subsequence is different from the first subsequence. As shown in FIG. 9, the group of second test data blocks includes four test data blocks. A verification is performed on the characteristic value of at least one second test data block, and the characteristic value is the number of all-zero syndromes in the syndrome of at least one second test data block. A traversal verification method is used. Specifically, the number of all-zero syndromes in all syndromes of at least one second test data block is calculated to obtain a sum value, and when the sum value is equal to or greater than the synchronization threshold, the verification is successful, and the synchronization threshold is 2. As shown in FIG. 9, in the syndrome of four test data blocks, the number of all-zero syndromes is 3, which is greater than 2. Therefore, b 359 The position is determined to be the synchronous position.

[0136] Optionally, if the verification fails, step S220 is executed again. Specifically, the first stage is executed again, and the observed bit that is most likely to be in the synchronization position is recalculated.

[0137] Step S230 is an optional step, in other words, the method may only include the first stage. In this case, step S240 is performed immediately after step S220. In this case, in the method, after the candidate bit is determined, the position of the candidate bit is directly determined as the synchronization position. That is, the most likely synchronization position is directly used as the synchronization position.

[0138] S240: Determine that the data sequence is in a synchronous lock state.

[0139] After determining the synchronization position, the receiving side can divide the received data sequence into multiple synchronization code words based on the synchronization position. When the data sequence is divided into multiple synchronization code words based on the synchronization position, the data sequence can be considered to be in a synchronization lock state. That is, after the synchronization position is determined, the receiving side determines that the data sequence is in a synchronization lock state. When the data sequence is in a synchronization lock state, the receiving side can perform operations such as error detection and error correction on the data sequence.

[0140] S250: An out-of-lock determination is performed.

[0141] After the receiver starts to perform operations such as error detection and error correction on the data sequence, the receiver still needs to continuously observe whether the code word division in the data sequence is accurate, that is, whether the synchronization position is accurate. When the synchronization position is inaccurate, the content of each test data block obtained through the division based on the synchronization position no longer corresponds to the actual code word. In this case, it can also be said that the synchronization lock state of the data sequence is lost. Therefore, the process of judging whether the synchronization position of the data sequence is accurate can also be called an out-of-lock judgment process.

[0142] In the out-of-lock judgment process, multiple synchronization code words are obtained from the data sequence through division based on the synchronization position, the synchronization position is the starting position of the multiple synchronization code words, and verification is performed on the characteristic values ​​of the multiple synchronization code words, and if the verification fails, it is determined that the data sequence is in an out-of-lock state.

[0143] Optionally, the multiple synchronization codewords are consecutive, i.e., the multiple synchronization codewords include N consecutive codewords. When each codeword is n bits long, N×n consecutive bits after the synchronization position are selected to obtain the multiple synchronization codewords.

[0144] Optionally, the multiple synchronization codewords may be discontinuous, and the start position of each of the multiple synchronization codewords is correlated with the synchronization position. Specifically, the interval between the synchronization position and the start position of each synchronization codeword is an integer multiple of the length of the codeword, and the interval between every two of the multiple synchronization codewords is an integer multiple of the length of the codeword. In addition, the interval between every two of the multiple synchronization codewords may be the same or different.

[0145] Optionally, a verification is performed on the characteristic values ​​of the plurality of synchronization code words, and the verification method may be an early-termination verification method. Specifically, the characteristic values ​​of each of the plurality of synchronization code words are sequentially accumulated to obtain an accumulated value, and when the accumulated value satisfies an out-of-lock condition, the verification fails and the position of the candidate bit is determined to be a synchronization position.

[0146] The out-of-lock condition is correlated with the characteristic values. Specifically, The characteristic value is the number of non-all-zero syndromes in the syndromes, and the out-of-lock condition is that the accumulated value is greater than or equal to the synchronization threshold, or The characteristic value is the number of nonzero elements in the syndrome, and the out-of-lock condition is that the accumulated value is greater than or equal to the synchronization threshold, or The characteristic value is the number of uncorrectable codewords, and the out-of-lock condition is that the accumulated value is greater than or equal to the synchronization threshold, or The characteristic value is the number of codewords whose reconstructed parity bits differ from the received parity bits, the out-of-lock condition is that the accumulated value is greater than or equal to a synchronization threshold, the length of the codeword is n bits, and the first k bits of the codeword are information bits. The last nk bits of the codeword are received parity bits, the reconstructed parity bits are obtained based on the information bits, and the length of the reconstructed parity bits is nk bits, where n and k are integers.

[0147] The value of the synchronization threshold may alternatively be obtained through simulation analysis. In addition, the synchronization threshold of step 250 and the synchronization thresholds of steps 230 and 2222 may have the same value or different values.

[0148] Optionally, a verification is performed on the characteristic values ​​of the multiple synchronization codewords, and the verification manner may be a traversal verification manner. Specifically, all the characteristic values ​​of the multiple synchronization codewords are added to obtain a sum value, and when the sum value satisfies an out-of-lock condition, the verification is successful and the position of the candidate bit is determined to be a synchronization position.

[0149] The out-of-lock condition is correlated with the characteristic values. Specifically, The characteristic value is the number of all-zero syndromes in the syndromes, and the out-of-lock condition is that the sum is less than or equal to the synchronization threshold, or The characteristic value is the number of non-all-zero syndromes in the syndromes, and the out-of-lock condition is that the sum is greater than or equal to the synchronization threshold, or The characteristic value is the number of zero elements in the syndrome, and the out-of-lock condition is that the sum is less than or equal to the synchronization threshold, or The characteristic value is the number of nonzero elements in the syndrome, and the out-of-lock condition is that the sum is greater than or equal to the synchronization threshold, or The characteristic value is the number of correctable codewords, and the out-of-lock condition is that the sum is less than or equal to the synchronization threshold, or The characteristic value is the number of uncorrectable codewords, and the out-of-lock condition is that the sum is greater than or equal to the synchronization threshold, or The characteristic value is the number of codewords whose reconstructed parity bit is the same as the received parity bit, and the out-of-lock condition is that the sum is less than or equal to the synchronization threshold, or The characteristic value is the number of codewords whose reconstructed parity bits differ from the received parity bits, and the out-of-lock condition is that the sum is greater than or equal to a synchronization threshold. The length of the codeword is n bits, the first k bits of the codeword are information bits, and the last nk bits of the codeword are received parity bits, the reconstructed parity bits are obtained based on the information bits, the length of the reconstructed parity bits is nk bits, and n and k are integers.

[0150] The value of the synchronization threshold may alternatively be obtained through simulation analysis. In addition, the synchronization threshold of step 250 and the synchronization thresholds of steps 230 and 2222 may have the same value or different values.

[0151] In the early termination verification scheme and the traversal verification scheme, the characteristic values ​​may be calculated in parallel. Specifically, multiple calculation units are used to simultaneously calculate the characteristic values ​​of multiple test data blocks. For example, 10 calculation units are used to simultaneously calculate the characteristic values ​​of 10 test data blocks. In the parallel calculation scheme, the calculation time can be reduced and the waiting time can be reduced.

[0152] FIG. 10 shows an example of the process of out-of-lock judgment. As shown in FIG. 10, five synchronization code words are obtained from the data sequence through division based on the synchronization position, and the number of correctable code words in the synchronization code words is counted. For example, in the decoding state, 0 indicates uncorrectable and 1 indicates correctable. In this case, in the five synchronization code words shown in FIG. 10, the number of correctable code words is 1. If the out-of-lock threshold is 3, the number of correctable code words is less than the out-of-lock threshold, the five synchronization code words meet the out-of-lock condition, and it is determined that the data sequence is in an out-of-lock state.

[0153] Optionally, when authentication does not fail, it is determined that the synchronous lock state of the data sequence has not been lost.

[0154] Optionally, after it is determined that the synchronization lock state of the data sequence is not lost, multiple synchronization code words may be selected by continuing to move backwards in the data sequence at specific intervals, and further determining whether the multiple synchronization code words selected backwards satisfy an out-of-lock condition. Optionally, moving backwards at specific intervals may be by moving by one test data block. Specifically, starting from each synchronization code word, multiple synchronization code words following that synchronization code word are observed to make an out-of-lock determination.

[0155] S260: Determine that the data sequence is out of lock.

[0156] Optionally, when the data sequence is determined to be in an out-of-lock state, an updated synchronization position of the data sequence is further determined. Specifically, the first stage and the second stage are performed again, and the synchronization position determined in the re-performed second stage is used as the updated synchronization position. In this way, a closed loop operation of synchronization lock-out-of-lock-synchronous lock is formed, thereby ensuring that the communication system is in a normal operation state of synchronization lock for as long as possible.

[0157] This method can solve the technical problem that additional data is added in the AM synchronization solution and the cascade scalability is insufficient. In addition, additional data does not need to be inserted into the data stream at the transmitting side, so there is no need to introduce an idle code block adding and deleting mechanism into the Ethernet interface, there is no need to design a corresponding logic processing unit, and there is no need to reserve a bandwidth in advance for the inserted AM sequence. If a level of FEC needs to be added based on the original FEC and a two-level cascade FEC is used, the following technical problems can be avoided: the original idle code block adding and deleting mechanism cannot be applied to the AM sequence of the second level FEC, and the high-precision clock synchronization performance is affected by adding the AM sequence of the second level FEC. In this method, the technical effect of high-precision code word synchronization for the data stream at the receiving side can be achieved, and the synchronization performance achieves high reliability.

[0158] Steps S240, S250, and S260 are all optional steps. In particular, the method may be used only to determine the synchronization position without performing error detection or error correction processing on the data sequence in the synchronous locked state or determining whether the data sequence subsequently enters an out-of-lock state.

[0159] Through simulation comparison, the codeword synchronization method provided in the present application is compared with the conventional AM synchronization solution, and the codeword synchronization method provided in the present application is superior to the conventional AM synchronization solution in the following performance indices, namely, average synchronization lock time, average occurrence time of miss-lock, average occurrence time of miss-out-of-lock, etc. Therefore, from an overall perspective, the codeword synchronization method provided in the present application can achieve higher synchronization performance than the AM synchronization solution.

[0160] 11 shows a codeword synchronization method according to an embodiment of the present application. The method includes the following steps:

[0161] Step 1: receive a data sequence, where the data sequence includes a number of bits. For the specific process of step 1, please refer to the above description of step S210.

[0162] Step 2: determine a candidate bit in the data sequence, the candidate bit being included in the plurality of bits. The candidate bit is the observed bit that is most likely to be at the synchronization position. For the specific process of step 2, please refer to the above description of step S220.

[0163] Step 3: Determine a synchronization position based on the candidate bits, where the synchronization position indicates the starting position of the codeword.

[0164] Optionally, determining the synchronization position based on the candidate bit may be: after the observation bit that is most likely to be in the synchronization position is selected, further verify whether the position of the observation bit that is most likely to be in the synchronization position is the synchronization position. The candidate bit is the observation bit that is most likely to be in the synchronization position. In this case, for the specific process of step 3, please refer to the above description of step S230. In this case, the method includes at least S210, S220, and S230 shown in FIG. 2.

[0165] Optionally, determining the synchronization position based on the candidate bit may also be, after the observation bit that is most likely to be at the synchronization position is selected, directly using the observation bit that is most likely to be at the synchronization position as the synchronization position. The candidate bit is the observation bit that is most likely to be at the synchronization position. In this case, the method includes at least S210 and S220 shown in FIG. 2.

[0166] In the two aforementioned methods of determining the synchronization position based on the candidate bits, the bits at the synchronization position are included in the candidate bits, and it can be known that the candidate bits are the observed bits that are most likely to be at the synchronization position.

[0167] Optionally, after step 3, the method further includes determining that the data sequence is in a synchronous lock state. For specific process, please refer to the above description of step S240.

[0168] Optionally, after step 3, the method further includes making an out-of-lock determination. For a specific process, please refer to the above description of step S250.

[0169] Optionally, the method may further include: Step 4: determining an updated synchronization position of the data sequence in response to the data sequence being out of lock. For a specific process, see the above description of step S260.

[0170] The codeword synchronization method of this embodiment of the present application is performed by a communication device, which may be any device for performing FEC, including but not limited to a router, a switch, a server, and a terminal device.

[0171] 12 is a schematic diagram of a possible structure of a communication device according to an embodiment of the present application. As shown in FIG. 12, a communication device 1200 includes a receiving unit 1201 and a processing unit 1202. These units can perform corresponding steps of the methods shown in FIG. 2 to FIG. 11. For example, The receiving unit 1201 is configured to receive a data sequence, the data sequence including a plurality of bits; The processing unit 1202 is configured to determine a candidate bit in a data sequence, the candidate bit being included in the plurality of bits, and determine a synchronization position based on the candidate bit, the synchronization position indicating a starting position of a codeword in the data sequence.

[0172] 13 is a schematic diagram of another structure of a communication device according to an embodiment of the present application. As shown in FIG. 13, the communication device 1300 includes at least one processor 1301 and at least one communication interface 1304. Optionally, the device 1300 may further include a memory 1303.

[0173] The processor 1301 may be a central processing unit (CPU), a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. The processor may implement or execute various logic blocks, modules, and circuits described with reference to the contents disclosed in this embodiment of the present application. Alternatively, the processor may be a combination of processors performing computational functions, such as a combination of one or more microprocessors, or a combination of a DSP and a microprocessor. The processor may be configured to determine candidate bits in a data sequence and determine a synchronization position based on the candidate bits to implement the method provided in the embodiment of the present application.

[0174] Optionally, the communication bus 1302 is configured to transmit information between the processor 1301, the communication interface 1304, and the memory 1303. The bus may be a peripheral component interconnect (PCI) bus, an extended industry standard architecture (EISA) bus, etc. The bus may be classified into an address bus, a data bus, a control bus, etc. For ease of representation, only one thick line is used to represent a bus in FIG. 13, but this does not mean that there is only one bus or one type of bus.

[0175] The memory 1303 may be a read-only memory (ROM) or other type of static storage device capable of storing static information and instructions, or a random access memory (RAM) or other type of dynamic storage device capable of storing information and instructions, and may be an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disk storage, an optical disk storage (including compact disks, laser disks, optical disks, digital versatile disks, Blu-ray disks, etc.), a disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store expected program code in the form of instructions or data structures and that can be accessed by a computer. However, the memory 1303 is not limited thereto. The memory 1303 may exist independently and be connected to the processor 1301 using the communication bus 1302. Alternatively, the memory 1303 may be integrated with the processor 1301.

[0176] Optionally, the memory 1303 is configured to store program codes or instructions for executing the solutions of the present application, and the processor 1301 controls the execution of the program codes or instructions. When the embodiment shown in FIG. 12 is implemented and the units described in the embodiment of FIG. 12 are implemented by software, software or program codes required to execute the functions of the units of FIG. 12 are stored in the memory 1303. The processor 1301 is configured to execute the program codes stored in the memory 1303. The program codes may include one or more software modules. Optionally, the processor 1301 may alternatively store program codes or instructions for executing the solutions of the present application.

[0177] The communication interface 1304 is configured to communicate with other devices or communication networks using any device such as a transceiver. The communication network may be an Ethernet, a radio access network (RAN), a wireless local area network (WLAN), etc. In this embodiment of the application, the communication interface 1304 may be configured to receive packets sent by other nodes on the segment routing network, or may send packets to other nodes on the segment routing network. The communication interface 1304 may be an Ethernet interface, a Fast Ethernet (FE) interface, a Gigabit Ethernet (GE) interface, or an Asynchronous Transfer Mode (ATM) interface, etc.

[0178] In a particular implementation, in one embodiment, the device 1300 may include multiple processors, such as the processor 1301 and processor 1305 shown in FIG. 13. Each of the processors may be a single-core (single-CPU) processor or a multi-core (multi-CPU) processor. As used herein, a processor may be one or more devices, circuits, and / or processing cores configured to process data (e.g., computer program instructions).

[0179] In a specific embodiment, the processor 1301 in the network device 1300 is configured to receive a data sequence using a communication interface, the data sequence includes a plurality of bits, determine a candidate bit in the data sequence, the candidate bit is included in the plurality of bits, determine a synchronization position based on the candidate bit, and the synchronization position indicates a starting position of a code word in the data sequence. For detailed processing procedures of the processor, please refer to steps S210, S220, S230, S240, S250, and S260 in the embodiment shown in Figure 2, steps S221 and S222 in the embodiment shown in Figure 3, and the detailed description of steps 1 to 3 shown in Figure 11. Details will not be described again in this specification.

[0180] The communication interface in the network device 1300 is used for the network device 1300 to receive and transmit data sequences using the network system. For specific processes, please refer to the detailed description of S210 in the embodiment shown in Figure 2 and step 1 shown in Figure 11. Details will not be described again in this specification.

[0181] FIG. 14 is a schematic diagram of another structure of a communication device according to an embodiment of the present application. When the communication device is a forwarding device on a network, such as a router or a switch, please refer to the schematic diagram of the structure of the device shown in FIG. 14 for the communication device. The device 1400 includes a main control board and one or more interface boards, and the main control board is communicatively connected to the interface boards. The main control board is also called a main processing unit (MPU) or a route processor card. The main control board is responsible for controlling and managing the components in the device 1400, including the functions of route calculation and device supervision and maintenance. The interface board is also called a line processing unit (LPU) or a line card, and is configured to forward data. In some embodiments, the device 1400 may further include a switching board. The switching board is communicatively connected to the main control board and the interface board. The switching board is configured to forward data between the interface boards. The switching board may also be called a switch fabric unit (SFU). The interface board includes a central processing unit, a memory, a forwarding chip, and a physical interface card (PIC). The central processing unit is communicatively connected to the memory, the network processor, and the physical interface card. The memory is configured to store a forwarding table. The forwarding chip is configured to forward a received data frame based on the forwarding table stored in the memory. If the destination address of the data frame is the address of the device 1400, the data frame is sent to the CPU for processing.If the destination address of the data frame is not the address of the device 1400, the next hop and outbound interface corresponding to the destination address are found in the forwarding table based on the destination address, and the data frame is forwarded to the outbound interface corresponding to the destination address. The forwarding chip may be a network processor (NP). A PIC, also called a sub-card, may be implemented on the interface board and is responsible for converting optical or electrical signals into data frames, checking the validity of the data frames, and then forwarding the data frames to the forwarding chip for processing. In some embodiments, a central processing unit may alternatively perform the functions of the forwarding chip. For example, software forwarding is implemented based on a general-purpose CPU so that a forwarding chip is not needed on the interface board. The communication connection between the main control board, the interface board, and the switching board is implemented using a bus. In some embodiments, the forwarding chip may be implemented by an application-specific integrated circuit (ASIC) or a field programmable gate array (FPGA).

[0182] Logically, the device 1400 includes a control plane and a forwarding plane, where the control plane includes a main control board and a central processing unit, and the forwarding plane includes various components for performing forwarding, such as memory, PIC, and NP. The control plane performs functions such as routing, generating forwarding tables, processing signaling and protocol packets, and configuring and maintaining the state of PE1. The control plane distributes the generated forwarding tables to the forwarding plane. In the forwarding plane, the NPs look up the forwarding tables based on the forwarding tables distributed by the control plane and forward packets received from the PICs of the device 1400. The forwarding tables distributed by the control plane may be stored in memory. In some embodiments, the control plane and the forwarding plane may be completely separate on different devices.

[0183] In a specific embodiment, the interface board is configured to receive a data sequence, and the data sequence includes a plurality of bits. For a specific process, please refer to the detailed description of S210 in the embodiment shown in FIG. 2 and step 1 shown in FIG. 11. The details will not be described again in this specification. The main control board is configured to determine a candidate bit in the data sequence, the candidate bit being included in the plurality of bits, and determine a synchronization position based on the candidate bit, and the synchronization position indicates a starting position of a code word in the data sequence. For a detailed processing procedure, please refer to steps S210, S220, S230, S240, S250, and S260 in the embodiment shown in FIG. 2, steps S221 and S222 in the embodiment shown in FIG. 3, and the detailed description of steps 1 to 3 shown in FIG. 11. The details will not be described again in this specification.

[0184] In a possible implementation, an inter-process communication (IPC) channel is established between the main control board and the interface board, and the main control board and the interface board communicate with each other through the IPC channel.

[0185] An embodiment of the present application provides a chip. The chip includes a memory and a processor. The memory is configured to store a computer program. The processor is configured to call the computer program from the memory and execute the computer program to perform the method in the above-mentioned method embodiment, i.e., the method in the embodiment shown in Figure 2 to Figure 11.

[0186] Optionally, the chip includes only a processor. The processor is configured to read the computer program stored in the memory and execute the computer program. When the computer program is executed, the processor executes the method in the above-mentioned method embodiment, i.e., the method in the embodiment shown in Figures 2 to 11.

[0187] Optionally, the chip may be used in an application scenario of two-level cascaded FEC. Specifically, the two-level cascaded FEC includes an inner layer FEC and an outer layer FEC. The chip provided in this embodiment of the present application is used for the inner layer FEC. The codeword synchronization method described in this application is used for the inner layer FEC, also called FEC1. The AM synchronization solution may be used for the outer layer FEC, also called FEC2. In this case, FEC1 and FEC2 may be located on one chip or on different chips. That is, the chip provided in this embodiment of the present application may include only FEC1, or may include FEC1 and FEC2.

[0188] An embodiment of the present application provides a network system. The network system includes a receiving device and a transmitting device. The receiving device is configured to receive a data sequence transmitted by the transmitting device. The receiving device can perform the steps of the embodiments shown in Figures 2 to 11.

[0189] An embodiment of the present application further provides a non-transitory storage medium configured to store software instructions used in the aforementioned embodiments. The non-transitory storage medium includes a program used to execute the method shown in the aforementioned embodiments. When the program is executed on a computer or a network device, the computer or the network device is enabled to execute the method in the aforementioned method embodiments.

[0190] An embodiment of the present application further provides a computer program product comprising computer program instructions, which when run on a computer, enables a network node to execute the method in the aforementioned method embodiments.

[0191] It should be noted that the above embodiments of the device are merely examples. The units described as separate parts may or may not be physically separated, and the parts shown as units may or may not be physical units, and may be located in one location or distributed over multiple network units. Some or all of the modules may be selected based on actual requirements to achieve the objectives of the solutions of the embodiments. In addition, in the accompanying drawings of the embodiments of the network device or host provided in this application, the connection relationships between the modules indicate that there are communication connections between the modules, and the communication connections may be specifically implemented as one or more communication buses or signal lines. Those skilled in the art can understand and implement the embodiments without creative efforts.

[0192] The method or algorithm steps described in the contents disclosed in this embodiment of the present application may be implemented by hardware or may be implemented by a processor by executing software instructions. The software instructions may include corresponding software modules. The software modules may be stored in a random access memory (RAM), a flash memory, a read-only memory (ROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a hard disk, a removable hard disk, a compact disk, or any other form of storage medium well known in the art. The storage medium is coupled to the processor such that the processor can read information from the storage medium. Of course, the storage medium may be a component of the processor.

[0193] The above specific implementation forms further describe the objectives, technical solutions and useful effects of the present application in detail. It should be understood that the above description is merely a specific implementation form of the present application, and is not intended to limit the protection scope of the present application. Any modifications, replacements or improvements made based on the technical solutions of the present application shall be included in the protection scope of the present application.

[0194] In this application, terms such as "first", "second", and "nth" are used to distinguish between the same or similar items having essentially the same usage and function. It should be understood that "first", "second", and "nth" have no dependency in logic or timing, and do not limit the number or execution order. In the following description, terms such as first and second are used to describe various elements, but it should be further understood that these elements should not be limited by the terms. These terms are used only to distinguish one element from another element. For example, a first image may be called a second image, and similarly, a second image may be called a first image, without departing from the scope of various examples. The first image and the second image may both be images, and in some cases, may be separate and different images.

[0195] As used herein, the term "at least one" means one or more. As used herein, "multiple" means two or more. For example, a plurality of second packets means two or more second packets. As used herein, the terms "system" and "network" are generally used interchangeably.

[0196] It should be understood that the terms used in the description of the various examples in this specification are intended merely to describe particular examples and are not intended to set limitations. When used in the description of the various examples and the appended claims, the singular forms "a" ("a" or "an") and "the" are intended to include the plural forms as well, unless the context clearly dictates otherwise.

[0197] It should also be understood that the term "and / or" as used herein indicates and includes any or all possible combinations of one or more of the associated listed items. The term "and / or" describes only the associated relationship to describe the associated objects and indicates that three relationships may exist. For example, A and / or B may indicate the following three cases: only A is present, both A and B are present, and only B is present. In addition, the character " / " in this application generally indicates an "or" relationship between the associated objects.

[0198] It should be understood that the sequence numbers of the above processes do not refer to the execution order in the embodiments of the present application. The execution order of the processes should be determined based on the functions and internal logic of the processes, and should not limit the implementation process in the embodiments of the present application.

[0199] However, it should be understood that determining B based on A does not mean that B is determined solely based on A. B may alternatively be determined based on A and / or other information.

[0200] It should be further understood that as used herein, the term "comprising" (also referred to as "includes", "comprises" and / or "comprising") indicates the presence of stated features, integers, steps, operations, elements, and / or components, and does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0201] It should be further understood that the term "when" may be interpreted to mean "when" or "upon," "upon a determination that" or "upon detection of." Similarly, depending on the context, the phrase "when it is determined that" or "when (a described condition or event) is detected" may be interpreted to mean "when it is determined that," "upon a determination that," "when (a described condition or event) is detected," or "upon detection of (a described condition or event)."

[0202] It should be understood that "one embodiment," "one embodiment," or "possible implementation" described throughout this specification means that a particular feature, structure, or characteristic associated with an embodiment or implementation is included in at least one embodiment of the present application. Thus, "in one embodiment," "in one embodiment," or "possible implementation" appearing throughout this specification do not necessarily refer to the same embodiment. In addition, these particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. [Explanation of symbols]

[0203] 1200, 1300 Communication Devices 1201 Receiver Unit 1202 Processing Unit 1301, 1305 processors 1302 Communication Bus 1303 Memory 1304 Communication Interface 1400 devices

Claims

1. 1. A method for codeword synchronization, the method comprising: Step 1: receiving a data sequence, the data sequence including a plurality of bits; Step 2: determining candidate bits in the data sequence, the candidate bits being included in the plurality of bits; step 3: determining a synchronization position based on the candidate bits, the synchronization position indicating a start position of a codeword within the data sequence; The codeword synchronization method includes:

2. Step 3 is performing a verification on the candidate bit, and if the verification is successful, determining that the position of the candidate bit is the synchronization position; 2. The method of claim 1, comprising:

3. Step 3 is obtaining at least one second test data block from the data sequence through division based on the candidate bits, wherein the position of the candidate bits is a starting position of the at least one second test data block; performing a verification on a characteristic value of the at least one second test data block, and if the verification is successful, determining that the position of the candidate bit is the synchronization position; 3. The method of claim 2, comprising:

4. The step of verifying the characteristic values ​​of the at least one second test data block comprises: accumulating characteristic values ​​of each of the at least one second test data block in sequence to obtain an accumulated value, the verification being successful if the accumulated value satisfies a synchronization condition.

4. The method of claim 3, comprising:

5. the characteristic value being the number of second test data blocks determined to be correct code words, and the synchronization condition being that the cumulative value is greater than or equal to a synchronization threshold; the characteristic value is a number of all-zero syndromes in a syndrome, and the synchronization condition is that the accumulated value is greater than or equal to a synchronization threshold; the characteristic value is the number of zero elements in the syndrome, and the synchronization condition is that the cumulative value is greater than or equal to a synchronization threshold; the characteristic value is a number of correctable test data blocks and the synchronization condition is that the accumulated value is greater than or equal to a synchronization threshold; or the characteristic value being the number of test data blocks whose reconstructed parity bits are the same as the received parity bits, and the synchronization condition being that the accumulated value is greater than or equal to a synchronization threshold; The test data block has a length of n bits, the first k bits of the test data block are information bits, and the last n-k bits of the test data block are the received parity bits, and the reconstructed parity bits are obtained based on the information bits, and the reconstructed parity bits have a length of n-k bits, where n and k are integers. The method of claim 4.

6. The step of verifying the characteristic values ​​of the at least one second test data block comprises: adding sequentially all characteristic values ​​of the at least one second test data block to obtain a sum value, where the verification is successful if the sum value satisfies a synchronization condition; 4. The method of claim 3, comprising:

7. the characteristic value being the number of test data blocks determined as correct code words in all of the second test data blocks, and the synchronization condition being that the cumulative value is greater than or equal to a synchronization threshold; the characteristic value being the number of test data blocks determined as incorrect code words in all the second test data blocks, and the synchronization condition being that the cumulative value is less than or equal to a synchronization threshold; the characteristic value is the number of all-zero syndromes in the syndromes, and the synchronization condition is that the sum is greater than or equal to a synchronization threshold; the characteristic value is the number of non-all-zero syndromes in the syndromes, and the synchronization condition is that the sum is less than or equal to a synchronization threshold; the characteristic value is the number of zero elements in the syndrome, and the synchronization condition is that the sum is greater than or equal to a synchronization threshold; the characteristic value is the number of non-zero elements in the syndrome, and the synchronization condition is that the sum is less than or equal to a synchronization threshold; the characteristic value is a number of correctable test data blocks, and the synchronization condition is that the sum is greater than or equal to a synchronization threshold; the characteristic value being a number of uncorrectable test data blocks, and the synchronization condition being that the sum is less than or equal to a synchronization threshold; the characteristic value being the number of test data blocks whose reconstructed parity bits are the same as the received parity bits, and the synchronization condition being that the sum is greater than or equal to a synchronization threshold; or the characteristic value being the number of test data blocks whose reconstructed parity bits differ from the received parity bits, and the synchronization condition being that the sum is less than or equal to a synchronization threshold; 7. The method of claim 6, wherein the test data block has a length of n bits, the first k bits of the test data block are information bits, and the last n-k bits of the test data block are the received parity bits, and the reconstructed parity bits are obtained based on the information bits, the reconstructed parity bits have a length of n-k bits, where n and k are integers.

8. Step 3 is using the position of said candidate bit as said synchronization position.

2. The method of claim 1, comprising:

9. Step 2 is selecting a plurality of observation bits from the data sequence; selecting the candidate bit from the plurality of observed bits; 2. The method of claim 1, comprising:

10. The step of selecting the candidate bit from the plurality of observed bits comprises: determining a plurality of groups of first test data blocks in the data sequence based on the plurality of observation bits, each of the plurality of groups of first test data blocks including at least one first test data block, and a position of each of the plurality of observation bits being a start position of each of the plurality of groups of first test data blocks; selecting an observation bit from the plurality of observation bits as the candidate bit based on characteristic values ​​of first test data blocks of the plurality of groups; 10. The method of claim 9, comprising:

11. The step of selecting one observation bit from the plurality of observation bits as the candidate bit based on the characteristic values ​​of the first test data blocks of the plurality of groups includes: determining whether a characteristic value of each of the plurality of groups of first test data blocks satisfies a candidate condition until a characteristic value of the group of first test data blocks is determined to satisfy the candidate condition; using the observation bits corresponding to the first group of test data blocks that satisfy the candidate condition as the candidate bits; The method of claim 10, comprising:

12. the characteristic value of the first group of test data blocks is a total number of first test data blocks in the first group of test data blocks that are determined to be correct code words, and the candidate condition is that the cumulative value is greater than or equal to a synchronization threshold; the characteristic value of the first group of test data blocks is a total number of first test data blocks in the first group of test data blocks that are determined to be correct code words, and the candidate condition is that the cumulative value is less than or equal to a synchronization threshold; the characteristic value of the first test data block group is a total number of all-zero syndromes in the syndromes of all first test data blocks in the first test data block group, and the candidate condition is that the total number is greater than or equal to a synchronization threshold; the characteristic value of the first test data block group is a total number of non-all-zero syndromes in all first test data block syndromes in the first test data block group, and the candidate condition is that the total number is less than or equal to a synchronization threshold; The characteristic value of the first test data block group is a total number of zero elements in the syndromes of all the first test data blocks in the first test data block group, and the candidate condition is that the total number is greater than or equal to a synchronization threshold; the characteristic value of the first group of test data blocks is a total number of non-zero elements in the syndromes of all the first test data blocks in the first group of test data blocks, and the candidate condition is that the total number is less than or equal to a synchronization threshold; the characteristic value of the first test data block group is a total number of correctable test data blocks in all first test data blocks in the first test data block group, and the candidate condition is that the total number is greater than or equal to a synchronization threshold; the characteristic value of the first group of test data blocks is a total number of uncorrectable test data blocks in all first test data blocks in the first group of test data blocks, and the candidate condition is that the total number is less than or equal to a synchronization threshold; the characteristic value of the group of first test data blocks is a total number of test data blocks whose reconstructed parity bits are the same as the received parity bits of all first test data blocks in the group of first test data blocks, and the candidate condition is that the total number is greater than or equal to a synchronization threshold; the characteristic value of the group of first test data blocks is a total number of test data blocks whose reconstructed parity bits differ from received parity bits of all first test data blocks in the group of first test data blocks, and the candidate condition is that the total number is less than or equal to a synchronization threshold; The characteristic value of the first test data block group is a cumulative number of all-zero syndromes in the syndromes of the first X first test data blocks in the first test data block group, and the candidate condition is that the cumulative number is greater than or equal to a synchronization threshold; The characteristic value of the first test data block group is a cumulative number of zero elements in a syndrome of the first X first test data blocks in the first test data block group, and the candidate condition is that the cumulative number is greater than or equal to a synchronization threshold; the characteristic value of the first group of test data blocks is a cumulative number of correctable test data blocks in the first X first test data blocks in the first group of test data blocks, and the candidate condition is that the cumulative number is greater than or equal to a synchronization threshold; or the characteristic value of the group of first test data blocks is a cumulative number of test data blocks whose reconstructed parity bits are the same as received parity bits in the first X first test data blocks in the group of first test data blocks, and the candidate condition is that the cumulative number is greater than or equal to a synchronization threshold; 12. The method of claim 11, wherein the test data block has a length of n bits, the first k bits of the test data block are information bits, and the last n-k bits of the test data block are the received parity bits, the reconstructed parity bits are obtained based on the information bits, the reconstructed parity bits have a length of n-k bits, and n, k, and X are integers.

13. The step of selecting one observation bit from the plurality of observation bits as the candidate bit based on the characteristic values ​​of the first test data blocks of the plurality of groups includes: comparing all characteristic values ​​of first test data blocks of the plurality of groups; using as the candidate bits the observed bits corresponding to the first group of test data blocks whose characteristic value is an extreme value; The method of claim 10, comprising:

14. the characteristic value being the number of first test data blocks determined to be correct code words, and the extremum being a maximum value; the characteristic value being a number of first test data blocks determined to be incorrect code words, and the extreme value being a minimum value; the characteristic value is the number of all-zero syndromes in the syndromes, and the extreme value is a maximum value; the characteristic value is the number of non-all-zero syndromes in the syndromes, and the extreme value is a minimum value; the characteristic value is the number of zero elements in the syndrome, and the extreme value is a maximum value; the characteristic value is the number of non-zero elements in the syndrome, and the extreme value is a minimum; the characteristic value being a number of correctable test data blocks and the extreme value being a maximum value; the characteristic value being a number of uncorrectable test data blocks, and the extreme value being a minimum value; the characteristic value being the number of test data blocks whose reconstructed parity bits are the same as the received parity bits, and the extreme value being a maximum value; or the characteristic value being the number of test data blocks whose reconstructed parity bits differ from the received parity bits, and the extreme value being a minimum value; 14. The method of claim 13, wherein the test data block has a length of n bits, the first k bits of the test data block are information bits, and the last n-k bits of the test data block are the received parity bits, and the reconstructed parity bits are obtained based on the information bits, the reconstructed parity bits have a length of n-k bits, where n and k are integers.

15. The step of selecting a plurality of observation bits from the data sequence comprises: selecting a bit from the data sequence at intervals of T bits and using the bit as the observation bit, where T is an integer greater than 0; or selecting a bit from the data sequence in an interval of L*n+T bits and using the bit as the observation bit, where L is the number of test data blocks in the interval, the length of the test data block is n bits, and L and T are integers greater than 0; 15. The method of any one of claims 9 to 14, comprising:

16. the data sequence is a modulated signal, the data sequence comprising a plurality of modulation symbols; The step of selecting a plurality of observation bits from the data sequence comprises: selecting a start bit of a modulation symbol from the data sequence at an interval of T modulation symbols and using the start bit as the observation bit, where T is an integer greater than 0; or selecting a start bit of a modulation symbol from the data sequence at an interval of L×m+T modulation symbols and using the start bit as the observation bit, where L is a number of test data blocks in the interval, the length of the test data block is m modulation symbols, and L and T are integers greater than 0; 15. The method of any one of claims 9 to 14, comprising:

17. 17. The method of claim 9, wherein the number of observation bits is P, where P is a positive integer, and the length of the codeword is P bits.

18. The step of determining candidate bits in the data sequence in step 2 includes a step of determining candidate bits in a first subsequence, and the step of obtaining at least one second test data block from the data sequence through division based on the candidate bits in step 3 includes a step of obtaining at least one second test data block from a second subsequence through division based on the candidate bits, wherein the first subsequence and the second subsequence are included in the data sequence, and the second subsequence is the same, partially the same, or different from the first subsequence.

8. The method according to any one of claims 3 to 7.

19. After step 3, the method further comprises: Step 4: determining an updated synchronization position of the data sequence in response to the data sequence being out of lock.

19. The method of any one of claims 1 to 18, further comprising:

20. The step of determining an updated synchronization position of the data sequence comprises: re-performing steps 2 and 3 and using the synchronization position determined in the re-performed step 3 as said updated synchronization position.

20. The method of claim 19, comprising:

21. After step 3 and before step 4, the method further comprises: obtaining a plurality of synchronization code words from the data sequence through division based on the synchronization position, the synchronization position being a starting position of the plurality of synchronization code words; performing a verification on characteristic values ​​of the plurality of synchronization code words and determining that the data sequence is in the out-of-lock state when the verification fails; 21. The method of claim 19 or 20, further comprising:

22. The step of verifying characteristic values ​​of the plurality of synchronization code words comprises: accumulating a characteristic value of each of the plurality of synchronization code words in sequence to obtain an accumulated value, the verification failing if the accumulated value satisfies an out-of-lock condition.

22. The method of claim 21 , comprising:

23. the characteristic value being a number of synchronization code words determined to be incorrect among the plurality of synchronization code words, and the out-of-lock condition being that the cumulative value is greater than or equal to a synchronization threshold; the characteristic value is a number of non-all-zero syndromes in a syndrome, and the out-of-lock condition is that the accumulated value is greater than or equal to a synchronization threshold; the characteristic value is the number of non-zero elements in a syndrome, and the out-of-lock condition is that the accumulated value is greater than or equal to a synchronization threshold; the characteristic value is a number of uncorrectable codewords and the out-of-lock condition is that the accumulated value is greater than or equal to a synchronization threshold; or the characteristic value is the number of codewords whose reconstructed parity bits differ from the received parity bits, and the out-of-lock condition is that the accumulated value is greater than or equal to a synchronization threshold; The test data block has a length of n bits, the first k bits of the test data block are information bits, and the last n-k bits of the test data block are the received parity bits, and the reconstructed parity bits are obtained based on the information bits, and the reconstructed parity bits have a length of n-k bits, where n and k are integers.

23. The method of claim 22.

24. The step of verifying characteristic values ​​of the plurality of synchronization code words comprises: adding up all characteristic values ​​of the plurality of synchronization codewords to obtain a sum value, the verification failing if the sum value satisfies an out-of-lock condition; 22. The method of claim 21 , comprising:

25. the sum of the characteristic values ​​is a total number of synchronization code words determined to be incorrect code words among the plurality of synchronization code words, and the out-of-lock condition is that the sum is equal to or greater than a synchronization threshold; the sum of the characteristic values ​​is a total number of synchronization code words among the plurality of synchronization code words that are determined to be correct code words, and the out-of-lock condition is that the sum is equal to or less than a synchronization threshold; the characteristic value is a number of all-zero syndromes in a syndrome, and the out-of-lock condition is that the sum is equal to or less than a synchronization threshold; the characteristic value is a number of non-all-zero syndromes in a syndrome, and the out-of-lock condition is that the sum is greater than or equal to a synchronization threshold; the characteristic value is the number of zero elements in a syndrome, and the out-of-lock condition is that the sum is less than or equal to a synchronization threshold; the characteristic value is the number of non-zero elements in a syndrome, and the out-of-lock condition is that the sum is greater than or equal to a synchronization threshold; the characteristic value is a number of correctable codewords and the out-of-lock condition is that the sum is less than or equal to a synchronization threshold; the characteristic value is a number of uncorrectable codewords and the out-of-lock condition is that the sum is greater than or equal to a synchronization threshold; the characteristic value is the number of codewords whose reconstructed parity bits are the same as the received parity bits, and the out-of-lock condition is that the sum is less than or equal to a synchronization threshold; or the characteristic value is the number of codewords whose reconstructed parity bits differ from the received parity bits, and the out-of-lock condition is that the sum is greater than or equal to a synchronization threshold; 25. The method of claim 24, wherein the test data block has a length of n bits, the first k bits of the test data block are information bits, and the last n-k bits of the test data block are the received parity bits, and the reconstructed parity bits are obtained based on the information bits, the reconstructed parity bits have a length of n-k bits, where n and k are integers.

26. 26. The method of claim 1, wherein the data sequence is a linear block code.

27. A communication device, comprising: A receiving unit configured to perform the steps of: step 1: receiving a data sequence, the data sequence including a plurality of bits; step 2: determining a candidate bit in the data sequence, the candidate bit being included in the plurality of bits; and step 3: determining a synchronization position based on the candidate bit, the synchronization position indicating a starting position of a codeword in the data sequence.

2. A communication device comprising:

28. The processing unit is further configured to perform a verification on the candidate bit and, if the verification is successful, determine that the position of the candidate bit is the synchronization position.

28. A communication device as claimed in claim 27.

29. The processing unit is further configured to obtain at least one second test data block from the data sequence through division based on the candidate bit, the position of the candidate bit being a starting position of the at least one second test data block, and perform verification against a characteristic value of the at least one second test data block, and determine that the position of the candidate bit is the synchronization position if the verification is successful.

29. A communication device as claimed in claim 28.

30. The processing unit is further configured to sequentially accumulate characteristic values ​​of each of the at least one second test data block to obtain an accumulated value, and the verification is successful when the accumulated value satisfies a synchronization condition.

30. A communication device as claimed in claim 29.

31. the characteristic value being the number of second test data blocks determined to be correct code words, and the synchronization condition being that the cumulative value is greater than or equal to a synchronization threshold; the characteristic value is a number of all-zero syndromes in a syndrome, and the synchronization condition is that the accumulated value is greater than or equal to a synchronization threshold; the characteristic value is the number of zero elements in the syndrome, and the synchronization condition is that the cumulative value is greater than or equal to a synchronization threshold; the characteristic value is a number of correctable test data blocks and the synchronization condition is that the accumulated value is greater than or equal to a synchronization threshold; or the characteristic value being the number of test data blocks whose reconstructed parity bits are the same as the received parity bits, and the synchronization condition being that the accumulated value is greater than or equal to a synchronization threshold; The test data block has a length of n bits, the first k bits of the test data block are information bits, and the last n-k bits of the test data block are the received parity bits, and the reconstructed parity bits are obtained based on the information bits, and the reconstructed parity bits have a length of n-k bits, where n and k are integers.

31. A communication device as claimed in claim 30.

32. The processing unit is further configured to add up all characteristic values ​​of the at least one second test data block to obtain a sum value, and the verification is successful if the sum value satisfies a synchronization condition.

30. A communication device as claimed in claim 29.

33. the characteristic value being the number of test data blocks determined as correct code words in all of the second test data blocks, and the synchronization condition being that the cumulative value is greater than or equal to a synchronization threshold; the characteristic value being the number of test data blocks determined as incorrect code words in all the second test data blocks, and the synchronization condition being that the cumulative value is less than or equal to a synchronization threshold; the characteristic value is the number of all-zero syndromes in the syndromes, and the synchronization condition is that the sum is greater than or equal to a synchronization threshold; the characteristic value is the number of non-all-zero syndromes in the syndromes, and the synchronization condition is that the sum is less than or equal to a synchronization threshold; the characteristic value is the number of zero elements in the syndrome, and the synchronization condition is that the sum is greater than or equal to a synchronization threshold; the characteristic value is the number of non-zero elements in the syndrome, and the synchronization condition is that the sum is less than or equal to a synchronization threshold; the characteristic value is a number of correctable test data blocks, and the synchronization condition is that the sum is greater than or equal to a synchronization threshold; the characteristic value being a number of uncorrectable test data blocks, and the synchronization condition being that the sum is less than or equal to a synchronization threshold; the characteristic value being the number of test data blocks whose reconstructed parity bits are the same as the received parity bits, and the synchronization condition being that the sum is greater than or equal to a synchronization threshold; or the characteristic value being the number of test data blocks whose reconstructed parity bits differ from the received parity bits, and the synchronization condition being that the sum is less than or equal to a synchronization threshold; 33. The communications device of claim 32, wherein the test data block has a length of n bits, the first k bits of the test data block are information bits, and the last n-k bits of the test data block are the received parity bits, and the reconstructed parity bits are obtained based on the information bits, the reconstructed parity bits have a length of n-k bits, where n and k are integers.

34. The processing unit is further configured to use the position of the candidate bit as the synchronization position.

28. A communication device as claimed in claim 27.

35. The processing unit is further configured to select a plurality of observed bits from the data sequence and to select the candidate bit from the plurality of observed bits.

28. A communication device as claimed in claim 27.

36. The processing unit is further configured to determine a plurality of groups of first test data blocks in the data sequence based on the plurality of observation bits, each of the plurality of groups of first test data blocks including at least one first test data block, a position of each of the plurality of observation bits being a start position of each of the plurality of groups of first test data blocks, and to select one observation bit from the plurality of observation bits as the candidate bit based on a characteristic value of the plurality of groups of first test data blocks.

36. A communication device as claimed in claim 35.

37. The processing unit is further configured to sequentially determine whether a characteristic value of each of the plurality of groups of first test data blocks satisfies a candidate condition until a characteristic value of a group of first test data blocks is determined to satisfy the candidate condition, and to use observation bits corresponding to the group of first test data blocks that satisfy the candidate condition as the candidate bits.

37. A communication device as claimed in claim 36.

38. the characteristic value of the first group of test data blocks is a total number of first test data blocks in the first group of test data blocks that are determined to be correct code words, and the candidate condition is that the cumulative value is greater than or equal to a synchronization threshold; the characteristic value of the first group of test data blocks is a total number of first test data blocks in the first group of test data blocks that are determined to be correct code words, and the candidate condition is that the cumulative value is less than or equal to a synchronization threshold; the characteristic value of the first test data block group is a total number of all-zero syndromes in the syndromes of all first test data blocks in the first test data block group, and the candidate condition is that the total number is greater than or equal to a synchronization threshold; the characteristic value of the first test data block group is a total number of non-all-zero syndromes in all first test data block syndromes in the first test data block group, and the candidate condition is that the total number is less than or equal to a synchronization threshold; The characteristic value of the first test data block group is a total number of zero elements in the syndromes of all the first test data blocks in the first test data block group, and the candidate condition is that the total number is greater than or equal to a synchronization threshold; the characteristic value of the first group of test data blocks is a total number of non-zero elements in the syndromes of all the first test data blocks in the first group of test data blocks, and the candidate condition is that the total number is less than or equal to a synchronization threshold; the characteristic value of the first test data block group is a total number of correctable test data blocks in all first test data blocks in the first test data block group, and the candidate condition is that the total number is greater than or equal to a synchronization threshold; the characteristic value of the first group of test data blocks is a total number of uncorrectable test data blocks in all first test data blocks in the first group of test data blocks, and the candidate condition is that the total number is less than or equal to a synchronization threshold; the characteristic value of the group of first test data blocks is a total number of test data blocks whose reconstructed parity bits are the same as the received parity bits of all first test data blocks in the group of first test data blocks, and the candidate condition is that the total number is greater than or equal to a synchronization threshold; the characteristic value of the group of first test data blocks is a total number of test data blocks whose reconstructed parity bits differ from received parity bits of all first test data blocks in the group of first test data blocks, and the candidate condition is that the total number is less than or equal to a synchronization threshold; The characteristic value of the first test data block group is a cumulative number of all-zero syndromes in the syndromes of the first X first test data blocks in the first test data block group, and the candidate condition is that the cumulative number is greater than or equal to a synchronization threshold; The characteristic value of the first test data block group is a cumulative number of zero elements in a syndrome of the first X first test data blocks in the first test data block group, and the candidate condition is that the cumulative number is greater than or equal to a synchronization threshold; the characteristic value of the first group of test data blocks is a cumulative number of correctable test data blocks in the first X first test data blocks in the first group of test data blocks, and the candidate condition is that the cumulative number is greater than or equal to a synchronization threshold; or the characteristic value of the group of first test data blocks is a cumulative number of test data blocks whose reconstructed parity bits are the same as received parity bits in the first X first test data blocks in the group of first test data blocks, and the candidate condition is that the cumulative number is greater than or equal to a synchronization threshold; 38. The communications device of claim 37, wherein the test data block has a length of n bits, the first k bits of the test data block are information bits, and the last n-k bits of the test data block are the received parity bits, the reconstructed parity bits are obtained based on the information bits, the reconstructed parity bits have a length of n-k bits, and n, k, and X are integers.

39. The processing unit is further configured to compare all characteristic values ​​of the first test data blocks of the plurality of groups, and use the observed bit corresponding to the group of the first test data blocks whose characteristic value is an extreme value as the candidate bit.

37. A communication device as claimed in claim 36.

40. the characteristic value being the number of first test data blocks determined to be correct code words, and the extremum being a maximum value; the characteristic value being a number of first test data blocks determined to be incorrect code words, and the extreme value being a minimum value; the characteristic value is the number of all-zero syndromes in the syndromes, and the extreme value is a maximum value; the characteristic value is the number of non-all-zero syndromes in the syndromes, and the extreme value is a minimum value; the characteristic value is the number of zero elements in the syndrome, and the extreme value is a maximum value; the characteristic value is the number of non-zero elements in the syndrome, and the extreme value is a minimum; the characteristic value being a number of correctable test data blocks and the extreme value being a maximum value; the characteristic value being a number of uncorrectable test data blocks, and the extreme value being a minimum value; the characteristic value being the number of test data blocks whose reconstructed parity bits are the same as the received parity bits, and the extreme value being a maximum value; or the characteristic value being the number of test data blocks whose reconstructed parity bits differ from the received parity bits, and the extreme value being a minimum value; 40. The communications device of claim 39, wherein the test data block has a length of n bits, the first k bits of the test data block are information bits, and the last n-k bits of the test data block are the received parity bits, the reconstructed parity bits are obtained based on the information bits, the reconstructed parity bits have a length of n-k bits, and n and k are integers.

41. the processing unit is further configured to select a bit from the data sequence at intervals of T bits and use the bit as the observation bit, where T is an integer greater than 0; or The processing unit is further configured to select a bit from the data sequence in an interval of L×n+T bits and use the bit as the observation bit, where L is a number of test data blocks in the interval, the length of the test data block is n bits, and L and T are integers greater than 0. A communication device according to any one of claims 35 to 40.

42. the processing unit is further configured to select a start bit of a modulation symbol from the data sequence at an interval of T modulation symbols and use the start bit as the observation bit, where T is an integer greater than 0; or The processing unit is further configured to select a start bit of a modulation symbol from the data sequence at an interval of L×m+T modulation symbols and use the start bit as the observation bit, where L is a number of test data blocks in the interval, a length of the test data block is m modulation symbols, and L and T are integers greater than 0. A communication device according to any one of claims 35 to 40.

43. 43. A communications device according to any one of claims 35 to 42, wherein the number of observation bits is P, where P is a positive integer, and the length of the codeword is P bits.

44. The step of determining candidate bits in the data sequence in step 2 includes a step of determining candidate bits in a first subsequence, and the step of obtaining at least one second test data block from the data sequence through division based on the candidate bits in step 3 includes a step of obtaining at least one second test data block from a second subsequence through division based on the candidate bits, wherein the first subsequence and the second subsequence are included in the data sequence, and the second subsequence is the same, partially the same, or different from the first subsequence. A communication device according to any one of claims 29 to 33.

45. The processing unit is further configured to perform step 4: determining an updated synchronization position of the data sequence in response to the data sequence being in an out-of-lock state. A communications device according to any one of claims 27 to 44.

46. The processing unit is further configured to re-perform steps 2 and 3 and use the synchronization position determined in the re-performed step 3 as the updated synchronization position.

46. ​​A communications device as claimed in claim 45.

47. The processing unit is further configured to obtain a plurality of synchronization code words from the data sequence through division based on the synchronization position, the synchronization position being a starting position of the plurality of synchronization code words, perform a verification on characteristic values ​​of the plurality of synchronization code words, and determine that the data sequence is in the out-of-lock state when the verification fails.

47. A communication device according to claim 45 or 46.

48. The processing unit is further configured to sequentially accumulate characteristic values ​​of each of the plurality of synchronization code words to obtain an accumulated value, and the verification is successful when the accumulated value satisfies an out-of-lock condition.

48. A communication device as claimed in claim 47.

49. the cumulative value of the characteristic value is a total number of synchronization code words determined to be incorrect code words among the plurality of synchronization code words, and the out-of-lock condition is that the cumulative value is equal to or greater than a synchronization threshold; the characteristic value is a number of non-all-zero syndromes in a syndrome, and the out-of-lock condition is that the accumulated value is greater than or equal to a synchronization threshold; the characteristic value is the number of non-zero elements in a syndrome, and the out-of-lock condition is that the accumulated value is greater than or equal to a synchronization threshold; the characteristic value is a number of uncorrectable codewords and the out-of-lock condition is that the accumulated value is greater than or equal to a synchronization threshold; or the characteristic value is the number of codewords whose reconstructed parity bits differ from the received parity bits, and the out-of-lock condition is that the accumulated value is greater than or equal to a synchronization threshold; The test data block has a length of n bits, the first k bits of the test data block are information bits, and the last n-k bits of the test data block are the received parity bits, and the reconstructed parity bits are obtained based on the information bits, and the reconstructed parity bits have a length of n-k bits, where n and k are integers.

49. A communications device as claimed in claim 48.

50. The processing unit is further configured to add all characteristic values ​​of the plurality of synchronization code words to obtain a sum value, and the verification fails if the sum value satisfies an out-of-lock condition.

48. A communication device as claimed in claim 47.

51. the sum of the characteristic values ​​is a total number of synchronization code words determined as correct code words among the plurality of synchronization code words, and the out-of-lock condition is that the sum is equal to or less than a synchronization threshold; the sum of the characteristic values ​​is a total number of synchronization code words determined to be incorrect code words among the plurality of synchronization code words, and the out-of-lock condition is that the sum is equal to or greater than a synchronization threshold; the characteristic value is a number of all-zero syndromes in a syndrome, and the out-of-lock condition is that the sum is less than or equal to a synchronization threshold; the characteristic value is a number of non-all-zero syndromes in a syndrome, and the out-of-lock condition is that the sum is greater than or equal to a synchronization threshold; the characteristic value is the number of zero elements in a syndrome, and the out-of-lock condition is that the sum is less than or equal to a synchronization threshold; the characteristic value is the number of non-zero elements in a syndrome, and the out-of-lock condition is that the sum is greater than or equal to a synchronization threshold; the characteristic value is a number of correctable codewords and the out-of-lock condition is that the sum is less than or equal to a synchronization threshold; the characteristic value is a number of uncorrectable codewords and the out-of-lock condition is that the sum is greater than or equal to a synchronization threshold; the characteristic value is the number of codewords whose reconstructed parity bits are the same as the received parity bits, and the out-of-lock condition is that the sum is less than or equal to a synchronization threshold; or the characteristic value is the number of codewords whose reconstructed parity bits differ from the received parity bits, and the out-of-lock condition is that the sum is greater than or equal to a synchronization threshold; The test data block has a length of n bits, the first k bits of the test data block are information bits, and the last n-k bits of the test data block are the received parity bits, and the reconstructed parity bits are obtained based on the information bits, and the reconstructed parity bits have a length of n-k bits, where n and k are integers.

51. The communications device of claim 50.

52. 52. A communications device according to any one of claims 27 to 51, wherein the data sequence is a linear block code.

53. A communications device comprising a processor, a memory, and a transceiver, the memory may be configured to store program code, and the processor is configured to call the program code from the memory to perform a method according to any one of claims 1 to 26.

54. 27. A chip comprising a memory and a processor, the memory configured to store a computer program, and the processor configured to retrieve and execute the computer program from the memory in order to perform a method according to any one of claims 1 to 26.

55. 27. A computer readable storage medium storing a computer program which, when executed on a processor, performs the method of any one of claims 1 to 26.

56. A network system, comprising a transmitting device and a receiving device, the receiving device being a communication device according to any one of claims 27 to 53.

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