Entropy coding for motion accuracy construction

Abstract

To provide a system, a method, and a device for video processing.SOLUTION: A video processing method including video encoding, video decoding, or video trans-coding includes executing a conversion between a video block and a video bit stream in accordance with a rule. The conversion is based on an AMVR (adaptive motion vector difference resolution) tool, and the rule defines deriving selection of a context to a first bin in a letter string of a first construction element defining the resolution of a motion vector difference related to an AMVR shift on the basis of usage of a coding mode to a block.SELECTED DRAWING: Figure 18

Description

[Technical field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS Pursuant to the applicable patent laws and / or regulations under the Paris Convention, this application Priority claim of International Patent Application No. PCT / CN2020 / 088546, filed on May 1, The above application is hereby incorporated by reference in its entirety for all purposes under the law. The entire disclosure is incorporated by reference as part of the disclosure of this specification.

[0002] TECHNICAL FIELD This disclosure relates to video and image coding technology. [Background technology]

[0003] Digital video is the largest form of communication on the Internet and other digital communications networks. It occupies bandwidth usage. It is the number of connected users that can receive and display video. As the number of user devices increases, the bandwidth demands for digital video usage continue to grow. It is predicted that. Summary of the Invention

[0004] The disclosed technology uses context-based encoding and decoding to encode or decode may be used by embodiments of a video or image encoder to perform decoding. .

[0005] In one exemplary embodiment, a method for processing video is disclosed. The method includes: performing a conversion between the video block and a coded representation of the video, The coded representation complies with the format rules and the transformation is based on the motion vector for the video block. A representation of the vector or motion vector differential or motion vector predictor is provided using an adaptive resolution. Adaptive Motion VR (AMVR) is represented in the coded representation. Based on the Vector Difference Resolution (VDR) tool The format rule is to determine the coding of a video block or a neighboring block of the video block. Context modeling that relies on collected information allows for adaptive coding representations. It specifies the use of resolution to be expressed.

[0006] In another exemplary aspect, a method for processing another image is disclosed. performing a conversion between the video blocks of the video and a coded representation of the video; The loaded representation complies with the format rules, and the transformation is based on the motion vector for the video block. The representation of the vector or motion vector differential or motion vector predictor is adapted to the adaptive resolution. AMVR (Adaptive Motion Vector) is expressed in the coding expression. The method is based on the Vector Difference Resolution (VDR) tool. The formatting rules are the primary for the precision index used by the AMVR tool. The context modeling used to code the first bin and the second bin Thus, a method is defined to represent the use of adaptive resolution in a coded representation.

[0007] In another exemplary aspect, a method for processing another image is disclosed. The method includes: A video including one or more video pictures each including a video block of the video block, and a coding method for the video. the coding representation includes performing a conversion between the coded representation and one or more image representations. Image block AMVR (Adaptivr Motion Vector Differential) A for signaling information on the (Frequency Resolution) coding The format rules are: The AMVR precision index bins of the first coded video block and the second coded video block AMVR precision index of the second picture block coded using the This specifies that the bins in the bin list and the bins in the bin list are coded using the same context.

[0008] In another exemplary aspect, a method for processing another image is disclosed. performing a conversion between the video blocks of the video and a coded representation of the video; the image block is divided into one or more vertical and / or one or more horizontal divisions; The coded representation is a context-based coding of the video block division information. It conforms to the formatting rules that govern the

[0009] In another exemplary aspect, a method for processing another image is disclosed. performing a conversion between the video blocks of the video and a coded representation of the video; The coded representation follows a format rule that specifies the sign of the conversion coefficients. Whether context coding or bypass coding is used to indicate the This section specifies the coding criteria used to determine whether a

[0010] In another exemplary aspect, a method for processing another image is disclosed. performing a conversion between the video blocks of the video and a coded representation of the video; The loaded representation conforms to the formatting rules, which are Bypassing remaining syntax elements in the third or residual coefficient scan pass of the residual coding process At the start of coding, we define the number of remaining allowed context-coded bins as Specifies that the process is to be applied to the specified variable.

[0011] In another exemplary aspect, the method described above comprises a video encoder apparatus including a processor. It may be implemented by:

[0012] In yet another exemplary aspect, the methods are provided in the form of processor executable instructions. It may be embodied in and stored on a computer readable program medium.

[0013] These and other aspects are further described herein. [Brief description of the drawings]

[0014] [Figure 1] 1 shows an example of an encoder block diagram. [Diagram 2] 67 examples of intra prediction modes are shown. [Figure 3A] Here is an example of a four-parameter affine model. [Figure 3B] Here is an example of a six-parameter affine model. [Figure 4] An example of affine MVF for each subblock is shown. [Diagram 5] 1 shows an example of an inherited affine motion predictor. [Figure 6] 13 shows an example of control point motion vector inheritance. [Figure 7] 13 shows examples of candidate positions for a constructed affine merge mode. [Figure 8] FIG. 13 is an illustration of motion vector usage for the proposed combined method. [Figure 9] An example of a sub-block MV VSB and pixel Δv(i,j) is shown (red arrow). [Figure 10]4 illustrates a multi-type tree splitting mode. [Figure 11] 13 shows an example of signaling of split flags in a quadtree with nested multi-type tree coding tree structure. [Figure 12] FIG. 1 is a block diagram of an example video processing system. [Figure 13] 1 illustrates an example of a video processing device. [Figure 14] 1 is a flowchart illustrating an example of a video processing method. [Figure 15] 1 is a block diagram illustrating a video coding system according to some embodiments of the present disclosure. [Figure 16] FIG. 2 is a block diagram illustrating an encoder according to some embodiments of the present invention. [Figure 17] FIG. 2 is a block diagram illustrating a decoder according to some embodiments of the present invention. [Figure 18] 1 is a flow chart illustrating a video processing method in accordance with one or more embodiments of the present technology. [Figure 19] 11 is a flow chart illustrating another method of video processing in accordance with one or more embodiments of the present technology. [Figure 20] 11 is a flow chart illustrating yet another method of video processing in accordance with one or more embodiments of the present technology. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] This specification provides a method for improving the quality of a decompressed or decoded digital video or image. , provides various techniques that can be used by a decoder of an image or video bitstream. For the sake of simplicity, the term "video" is used herein to mean a sequence of pictures (conventionally known as video). It is used to include both the image (also called the image stream) and the individual images. , during the encoding process to reconstruct the decoded frame that is used for further encoding. These techniques may be implemented in

[0016] Section headings are used herein for ease of understanding, and the disclosures contained in a section may be incorporated herein by reference. The present invention is not intended to limit an embodiment to only that section. Thus, an embodiment in a section may be It can be combined with the embodiments of other chapters.

[0017] 1. Overview This specification relates to video coding technology. In particular, to image / video coding. AMVR (Adaptive Motion Vector Resolution) n), block division, and other coding tools. It may be applied to the coding standard or may be applied to the standard (Versatile Video Coding The present invention may be applied to determine the future video coding standards. It can also be applied to video codecs.

[0018] 2. Initial Discussions Video coding standards are primarily driven by well-known ITU-T and ISO / IEC standard developments. ITU-T created H.261 and H.263, and ISO / IEC created MP EG-1 and MPEG-4 Visual were created, and the two organizations are working on H.262 / MPEG-2 V ideo and H.264 / MPEG-4 AVC (Advanced Video Cod) The H.265 / HEVC standard was jointly created by Sony and Sony Video. The standard uses a hybrid video coding structure in which temporal prediction and transform coding are used. In 2015, to explore future video coding technologies beyond HEVC, VCEG and MPEG have jointly established the Joint Video Exploration and Technology Exploration (JVET) Since then, many new methods have been adopted by JVET. The reference software called JEM (Joint Exploration Mode) In April 2018, VCEG (Q6 / 16) and ISO / IE C JTC1 SC29 / WG11(MPEG) Joint Video Exp The JVET (Joint Video Engineering Test Team) was launched, and achieved a 50% bitrate reduction compared to HEVC. We are working to develop VVC standards with this goal in mind.

[0019] 2.1. Typical video codec coding flow Figure 1 shows three in-loop filtering blocks: Deblocking (DF) and ng Filter), SAO(Sample Adaptive Offset) and The example of the VVC encoder block diagram including ALF and predefined filters is shown. Unlike DF, which uses the original sample of the current picture, SAO and ALF use Using coded side information to signal offsets and filter coefficients By adding an offset, and FIR (Finite Inversion) The original samples are reconstructed by applying the pulse response filter. The ALF reduces the mean square error between the generated samples and the final It is considered as a tool that aims to capture and correct artifacts created in previous steps. It is possible.

[0020] 2.2. Intra-mode coding with 67 intra-prediction modes Directional intra mode to capture any edge direction represented in natural video. The number of directional modes is extended from 33 to 65 for use in HEVC. is indicated by the red dotted arrow in Fig. 2, and the planar and DC modes remain the same. These denser directional intra prediction modes support all block sizes, It applies to both luma and chroma intra prediction.

[0021] The conventional angle intra prediction direction is clockwise from 45 degrees to -13 degrees, as shown in Figure 2. In VTM, some conventional angular intra prediction modes are non- For square blocks, it is adaptively replaced by wide-angle intra prediction mode. The selected modes are signaled using the original method, and after parsing, the wide-angle mode index is The total number of intra prediction modes remains unchanged, e.g., 67. The intra-mode coding remains unchanged.

[0022] In HEVC, all intra-coded blocks have a square shape. The length of each side is a power of 2. Thus, the DC mode can be used to No division operations are required to generate the predictor. In VVC, blocks are generally In some cases, we may have rectangles that require the use of a block-wise division operation. To avoid division operations for C prediction, we use only the long side to flatten non-square blocks. Calculate the average.

[0023] 2.3. Inter Prediction For each inter prediction CU, a motion vector, a reference picture index, and a reference pixel index are stored. Motion parameters consist of the index used by the model list, as well as new codes for VVC. The additional information required for the coding features is used to generate the inter-prediction samples. The data may be signaled explicitly or implicitly. When the CU is coded, it is associated with one PU, and the significant residual coefficients, It does not have a motion vector differential or reference picture index. This allows for spatial and temporal candidates, as well as additional schedules introduced in VVC. The motion parameters for the current CU, including the merged motion parameters, are obtained from the neighboring CUs. The code can be applied to any inter-predicted CU, not just for skip mode. An alternative to the merge mode is to transmit the motion parameters explicitly, A reference vector, a reference picture list for each reference picture list, and a reference picture list usage flag The picture index, as well as other necessary information, is explicitly signaled for each CU.

[0024] 2.4. IBC (Intra Block Copy) IBC (Intra Block Copy) is adopted in the HEVC extension of SCC. This is a tool that is used to improve the coding efficiency of screen content material. It is known that IBC mode significantly improves image quality. Therefore, BM (Block Matching) is implemented as It is performed to find the optimal block vector (or motion vector) for each CU, where ,The block vector is already reconstructed from the current block inside the current picture. Used to indicate the displacement to the reference block. The lock vector is in integer precision. The chroma block vector is also rounded to integer precision. When combined with AMVR, IBC mode supports 1-pixel and 4-pixel motion vector accuracy. IBC coded CUs can be switched between intra prediction mode or It is treated as the third prediction mode other than the inter prediction mode. The IBC mode has the following characteristics: Both heights are applicable to CUs with 64 luma samples or less.

[0025] On the encoder side, hash-based motion estimation is performed for IBC. The daemon performs RD checks on blocks with width or height less than 16 luma samples. In non-merge mode, we first find the block vectors using a hash-based search. If the hash search does not return a valid candidate, a block matching-based search is performed. A local search for the resource is performed.

[0026] In a hash-based search, a hash key match between the current block and the reference block is performed. The checking (32-bit CRC) is extended to all allowed block sizes. The computation of hash keys for all positions in the picture is done in 4x4 sub-blocks. If the size of the current block is larger than 1, then all 4×4 sub-blocks are If all hash keys match the hash keys of the corresponding reference locations, The hash key of the reference block is determined to match that of the reference block. If a match is found for the hash key of the current block, the block of each matching reference block is Calculate the lock vector costs and select the one with the minimum cost. In a matching search, the search range is set to cover both the previous CTU and the current CTU. is set to.

[0027] At the CU level, IBC mode is signaled by a flag, and IBC AMVP mode or IBC skip / merge mode may be signaled as follows:

[0028] - IBC skip / merge mode: Use the merge candidate index to find neighboring candidates I Which block vectors are used in the list from the BC coded blocks? The merge list indicates how to predict the current block. and pairwise candidates.

[0029] -IBC AMVP mode: Block vector differences are coded in the same way as motion vector differences. The block vector prediction method uses two candidates as predictors, one for the left one from the neighborhood of and one from the neighborhood above (IBC coded If any neighbors are not available, the default block vector is used as the predictor. A flag is signaled to indicate the block vector predictor index. Be known.

[0030] 2.5. Affine motion compensation prediction In HEVC, MCP (Motion Compensation Predic For this purpose, only the translational motion model is applied. There are various types of objects, such as zoom in / out, rotation, perspective motion, and other There is irregular motion. In VVC, block-based affine transformation motion compensation prediction is applied. As shown in Figures 3A and 3B, the affine motion field of a block is divided into two parts. control point motion information (4 parameters) or three control point motion vectors (6 parameters) This is explained by:

[0031] FIG. 6 shows an example of control point motion vector inheritance.

[0032] For a 4-parameter affine motion model, the sample position (x,y) within the block The motion vector of is derived as follows.

[0033]

number

[0034] For the 6-parameter affine motion model, the sample position (x,y) within the block The motion vector of is derived as follows.

[0035]

number

[0036] Here, (mv 0x ,mv 0y ) is the motion vector of the upper left corner control point, (mv 1x ,mv 1 y ) is the motion vector of the control point in the upper right corner, (mv 2x ,mv 2y ) is the movement of the control point in the lower left corner It is a vector.

[0037] To simplify the motion compensated prediction, a block-based affine transform prediction is applied. To derive the motion vector for each 4 × 4 luminance subblock, the center subblock of each subblock is used. The motion vector of the sample is calculated according to the above equation, as shown in Figure 4, and the 1 / 16 edge Then, a motion compensated interpolation filter is applied and the derived motion vector is used. The prediction for each subblock is generated using the saturation component. The subblock size for the saturation component is 4 × 4. The MV of a 4x4 chroma sub-block is set to the MV of the corresponding 4x4 luma sub-block. It is calculated as the average of MV.

[0038] As with translational motion inter-prediction, there are two modes: affine merge mode and affine AMVP mode. There are two affine motion inter predictions.

[0039] Affine Merge Prediction The AF_MERGE mode can be applied to CUs whose width and height are both 8 or more. In this mode, the CPMV of the current CU is calculated based on the motion information of the spatially neighboring CUs. There are up to 5 CPMVP candidates, and the index is used for the current CU. The following three types of CPVM candidates are used to Form a merge candidate list. - Inherited affine merge candidates extrapolated from the CPMVs of nearby CUs - Constructed affine merge candidate CPMV derived using translational MVs of nearby CUs P -Zero MV

[0040] In VVC, up to two inherited vectors are derived from the affine motion models of neighboring blocks. There are two affine candidates, one from the left neighboring CU and one from the top neighboring CU. The candidate blocks are shown in Figure 5. For the left predictor, the scan order is A0->A1, and For predictors, the scan order is B0->B1->B2. The first inherited selects only the inherited candidate. No pruning check is done between two inherited candidates. Once a nearby affine CU is identified, its control point motion vectors are used to approximate the current CU. As shown in the figure, we derive a CPMVP candidate in the affine merge list of If the lower block A is coded in affine mode, the left The motion vectors v for the top, top right and bottom left corners 2 , v 3 , v 4 The four-parameter affinities are obtained. When coding in the dummy model, 2 and v 3 The current unit's 2 CPM Calculate V. If block A is coded using a 6-parameter affine model, v 2 , v 3 and v 4 Based on this, the three CPMVs of the current CU are calculated.

[0041] The constructed affine candidates are constructed by combining the local translational motion information of each control point. This means that the control points are extracted from the identified spatial and temporal neighborhoods shown in Figure 7. Derive the movement. CPMV k (k=1,2,3,4) represents the kth control point. CPM V 1 If so, the B2->B3->A2 block is checked, and the first available block is The MV is used. 2 In this case, the B1→B0 block is checked and CPMV 3 The A1 → A0 block is checked for CPMV if available. 4 year TMVP is used for this purpose.

[0042] After reaching the MV of the four control points, we construct affine merge candidates based on the motion information. It is constructed in order using the following combinations of control points MV: {CPMV 1 ,CPMV 2 ,CPMV 3},{CPMV 1 ,CPMV 2 ,CPMV 4}, {CPMV 1 ,CPMV 3 ,CPMV 4},{CPMV 2 ,CPMV 3 ,CPMV 4}, {CPMV 1 ,CPMV 2},{CPMV 1 ,CPMV 3}

[0043] The combination of the three CPMVs constitutes a six-parameter affine merge candidate, and the two C The combination of PMVs constitutes a four-parameter affine merge candidate. In order to avoid the process, when the reference indices of the control points are different, the related combination of the control points MV Discard the combination.

[0044] After checking the inherited and constructed affine merge candidates ,If the list is not already full, insert a zero MV at the end of the list.

[0045] Affine AMVP Prediction Affine AMVP mode can be applied to CUs with both width and height greater than or equal to 16. The affine AMVP mode can be used by specifying the affine The alignment flag is signaled in the bitstream, and then the 4-parameter affine Another flag is signaled to indicate whether the affine is a 6-parameter affine or not. In this mode, the difference between the current CU's CPMV and its predictor CPMVP is the bitstream. The affine AVMP candidate list size is 2, and the following It is generated by using four types of CPVM candidates in sequence. - Inherited affine AMVP candidates extrapolated from the CPUMV of neighboring CUs - Constructed affine AMVP candidate CPM derived using translational MVs of nearby CUs VP - Translational MV from nearby CU -Zero MV

[0046] The check order of inherited affine AMVP candidates is the check order of inherited affine merge candidates. The only difference is that for AVMP candidates, the same reference The idea is to only consider affine CUs that have pictures. When inserting a child into the candidate list, no pruning is applied.

[0047] The constructed AMVP candidates are derived from the defined spatial neighborhood shown in Figure 7. The same check order is used as in the merge candidate construction. Also check the reference picture index of the current block. The first block in the check order that has the same reference picture as the current CU is used. CU is coded in 4-parameter affine mode and mv 0 and mv 1 but If both are available, add them to the affine AMVP list as one candidate. If the current CU is coded in 6-parameter affine mode and has 3 CPM If all V are available, we treat them as one candidate in the affine AMVP list. Otherwise, set the constructed AMVP candidate to unavailable.

[0048] After checking the inherited affine AMVP candidates and the constructed AMVP candidates, If the fin AMVP list candidate is still less than 2, mv 0 , m v 1 , and mv 2 In order, we use the translation MV to predict all control points MV of the current CU. Finally, if the affine AMVP list is not yet fully filled, Use zero MV to add.

[0049] 2.5.3. Affine Motion Information Storage In VVC, the CPUMVs of affine CUs are stored in a separate buffer. The CPMV is based on the affine merge mode and affine merge mode for recently coded CUs. Only used to generate the inherited CPMVP in Finn AMVP mode. CPM The sub-block MVs derived from V are motion compensated, merged with translation MVs / AMVP lists. Used for MV derivation and deblocking.

[0050] To avoid picture line buffer for additional CPUMV, The inheritance of affine motion data from a CU is different from that from a normal neighboring CU. If the candidate CU for affine motion data inheritance is on the upper CTU line, the affine motion data inheritance is treated as the Instead of CPMV, the derivation of the MVP uses the bottom-left and bottom-right sub-pixels in the line buffer. In this way, the CPMV is stored only in the local buffer. If the candidate CU is affine coded with 6 parameters, the affine model is As shown in Figure 8, the upper limit of the CTU is reduced to the lower left of the CU. and affine the CU in the lower bound CTU using the lower right sub-block motion vector. Inherit.

[0051] 2.5.4. Optical flow prediction improvement for affine modes Subblock-based affine motion compensation reduces memory access at the expense of prediction accuracy. This saves bandwidth and reduces computational complexity compared to pixel-based motion compensation. To achieve finer granularity in motion compensation, PROF (Prediction Refinement with Optical Flow is a method for motion compensation. Sub-block based affine motion compensation prediction without increasing memory access bandwidth In VVC, sub-block-based affine motion compensation is used to improve the estimation. After the compensation, the brightness prediction sub-system is calculated by adding the difference derived from the optical flow equation. PROF is explained as four steps:

[0052] Step 1) Perform subblock-based affine motion compensation and predict the subblock I(i, j). Step 2) At each individual sample location, use a 3-tap filter [-1,0,1] Then, the spatial gradient of the subblock prediction g x (i,j) and g y Calculate (i,j). The distribution calculation is exactly the same as the BDOF gradient calculation.

[0053]

number

[0054] shift1 is used to control the precision of the gradient. 4) The prediction is scaled up by one sample on each side for gradient computation. Additional memory bandwidth To avoid bandwidth and additional interpolation calculations, these enlarged The samples are copied from the nearest integer pixel location in the reference picture.

[0055] Step 3) Calculate the luminance prediction improvement using the optical flow equation:

[0056]

number

[0057] Here, Δv(i,j) is the sample position represented by v(i,j) as shown in FIG. The sample MV calculated as 0 for position (i,j) and the subblock to which the sample (i,j) belongs This Δv(i,j) is the difference between the 1 / 32 luminance sample and the sub-block MV of the current block. The pixel size is quantized to the unit of precision.

[0058] The affine model parameters and sample positions for the subblock centers are Since it does not change for each block, calculate Δv(i,j) for the first subblock and use the same C dx(i,j) and dy(i,j) can be reused for other subblocks in U. ) from sample position (i,j) to subblock (x SB ,y SB ) horizontal to the center and the vertical offset, Δv(x,y) can be derived as Cut.

[0059]

number

[0060] To maintain accuracy, we use subblocks (x SB ,y SB The center of ((W SB -1) / 2,(H SB -1) / 2), where W SB and H SB are respectively , the width and height of the sub-block.

[0061] For a four-parameter affine model,

[0062]

number

[0063] For a six-parameter affine model,

[0064]

number

[0065] Here, (v 0x ,v 0y ), (v 1x ,v 1y ), (v 2x ,v 2y ), is top left, right are the top and bottom left control point motion vectors, and w, h are the width and height of the CU.

[0066] Step 4) Finally, we apply the improvement in luminance prediction, ΔI(i,j), to the subblock prediction, I(i,j). The final prediction I' is generated according to the following equation:

[0067]

number

[0068] PROF does not apply in two cases for affine coded CUs. 1) All control points MV are the same, which indicates that the CU only has translational motion 2) Subblock-based affine MC avoids large memory access bandwidth requirements. In order to achieve this, the affine motion parameters are degraded to CU-based MC. is greater than the limit.

[0069] In order to reduce the coding complexity of affine motion estimation using PROF, a fast coding method is proposed. The following two situations apply: a) this CU is not the root block and its parent If the block does not select the affine mode as its best mode, the current CU is Since the probability of selecting the best mode is low, PROF is not applied and b ) The magnitudes of the four affine parameters (C, D, E, F) are all greater than a predefined threshold. and the current picture is not a low latency picture, it is introduced by PROF. Since the improvement is small in this case, PROF is not applied. This can speed up affine motion estimation.

[0070] 2.6. Example Availability Process for Block Splits 6.4.1 Allowed Quad Division Processes The inputs to this process are: the coding block size in luma samples, cbSize; - the multitype tree depth mttDepth, -Coding using single tree (SINGLE_TREE) or dual tree Whether to split the log tree nodes and, if using dual trees, the brightness (DU AL_TREE_LUMA) or chroma component (DUAL_TREE_CHROMA). The variable treeType that specifies whether the tree is currently being processed. - Intra (MODE_INTRA), IBC (MODE_IBC), Intercode Whether the encoding mode is available (MODE_TYPE_ALL) or whether intra-coding is available (MODE_TYPE_ALL) Can only the IBC coding mode and IBC coding mode be used (MODE_TYPE_ INTRA, or can only use inter-coding mode (MODE_TY The variable modeType specifies the PE_INTER.

[0071] The output of this process is the variable allowSplitQt. The variable allowSplitQt is derived as follows: -allowSplitQt is FALSE if one or more of the following conditions are true: is set to. -treeType is SINGLE_TREE or DUAL_TREE_LUMA and cbSize is less than or equal to MinQtSizeY -treeType is equal to DUAL_TREE_CHROMA and cbSize is Less than or equal to (MinQtSizeC*SubHeightC / SubWidthC) -mttDepth is not equal to 0 -treeType is equal to DUAL_TREE_CHROMA and (cbSize / SubWidthC) is 4 or less -treeType is equal to DUAL_TREE_CHROMA and modeTyp e equals MODE_TYPE_INTRA - Otherwise, allowSplitQt is set to TRUE.

[0072] 6.4.2 Permitted Binary Split Operations The inputs to this process are: - binary split mode btSplit, - the coding block width cbWidth in luma samples, - cbHeight, the height of the coding block in luma samples, the top left luminance sample of the considered coding block relative to the top left luminance sample of the picture Luminance sample position (x0, y0), - the multitype tree depth mttDepth, - the maximum multitype tree depth, offset by maxMttDepth, - maximum binary tree size maxBtSize, -minimum quadtree size minQtSize, - Partition index partIdx, -Coding using single tree (SINGLE_TREE) or dual tree Whether to split the log tree nodes and, if using dual trees, the brightness (DU AL_TREE_LUMA) or chroma component (DUAL_TREE_CHROMA). The variable treeType that specifies whether the tree is currently being processed. - Intra (MODE_INTRA), IBC (MODE_IBC), Intercode Whether the encoding mode is available (MODE_TYPE_ALL) or whether intra-coding is available (MODE_TYPE_ALL) Can only the IBC coding mode and IBC coding mode be used (MODE_TYPE_ INTRA, or can only use inter-coding mode (MODE_TY The variable modeType specifies the PE_INTER.

[0073] The output of this process is the variable allowBtSplit.

[0074] Table 2-1 ParallelTtSplit and cbSize based on btSplit specification

[0075] [Table 1]

[0076] Introduce the variables parallelTtSplit and cbSize as shown in Table 2-1. Put out. The variable allowBtSplit is derived as follows: -allowBtSplit is FALSE if one or more of the following conditions are true: is set to. -cbSize is less than or equal to MinBtSizeY -cbWidth is greater than maxBtSize -cbHeight is greater than maxBtSize -mttDepth is greater than or equal to maxMttDepth -treeType is equal to DUAL_TREE_CHROMA and (cbWidth h / SubWidthC)*(cbHeight / SubHeightC) is 16 or less be -treeType is equal to DUAL_TREE_CHROMA and (cbWidth h / SubWidthC) is equal to 4 and btSplit is SPLIT_BT_VER. equal -treeType is equal to DUAL_TREE_CHROMA and modeTyp e equals MODE_TYPE_INTRA -cbWidth*cbHeight is equal to 32 and modeType is MODE Equal to _TYPE_INTER - Otherwise, if all of the following conditions are met, allowBtSp lit is set to FALSE. -btSplit equals SPLIT_BT_VER -y0+cbHeight is pic_height_in_luma_sample Greater than s

[0077] - Otherwise, if all of the following conditions are met, allowBtSp lit is set to FALSE. -btSplit equals SPLIT_BT_VER -cbHeight is greater than 64 -x0+cbWidth is greater than pic_width_in_luma_samples Larger - Otherwise, if all of the following conditions are met, allowBtSp lit is set to FALSE. -btSplit equals SPLIT_BT_HOR -cbWidth is greater than 64 -y0+cbHeight is pic_height_in_luma_sample Greater than s - Otherwise, if all of the following conditions are met, allowBtSp lit is set to FALSE. -x0+cbWidth is greater than pic_width_in_luma_samples Larger -y0+cbHeight is pic_height_in_luma_sample Greater than s -cbWidth is larger than minQtSize

[0078] - Otherwise, if all of the following conditions are met, allowBtSp lit is set to FALSE. -btSplit equals SPLIT_BT_HOR -x0+cbWidth is greater than pic_width_in_luma_samples Larger -y0+cbHeight is pic_height_in_luma_sample Is less than or equal to s - Otherwise, if all of the following conditions are true, then allowBtSplit is set equal to FALSE. -mttDepth is greater than 0 -partIdx=1 -MttSplitMode[x0][y0][mttDepth-1] is equ altoparallelTtSplit. - Otherwise, if all of the following conditions are met, allowBtSp lit is set to FALSE. -btSplit equals SPLIT_BT_VER -cbWidth is less than or equal to 64 -cbHeight is greater than 64 - Otherwise, if all of the following conditions are met, allowBtSp lit is set to FALSE. -btSplit equals SPLIT_BT_HOR -cbWidth is greater than 64 -cbHeight is 64 or less - Otherwise, allowBtSplit is set to TRUE.

[0079] 6.4.3 Permitted Ternary Splitting Operations The inputs to this process are: -Tternary split mode ttSplit, - the coding block width cbWidth in luma samples, - cbHeight, the height of the coding block in luma samples, the top left luminance sample of the considered coding block relative to the top left luminance sample of the picture Luminance sample position (x0, y0), - Multitype tree depth mttDepth - the maximum multitype tree depth, offset by maxMttDepth, - maximum ternary tree size maxTtSize, -Coding using single tree (SINGLE_TREE) or dual tree Whether to split the log tree nodes and, if using dual trees, the brightness (DU AL_TREE_LUMA) or chroma component (DUAL_TREE_CHROMA). The variable treeType that specifies whether the - Intra (MODE_INTRA), IBC (MODE_IBC), Intercode Whether the encoding mode is available (MODE_TYPE_ALL) or whether intra-coding is available (MODE_TYPE_ALL) Can only the IBC coding mode and IBC coding mode be used (MODE_TYPE_ INTRA, or can only use inter-coding mode (MODE_TY The variable modeType specifies the PE_INTER.

[0080] The output of this process is the variable allowTtSplit. Table 2-2 cbSize specifications according to ttSplit

[0081] [Table 2]

[0082] Derive the variable cbSize as shown in Table 2-2. The variable allowTtSplit is derived as follows: -allowTtSplit is FALSE if one or more of the following conditions are true: is set to. -cbSize is less than or equal to 2*MinTtSizeY -cbWidth is greater than Min(64,maxTtSize) -cbHeight is greater than Min(64,maxTtSize) -mttDepth is greater than or equal to maxMttDepth -x0+cbWidth is greater than pic_width_in_luma_samples Larger -y0+cbHeight is pic_height_in_luma_sample Greater than s -treeType is equal to DUAL_TREE_CHROMA and (cbWidth h / SubWidthC)*(cbHeight / SubHeightC) is 32 or less be -treeType is equal to DUAL_TREE_CHROMA and (cbWidth h / SubWidthC) is equal to 8, and ttSplit is set to SPLIT_TT_VER. equal -treeType is equal to DUAL_TREE_CHROMA and modeTyp e equals MODE_TYPE_INTRA -cbWidth*cbHeight is equal to 64 and modeType is MODE Equivalent to _TYPE_INTER. - Otherwise, allowTtSplit is set to TRUE.

[0083] 6.4.4 Neighborhood Block Availability Derivation Process The inputs to this process are: - The luminance of the top-left sample of the current block relative to the top-left luminance sample of the current picture. degree position (xCurr,yCurr), - The luminance position covered by the neighboring blocks relative to the top-left luminance sample of the current picture ( xNbY, yNbY), - A variable checkPredMo that specifies whether availability depends on the prediction mode. deY, - The variable cIdx that defines the color components of the current block.

[0084] The output of this process is the available neighboring blocks covering the position (xNbY, yNbY). This is a possibility, represented as availableN. The availability of neighboring blocks, availableN, is derived as follows: - availableN is set to FALSE if one or more of the following conditions are true: It is determined. -xNbY is less than 0. - yNbY is less than 0. -xNbY is greater than or equal to pic_width_in_luma_samples. - yNbY is greater than or equal to pic_height_in_luma_samples. -IsAvailable[cIdx][xNbY][yNbY] is equal to FALSE It is. - The neighboring block is in a different slice than the current block. - The neighboring block is contained in a different tile than the current block. -sp_entropy_coding_sync_enabled_flag is 1 and (xNbY>CtbLog2SizeY) is equal to (xCurr>CtbLog2S izeY)+1 or greater. - Otherwise, availableN is set to TRUE. availableN is set to FALSE if all of the following conditions are true: . -checkPredModeY equals TRUE. -availableN is set to TRUE. -CuPredMode[0][xNbY][yNbY] is CuPredMode[0 ][xCurr][yCurr] is not equal to

[0085] 2.7. AMVR (Adaptive Motion Vector Resolut) ion) In HEVC, use_integer_mv_flag is specified in the slice header. If it is 0, the MVD (Motion Vector D) is calculated in units of 1 / 4 luma samples. The difference between the motion vector and the predicted motion vector of the CU is signaled. In VVC, CU-level AMVR (Adaptive Motion Vector Recognition) The AMVR uses the MVD of the CU with different The current CU mode (normal AMVP mode) MV of the current CU based on the D can be chosen adaptively as follows: -Normal AMVP mode: 1 / 4 luminance sample, 1 / 2 luminance sample, 1 luminance sample or 4 luminance samples -Affine AMVP mode: 1 / 4 luma sample, 1 luma sample, or 1 / 16 luma sample. Degree sample -IBC mode: 1 luminance sample or 1 / 4 luminance sample

[0086] If the current CU has at least one nonzero MVD component, then the CU-level MVD resolution The degree indication is conditionally signaled. All MVD components (i.e., reference lists L0 and If both horizontal and vertical MVDs of reference list L1 are zero, then the 1 / 4 luma sample The MVD resolution is inferred.

[0087] Regular AMVP inter mode (non-IB) with at least one non-zero MVD component For a CU coded with C, which is non-affine, the 1 / 4 luminance sample MVD accuracy is C The first flag (e.g., amvr_flag) indicates whether the If the first flag is 0, no further signaling is required and the For the first CU, 1 / 4 luma sample MVD precision is used. Otherwise, the second The lag (e.g., the first bin of amvr_precision_idx) is 1 / 2 the luminance scale. 1 sample or other MVD precision (1 luma sample or 4 luma samples) is normal AMVP For 1 / 2 luma samples, 1 / For the two luminance sample positions, a 6-tap interpolation filter is used instead of the default 8-tap interpolation filter. Otherwise, the third flag (e.g. amvr_precis ion_idx) is a MV of one luma sample or four luma samples D precision is signaled to indicate whether it is used for normal AMVP_CU.

[0088] For CUs coded in affine AMVP mode, the second flag specifies one luma subpixel. Used to indicate whether MVD precision of 1 / 16 luma samples or 1 / 16 luma samples is used. For CUs coded in IBC mode, the first flag is not signaled. , which is inferred to be equal to 1.

[0089] In the current design of AMVR, amvr_flag equal to 0 means that the motion vector difference Specifies that the resolution of the image is 1 / 4 of the luma samples. amvr_flag equal to 1 The resolution of the motion vector difference is further increased by amvr_precision_idx. Prescribe what is prescribed.

[0090] amvr_precision_idx is the difference between the motion vector and AmvrShift This specifies that the resolution is defined in Table 2-3. Example Syntax Table for AMVR 7.3.10.5 Coding unit syntax

[0091] [Table 3]

[0092] [Table 4]

[0093] [Table 5]

[0094] [Table 6]

[0095] Specifically, the bins of amvr_flag and amvr_precision_idx The bin strings and context for coding the strings are defined as follows: will be done.

[0096] [Table 7]

[0097] [Table 8]

[0098] [Table 9]

[0099] [Table 10]

[0100] 7.4.11.5 Coding unit syntax amvr_precision_idx[x0][y0] is the same as AmvrShift It is specified that the resolution of the motion vector difference is defined in Table 2-3. Array index x0, y0 is the left pixel of the considered coding block relative to the top-left luminance sample of the picture. Specifies the position (x0,y0) of the upper luminance sample. If dx[x0][y0] is not present, it is inferred to be equal to 0.

[0101] Table 2-3 AmvrShift specifications

[0102] [Table 11]

[0103] 9.3.3 Binarization

[0104] Table 126 - Syntax elements and associated binarization

[0105] [Table 12]

[0106] [Table 13]

[0107] 9.3.2.2 Context Variable Initialization Process

[0108] Table 51 - ctxIdx of each initializationType in the initialization process and syntax element association

[0109] [Table 14]

[0110] Table 88-amvr_flag ctxIdx initValue and shiftI dx specifications

[0111] [Table 15]

[0112] Table 89-amvr_precision_idx ctxIdx initValue and the specification of shiftIdx

[0113] [Table 16]

[0114] 9.3.4.2 Derivation process of ctxTable, ctxIdx, bypassFlag 9.3.4.2.1 General

[0115] Table 131 - ctxInc for syntax elements with context-coded bins allocation

[0116] [Table 17]

[0117] 2.8. Split information Ness using binary and ternary split segmentation structures in VVC The quadtree with the multitype tree modeled on it takes into account the concept of multiple partition unit types. Instead, for example, it is necessary for a CU that has a size that is too large for the maximum transform length. Eliminate the separation of CU, PU, ​​and TU concepts unless otherwise specified, and use a more specific form for the CU split shape. In the coding tree structure, CUs can be square or First, we consider the CTU (Coding Tree Unification). Then, the leaf nodes of the quadtree are multi-type trees. As shown in Figure 10, the multi-type tree structure can be further divided into There are four split types: vertical binary split (SPLIT_BT_VER), horizontal binary Split (SPLIT_BT_HOR), vertical ternary split (SPLIT_TT_VER), There is a horizontal ternary split (SPLIT_TT_HOR). The node is called a CU (Coding Unit), and if a CU is too large, it becomes the maximum transform length. Unless otherwise specified, this segmentation is used for prediction and conversion processing without further division. This is most often the case when CU, PU, ​​and TU are nested multi- In a quadtree with a tree coding block structure of the same block size The maximum supported transform length is less than the width or height of the CU's color components. If , this exception occurs.

[0118] FIG. 11 shows a quadtree with nested multi-type coding trees. CTU (Coding Tree Unit) is treated as the root of a quadtree and is first split by one quadtree structure. The leaf nodes of (if large enough to allow it) are then sorted by the multitype tree structure. In the multitype tree structure, the first flag (mtt_sp lit_cu_flag) is a signal to indicate whether the node is further split. If a node is notified and further split, a second flag (mtt_split_c u_vertical_flag) is signaled to indicate the split direction, then the third flag lag (mtt_split_cu_binary_flag) indicates that the split is a binary split. mtt_split_cu is signaled to indicate whether there is a split or a ternary split. _vertical_flag and mtt_split_cu_binary_fla Based on the value of g, the multi-type tree slit mode of the CU ( MttSplitMode) is derived.

[0119] Table 2-4 Derivation of MttSplitMode Based on Multitype Tree Syntax Elements

[0120] [Table 18]

[0121] mtt_split_cu_vertical_flag=0 is the coding unit mtt_split_cu_vertical_fl ag=1 specifies that the coding unit is split vertically. If t_cu_vertical_flag is not present, it is inferred as follows: -allowSplitBtHor equals TRUE or allowSplit If TtHor is equal to TRUE, mtt_split_cu_vertical_f The value of lag is assumed to be equal to 0. - Otherwise, the value of mtt_split_cu_vertical_flag is 1. is assumed to be equal to

[0122] Example of syntax table for mtt_split_cu_vertical_flag 9.3.2.2 Context Variable Initialization Process

[0123] Table 51 - ctxIdx of each initializationType in the initialization process and syntax element association

[0124] [Table 19]

[0125] Table 61-mtt_split_cu_vertical_flag ctxInc i nitValue and shiftIdx specifications

[0126] [Table 20]

[0127] 9.3.4.2 Derivation process of ctxTable, ctxIdx, bypassFlag 9.3.4.2.1 General

[0128] Table 131 - ctxInc for syntax elements with context-coded bins allocation

[0129] [Table 21]

[0130] 9.3.4.2.3 Syntax Element mtt_split_cu_vertical_flag The derivation process of ctxIncfor The input to this process is the current luma block for the top-left sample of the current picture. Luminance sample in the upper left, dual tree channel type chType and luminance sample The width and height of the current coding block in The variables allow derived in the coding tree semantics in section 7.4.11.4 SplitBtVer, allowSplitBtHor, allowSplitTVe r, allowSplitTHor, allowSplitTHor and allowS It is plit.

[0131] The output of this operation is ctxInc. The position (xNbL, yNbL) is set equal to (x0-1, y0) and the The process of deriving the availability of a given neighborhood block is set equal to (x0, y0). The neighboring positions (xCurr, yCurr) and (xNbL, yNbL) are set equal to the position (xCurr, yCurr) and (xNbL, yNbL). position (xNbY, yNbY), checkPredModeY set to FALSE and It is executed with cIdx and cIdx as inputs, and the output is assigned to availableL. The position (xNbA, yNbA) is set equal to (x0, y0-1) and The process of deriving the availability of a given neighborhood block is set equal to (x0, y0). The position (xCurr, yCurr) is set equal to the neighboring position (xNbA, yNbA). position (xNbY, yNbY), checkPredModeY set to FALSE and It is executed with cIdx and cIdx as inputs, and the output is assigned to availableA.

[0132] The allocation of ctxInc is specified as follows: -allowSplitBtVer+allowSplitBtHorallowS If it is greater than plitTVer+allowSplitTTHor, ctxInc is 4. is set to. -If not, allowSplitBtVer+allowSplitBtHo If r is less than allowSplitTVer+allowSplitTTHor , ctxInc is set equal to 4. - Otherwise the following applies: The variables dA and dL are derived as follows: dA=cbWidth / (availableA?CbWidth[chType ][xNbA][yNbA]:1) (1563) dL=cbHeight / (availableL?CbHeight[chTy pe][xNbL][yNbL]:1) (1564) - ctxInc is set equal to 0 if any of the following conditions are true: -dA is equal to dL, -availableA is FALSE -availableL is FALSE - Otherwise, if dA is less than dL, ctxInc is set equal to 1. do. Otherwise, ctxInc is set equal to 0.

[0133] 2.9. Coefficient Coding in Transform Skip Mode In the current VVC draft, residual coding is transformed skip-level statistics and signal In order to adapt to the characteristics of the TS coefficients, TS (Transform Several modifications have been proposed for the coefficient coding in the Skip mode. .

[0134] 7.3.10.11 Residual Coding Syntax

[0135] [Table 22]

[0136] [Table 23]

[0137] [Table 24]

[0138] [Table 25]

[0139] [Table 26]

[0140] [Table 27]

[0141] [Table 28]

[0142] [Table 29]

[0143] 2.9.1. Context modeling of the sign flag coeff_sign_flag and and context index offset derivation

[0144] Table 51 - ctxIdx of each initializationType in the initialization process and syntax element association

[0145] [Table 30]

[0146] Table 125-coeff_sign_flag ctxInc initValue and and shiftIdx specifications

[0147] [Table 31]

[0148] Table 131 - ctxInc for syntax elements with context-coded bins allocation

[0149] [Table 32]

[0150] 9.3.4.2.10 Syntax Element coeff_sign_f for Transform Skip Mode lag's ctxInc derivation process The input to this process is a color component index, cIdx, of the top-left sample of the current picture. The luminance position (x0, y0) that specifies the top-left sample of the current transform block. is the coefficient scan position (xC, yC). The output of this process is the variable ctxInc. The variables leftSign and aboveSign are derived as follows: leftSign=(xC==0)?0:CoeffSignLevel[xC-1 ][yC] (1595) aboveSign=(yC==0)?0:CoeffSignLevel[xC] [yC-1] (1596) The variable ctxInc is derived as follows. -If leftSign is equal to 0 and aboveSign is equal to 0, or If ftSign is equal to -aboveSign, the following applies: ctxInc=(BdpcmFlag[x0][y0][cIdx]==0?0:3 ) (1597) - Otherwise, leftSign is greater than or equal to 0 and aboveSign is greater than or equal to 0. In that case, the following applies: ctxInc=(BdpcmFlag[x0][y0][cIdx]?1:4) ( 1598) - Otherwise the following applies: ctxInc=(BdpcmFlag[x0][y0][cIdx]?2:5) ( 1599)

[0151] 3. Technical Problems Solved by the Disclosed Technical Solutions and Embodiments Context derivation process for AMVR precision index and split CU vertical flag The current design of the sensor has the following problems: 1. Syntax elements that specify splitting a block horizontally or vertically (e.g., mtt_ The context modeling of "al lowSplitBtVer+allowSplitBtHor” and “allowSpl It depends on the relationship between "itTVer+allowSplitTHor". However, The correlation between division information and BT / TT vertical is greater than that between BT / TT horizontal and BT / TT vertical. Please note that: 2. In the current VVC, the AMVR precision index (e.g., amvr_prec The first bin of the ision_idx) indicates whether the block is coded in IBC mode. , coded in affine mode, or in regular inter mode (non-IBC, non Context coding is done in one context, regardless of whether it is coded in a context-affine manner. Coding the AMVR precision index is less efficient. Also, coding for blocks with normal inter mode may not be possible. The second bin of amvr_precision_idx is Use a separate context from that used for the first bin of ion_idx. The multiple contexts used to code a syntax element are If the filtering frequency is low, it may not be optimal. 3. Coefficient coding has the advantage of coding in coding screen content However, the coefficient coding and TS modes still require some The disadvantages of the above are as follows. a. Use bypass coding for the sign flag or use context coding It is unclear in this case whether it will be used. i. The number of remaining allowed context-coded bins (RemCcbs ) is equal to 0. ii. The current block is coded in TS mode. iii.slice_ts_residual_coding_disabled _flag is false.

[0152] 4. List of technical solutions and embodiments The following items should be considered examples to illustrate the general concepts. These items should not be interpreted narrowly. Moreover, these items may not be organized in any way. It can be combined.

[0153] In this disclosure, the term AMVR stands for Motion Vector / Motion Vector Displacement (MVD). Difference coding or MVP (MV Predictor) The present invention relates to a coding tool that uses adaptive motion vector differential resolution for VVC. However, the present invention is not limited to the AMVR and block division techniques described in.

[0154] amvr_precision_idx is the index of the allowed motion vector differential resolution. In one example, it is a VVC text The value may be amvr_precision_idx defined in the document. amvr_precision_idx is a bin precision that can contain one or more bins. may be binarized into a string of

[0155] mtt_split_cu_vertical_flag splits the coding block Represents a syntax element that specifies whether to split vertically. In one example, it is a VVC text. The mtt_split_cu_vertical_flag defined in the can.

[0156] Deriving the context of amvr_precision_idx 1. The first bin of the SE (Syntax Element) indicating the use of AMVR index equal to 0) and / or other bins in the bin string (e.g., amvr Context for _precision_idx and / or amvr_flag Modeling (e.g. how to select the context) depends on the current block and and / or the coded information of neighboring blocks (e.g. coded mode It may depend on the In one example, the coded information includes IBC, affine AMVR, and Regular inter (e.g. non-IBC, non-affine) modes, bi-predictive and / or uni-predictive , of the block dimensions of the current block and / or the block dimensions of the neighboring blocks The coding information may include at least one bin (e.g., a first bin) based on the coded information. Different contexts may be used to code the bins of i. Alternatively, one bin (e.g., the first bin) of an IBC coded block bin) are coded in a single context, denoted by CtxM. ii. Alternatively, one bin of the SE for an affine coded block (e.g., the first bin) is coded in a single context, represented by CtxN. It will be done. iii. Alternatively, or in addition, regular inter- (e.g., non-affine and non-IBC ) One bin (e.g., the first bin) of the SE for the coded block is C It is coded in a single context represented by txP. iv. Or, at least one of the three contexts CtxM, CtxN, and CtxP In each case, one context is different from the other two. v. Alternatively, the three contexts CtxM, CtxN, and CtxP are different from each other. become. For example, one bin (e.g., the first bin) of the SE may be a bi-predictive block. In this case, the prediction is coded in a single context, denoted by CtxBi, and the prediction is unipredictive. In the case of a block, it is coded in a single context, indicated by CtxUni. 1) In one example, CtxBi is different from CtxUni.

[0157] b. In one example, two or more contexts are associated with the first bin of the bin string of the SE. and / or other bins may be used to code the In one example, X contexts are available for the first bin. , where X>1. 1) In one example, X=3. a) Alternatively, or in addition, the choice of context may be influenced by the coded information (e.g. The mode depends on the number of inputs (e.g., the mode mentioned above). 2) In one example, X=2. a) Alternatively, or in addition, the choice of context may be influenced by the coded information (e.g. modes mentioned above) and one context for the IBC coding block. for other blocks (e.g., affine or regular inter-coding). Depends on other contexts. b) Alternatively, the choice of context may be based on the coded information (e.g. modes mentioned above), one code for IBC and affine AMVR coded blocks The text of the main block and one of the other blocks (e.g., normal intercoding) Depends on the context. c. In one example, based on coded information (e.g., coding mode) The first bin (bin index equal to 0) of the SE bin string and / or may initialize different models in other bins with different initialization values. d. In one example, based on coded information (e.g., coding mode) The first bin (bin index equal to 0) of the SE bin string and / or may initialize different models in other bins with the same initialization values.

[0158] 2. The first and second bins of the bin string in amvr_precision_idx Instead of using different contexts to code the second bin, The context used is used to code the first bin of the bin string. It is proposed that the context may be the same as one or more of the contexts in which the a. Alternatively, the second bin of the bin string can be a regular inter (e.g., non-affine and non-IBC) coding blocks. b. Alternatively, the second bin of the bin string is a single context denoted by CtxQ. The data is coded in bytes. c. Alternatively, the same context may be used as the amvr Used to code the first bin of _precision_idx, amvr_precision_idx for inter-coded blocks It may be used to code the second bin. d. Alternatively, the same context can be used for affine coded blocks. Used to code the first bin of amvr_precision_idx , amvr_precision_ for normal inter-coded blocks It may be used to code the second bin of idx. e. Alternatively, the same context may be used in a normal inter-coded block. Used to code the first bin of amvr_precision_idx for amvr_precision_ for normal inter-coding blocks It may be used to code the second bin of idx.

[0159] 3. amvr_pre for IBC coded blocks (denoted by CtxM) The first bin of cision_idx and the normal inter-coded block (Ct The second bin of amvr_precision_idx for The same context may be used to match the In one example, to code amvr_precision_idx For example, the X1 (eg, X1=3) context may be used. b. Alternatively, for non-IBC coded blocks, amvr_preci Various contexts for coding the first bin of the bin string in sion_idx A strike may be used.

[0160] 4. amvr_precision_id for IBC coded blocks amvr_precis for the first bin of x, the affine coded block The first bin of ion_idx, and amvr_p for normal inter coding To code the first bin of recision_idx, CtxM = CtxN The same context may be used, such as =CtxP. In one example, to code amvr_precision_idx For example, the X2 (eg, X2=2) context may be used. b. Alternatively, and in addition, for non-IBC and non-affine coded blocks and coding the first bin of the bin string in amvr_precision_idx Different contexts for performing the process may be used.

[0161] 5. amvr_precision_id for IBC coded blocks amvr_p for the first bin of x and for normal inter-coded blocks To code the first bin of recision_idx, CtxM = CtxP The same context may be used, such as: In one example, to code amvr_precision_idx In addition, the X3 (eg, X3=3) context may be used. b. Alternatively, non-IBC and non-normal inter-coded blocks (e.g. For example, coded with affine AMVR), amvr_precision_ A different context is used to code the first bin of the idx bin string. This may be done. c. Alternatively, the first bin string of amvr_precision_idx Different contexts for coding the two bins may be utilized.

[0162] 6. amvr_precision_id for IBC coded blocks amvr_pre for the first bin of x and the affine coded blocks To code the first bin of cision_idx, we use CtxM=CtxN. The same context may be used, for example: 7. IBC coded blocks, affine coded blocks, and For normal coded blocks, amvr_precision_idx The same context may be used to code all the bins. In one example, a single context is amvr_precision_idx may be used to code the

[0163] 8. Multiple contexts are used for IBC coded blocks, affine coding For inter-coded blocks and regular inter-coded blocks, _precision_idx may be used to code the first bin of ,A single context is used differently from the one used to code the first bin. The second bin may be used to code the corresponding second bin. In one example, to code amvr_precision_idx For example, the X4 context (eg, X4=4) may be used. b. For example, CtxM != CtxQ != CtxN != CtxP.

[0164] 9. A small number of bits used to code amvr_precision_idx At least one context may be used to code amvr_flag. It is proposed that it may be the same as the context. a. The AMVR flag of the affine coding block (e.g., amvr_flag The same context for coding the IBC The first bin of amvr_precision_idx for the block selected, or / and and amvr_precision_id for affine coded blocks the first bin of x, or / and a for regular inter-coded blocks For the first bin and / or second bin of mvr_precision_idx It's okay to stay there. b. The AMVR flag of the non-affine coded block (e.g., amvr_ The same context for coding the IBC code The first bin of amvr_precision_idx for the matched block, or and / or amvr_precision for affine coded blocks For the first bin of n_idx, or / and for regular inter-coded blocks The first and / or second bins of amvr_precision_idx It may also be used for Context modeling for the first bin of c.amvr_precision_idx depends on whether an affine mode is applied for the block. i. Alternatively, one context may be an affine coded block. The first bin of the block is used to code the first bin of the block, and the other contexts are non-affine. Coded blocks (e.g., normal inter-coded blocks and and IBC coded blocks). ii. Alternatively or additionally, the first context may be an affine coded block. The first bin of the lock is used to code the second bin, and the second context is used to code the non-af Inter-coded blocks (e.g., normal inter-coded blocks) and IBC coded blocks). The code is for coding the amvr_flag of the affine coded block. The second context is the same as the context used for the non-affine The same context is used to code the amvr_flag of the mapped block. This is the same.

[0165] Context derivation of mtt_split_cu_vertical_flag Variables allowSplitBtVer, allowSplitBtHor, allow SplitTVer, allowSplitTVer, allowSplitTHor ,For the current coding tree node, vertical BT split, horizontal BT split, and vertical TT split , respectively indicate whether horizontal TT splitting is allowed. Ver, allowSplitBtHor, allowSplitTtVer, allo The values ​​of wSplitTTVer and allowSplitTTHor are equal to 0 or 1. These are derived in Section 2.6. the width of the left neighbor's block, the height of the left neighbor's block, the width of the top neighbor's block, and The heights of the upper neighboring blocks are curW, curH, leftW, and leftH, respectively. , aboveW, and aboveH. Let "numH" be the sum of Ver and allowSplitTtVer, and let "numH" be the A value equal to the sum of wSplitBtHor and allowSplitTHor.

[0166] 10. SE indicating block division information (e.g., mtt_split_cu_verti cal_flag) for context modeling, vertical The number allowing splitting (e.g., BT and TT) and the number allowing horizontal splitting (e.g., B T and TT) may be dependent. a. In one example, when vertical splitting is often allowed compared to horizontal splitting (e.g., numV>numH), the first set of contexts is utilized. b. In one example, when vertical splitting is allowed less often than horizontal splitting (e.g., numV<numH), the second set of contexts is utilized. c. In one example, when vertical splitting is allowed the same amount as horizontal splitting (e.g., numV=numH), the third set of contexts is utilized. d. Alternatively, furthermore, the contexts in the first / second / third sets are all not the same. e. Alternatively, furthermore, at least one of the contexts in the first / second / third sets is the same as the context included in another set. f. Alternatively, furthermore, the number of contexts in each of the three sets may depend on the set index index. i. In one example, only one context is included in the first and / or second sets included. ii. In one example, multiple contexts are included in the third set. 1) Alternatively, the selection of contexts from the third set may be based on the availability of the upper and left neighboring blocks, and / or the block size of the current block and the block sizes of the neighboring blocks further depend. g. One example is shown in Embodiment #4 of Chapter 5.4. h. One example is shown in Embodiment #5 of Chapter 5.5.

[0167] 11. SE indicating whether to split one block vertically (e.g., mtt_spl it_cu_vertical_flag) indicates whether BT / TT splitting is allowed. or / and the width / height of the current block, or / and the width / height of a nearby block It is coded in N contexts that may depend on each other. i. In one example, what context is used to code the SE? may depend on numV and numH. i. For example, it depends on whether numV is greater than numH. ii. For example, it depends on whether numV is less than numH. iii. For example, whether numV is equal to numH depends on the average.

[0168] j. In one example, the SE bin string is used to determine whether BT / TT splitting is allowed. Based on this, the context coding may be performed using N contexts. i. In one example, SE is determined to be activated by CtxA when numV is greater than numH. The context is coded as: ii. In one example, the SE is selected by CtxB if numV is less than numH. The context is coded as: iii. In one example, SE is determined to be a 1st bit by CtxC when numV is equal to numH. The context is coded as: iv. In one example, CtxA is equal to CtxB, and CtxB is equal to CtxC. (e.g., CtxA=CtxB=CtxC), e.g., CtxA=CtxB=CtxC= The value is 0. v. In one example, CtxA != CtxB != CtxC, e.g., CtxA =0, CtxB=1, CtxC=2.

[0169] k. In one example, the SE bin string is the width / height and / or Context coding is performed for N contexts based on the width / height of the block or the neighboring blocks. It may be queried. i. In one example, the neighboring block is a neighboring block above or / and a neighboring block to the left Neighboring blocks may be referenced. ii. In one example, the SE is the width or height of the current block, and / or the Coding with N contexts, which may depend on a function of the width or height of the neighboring blocks It represents dA=curW / aboveW and dL=curH / leftH. 1) In one example, the SE is either the left neighboring block or the top neighboring block. If either is not available, or if dA is equal to dL, then the It is coded in the context of 2) In one example, SE is represented by CtxE when dA is less than dL. It is coded in the context in which it is used. 3) In one example, SE is represented by CtxF when dA is greater than dL. The object is coded in the context in which it is executed.

[0170] l. In one example, the SE bin string indicates whether BT / TT splitting is allowed; and / or the width / height of the current block, and / or the width / height of the neighboring blocks. Based on this, context coding may be performed with N contexts. i. In one example, SE is determined to be activated by CtxA when numV is greater than numH. The context is coded as: ii. In one example, the SE is selected by CtxB if numV is less than numH. The context is coded as: iii. In one example, SE is the block with numV equal to numH (the block with the left (either the block or the neighboring block above is unavailable or dA is equal to dL) If so, it is coded in the context indicated by CtxC. iv. In one example, SE is numV equal to numH and dA is less than dL. If so, it is coded in the context represented by CtxE. v. In one example, SE is set to numV equal to numH and dA is greater than dL. If not, it is coded in the context represented by CtxF. In one example, N=5, CtxA!=CtxB!=CtxC!=CtxE!=Ct xF.

[0171] m. In one example, the string of bins in the SE determines whether the current block is on a picture boundary. Based on this, the context coding may be performed using N contexts. In one example, the string of bins of the SE is a dual tree and / or a local Context in N contexts based on which of the dual trees is applied It may be coded. In one example, the string of bins for the SE is based on the color components of the samples being split. , N contexts may be used for context coding. p. In one example, the SE bin string is calculated based on the width / height of the current block: Context coding may be performed using N contexts. In one example, the context augmentation means is set as a function of the width or height of the block. It may be determined.

[0172] 12. Split CU vertical flag (e.g., mtt_split_cu_vertical_ flag) may be coded in a single context.

[0173] Use bypass coding or context coding for coefficient sign flag How to

[0174] 13. The sign of the transform coefficient level (e.g., the syntax element coeff_sign_flag) Whether to use context coding or bypass coding for The number of remaining allowed context-coded bins (e.g., RemCcbs) and / or the type of transformation used for the current block (e.g., DCT2, DST7, or conversion skip). In one example, in the process of transform skip residual coding, RemCcbs If T1 is greater than T1 (for example, T1=0), the content of coeff_sign_flag is Text coding may be used. i. Also, in the transform skip residual coding procedure, RemCcbs is T1 If T1 is equal to 0 (for example, T1=0), the bypass code is set in coeff_sign_flag. Ringing may also be used. b. In one example, in the process of transform skip residual coding, RemCcbs If coeff_sign_flag is greater than or equal to T2 (e.g., T2=3), the content Text coding may also be used. i. In addition, in the process of transform skip residual coding, RemCcbs is T2 If T2 is smaller than 0 (for example, T2=3), the coeff_sign_flag is bypassed. Scording may be used.

[0175] 14. Residual structure in the third / residue coefficient scan pass of the transform skip residual coding process Statement elements (for example, the syntax elements abs_remainder and coeff_sign_f At the start of bypass coding for the lag, the remaining allowed context codes are Apply an operation to a variable that specifies the number of bins (e.g., RemCcbs) that are You may do so. c. In one example, this action is to set RemCcbs equal to a value (e.g., 0). may be set to d. In some embodiments, the operation is at least one of the following except RemCcbs: It may be possible to set RemCcbs equal to a value based on a variable or syntax element. stomach. i. In one example, this action subtracts 1 from RemCcbs. can be set to be equal to the

[0176] 15. One example is shown in embodiment #7 in section 5.7. 16. One example is shown in embodiment #8 in section 5.8.

[0177] 17. Transform coefficient level (e.g., coeff_sign_flag) is in bypass mode or in context coding mode is the number of remaining allowed context-coded bins (e.g., RemCc bs). e. The number of remaining allowed context-coded bins (e.g., RemC cbs) is smaller than N, the sign of the transform coefficient levels (e.g., coeff_sign It is proposed to code the _flag) in bypass mode. f. In one example, the sign flag is set to RemCcbs<=N. It is coded in . i. Alternatively, in one example, if RemCcbs>N, the sign flag is It is coded in text mode. g. In one example, if RemCcbs is equal to N, the sign flag is in bypass mode. It is coded as: i. Alternatively, in one example, if RemCcbs>N, the sign flag is It is coded in pass-through mode. ii. In one example, N may be set equal to 4. 1) Alternatively, in one example, N may be set equal to 0. iii. In one example, RemCcbs decodes the absolute values ​​of the remaining transform coefficient levels. Before performing the calculation, the number of N's may be modified to X, where X is equal to N.

[0178] h. In one example, if RemCcbs is less than N, the sign flag is in bypass mode. It is coded. i. Or, in one example, if RemCcbs>=N, the sign flag is It is coded in text mode. ii. In one example, N may be set equal to 3. iii. In one example, RemCcbs decodes the absolute values ​​of the remaining transform coefficient levels. Before performing the above, the number N may be modified to X, where X is less than N. i. In one example, N is an integer and may be based on the following: i.SPS / VPS / PPS / Picture Header / Slice Header / Tile Group Indications signaled in the header / LCU line / group of LCUs / LCU / CU ii. Block dimensions of the current block and / or its neighboring blocks iii. The block shape of the current block and / or its neighboring blocks iv. Display color format (e.g. 4:2:0, 4:4:4) v. Whether a separate or dual coding tree structure is used vi. Slice type and / or picture type vii. Number of color components

[0179] j. A coding context used to code the transform coefficient levels (e.g. coeff_sign_flag) specifies the remaining allowed context codes. The number of bins (eg, RemCcbs) that are entered may depend on the number of bins that are entered. k. The above examples are variations with and without BDPCM coded blocks. It may be applied to transform blocks and / or transform skip blocks.

[0180] general

[0181] 18. Whether and / or how to apply the methods disclosed above , e.g., Sequence Header / Picture Header / SPS / VPS / DPS / DCI / PP In S / APS / slice header / tile group header, sequence level / picture It may be signaled at the tile level / slice level / tile group level. 19. Whether and / or how to apply the methods disclosed above The coding information such as color format, single / dual tree division, etc. The information may be relied upon.

[0182] 5. Embodiments Below are some exemplary implementations for some of the inventive aspects summarized in Section 4 above. This embodiment is applicable to VVC specifications. Bold Italics In addition, The most relevant parts that were amended are underlined, and some of the parts that were deleted are marked [[ This is indicated using ]].

[0183] 5.1. First embodiment 9.3.2.2 Context Variable Initialization Process

[0184] Table 51 - ctxIdx of each initializationType in the initialization process and syntax element association

[0185] [Table 33]

[0186] Table 89-amvr_precision_idx ctxIdx initValue and the specification of shiftIdx

[0187] [Table 34]

[0188] 9.3.4.2 Derivation process of ctxTable, ctxIdx, bypassFlag 9.3.4.2.1 General

[0189] Table 131 - ctxInc for syntax elements with context-coded bins allocation

[0190] [Table 35]

[0191] [ka]

[0192] [Table 36]

[0193] In the above example, X!=Y, X!=Z, Y!=Z. Alternatively, the following also applies: 1) In one example, W is equal to X. 2) Alternatively, W is equal to Y. 3) Alternatively, W is equal to Z.

[0194] 5.2. Embodiment 2 9.3.2.2 Context Variable Initialization Process

[0195] Table 51 - ctxIdx of each initializationType in the initialization process and syntax element association

[0196] [Table 37]

[0197] Table 89-amvr_precision_idx ctxIdx initValue and the specification of shiftIdx

[0198] [Table 38]

[0199] 9.3.4.2 Derivation process of ctxTable, ctxIdx, bypassFlag 9.3.4.2.1 General

[0200] Table 131 - ctxInc for syntax elements with context-coded bins allocation

[0201] [Table 39]

[0202] [ka]

[0203] 5.3. Third embodiment 9.3.2.2 Context Variable Initialization Process

[0204] Table 51 - ctxIdx of each initializationType in the initialization process and syntax element association

[0205] [Table 40]

[0206] Table 89-amvr_precision_idx ctxIdx initValue and the specification of shiftIdx

[0207] [Table 41]

[0208] 9.3.4.2 Derivation process of ctxTable, ctxIdx, bypassFlag 9.3.4.2.1 General

[0209] Table 131 - ctxInc for syntax elements with context-coded bins allocation

[0210] [Table 42]

[0211] 5.4. Embodiment 4 The working draft may be amended as follows: 9.3.4.2.3 Syntax Element mtt_split_cu_vertical_flag The derivation process of ctxIncfor The input to this process is the current luma block for the top-left sample of the current picture. Luminance sample in the upper left, dual tree channel type chType and luminance sample The width and height of the current coding block in The variables allow derived in the coding tree semantics in section 7.4.11.4 SplitBtVer, allowSplitBtHor, allowSplitTVe r, allowSplitTHor, allowSplitTHor and allowS It is plit.

[0212] The output of this operation is ctxInc. The position (xNbL, yNbL) is set equal to (x0-1, y0) and the The process of deriving the availability of a given neighborhood block is set equal to (x0, y0). The neighboring positions (xCurr, yCurr) and (xNbL, yNbL) are set equal to the position (xCurr, yCurr) and (xNbL, yNbL). position (xNbY, yNbY), checkPredModeY set to FALSE and It is executed with cIdx and cIdx as inputs, and the output is assigned to availableL. The position (xNbA, yNbA) is set equal to (x0, y0-1) and The process of deriving the availability of a given neighborhood block is set equal to (x0, y0). The position (xCurr, yCurr) is set equal to the neighboring position (xNbA, yNbA). position (xNbY, yNbY), checkPredModeY set to FALSE and It is executed with cIdx and cIdx as inputs, and the output is assigned to availableA.

[0213] [ka]

[0214] 5.5. Embodiment 5 The working draft may be amended as follows: 9.3.4.2.3 Syntax Element mtt_split_cu_vertical_flag The derivation process of ctxIncfor The input to this process is the current luma block for the top-left sample of the current picture. Luminance sample in the upper left, dual tree channel type chType and luminance sample The width and height of the current coding block in The variables allow derived in the coding tree semantics in section 7.4.11.4 SplitBtVer, allowSplitBtHor, allowSplitTVe r, allowSplitTHor, allowSplitTHor and allowS It is plit. The output of this operation is ctxInc. The position (xNbL, yNbL) is set equal to (x0-1, y0) and the The process of deriving the availability of a given neighborhood block is set equal to (x0, y0). The neighboring positions (xCurr, yCurr) and (xNbL, yNbL) are set equal to the position (xCurr, yCurr) and (xNbL, yNbL). position (xNbY, yNbY), checkPredModeY set to FALSE and It is executed with cIdx and cIdx as inputs, and the output is assigned to availableL. The position (xNbA, yNbA) is set equal to (x0, y0-1) and The process of deriving the availability of a given neighborhood block is set equal to (x0, y0). The position (xCurr, yCurr) is set equal to the neighboring position (xNbA, yNbA). position (xNbY, yNbY), checkPredModeY set to FALSE and It is executed with cIdx and cIdx as inputs, and the output is assigned to availableA.

[0215] [ka]

[0216] 5.6. Embodiment 6 The working draft may be amended as follows: 9.3.2.2 Context Variable Initialization Process

[0217] Table 51 - ctxI for each initializatioType in the initialization process Associating dx with syntax elements

[0218] [Table 43]

[0219] Table 61-mtt_split_cu_vertical_flag ctxInc i nitValue and shiftIdx specifications

[0220] [Table 44]

[0221] 9.3.4.2 Derivation process of ctxTable, ctxIdx, bypassFlag 9.3.4.2.1 General

[0222] Table 131 - ctxInc for syntax elements with context-coded bins allocation

[0223] [Table 45]

[0224] [[9.3.4.2.3 Syntax element mtt_split_cu_vertical_f Derivation process of ctxIncfor of lag The input to this process is the current luma block for the top-left sample of the current picture. Luminance sample in the upper left, dual tree channel type chType and luminance sample The width and height of the current coding block in The variables allow derived in the coding tree semantics in section 7.4.11.4 SplitBtVer, allowSplitBtHor, allowSplitTVe r, allowSplitTHor, allowSplitTHor and allowS It is plit. The output of this operation is ctxInc. The position (xNbL, yNbL) is set equal to (x0-1, y0) and the The process of deriving the availability of a given neighborhood block is set equal to (x0, y0). The neighboring positions (xCurr, yCurr) and (xNbL, yNbL) are set equal to the position (xCurr, yCurr) and (xNbL, yNbL). position (xNbY, yNbY), checkPredModeY set to FALSE and It is executed with cIdx and cIdx as inputs, and the output is assigned to availableL. The position (xNbA, yNbA) is set equal to (x0, y0-1) and The process of deriving the availability of a given neighborhood block is set equal to (x0, y0). The position (xCurr, yCurr) is set equal to the neighboring position (xNbA, yNbA). position (xNbY, yNbY), checkPredModeY set to FALSE and It is executed with cIdx and cIdx as inputs, and the output is assigned to availableA.

[0225] The allocation of ctxInc is specified as follows: -allowSplitBtVer+allowSplitBtHorallowS If it is greater than plitTVer+allowSplitTTHor, ctxInc is 4. is set to. -If not, allowSplitBtVer+allowSplitBtHo If r is less than allowSplitTVer+allowSplitTTHor , ctxInc is set equal to 4. - Otherwise the following applies: The variables dA and dL are derived as follows: dA=cbWidth / (availableA?CbWidth[chType ][xNbA][yNbA]:1) (1563) dL=cbHeight / (availableL?CbHeight[chTy pe][xNbL][yNbL]:1) (1564) - ctxInc is set equal to 0 if any of the following conditions are true: -dA is equal to dL, -availableA is FALSE, -availableL is FALSE. - Otherwise, if dA is less than dL, ctxInc is set equal to 1. can be. Otherwise, ctxInc is set equal to 0.

[0226] 5.7. Seventh embodiment The working draft may be amended as follows: 7.3.10.11 Residual Coding Syntax

[0227] [Table 46]

[0228] [Table 47]

[0229] [Table 48]

[0230] Table 131 - ctxInc for syntax elements with context-coded bins allocation

[0231] [Table 49]

[0232] 5.8. Embodiment 8 The working draft may be amended as follows: 7.3.10.11 Residual Coding Syntax

[0233] [Table 50]

[0234] [Table 51]

[0235] [Table 52]

[0236] Table 131 - ctxInc for syntax elements with context-coded bins allocation

[0237] [Table 53]

[0238] FIG. 12 is an exemplary video processing system in which various techniques disclosed herein may be implemented. 12 is a block diagram illustrating a system 1200. Various implementations may include the components of the system 1200. The system 1200 may include some or all of the video content. The video content may include an input 1202 for , for example, 8 or 10 bit multi-component pixel values, and The input 1202 may be received in a compressed or encoded format. It may represent a network interface, a peripheral bus interface, or a storage interface. Examples of network interfaces are Ethernet, PON (Pass Throughput), Wired interfaces such as LTE Optical Network (LTE), and Wi-Fi (registered trademark) or a wireless interface such as a cellular interface.

[0239] The system 1200 may implement various coding or encoding methods described herein. The coding component 1204 may include a coding component 1204 that may be implemented as a coding component. Component 1204 codes the average bit rate of the video from input 1202. 1204 to generate a coded representation of the video. Therefore, this coding technique is often called video compression or video transcoding. The output of the coding component 1204 is then processed by the coding component 1206. As represented by the arrows, the information may be stored and transmitted via a connected communication. A stored or communicated video bitstream received at input 1202 The (or coded) representation is used by component 1208 to The image may generate pixel values ​​or a displayable image that is sent to the display interface 1210. The process of generating a user-viewable image from a bitstream representation is called video decompression ( In addition, certain video processing operations are sometimes called "coding" operations. or tools, whereas the coding tools or operations consist of an encoder and its corresponding A decoding tool or operation performed by a decoder that reverses the results of the coding It will be understood that.

[0240] An example of a peripheral bus interface or display interface is the Universal Serial Bus (USB). l Serial BUs) or HDMI (High Definition Multimedia Interface) Timedia Interface (registered trademark) or DisplayPort, etc. An example of a storage interface is SATA (Serial Advanced Technology Attachment), PCI, IDE interfaces, etc. The technology described herein may be used in mobile phones, laptops, smartphones, or Various electronic devices, such as other devices capable of digital data processing and / or image display, The present invention may be implemented in a device.

[0241] FIG. 13 is a block diagram of a video processing device 3600. The device 3600 is The device 3600 may be used to implement one or more of the methods described herein. Phones, tablets, computers, IoT (Internet of Things) The apparatus 3600 may be implemented in a single processor, a single receiver, or the like. It may include one or more memories 3604 and video processing hardware 3606 . The one or more processors 3602 may implement one or more of the methods described herein. The one or more memories 3604 may be configured to implement any of the functions described herein. Used to store data and code used to implement the methods and techniques described herein. The video processing hardware 3606 may implement the techniques described herein in hardware. It may also be used to implement the

[0242] FIG. 15 illustrates an example video coding system 100 that may utilize techniques of this disclosure. FIG.

[0243] As shown in FIG. 15 , a video coding system 100 includes a source device 110 and The source device 110 may include a destination device 120. The destination device 1 generates the data and may be referred to as a video coding device. 20 may decode the encoded video data generated by the source device 110. , may be referred to as a video decoding device.

[0244] The source device 110 includes a video source 112, a video encoder 114, and an input / output (I and a USB (USB / O) interface 116.

[0245] The video source 112 may be a source such as a video capture device, a video content provider, or the like. An interface for receiving video data from a video recorder and / or generating video data. a computer graphics system for displaying images of the The video data may include one or more pictures. 114 encodes the video data from the video source 112 to generate a bitstream. A bitstream is a sequence of bits that form a coded representation of video data. The bitstream may contain coded pictures and associated A coded picture may include data that is coded for a picture. The associated data is the sequence parameter set, picture parameter set, The I / O interface 116 may include modulation and demodulation. The encoded video data may include a network device (modem) and / or a transmitter. via the network 130a, and via the I / O interface 116 to the destination device 120. The encoded video data may be sent directly to the destination device 120. For this purpose, the information may be stored in the recording medium / server 130b.

[0246] The destination device 120 includes an I / O interface 126, a video decoder 124, and A display device 122 may also be included.

[0247] The I / O interface 126 may include a receiver and / or a modem. The interface 126 receives the signal from the source device 110 or the storage medium / server 130b. The video decoder 124 may obtain the encoded video data. The display device 122 may then display the decoded video data to the user. The display device 122 may be integrated with the destination device 120 or may be an external display device. The destination device 120 may be external to the destination device 120 that is configured to interface with the good.

[0248] The video encoder 114 and the video decoder 124 are compatible with HEVC (High Efficiency Video Coding). iency Video Coding) standard, VVVM (Versatile Vid Video compression standards, such as the JPEG 2000 (JPEG 2000) standard, and other current and / or future standards. It may operate according to the rank.

[0249] FIG. 16 is a block diagram showing an example of a video encoder 200. 0 may be the video encoder 114 in the system 100 shown in FIG.

[0250] The video encoder 200 may be configured to perform any or all of the techniques of this disclosure. In the example of FIG. 16, the video encoder 200 includes several functional components. The techniques described in this disclosure may be shared among various components of video encoder 200. In some examples, the processor may include any of the techniques described in this disclosure. may be configured to do all of the above.

[0251] The functional components of the video encoder 200 include a division unit 201, a prediction unit 202, a residual generator 203, and a a reconstruction unit 207, a transformation unit 208, a quantization unit 209, an inverse quantization unit 210, an inverse transformation unit 211, 212, a buffer 213, and an entropy coding unit 214. The unit 202 includes a mode selection unit 203, a motion estimation unit 204, a motion compensation unit 205, and an inversion unit 206. The signal processing unit 206 includes a predictor unit 206.

[0252] In other examples, the video encoder 200 may include more, fewer, or different In one example, the predictor 202 may include a functional component that performs IBC (Int The IBC section may contain at least one reference pin. The picture in which the current video block is located is the picture in which prediction is performed in IBC mode. This may be done.

[0253] In addition, some components such as the motion estimator 204 and the motion compensator 205 , may be highly integrated, but are shown separately in the example of FIG. 16 for illustrative purposes. .

[0254] The division unit 201 may divide a picture into one or more video blocks. The video coder 200 and video decoder 300 may support a variety of video block sizes. good.

[0255] The mode selection unit 203 may select, for example, intra or inter control based on the error result. Select one of the available coding modes to determine the resulting intra- or inter-coding The coded block is provided to a residual generator 207 to generate residual block data. A reconstruction unit 21 for reconstructing the decoded blocks for use as reference pictures. In some examples, the mode selector 203 may provide the inter prediction signal and CIIP (Combination of Intra-Prediction) Intra and Inter Prediction mode may be selected. In the case of inter prediction, the mode selection unit 203 selects the resolution of the motion vector for the block ( For example, sub-pixel or integer pixel accuracy may be selected.

[0256] To perform inter prediction on the current video block, the motion estimation unit 204 comparing the current video block with one or more reference frames from the buffer 213; The motion compensation unit 205 may generate motion information for the current video block by: The movement of pictures from buffer 213 other than the picture associated with the current video block. A prediction video block for the current video block is calculated based on the received information and the decoded samples. The check may be determined.

[0257] The motion estimation unit 204 and the motion compensation unit 205 detect that the current video block is an I slice. For example, the current video block is automatically updated based on whether it is a P slice or a B slice. Different actions may be taken on the lock.

[0258] In some examples, the motion estimator 204 may perform a unidirectional prediction for the current video block. The motion estimation unit 204 estimates the current video block by using a link for the reference video block. The motion estimation unit 204 may search for a reference picture in list 0 or list 1. indicating a reference video block and a spatial displacement between the current video block and the reference video block; A reference index indicating a reference picture in list 0 or list 1, including a motion vector. The motion estimation unit 204 may generate a frame including a reference index, a prediction direction indicator, and The motion data and the motion vector may be output as the motion information of the current video block. The compensation unit 205 compensates for the current video block based on the reference video block indicated by the motion information of the current video block. A prediction block of the current block may be generated.

[0259] In another example, the motion estimation unit 204 may bi-directionally predict the current video block; The motion estimation unit 204 selects the reference video blocks for the current video block from list 0. A reference picture may be retrieved from another reference video block for the current video block. For the lock, the reference pictures in list 1 may also be searched. Then, the motion estimator 204 indicates the reference pictures in list 0 and list 1 that contain reference video blocks. indicating a reference index and a spatial displacement between the reference video block and the current video block; The motion estimation unit 204 may generate a motion vector based on the reference image of the current video block. The index and the motion vector may be output as motion information for the current video block. The motion compensation unit 205 performs the motion compensation based on the reference video block indicated by the motion information of the current video block. , a prediction video block for the current video block may be generated.

[0260] In some examples, the motion estimation unit 204 may generate motion information for the decoding process of the decoder. It may output the full set of

[0261] In some examples, the motion estimator 204 may generate a full set of motion information for the current picture. Rather, the motion estimation unit 204 may refer to the motion information of another video block. For example, the motion estimator 204 may signal motion information for the current video block. is that the motion information of the current video block is sufficiently similar to the motion information of the neighboring video blocks. It may be determined that

[0262] In one example, the motion estimator 204 may include a syntactic structure associated with the current video block. In the video data, the current video block has the same motion information as another video block. The values ​​shown in the coder 300 may be indicated.

[0263] In another example, the motion estimator 204 may generate a syntax structure associated with the current video block. In this case, the motion vector difference (MVD) is used to nce) of the current video block. and the motion vector of the indicated video block. The motion vector and the motion vector difference of the selected video block are used to calculate the current video block. A motion vector may be determined.

[0264] As mentioned above, the video encoder 200 may predictively signal motion vectors. Two examples of predictive signaling techniques that may be implemented by video encoder 200 are AM VP (Advanced Motion Vector Prediction) and Includes merge mode signaling.

[0265] The intra prediction unit 206 may perform intra prediction on the current video block. When the intra prediction unit 206 performs intra prediction on the current video block, the intra prediction unit The prediction unit 206 predicts the image based on decoded samples of other video blocks in the same picture. For the current video block, the prediction data may be generated using the The prediction data for may include a predicted video block and various syntax elements.

[0266] The residual generation unit 207 generates a predicted image block of the current image block from the current image block. By subtracting the lock (e.g., indicated by a minus sign), the current Residual data for the current video block may be generated. The residual data for the current video block may be , residual image blocks corresponding to different sample components of the samples in the current image block; It may also include

[0267] In another example, e.g., in skip mode, the residual for the current video block There may be no data, and the residual generator 207 may not need to perform a subtraction operation.

[0268] The transform processor 208 may further include a transform processor 208 for each residual video block associated with the current video block. calculates one or more transformations for the current video block by applying multiple transformations. A coefficient image block may be generated.

[0269] A transform processor 208 generates a transform coefficient video block associated with the current video block. Then, the quantizer 209 calculates one or more quantization coefficients associated with the current video block. Based on the Quantization Parameter (QP) value, The transform coefficient video block associated with the current video block may be quantized.

[0270] The inverse quantization unit 210 and the inverse transform unit 211 perform inverse quantization and inverse transform on the transform coefficient image block. Transforms may be applied respectively to reconstruct the residual video block from the transform coefficient video blocks. The reconstruction unit 212 reconstructs one or more predicted image blocks generated by the prediction unit 202. , and store the reconstructed residual image block in the buffer 213. may generate a reconstructed image block associated with the current block for .

[0271] After the reconstruction unit 212 reconstructs the video block, the video blocking in the video block is To reduce the distortion artifacts, a loop filtering operation may be performed.

[0272] The entropy coding unit 214 receives the entropy from other functional components of the video encoder 200. When the entropy coding unit 214 receives the data, the entropy coding unit 214 The entropy encoder 214 performs one or more entropy encoding operations to obtain the entropy generating encoded data and a bitstream including the entropy encoded data; may be output.

[0273] FIG. 17 is a block diagram showing an example of a video decoder 300. 0 may be the video decoder 114 in the system 100 shown in FIG.

[0274] The video decoder 300 may be configured to perform any or all of the techniques of this disclosure. In the example of FIG. 17, the video decoder 300 includes several functional components: The techniques described in this disclosure are shared among various components of the video decoder 300. In some examples, the processor may be configured to perform any of the techniques described in this disclosure or It may be configured to do all of these.

[0275] In the example of FIG. 17, the video decoder 300 includes an entropy decoding unit 301, a motion compensation unit 302, and a 302, an intra prediction unit 303, an inverse quantization unit 304, an inverse transformation unit 305, and a reconstruction unit 3 306, and a buffer 307. In some examples, the video decoder 300 A decoding pass that is roughly the reverse of the encoding pass described for encoder 200 (FIG. 16) is also performed. good.

[0276] The entropy decoder 301 extracts the encoded bitstream. The resulting bitstream is entropy coded video data (e.g., video data The entropy decoding unit 301 may include an entropy The entropy-coded image data is decoded, and a motion vector is generated from the entropy-decoded image data. The compensation unit 302 receives a motion vector, a motion vector precision, and a reference picture list index. , and other motion information. The motion compensation unit 302 may determine motion information including, for example, AMVP and merge modes may determine such information.

[0277] The motion compensation unit 302 may generate motion compensated blocks, and in some cases, The syntax element specifies the interpolation to be used with sub-pixel accuracy. An identifier for the filter may be included.

[0278] The motion compensation unit 302 is used by the video encoder 200 during the encoding of a video block. Calculate the interpolated values ​​for the sub-integer pixels of the reference block using an interpolation filter such as The motion compensation unit 302 may adjust the motion compensation rate of the video encoder 200 based on the received syntax information. Determine the interpolation filter to be used by You may do so.

[0279] The motion compensation unit 302 calculates the motion of frames and / or slices of an encoded video sequence. Syntax information to determine the size of the blocks used to encode the How each macroblock of a picture in an encoded video sequence is divided partition information describing the partitions, the mode indicating how each partition is encoded, One or more reference frames (and reference frame links) for an encoded block and some other information to decode the encoded video sequence. or may be used.

[0280] The intra prediction unit 303 predicts, for example, an intra prediction model received in a bitstream. A code may be used to form a prediction block from spatially neighboring blocks. The entropy decoding unit 303 is provided to the bitstream and decoded by the entropy decoding unit 301. The inverse transform unit 303 inversely quantizes (e.g., reverse quantizes) the quantized video block coefficients. applies the inverse transformation.

[0281] The reconstruction unit 306 receives the residual block and the motion compensation unit 202 or the intra prediction unit 303. and the corresponding prediction block generated by If desired, the decoded blocks can be flicked to remove block artifacts. A deblocking filter may be applied to filter the decoded image. The blocks are stored in a buffer 307, which is used for subsequent motion compensation / intra-blocking. Provides reference blocks for prediction and is decoded for display on a display device Generate video.

[0282] Next, preferred solutions are listed in some embodiments.

[0283] The following solutions represent exemplary implementations of the techniques discussed in the previous section (eg, item 1).

[0284] 1. A video processing method (e.g., method 1400 shown in FIG. 14) includes: and performing a conversion between the coded representation of the video and the coded representation of the video. The representation conforms to the format rules, and the transformation involves the use of motion vectors or Representation of motion vector differential or motion vector predictor coded with adaptive resolution AMVR (Adaptive Motion Vector Representation) The format is based on the Difference Resolution (DIR) tool. The rule is the coding information of the video block or the blocks adjacent to the video block. By using context modeling that depends on This specifies the use of degrees.

[0285] 2. The coded information includes using intra-block copy mode , the method described in Solution 1.

[0286] 3. The coded information can be in affine AMVR mode or non-affine and non-infinite The methods described in Solution 1, including intrablock copy mode and using bi-predictive or uni-predictive modes, Method of posting.

[0287] 4. The coded information includes the dimensions of the video block, and is The method according to any one of the preceding claims.

[0288] The following solutions represent exemplary implementations of the techniques discussed in the previous section (eg, item 2).

[0289] 5. A method of image processing comprising: This includes performing transformations, where the coded representation conforms to formatting rules and the transformation is a motion vector, motion vector differential, or motion vector predictor for a video block is represented in a coding representation using adaptive resolution (AMVR). tive motion vector difference resolution ) tool, and the formatting rules are based on the precision used by the AMVR tool. Used to code the first and second bins for the degree index The context modeling used allows for the use of adaptive resolution in the coded representation. This specifies the method for expressing usage.

[0290] 6. The format rule specifies that the first bin is used, and the second bin is The method according to solution 5, coded using text.

[0291] 7. The format rules allow non-AFC to represent video blocks in a coded representation. If and only if intra- and non-intra-block copy modes are used, Solution 5 specifies that bins 2 should be coded with the coded representation. How to.

[0292] The following solutions are exemplary embodiments of the techniques discussed in the previous chapter (e.g., items 3 to 8). Shows.

[0293] 8. A method of video processing includes one or more video pictures that include a plurality of video blocks. performing a conversion between the video and a coded representation of the video; The filtered representation is the Adaptive Motion Vector Reconstruction (AMVR) of one or more video blocks. on Vector Difference Resolution) coding The method further comprises: signaling information in accordance with a format rule for signaling information to be transmitted to the first device; The AMVR accuracy index of the first video block coded using the coding mode The second image is coded using the second coding mode. The AMVR precision index bins of the image blocks are coded using the same context. This provision provides for the recording of such information.

[0294] 9. The first coding mode corresponds to an intra block copy mode, and the second coding mode corresponds to an intra block copy mode. The loading mode supports inter-coding, and the bins of the first video block are A The first bin of the MVR precision index and the second image block bin are the corresponding A The method according to solution 8, which is the second bin of the MVR accuracy index.

[0295] 10. The first coding mode corresponds to an intra block copy mode, and the second The coding mode corresponds to inter-coding, and the bins of the first video block are The first bin of the AMVR precision index and the second bin of the image block correspond to The method according to solution 8, which is the first bin of the AMVR accuracy index.

[0296] 11. The first coding mode corresponds to an intra block copy mode, and the second The coding mode corresponds to inter-coding, and the bins of the first video block are The first bin of the AMVR precision index and the second bin of the image block correspond to The method according to solution 8, which is the first bin of the AMVR accuracy index.

[0297] 12. The first coding mode corresponds to an intra block copy mode, and the second The coding mode corresponds to affine coding, and the bins of the first video block are The first bin of the AMVR precision index and the second bin of the image block correspond to The method according to solution 8, which is the first bin of the AMVR accuracy index.

[0298] 13. The format rules are intra-block copy mode, affine mode and in A first video block, a second video block, and Use the same context to code all bins of the third video block. 9. The method of claim 8, further comprising:

[0299] 14. Formatting rules are for intra-block copy mode, affine mode, and A first video block, a second video block, and and a different context for coding the first bin of the third video block, and and the second bins of the first image block, the second image block, and the third image block. Solution 8 further specifies that the same context should be used for coding. How to.

[0300] The following solutions represent exemplary implementations of the techniques discussed in the previous section (eg, item 9).

[0301] 15. The format rule must include at least one One context is for coding a flag indicating the applicability of the AMVR tool. Any of Solutions 1 to 14, further specifying that the context in which The method according to any one of the above.

[0302] The following solutions are exemplary embodiments of the techniques discussed in the previous chapters (e.g., items 10 and 11). show.

[0303] 16. A method of image processing comprising: wherein the image block is transformed into one or more vertical and / or horizontal transforms. or multiple horizontal partitions, and the coded representation is Adhere to formatting rules that govern context-based coding.

[0304] 17. The formatting rules are based on the assumption that the context modeling of the syntax elements that indicate segmentation information is reflected. The number of vertical divisions allowed for an image block and / or the number of vertical divisions allowed for said image block. The method according to solution 16, wherein the number of horizontal splits allowed depends on the number of horizontal splits allowed.

[0305] 18. The format rule specifies the number of vertical divisions allowed for a video block. This depends on whether the number of split horizons allowed for the block is greater than the number of split horizons allowed for the block, as described in Solution 17. Method of posting.

[0306] 19. A formatting rule uses N contexts to code a syntax element. N is based on the size of the image block or the size of a neighboring image block. Preferably, the method according to any of solutions 17 to 18.

[0307] The following solutions represent exemplary implementations of the techniques discussed in the previous section (eg, item 12).

[0308] 20. The format rule includes a flag indicating the applicability of vertical division to a video block. From Solution 16, which specifies the use of a single context for loading 19. A method according to any one of claims 19 to 20.

[0309] The following solutions are exemplary embodiments of the techniques discussed in the previous chapters (e.g., items 13 and 17). show.

[0310] 21. A method of image processing comprising: This includes performing a conversion of the coded representation to conform to the format rules and The formatting rules use context coding or binning to represent the signs of the transform coefficients. The coding criteria used to determine which of the multiple coding methods to use This section stipulates:

[0311] 22. The coding conditions were determined for the remaining allowed context-coded bins. The method according to solution 21, corresponding to the number.

[0312] 23. The coding conditions are used to convert between video blocks and coded representations. The method according to Solution 21 corresponding to the type of conversion used.

[0313] The following solutions represent exemplary implementations of the techniques discussed in the previous section (eg, item 14).

[0314] 24. A method of image processing comprising: linking a video block of an image with a coded representation of the image; The coded representation complies with the format rules, The format rule is for the third or residual coefficient scan pass of the transform skip residual coding process. At the start of the bypass coding of the remaining syntax elements in It specifies that the operation is applied to a variable that specifies the number of bins that are stocoded.

[0315] 25. Solution 1 to 3, where the transformation involves encoding the video into a coded representation. 24. The method according to any one of claims 1 to 3.

[0316] 26. Transformation is the decoding of a coded representation to produce pixel values ​​of an image. 25. The method according to any one of Solutions 1 to 24, comprising:

[0317] 27. A program configured to implement the method according to one or more of solutions 1 to 26. A video decoding device comprising a processor.

[0318] 28. A processor configured to implement the method according to one or more of solutions 1 to 26. A video encoding device comprising a processor.

[0319] 29. A computer program product having computer code stored therein, The code, when executed by a processor, causes the processor to or a computer program product implementing the method according to any one of claims 1 to 10.

[0320] 30. Any method, apparatus or system described herein.

[0321] FIG. 18 illustrates a video processing method 1800 in accordance with one or more embodiments of the present technology. 18 is a flowchart illustrating a method for determining whether a video is a subject of a video capture process according to a rule. The conversion includes performing a conversion between the block and the video bitstream. R(Adaptive Motion Vector Difference Reso The rule is based on the use of block coding modes A first syntax example that specifies a resolution of a motion vector difference associated with an AMVR shift based on Provides for deriving a context selection for the first bin in the element's bin string. do.

[0322] In some embodiments, the block is a coding unit. In the embodiment, the coding mode of the block is affine inter mode, intra mode, It can be either block copy mode or normal inter mode. In the form, multiple contexts corresponding to different coding modes are stored in the first bin. In some embodiments, the multiple contexts may include three contexts. In some embodiments, each coding mode includes a single context. Corresponds to.

[0323] In some embodiments, when a block is coded using IBC mode, If so, the first context for the first bin is assigned to the first value, and IBC mode is enabled. If you do not use it to code a block, you must use at least one A context includes a first video stream for at least one inter-coding mode. In some embodiments, the second context for the first bin is If the block is coded using affine inter mode, 2, the block is assigned to the normal intermode, which is a non-affine intermode. If the third context for the first bin is coded using the The second value and the third value are assigned a value of 3.

[0324] In some embodiments, the context of the second bin in the bin string is the context of the first bin In some embodiments, The second bin in the bin string is coded with a single context value. In an embodiment, the binarization for the first block coded using IBC mode is The first bin of the string of affine inter modes and the normal inter modes, which are non-affine inter modes, are used. The second bin of the bin string for the second block coded using The text is selected.

[0325] In some embodiments, using IBC mode or affine inter mode When coding a block, the string of bins consists of the first bin. If you code a block using the normal inter mode, which is the inter mode, In some embodiments, the string of bins further comprises a second bin. At least one of the multiple contexts applied to a bin has a motion vector differential resolution of Specifies whether it is 1 / 4 of a luma sample or is specified by the first syntax element. The at least one context selected for the second syntax element specifying the In some embodiments, the blocks are coded using IBC mode. In this case, the context for the first syntax element that specifies the resolution of the motion vector differential is The resolution of the vector difference is 1 / 4 of the luma sample or the first syntax element specifies The same as the context selected for the second syntax element that specifies whether In some embodiments, the IBC mode or the affine mode is used to A first syntax example that specifies the resolution of the motion vector differentials when no block is coded. The context for the element is such that the resolution of the motion vector differentials is 1 / 4 of the luma samples. or for a second syntax element that specifies whether it is specified by the first syntax element In some embodiments, the bin string The context for the first bin of The context of the second bin is assigned a value of CtxQ, where CtxM=Ct In some embodiments, a different concentration is present in the second bin compared to the first bin. The context text is selected.

[0326] In some embodiments, when a block is coded in IBC mode, The first context for the first bin and the block is coded using affine mode. The second context for the first bin when the block is in IBC mode The third control for the first bin when coded without using the affine or affine modes. The text is the same. In some embodiments, the block is coded in IBC mode. The first context for the first bin when the block is in IBC mode. The second coding for the first bin when coding without using the affine or affine mode. In some embodiments, the affine mode is used to The third context for the first bin when coding a block is the first context. In some embodiments, the block is an IB The first context for the first bin when coded in C mode and the block The second context for the first bin when the block is coded in affine mode. In some embodiments, the blocks are coded in IBC mode. The context for all bins in the bin string when the block is for all bins in the bin string when coded using the Context and blocks coded without using IBC or affine mode The context for all bins in a bin string is the same.

[0327] In an embodiment of the present invention, the AMVR tool adjusts the resolution of the motion vector difference to a block size. It is a coding tool that adaptively adjusts on a block-by-block basis.

[0328] FIG. 19 is a flow diagram illustrating a video processing method 1900 in accordance with one or more embodiments of the present invention. The method 1900, in operation 1910, determines a current block of the image according to the rule. The rule is to divide the blocks horizontally. The context in which the syntax element is coded that specifies whether the segment is split horizontally or vertically. Select a partition based on the number of vertical divisions allowed and the number of horizontal divisions allowed. The number of vertical divisions allowed is the number of binary divisions allowed. The number of allowed divisions, including the number of allowed ternary vertical divisions. The number of horizon splits is a function of the number of binary horizon splits allowed plus the number of ternary horizon splits allowed. Includes.

[0329] In some embodiments, the block is a coding unit. In an embodiment, the content is divided into a number of allowed vertical divisions and a number of allowed horizontal divisions. In some embodiments, the context is selected by comparing If the number of vertical splits allowed is greater than the number of horizontal splits allowed, the first set of contexts In some embodiments, the context is selected from the allowed vertical splits. If the number is less than the number of allowed split horizons, then a second set of contexts is selected. In some embodiments, the first set of contexts and the second set of contexts Each set of objects includes a single context. The value of a single context in the set of contexts is 4. In the second set of contexts, the value of the single context is 3.

[0330] In some embodiments, the context is the number of vertical splits allowed. If the number of horizontal splits is equal to the number of horizontal splits, a third set of contexts is selected. In an embodiment, the third set of contexts includes a plurality of contexts. In an embodiment, the third set of contexts includes a third context having a value of 0. , a fourth context having a value of 1, and a fifth context having a value of 2. .

[0331] In some embodiments, selecting a context from a third set of contexts (1) The first neighboring block located above the current block and the first neighboring block located to the left of the current block (2) the availability of a second nearby block in which the current block is located; and / or or (3) further based on the size of the neighboring blocks. The text is then moved to the block that is located above the current block, or to the block that is located next to the current block. If any of the blocks in the second neighborhood to the left of the lock are not available, or ( 2) If dA is equal to dL, it is assigned the value of CtxD, and dA is the represents the width of the current block divided by the width of the first neighboring block located at The height of the current block divided by the height of the second neighboring block to the left of the block In some embodiments, the context represents that if dA is less than dL, then Ct xE, where dA is the first neighboring block located above the current block. represents the width of the current block divided by the width of the lock, and dL is to the left of the current block represents the height of the current block divided by the height of the second neighboring block. In, the context is assigned the value of CtxF if dA is greater than dL, where dA is the width of the current block divided by the width of the first neighboring block located above the current block. represents the width of the block, and dL is the height of the second neighboring block to the left of the current block. Represents the current block height divided by the length.

[0332] In some embodiments, a first set of contexts, a second set of contexts The contexts in the first set of contexts, and the third set of contexts are distinct from each other.

[0333] FIG. 20 is a flow diagram illustrating a video processing method 2000 in accordance with one or more embodiments of the present invention. The method 2000, in operation 2010, determines a current block of the image according to the rule. The method includes performing a conversion between the image and the bitstream of the video. The rules are Use or bypass context coding for syntax elements that specify codes The remaining allowed coding used for the current block is It is specified based on the number of text-coded bins or the type of transformation.

[0334] In some embodiments, the remaining allowed context-coded bins is greater than or equal to the threshold, the transform skip residual coding process for the current block is In some implementations, context coding is used for syntax elements. In this case, if the number of remaining allowed context-coded bins is less than a threshold, If not, the transform skip residual coding process for the current block uses the syntax element In some embodiments, the threshold is 0 or 3 It is.

[0335] In some embodiments, the remaining allowed context-coded bins If the number of N is less than or equal to N, bypass coding is used for the syntax element. In an embodiment, the number of remaining permitted context coded bins is equal to or greater than N. In some cases, context coding is used for syntax elements. The number of remaining allowed context-coded bins is the transformation The remaining absolute values ​​of the coefficient levels are then modified to be less than or equal to N before processing. In some embodiments, N is 0, 3, or 4. In some embodiments, N is the number of In some embodiments, the features of the current block are: Sequence parameter set, video parameter set, picture parameter set, picture Header, slice header, tile group header, large coding unit row , group of large coding units, large coding units or code In some embodiments, the current block characteristic includes an indication in the processing unit. contains the size or shape of the current block or a block in the neighborhood of the current block. In some embodiments, the characteristic of the current block is an indication of the color format of the image. In some embodiments, the features of the current block include An indication of whether a dual coding tree structure is used. In the above, the characteristics of the current block include slice type or picture type. In some embodiments, the characteristics of the current block include the number of color components in the image.

[0336] In some embodiments, the context coding of the syntax elements is In some embodiments, the number of context coded bins is based on the number of context coded bins. The variable that specifies the number of remaining allowed context-coded bins is the transformation scheme. The remaining syntax elements in the third or remaining coefficient scan path of the step residual coding process In some embodiments, the variable is modified at the start of raw bypass coding. , is set to a fixed value of 0. In some embodiments, the variable is decremented by 1. In some embodiments, the current block is a block-based differential pulse A transform block or transform sequence that may or may not include a code-modulated block. Includes kip block.

[0337] In some embodiments, the application of the method is determined at the sequence level, pixel level, or pixel level. This can be done at the tile level, slice level or tile group level. In this embodiment, the instructions are a sequence header, a picture header, a sequence parameter set, , video parameter set, decoder parameter set, decoding capability information, picture parameter Included in the slice header or tile group header In some embodiments, whether or how this method is applied may be The decision to do so is based on the coded information in the video.

[0338] In some embodiments, the conversion includes encoding the video into a bitstream. In some embodiments, the conversion includes decoding the video from a bitstream. include.

[0339] As used herein, the term "video processing" refers to video encoding, video decoding, video compression, or For example, a video compression algorithm may convert a pixel representation of an image into a corresponding It may be applied during conversion to a bitstream representation or vice versa. The bitstream representation of a block may be, for example, a bitstream representation of These may correspond to bits that are spread to the same or different locations in the stream. For example, a macroblock can be a large number of blocks in terms of transformed and coded error residual values. using bits in the header and other fields in the bitstream Furthermore, during conversion, the decoder may With the knowledge that some fields may or may not be present based on the Similarly, an encoder may parse the bitstream using a particular syntax field. Determines whether the syntax field should be included or not to be included in or excluded from a coded representation may generate a coded representation accordingly.

[0340] Disclosed and other solutions, examples, embodiments, modules described herein and functional operation implementations include the structures disclosed herein and their structural equivalents. For the purposes of this document, any electronic device manufactured by any means, including digital electronic circuitry, or computer software, firmware, or hardware The present invention may be implemented in a variety of ways, including, but not limited to, hardware, one or more combinations thereof. The disclosed and other embodiments may include one or more computer programs. A product, for example to be implemented by a data processing apparatus or a data processing apparatus A computer program encoded on a computer readable medium for controlling the operation of This computer readable program may be implemented as one or more modules of program instructions. The medium may be a machine-readable storage device, a machine-readable storage substrate, a memory device, a machine-readable propagated signal, or a combination of one or more of these." The term "data processing device" includes, for example, a programmable processor, a computer, or Any device for processing data, including one or more processors or computers This includes equipment, devices, and machines. In addition to the hardware, the equipment includes the The code that creates the execution environment for a program, e.g., processor firmware, protocols stack, database management system, operating system, or any combination of these A propagated signal may contain any code consisting of any combination of any of the following: A signal transmitted by a transmitter, for example a machine-generated electrical, optical, or electromagnetic signal, and transmitted to a suitable receiving device. is generated to encode information for transmission to

[0341] Computer programs (programs, software, software applications) , script, or code) is a language that can be compiled or interpreted. It can be written in any form of programming language, including the Module suitable for use as a standalone program or in any computing environment. It may be deployed in any form, including as a module, component, subroutine, or other unit. A computer program does not necessarily have to be a file in a file system. A program may hold other programs or data. A part of a file (e.g., one or more scripts stored in a markup language document) ) or in a single file dedicated to that program. or multiple coordination files (e.g. one or more modules, subprograms, or The computer program may be stored in a file that contains the program code or a part of the program code. The system can be deployed to run on one computer or on a single site. may be located at one site or distributed across multiple sites and interconnected by a communications network It can be deployed to run on multiple computers connected to the

[0342] The processes and logic flows described herein operate on input data and output Executing one or more computer programs to perform functions by generating The processing and logging can be performed by one or more programmable processors. Gicflow also develops application-specific logic circuits, such as FPGAs (Field Programmable Gate Arrays). grammable gate array) or ASIC (Application Specific Integrated Circuit This can be done by a Specific Integrated Circuit ( ,An apparatus may also be implemented as special purpose logic circuitry.

[0343] Processors suitable for executing a computer program include, for example, general purpose and special purpose microprocessors. and any one or more processors of any kind of digital computer. Typically, a processor is a device that accesses read-only memory or random access memory. It receives instructions and data from a processor, a processor memory, or both. The device includes a processor for executing instructions and one or more memory devices for storing instructions and data. Generally, a computer has one or more memory devices for storing data. may include mass storage devices such as magnetic, magneto-optical, or optical disks. receiving data from or storing data on these mass storage devices However, the computer may be operatively coupled to transmit such It is not necessary to have such a device. Suitable computer readable media include any form of non-volatile memory, media, and This includes, for example, EPROM, EEPROM, flash storage devices, magnetic disks, Disks, such as internal hard disks or removable disks, magneto-optical disks, and Includes semiconductor memory devices such as CD-ROM and DVD-ROM disks. The memory may be supplemented by special purpose logic circuitry, or may be implemented using special purpose logic circuitry. The signal may be incorporated into the clock circuit.

[0344] This patent specification includes many features, which may not be included within the scope of any subject matter or claims. The present invention should not be construed as limiting the scope of the present invention, but rather as being specific to particular embodiments of particular technologies. The description of the possible features of the present invention should be interpreted as a description of the possible features of the present invention. Certain features described in the context may be implemented in combination in one example. Conversely, various features that are described in the context of one example may also be used in multiple embodiments. Further, the features may be implemented separately or in any suitable subcombination. The compounds described above as acting in specific combinations and initially claimed as such However, one or more features from a claimed combination may, in some cases, be combined. The claimed combination may be extracted from the combination, and the claimed combination may be a subcombination or may be directed to subcombination variations.

[0345] Similarly, although operations may be shown in a particular order in the figures, this is not intended to be limiting as to how the desired results are achieved. that such actions be performed in the particular order or sequence shown, in order to It should not be construed as requiring that all acts shown be performed. Also, the distribution of the various system components in the embodiments described in this patent specification Isolation should not be understood to require such isolation in all embodiments. stomach.

[0346] Only a few implementations and examples are described and illustrated in this patent document. Other embodiments, extensions, and variations are possible based on the disclosed content.

Claims

1. 1. A method of image processing, comprising: Performing conversion between blocks of an image and a bitstream of said image according to rules To do so, having The conversion is performed using AMVR (Adaptive Motion Vector Diff Based on the Confidence Resolution tool, The rule defines the resolution of the motion vector differential associated with an AMVR shift. A context selection for a first bin of a string of bins of a first syntax element that specifies The method provides that the coding mode is derived based on the use of the coding mode for the block. 。

2. The method of claim 1 , wherein the block is a coding unit.

3. The coding mode for the block is an affine inter mode, an intra mode, Block copy mode and normal inter mode, which is a non-affine inter mode The method according to claim 1 or 2, wherein the method is one of:

4. A plurality of contexts corresponding to different coding modes are applicable to the first bin. The method according to any one of claims 1 to 3,

5. The method of claim 4 , wherein the plurality of contexts includes three contexts.

6. The method of claim 4 , wherein each coding mode corresponds to a single context.

7. If the block is coded using the IBC mode, then the first bin A first context for the If the block is not coded using the IBC mode, the first control At least one context different from the text is at least one inter-coded 7. The method according to claim 1, wherein the first bin is applicable to a binning mode. The method described above.

8. If the block is coded using an affine inter mode, the first A second context for the bin is assigned to a second value; The block is coded using a normal inter mode, which is a non-affine inter mode. If so, the third context for the first bin is assigned a third value. And 8. The method according to claim 1, wherein the second value and the third value are different from each other. The method described above.

9. The context of the second bin in the bin string is used for the first bin. The method according to any one of claims 1 to 8, wherein the one or more contexts are the same. 。

10. a second bin of the string of bins is coded with a single context value; 10. The method according to any one of claims 1 to 9.

11. The same context is used for the first block coded using IBC mode. The first bin of the string of bins for which the bins are non-affine inter-mode The character of the bin for the second block coded using the usual inter mode. The method of claim 10 wherein a second bin of a column is selected.

12. The block is coded using IBC mode or affine inter mode. the string of bins consists of the first bin, The block is coded using a normal inter mode, which is a non-affine inter mode.

12. The method of claim 1, wherein the string of bins further includes a second bin when the string of bins is assigned to a second bin.

2. The method according to any one of claims 1 to 11.

13. At least one of the plurality of contexts applicable to the first bin is , the resolution of the motion vector differentials is ¼ of a luma sample, or At least one syntax element is selected for a second syntax element that specifies The method according to claim 4 , wherein both are the same as one context.

14. If the block is coded using the IBC mode, the motion vector The context for the first syntax element that defines the resolution of the difference is The resolution of vector difference is ¼ of a luma sample, or the first syntax element The context selected for the second syntax element that defines whether the context is defined by the The method of claim 13, wherein the method is the same as the method of claim 13.

15. The block is coded using the IBC mode or the affine mode. If not, a previous syntax element for the first syntax element that defines the resolution of the motion vector differential is The context is whether the resolution of the motion vector differential is 1 / 4 of a luma sample. or the second syntax element that is defined by the first syntax element The method of claim 13 , wherein the selected context is the same as the selected context.

16. The context for the first bin of the bin string is assigned a value of CtxM. It was hit, The context for the second bin of the bin string is assigned the value of CtxQ. And 16. The method of claim 14 or 15, wherein CtxM=CtxQ.

17. A different context is selected for the second bin compared to the first bin. The method according to claim 16.

18. for the first bin when the block is coded in the IBC mode a first context in which the block is coded using the affine mode; a second context for the first bin when the block is in the IBC the first mode and the affine mode when coded without using either the first mode or the affine mode The method of claim 4 , wherein the third contexts for the bins of are the same.

19. for the first bin when the block is coded in the IBC mode a first context in which the block is in the IBC mode and the affine mode; The second content for the first bin when coded without any of the The method of claim 4, wherein the chrysalis is the same.

20. The first bin when the block is coded using the affine mode The third context for the first context and the second context The method of claim 19, which is different from

21. for the first bin when the block is coded in the IBC mode a first context and the block is coded using the affine mode; 5. The method of claim 4, wherein the second context for the first bin in each case is the same. 。

22. The sequence of all bins when the block is coded in the IBC mode The context for all bins, the block is coded using the affine mode. the context for every bin of the string of bins when the bins are matched, and When coding is performed without using either the IBC mode or the affine mode, 5. The method of claim 4, wherein the context for all bins of the string of bins is the same. Law.

23. The AMVR tool adaptively adjusts the resolution of the motion vector differentials on a block-by-block basis.

23. The method of claim 1, wherein the coding tool is a coding tool that is adapted to execute the coding process.

24. The conversion includes encoding the video into the bitstream.

24. The method according to any one of claims 23.

25. The conversion includes decoding the video from the bitstream.

24. The method according to any one of claims 23.

26. 1. A method for storing a video bitstream, comprising: generating a bitstream of said video from blocks of said video according to a rule; having The generating step is carried out by using a resolution of the motion vector difference to generate the motion vector difference. AMVR (Adaptive Motion Vector) represented in the bitstream or Difference Resolution), The rule defines the resolution of the motion vector differential associated with an AMVR shift. A context selection for a first bin of a string of bins of a first syntax element that specifies The method provides that the coding mode is derived based on the use of the coding mode for the block. 。

27. A program configured to implement the method according to one or more of claims 1 to 26. A video decoding device having a processor.

28. A program configured to implement the method according to one or more of claims 1 to 26. A video encoding device having a processor.

29. 1. A computer program product having computer code stored thereon, comprising: When the code is executed by a processor, the processor is caused to 7. A computer program product adapted to carry out the method according to any one of claims 6 to 6.

30. A video bitstream generated by the method performed by a video processing device is stored. A non-transitory computer-readable recording medium storing: The method comprises: generating a bitstream of said video from blocks of said video according to a rule; and, storing the bitstream on a non-transitory computer readable recording medium; having The generating step is carried out by using a resolution of the motion vector difference to generate the motion vector difference. AMVR (Adaptive Motion Vector) represented in the bitstream or Difference Resolution), The rule defines the resolution of the motion vector differential associated with an AMVR shift. A context selection for a first bin of a string of bins of a first syntax element that specifies The non-uniform A temporary computer readable recording medium.

31. Any method, apparatus, or system described herein.

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