Semiconductor device

Abstract

To manufacture a highly reliable display device by using a thin film transistor having favorable electric characteristics and high reliability as a switching element.SOLUTION: In a bottom gate thin film transistor using an amorphous oxide semiconductor, an oxide conductive layer having a crystal region is formed between an oxide semiconductor layer which has been dehydrated or dehydrogenated by heat treatment and each of a source electrode layer and a drain electrode layer which are formed using metal material. Accordingly, contact resistance between the oxide semiconductor layer and each of the source electrode layer and the drain electrode layer can be reduced; thus, a thin film transistor having favorable electrical characteristics and a highly reliable display device using the thin film transistor can be provided.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a display device using an oxide semiconductor. [Background technology]

[0002] In recent years, semiconductor thin films (thickness of several to several hundred nm) formed on substrates with insulating surfaces have been used The technology of constructing thin film transistors (TFTs) is attracting attention. It is widely used in electronic devices such as C and electro-optical devices, especially in switching of image display devices. Metal oxides exist in a wide variety of forms and are used for a wide range of purposes. Indium oxide is a well-known material that is needed for applications such as liquid crystal displays. It is used as a transparent electrode material.

[0003] Some metal oxides exhibit semiconducting properties. Metal oxides that exhibit semiconducting properties include Examples of such oxides include tungsten oxide, tin oxide, indium oxide, and zinc oxide. Thin film transistors that use metal oxides with such semiconducting properties as the channel formation region are already known. (Patent Document 1 and Patent Document 2).

[0004] In addition, thin film transistors using amorphous oxide semiconductors have a relatively low field effect as amorphous materials. Therefore, the thin film transistor can be used to configure a driver circuit for a display device or the like. It can also be done. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2007-123861 A [Patent Document 2] JP 2007-96055 A Summary of the Invention [Problem to be solved by the invention]

[0006] In display devices, the pixel section (also called the pixel circuit) and the driver circuit section are formed on the same substrate. In this case, the transistors used in the pixel portion are required to have excellent switching characteristics, e.g., a high on-off ratio. The transistors used in the driver circuit section are required to operate at high speed.

[0007] In particular, the higher the pixel density of the display device, the shorter the time it takes to write a display image. It is preferable that the transistors used in the portion operate at high speed.

[0008] One embodiment of the present invention disclosed in this specification is a transistor that solves the above-described problems and a method for manufacturing the same. The present invention relates to a display device including a monitor. [Means for solving the problem]

[0009] One embodiment of the present invention disclosed in this specification is a semiconductor device including an oxide conductive layer in a source region and a drain region. The transistor has a semiconductor layer formed using an oxide semiconductor. The driver circuit section, which includes a transistor, and the display section (also called the pixel section) are mounted on the same substrate. The display device thus formed is shown in FIG.

[0010] One embodiment of the present invention disclosed in this specification is a gate electrode layer and a gate insulating layer on the gate electrode layer. an oxide semiconductor layer on the gate insulating layer; and a portion of the oxide semiconductor layer on the gate insulating layer. An oxide conductive layer is overlapped, a source electrode layer and a drain electrode layer are formed on the oxide conductive layer, and an oxide semiconductor layer is formed on the oxide conductive layer. and an oxide insulating layer in contact with the conductor layer, the oxide conductive layer having a crystalline region. It is a transistor that

[0011] Another embodiment of the present invention disclosed in this specification is a gate electrode layer and a gate insulating film formed on the gate electrode layer. A gate insulating layer, a source electrode layer and a drain electrode layer on the gate insulating layer, and a source electrode layer and a drain electrode layer on the gate insulating layer. An oxide conductive layer is provided on the drain electrode layer, and a gate insulating layer is provided on the gate insulating layer. The oxide conductive layer is a bonding layer. The transistor is characterized by having a crystalline region.

[0012] In the above structure, the source electrode layer and the drain electrode layer of the transistor are made of Al, Cr, C A film mainly composed of a metal element selected from U, Ta, Ti, Mo, and W, or an alloy of these elements. The source electrode layer and the drain electrode layer may be formed of a film containing the above-mentioned element. The present invention is not limited to a single layer, but may use a stack of different films.

[0013] Between each of the source electrode layer and the drain electrode layer of the transistor, an oxide semiconductor layer is provided. By forming a conductive layer made of a carbide, the contact resistance can be reduced, enabling the production of transistors that can operate at high speed. The oxide conductive layer can be formed of indium oxide, an alloy of indium oxide and tin oxide, , Indium oxide zinc oxide alloy, Zinc oxide, Zinc aluminum oxide, Zinc aluminum oxynitride For example, a material having a crystalline region such as zinc oxide or zinc gallium oxide can be used.

[0014] In the above structure, the oxide insulating layer functions as a channel protection layer of the transistor. The oxide insulating layer may be formed of silicon oxide, silicon nitride oxide, or aluminum oxide by a sputtering method. For example, aluminum oxide nitride or aluminum oxynitride can be used.

[0015] In addition, a driver circuit portion and a display portion (both pixel portion and (hereinafter referred to as "electroluminescence") is formed on the same substrate, and a display is produced using an EL element, a liquid crystal element, an electrophoretic element, or the like. A device can be fabricated.

[0016] Another embodiment of the present invention disclosed in this specification is a pixel portion having a transistor and a pixel region having a pixel electrode formed on the same substrate. The transistor has a gate electrode layer on a substrate and a gate electrode layer on the gate electrode layer. An insulating layer, an oxide semiconductor layer on the gate insulating layer, and a gate insulating layer on the oxide semiconductor layer. a source electrode layer and a drain electrode layer over the oxide conductive layer; an oxide insulating layer in contact with the oxide semiconductor layer, the oxide conductive layer having a crystalline region; The display device is characterized by the above.

[0017] Another embodiment of the present invention disclosed in this specification is a pixel having a transistor over the same substrate. The transistor has a gate electrode layer on a substrate and a driver circuit portion. A gate insulating layer, a source electrode layer and a drain electrode layer on the gate insulating layer, and a gate insulating layer having a gate insulating layer and a gate insulating layer overlapping a part of the oxide conductive layer. an oxide semiconductor layer having a conductive film and an oxide insulating layer in contact with the oxide semiconductor layer; The display device is characterized by having a crystalline region.

[0018] In the display device according to one embodiment of the present invention, a plurality of transistors are provided in a pixel portion. In the case of a transistor, the gate electrode of a transistor and the source wiring or drain of another transistor are In addition, the display device according to one embodiment of the present invention includes a driver circuit. In the portion, the gate electrode of the transistor and the source wiring or drain of the transistor are The connector has a portion for connecting wiring.

[0019] In addition, since transistors are easily damaged by static electricity, etc., On the other hand, it is preferable to provide a protection circuit for protecting the transistors in the pixel portion on the same substrate. The protection circuit is preferably formed using a nonlinear element using an oxide semiconductor layer. stomach. Effect of the Invention

[0020] An oxide semiconductor layer having a crystal region between the source electrode layer and the drain electrode layer and between the oxide semiconductor layer and the By using a nitride conductive layer, a transistor with good electrical characteristics and high reliability is manufactured. It is possible. [Brief description of the drawings]

[0021] [Figure 1] 1A to 1C are cross-sectional process diagrams of a transistor according to one embodiment of the present invention. [Diagram 2] 1A to 1C are cross-sectional process diagrams of a transistor according to one embodiment of the present invention. [Diagram 3] 1A to 1C are cross-sectional process diagrams of a transistor according to one embodiment of the present invention. [Figure 4] 1 is a cross-sectional view of a display device according to one embodiment of the present invention. [Diagram 5] 1 is a cross-sectional view of a display device according to one embodiment of the present invention. [Figure 6] 1A and 1B are a plan view and a cross-sectional view illustrating a display device. [Figure 7] 1A and 1B are a plan view and a cross-sectional view illustrating a display device. [Figure 8] FIG. [Figure 9] FIG. [Figure 10] FIG. [Figure 11] TDS spectrum of moisture. [Figure 12] TDS spectrum of H. [Figure 13] TDS spectrum of O. [Figure 14] TDS spectrum of OH. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0022] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following description, and various modifications in form and details are possible by those skilled in the art. The present invention is not limited to the description of the following embodiments. In the drawings in this specification, parts having the same parts or similar functions are The same reference numerals will be used to denote the same parts, and their explanations may be omitted.

[0023] (Embodiment 1) In this embodiment mode, a thin film transistor and a manufacturing method thereof will be described.

[0024] FIG. 1E shows a thin film transistor 440 having a bottom gate structure called a channel etch type. A cross-sectional view is shown.

[0025] The thin film transistor 440 includes a gate electrode layer 421a, A gate insulating layer 402, an oxide semiconductor layer having a channel formation region 443, a source electrode layer 4 The channel formation region 443, the oxide Over the conductive layers 446a and 446b, the source electrode layer 445a, and the drain electrode layer 445b, An insulating layer 427 and a protective insulating layer 428 are provided.

[0026] In addition, the first region 444c and the second region 444 d is provided to create an oxygen excess state similar to that of the channel formation region 443, thereby reducing leakage current and It may also have a function of reducing raw capacitance.

[0027] The ordinal numbers such as 1st and 2nd are used for convenience and do not indicate the order of steps or stacking. In addition, the present specification does not refer to a specific name as a matter for identifying the invention. This does not indicate a title.

[0028] Here, the oxide conductive layers 446a and 446b are made of a material having a high conductivity and a crystalline region. At the same time, the oxide semiconductor layer is provided between the source electrode layer 445a and the drain electrode layer 445b. The contact resistance can be reduced, and a thin film transistor capable of high-speed operation can be realized.

[0029] Hereinafter, the thin film transistor 440 will be described with reference to FIGS. The manufacturing process will be described.

[0030] First, a conductive film is formed on a substrate 400 having an insulating surface, and then a first photolithography process is performed. A gate electrode layer 421a is formed through a process.

[0031] The resist mask used in the photolithography process may be formed by an inkjet method. The inkjet method does not require a photomask, which reduces manufacturing costs. This can be done.

[0032] The conductive film forming the gate electrode layer 421a is selected from the group consisting of Al, Cr, Ta, Ti, Mo, and W. An element selected from the above, or an alloy containing the above elements, or a product of a combination of the above elements A layer film, etc. may be used. Metal oxides, etc. may also be used.

[0033] The substrate 400 may be, for example, aluminosilicate glass, aluminoborosilicate glass, A glass substrate such as barium borosilicate glass can be used. When the temperature is high, it is advisable to use a material with a strain point of 730°C or higher.

[0034] Instead of the above glass substrate, an insulating substrate such as a ceramic substrate, a quartz substrate, or a sapphire substrate may be used. A substrate made of an insulating material may also be used.

[0035] Although not shown, an insulating layer serving as a base film is provided between the substrate 400 and the gate electrode layer 421a. The base film has a function of preventing diffusion of impurity elements from the substrate 400. A single layer structure of a film selected from a silicon nitride film, a silicon oxide film, a silicon nitride oxide film, and a silicon oxynitride film. Alternatively, the insulating film may be formed by laminating a plurality of the above-mentioned films.

[0036] Next, the gate insulating layer 402 is formed over the gate electrode layer 421a.

[0037] The gate insulating layer 402 may be a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, or a silicon nitride oxide layer. A light-transmitting insulating film such as a layer can be used, and a plasma CVD method, a sputtering method, etc. can be used. The gate insulating layer 402 is not limited to a single layer of the insulating film, but may be a stack of different films. For example, a plasma is formed using silane (SiH4), oxygen and nitrogen as deposition gases. A silicon oxynitride film can be formed by the CVD method. In the case of a multilayer structure, the thickness is, for example, 50 nm to 20 nm. A first gate insulating layer having a thickness of 5 nm or more and a thickness of 30 nm or less is formed on the first gate insulating layer. A second gate insulating layer having a thickness of 0 nm or less is formed.

[0038] In this embodiment, a silicon oxynitride layer (SiON (composition ratio N < O)) with a film thickness of 100 nm formed by plasma CVD method is used for the gate insulating layer 402.

[0039] Next, an oxide semiconductor film with a film thickness of 5 nm or more and 200 nm or less, preferably 10 nm or more and 20 nm or less, is formed on the gate insulating layer 402 by sputtering method (see Fig. 1(A)). Even if a heat treatment for dehydration or dehydrogenation is performed after the formation of the oxide semiconductor film, it is preferable to make the film thickness as thin as 50 nm or less in order to keep the oxide semiconductor film in an amorphous state. By making the film thickness of the oxide semiconductor film thin, crystallization can be suppressed when heat treatment is performed after the formation of the oxide semiconductor layer.

[0040] As the oxide semiconductor film, an In-Sn-Ga-Zn-O-based quaternary metal oxide, an In-Ga-Zn-O-based ternary metal oxide, an In-Sn-Zn-O-based ternary metal oxide, an In-Al-Zn-O-based ternary metal oxide, a Sn-Ga-Zn-O-based ternary metal oxide, an Al-Ga-Zn-O-based ternary metal oxide, a Sn-Al-Zn-O-based ternary metal oxide, a binary metal oxide such as In-Zn-O-based, Sn-Zn-O-based, Al-Zn-O-based, Zn-Mg-O-based, Sn-Mg-O-based, In-Mg-O-based, an In-O-based, a Sn-O-based, a Zn-O-based oxide semiconductor film can be used. Further, the oxide semiconductor film may contain SiO2.

[0041] Also, as the oxide semiconductor film, a thin film represented by InMO3(ZnO) (m > 0) can be used. m Here, M represents one or more metal elements selected from Ga, Al, Mn, and Co. For example, as M, Ga, Ga and Al, Ga and Mn, or Ga and Co, etc. InMO3(ZnO) m An oxide semiconductor film having a structure represented by (m>0) Among them, the oxide semiconductor having a structure containing Ga as M is the In-Ga-Zn-O oxide described above. In this paper, we refer to these thin films as In-Ga-Zn-O semiconductors, and the thin films of these semiconductors are also referred to as In-Ga-Zn-O films.

[0042] In this embodiment, as the oxide semiconductor film, a ZnO-based oxide semiconductor film forming method is used. Using the target, a 15 nm thick In-Ga-Zn-O film was formed by sputtering. do.

[0043] The In-Ga-Zn-O film is produced by using an In-Ga-Zn-O oxide semiconductor target (In2 O3:Ga2O3:ZnO=1:1:1 [molar ratio] (i.e., In:Ga:Zn= The atom ratio was 1:1:0.5, and the distance between the substrate and the target was 100 mm. , pressure 0.6 Pa, direct current (DC) power 0.5 kW, oxygen (oxygen flow rate 100%) atmosphere In addition, the film can be formed at a ratio of In:Ga:Zn=1:1:1 [atom ratio]. ] or a target with a composition ratio of In:Ga:Zn=1:1:2 [atomic ratio] The filling rate of these targets is 90% or more and 100% or less, preferably 95% or more. The upper limit is 99.9%. By using a metal oxide target with a high filling rate, The oxide semiconductor film thus obtained becomes a dense film.

[0044] The sputtering method uses a high-frequency power supply as the sputtering power source, while the RF sputtering method uses a DC power supply. There are two types of sputtering: DC sputtering and pulsed DC sputtering, which uses a pulsed bias. The sputtering method is mainly used to deposit insulating layers, while the DC sputtering method is mainly used to deposit metal films. It is used when:

[0045] There are also multi-target sputtering devices that can accommodate multiple targets of different materials. The equipment can deposit layers of different materials in the same chamber, or multiple types of The above materials can be discharged simultaneously to form a film.

[0046] In addition, the target material and the sputtering gas components are chemically reacted during the film formation to form a compound thin film. The reactive sputtering method forms a thin film, and the bias sputtering method applies a voltage to the substrate during film formation. There are also other methods such as the TA method.

[0047] Note that before the oxide semiconductor film is formed by a sputtering method, argon gas is introduced to the plasma Reverse sputtering is performed to generate ions, and dust adhering to the surface of the gate insulating layer 402 is removed. In reverse sputtering, the target is sputtered in an argon atmosphere without applying a voltage to the target. A voltage is applied to the substrate side using an RF power source under atmospheric pressure, and ionized argon is bombarded onto the substrate. This is a method to modify the surface by using nitrogen, helium, oxygen, etc. instead of argon. This is also fine.

[0048] In addition, before the formation of the oxide semiconductor film, an inert gas atmosphere (nitrogen, helium, neon, or Heat treatment (400°C or higher but below the distortion point of the substrate) is performed under argon, etc., and gate insulation is performed. Impurities such as hydrogen and water contained within layer 402 may be removed.

[0049] Next, the oxide semiconductor film is subjected to a second photolithography process to form an island-shaped oxide semiconductor layer 4. 1B). In order to form the island-shaped oxide semiconductor layer 404, The resist mask may be formed by an ink-jet method. As a result, the manufacturing cost can be reduced.

[0050] Next, the oxide semiconductor layer 404 is dehydrated or dehydrogenated. The first heat treatment for the oxidation is carried out in an electric furnace or the like using nitrogen or a rare gas (helium, neon, In an inert gas atmosphere such as argon, the substrate is heated at 400°C or higher and lower than the strain point of the substrate, preferably at 425°C or higher. If the temperature is 425°C or higher, the heat treatment time can be 1 hour or less. If the temperature is below 1 hour, the heating time should be longer than 1 hour. The method is RTA (Rapid Thermal Analysis) using high-temperature inert gas and light at 650℃ for about 3 minutes. If the RTA method is used, dehydration can be completed in a short time. Since hydrogenation or dehydrogenation can be performed, processing can be performed at temperatures exceeding the strain point of the glass substrate. do.

[0051] In this specification, the heat treatment in an inert gas atmosphere such as nitrogen or a rare gas is referred to as dehydration. In this specification, only the desorption of H2 is referred to as dehydrogenation. This does not necessarily mean that the removal of H, OH, etc. is also included in the term dehydration or dehydrogenation. Let us assume that.

[0052] The oxide semiconductor layer that has been dehydrated or dehydrogenated is not exposed to the air and is then cooled to room temperature. It is important not to reintroduce hydrogen into the i-type oxide semiconductor by dehydration or dehydrogenation. Conductor layer is made n-type (n - , n + After the resistance is reduced, the resistance is increased again as an i-type. The transistor using the oxide semiconductor layer has a positive threshold voltage. The transistors used in display devices have a gate voltage of 0 V. It is preferable that the channel is formed with a positive threshold voltage as close as possible to the active matrix. In this type of display device, the electrical characteristics of the transistors that make up the circuits are important. The electrical characteristics of a display device affect its performance, and the threshold voltage of a transistor is particularly important. If the threshold voltage of a transistor is negative, the source and drain electrodes are in a negative state even when the gate voltage is 0V. A current flows between the gate electrodes, which is called a normally-on characteristic. It becomes difficult to control the circuit. Also, even if the threshold voltage is positive, its absolute value is In the case of expensive transistors, the driving voltage is insufficient and switching operation itself is not possible. In the case of an n-channel transistor, a positive voltage should not be applied to the gate. It is desirable for the transistor to have a channel formed first and for the drain current to start flowing. There are transistors that do not form a channel unless the driving voltage is high, and transistors that form a channel even under negative voltage conditions. A transistor in which a channel is formed and a drain current flows is a transistor used in a circuit. It is not suitable for this purpose.

[0053] The atmosphere during the temperature drop from the temperature at which dehydration or dehydrogenation was performed is the same as that during the temperature rise or heat treatment. For example, the atmosphere may be changed to a different atmosphere from that used when dehydration or dehydrogenation was performed. In the same furnace, high-purity oxygen gas, N2O gas, or ultra-high-purity gas are used without exposure to the atmosphere. Cooling can be achieved by filling the tank with dry air (dew point below -40°C, preferably below -60°C). can.

[0054] In the first heat treatment, nitrogen or a rare gas such as helium, neon, or argon is used. It is preferable that the nitrogen introduced into the heat treatment device does not contain water or hydrogen. Or the purity of rare gases such as helium, neon, and argon is 6N (99.9999%) or more. , and preferably 7N (99.99999%) or more.

[0055] When the heat treatment is performed in an inert gas atmosphere, the i-type oxide semiconductor layer becomes Heat treatment causes oxygen deficiency and makes it n-type (n - After that, the oxide By forming an oxide insulating layer in contact with the oxide semiconductor layer, the oxide semiconductor layer is prevented from being exposed to oxygen excess. This can be said to make the material highly resistive, i.e. i-type. This results in improved electrical properties. Good and reliable thin film transistors can be fabricated.

[0056] The oxide semiconductor layer that has been sufficiently dehydrated or dehydrogenated under the above conditions is analyzed by thermal desorption spectrometry. (TDS: Thermal Desorption Spectroscopy) 45 Even when the temperature was raised to 0°C, two peaks were observed in the spectrum indicating the desorption of moisture, and at least 250-3 One peak that appears near 00°C is not detected.

[0057] Thermal desorption spectroscopy was performed on multiple samples with different heat treatment temperatures under a nitrogen atmosphere. The results of analyzing the moisture content of the sample using the method are shown in FIG.

[0058] Thermal desorption spectrometry is a method for analyzing gas components that are desorbed and generated from a sample while the sample is heated and heated in a high vacuum. This method detects and identifies gases that desorb from the surface and interior of a sample using a quadrupole mass spectrometer. and molecules can be observed. 1000S) was used, and the measurement conditions were a temperature rise of about 10°C / min and a 1×10-8 Measured from (Pa) Start the measurement and keep it at about 1×10 -7 The vacuum level was set to (Pa).

[0059] Figure 11 shows the In-Ga-Zn-O system film with a thickness of 50 nm on a glass substrate. as-depo), 250℃ 1 hour, 350℃ 1 hour, 350℃ 10 hours, 450℃ 1 hour We prepared samples that were treated between the time and the time of the heating, and a sample of the glass substrate alone (unheated), and measured the moisture content. 11 is a graph comparing the TDS measurement results. From the results of FIG. 11, the heating temperature in the nitrogen atmosphere The higher the temperature, the less moisture is desorbed from the In-Ga-Zn-O film. In the heated sample, the spectrum showing the desorption of moisture shows a peak between 200℃ and 350℃. It can be seen that no peaks were observed.

[0060] The spectrum showing the moisture desorbed from the In-Ga-Zn-O system film at high temperatures of 200°C or higher. There are two peaks: the first peak appears between 200°C and 250°C, and the second peak appears between 250°C and 350°C. The first peak appears between 200℃ and 250℃. The difference is unclear except for the sample heat-treated at 250℃, but there are two differences in the as-depo sample. This is because the peaks overlap, resulting in a spectrum that appears to have a single peak. In addition, in the sample heat-treated at 350°C, moisture was released to some extent, and the first peak This is because the peaks in the spectra have almost disappeared. This can also be seen from the symmetry and the shift in the peak position towards higher temperatures.

[0061] The vertical axis of the graph in FIG. 11 is in arbitrary units, and the presence or absence of desorbed gas is viewed relatively. The shape of this spectrum is similar for heat treatment, regardless of the area or volume of the object being measured. Since it shows changes in the That is, the effectiveness of the peak in the temperature range of 200 to 350°C can be effectively achieved. By checking for non-existence, it is possible to check the history to see whether or not the appropriate process was carried out.

[0062] The samples that were heat-treated at 450°C in a nitrogen atmosphere were then left in the air at room temperature for one week. Even after leaving it for about a few hours, no moisture was observed to desorb at temperatures above 200°C. It has been found that Ga-Zn-O based films are stable.

[0063] In addition, the samples were heated under the same conditions as the samples used to measure moisture desorption, and the temperature-programmed desorption gas fraction was measured. In addition to H2O, H, O, OH, H2, O2, N, N2, and Ar were detected by the analysis method. Measurements were performed on H, O, and OH, and the spectra indicating their respective desorption were Figure 12 shows the TDS spectrum of H, Figure 13 shows the TDS spectrum of O, Figure 14 shows the TDS spectrum of OH. Each spectrum is for the glass substrate alone (unheated). The results of the measurements of oxygen in a nitrogen atmosphere under the above heating conditions are also included for comparison. The concentration is below 20 ppm.

[0064] The spectra showing the desorption of H, O, and OH are almost identical to the spectrum showing the desorption of water. In the sample heated to 450°C, the desorption kinetics that appeared around 250 to 300°C were observed. It can be seen that no peaks indicating any separate components were observed.

[0065] From the above results, it is possible to reduce moisture, H, and O by heat treatment of the In-Ga-Zn-O film. The desorption of H, O, and OH is similar to the desorption of water. Since the results show a similar tendency, most of the water molecules are derived from the do.

[0066] In this embodiment, the substrate is introduced into an electric furnace, which is one of the heat treatment devices, and an oxide semiconductor is formed on the substrate. After the layer was heat-treated in a nitrogen atmosphere, the oxide layer was removed without contact with the air. The re-incorporation of water or hydrogen into the semiconductor layer is prevented, and an oxide semiconductor layer is obtained. From the heating temperature T at which dehydration or dehydrogenation occurs, the temperature is increased to a temperature sufficient to prevent water from re-entering the mixture. The same furnace is used, and the temperature is gradually cooled in a nitrogen atmosphere until it drops by 100°C or more below the heating temperature T. The atmosphere is not limited to nitrogen, and may be a rare gas atmosphere such as helium, neon, or argon. Dehydration or dehydrogenation is carried out in the

[0067] Depending on the conditions of the first heat treatment or the material of the oxide semiconductor layer, After the first heat treatment, the oxide becomes oxygen-deficient and has low resistance. The oxide semiconductor layer 404 is formed (see FIG. 1B). After the first heat treatment, The carrier concentration is higher than that of the semiconductor film, preferably 1×10 18 / cm 3 More than The oxide semiconductor layer 404 has an amorphous state. However, the oxide semiconductor layer may be partially crystallized. Even if a part of the material is crystallized, it is still referred to as amorphous.

[0068] Depending on the conditions of the first heat treatment or the material of the gate electrode layer 421a, the gate voltage The electrode layer 421a may crystallize to become a microcrystalline film or a polycrystalline film. When an indium oxide tin oxide alloy film is used as the electrode layer 421a, the first heating is performed at 450° C. for 1 hour. It may crystallize due to heat treatment in step 1.

[0069] In addition, the first heat treatment of the oxide semiconductor layer is performed on the oxide semiconductor layer before it is processed into the island-shaped oxide semiconductor layer. In this case, the substrate is removed from the heating device after the first heat treatment. It is then removed and subjected to a second photolithography process.

[0070] Next, an oxide insulating film was formed over the gate insulating layer 402 and the oxide semiconductor layer 404 by a sputtering method. After forming the film, a resist mask is formed by a third photolithography process, and selective Then, the oxide insulating layer 426 is formed by etching the resist mask 424, and the resist mask is then removed. At this stage, the oxide insulating layer 426 which covers the periphery and side surfaces of the oxide semiconductor layer may be formed. A region overlapping with the first region 444c and the second region 444d of the oxide semiconductor layer is formed. This can reduce the peak current and parasitic capacitance (see Figure 1(E)).

[0071] The oxide insulating layer 426 has a thickness of at least 1 nm. The method can be appropriately used to prevent the inclusion of impurities such as hydrogen. The oxide insulating layer 426 is formed using a silicon oxide film by a sputtering method.

[0072] The substrate temperature during film formation may be from room temperature to 300° C., and in this embodiment, it is set to 100° C. The silicon oxide film is formed by sputtering in a rare gas (typically argon) atmosphere. The process is carried out in an oxygen atmosphere or in a mixture of a rare gas (typically argon) and oxygen. It is possible.

[0073] In addition, a silicon oxide target or a silicon target can be used as the target. For example, by using a silicon target and performing sputtering in an oxygen and rare gas atmosphere, A silicon oxide film can be formed in contact with the oxide semiconductor layer having a low resistance. The oxide insulating layer is formed by the action of moisture, hydrogen ions, and OH - It does not contain impurities such as It is preferable to use an inorganic insulating film capable of blocking the penetration of these elements. A typical example is a silicon oxide film. A silicon nitride oxide film, an aluminum oxide film, an aluminum oxynitride film, or the like may be used. This can be done.

[0074] In this embodiment, a boron-doped columnar polycrystalline silicon target (resistivity 0.01 Ωcm The distance between the substrate and the target (TS distance) was 89 mm, and the pressure was 0.4 Pa, direct current (DC) power 6 kW, oxygen (oxygen flow rate 100%) atmosphere, pulse The film is formed by DC sputtering to a thickness of 300 nm.

[0075] Next, an oxide insulating layer 426 was formed over the gate insulating layer 402, the oxide insulating layer 426, and the oxide semiconductor layer 404. By using the sputtering method, a laminate of an oxide conductive film and a metal film can be formed. The layers can be continuously formed without being exposed to the air.

[0076] Examples of the oxide conductive film include In-Sn-O, In-Sn-Zn-O, and In-Al -Zn-O series, Sn-Ga-Zn-O series, Al-Ga-Zn-O series, Sn-Al-Zn- O series, In-Zn-O series, Sn-Zn-O series, Al-Zn-O series, In-O series, Sn-O The conductive metal oxide of the Zn-O system or the Zn-O system can be used, and the film thickness is 50 nm or more. The thickness is appropriately selected within the range of 00 nm or less. In this embodiment mode, a zinc oxide film is used.

[0077] The metal film is made of an element selected from Ti, Mo, W, Al, Cr, Cu, and Ta. Alternatively, an alloy containing the above-mentioned elements is used. Also, the above-mentioned metal film is not limited to a single layer. In this embodiment, a molybdenum film and an aluminum film are used. A three-layer laminated film in which a tungsten film and a molybdenum film are laminated is used.

[0078] Next, a resist mask is formed by a fourth photolithography process, and the metal film is selectively After etching the source electrode layer 445a and the drain electrode layer 445b, The resist mask is then removed. When a resist stripping solution is used, the source electrode layer 445a and the drain The zinc oxide film is also selectively etched using the inner electrode layer 445b as a mask.

[0079] In this manner, the oxide conductive layer 446a is formed under and in contact with the source electrode layer 445a. An oxide conductive layer 446b is formed under and in contact with the drain electrode layer 445b (see FIG. 1D). ).

[0080] By providing the oxide conductive layer 446a between the source electrode layer 445a and the oxide semiconductor layer, This reduces the contact resistance, enabling the creation of low-resistance thin-film transistors that can operate at high speed. The oxide conductive layer 445a is provided between the source electrode layer 445a and the oxide semiconductor layer. The region 46a functions as a source region and is provided between the drain electrode layer 445b and the oxide semiconductor layer. The oxide conductive layer 446b formed on the same substrate functions as a drain region. When forming a peripheral circuit (drive circuit) on the .

[0081] In addition, the molybdenum film has a problem that the contact resistance becomes high when it comes into contact with an oxide semiconductor layer. Mo is less oxidized than Ti, so it has a weaker effect of extracting oxygen from the oxide semiconductor layer. This is because the contact interface between Mo and the oxide semiconductor layer does not become n-type. An oxide conductive layer is interposed between the oxide semiconductor layer and the source electrode layer or the drain electrode layer. By doing so, the contact resistance can be reduced.

[0082] Since the oxide semiconductor layer and the oxide conductive layer have different etching rates, The overlying oxide conductive layer can be removed in a time controlled manner.

[0083] After selectively etching the metal film, the resist mask is removed by oxygen ashing. After leaving the zinc oxide film, the source electrode layer 445a and the drain electrode layer 445b are The zinc oxide film may be selectively etched as a mask.

[0084] In addition, a resist mask for forming the source electrode layer 445a and the drain electrode layer 445b is may be formed by an ink jet method.

[0085] Next, the oxide insulating layer 426, the source electrode layer 445a, the drain electrode layer 445b, and the oxide An insulating layer 427 is formed over the semiconductor layer 404. The insulating layer 427 may be formed of a silicon oxide film, a nitride film, or the like. A silicon oxide film, an aluminum oxide film, an aluminum oxynitride film, or the like is used. In this embodiment, a silicon oxide film is formed as the insulating layer 427 by RF sputtering.

[0086] At this stage, the heating is performed in an inert gas atmosphere such as nitrogen gas at a temperature of 200° C. or higher and 400° C. or lower, preferably A second heat treatment is performed at 250° C. or more and 350° C. or less. For example, a second heat treatment is performed at 250° C. in a nitrogen atmosphere. Heat treatment is carried out for 1 hour.

[0087] In the second heat treatment, the insulating layer 427, which is an oxide, is in contact with part of the oxide semiconductor layer 404. Therefore, the oxide semiconductor layer 404 whose resistance is reduced by the first heat treatment is Then, oxygen is supplied from the insulating layer 427, resulting in an oxygen excess state, and the resistance becomes high (i-type). .

[0088] In this embodiment, the second heat treatment is performed after the silicon oxide film is formed. The process of etching can be performed after the silicon oxide film is formed without any problem, and is not limited to the process immediately after the silicon oxide film is formed. stomach.

[0089] In addition, when a heat-resistant material is used for the source electrode layer 445a and the drain electrode layer 445b, In this case, a step using the first heat treatment conditions may be performed at the timing of the second heat treatment. In this case, the heat treatment may be performed only once after the silicon oxide film is formed.

[0090] In the second heat treatment, a crystal such as silicon oxide is formed in the oxide conductive layers 446a and 446b. Unless a crystallization inhibitor is contained, the oxide conductive layers 446a and 446b are crystallized and the crystalline region is formed. For example, if zinc oxide or the like is used for the oxide conductive layer, columnar crystals tend to form. In the case of an alloy such as indium oxide or tin oxide, the alloy is easily microcrystalline. In addition, the oxide semiconductor layer, the source electrode layer 445a, and the drain electrode layer 445b are In the second heat treatment, the contact resistance between the first and second electrodes 45b is reduced. The In-Ga-Zn-O oxide semiconductor layer used in this embodiment does not crystallize and maintains an amorphous state. .

[0091] Next, a protective insulating layer 428 is formed over the insulating layer 427 (see FIG. 1E). The material 428 may be a silicon nitride film, a silicon oxynitride film, or an aluminum nitride film. In this embodiment, a silicon nitride film is formed as the protective insulating layer 428 by RF sputtering. Form as.

[0092] Through the above steps, the oxide semiconductor layer and the source electrode layer and the oxide semiconductor layer and the drain electrode layer are A thin film transistor 440 having an oxide conductive layer having a crystalline region between an electrode layer and the oxide conductive layer is fabricated. It is possible.

[0093] Note that this embodiment mode can be freely combined with other embodiment modes.

[0094] (Embodiment 2) In this embodiment, a bottom-contact thin film transistor and a manufacturing process thereof will be described. An example different from the first embodiment will be described with reference to FIG. 2. FIG. 2 is the same as FIG. 1 except that the steps are partially different. Since the structures of the thin film transistors are the same, the same reference numerals are used to indicate the same parts. will be used, and detailed description of this portion will be omitted.

[0095] The thin film transistor 470 shown in FIG. 2E is a bottom gate type called a bottom contact type. It is one of the structures.

[0096] The thin film transistor 470 is formed by forming a gate electrode layer 421a, a gate The gate insulating layer 402, the source electrode layer 445a, the drain electrode layer 445b, and the oxide conductive layer 44 The oxide semiconductor layer includes the gate insulating film 446a, the gate insulating film 446b, and the channel formation region 443. An insulating layer is formed on the channel forming region 443, the source electrode layer 445a, and the drain electrode layer 445b. A layer 427 and a protective insulating layer 428 are provided.

[0097] Here, the oxide conductive layers 446a and 446b are made of a material having a high conductivity and a crystalline region. At the same time, the oxide semiconductor layer is provided between the source electrode layer 445a and the drain electrode layer 445b. The contact resistance can be reduced, and a thin film transistor capable of high-speed operation can be realized.

[0098] In the following, the thin film transistor 470 will be described with reference to FIGS. The manufacturing process will be described.

[0099] According to the first embodiment, a gate electrode layer 421a and a gate insulating layer 402 are formed.

[0100] Next, a stack of a metal film and an oxide conductive film is formed over the gate insulating layer 402 (FIG. 2(A) If sputtering is used, the laminate of the metal film and the conductive oxide film is not exposed to the air. In this embodiment, a molybdenum film and an aluminum film are formed on the metal film. A three-layer laminated film of aluminum and molybdenum films, and a zinc oxide film is used as the oxide conductive film. .

[0101] Next, a resist mask is formed by a photolithography process, and the zinc oxide film and the metal film are The source electrode layer 445a, the drain electrode layer 445b, and the oxide conductive layer 445a are selectively etched. A resist layer 446a and an oxide conductive layer 446b are formed (see FIG. 2B). The resist stripper used to remove the mask is an alkaline solution containing zinc oxide. In order to prevent the zinc oxide film from becoming thinner, oxygen is used in the etching process. It is preferable to remove the resist by etching.

[0102] Next, an oxide semiconductor film is formed in a manner similar to that of Embodiment 1, and a photolithography process and an etching process are performed. An oxide semiconductor layer 404 is formed by an etching process (see FIG. 2C).

[0103] Here, the oxide semiconductor layer is dehydrated in accordance with the first heat treatment method described in Embodiment 1. The hydrogenation or dehydrogenation is carried out.

[0104] Note that before the formation of the oxide semiconductor film, an inert gas atmosphere (nitrogen, helium, neon, or Heat treatment (400°C or higher but below the distortion point of the substrate) is performed under argon, etc., and gate insulation is performed. The layer 402 may be a gate insulating layer from which impurities such as hydrogen and water contained therein have been removed.

[0105] Next, an insulating layer is formed on the source electrode layer 445a, the drain electrode layer 445b, and the oxide semiconductor layer 404. An insulating layer 427 is formed (see FIG. 2(D)). The insulating layer 427 may be a silicon oxide film, a nitride film, or the like. A silicon nitride film, an aluminum oxide film, an aluminum oxynitride film, or the like is used. In this embodiment, a silicon oxide film is formed as the insulating layer 427 by RF sputtering.

[0106] Here, the heat treatment is performed according to the method of the second heat treatment described in the first embodiment.

[0107] In this embodiment, the second heat treatment is performed after the silicon oxide film is formed. The process of etching can be performed after the silicon oxide film is formed without any problem, and is not limited to the process immediately after the silicon oxide film is formed. stomach.

[0108] In addition, when a heat-resistant material is used for the source electrode layer 445a and the drain electrode layer 445b, In this case, a step using the first heat treatment conditions may be performed at the timing of the second heat treatment. can.

[0109] By performing any one of the heat treatment steps up to this point, the oxide conductive layers 446a and 446b are Unless a crystallization inhibitor such as silicon oxide is included, the oxide conductive layers 446a and 446b The film is crystallized and has crystalline regions. Of course, the film may be heated multiple times. On the other hand, the oxide semiconductor layer is not crystallized even after multiple heat treatments and remains amorphous. do.

[0110] Next, a protective insulating layer 428 is formed over the insulating layer 427 (see FIG. 2E).

[0111] Through the above steps, the oxide semiconductor layer and the source electrode layer and the oxide semiconductor layer and the drain electrode layer are A thin film transistor 470 having an oxide conductive layer having a crystalline region between an electrode layer and the oxide conductive layer is fabricated. It is possible.

[0112] Note that this embodiment mode can be freely combined with other embodiment modes.

[0113] (Embodiment 3) In this embodiment, a bottom-contact thin film transistor and a manufacturing process thereof will be described. An example different from the first and second embodiments will be described with reference to FIG. 3. Note that FIG. 3 is a diagram showing the steps of FIG. Since the two are the same except for some differences, the same parts are shown in the thin film transistor configuration. The same reference numerals are used for the corresponding parts, and detailed explanations of the same parts will be omitted.

[0114] FIG. 3(E) shows a cross-sectional view of a thin film transistor 480 having a bottom gate structure called a channel protection type. The surface view is shown.

[0115] The thin film transistor 480 includes a gate electrode layer 421a, A gate insulating layer 402, an oxide semiconductor layer, oxide conductive layers 446a and 446b, and a source electrode layer The oxide semiconductor layer includes a channel electrode layer 445a and a drain electrode layer 445b. The semiconductor device includes a formation region 443, a high-resistance source region 424a, and a high-resistance drain region 424b. In addition, an oxide insulating layer 443 is in contact with the channel formation region 443 and functions as a channel protective layer. In addition, a source electrode layer 445a and a drain electrode layer 445b are provided. A protective insulating layer 428 is provided over the oxide insulating layer 426a and the oxide semiconductor layer 404.

[0116] The first region 424c and the second region 424d of the oxide semiconductor layer overlapping with the oxide insulating layer 426b are , the same oxygen excess state as the channel formation region 443, and the leakage current is reduced and the parasitic capacitance is It also serves the function of reducing

[0117] The third region 424e of the oxide semiconductor layer in contact with the protective insulating layer 428 is the channel formation region 44 3 and the high-resistance source region 424a. The fourth region 424f of the compound semiconductor layer includes a channel forming region 443 and a high resistance drain region 424 It is placed between b.

[0118] The oxide conductive layers 446a and 446b are made of a material having a high electrical conductivity and a crystalline region. , contact resistance between the oxide semiconductor layer and the source electrode layer 445a and between the oxide semiconductor layer and the drain electrode layer 445b This makes it possible to realize a thin film transistor capable of high speed operation.

[0119] The third region 424e and the fourth region 424f of the oxide semiconductor layer are formed of oxygen-deficient high-resistance Anti-source region (also called High Resistance Source region (HRS) ) and high resistance drain region (HRD (High Resistance Drain) Specifically, the carrier concentration of the high-resistance drain region is 1× 10 18 / cm 3 The carrier concentration in the channel formation region is within the above range. ×10 18 / cm 3 This is a higher area than

[0120] The carrier concentration in this embodiment is determined by Hall effect measurement at room temperature. If the width of the third and fourth regions in the channel length direction is increased, The off-state current of the transistor can be reduced. By narrowing the width of the region in the channel length direction, the operating speed of the thin film transistor can be increased. can be done.

[0121] A channel-protection thin-film transistor has an oxide insulating layer with a width of 100 nm that functions as a channel protection layer. By narrowing the oxide, the effective channel length L can be easily shortened. If the source electrode layer and the drain electrode layer are provided on the insulating layer, there is a risk of short circuit. The source electrode layer 445a and the drain electrode layer 445b are provided at ends separated from the oxide insulating layer. The structure is as follows.

[0122] In FIG. 3E, the oxide insulating layer 426a directly below the oxide insulating layer 426a functions as a channel protective layer. The region of the semiconductor layer is called a channel formation region. The channel length L is equal to the width of the oxide insulating layer 426a in the channel length direction. In the cross-sectional view shown, this corresponds to the length of the base of the oxide insulating layer 426a which is shown as a trapezoid.

[0123] Next, the thin film transistor 480 is formed using the structures shown in FIGS. The manufacturing process will be described.

[0124] According to the first embodiment, a gate electrode layer 421a and a gate insulating layer 402 are formed (FIG. 3( See A).

[0125] Next, an oxide semiconductor film is formed in a manner similar to that of Embodiment 1, and a photolithography process and an etching process are performed. An island-shaped oxide semiconductor layer 404 is formed by an etching process (see FIG. 3B).

[0126] Note that before the formation of the oxide semiconductor film, an inert gas atmosphere (nitrogen, helium, neon, or Heat treatment (400°C or higher but below the distortion point of the substrate) is performed under argon, etc., and gate insulation is performed. The layer 402 may be a gate insulating layer from which impurities such as hydrogen and water contained therein have been removed.

[0127] Here, the oxide semiconductor layer is dehydrated in accordance with the first heat treatment method described in Embodiment 1. The hydrogenation or dehydrogenation is carried out.

[0128] In addition, the first heat treatment of the oxide semiconductor layer is performed on the oxide semiconductor layer before it is processed into the island-shaped oxide semiconductor layer. It can also be performed on semiconductor films.

[0129] Next, a semiconductor layer 404 and a gate insulating layer 402 were formed on the gate insulating layer 402 and the oxide semiconductor layer 404 in the same manner as in Embodiment 1. After forming an oxide insulating film by sputtering, a resist mask is formed by photolithography. Then, selective etching is performed to form oxide insulating layers 426a and 426b. Then, the resist mask is removed. At this point, the region of the oxide semiconductor layer directly under the oxide insulating layer 426a This region becomes the channel formation region (see FIG. 3(C)).

[0130] Next, in a manner similar to that of Embodiment 1, the oxide insulating layers 426a and 426b and the oxide semiconductor layer A lamination of an oxide conductive film and a metal film is formed on the source electrode layer 445 by partially etching the same. A drain electrode layer 445b and oxide conductive layers 446a and 446b are formed by a sputtering method. By using this method, it is possible to continuously deposit a metal film and an oxide conductive film without exposing them to the air. In this embodiment, the metal film is a molybdenum film, an aluminum film, and a molybdenum film. A three-layer laminate film is formed by stacking the above and the oxide conductive film is a zinc oxide film (see FIG. 3(D)).

[0131] Next, the mixture is heated in an inert gas atmosphere such as nitrogen gas at 200° C. to 400° C., preferably at 25 A second heat treatment is performed at 0° C. to 350° C. For example, the second heat treatment is performed at 250° C. for 1 hour in a nitrogen atmosphere. Heat treatment is performed between 100 and 200°C.

[0132] In the second heat treatment, part of the oxide semiconductor layer 404 is turned into the oxide insulating layers 426a and 426b. Therefore, the oxide semiconductor layer 4 whose resistance has been reduced by the first heat treatment is heated. In FIG. 04, oxygen is supplied from the oxide insulating layers 426a and 426b, resulting in an oxygen excess state. It becomes highly resistive (i-type).

[0133] On the other hand, a part of the oxide semiconductor layer 404 that is not overlapped with the oxide insulating layers 426a and 426b is exposed. Since the third region 424e is heated in the above-mentioned state, the low resistance is maintained or further reduced. and a fourth region 424f can be formed.

[0134] Note that in this embodiment, the second heat treatment was performed after the oxide insulating layers 426a and 426b were formed. The timing of the oxidation can be any time after the oxide insulating layers 426a and 426b are formed. However, the time is not limited to immediately after the formation of the insulating layers 426a and 426b.

[0135] In the second heat treatment, a crystal such as silicon oxide is formed in the oxide conductive layers 446a and 446b. Unless a crystallization inhibitor is contained, the oxide conductive layers 446a and 446b are crystallized and the crystalline region is formed. On the other hand, the oxide semiconductor layer is not crystallized by the second heat treatment. , maintaining the amorphous state.

[0136] Next, the oxide semiconductor layer 404, the oxide insulating layers 426a and 426b, and the source electrode layer 445 A protective insulating layer 428 is formed over the drain electrode layer 445b (see FIG. 3E). The insulating layer 428 may be a silicon nitride film, a silicon nitride oxide film, or an aluminum nitride film. In this embodiment, the protective insulating layer 428 of a silicon nitride film is formed by RF sputtering. do.

[0137] Through the above steps, the oxide semiconductor layer and the source electrode layer and the oxide semiconductor layer and the drain electrode layer are A thin film transistor 480 having an oxide conductive layer having a crystalline region between an electrode layer and the oxide conductive layer is fabricated. It is possible.

[0138] Note that this embodiment mode can be freely combined with other embodiment modes.

[0139] (Embodiment 4) In this embodiment, the thin film transistors shown in the first, second and third embodiments are used. An example of manufacturing an active matrix type liquid crystal display device or light emitting device is shown above.

[0140] FIG. 4 shows an example of the cross-sectional structure of a liquid crystal display device using an active matrix substrate.

[0141] In the first, second and third embodiments, cross-sectional views of the thin film transistor are shown. In the embodiment, in a configuration in which a driver circuit section and a pixel section are provided on the same substrate, A thin film transistor 450 for a pixel portion, a thin film transistor 460 for a gate wiring contact The following will be explained with reference to the drawings: a storage capacitor, a gate line and a source line and their intersections, a pixel electrode, etc. The storage capacitor, the gate wiring, and the source wiring are the same as those of the thin film transistors shown in the first and second embodiments. It can be formed in the same process as the manufacturing process, and there is no need to increase the number of photomasks or the number of processes. It can be made without any modification.

[0142] In FIG. 4, a thin film transistor 450 is a thin film transistor provided in a driving circuit section. The thin film transistor 460 electrically connected to the pixel electrode layer 457a is provided in the pixel portion. It is a thin film transistor.

[0143] In this embodiment, the thin film transistor 460 formed on the substrate 400 is The same structure as the thin film transistors of modes 1, 2 and 3 is used. Here, the channel element is used as an example. 1 shows a thin-film transistor of a MOS type.

[0144] A capacitance wiring formed of the same material and in the same process as the gate electrode layer of the thin film transistor 460. The layer 430 overlaps the capacitance electrode layer 431 via the gate insulating layer 402, which serves as a dielectric. The capacitor electrode layer 431 is connected to the source region or The oxide conductive layer is formed of the same material and in the same process as the electrode layer and the oxide conductive layer provided in the drain region. can be.

[0145] The storage capacitor is provided below the pixel electrode layer 457a. The capacitance electrode layer 431 is electrically connected to the pixel electrode layer 457a.

[0146] In this embodiment, a storage capacitor is formed using a capacitor electrode layer 431 and a capacitor wiring layer 430. However, the structure for forming the storage capacitor is not particularly limited. No line layer is provided, and the pixel electrode is connected to the gate wiring of the adjacent pixel and the planarizing insulating layer, the protective insulating layer, and A storage capacitor may be formed by overlapping with a gate insulating layer interposed therebetween.

[0147] In addition, the gate wiring, source wiring, and capacitance wiring layer are provided in multiple lines according to the pixel density. In the terminal section, a first terminal electrode having the same potential as the gate line, a source line a second terminal electrode having the same potential as the capacitance wiring layer, a third terminal electrode having the same potential as the capacitance wiring layer, etc. are arranged in a row. The number of each terminal electrode may be any number. The implementer should make the appropriate decision.

[0148] In the gate wiring contact portion, the gate electrode layer 421b is formed of a low resistance metal material. The gate electrode layer 421b is formed through a contact hole that reaches the gate wiring. The insulating film 14 is electrically connected to the gate wiring.

[0149] Here, the heat treatment for dehydrating and dehydrogenating the oxide semiconductor layer is performed by After the film formation, an oxide conductive layer is laminated on the oxide semiconductor layer, and then a source electrode and a drain electrode are formed. After forming a passivation film thereon, the above-mentioned step may be performed.

[0150] In addition, the gate electrode layer of the thin film transistor 450 in the driving circuit portion is disposed above the oxide semiconductor layer. A structure in which the conductive layer 417 is electrically connected to the conductive layer 417 may be used.

[0151] In addition, in order to reduce parasitic capacitance at the wiring intersections as shown in FIG. Between the gate insulating layer 402 and the source wiring layer 422, a gate insulating layer 402 and an oxide insulating layer 426 are provided. It has a laminated structure.

[0152] In addition, when an active matrix type liquid crystal display device is manufactured, A liquid crystal layer is provided between the substrate and the opposing substrate on which the opposing electrode is provided, and an active matrix The substrate and the opposing substrate are fixed. Similarly, a positive charge is placed between the two electrodes. The microcapsules are made by compounding a first particle having a negative charge and a second particle having a negative charge. By arranging several of these elements, an active matrix type electrophoretic display device can be constructed. A common electrode electrically connected to the counter electrode provided on the counter substrate is provided on the active matrix substrate. A fourth terminal electrode is provided on the plate and electrically connected to the common electrode. The terminal electrode is a terminal for setting the common electrode to a fixed potential, such as GND or 0V. The fourth terminal electrode can be formed of the same material as the pixel electrode layer 457a.

[0153] Also, a gate electrode, a source electrode, a drain electrode, a pixel electrode, or other electrodes, or If the same material is used for other wiring layers, it is possible to use a common sputtering target and a common manufacturing device. The cost of the material and the etchant (or etching This reduces the cost of fuel (gas), resulting in reduced manufacturing costs. Cut.

[0154] In the structure of FIG. 4, when a photosensitive resin material is used as the planarization insulating layer 456, The step of forming a resist mask can be omitted.

[0155] FIG. 5 shows an active matrix type light emitting device in which an EL layer is formed on a first electrode (pixel electrode). 1 is a cross-sectional view showing a state of the substrate before forming the

[0156] In FIG. 5, a channel-etch type thin film transistor is shown. A thin film transistor having the same structure as 2 and 3 can also be used. The configuration other than that of the liquid crystal display device can be the same as that of the liquid crystal display device described above.

[0157] After forming the insulating layer 427, a color filter layer 453 is formed. The color filter layer is Available in red, green, and blue, the ink is printed using printing, inkjet, and photolithography techniques. The color filter layer 45 is formed in a specific position in sequence by the etching method described above. 3 on the substrate 400 side, it is possible to achieve a high degree of accuracy without depending on the accuracy of lamination of the sealing substrate. The color filter layer 453 can be aligned with the light-emitting region of the light-emitting element.

[0158] Next, an overcoat layer 458 is formed to cover the color filter layer 453. The base layer 458 is made of a light-transmitting resin.

[0159] Here, a full-color display is shown using three color filter layers: red, green, and blue. However, the color is not limited to cyan, magenta, yellow, or white. A filter layer may be added to provide a full color display.

[0160] Next, a protective insulating layer 428 is formed to cover the overcoat layer 458 and the insulating layer 427 . The protective insulating layer 428 is made of an inorganic insulating film, such as a silicon nitride film, an aluminum nitride film, or a silicon nitride oxide film. A bare film, aluminum oxynitride, or the like is used.

[0161] Next, the protective insulating layer 428 and the insulating layer 429 are removed by a photolithography process and an etching process. A contact hole is formed in the photoresist 427, reaching the connection electrode layer 452. The protective insulating layer 428 and the insulating layer 427 of the terminal portion are selected by a lithography process and an etching process. A portion of the terminal electrode is exposed by selective etching. In order to connect the two electrodes to a common potential line, a contact hole reaching the common potential line is also formed. .

[0162] Next, a light-transmitting conductive film is formed, and then subjected to a photolithography process and an etching process. Thus, a first electrode 457b electrically connected to the connection electrode layer 452 is formed.

[0163] Next, a partition wall 459 is formed so as to cover the periphery of the first electrode 457b. Polyimide, acrylic, polyamide, epoxy and other organic resin films, inorganic insulating films or organic poly The partition wall 459 is formed using an organic insulating material or an inorganic insulating material. The partition wall 459 can be formed by forming an opening such that the side wall is an inclined surface having a curvature. It is preferable to form the opening on the first electrode 457b. The use of a highly flexible resin material makes it easy to form the insulating layer.

[0164] Through the above steps, the substrate state shown in FIG. 5 can be obtained. An EL layer is formed, and a second electrode is formed on the EL layer to form a light-emitting element. The electrode is electrically connected to a common potential line.

[0165] In addition, the thin film transistor 450 of the driving circuit unit shown in FIG. A conductive layer 417 may be provided above the pixel electrode layer 457a or the first It can be formed using the same material and process as the electrode 457b.

[0166] The conductive layer 417 is provided so as to overlap with the channel formation region 443 of the oxide semiconductor layer. As a result, the amount of change in the threshold voltage of the thin film transistor 450 over time can be reduced. In addition, the conductive layer 417 is set to the same potential as the gate electrode layer 421a, so that the conductive layer 417 is In addition, the conductive layer 417 can function as a gate electrode layer 421a. In addition, the potential of the conductive layer 417 may be set to GND, 0 V, or a floating potential. It may be in this state.

[0167] In addition, thin film transistors are easily damaged by static electricity, etc. It is preferable that a protection circuit be provided over the same substrate as the semiconductor device. For example, the protection circuit is preferably configured by using a nonlinear element such as a pixel section and a scanning line input. In this embodiment, a plurality of protection circuits are provided between the input terminal and the signal line input terminal. A surge voltage is applied to the scanning lines, signal lines and capacitance bus lines due to static electricity or the like, and the pixels It is designed to prevent the transistors from being destroyed. The protection circuit is configured to release electric charge to the common wiring when a voltage is applied. It is composed of nonlinear elements arranged in parallel to the scanning lines. It is composed of two-terminal elements such as diodes or three-terminal elements such as transistors. For example, it is possible to form the thin film transistor 460 in the pixel portion in the same process. By connecting the source and drain terminals together, it can have the same characteristics as a diode. can.

[0168] Note that this embodiment mode can be freely combined with other embodiment modes.

[0169] (Embodiment 5) Semiconductor device having a display function using the thin film transistors shown in the first, second and third embodiments In addition, a driver circuit having a thin film transistor can be manufactured. The path section and the pixel section can be integrally formed on the same substrate to form a system-on-panel. .

[0170] The display device is composed of a display element. The display element is a liquid crystal element (also called a liquid crystal display element). The use of display media whose contrast changes electrically, such as electronic ink, This can be done.

[0171] In this specification, the term "display device" refers to an image display device, a display device, or an optical Also, FPC (Flexible Printed Circuit) cuit) or TAB (Tape Automated Bonding) tape The attached module, the module with the printed wiring board attached to the end of the TAB tape Or, the display element is IC (integrated circuit) by COG (Chip On Glass) method. The display device also includes all modules in which the above is directly mounted.

[0172] The appearance and cross section of a liquid crystal display panel, which is one form of display device, will be explained with reference to FIG. 6(A1) and (A2) show thin film transistors 4010 and 4011 and a liquid crystal element. 4013 is formed by a sealant 4005 between a first substrate 4001 and a second substrate 4006. FIG. 6(B) is a plan view of the sealed panel, and FIG. 6(A1) and (A2) are MN. This corresponds to a cross-sectional view.

[0173] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. In this manner, a sealant 4005 is provided. A second substrate 4006 is provided on the path 4004. The scanning line driver circuit 4004 is made up of a first substrate 4001, a sealant 4005, and a second substrate 4006. The liquid crystal layer 4008 is sealed together with the first substrate 4001. A single crystal semiconductor or a polycrystalline semiconductor is provided in a region different from the region surrounded by the insulating material 4005. A signal line driver circuit 4003 made of a conductor is mounted.

[0174] The method of connecting the signal line driver circuit 4003 is not particularly limited, and may be a COG method, The wire bonding method, the TAB method, or the like can be used. This is an example of mounting a signal line driver circuit 4003 by the OG method. FIG. 6(A2) shows a signal line driver circuit 4003 mounted by the TAB method. This is an example in which a twisted signal line driver circuit 4003 is implemented.

[0175] In addition, a pixel portion 4002 and a scanning line driver circuit 4004 provided on a first substrate 4001 are In FIG. 6B, the thin film transistor included in the pixel portion 4002 is A thin film transistor 4010 and a thin film transistor 4011 included in a scanning line driver circuit 4004 are Insulating layers 4041 and 4020 are formed on the thin film transistors 4010 and 4011. , 4021 are provided.

[0176] The thin film transistors 4010 and 4011 are made of the oxide semiconductor shown in the first, second, and third embodiments. In the present embodiment, a highly reliable thin film transistor including a dielectric layer can be used. The thin film transistors 4010 and 4011 are n-channel thin film transistors.

[0177] The oxide semiconductor layer of the thin film transistor 4011 for the driver circuit is A conductive layer 4040 is provided in a position overlapping with the channel formation region. By providing the insulating film over the channel formation region of the oxide semiconductor layer, The amount of change in threshold voltage of the conductive layer 404 over time can be reduced. 0 is set to the same potential as the gate electrode of the thin film transistor 4011, The conductive layer 4040 can also function as a thin film transistor 4011. A potential different from that of the gate electrode may be applied. Alternatively, it may be in a floating state.

[0178] The pixel electrode 4030 of the liquid crystal element 4013 is electrically connected to the thin film transistor 4010. The counter electrode 4031 of the liquid crystal element 4013 is connected to the second substrate 40. 4006. The pixel electrode 4030, the counter electrode 4031, and the liquid crystal layer 4008 are overlapped. The portion where the pixel electrode 4030 and the counter electrode 4031 are arranged corresponds to the liquid crystal element 4013. The insulating layers 4032 and 4033 functioning as alignment films are provided on the substrate 031. .

[0179] The first substrate 4001 and the second substrate 4006 may be light-transmitting substrates. Glass, ceramics, or plastics can be used. For example, FRP (Fiberglass-Reinforced Plastics) panels , PVF (polyvinyl fluoride) film, polyester film or acrylic resin An oil film can be used.

[0180] Also, 4035 is a columnar spacer obtained by selectively etching the insulating layer. In order to control the distance (cell gap) between the pixel electrode 4030 and the counter electrode 4031, A spherical spacer may be used. The counter electrode 4031 is a thin The film transistor 4010 is electrically connected to a common potential line provided on the same substrate. Using the connection part, the counter electrode 4031 is connected to the conductive particles disposed between the pair of substrates. The conductive particles are contained in the sealing material 4005. To have.

[0181] Alternatively, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of cholesteric liquid crystal is increased, the phase immediately transitions from the cholesteric phase to the isotropic phase. The blue phase appears only in a narrow temperature range, so it is necessary to improve the temperature range. In order to achieve this, a liquid crystal composition containing 5% by weight or more of a chiral agent is used for the liquid crystal layer 4008. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a response speed of 1 msec. Since the liquid crystal display is optically isotropic, no alignment treatment is required, and the viewing angle dependency is small.

[0182] In addition, in a liquid crystal display device, a polarizing plate is provided on the outer side (the viewing side) of the substrate, and a colored layer and a display element are provided on the inner side. In the example shown, the polarizing plate is disposed on the inner side of the substrate. In addition, the laminated structure of the polarizing plate and the coloring layer is not limited to the present embodiment, and the materials and This may be appropriately set depending on the manufacturing process conditions.

[0183] The thin film transistor 4011 is provided with an insulating layer 4041 in contact with a semiconductor layer including a channel formation region. The insulating layer 4041 is formed using a material similar to that of the insulating layer 427 described in Embodiment 1. In order to reduce the surface unevenness of the thin film transistor, a planarization method is used. The insulating layer 4021 is used to cover the insulating layer. As the substrate 1, a silicon oxide film is formed by sputtering in the same manner as in the first embodiment.

[0184] In addition, a protective insulating layer 4020 is formed over the insulating layer 4041. The protective insulating layer 4020 is The protective insulating layer 428 may be formed using a material and a method similar to those of the protective insulating layer 428 described in Embodiment 1. As the protective insulating layer 4020, a silicon nitride film is formed by a PCVD method.

[0185] In addition, an insulating layer 4021 is formed as a planarizing insulating layer. Heat-resistant organic compounds such as olefins, polyimides, benzocyclobutenes, polyamides, and epoxies. In addition to the above organic materials, low-k materials can be used. , siloxane resin, PSG (phosphorus glass), BPSG (borophosphorus glass), etc. are used. In addition, by laminating multiple insulating layers made of these materials, 4021 may be formed.

[0186] The siloxane-based resin is a Si-O- formed material that is formed from a siloxane-based material. This corresponds to a resin containing Si bonds. Siloxane-based resins have organic groups (e.g., arsenic) as substituents. Alternatively, the organic group may have a fluoro group. It's fine if you're there.

[0187] The method for forming the insulating layer 4021 is not particularly limited, and may be a sputtering method, an SOG method, or the like, depending on the material. , spin coating, dip coating, spray coating, droplet ejection method (inkjet method, screen printing, offset printing, etc.), doctor knife, roll coater, curtain coater, knife The baking process of the insulating layer 4021 and the annealing of the semiconductor layer can be performed by using a fcoater or the like. By using both, it becomes possible to manufacture a display device efficiently.

[0188] The pixel electrode 4030 and the counter electrode 4031 are made of indium oxide containing tungsten oxide. , indium zinc oxide with tungsten oxide, indium oxide with titanium oxide, Indium tin oxide containing titanium oxide (hereinafter referred to as ITO) ), indium zinc oxide, indium tin oxide with added silicon oxide, etc. A conductive material having such a property can be used.

[0189] The pixel electrode 4030 and the counter electrode 4031 are made of a conductive polymer. The conductive composition may be used to form the conductive layer. The pixel electrode has a sheet resistance of 10,000 Ω / □ or less and a light transmittance of 550 nm. It is preferable that the resistance of the conductive polymer contained in the conductive composition is 70% or more. It is preferable that the electrical conductivity be 0.1 Ω·cm or less.

[0190] As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene or or a derivative thereof, or a copolymer of two or more of these.

[0191] In addition, a signal line driver circuit 4003, a scanning line driver circuit 4004, and a pixel section 4 Various signals and potentials are applied to 002 via FPC4018.

[0192] The connection terminal electrode 4015 is formed of the same conductive film as the pixel electrode 4030 of the liquid crystal element 4013. The terminal electrode 4016 is formed on the source electrode layers of the thin film transistors 4010 and 4011 and It is formed from the same conductive film as the drain electrode layer.

[0193] The connection terminal electrode 4015 is connected to a terminal of the FPC 4018 via an anisotropic conductive film 4019. are electrically connected.

[0194] In FIG. 6, a signal line driver circuit 4003 is formed separately and mounted on a first substrate 4001. The embodiment is not limited to this configuration. Alternatively, only a part of the signal line driver circuit or a part of the scanning line driver circuit may be separately formed. It may be implemented.

[0195] Note that this embodiment mode can be freely combined with other embodiment modes.

[0196] (Embodiment 6) In this embodiment mode, the appearance and cross section of a light-emitting display panel (also called a light-emitting panel) will be described with reference to FIG. FIG. 7(A) shows a thin film transistor and a light emitting device formed on a first substrate. FIG. 7 is a plan view of a panel in which an optical element is sealed between a second substrate and the panel by a sealant. (B) corresponds to a cross-sectional view taken along line HI in FIG. 7(A).

[0197] A pixel portion 4502, a signal line driver circuit 4503a, and a signal line driver circuit 4504 are provided on a first substrate 4501. A sealant 4505 is formed to surround the gate driver circuits 4504a and 4504b. In addition, a pixel portion 4502, signal line driver circuits 4503a and 4503b, and A second substrate 4506 is provided over the scanning line driver circuits 4504a and 4504b.

[0198] Therefore, the pixel portion 4502, the signal line driver circuits 4503a and 4503b, and the scanning line driver circuit 4504a and 4504b are a first substrate 4501, a sealant 4505, and a second substrate 4502. 506, together with the filling material 4507, is sealed. Highly airtight and low outgassing protective film (lamination film, UV curing resin film) It is preferable to package (enclose) the package in a plastic film or a cover material.

[0199] In addition, a pixel portion 4502, a signal line driver circuit 4503a, The scanning line driver circuits 4503a and 4504b each have a plurality of thin film transistors. In FIG. 7B, a thin film transistor 4510 included in a pixel portion 4502 and a signal 45, a thin film transistor 4509 included in a line driver circuit 4503a is illustrated.

[0200] The thin film transistors 4509 and 4510 are made of the oxide semiconductor In the present embodiment, a highly reliable thin film transistor including a dielectric layer can be used. The thin film transistors 4509 and 4510 are n-channel thin film transistors.

[0201] The oxide semiconductor layer of the thin film transistor 4509 for the driver circuit is A conductive layer 4540 is provided in a position overlapping with the channel formation region. By providing the gate insulating film at a position overlapping the channel formation region of the nitride semiconductor layer, It is possible to reduce the amount of change in the threshold voltage of the thin film transistor 4509 over time. In addition, the conductive layer 4540 is set to the same potential as the gate electrode layer of the thin film transistor 4509. The conductive layer 4540 may also function as a second gate electrode layer. A potential different from that of the gate electrode layer of the transistor 4509 may be applied. The potential may be GND, 0V, or may be in a floating state.

[0202] The periphery of the oxide semiconductor layer of the thin film transistor 4509 is An oxide insulating layer 4542 is formed to cover the insulating film 4542 .

[0203] In addition, the thin film transistor 4510 is electrically connected to the first electrode 4517 through a connection electrode layer 4548. In addition, the periphery (side) of the oxide semiconductor layer of the thin film transistor 4510 is electrically connected to the An oxide insulating layer 4542 is formed covering the insulating film 4541 (including the surface).

[0204] The oxide insulating layer 4542 was formed using a material and a method similar to those of the oxide insulating layer 426 described in Embodiment 1. In addition, an insulating layer 4544 is formed to cover the oxide insulating layer 4542. The insulating layer 4544 is formed using a material and a method similar to those of the protective insulating layer 428 described in Embodiment 1. It is sufficient to form it.

[0205] A color filter layer 4545 is formed on the thin film transistor 4511 so as to overlap the light emitting region of the light emitting element 4511. It is formed on the star 4510.

[0206] In addition, it functions as a planarizing insulating film to reduce the surface unevenness of the color filter layer 4545. It is covered with an overcoat layer 4543 .

[0207] In addition, an insulating layer 4546 is formed on the overcoat layer 4543. The protective insulating layer 428 may be formed using a material and a method similar to those of the protective insulating layer 428 described in Embodiment 1.

[0208] In addition, the first electrode 4517 which is a pixel electrode of the light-emitting element 4511 is a thin film transistor The light-emitting element is electrically connected to the source electrode layer or drain electrode layer of 4510. The element 4511 is configured by laminating a first electrode 4517, an electroluminescent layer 4512, and a second electrode 4513. The structure is not limited to the configuration shown in FIG. 45. The direction of light emitted from the light emitting element 4511, etc. In accordance with this, the configuration of the light-emitting element 4511 can be changed as appropriate.

[0209] The partition 4520 is formed using an organic resin film, an inorganic insulating film, or an organic polysiloxane. The partition 4520 has an opening on the first electrode 4517 such that the side wall is an inclined surface having a curvature. It is preferable to form such an opening by using a photosensitive resin material. It can be easily formed by

[0210] The electroluminescent layer 4512 is not limited to a single layer, and may be formed by stacking a plurality of layers.

[0211] In order to prevent oxygen, hydrogen, moisture, carbon dioxide, and the like from entering the light-emitting element 4511, the second electrode 4 A protective film may be formed on the insulating film 513 and the partition wall 4520. The protective film may be a silicon nitride film, a nitride It is possible to form a silicon oxide film, a DLC film, etc.

[0212] In addition, signal line driver circuits 4503a and 4503b, scanning line driver circuits 4504a and 4504b Various signals and potentials applied to the pixel portion 4502 are It is supplied via b.

[0213] The connection terminal electrode 4515 is formed of the same conductive film as the first electrode 4517 of the light emitting element 4511. The terminal electrode 4516 is a source electrode layer and a drain electrode layer of the thin film transistor 4509. It is formed from the same conductive film as the electrode layer.

[0214] The connection terminal electrode 4515 is connected to the terminal of the FPC 4518a via the anisotropic conductive film 4519. The electrodes are electrically connected to each other.

[0215] Since the second substrate is located in the direction in which light is extracted from the light emitting element 4511, the second substrate is transparent. In this case, glass plates, plastic plates, polyester films, etc. A light-transmitting material such as rubber or acrylic film is used.

[0216] In addition, filler 4507 can be inert gas such as nitrogen or argon, or ultraviolet-curing resin. It can be made of oil or thermosetting resin, and can be made of PVC (polyvinyl chloride), acrylic, Polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EV A (ethylene vinyl acetate) can be used.

[0217] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) is placed on the light-emitting surface of the light-emitting element. Optical films such as retardation plates (λ / 4 plates, λ / 2 plates), color filters, etc. may be installed as appropriate. In addition, the polarizing plate or the circular polarizing plate may be provided with an anti-reflection film. Anti-glare treatment can be applied to further diffuse reflected light and reduce glare.

[0218] The signal line driver circuits 4503a and 4503b and the scanning line driver circuits 4504a and 4504b are A driving circuit formed of a single crystal semiconductor or a polycrystalline semiconductor may be mounted. In addition, only the signal line driver circuit, or a part thereof, or only the scanning line driver circuit, or Only a part of the components may be separately formed and mounted, and the configuration is not limited to that shown in FIG.

[0219] Through the above steps, a highly reliable light-emitting display device (display panel) can be manufactured.

[0220] Note that this embodiment mode can be freely combined with other embodiment modes.

[0221] (Embodiment 7) The display device disclosed in this specification can be used in various electronic devices (including gaming machines). The electronic device can be, for example, a television device (television or television receiver) (also called "computer monitors"), computer monitors, digital cameras, digital video cameras, etc. cameras, digital photo frames, mobile phones (also called mobile phones or mobile phone devices), Examples include portable game machines, personal digital assistants, audio playback devices, and large game machines such as pachinko machines. Can be obtained.

[0222] FIG. 8A shows an example of a mobile phone. A mobile phone 1100 is provided in a housing 1101. In addition to the built-in display unit 1102, operation buttons 1103, an external connection port 1104, a speaker It is equipped with a speaker 1105, a microphone 1106, etc.

[0223] In addition, the mobile phone 1100 allows the user to input information by touching the display unit 1102 with a finger or the like. In addition, operations such as making a call or sending and receiving an e-mail can be performed by touching the display unit 1102 with a finger or the like. This can be done by

[0224] The screen of the display unit 1102 has three main modes. The first is a display mode that mainly displays images. The first mode is a display mode, the second is an input mode for inputting information such as characters, and the third mode is a display mode. This is a display + input mode that combines the display mode and the input mode.

[0225] For example, when making a call or composing an e-mail, the display unit 1102 is used as a text input device mainly for inputting characters. In this case, the display unit 110 is switched to the input mode and the character displayed on the screen is input. It is preferable to have a keyboard or number buttons displayed on most of the screen of 2.

[0226] In addition, the mobile phone 1100 may include a sensor for detecting tilt, such as a gyro or an acceleration sensor. By providing a detection device having the above configuration, the orientation of the mobile phone 1100 (portrait or landscape) can be determined and the display The screen display of the display unit 1102 can be automatically switched.

[0227] The screen mode can be changed by touching the display unit 1102 or by operating the housing 1101. The type of image displayed on the display unit 1102 can be selected by operating the operation button 1103. For example, the image signal to be displayed on the display unit may be changed by If the data is text data, the mode switches to input mode.

[0228] In the input mode, the optical sensor of the display unit 1102 detects and displays a signal. If there is no input by touch operation of the unit 1102 for a certain period of time, the screen mode is changed to the input mode. Alternatively, the display mode may be switched from the normal mode to the display mode.

[0229] The display unit 1102 can also function as an image sensor. By touching the palm or fingers to the sensor 02, the palm print, fingerprint, etc. can be captured and identity authentication can be performed. In addition, the display unit may be equipped with a backlight that emits near-infrared light or a sensor that emits near-infrared light. By using a scanning light source, it is also possible to image finger veins, palm veins, etc.

[0230] FIG. 8B is also an example of a mobile phone. The portable information terminal shown in FIG. 8B is For example, in addition to telephone functions, a computer can be built in and various functions can be performed. It may also be equipped with a data processing function.

[0231] The portable information terminal shown in FIG. 8B is composed of two housings, a housing 1800 and a housing 1801. The housing 1800 includes a display panel 1802, a speaker 1803, a microphone, and a 1804, a pointing device 1806, a camera 1807, an external connection terminal 1808, etc. The housing 1801 is equipped with a keyboard 1810, an external memory slot 1811, etc. The antenna is also built into the housing 1801.

[0232] The display panel 1802 is equipped with a touch panel, and in FIG. A plurality of operation keys 1805 are indicated by dotted lines.

[0233] In addition to the above configuration, a non-contact IC chip, a small recording device, etc. may be built in.

[0234] The display device is used as a display panel 1802, and the display direction can be changed appropriately depending on the usage mode. In addition, since the camera 1807 is provided on the same surface as the display panel 1802, The speaker 1803 and microphone 1804 are not limited to voice calls. It can also be used for video calling, recording, playback, etc. , and slide to change from the expanded state to the overlapped state as shown in Figure 8(B). This makes it possible to miniaturize the device for portability.

[0235] The external connection terminal 1808 can be connected to various cables such as charging cables and USB cables. It is possible to charge the battery and to communicate data with a personal computer, etc. By inserting a large-capacity recording medium into the memory slot 1811, it is possible to handle larger amounts of data. We can handle it.

[0236] In addition to the above functions, even if the device has infrared communication function, TV reception function, etc. good.

[0237] FIG. 9A shows an example of a television device. The television device 9600 includes a housing. A display unit 9603 is built into the body 9601. The display unit 9603 displays images. In this embodiment, the housing 9601 is supported by a stand 9605. The configuration is shown.

[0238] The television device 9600 can be operated using an operation switch on the housing 9601 or a separate remote control. This can be done by the remote control operation device 9610. The display unit 9603 can be used to change channels and adjust the volume. The remote control unit 9610 can also be used to control the image displayed on the remote control unit 9610. A display unit 9607 for displaying information output from the computer operating device 9610 may be provided. stomach.

[0239] The television device 9600 includes a receiver and a modem. It can receive more general television broadcasts, and can also be connected to a modem via wired or wireless connection. By connecting to a network, communication can be one-way (sender to receiver) or two-way. It is also possible to communicate information (between a sender and a receiver, or between receivers).

[0240] FIG. 9B shows an example of a digital photo frame. In the frame 9700, a display unit 9703 is incorporated in a housing 9701. 3 is capable of displaying various images, for example images taken with a digital camera. By displaying data, it can function just like a normal photo frame.

[0241] The Digital Photo Frame 9700 includes an operation unit, external connection terminals (USB terminals, etc.), The device is configured with an external memory slot, etc. These components are built into the same surface as the display unit. However, providing it on the side or back is preferable since it improves the design. For example, The external memory slot of the digital photo frame can store image data taken with a digital camera. The image data is then input to a memory that stores the image data, and the input image data is displayed on the display unit 9. 703.

[0242] The digital photo frame 9700 may also be configured to transmit and receive information wirelessly. It is also possible to wirelessly import and display desired image data.

[0243] FIG. 10 shows a portable gaming machine, which is composed of two cabinets, a cabinet 9881 and a cabinet 9891. The housing 9881 includes a display unit 988 and a connector 9893 for connecting the display unit 988 to the housing 9881 in an openable and closable manner. 2 is incorporated in the housing 9891, and a display unit 9883 is incorporated in the housing 9891.

[0244] In addition, the portable gaming machine shown in FIG. 10 also includes a speaker unit 9884 and a recording medium insertion unit 98 86, LED lamp 9890, input means (operation keys 9885, connection terminal 9887, sensor 9888 (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature , chemicals, voice, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, (including functions for measuring vibration, odor, or infrared rays), microphone 9889, etc. Of course, the configuration of the portable gaming machine is not limited to the above, and at least It is sufficient that the device has the thin film transistor disclosed in the document, and other auxiliary equipment is provided as appropriate. The portable game machine shown in FIG. 10 can be configured as follows. The function of reading out the program or data and displaying it on the display unit, and wireless communication with other portable gaming machines The portable game machine shown in FIG. 10 has a function for communicating with the player and sharing information. The functions are not limited to these, and may have a variety of functions.

[0245] As described above, the display device shown in the other embodiment can be used as a display panel for various electronic devices. can be placed in the

[0246] Note that this embodiment mode can be freely combined with other embodiment modes. [Explanation of symbols]

[0247] 400 Substrates 402 Gate insulating layer 404 Oxide semiconductor layer 417 Conductive Layer 422 Source wiring layer 426 Oxide Insulation Layer 427 Insulating Layer 428 Protective Insulation Layer 430 Capacitive wiring layer 431 Capacitive electrode layer 440 Thin Film Transistor 442 Connection electrode layer 443 Channel Formation Region 449 Connection electrode layer 450 Thin Film Transistor 452 Connection electrode layer 453 Color filter layer 456 Planarizing Insulation Layer 458 Overcoat layer 459 Bulkhead 460 Thin Film Transistor 470 Thin Film Transistor 480 Thin Film Transistor 421a Gate electrode layer 421b Gate electrode layer 421c Gate wiring layer 424a High resistance source region 424b High-resistance drain region 424c area 424d area 424e area 424f area 425a Source electrode layer 425b Drain electrode layer 426a Oxide insulating layer 426b Oxide insulating layer 444c area 444d area 445a Source electrode layer 445b Drain electrode layer 446a Oxide conductive layer 446b Oxide conductive layer 451a Gate electrode layer 451b Gate electrode layer 455a Source electrode layer 455b Drain electrode layer 457a Pixel electrode layer 457b Electrode 1100 Mobile Phone 1101 Case 1102 Display section 1103 Operation button 1104 External connection port 1105 Speaker 1106 Mike 1800 Case 1801 Case 1802 Display Panel 1803 Speaker 1804 Microphone 1805 Operation key 1806 Pointing Device 1807 Camera 1808 External connection terminal 1810 Keyboard 1811 External memory slot 4001 Substrate 4002 Pixel section 4003 Signal line driver circuit 4004 Scanning line driver circuit 4005 Sealing material 4006 Substrate 4008 Liquid crystal layer 4010 Thin film transistor 4011 Thin film transistor 4013 Liquid crystal element 4015 Connection terminal electrode 4016 Terminal electrode 4018 FPC 4019 Anisotropic conductive film 4020 Protective insulation layer 4021 Insulation layer 4030 Pixel electrode 4031 Counter electrode 4032 Insulation layer 4040 Conductive layer 4041 Insulation layer 4501 Board 4502 Pixel section 4505 Sealing material 4506 Board 4507 Filling material 4509 Thin-film transistor 4510 Thin-film transistor 4511 Light emitting element 4512 Electroluminescent layer 4513 Electrode 4515 Connection terminal electrode 4516 Terminal electrode 4517 Electrode 4519 Anisotropic conductive film 4520 Bulkhead 4540 Conductive layer 4542 Oxide insulating layer 4543 Overcoat layer 4544 Insulation layer 4545 Color filter layer 4546 Insulation layer 4548 Connection electrode layer 4503a Signal line driver circuit 4503b Signal line driver circuit 4504a Scanning line driver circuit 4504b Scanning line driver circuit 4518a FPC 9600 Television Equipment 9601 Case 9603 Display section 9605 Stand 9607 Display section 9609 Operation key 9610 Remote control device 9700 Digital Photo Frame 9701 Case 9703 Display section 9881 Case 9882 Display section 9883 Display section 9884 Speaker section 9885 Operation key 9886 Recording medium insertion section 9887 Connection terminal 9888 Sensor 9889 Microphone 9890 LED Lamp 9891 Case 9893 Connection section

Claims

[Claim 1] A pixel portion having a transistor and a driver circuit portion are provided on the same substrate. the transistor includes a gate electrode layer over a substrate, a gate insulating layer over the gate electrode layer, an oxide semiconductor layer over the gate insulating layer, an oxide conductive layer over the gate insulating layer and overlapping with a part of the oxide semiconductor layer, a source electrode layer and a drain electrode layer over the oxide conductive layer, and an oxide insulating layer in contact with the oxide semiconductor layer; The display device, wherein the oxide conductive layer has a crystalline region.

Images