Organic light emitting diode display

Abstract

To provide an organic light emitting diode display device.SOLUTION: An organic light emitting diode display device comprises: a substrate; a first voltage line and a second voltage line on the substrate; a first scan line and a second scan line which are sequentially provided in plan view on the substrate; a data line which crosses the first scan line and the second scan line; a first thin film transistor which is connected to the second scan line and the data line and in a periphery of the second scan line; a second thin film transistor which is connected to the first thin film transistor; an OLED which is connected to the first voltage line and the second thin film transistor; a third thin film transistor which is connected to the second thin film transistor, the OLED and the second scan line and in the periphery of the second scan line; a fourth thin film transistor which is connected to the second thin film transistor and the third thin film transistor and in a periphery of the first scan line; and a storage capacitor element which is connected to the second thin film transistor and on an opposite side of the first scan line with respect to the second scan line.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to an organic light-emitting display device. [Background technology]

[0002] An OLED display device includes two electrodes and an organic light-emitting layer located between them. Electrons injected from one electrode and holes injected from the other electrode combine in the organic light-emitting layer to form excitons, which then emit light by releasing energy.

[0003] Such an organic light emitting display device includes a plurality of pixels including an organic light emitting diode (OLED), which is a self-emitting element, and a plurality of thin film transistors and a capacitor for driving the organic light emitting diode are formed in each pixel. The plurality of thin film transistors basically include a switching thin film transistor and a driving thin film transistor.

[0004] For a fast switching operation, the switching thin film transistor forms a thin gate insulating film between the gate electrode and the semiconductor layer. At this time, the thickness of the gate insulating film of the driving thin film transistor formed in the same layer as the switching thin film transistor is also thin, so the driving range of the gate voltage applied to the gate electrode of the driving thin film transistor is narrowed. Therefore, it is difficult to control the gate voltage (Vgs) of the driving thin film transistor to have a rich gray scale. Summary of the Invention [Problem to be solved by the invention]

[0005] The present invention has been made to solve the above-mentioned problems in the related art, and relates to an organic light emitting display device capable of expressing a wide range of gray scales by widening the driving range of a driving thin film transistor. [Means for solving the problem]

[0006] An organic light emitting display device according to an embodiment of the present invention includes a substrate, scan lines formed on the substrate for transmitting scan signals, data lines and driving voltage lines crossing the scan lines for transmitting data signals and driving voltages, respectively, switching thin film transistors connected to the scan lines and the data lines, a driving thin film transistor connected to a switching drain electrode of the switching thin film transistor, and an organic light emitting diode connected to a driving drain electrode of the driving thin film transistor, and a driving semiconductor layer of the driving thin film transistor may be curved.

[0007] The semiconductor device may further include a first gate insulating layer covering the driving semiconductor layer, and a storage capacitor formed on the first gate insulating layer and overlapping the driving semiconductor layer.

[0008] The storage capacitor may include a first storage storage plate formed on the first gate insulating layer and overlapping the driving semiconductor layer, a second gate insulating layer covering the first storage storage plate, and a second storage storage plate formed on the second gate insulating layer and overlapping the first storage storage plate.

[0009] The driving semiconductor layer may include a plurality of bent portions.

[0010] The driving semiconductor layer may include a plurality of first extension portions extending in a first direction and a plurality of second extension portions extending in a second direction different from the first direction, and the bent portion may connect the first extension portions and the second extension portions.

[0011] The display may further include a compensation thin film transistor coupled to the driving thin film transistor for compensating for a threshold voltage of the driving thin film transistor.

[0012] The light emitting device may further include an emission control thin film transistor that is turned on in response to an emission control signal transmitted by an emission control line to transmit a driving voltage from the driving thin film transistor to the organic light emitting diode, and the emission control thin film transistor may be located between a driving drain electrode of the driving thin film transistor and the organic light emitting diode.

[0013] A compensation source electrode of the compensation thin film transistor and an emission control source electrode of the emission control thin film transistor may be connected through a transistor connection part, and the storage capacitor may extend to overlap the transistor connection part.

[0014] The driving semiconductor layer may extend to overlap the transistor connecting portion.

[0015] The transistor connector may be formed in the same layer as the data line, and may be connected to the compensation source electrode and the light emission control source electrode through contact holes formed in the interlayer insulating film.

[0016] The driving semiconductor layer may further include a branch portion branching from the bent portion.

[0017] The storage capacitor may extend to overlap the branch portion.

[0018] The driving semiconductor layer may include a first path semiconductor layer connected to the compensation thin film transistor and a second path semiconductor layer connected to the light emitting control thin film transistor, and a length of the first path semiconductor layer may be shorter than a length of the second path semiconductor layer.

[0019] The storage capacitor may extend to overlap the first path semiconductor layer and the second path semiconductor layer.

[0020] The compensation thin film transistor may further include an interlayer insulating film covering the second storage capacitor plate, a connecting member formed on the interlayer insulating film and connected to the first storage capacitor plate through a contact hole formed in the second gate insulating film and the interlayer insulating film, and a protective film covering the interlayer insulating film and the connecting member, wherein the connecting member is connected to a compensation drain electrode of the compensation thin film transistor.

[0021] The scan lines may be formed in the same layer as the first storage capacitor plate, and the data lines and the driving voltage lines may be formed in the same layer as the connecting members.

[0022] The driving voltage line may be connected to the second storage capacitor plate through a contact hole formed in the interlayer insulating film.

[0023] The light emitting element may further include an operation control thin film transistor that is turned on by an emission control signal transmitted by the emission control line to transmit the driving voltage to the driving thin film transistor, the operation control thin film transistor being located between the driving voltage line and a driving source electrode of the driving thin film transistor.

[0024] The pixel may further include an initialization thin film transistor that is turned on by a previous scan signal previously transmitted through a scan line and transmits an initialization voltage transmitted through an initialization voltage line to a driving gate electrode of the driving thin film transistor, the initialization thin film transistor being located between the initialization voltage line and the driving gate electrode of the driving thin film transistor.

[0025] The light emitting device may further include a bypass thin film transistor that bypasses a portion of the driving current transmitted by the driving thin film transistor in response to a bypass control signal transmitted by a bypass control line, the bypass thin film transistor being located between the initialization voltage line and an emission control drain electrode of the emission control thin film transistor.

[0026] According to another embodiment of the present invention, there is provided an organic light emitting display device including a substrate, scan lines and initialization voltage lines formed on the substrate for transmitting scan signals and initialization voltages, respectively, data lines and driving voltage lines crossing the scan lines for transmitting data signals and driving voltages, respectively, a switching thin film transistor connected to the scan lines and the data lines, a driving thin film transistor connected to a switching drain electrode of the switching thin film transistor, an organic light emitting diode connected to a driving drain electrode of the driving thin film transistor, an emission control thin film transistor located between a driving drain electrode of the driving thin film transistor and the organic light emitting diode, and a bypass thin film transistor located between the initialization voltage line and an emission control drain electrode of the emission control thin film transistor, wherein the bypass thin film transistor may bypass a portion of a driving current transmitted by the driving thin film transistor in response to a bypass control signal transmitted by a bypass control line.

[0027] The driving semiconductor layer of the driving thin film transistor may be curved.

[0028] The semiconductor device may further include a first gate insulating layer covering the driving semiconductor layer, and a storage capacitor formed on the first gate insulating layer and overlapping the driving semiconductor layer.

[0029] The storage capacitor may include a first storage storage plate formed on the first gate insulating layer and overlapping the driving semiconductor layer, a second gate insulating layer covering the first storage storage plate, and a second storage storage plate formed on the second gate insulating layer and overlapping the first storage storage plate.

[0030] The driving semiconductor layer may include a plurality of bent portions, the driving semiconductor layer may include a plurality of first extension portions extending in a first direction and a plurality of second extension portions extending in a second direction different from the first direction, and the bent portions may connect the first extension portions and the second extension portions.

[0031] The display may further include a compensation thin film transistor coupled to the driving thin film transistor for compensating for a threshold voltage of the driving thin film transistor.

[0032] The compensation thin film transistor may further include an interlayer insulating film covering the second storage capacitor plate, a connecting member formed on the interlayer insulating film and connected to the first storage capacitor plate through a contact hole formed in the second gate insulating film and the interlayer insulating film, and a protective film covering the interlayer insulating film and the connecting member, wherein the connecting member is connected to a compensation drain electrode of the compensation thin film transistor.

[0033] The scan lines may be formed in the same layer as the first storage capacitor plates, and the data lines and the driving voltage lines may be formed in the same layer as the connecting members.

[0034] The driving voltage line may be connected to the second storage capacitor plate through a contact hole formed in the interlayer insulating film. Effect of the Invention

[0035] According to the present invention, by forming a driving semiconductor layer including a plurality of bends, the driving channel region of the driving semiconductor layer can be formed long, thereby widening the driving range of the gate voltage applied to the driving gate electrode.

[0036] Therefore, since the driving range of the gate voltage is wide, the magnitude of the gate voltage can be changed to more precisely control the gray scale of light emitted from the OLED, thereby increasing the resolution of the OLED display and improving the display quality.

[0037] In addition, in order to secure the area of ​​the storage capacitor reduced by the driving semiconductor layer having the bent portion, the storage capacitor is formed overlapping the driving semiconductor layer, so that the storage capacitance can be sufficiently secured even at high resolution.

[0038] Furthermore, by forming the length of the first path semiconductor layer connected to the compensation thin film transistor shorter than the length of the second path semiconductor layer connected to the emission control thin film transistor, low-level gradation unevenness can be prevented. [Brief description of the drawings]

[0039] [Figure 1] 1 is an equivalent circuit diagram of one pixel of an organic light emitting display device according to a first embodiment of the present invention. [Diagram 2] 2 is a diagram illustrating the positions of a plurality of thin film transistors and capacitors in the organic light emitting display device according to the first embodiment of the present invention; [Diagram 3] 2 is a detailed layout diagram of one pixel of the organic light emitting display device according to the first embodiment of the present invention; FIG. [Figure 4] 4 is a cross-sectional view of the organic light-emitting display device of FIG. 3 taken along line IV-IV. [Diagram 5] 4 is a cross-sectional view of the organic light-emitting display device of FIG. 3 taken along line VV. [Figure 6] 6 is an enlarged layout diagram of a driving thin film transistor of an organic light emitting display device according to a second embodiment of the present invention. FIG. [Figure 7] FIG. 11 is a layout diagram of an organic light emitting display device according to a third embodiment of the present invention. [Figure 8] 10 is an enlarged layout view of a driving thin film transistor of an organic light emitting display device according to a fourth embodiment of the present invention. [Figure 9] 13 is an enlarged layout diagram of a driving thin film transistor of an organic light emitting display device according to a fifth embodiment of the present invention. FIG. [Figure 10] FIG. 13 is an equivalent circuit diagram of one pixel of an organic light-emitting display device according to a sixth embodiment of the present invention. [Figure 11] FIG. 13 is a layout diagram of an organic light emitting display device according to a sixth embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0040] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention may be embodied in various different forms and should not be construed as limited to the embodiments set forth herein, but rather may be practiced in a variety of different ways, including, but not limited to, the embodiments described herein.

[0041] In order to clearly explain the present invention, parts that are not necessary for the description will be omitted, and the same reference numerals will be given to the same or similar components throughout the specification.

[0042] Furthermore, the size and thickness of each component shown in the drawings are arbitrarily shown for convenience of explanation, and the present invention is not necessarily limited to those shown.

[0043] In the drawings, the thicknesses of various layers and regions are exaggerated to clearly show the layers and regions. Also, in the drawings, the thicknesses of some layers and regions are exaggerated for the convenience of explanation. When a layer, film, region, plate, or other part is described as being "on" another part, this does not only include the case where the part is "directly on" the other part, but also includes the case where another part exists between them.

[0044] In addition, throughout the specification, when a part "comprises" a certain component, this does not mean excluding other components, but further includes other components, unless otherwise specified. Furthermore, throughout the specification, the expression "on" means located above or below the target part, and does not necessarily mean located on the upper side based on the direction of gravity.

[0045] Hereinafter, an organic light emitting display device according to a first embodiment of the present invention will be described in detail with reference to FIGS.

[0046] FIG. 1 is an equivalent circuit diagram of one pixel of an organic light emitting display device according to a first embodiment of the present invention.

[0047] As shown in FIG. 1, one pixel of the organic light emitting display device according to the first embodiment of the present invention includes a plurality of signal lines 121, 122, 123, 124, 171, 172, a plurality of thin film transistors (T1, T2, T3, T4, T5, T6) connected to the plurality of signal lines, a storage capacitor (Cst), and an organic light emitting diode (OLED).

[0048] The thin film transistors include a driving thin film transistor (T1), a switching thin film transistor (T2), a compensation thin film transistor (T3), an initialization thin film transistor (T4), an operation control thin film transistor (T5), and an emission control thin film transistor (T6).

[0049] The signal lines include a scan line 121 for transmitting a scan signal (Sn), a previous scan line 122 for transmitting a previous scan signal (Sn-1) to the initialization thin film transistor (T4), an emission control line 123 for transmitting an emission control signal (En) to the operation control thin film transistor (T5) and the emission control thin film transistor (T6), a data line 171 for transmitting a data signal (Dm) across the scan line 121, a driving voltage line 172 for transmitting a driving voltage (ELVDD) and formed approximately parallel to the data line 171, and an initialization voltage line 124 for transmitting an initialization voltage (Vint) for initializing the driving thin film transistor (T1).

[0050] The gate electrode (G1) of the driving thin film transistor (T1) is connected to one end (Cst1) of the storage capacitor (Cst), the source electrode (S1) of the driving thin film transistor (T1) is connected to the driving voltage line 172 via the operation control thin film transistor (T5), and the drain electrode (D1) of the driving thin film transistor (T1) is electrically connected to the anode of the organic light emitting diode (OLED) via the emission control thin film transistor (T6). The driving thin film transistor (T1) receives a data signal (Dm) by the switching operation of the switching thin film transistor (T2) and supplies a driving current (Id) to the organic light emitting diode (OLED).

[0051] A gate electrode (G2) of the switching thin film transistor (T2) is connected to the scan line 121, a source electrode (S2) of the switching thin film transistor (T2) is connected to the data line 171, and a drain electrode (D2) of the switching thin film transistor (T2) is connected to a source electrode (S1) of the driving thin film transistor (T1) and also connected to a driving voltage line 172 via an operation control thin film transistor (T5). The switching thin film transistor (T2) is turned on by a scan signal (Sn) transmitted through the scan line 121, and performs a switching operation of transmitting a data signal (Dm) transmitted to the data line 171 to the source electrode of the driving thin film transistor (T1).

[0052] The gate electrode (G3) of the compensation thin film transistor (T3) is connected to the scan line 121, and the source electrode (S3) of the compensation thin film transistor (T3) is connected to the drain electrode (D1) of the driving thin film transistor (T1) and is connected to the anode (anode) of the organic light emitting diode (OLED) via the light emitting control thin film transistor (T6), and the drain electrode (D3) of the compensation thin film transistor (T3) is connected to one end (Cst1) of the storage capacitor (Cst), the drain electrode (D4) of the initialization thin film transistor (T4), and the gate electrode (G1) of the driving thin film transistor (T1). The compensation thin film transistor (T3) is turned on by the scan signal (Sn) transmitted through the scan line 121 to connect the gate electrode (G1) and drain electrode (D1) of the driving thin film transistor (T1) to each other, thereby diode-connecting the driving thin film transistor (T1).

[0053] The gate electrode (G4) of the initialization thin film transistor (T4) is connected to the previous scan line 122, the source electrode (S4) of the initialization thin film transistor (T4) is connected to the initialization voltage line 124, and the drain electrode (D4) of the initialization thin film transistor (T4) is connected to one end (Cst1) of the storage capacitor (Cst), the drain electrode (D3) of the compensation thin film transistor (T3), and the gate electrode (G1) of the driving thin film transistor (T1). The initialization thin film transistor (T4) is turned on by the previous scan signal (Sn-1) transmitted through the previous scan line 122, and transmits the initialization voltage (Vint) to the gate electrode (G1) of the driving thin film transistor (T1), thereby performing an initialization operation of initializing the voltage of the gate electrode (G1) of the driving thin film transistor (T1).

[0054] The gate electrode (G5) of the operation control thin film transistor (T5) is connected to the emission control line 123, the source electrode (S5) of the operation control thin film transistor (T5) is connected to the driving voltage line 172, and the drain electrode (D5) of the operation control thin film transistor (T5) is connected to the source electrode (S1) of the driving thin film transistor (T1) and the drain electrode (S2) of the switching thin film transistor (T2).

[0055] The gate electrode (G6) of the emission control thin film transistor (T6) is connected to the emission control line 123, the source electrode (S6) of the emission control thin film transistor (T6) is connected to the drain electrode (D1) of the driving thin film transistor (T1) and the source electrode (S3) of the compensation thin film transistor (T3), and the drain electrode (D6) of the emission control thin film transistor (T6) is electrically connected to the anode of the organic light emitting diode (OLED). The operation control thin film transistor (T5) and the emission control thin film transistor (T6) are simultaneously turned on by the emission control signal (En) transmitted through the emission control line 123, and the driving voltage (ELVDD) is transmitted to the organic light emitting diode (OLED), causing a driving current (Id) to flow through the organic light emitting diode (OLED).

[0056] The other end (Cst2) of the storage capacitor (Cst) is connected to the driving voltage line 172, and the cathode (cathode) of the organic light emitting diode (OLED) is connected to the common voltage (ELVSS). Thus, the organic light emitting diode (OLED) displays an image by emitting light when a driving current (Id) is transmitted from the driving thin film transistor (T1).

[0057] Hereinafter, a specific operation process of one pixel of the organic light emitting display device according to the first embodiment of the present invention will be described in detail.

[0058] First, in an initialization period, a previous scan signal (Sn-1) of low level is supplied through a previous scan line 122. Then, the initialization thin film transistor (T4) is turned on in response to the previous scan signal (Sn-1) of low level, and an initialization voltage (Vint) is applied from the initialization voltage line 124 through the initialization thin film transistor (T4) to the gate electrode of the driving thin film transistor (T1), and the driving thin film transistor (T1) is initialized by the initialization voltage (Vint).

[0059] Thereafter, during a data programming period, a low level scan signal (Sn) is supplied through the scan line 121. Thus, the switching thin film transistor (T2) and the compensation thin film transistor (T3) are turned on in response to the low level scan signal (Sn).

[0060] At this time, the driving thin film transistor T1 is diode-connected by the turned-on compensation thin film transistor T3 and is forward-biased.

[0061] Then, a compensation voltage (Dm+Vth, Vth is a negative value) that is reduced by the threshold voltage (Vth) of the driving thin film transistor (T1) based on the data signal (Dm) supplied from the data line 171 is applied to the gate electrode of the driving thin film transistor (T1).

[0062] The driving voltage (ELVDD) and the compensation voltage (Dm+Vth) are applied to both ends of the storage capacitor (Cst), and a charge corresponding to the voltage difference between both ends is stored in the storage capacitor (Cst). After this, the light emission control signal (En) supplied from the light emission control line 123 during the light emission period changes from high level to low level. As a result, during the light emission period, the operation control thin film transistor (T5) and the light emission control thin film transistor (T6) are turned on by the low level light emission control signal (En).

[0063] Thereafter, a driving current (Id) is generated by the voltage difference between the gate electrode voltage of the driving thin film transistor (T1) and the driving voltage (ELVDD), and the driving current (Id) is supplied to the organic light emitting diode (OLED) through the light emission control thin film transistor (T6). During the light emission period, the gate-source voltage (Vgs) of the driving thin film transistor (T1) is maintained at (Dm+Vth)-ELVDD by the storage capacitor (Cst), and according to the current-voltage relationship of the driving thin film transistor (T1), the driving current (Id) is proportional to the square of the source-gate voltage minus the threshold voltage (Dm-ELVDD)2. Therefore, the driving current (Id) is determined regardless of the threshold voltage (Vth) of the driving thin film transistor (T1).

[0064] Now, the detailed structure of the pixel of the organic light-emitting display device shown in FIG. 1 will be described in detail with reference to FIGS. 2 to 5 together with FIG.

[0065] Figure 2 is a diagram illustrating the positions of a plurality of thin film transistors and capacitors in an organic light emitting display according to a first embodiment of the present invention. Figure 3 is a detailed layout diagram of one pixel in an organic light emitting display according to a first embodiment of the present invention. Figure 4 is a cross-sectional view of the organic light emitting display of Figure 3 taken along line IV-IV. Figure 5 is a cross-sectional view of the organic light emitting display of Figure 3 taken along line VV.

[0066] As shown in FIGS. 2 to 5, a pixel of the organic light emitting display device according to the first embodiment of the present invention includes a scan line 121, a previous scan line 122, an emission control line 123, and an initialization voltage line 124 that are formed along a row direction and apply a scan signal (Sn), a previous scan signal (Sn-1), an emission control signal (En), and an initialization voltage (Vint), respectively, and includes a data line 171 and a driving voltage line 172 that intersect with the scan line 121, the previous scan line 122, the emission control line 123, and the initialization voltage line 124 and apply a data signal (Dm) and a driving voltage (ELVDD) to the pixel, respectively.

[0067] In addition, the pixel includes a driving thin film transistor (T1), a switching thin film transistor (T2), a compensation thin film transistor (T3), an initialization thin film transistor (T4), an operation control thin film transistor (T5), an emission control thin film transistor (T6), a storage capacitor (Cst), or an organic light emitting diode (OLED) 70.

[0068] The driving thin film transistor (T1), the switching thin film transistor (T2), the compensation thin film transistor (T3), the initialization thin film transistor (T4), the operation control thin film transistor (T5), and the emission control thin film transistor (T6) are formed along the semiconductor layer 131, and the semiconductor layer 131 is formed to be bent in various shapes. The semiconductor layer 131 is made of polysilicon and includes a channel region that is not doped with impurities, and a source region and a drain region that are doped with impurities on both sides of the channel region. Here, the impurities vary depending on the type of thin film transistor, and can be N-type impurities or P-type impurities. Such semiconductor layers include a driving semiconductor layer 131a formed in the driving thin film transistor (T1), a switching semiconductor layer 131b formed in the switching thin film transistor (T2), a compensation semiconductor layer 131c formed in the compensation thin film transistor (T3), an initialization semiconductor layer 131d formed in the initialization thin film transistor (T4), an operation control semiconductor layer 131e formed in the operation control thin film transistor (T5), and an emission control semiconductor layer 131f formed in the emission control thin film transistor (T6).

[0069] The driving thin film transistor (T1) includes a driving semiconductor layer 131a, a driving gate electrode 125a, a driving source electrode 176a, and a driving drain electrode 177a. The driving semiconductor layer 131a is bent. The driving semiconductor layer 131a includes a plurality of first extensions 31 extending in a first direction, a plurality of second extensions 32 extending in a second direction different from the first direction, and a plurality of bent portions 33 connecting the first extensions 31 and the second extensions 32. Therefore, the driving semiconductor layer 131a may be arranged in a zigzag shape. The driving semiconductor layer 131a shown in FIG. 2 and FIG. 3 includes three first extensions 31, two second extensions 32, and four bent portions 33. Therefore, the driving semiconductor layer 131a is arranged in a long "V" shape.

[0070] In this manner, by forming the driving semiconductor layer 131a including the plurality of bent portions 33, the driving semiconductor layer 131a can be formed long in a narrow space. Therefore, the driving channel region 131a1 of the driving semiconductor layer 131a can be formed long, and the driving range of the gate voltage applied to the driving gate electrode 125a is widened. Therefore, since the driving range of the gate voltage is widened, the magnitude of the gate voltage can be changed to more precisely control the gray scale of the light emitted from the organic light emitting diode (OLED), and as a result, the resolution of the organic light emitting display device can be increased to improve the display quality.

[0071] The driving semiconductor layer 131a may have various shapes such as "S", "M", and "W" by arranging the first extension 31, the second extension 32, and the bent portion 33 in various ways.

[0072] FIG. 6 is an enlarged layout view of a driving thin film transistor of an organic light emitting display device according to a second embodiment of the present invention.

[0073] As shown in FIG. 6, the driving semiconductor layers 131a may be arranged in an "S" shape.

[0074] Meanwhile, the driving source electrode 176a corresponds to a driving source region 176a doped with impurities in the driving semiconductor layer 131a, and the driving drain electrode 177a corresponds to a driving drain region 177a doped with impurities in the driving semiconductor layer 131a. A storage capacitor Cst is formed on the driving gate electrode 125a to overlap therewith.

[0075] The storage capacitor (Cst) includes a first storage storage plate 125a and a second storage storage plate 127 disposed with a second gate insulating film 142 therebetween. Here, the driving gate electrode 125a also functions as the first storage storage plate 125a, and the second gate insulating film 142 serves as a dielectric. The storage capacitance is determined by the charge stored in the storage capacitor (Cst) and the voltage between the two storage plates 125a and 127.

[0076] The first storage capacitor plate 125a is formed in a rectangular shape separated from the adjacent pixels, and is formed in the same layer and made of the same material as the scan line 121, the previous scan line 122, the emission control line 123, the switching gate electrode 125b, the compensation gate electrode 125c, the operation control gate electrode 125e, and the emission control gate electrode 125f.

[0077] The second storage capacitor plate 127 is connected to an adjacent pixel and is formed in the same layer and of the same material as the initialization voltage line 124 .

[0078] In this way, in order to secure the area of ​​the storage capacitor reduced by the driving semiconductor layer 131a having the bent portion, the storage capacitor is formed overlapping the driving semiconductor layer 131a, so that the storage capacitance can be secured even at high resolution.

[0079] The switching thin film transistor T2 includes a switching semiconductor layer 131b, a switching gate electrode 125b, a switching source electrode 176b, and a switching drain electrode 177b. The switching source electrode 176b is a portion protruding from the data line 171, and the switching drain electrode 177b corresponds to a switching drain region 177b doped with impurities in the switching semiconductor layer 131b.

[0080] The compensation thin film transistor T3 includes a compensation semiconductor layer 131c, a compensation gate electrode 125c, a compensation source electrode 176c, and a compensation drain electrode 177c, where the compensation source electrode 176c corresponds to the compensation source region 176c doped with impurities in the compensation semiconductor layer 131c, and the compensation drain electrode 177c corresponds to the compensation drain region 177c doped with impurities in the compensation semiconductor layer 131c. The compensation gate electrode 125c forms a separate dual gate electrode 25 to prevent leakage current.

[0081] The initialization thin film transistor T4 includes an initialization semiconductor layer 131d, an initialization gate electrode 125d, an initialization source electrode 176d, and an initialization drain electrode 177d. The initialization drain electrode 177d corresponds to an initialization drain region 177d doped with impurities in the initialization semiconductor layer 131d. The initialization source electrode 176d is connected to the initialization voltage line 124 through an initialization connection line 78. One end of the initialization connection line 78 is connected to the initialization voltage line 124 through a contact hole 161 formed in the second gate insulating film 142 and the interlayer insulating film 160, and the other end of the initialization connection line 78 is connected to the initialization source electrode 176d through the contact hole 161 formed in the gate insulating film 141, the second gate insulating film 142, and the interlayer insulating film 160.

[0082] The action control thin film transistor (T5) includes an action control semiconductor layer 131e, an action control gate electrode 125e, an action control source electrode 176e, and an action control drain electrode 177e. The action control source electrode 176e is a part of the driving voltage line 172, and the action control drain electrode 177e corresponds to an action control drain region 177e doped with impurities in the action control semiconductor layer 131e.

[0083] The emission control thin film transistor T6 includes an emission control semiconductor layer 131f, an emission control gate electrode 125f, an emission control source electrode 176f, and an emission control drain electrode 177f. The emission control source electrode 176f corresponds to an emission control source region 176f doped with impurities in the emission control semiconductor layer 131f.

[0084] One end of the driving semiconductor layer 131a of the driving thin film transistor (T1) is connected to the switching semiconductor layer 131b and the compensation semiconductor layer 131c, and the other end of the driving semiconductor layer 131a is connected to the operation control semiconductor layer 131e and the emission control semiconductor layer 131f. Therefore, the driving source electrode 176a is connected to the switching drain electrode 177b and the operation control drain electrode 177e, and the driving drain electrode 177a is connected to the compensation source electrode 176c and the emission control source electrode 176f.

[0085] The first storage capacitor plate 125a of the storage capacitor Cst is connected to the compensation drain electrode 177c and the initialization drain electrode 177d through a connecting member 174. The connecting member 174 is formed in the same layer as the data line 171, and one end of the connecting member 174 is connected to the compensation drain electrode 177c and the initialization drain electrode 177d through a contact hole 166 formed in the first gate insulating film 141, the second gate insulating film 142, and the interlayer insulating film 160, and the other end of the connecting member 174 is connected to the first storage capacitor plate 125a through a contact hole 167 formed in the second gate insulating film 142 and the interlayer insulating film 160. At this time, the other end of the connecting member 174 is connected to the first storage capacitor plate 125a through a storage opening 27 formed in the second storage capacitor plate 127.

[0086] The second storage capacitor plate 127 of the storage capacitor Cst is connected to the common voltage line 172 through a contact hole 168 formed in the interlayer insulating film 160 .

[0087] Meanwhile, the switching thin film transistor (T2) is used as a switching element for selecting a pixel to be made to emit light. The switching gate electrode 125b is connected to the scan line 121, the switching source electrode 176b is connected to the data line 171, and the switching drain electrode 177b is connected to the driving thin film transistor (T1) and the operation control thin film transistor (T5). In addition, the emission control drain electrode 177f of the emission control thin film transistor (T6) is directly connected to the pixel electrode 191 of the organic light emitting diode 70 through a contact hole 181 formed in the passivation film 180.

[0088] Hereinafter, the structure of the organic light emitting display device according to the first embodiment of the present invention will be described in detail in accordance with the lamination order with reference to FIG. 4 and FIG.

[0089] Here, the structure of the thin film transistors will be described focusing on the driving thin film transistor (T1), the switching thin film transistor (T2), and the light-emitting control thin film transistor (T6). The remaining thin film transistors (T3, T4, T5) have almost the same stacked structure as the driving thin film transistor (T1), the switching thin film transistor (T2), and the light-emitting control thin film transistor (T6), so detailed description will be omitted.

[0090] A buffer layer 111 is formed on a substrate 110, which is formed of an insulating substrate made of glass, quartz, ceramic, plastic, or the like.

[0091] A driving semiconductor layer 131a, a switching semiconductor layer 131b, and an emission control semiconductor layer 131f are formed on the buffer layer 111. The driving semiconductor layer 131a includes a driving channel region 131a1 and a driving source region 176a and a driving drain region 177a that face each other with the driving channel region 131a1 therebetween, the switching semiconductor layer 131b includes a switching channel region 131b1 and a switching source region 132b and a switching drain region 177b that face each other with the switching channel region 131b1 therebetween, and the emission control thin film transistor (T6) includes an emission control channel region 131f1, an emission control source region 176f, and an emission control drain region 133f.

[0092] The driving semiconductor layer 131a includes a plurality of bent portions 33 and is formed in a zigzag shape, specifically, in a "V" shape, so that it can be formed long in a narrow space. Therefore, the driving channel region 131a1 of the driving semiconductor layer 131a can be formed long, so that the driving range of the gate voltage applied to the driving gate electrode 125a becomes wide.

[0093] A first gate insulating film 141 made of silicon nitride (SiNx), silicon oxide (SiO2), or the like is formed on the switching semiconductor layer 131a, the driving semiconductor layer 131b, and the light emission control semiconductor layer 131f.

[0094] On the first gate insulating film 141, a first gate wiring is formed, including a scan line 121 including a driving gate electrode 125a, a switching gate electrode 125b, and a compensation gate electrode 125c, a previous scan line 122 including an initialization gate electrode 125d, and an emission control line 123 including an operation control gate electrode 125e and an emission control gate electrode 125f.

[0095] The driving gate electrode 125a is separated from the scan line 121, and the floating gate electrode 25 overlaps with the driving channel region 131a1 of the driving semiconductor layer 131a. The switching gate electrode 125a is connected to the scan line 121, and the switching gate electrode 125b overlaps with the switching channel region 131b1 of the switching semiconductor layer 131b. The emission control gate electrode 125f overlaps with the emission control channel region 131f1 of the emission control semiconductor layer 131f.

[0096] In this case, the switching thin film transistor (T2) is capable of rapid switching operation since only the first gate insulating film 141 is formed between the switching gate electrode 125b and the switching semiconductor layer 131b, and the driving thin film transistor (T1) is capable of rapid switching operation since only the first gate insulating film 141 is formed between the driving gate electrode 125a and the driving semiconductor layer 131a but the driving channel region 131a1 of the driving semiconductor layer 131a is long, so that the driving range of the gate voltage applied to the driving gate electrode 125a is widened and the gradation of the light emitted from the organic light emitting diode (OLED) can be controlled more precisely.

[0097] The first gate wirings 125a, 125b, 125c, 125d, 125e, 125f, 121, 122, and 123 and the first gate insulating film 141 are covered with a second gate insulating film 142. The second gate insulating film 142 is formed of silicon nitride (SiNx), silicon oxide (SiO2), or the like.

[0098] A second gate wiring including a second storage capacitor plate 127 and an initialization voltage line 124 is formed on the second gate insulating film 142. The second storage capacitor plate 127 overlaps with the first storage capacitor plate 125a to form a storage capacitor (Cst), and the first storage capacitor plate 125a overlaps with the driving semiconductor layer 131a. By forming the storage capacitor (Cst) by overlapping with the driving semiconductor layer 131a in this manner, the area of ​​the storage capacitor (Cst) reduced by the driving semiconductor layer 131a having the bent portion 33 is secured, and it is possible to secure storage capacitance even at a high resolution where the pixel size is reduced.

[0099] Meanwhile, an interlayer insulating film 160 is formed on the second gate insulating film 142, the second storage capacitor plate 127, and the initialization voltage line 124. The first gate insulating film 141, the second gate insulating film 142, and the interlayer insulating film 160 have a contact hole 163 exposing the emission control drain region 131f1 of the emission control semiconductor layer 131f. The interlayer insulating film 160, like the first gate insulating film 141 and the second gate insulating film 142, is made of a ceramic-based material such as silicon nitride (SiNx) or silicon oxide (SiO2).

[0100] On the interlayer insulating film 160, a data line 171 including a switching source electrode 176b, a driving voltage line 172, a connecting member 174, and a data wiring including a light emission control drain electrode 177f are formed.

[0101] In addition, the switching source electrode 176b and the emission control drain electrode 177f are respectively connected to the switching source region 131b1 of the switching semiconductor layer 131b and the emission control drain region 131f1 of the emission control semiconductor layer 131f through contact holes 162, 163 formed in the interlayer insulating film 160, the first gate insulating film 141, and the second gate insulating film 142.

[0102] A protective layer 180 covering the data lines 171, 172, 174, and 177f is formed on the interlayer insulating layer 160, and a pixel electrode 191 is formed on the protective layer 180. The pixel electrode 191 is connected to the emission control drain electrode 177f through a contact hole 181 formed in the protective layer 180.

[0103] A partition 350 is formed on the periphery of the pixel electrode 191 and on the protective film 180, and the partition 350 has a partition opening 351 exposing the pixel electrode 191. The partition 350 may be made of a resin such as a polyacrylates resin or a polyimides, or a silica-based inorganic material.

[0104] An organic light emitting layer 370 is formed on the pixel electrode 191 exposed through the partition opening 351, and a common electrode 270 is formed on the organic light emitting layer 370. In this manner, an organic light emitting diode 70 including the pixel electrode 191, the organic light emitting layer 370, and the common electrode 270 is formed.

[0105] Here, pixel electrode 191 is an anode of a hole injection electrode, and common electrode 270 is a cathode of an electron injection electrode. However, an embodiment according to the present invention is not necessarily limited thereto, and pixel electrode 191 may be a cathode and common electrode 270 may be an anode depending on a driving method of the OLED display. Holes and electrons are injected from pixel electrode 191 and common electrode 270, respectively, into organic light emitting layer 370, and light is emitted when excitons formed by combining the injected holes and electrons fall from an excited state to a ground state.

[0106] The organic light emitting layer 370 is made of a low molecular weight organic material or a polymer organic material such as PEDOT (Poly 3,4-ethylenedioxythiophene). The organic light emitting layer 370 may be formed of a multi-layer including a light emitting layer and one or more of a hole injection layer (HIL), a hole transporting layer (HTL), an electron transporting layer (ETL), and an electron injection layer (EIL). When all of these are included, the hole injection layer is disposed on the positive pixel electrode 710, and the hole transport layer, the light emitting layer, the electron transport layer, and the electron injection layer are laminated in this order thereon. The common electrode 270 is formed of a reflective conductive material, so that the organic light emitting display device is a bottom emission type. Reflective materials may include materials such as lithium (Li), calcium (Ca), lithium / calcium fluoride (LiF / Ca), lithium / aluminum fluoride (LiF / Al), aluminum (Al), silver (Ag), magnesium (Mg), or gold (Au).

[0107] Meanwhile, in the first embodiment, the first storage capacitor plate 125a has a rectangular shape. However, a third embodiment may be possible in which a portion of the first storage capacitor plate 125a is expanded to increase the storage capacitance.

[0108] Hereinafter, the organic light emitting display device according to the third embodiment of the present invention will be described in detail with reference to FIG.

[0109] FIG. 7 is a layout diagram of an organic light emitting display device according to a third embodiment of the present invention.

[0110] The third embodiment is substantially the same as the first embodiment shown in FIGS. 1 to 5 except for the driving semiconductor layer and the storage capacitor, and therefore a repeated description will be omitted.

[0111] 7, the driving thin film transistor (T1) of the organic light emitting display device according to the third embodiment of the present invention includes a driving semiconductor layer 131a, a driving gate electrode 125a, a driving source electrode 176a, and a driving drain electrode 177a. The driving semiconductor layer 131a is curved. The driving semiconductor layer 131a includes a plurality of first extensions 31 extending in a first direction, a plurality of second extensions 32 extending in a second direction different from the first direction, and a plurality of bent portions 33 connecting the first extensions 31 and the second extensions 32.

[0112] The driving semiconductor layer 131a may extend laterally to be adjacent to the data line 171. Since the length of the driving semiconductor layer 131a is increased, the driving range of the gate voltage applied to the driving gate electrode 125a can be further increased.

[0113] At this time, the compensation source electrode 176c of the compensation thin film transistor (T3) and the emission control source electrode 176f of the emission control thin film transistor (T6) are formed in the same layer, but the compensation source electrode 176c and the emission control source electrode 176f are separated from each other by a separation portion (d) so as not to overlap with the driving semiconductor layer 131a.

[0114] The driving gate electrode 125a, i.e., the first storage capacitor plate 125a, extends laterally to overlap the extended driving semiconductor layer 131a, and the first storage capacitor plate 125a partially overlaps the separated portion (d). The second storage capacitor plate 127 also extends laterally to overlap the first storage capacitor plate 125a, and the second storage capacitor plate 127 partially overlaps the separated portion (d).

[0115] The compensation source electrode 176c and the emission control source electrode 176f, which are separated from each other, are connected through a transistor connector 71 formed in the same layer as the data line 171. One end of the transistor connector 71 is connected to the compensation source electrode 176c through a contact hole 61 formed in the first gate insulating film 141, the second gate insulating film 142, and the interlayer insulating film 160, and the other end of the transistor connector 71 is connected to the emission control source electrode 176f through a contact hole 62 formed in the first gate insulating film 141, the second gate insulating film 142, and the interlayer insulating film 160. Therefore, the storage capacitor (Cct) extends to overlap the transistor connector 71, and the driving semiconductor layer 131a extends to overlap the transistor connector 71.

[0116] In this manner, by connecting the compensation source electrode 176c and the emission control source electrode 176f through the transistor connection part 71, the driving semiconductor layer 131a, the first storage capacitor plate 125a, and the second storage capacitor plate 127 can be extended to the separation part (d) between the compensation source electrode 176c and the emission control source electrode 176f, thereby further expanding the storage capacitor (Cst).

[0117] Meanwhile, in the first embodiment, the driving semiconductor layer is not directly connected to the compensation source electrode at the bent portion, but a fourth embodiment may be possible in which the driving semiconductor layer further includes a branch portion that branches directly to the compensation source electrode at the bent portion.

[0118] Hereinafter, the organic light emitting display device according to the fourth embodiment of the present invention will be described in detail with reference to FIG.

[0119] FIG. 8 is an enlarged layout view of a driving thin film transistor of an organic light emitting display device according to a fourth embodiment of the present invention.

[0120] The fourth embodiment is substantially the same as the first embodiment shown in FIGS. 1 to 5 except for the driving semiconductor layer and the storage capacitor, and therefore a repeated description will be omitted.

[0121] As shown in FIG. 8, the driving thin film transistor (T1) of the organic light emitting display device according to the fourth embodiment of the present invention includes a driving semiconductor layer 131a, a driving gate electrode 125a, a driving source electrode 176a, and a driving drain electrode 177a. The driving semiconductor layer 131a is bent. The driving semiconductor layer 131a includes a first extension portion 31 extending in a first direction, a second extension portion 32 extending in a second direction different from the first direction, a bent portion 33 connecting the first extension portion 31 and the second extension portion 32, and a branch portion 34 branching directly to the compensation source electrode 176c at the bent portion. The driving semiconductor layer 131a has an overall "┤" shape (the opposite shape of the letter "T"). As a result, the length of the driving semiconductor layer 131a is increased, and thus the driving range of the gate voltage applied to the driving gate electrode 125a can be further expanded.

[0122] The branch portion 34 corresponds to a first path semiconductor layer (CH1) connected to the compensation thin film transistor (T3), and the second extension portion 32 corresponds to a second path semiconductor layer (CH2) connected to the light emitting control thin film transistor (T6). In addition, the driving gate electrode, i.e., the first storage capacitor plate 125a overlaps with the first path semiconductor layer (CH1) and the second path semiconductor layer (CH2) of the driving semiconductor layer 131a, and the second storage capacitor plate 127 overlaps with the first storage capacitor plate 125a. As a result, the area of ​​the storage capacitor (Cst) is increased, and therefore the storage capacitance can be easily ensured even at high resolution.

[0123] Meanwhile, in the fourth embodiment, the lengths of the first path semiconductor layer (CH1) and the second path semiconductor layer (CH2) are the same, but a fifth embodiment is also possible in which the lengths of the first path semiconductor layer (CH1) and the second path semiconductor layer (CH2) are different from each other.

[0124] Hereinafter, the organic light emitting display device according to the fifth embodiment of the present invention will be described in detail with reference to FIG.

[0125] FIG. 9 is an enlarged layout view of a driving thin film transistor of an organic light emitting display device according to a fifth embodiment of the present invention.

[0126] The fifth embodiment is substantially the same as the fourth embodiment shown in FIG. 8 except for the driving semiconductor layer and the storage capacitor, and therefore a repeated description will be omitted.

[0127] As shown in FIG. 9, the driving thin film transistor (T1) of the organic light emitting display device according to the fifth embodiment of the present invention includes a driving semiconductor layer 131a, a driving gate electrode 125a, a driving source electrode 176a, and a driving drain electrode 177a. The driving semiconductor layer 131a is bent. The driving semiconductor layer 131a includes a first extension portion 31 extending in a first direction, a second extension portion 32 extending in a second direction different from the first direction, a bent portion 33 connecting the first extension portion 31 and the second extension portion 32, and a branch portion 34 branching directly to the compensation source electrode 176c at the bent portion. As a result, the length of the driving semiconductor layer 131a is increased, and thus the driving range of the gate voltage applied to the driving gate electrode 125a can be further increased.

[0128] The branch portion 34 corresponds to a first path semiconductor layer (CH1) connected to the compensation thin film transistor (T3), and the zigzag portion 30 including the first extension portion 31, the second extension portion 32, and the bent portion 33 corresponds to a second path semiconductor layer (CH2) connected to the light emitting control thin film transistor (T6). In addition, the driving gate electrode, i.e., the first storage capacitor plate 125a overlaps with the first path semiconductor layer (CH1) and the second path semiconductor layer (CH2) of the driving semiconductor layer 131a, and the second storage capacitor plate 127 overlaps with the first storage capacitor plate 125a. Therefore, the area of ​​the storage capacitor (Cst) is increased, so that the storage capacitance can be easily secured even at high resolution.

[0129] Also, the length of the first path semiconductor layer (CH1) is shorter than the length of the second path semiconductor layer (CH2). This structure is called a short pass diode structure, and since the length of the first path semiconductor layer (CH1) and the length of the second path semiconductor layer (CH2) are different from each other, currents of different magnitudes flow simultaneously. Since the length of the first path semiconductor layer (CH1) is short, a relatively large current flows, and since the length of the second path semiconductor layer (CH2) is long, a relatively small current flows simultaneously. By utilizing the feature of being able to simultaneously provide currents of different magnitudes to one driving thin film transistor, it is possible to rapidly compensate for the threshold voltage and provide a constant current to the organic light emitting diode while reducing the current deviation between driving thin film transistors having characteristic deviation, thereby preventing unevenness due to the difference in current magnitude. This driving operation will be described in detail below.

[0130] The driving thin film transistor (T1) charges the storage capacitor (Cst) with a voltage corresponding to the data signal (Dm) according to the scan signal (Sn), and provides the organic light emitting diode (OLED) with a current corresponding to the voltage charged in the storage capacitor (Cst). At this time, since the threshold voltage of the driving thin film transistor (T1) may change over time, the compensation thin film transistor (T3) diode-connects the driving thin film transistor (T1) according to the scan signal (Sn) and compensates for the threshold voltage (Vth) of the driving thin film transistor (T1).

[0131] Therefore, while the data signal (Dm) is being transmitted, a relatively large current flowing through the first path semiconductor layer (CH1) can quickly charge the storage capacitor (Cst) to a predetermined voltage (compensation voltage) through the compensation thin film transistor (T3), thereby allowing threshold voltage (Vth) compensation to be performed quickly and easily.

[0132] In addition, since a relatively small current flowing through the second path semiconductor layer CH2 is provided to the organic light emitting diode (OLED) through the light emitting control thin film transistor T6, unevenness can be prevented. That is, since the rate of change of current due to the change of the voltage applied to the driving gate electrode of the driving thin film transistor T1 is small, the current control voltage width (data swing range) can be increased, and thus the range of the data voltage expressing gamma can be increased, and since the current deviation between the driving thin film transistors having characteristic deviation (scattering) is reduced, unevenness due to the difference in the magnitude of the current can be prevented.

[0133] A conventional driving thin film transistor provides the same amount of current to the compensation thin film transistor (T3) and the emission control thin film transistor (T6) in order to pass only one amount of current through the driving semiconductor layer 131a. In this case, if the length of the driving semiconductor layer 131a of the driving thin film transistor (T1) is shortened to quickly compensate the threshold voltage (Vth) of the driving thin film transistor (T1), the s-factor of the transistor transfer curve decreases and the rate of change of current due to the change of the voltage applied to the driving gate electrode increases, so that a large current is provided to the organic light emitting diode (OLED), causing unevenness.

[0134] On the other hand, if the driving semiconductor layer 131a of the driving thin film transistor T1 is formed long to prevent unevenness, compensation of the threshold voltage Vth of the driving thin film transistor is delayed due to a small current, and low gray scale compensation is not performed, resulting in unevenness. This problem becomes more serious as the resolution increases. That is, as the resolution increases, the time for applying the data signal Dm decreases, so that current flows through the organic light emitting diode (OLED) before the threshold voltage Vth is fully compensated, which induces a current deviation and causes unevenness.

[0135] Therefore, by forming the length of the first path semiconductor layer (CH1) connected to the compensation thin film transistor (T3) shorter than the length of the second path semiconductor layer (CH2) connected to the emission control thin film transistor (T6), low gradation unevenness can be prevented.

[0136] Meanwhile, the first embodiment has a 6tr 1cap structure consisting of six thin film transistors and one storage capacitor, in which the driving semiconductor layer of the driving thin film transistor is bent, but a sixth embodiment is also possible, in which the driving semiconductor layer of the driving thin film transistor is bent ...

[0137] Hereinafter, the organic light emitting display device according to the sixth embodiment of the present invention will be described in detail with reference to FIGS.

[0138] Fig. 10 is an equivalent circuit diagram of one pixel of an organic light emitting display device according to a sixth embodiment of the present invention, and Fig. 11 is a layout diagram of the organic light emitting display device according to the sixth embodiment of the present invention.

[0139] The sixth embodiment is substantially the same as the first embodiment shown in FIGS. 1 to 5 except that a current control thin film transistor is added, and therefore a repeated description will be omitted.

[0140] As shown in FIGS. 10 and 11, one pixel of the organic light emitting display device according to the sixth embodiment of the present invention includes a plurality of signal lines 121, 122, 123, 124, 128, 171, 172, a plurality of thin film transistors (T1, T2, T3, T4, T5, T6, T7) connected to the plurality of signal lines, a storage capacitor (Cst), and an organic light emitting diode (OLED).

[0141] The thin film transistors include a driving thin film transistor (T1), a switching thin film transistor (T2), a compensation thin film transistor (T3), an initialization thin film transistor (T4), an operation control thin film transistor (T5), a light emission control thin film transistor (T6), and a current control thin film transistor (T7).

[0142] The signal lines include a scan line 121 for transmitting a scan signal (Sn), a previous scan line 122 for transmitting a previous scan signal (Sn-1) to the initialization thin film transistor (T4), an emission control line 123 for transmitting an emission control signal (En) to the operation control thin film transistor (T5) and the emission control thin film transistor (T6), a data line 171 for transmitting a data signal (Dm) across the scan line 121, a driving voltage line 172 for transmitting a driving voltage (ELVDD) and formed approximately parallel to the data line 171, an initialization voltage line 124 for transmitting an initialization voltage (Vint) for initializing the driving thin film transistor (T1), and a bypass control line 128 for transmitting a bypass signal (BP) to the bypass thin film transistor (T7).

[0143] A gate electrode (G1) of the driving thin film transistor (T1) is connected to one end (Cst1) of the storage capacitor (Cst), a source electrode (S1) of the driving thin film transistor (T1) is connected to the driving voltage line 172 via the operation control thin film transistor (T5), and a drain electrode (D1) of the driving thin film transistor (T1) is electrically connected to the anode of the organic light emitting diode (OLED) via the emission control thin film transistor (T6).

[0144] The gate electrode (G2) of the switching thin film transistor (T2) is connected to the scan line 121, the source electrode (S2) of the switching thin film transistor (T2) is connected to the data line 171, and the drain electrode (D2) of the switching thin film transistor (T2) is connected to the source electrode (S1) of the driving thin film transistor (T1) and is also connected to the driving voltage line 172 via the operation control thin film transistor (T5).

[0145] The gate electrode (G4) of the initialization thin film transistor (T4) is connected to the previous scan line 122, the source electrode (S4) of the initialization thin film transistor (T4) is connected to the initialization voltage line 124, and the drain electrode (D4) of the initialization thin film transistor (T4) is connected to one end (Cst1) of the storage capacitor (Cst), the drain electrode (D3) of the compensation thin film transistor (T3), and the gate electrode (G1) of the driving thin film transistor (T1).

[0146] The gate electrode (G7) of the bypass thin film transistor (T7) is connected to the bypass control line 128, the source electrode (S7) of the bypass thin film transistor (T7) is connected to the drain electrode (D6) of the light emitting control thin film transistor (T6) and the anode of the organic light emitting diode (OLED), and the drain electrode (D7) of the bypass thin film transistor (T7) is connected to the initialization voltage line 124 and the source electrode (S4) of the initialization thin film transistor (T4).

[0147] Hereinafter, a specific operation process of the bypass thin film transistor T7 of the organic light emitting display according to the sixth embodiment of the present invention will be described in detail.

[0148] The bypass thin film transistor T7 receives a bypass signal BP from a bypass control line 128. The bypass signal BP is a voltage of a predetermined level that can always turn off the bypass thin film transistor T7, and the bypass thin film transistor T7 is always turned off as a transistor off level voltage is transmitted to the gate electrode G7 of the bypass thin film transistor T7, and in the turned off state, a part of the driving current Id is discharged as a bypass current Ibp through the bypass transistor T7.

[0149] Even if the minimum current of the driving thin film transistor for displaying a black image flows as a driving current, if the organic light emitting diode (OLED) emits light, the black image is not displayed properly. Therefore, the bypass thin film transistor (T7) of the organic light emitting display device according to the sixth embodiment of the present invention distributes a part of the minimum current of the driving thin film transistor (T1) as a bypass current (Ibp) to a current path other than the current path on the organic light emitting diode side. Here, the minimum current of the driving thin film transistor means a current under a condition in which the gate-source voltage (Vgs) of the driving thin film transistor is lower than the threshold voltage (Vth) and the driving thin film transistor is turned off. In this way, the minimum driving current under the condition of turning off the driving thin film transistor (for example, a current of 10 pA or less) is transmitted to the organic light emitting diode to display an image of black brightness.

[0150] When a minimum driving current for displaying a black image flows, the influence of the bypass current (Ibp) in the clockwise direction is large, but when a large driving current for displaying an image such as a normal image or a white image flows, the bypass current (Ibp) has almost no influence. Therefore, when a driving current for displaying a black image flows, the light emitting current (Ioled) of the organic light emitting diode, which is reduced by the amount of the bypass current (Ibp) that has escaped from the driving current (Id) through the bypass thin film transistor (T7), has a minimum current amount at a level at which a black image can be reliably displayed.

[0151] Therefore, by using the bypass thin film transistor, it is possible to realize an accurate black luminance image and improve the contrast ratio.

[0152] Hereinafter, a detailed structure of a pixel of the organic light emitting display device shown in FIG. 10 will be described in detail with reference to FIG. 11 in conjunction with FIG. 10 and FIG.

[0153] FIG. 11 is a layout diagram of an organic light emitting display device according to a sixth embodiment of the present invention.

[0154] As shown in FIGS. 10 and 11, a pixel of the organic light emitting display device according to the sixth embodiment of the present invention includes a scan line 121, a previous scan line 122, an emission control line 123, an initialization voltage line 124, and a bypass control line 128 formed along a row direction, which respectively apply a scan signal (Sn), a previous scan signal (Sn-1), an emission control signal (En), and an initialization voltage (Vint), and also includes a data line 171 and a driving voltage line 172 which intersect with all of the scan line 121, the previous scan line 122, the emission control line 123, the initialization voltage line 124, and the bypass control line 128, and which respectively apply a data signal (Dm) and a driving voltage (ELVDD) to the pixel.

[0155] In addition, the pixel includes a driving thin film transistor (T1), a switching thin film transistor (T2), a compensation thin film transistor (T3), an initialization thin film transistor (T4), an operation control thin film transistor (T5), an emission control thin film transistor (T6), a bypass thin film transistor (T7), a storage capacitor (Cst), or an organic light emitting diode (OLED) 70.

[0156] The driving thin film transistor (T1), the switching thin film transistor (T2), the compensation thin film transistor (T3), the initialization thin film transistor (T4), the operation control thin film transistor (T5), the emission control thin film transistor (T6), and the bypass thin film transistor (T7) are formed along the semiconductor layer 131, and the semiconductor layer 131 is formed to be bent in various shapes. The semiconductor layer 131 is made of polysilicon and includes a channel region that is not doped with impurities, and a source region and a drain region that are doped with impurities on both sides of the channel region. Here, the impurities vary depending on the type of thin film transistor, and can be N-type impurities or P-type impurities. Such semiconductor layers include a driving semiconductor layer 131a formed in the driving thin film transistor (T1), a switching semiconductor layer 131b formed in the switching thin film transistor (T2), a compensation semiconductor layer 131c formed in the compensation thin film transistor (T3), an initialization semiconductor layer 131d formed in the initialization thin film transistor (T4), an operation control semiconductor layer 131e formed in the operation control thin film transistor (T5), an emission control semiconductor layer 131f formed in the emission control thin film transistor (T6), and a bypass semiconductor layer 131g formed in the bypass thin film transistor (T7).

[0157] The driving thin film transistor (T1) includes a driving semiconductor layer 131a, a driving gate electrode 125a, a driving source electrode 176a, and a driving drain electrode 177a. The driving semiconductor layer 131a is bent. The driving semiconductor layer 131a includes a plurality of first extensions 31 extending in a first direction, a plurality of second extensions 32 extending in a second direction different from the first direction, and a plurality of bent portions 33 connecting the first extensions 31 and the second extensions 32. Therefore, the driving semiconductor layer 131a is arranged in a zigzag shape. The driving semiconductor layer 131a shown in FIG. 2 and FIG. 3 includes three first extensions 31, two second extensions 32, and four bent portions 33. Therefore, the driving semiconductor layer 131a is arranged in a long "V" shape.

[0158] In this manner, by forming the driving semiconductor layer 131a including the plurality of bent portions 33, the driving semiconductor layer 131a can be formed long in a narrow space. Therefore, the driving channel region 131a1 of the driving semiconductor layer 131a can be formed long, and the driving range of the gate voltage applied to the driving gate electrode 125a is widened. Therefore, since the driving range of the gate voltage is widened, the magnitude of the gate voltage can be changed to more precisely control the gray scale of the light emitted from the organic light emitting diode (OLED), and as a result, the resolution of the organic light emitting display device can be increased to improve the display quality.

[0159] The bypass thin film transistor T7 includes a bypass semiconductor layer 131g, a bypass gate electrode 125g, a bypass source electrode 176g, and a bypass drain electrode 177g. The bypass source electrode 176g corresponds to a bypass drain region 177g doped with impurities in the bypass semiconductor layer 131g, and the bypass drain electrode 177g corresponds to a bypass drain region 177g doped with impurities in the bypass semiconductor layer 131g. The bypass source electrode 176g is directly connected to the emission control drain region 133f.

[0160] The bypass semiconductor layer 131g is formed in the same layer as the driving semiconductor layer 131a, the switching semiconductor layer 131b, the light emission control semiconductor layer 131f, etc., and a first gate insulating film 141 is formed on the bypass semiconductor layer 131g. A bypass gate electrode 125g, which is a part of the bypass control line 128, is formed on the first gate insulating film 141, and a second gate insulating film 142 is formed on the bypass gate electrode 125g and the first gate insulating film 141.

[0161] Therefore, the bypass thin film transistor T7 is always turned off by transmitting the bypass signal BP from the bypass control line 128, and in the turned-off state, a part of the driving current Id flows through the bypass transistor T7 as the bypass current Ibp. Therefore, when a driving current for displaying a black image flows, an accurate black luminance image can be realized and the contrast ratio can be improved.

[0162] Although the present invention has been described with reference to the preferred embodiments as described above, it will be readily understood by those skilled in the art to which the present invention pertains that the present invention is not limited thereto, and various modifications and variations are possible without departing from the concept and scope of the appended claims. [Explanation of symbols]

[0163] 31:1st extension part 32:Second extension part 33: Bend 110: Substrate 121: Scan line 122: Previous scan line 123: Light emission control line 124: Initialization voltage line 125a: driving gate electrode 125b: switching gate electrode 131a: driving semiconductor layer 132b: switching semiconductor layer 141: First gate insulating film 142: second gate insulating film 171: Data line 172: Drive voltage line

Claims

1. A substrate; a first scan line on the substrate and a data line intersecting the first scan line; a switching thin film transistor connected to the first scan line and the data line; A driving voltage line; An initialization voltage line; An organic light emitting diode; a driving thin film transistor electrically connected to the driving voltage line, the initialization voltage line, the organic light emitting diode, and the switching thin film transistor, the driving thin film transistor including a semiconductor layer; a compensation thin film transistor electrically connected to the driving voltage line and the driving thin film transistor; an insulating layer covering the driving thin film transistor; a storage capacitor including a first capacitor plate including a gate electrode of the driving thin film transistor, a second capacitor plate on the first capacitor plate, and a portion of the insulating layer between the first capacitor plate and the second capacitor plate; A connecting member; a first contact opening exposing the first capacitor plate and located within a storage opening formed in the second capacitor plate in a plan view; a second contact opening exposing a portion of the drain electrode of the compensation thin film transistor; Including, the connecting member is electrically connected to the compensation thin film transistor and the first capacitor plate through the first contact opening and the second contact opening; the driving thin film transistor includes a portion of the semiconductor layer; the storage capacitor overlaps a portion of the semiconductor layer; Organic light-emitting diode display.

2. 2. The organic light emitting diode display device according to claim 1, wherein a portion of the semiconductor layer is curved under the gate electrode of the driving thin film transistor.

3. Further comprising a protective layer, the organic light-emitting diode includes a pixel electrode on the protective layer; The organic light emitting diode display device of claim 2 , wherein the pixel electrode overlaps a portion of the semiconductor layer and the storage capacitor.

4. The organic light emitting diode display device of claim 1 , further comprising an initialization thin film transistor electrically connected to the initialization voltage line and the compensation thin film transistor.

5. The organic light emitting diode display device according to claim 4 , further comprising a second scan line electrically connected to the initialization thin film transistor.

6. The organic light-emitting diode display device according to claim 2 , wherein the connecting member overlaps the first scan line in a plan view.

7. 3. The organic light emitting diode display device of claim 2, wherein the compensation thin film transistor comprises a dual gate.

8. 2. The organic light emitting diode display device according to claim 1, wherein the semiconductor layer of the driving thin film transistor is bent and disposed in a plane substantially parallel to a surface of the substrate.

9. 2. The organic light emitting diode display device according to claim 1, wherein the switching thin film transistor utilizes the semiconductor layer.

10. The organic light-emitting diode display device according to claim 2 , wherein a portion of the semiconductor layer and a portion of the insulating layer overlap each other.

Images