Light-emitting display device

Abstract

To provide a light-emitting display device capable of improving pixel density and reducing noise.SOLUTION: A light-emitting display device according to an embodiment, includes: a substrate (1); a pixel driving part (2) that is positioned on the substrate, and includes a transistor; a planarization film (3) that covers the pixel driving part; an anode (4) that is positioned on the planarization film; a pixel defining film (5) that includes an opening overlapping the anode on a flat surface, and includes an inorganic insulation material; a separation wall (6) that includes an opening overlapping the opening of the pixel definition film and has conductivity; a light emitting layer (7) that is positioned in the opening of the pixel defining film; a cathode (8) that is positioned on the light emitting layer; and a separator (9) that divides the separation wall. The separation wall is electrically connected to the transistor of the pixel driving part via a first opening positioned in the pixel defining film and the planarization film, and the cathode is in contact with a side surface of the separation wall and electrically connected to the transistor.SELECTED DRAWING: Figure 4

Description

Technical Field

[0001] The present invention relates to a light-emitting display device.

Background Art

[0002] A display device is a device that displays a screen, and examples include a liquid crystal display (LCD) and an organic light-emitting diode (OLED) display. Such display devices are used in various electronic devices such as mobile phones, navigation systems, digital cameras, e-books, portable game consoles, or various terminal devices.

[0003] An organic light-emitting display device has self-luminance characteristics and, unlike a liquid crystal display device, does not require a separate light source, so the thickness and weight can be reduced. In addition, the organic light-emitting display device has high-quality characteristics such as low power consumption, high brightness, and fast response speed.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Patent Document 2

Patent Document 3

Patent Document 4

Summary of the Invention

Problems to be Solved by the Invention

[0005] An embodiment provides a light-emitting display device capable of applying a voltage to one electrode of a light-emitting diode by one portion separated using a linear intermittent portion (separator) of a conductive layer covering a pixel defining layer.

[0006] Also, an embodiment provides a light-emitting display device that can have high resolution or shield noise from being transmitted to a touch sensing electrode by applying a stable voltage to the other portion separated by the separator of the conductive layer.

Means for Solving the Problems

[0007] A light-emitting display device according to an embodiment includes a substrate; a pixel driving unit located on the substrate and including a transistor; a planarization film covering the pixel driving unit; an anode located on the planarization film; a pixel defining film including an opening that overlaps with the anode in a plane (overlaps in a plan view) and including an inorganic insulating material; a partition wall including an opening that overlaps with the opening of the pixel defining film and having conductivity; a light-emitting layer located in the opening of the pixel defining film; a cathode located on the light-emitting layer; and a separator for separating the partition wall. The partition wall is electrically connected to the transistor of the pixel driving unit through a first opening located across the pixel defining film and the planarization film, and the cathode is electrically connected to the transistor by contacting a side surface of the partition wall.

[0008] The partition wall includes a first conductive partition wall and a second conductive partition wall located on the first conductive partition wall, and the second conductive partition wall can have a chip structure protruding from the first conductive partition wall.

[0009] The chip structure can protrude facing an opening (inside) of the partition wall that overlaps with the opening of the pixel defining film.

[0010] The first conductive partition wall includes aluminum, and the second conductive partition wall can include titanium.

[0011] The partition wall is divided into an inner conductive partition wall and an outer conductive partition wall. The inner conductive partition wall is a part that surrounds while partitioning the opening of the partition wall. The outer conductive partition wall is a part that is electrically separated from the inner conductive partition wall. The inner conductive partition wall is composed of a double layer of a first inner conductive partition wall and a second inner conductive partition wall, and the outer conductive partition wall is composed of a double layer of a first outer conductive partition wall and a second inner conductive partition wall.

[0012] The inner partition wall is electrically connected to the transistor of the pixel driving unit through the first opening, and a certain voltage is transmitted to the outer partition wall through a second opening located across the pixel defining film and the planarization film.

[0013] On the upper side of the outer partition wall, a separated light-emitting layer and a separated cathode, which are separated from the light-emitting layer and the cathode respectively, can be formed.

[0014] It further includes a capping layer covering the partition wall and the cathode, and the separator can be located across the capping layer and the partition wall.

[0015] The separator is filled with an insulating material.

[0016] The capping layer and the separator further include a transparent electrode formed of a transparent conductive material, and a certain voltage can be applied to the transparent electrode.

[0017] It further includes a capping layer covering the partition wall and the cathode. The separator is located on the partition wall, and the capping layer can be located on the separator.

[0018] A light-emitting display device according to an embodiment includes a substrate; a pixel driving unit located on the substrate and including a transistor; a planarization film covering the pixel driving unit; an anode located on the planarization film; a pixel defining film including an opening that overlaps the anode in a plane and including a black pixel defining film and a transparent pixel defining film; a partition wall having conductivity and including an opening that overlaps the opening of the pixel defining film; a light-emitting layer located in the opening of the pixel defining film; a cathode located on the light-emitting layer; and a separator that separates the partition walls. The partition wall is electrically connected to the transistor of the pixel driving unit through a first opening located across the pixel defining film and the planarization film. The cathode is electrically connected to the transistor by contacting a side surface of the partition wall. The black pixel defining film is formed of an organic substance having a black color or an organic substance containing a light-blocking substance. The transparent pixel defining film is formed of a photosensitive organic insulating substance through which light can pass.

[0019] The pixel defining film may further include an intermediate pixel defining film, which is an inorganic insulating film, between the black pixel defining film and the transparent pixel defining film.

[0020] The partition wall includes a first conductive partition wall and a second conductive partition wall located on the first conductive partition wall. The second conductive partition wall has a chip structure protruding from the first conductive partition wall. The chip structure may protrude toward the opening (inside) of the partition wall that overlaps the opening of the pixel defining film.

[0021] The first conductive partition wall includes aluminum, and the second conductive partition wall may include titanium.

[0022] The partition wall is divided into an inner conductive partition wall and an outer conductive partition wall. The inner conductive partition wall is a portion that surrounds while partitioning the opening of the partition wall. The outer conductive partition wall is a portion that is electrically separated from the inner conductive partition wall. The inner conductive partition wall is composed of a double layer of a first inner conductive partition wall and a second inner conductive partition wall. The outer conductive partition wall is composed of a double layer of a first outer conductive partition wall and a second inner conductive partition wall. The inner conductive partition wall is electrically connected to the transistor of the pixel driving unit through the first opening. A certain voltage is transmitted to the outer conductive partition wall through a second opening that is located across the pixel defining film and the planarization film.

[0023] On the upper side of the outer partition wall, a separated light-emitting layer and a separated cathode that are separated from the light-emitting layer and the cathode respectively can be formed.

[0024] It further includes an encapsulation layer that covers the partition wall and the cathode, and the separator can be located across the encapsulation layer and the partition wall.

[0025] The separator is filled with an insulating material.

[0026] It further includes an encapsulation layer that covers the partition wall and the cathode, the separator is located on the partition wall, and the encapsulation layer can be located on the separator.

Advantages of the Invention

[0027] According to the embodiment, for the separator, it is formed as a linear hollow space by etching a partition wall including at least two layers formed of a conductive material, or formed in a manner of filling the hollow space with an insulating material. In this way, while the conductive layer of the partition wall is separated by the separator, one electrode of the light-emitting diode is electrically connected to the conductive layer of the partition wall on one side of the separator, so that a voltage can be applied to one electrode of the light-emitting diode.

[0028] According to an embodiment, a stable voltage can be applied to other portions of the conductive layer of the partition wall separated by the separator to remove the voltage line, and a high-resolution light-emitting display device can be provided.

[0029] According to an embodiment, by applying a stable voltage to other portions of the conductive layer of the partition wall separated by the separator, a light-emitting display device can be provided that can shield the touch sensing electrode located on the front surface so that noise is not transmitted thereto.

Brief Description of the Drawings

[0030]

Figure 1

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Embodiments for Carrying Out the Invention

[0031] Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those having ordinary knowledge in the technical field to which the present invention pertains can easily implement them. The present invention can be realized in various different forms and is not limited to the embodiments described herein.

[0032] For the sake of clarity in explaining the present invention, parts that are unnecessary for the explanation are omitted, and throughout the specification, the same reference numerals are assigned to the same or similar components.

[0033] Also, the sizes and thicknesses of the respective configurations shown in the drawings are arbitrarily shown for convenience of explanation, so the present invention is not necessarily limited to the places shown in the drawings. The thicknesses are shown enlarged in the drawings to clearly represent a plurality of layers and regions. And in the drawings, for convenience of explanation, the thicknesses of some layers and regions are exaggerated.

[0034] Also, when a part such as a layer, film, region, plate, component, etc. is “on” or “above” another part, this includes not only the case where it is “directly above” the other part, but also the case where there are other parts in between. Conversely, when a part is “directly above” another part, it means that there are no other parts in between. Also, being “on” or “above” a reference part means being located above or below the reference part, and does not necessarily mean being located “on” or “above” in the opposite direction of gravity.

[0035] Also, throughout the specification, when a certain part "includes" a certain component, this means that, unless otherwise stated to the contrary, it can further include other components rather than excluding other components.

[0036] Also, throughout the specification, when referring to "on a plane", this means when looking at the target part from above, and when referring to "in a cross-section", this means when looking at the cross-section obtained by vertically cutting the target part from the side.

[0037] Also, throughout the specification, when referring to "being connected", this does not only mean the case where two or more components are directly connected. Instead, it can include the case where two or more components are indirectly connected through other components, physically connected, electrically connected, or the case where each substantially integral part, although named differently according to its position and function, is connected to each other.

[0038] Also, throughout the specification, when parts such as wiring, layers, films, regions, plates, components, etc. "extend in the first direction or the second direction", this does not only mean a straight-line shape that extends straight in the said direction, but also includes a structure that generally extends along the first direction or the second direction, and includes a structure that is bent in part, has a zigzag structure, or includes a curved structure while extending.

[0039] Also, electronic devices (such as mobile phones, TVs, monitors, notebook computers, etc.) that include a display device, a display panel, etc. described in the specification, or electronic devices that include a display device, a display panel, etc. manufactured by the manufacturing method described in the specification are not excluded from the scope of rights of this specification.

[0040] The light-emitting display device has a display area, and a plurality of pixels are located in the display area. Hereinafter, the circuit structures of the light-emitting element LED and the pixel driving unit PC included in one pixel will be described with reference to FIGS. 1 to 3.

[0041] First, with reference to FIGS. 1 and 2, the pixels, signals applied thereto, and operations according to one embodiment will be described in detail.

[0042] FIG. 1 is an equivalent circuit diagram of one pixel included in a light-emitting display device according to one embodiment.

[0043] Referring to FIG. 1, one pixel includes a light-emitting element LED and a pixel driving unit that drives the light-emitting element. The pixel driving unit includes all elements other than the light-emitting element LED in FIG. 1. The pixel driving unit of the pixel according to the embodiment of FIG. 1 includes a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, an eighth transistor T8, a first capacitor C1, and a second capacitor C2.

[0044] The pixel driving unit is also connected to a first scan line 161 to which a first scan signal GW is applied, a second scan line 162 to which a second scan signal GC is applied, a third scan line 163 to which a third scan signal GR is applied, a fourth scan line 166 to which a fourth scan signal GI is applied, a first light-emitting signal line 164 to which a first light-emitting signal EM1 is applied, and a data line 171 to which a data voltage VDATA is applied. The pixel is also connected to a driving voltage line 172 to which a driving voltage ELVDD (hereinafter also referred to as a first driving voltage) is applied, a driving low voltage line 174 to which a driving low voltage ELVSS (hereinafter also referred to as a second driving voltage) is applied, a reference voltage line 173 to which a reference voltage Vref is applied, a first initialization voltage line 177 to which a first initialization voltage Vint is applied, and a second initialization voltage line 176 to which a second initialization voltage Vcint is applied.

[0045] Hereinafter, the circuit structure of the pixel will be described centering on each element (transistor, capacitor, light-emitting element) included in the pixel.

[0046] The first transistor T1 (hereinafter also referred to as the driving transistor) includes a gate electrode connected to the first electrode of the first capacitor C1, the second electrode of the second transistor T2, and the second electrode of the fourth transistor T4, a first electrode (input-side electrode) connected to the second electrode of the third transistor T3 and the second electrode of the fifth transistor T5, and a second electrode (output-side electrode) connected to the first electrode of the sixth transistor T6, the second electrode of the eighth transistor T8, the second electrode of the first capacitor C1, and the second electrode of the second capacitor C2.

[0047] The degree to which the first transistor T1 is turned on is determined by the voltage of the gate electrode, and the magnitude of the current flowing from the first electrode to the second electrode of the first transistor T1 is determined by the degree to which it is turned on. The current flowing from the first electrode to the second electrode of the first transistor T1 is the same as the current flowing through the light-emitting element LED in the light-emitting period, and can also be referred to as the emission current. Here, the first transistor T1 is formed as an n-type transistor, and the higher the voltage of the gate electrode, the larger the emission current flows. When the emission current is large, the light-emitting element LED can exhibit high brightness.

[0048] The second transistor T2 (hereinafter also referred to as the data input transistor) includes a gate electrode connected to the first scan line 161 to which the first scan signal GW is applied, a first electrode (input-side electrode) connected to the data line 171 to which the data voltage VDATA is applied, and a second electrode (output-side electrode) connected to the first electrode of the first capacitor C1, the gate electrode of the first transistor T1, and the second electrode of the fourth transistor T4. The second transistor T2 can input the data voltage VDATA into the pixel in response to the first scan signal GW, transmit it to the gate electrode of the first transistor T1, and store it in the first electrode of the first capacitor C1.

[0049] The third transistor T3 (hereinafter also referred to as the first voltage transfer transistor or the second initialization voltage transfer transistor) includes a gate electrode connected to the second scan line 162 to which the second scan signal GC is applied, a first electrode (input-side electrode) connected to the second initialization voltage line 176 to which the second initialization voltage Vcint is applied, and a second electrode (output-side electrode) connected to the first electrode of the first transistor T1 and the second electrode of the fifth transistor T5. The third transistor T3 allows the second initialization voltage Vcint to be transmitted to the first transistor T1 without passing through the light-emitting element LED. Here, the second initialization voltage Vcint, similar to the drive voltage ELVDD, can have a positive voltage value. In some embodiments, instead of the second initialization voltage Vcint, the drive voltage ELVDD or the bias voltage Vbais can also be applied. The third transistor T3 is provided because when a current flows through the light-emitting element LED, the problem may occur that the light-emitting element LED emits unnecessary light, and thus the second initialization voltage Vcint is transmitted to the first transistor T1 through another path. Therefore, the third transistor T3 may not be turned on during the light-emitting period, but may be turned on in other periods.

[0050] The fourth transistor T4 (hereinafter also referred to as the reference voltage transfer transistor) includes a gate electrode connected to the third scan line 163 to which the third scan signal GR is applied, a first electrode connected to the reference voltage line 173, and a second electrode connected to the first electrode of the first capacitor C1, the gate electrode of the first transistor T1, and the second electrode of the second transistor T2. The fourth transistor T4 serves to transmit and initialize the reference voltage Vref to the first electrode of the first capacitor C1 and the gate electrode of the first transistor T1.

[0051] The fifth transistor T5 (hereinafter, also referred to as the cathode-connected transistor) includes a gate electrode connected to a first emission signal line 164 to which a first emission signal EM1 is applied, a first electrode connected to the cathode of the light-emitting element LED and the second electrode of the seventh transistor T7, and a second electrode connected to the first electrode of the first transistor T1 and the second electrode of the third transistor T3. The fifth transistor T5 forms a current path by connecting the first electrode of the first transistor T1 and the light-emitting element LED based on the first emission signal EM1, so that the light-emitting element LED can emit light.

[0052] The sixth transistor T6 (hereinafter, also referred to as the drive low voltage application transistor) includes a gate electrode connected to a first emission signal line 164 to which a first emission signal EM1 is applied, a first electrode connected to the second electrode of the first transistor T1, the second electrode of the eighth transistor T8, the second electrode of the first capacitor C1, and the second electrode of the second capacitor C2, and a second electrode to which a drive low voltage ELVSS is transmitted. The sixth transistor T6 serves to transmit or block the drive low voltage ELVSS to the second electrode of the first transistor T1 based on the first emission signal EM1.

[0053] The seventh transistor T7 (hereinafter, also referred to as the second voltage transmission transistor) includes a gate electrode connected to a second scan line 162 to which a second scan signal GC is applied, a first electrode (input-side electrode) connected to a second initialization voltage line 176, and a second electrode (output-side electrode) connected to the cathode of the light-emitting element LED and the first electrode of the fifth transistor T5. The seventh transistor T7 serves to transmit the second initialization voltage Vcint to the cathode, change the voltage level of the cathode to the second initialization voltage Vcint, eliminate the problem that black cannot be displayed due to the charge remaining at the cathode, and enable black to be clearly displayed. Here, the second initialization voltage Vcint may have a positive voltage value similar to the drive voltage ELVDD. Depending on the embodiment, instead of the second initialization voltage Vcint, the drive voltage ELVDD or the bias voltage Vbais can also be applied.

[0054] The eighth transistor T8 (hereinafter also referred to as the first initialization voltage transfer transistor) includes a gate electrode connected to a fourth scan line 166 to which a fourth scan signal GI is applied, a first electrode (input side electrode) connected to a first initialization voltage line 177, and a second electrode (output side electrode) connected to the second electrode of the first transistor T1, the first electrode of the sixth transistor T6, the second electrode of the first capacitor C1, and the second electrode of the second capacitor C2. The eighth transistor T8 serves to transfer and initialize the first initialization voltage Vint to the second electrode of the first transistor T1, the first electrode of the sixth transistor T6, the second electrode of the first capacitor C1, and the second electrode of the second capacitor C2.

[0055] In the embodiment of FIG. 1, all the transistors are formed of n-type transistors, and each transistor can be turned on when the voltage of the gate electrode is a high-level voltage and turned off when the voltage is a low-level voltage. Further, the semiconductor layer included in each transistor can use a polycrystalline silicon semiconductor, an oxide semiconductor, and furthermore, an amorphous semiconductor or a single crystal semiconductor can also be used.

[0056] According to the embodiment, the semiconductor layer included in each transistor can further include a superimposed layer (or an additional gate electrode) that superimposes thereon, and by applying a voltage to the superimposed layer (additional gate electrode), the characteristics of the transistor can be changed, and the display quality of the pixel can be further improved.

[0057] The first capacitor C1 includes a gate electrode of the first transistor T1, a first electrode connected to the second electrode of the second transistor T2 and the second electrode of the fourth transistor T4, and a second electrode connected to the second electrode of the first transistor T1, the first electrode of the sixth transistor T6, the second electrode of the eighth transistor T8, and the second electrode of the second capacitor C2. The first electrode of the first capacitor C1 serves to receive and store the data voltage VDATA from the second transistor T2.

[0058] The second capacitor C2 includes a first electrode connected to the drive low voltage line 174 and a second electrode connected to the second electrode of the first transistor T1, the first electrode of the sixth transistor T6, the second electrode of the eighth transistor T8, and the second electrode of the first capacitor C1. The second capacitor C2 serves to keep the voltages of the second electrode of the first transistor T1 and the second electrode of the first capacitor C1 constant. On the other hand, depending on the embodiment, the first electrode of the second capacitor C2 may be connected to the drive voltage line 172, or the second capacitor C2 may be omitted.

[0059] The light-emitting element LED includes an anode connected to the drive voltage line 172 to which the drive voltage ELVDD is transmitted and a cathode connected to the first electrode of the fifth transistor T5 and the second electrode of the seventh transistor T7. The cathode of the light-emitting element LED is connected to the first transistor T1 via the fifth transistor T5. The light-emitting element LED is located between the pixel driving unit and the drive voltage ELVDD, and the same current as the current flowing through the first transistor T1 of the pixel driving unit flows through it, and the luminance of the light emitted according to the magnitude of the current is also determined. The light-emitting element LED may include a light-emitting layer containing at least one of an organic light-emitting material and an inorganic light-emitting material between the anode and the cathode. The specific laminated structure of the light-emitting element LED according to the embodiment is as shown in FIG. 5 and the like.

[0060] The pixel according to the embodiment of FIG. 1 performs a compensation operation for detecting a change in the characteristics (threshold voltage) of the first transistor T1, and can display a constant display luminance regardless of the change in the characteristics of the first transistor T1.

[0061] Also, in FIG. 1, the light-emitting element LED is located between the first electrode of the first transistor T1 and the drive voltage line 172. The pixel according to the present embodiment is also referred to as an inverted pixel in order to distinguish it from a pixel in which the light-emitting element is located between the first transistor T1 and the drive low voltage ELVSS. The light-emitting element indicates luminance according to the magnitude of the current flowing through the current path connected from the drive voltage ELVDD through the first transistor T1 to the drive low voltage ELVSS, and it is possible that the higher the current, the higher the luminance represented. In the inverted pixel structure of FIG. 1, the first electrode of the first transistor T1 and the light-emitting element LED are connected and separated from the second electrode (source electrode) of the first transistor T1, so each part of the pixel driving unit can have the advantage that the voltage of the second electrode (source electrode) of the first transistor T1 does not fluctuate when the voltage is changed. More specifically, when the sixth transistor T6 is turned on, as the voltage of the second electrode of the first capacitor C1 decreases, the voltage of the first electrode of the first capacitor C1 also decreases. Although this may cause the output current output by the first transistor T1 to decrease, in the present embodiment, the problem of such a decrease in the output current of the first transistor T1 is eliminated. This will be specifically described while explaining the operation of FIG. 2.

[0062] In the embodiment of FIG. 1, one pixel PX has been described as including eight transistors (T1 to T8) and two capacitors (the first capacitor C1, the second capacitor C2), but it is not limited thereto. Depending on the embodiment, additional capacitors and transistors can be further included, or some capacitors and transistors can be omitted.

[0063] As described above, the circuit structure of the pixel according to one embodiment has been described with reference to FIG. 1.

[0064] Hereinafter, with reference to FIG. 2, the waveform of the signal applied to the pixel of FIG. 1 and the operation of the pixel thereby will be described in detail.

[0065] FIG. 2 is a waveform diagram showing the signals applied to the pixels of FIG. 1.

[0066] Referring to FIG. 2, if the signals applied to the pixels are divided into sections, they are divided into an initialization section, a compensation section, a writing section, and a light emission section.

[0067] First, the light emission section is a section in which the light emitting element LED emits light. A gate-on voltage (high-level voltage) is applied as the first light emission signal EM1, and the fifth transistor T5 and the sixth transistor T6 are turned on. At this time, a gate-off voltage (low-level voltage) is applied to the first scan signal GW, the second scan signal GC, the third scan signal GR, and the fourth scan signal GI. As a result, a current path is formed that is connected from the driving voltage ELVDD through the light emitting element LED, the fifth transistor T5, the first transistor T1, and the sixth transistor T6 to the driving low voltage ELVSS. The magnitude of the current flowing through the current path is determined according to the degree to which the channel of the first transistor T1 is turned on. The degree to which the channel of the first transistor T1 is turned on is determined according to the voltage of the gate electrode of the first transistor T1 (or the first electrode of the first capacitor C1). Therefore, as the output current generated according to the voltage of the gate electrode of the first transistor T1 flows along the current path including the light emitting element LED, the light emitting element LED emits light. In FIG. 2, the light emission section in which the light emission signal applies a gate-on voltage (low-level voltage) is hardly shown, but actually the light emission section has the longest time. However, the light emission section only performs the simple operation as described above and is simply shown in FIG. 2.

[0068] The light emission section ends while the first light emission signal EM1 is changed to a gate-off voltage (low-level voltage), and enters the initialization section.

[0069] Referring to FIG. 2, in the initialization interval, first, the third scan signal GR is changed to the gate-on voltage (high-level voltage), and then the fourth scan signal GI is changed to the gate-on voltage (high-level voltage). At this time, the gate-off voltage (low-level voltage) is applied to the first scan signal GW, the second scan signal GC, and the first emission signal EM1.

[0070] First, the fourth transistor T4 connected to the third scan signal GR, which is changed to and applied with the gate-on voltage (high-level voltage), is turned on, and the reference voltage Vref is transmitted to the gate electrode of the first transistor T1 and the first electrode of the first capacitor C1 and is initialized. Here, the reference voltage Vref may have a voltage value capable of turning on the first transistor T1.

[0071] Thereafter, the fourth scan signal GI is also changed to the gate-on voltage (high-level voltage) and applied, and the eighth transistor T8 is also turned on. As a result, the second electrode of the first transistor T1, the second electrode of the sixth transistor T6, the second electrode of the first capacitor C1, and the second electrode of the second capacitor C2 are initialized to the first initialization voltage Vint.

[0072] Thereafter, as the fourth scan signal GI is changed to the gate-off voltage (low-level voltage), the initialization interval ends and the compensation interval is entered.

[0073] Referring to FIG. 2, in the compensation interval, the third scan signal GR maintains the gate-on voltage (high-level voltage), and the second scan signal GC is changed to the gate-on voltage (high-level voltage). At this time, the gate-off voltage (low-level voltage) is applied to the first scan signal GW, the fourth scan signal GI, and the first emission signal EM1.

[0074] Through the turned-on fourth transistor T4, the reference voltage Vref continues to be transmitted to the gate electrode of the first transistor T1 and the first electrode of the first capacitor C1, and the third transistor T3 and the seventh transistor T7 are also turned on by the second scan signal GC of the additionally applied gate-on voltage (high-level voltage). The second initialization voltage Vcint is transmitted to the first electrode of the first transistor T1 and the cathode of the light-emitting element LED. At this time, since the first transistor T1 has a turned-on state by the reference voltage Vref, the Vgs value of the first transistor is the same as the threshold voltage Vth value of the first transistor T1. Here, since Vgs is the value obtained by subtracting the voltage of the second electrode (source electrode) of the first transistor T1 from the voltage of the gate electrode, the voltage value of the second electrode (source electrode) of the first transistor T1 is lower than the voltage of the gate electrode by the threshold voltage Vth of the first transistor T1 (Vref - Vth). On the other hand, the turned-on seventh transistor T7 changes the voltage level of the cathode to the driving voltage ELVDD, initializes the voltage of the cathode to the driving voltage ELVDD, and removes the remaining charge in the cathode, thereby removing the problem of not displaying black.

[0075] Thereafter, referring to FIG. 2, the second scan signal GC is changed to a gate-off voltage (low-level voltage), and then the third scan signal GR is also changed to a gate-off voltage (low-level voltage), and the writing section is entered.

[0076] In the writing section, a gate-on voltage (high-level voltage) is applied to the first scan signal GW. At this time, the period during which the first scan signal GW is maintained at the gate-on voltage can be 1H. 1H indicates one horizontal period, and one horizontal period can correspond to one horizontal synchronization signal Hsync. 1H means the time when the gate-on voltage is applied to the next scan line after the gate-on voltage is applied to one scan line. On the other hand, in the writing section, a gate-off voltage (low-level voltage) is applied to the second scan signal GC, the third scan signal GR, the first light-emitting signal EM1, and the first light-emitting signal EM1.

[0077] In the writing interval, the second transistor T2 to which the gate-on voltage (high-level voltage) is applied is turned on, and all the other transistors are turned off. As a result, the data voltage VDATA enters the pixel and is applied to the gate electrode of the first transistor T1 and the first electrode of the first capacitor C1. At this time, the voltage value of the second electrode of the first transistor T1 has a voltage value (Vref - Vth) that is lower than the voltage of the gate electrode by the threshold voltage Vth of the first transistor T1, as in the compensation interval.

[0078] On the other hand, the third transistor T3 and the fifth transistor T5 are turned off, and the first electrode of the first transistor T1, the drive voltage line 172, and the light-emitting element LED are electrically separated.

[0079] Thereafter, referring to FIG. 2, the first light emission signal EM1 is changed to a gate-on voltage (high-level voltage) and enters the light emission interval. At this time, a gate-off voltage (low-level voltage) is applied to the first scan signal GW, the second scan signal GC, the third scan signal GR, and the fourth scan signal GI.

[0080] Since the fifth transistor T5 and the sixth transistor T6 are turned on by the first light emission signal EM1, a current path is formed from the drive voltage ELVDD, through the light-emitting element LED, the fifth transistor T5, the first transistor T1, and the sixth transistor T6, and connected to the drive low voltage ELVSS. The magnitude of the current flowing along the current path is determined according to the degree to which the first transistor T1 is turned on, and the degree to which the first transistor T1 is turned on is determined according to the magnitude of the data voltage VDATA applied to the gate electrode. The current I OLED flows through the light-emitting element LED, and the light-emitting element LED displays different brightness according to the magnitude of the current.

[0081] As the sixth transistor T6 turns on as it enters the light emission period, as a result, the voltages of the second electrode of the first capacitor C1 and the second electrode of the first transistor T1 are changed to the driving low voltage ELVSS. When the voltage value of the second electrode of the first capacitor C1 is changed, the voltage value of the first electrode of the first capacitor C1 is also changed accordingly. Here, the voltage fluctuation value of the first electrode of the first capacitor C1 may be the same as or similar to the voltage value of the second electrode of the first capacitor C1.

[0082] On the other hand, in the writing period, the voltage values of the second electrode of the first transistor T1 and the second electrode of the first capacitor C1 have a value (Vref - Vth) obtained by subtracting the threshold voltage Vth value of the first transistor T1 from the reference voltage Vref value. Therefore, when changing from the writing period to the light emission period, the change value of the voltage of the second electrode of the first capacitor C1 and the change value of the voltage of the first electrode of the first capacitor C1 (ΔV) are as shown in the following formula 1.

[0083] [Formula 1] ΔV = V ELVSS -(V ref -V th )

[0084] Here, V ref is the voltage value of the reference voltage Vref, V th is the threshold voltage value of the first transistor T1, and V ELVSS is the voltage value of the driving low voltage ELVSS.

[0085] At this time, the current I OLED flowing through the light emitting element LED in the light emission period is obtained by an equation such as the following formula 2.

[0086] [Formula 2] I OLED = k / 2 x (Vgs - V th ) 2 = k / 2 x [(V data + ΔV - V ELVSS ) - V th 2 = k / 2 x [(V data + (V​ELVSS -V ref +V th )-V ELVSS )-V th 2 =k / 2x(V data -V ref ) 2

[0087] Here, k is a constant value, V data is the voltage value of the data voltage, V ref is the voltage value of the reference voltage Vref, V th is the threshold voltage value of the first transistor T1, V ELVSS is the voltage value of the drive low voltage ELVSS, Vgs is the voltage difference between the gate electrode and the second electrode of the first transistor T1, and ΔV is the value used in Equation 1.

[0088] Therefore, the value of the current I flowing through the light-emitting element LED OLED is determined only by the value of the data voltage VDATA and the value of the reference voltage Vref, and has a value independent of the threshold voltage Vth of the first transistor T1. Therefore, regardless of the change in the characteristics of the first transistor T1, a constant output current I OLED can be generated.

[0089] Moreover, since the drive low voltage ELVSS is applied during the light-emitting period and the voltage change value (ΔV) generated at the gate electrode is also removed as in Equation 1, there is no need to consider it separately, and only the data voltage VDATA value and the reference voltage Vref need to be considered. Therefore, it has the advantage that the current is not changed according to the characteristics of the first transistor T1.

[0090] As described above, the voltage value of the drive voltage ELVDD is set to be larger than the value obtained by subtracting the threshold voltage value of the first transistor T1 from the voltage value of the reference voltage Vref, and the voltage value of the drive low voltage ELVSS is set to be smaller than the value obtained by subtracting the threshold voltage value of the first transistor T1 from the voltage value of the reference voltage Vref.

[0091] ​The operation according to the pixel of FIG. 1 and the waveform of FIG. 2 has been described above. Hereinafter, with reference to FIG. 3, the circuit structures of the light-emitting element LED and the pixel driving unit PC according to other embodiments will be described.

[0092] FIG. 3 is an equivalent circuit diagram of one pixel included in a light-emitting display device according to still another embodiment.

[0093] Referring to FIG. 3, one pixel includes a light-emitting element LED and a pixel driving unit for driving the same. The pixel driving unit includes all the other elements except the light-emitting element LED in FIG. 3. The pixel driving unit of the pixel according to the embodiment of FIG. 3 includes a first transistor T1, a second transistor T2, and a first capacitor C1.

[0094] Also, the pixel driving unit is connected to a first scan line 161 to which a first scan signal GW is applied and a data line 171 to which a data voltage VDATA is applied. Also, the pixel is connected to a driving voltage line 172 to which a driving voltage ELVDD (first driving voltage) is applied and a driving low voltage line 174 to which a driving low voltage ELVSS (second driving voltage) is applied.

[0095] Looking at the circuit structure of the pixel centering on each element (transistor, capacitor, light-emitting element) included in the pixel, it is as follows.

[0096] The first transistor T1 (driving transistor) includes a gate electrode connected to the first electrode of the first capacitor C1 and the second electrode of the second transistor T2, a first electrode (input-side electrode) connected to the cathode of the light-emitting element LED, and a second electrode (output-side electrode) transmitted to the driving low voltage ELVSS.

[0097] The first transistor T1 is such that the degree to which the first transistor T1 is turned on is determined according to the voltage of the gate electrode, and according to the degree to which it is turned on, the magnitude of the current flowing from the first electrode to the second electrode of the first transistor T1 is determined. The current flowing from the first electrode to the second electrode of the first transistor T1 is the same as the current flowing through the light-emitting element LED, and can also be referred to as the emission current. Here, the first transistor T1 is formed of an n-type transistor, and the higher the voltage of the gate electrode, the larger the emission current that flows. When the emission current is large, the light-emitting element LED can exhibit high luminance.

[0098] The second transistor T2 (data input transistor) includes a gate electrode connected to the first scan line 161 to which the first scan signal GW is applied, a first electrode (input-side electrode) connected to the data line 171 to which the data voltage VDATA is applied, and a second electrode (output-side electrode) connected to the first electrode of the first capacitor C1 and the gate electrode of the first transistor T1. The second transistor T2 causes the data voltage VDATA to be input into the pixel in accordance with the first scan signal GW and transmitted to the gate electrode of the first transistor T1, so that it can be stored in the first electrode of the first capacitor C1.

[0099] All the transistors are formed of n-type transistors. Each transistor is turned on when the voltage of the gate electrode is a high-level voltage and turned off when the voltage is a low-level voltage. Also, the semiconductor layer included in each transistor can use a polycrystalline silicon semiconductor or an oxide semiconductor, and additionally, an amorphous semiconductor or a single-crystalline semiconductor can also be used.

[0100] According to an embodiment, the semiconductor layer included in each transistor can further include a superimposed layer (or additional gate electrode) that superimposes on this, and by applying a voltage to the superimposed layer (additional gate electrode), the characteristics of the transistor can be changed, and the display quality of the pixel can be further improved.

[0101] The first capacitor C1 includes a first electrode connected to the gate electrode of the first transistor T1 and the second electrode of the second transistor T2, and a second electrode to which the driving low voltage ELVSS is transmitted. The first electrode of the first capacitor C1 serves to store the data voltage VDATA transmitted from the second transistor T2. According to an embodiment, the driving voltage ELVDD can also be transmitted to the second electrode of the first capacitor C1.

[0102] The light-emitting element LED includes an anode connected to the driving voltage line 172 to which the driving voltage ELVDD is transmitted, and a cathode connected to the first electrode of the first transistor T1. The light-emitting element LED is located between the pixel driving unit and the driving voltage ELVDD, and the same current as the current flowing through the first transistor T1 of the pixel driving unit flows through it, and the luminance of the light emitted according to the magnitude of the current is also determined. The light-emitting element LED may include a light-emitting layer including at least one of an organic light-emitting material and an inorganic light-emitting material between the anode and the cathode. The specific laminated structure of the light-emitting element LED according to the embodiment is as shown in FIG. 5 and the like.

[0103] Also, in FIG. 3, the light-emitting element LED is located between the first electrode of the first transistor T1 and the driving voltage line 172. The pixel according to the present embodiment is also referred to as an inverted pixel in order to distinguish it from a pixel in which the light-emitting element is located between the first transistor T1 and the driving low voltage ELVSS. The light-emitting element shows luminance according to the magnitude of the current flowing through the current path connected from the driving voltage ELVDD through the first transistor T1 to the driving low voltage ELVSS, and it is possible that the higher the current, the higher the displayed luminance.

[0104] In the embodiment of FIG. 3, one pixel PX has been described as including two transistors T1, T2 and one capacitor (the first capacitor C1), but it is not limited thereto, and according to embodiments, it can further include capacitors and transistors.

[0105] Hereinafter, a plurality of pixels are formed in the display area. Referring to FIG. 4, the planar structure of the plurality of light-emitting elements and the pixel driving unit according to one embodiment will be schematically examined.

[0106] FIG. 4 is a plan view schematically showing the connection between the pixel driving unit and the light-emitting element according to one embodiment.

[0107] FIG. 4 shows a part of the display area. The light-emitting area is an area where light is emitted by the light-emitting element LED. The light-emitting element LED can include light-emitting elements corresponding to the three primary colors of light. In the embodiment of FIG. 4, it may include a red light-emitting element, a green light-emitting element, and a blue light-emitting element. Each light-emitting element LED may include an anode, a light-emitting layer, and a cathode.

[0108] Below each light-emitting element LED, there may be included pixel driving units (PCr, PCg, PCb) that are electrically connected to them respectively. In FIG. 4, the pixel driving units (PCr, PCg, PCb) are indicated by dotted lines and are alternately positioned in the order of the red pixel driving unit PCr, the green pixel driving unit PCg, and the blue pixel driving unit PCb. The number and arrangement of such pixel driving units (PCr, PCg, PCb) can be variously changed.

[0109] The pixel driving unit (PCr, PCg, PCb) may include a red pixel driving unit PCr, a green pixel driving unit PCg, and a blue pixel driving unit PCb. The red pixel driving unit PCr and the red light-emitting element can be electrically connected via a red contact hole CNTr, the green pixel driving unit PCg and the green light-emitting element can be electrically connected via a green contact hole CNTg, and the blue pixel driving unit PCb and the blue light-emitting element can be electrically connected via a blue contact hole CNTb.

[0110] The light-emitting element LED can correspond to the light-emitting area corresponding to the openings (OPr, OPg, OPb) of the pixel defining film (refer to reference numeral 380-inor in FIG. 5). Hereinafter, instead of referring to the light-emitting element LED, the description will be made based on the light-emitting area and the openings (OPr, OPg, OPb) of the pixel defining film.

[0111] Above the pixel defining film, there is a partition wall (refer to reference numeral 390 in FIG. 5), and the partition wall includes openings (OPcatr, OPcatg, OPcatb) corresponding to the openings (OPr, OPg, OPb) of the pixel defining film. In FIG. 4, the openings (OPcatr, OPcatg, OPcatb) of the partition wall overlap with the openings (OPr, OPg, OPb) of the pixel defining film and are formed larger. Depending on the embodiment, the openings (OPr, OPg, OPb) of the pixel defining film may be formed larger than the openings (OPcatr, OPcatg, OPcatb) of the partition wall.

[0112] The partition wall is formed to include at least two layers formed of a conductive material, and the partition wall can have a protruding chip structure, and the chip structure can be located in the layer located at the uppermost part in the partition wall. With such a chip structure, the layer located at the upper part of the partition wall can be physically separated without an additional etching process.

[0113] Outside the openings (OPcatr, OPcatg, OPcatb) of the partition wall, a separator SEP forming a closed curve is formed. The separator SEP is formed on the partition wall, and within the partition wall, it can be formed as an empty space as shown in FIG. 5 or the space can be filled with an insulating material as shown in FIG. 9. The separator SEP can be formed so that the conductive partition wall is electrically separated. The separator SEP can be formed up to a sealing layer (refer to reference numeral Encap (encap) in FIG. 5) located on the partition wall and can also be located in the layer between the sealing layer and the partition wall.

[0114] Inside the separator SEP forming a closed curve, there are openings (OPr, OPg, OPb) of the pixel defining film and openings (OPcatr, OPcatg, OPcatb) of the partition walls. Inside the separator SEP, the cathodes of the light emitting elements LED are also located, and the cathodes adjacent to each other are electrically separated by the separator SEP. The cathodes located inside the separator SEP are electrically connected to at least a part of the partition wall surrounding it, and the partition wall is electrically connected to the transistors located in the pixel driving units (PCr, PCg, PCb) via the contact holes (CNTr, CNTg, CNTb), and the output current of the pixel driving units (PCr, PCg, PCb) is transmitted to the cathodes of the light emitting elements LED.

[0115] The contact holes (CNTr, CNTg, CNTb) are also located in the pixel defining film, so that the partition wall and the pixel driving units (PCr, PCg, PCb) can be electrically connected. On the other hand, according to an embodiment, the partition wall can be electrically connected to the anode which is one electrode of the light emitting element. The specific laminated structure of the partition wall, the pixel defining film and the separator SEP will be described in detail in FIG. 5 and the like.

[0116] On the other hand, outside the separator SEP, a separated cathode Cathodesl is formed as a whole and can be formed over the entire display area. According to an embodiment, a voltage having a certain voltage level (for example, a driving low voltage ELVSS) is applied to the separated cathode Cathodesl. The separated cathode Cathodesl has a mesh structure. The separated cathode Cathodesl is electrically separated from a plurality of cathodes by the separator SEP.

[0117] Referring to the embodiment of FIG. 4, the red opening OPr of the pixel defining film corresponding to the red light-emitting region and the green opening OPg of the pixel defining film corresponding to the green light-emitting region are each formed within one separator SEP. However, a plurality of blue openings OPb of the pixel defining film corresponding to the blue light-emitting region are formed within one separator SEP, and in the embodiment of FIG. 4, two blue openings OPb (each corresponding to a light-emitting region) are included. Here, only one cathode included in the blue light-emitting element is formed corresponding to the two blue openings OPb, because the cathode is separated by the separator SEP. Specifically, one contact hole CNTb electrically connects one cathode included in the blue light-emitting element and the blue pixel driving unit PCb, and the output current of the blue pixel driving unit PCb is transmitted to the two blue openings OPb.

[0118] On the other hand, in FIG. 4, adjacent separators SEP are separated from each other. However, depending on the embodiment, some adjacent separators SEP can also have a structure connected to each other.

[0119] The cross-sectional structure of the structure of FIG. 4 as described above will be specifically described with reference to FIG. 5.

[0120] FIG. 5 is a cross-sectional view of the light-emitting display device in the embodiment of FIG. 4.

[0121] In FIG. 5, it shows around the red pixel, and details the structure in which the pixel driving unit PCr is connected to the cathode Cathoder of the light-emitting element via the contact hole CNTr, and the structure in which the driving low voltage ELVSS is transmitted to the separated cathode Cathodesl.

[0122] In FIG. 5, the structure located below the planarization film 181 is shown schematically, and only one transistor is shown. Looking briefly at the structure from the substrate 110 to the planarization film 181, it is as follows.

[0123] The substrate 110 may include a rigid material such as glass that has rigid characteristics and cannot be bent, or may include a flexible material such as plastic or polyimide that can be bent. In the case of a flexible substrate, a two-layer structure of polyimide and a barrier layer formed of an inorganic insulating material thereon may have a repeatedly formed structure.

[0124] On the substrate 110, a lower shield layer BML1 containing metal is located, and the lower shield layer BML1 can overlap with the channel of the transistor located in the pixel driving unit (PCr, PCg, PCb) included in the display unit in a plane. Depending on the embodiment, the lower shield layer BML1 can be omitted.

[0125] The substrate 110 and the lower shield layer BML1 are covered by a buffer layer 111. The buffer layer 111 serves to block the penetration of impurity elements into the first semiconductor layer ACT1, and can be an inorganic insulating film containing silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiONx), etc.

[0126] On the upper side of the buffer layer 111, a first semiconductor layer ACT1 formed of polycrystalline silicon semiconductor (P-Si) or an oxide semiconductor is located. The first semiconductor layer ACT1 is a semiconductor layer located in the pixel driving unit (PCr, PCg, PCb) included in the display unit, and may include the channel of the transistor including the driving transistor and the first region and the second region located on both sides thereof. Here, the transistor is not limited to the driving transistor belonging to the pixel driving unit (PCr, PCg, PCb), and can be other switching transistors.

[0127] Also, on both sides of the channel of the first semiconductor layer ACT1, there are regions having conductive layer characteristics by plasma treatment or doping, and can serve as the first electrode and the second electrode of the transistor.

[0128] A first gate insulating film 141 may be located above the first semiconductor layer ACT1. The first gate insulating film 141 may be an inorganic insulating film containing silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiONx), or the like.

[0129] A first gate conductive layer including a gate electrode GE1 of a transistor located in the pixel driving unit PCr may be located above the first gate insulating film 141. The first gate conductive layer may include a scan line, a light emission control line, or a first electrode for a capacitor located in the pixel driving unit PCr, in addition to the gate electrode GE1 of the transistor located in the pixel driving unit PCr.

[0130] After forming the first gate conductive layer, a plasma treatment or doping process may be performed to make the exposed region in the first semiconductor layer conductive. That is, the first semiconductor layer ACT1 covered by the gate electrode GE1 is not made conductive, and the portion of the first semiconductor layer ACT1 not covered by the gate electrode GE1 may have the same characteristics as the conductive layer.

[0131] A second gate insulating film 142 may be located above the first gate conductive layer and the first gate insulating film 141. The second gate insulating film 142 may be an inorganic insulating film containing silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiONx), or the like.

[0132] A second gate conductive layer including a second electrode for a capacitor (not shown) located in the pixel driving unit PCr may be located above the second gate insulating film 142. The second electrode for the capacitor may overlap with the first electrode for the capacitor or the gate electrode GE1 to form a capacitor located in the pixel driving unit PCr, and the first electrode for the capacitor may be electrically connected to or integrally formed with the gate electrode GE1 of the driving transistor.

[0133] A first interlayer insulating film 151 may be positioned over the second gate conductive layer. The first interlayer insulating film 151 may include an inorganic insulating film containing silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiONx), etc., and in some embodiments, an inorganic insulating material may be formed thick.

[0134] A first data conductive layer including connection members (SE1, DE1) and a drive low voltage line 174 may be positioned over the first interlayer insulating film 151. The first data conductive layer may include a metal or a metal alloy such as aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), etc., and may be composed of a single layer or multiple layers.

[0135] Here, the connection members (SE1, DE1) are connected to the transistors belonging to the pixel driving unit PCr. Specifically, it may be composed of a connection member SE1 connected to the first region of the first semiconductor layer ACT1 and a connection member DE1 connected to the second region of the first semiconductor layer ACT1. Here, the connection member DE1 is connected to the cathode Cathoder through the partition wall 390.

[0136] Also, the first data conductive layer may further include a drive low voltage line 174. The drive low voltage line 174 transmits the drive low voltage ELVSS and is transmitted to the separated cathode Cathodesl through the partition wall 390.

[0137] In some embodiments, the drive low voltage line 174 may also be formed of the lower shield layer or the first gate conductive layer. Here, a connection member for transmitting the drive low voltage ELVSS to the first data conductive layer may be positioned. On the other hand, in some embodiments, a first drive low voltage line may be positioned in the first data conductive layer, and a second drive low voltage line may be positioned in the lower shield layer or the first gate conductive layer. At this time, the extension direction of the first drive low voltage line and the extension direction of the second drive low voltage line may be perpendicular, the extension direction of the first drive low voltage line may be the second direction DR2, and the extension direction of the second drive low voltage line may be the first direction DR1.

[0138] A planarization film 181 may be located on the first data conductive layer. The planarization film 181 may be an organic insulating film containing an organic substance, and the organic substance may contain one or more substances selected from the group consisting of polyimide, polyamide, acrylic resin, benzocyclobutene, and phenol resin.

[0139] The above-described pixel driving unit PC can be formed on the substrate 110, and the planarization film 181 covers the pixel driving unit PC. A structure including a light-emitting element LED and a separator SEP is formed on the planarization film 181.

[0140] Looking in detail at the structure above the planarization film 181, it is as follows.

[0141] An anode Anode is formed on the planarization film 181. Since the anode Anode constitutes one electrode of the light-emitting element LED, in an embodiment where the light-emitting element LED has an inverted structure, a driving voltage ELVDD is applied as the anode Anode. Although not shown in FIG. 5, the anode Anode can be electrically connected to or integrally formed with a driving voltage line 172 to which the driving voltage ELVDD is applied. In this case, the same driving voltage ELVDD is applied to all the anodes Anode.

[0142] A pixel defining film 380-inor having an opening OPr that overlaps at least a part of the anode (Anode) is located on the planarization film 181 and the anode (Anode). The pixel defining film 380-inor can be composed of an inorganic insulating film containing an inorganic insulating substance, and the inorganic insulating substance constituting the pixel defining film 380-inor can include silicon oxide (SiOx), silicon nitride (SiNx), or silicon oxynitride (SiONx), and the pixel defining film 380-inor can have a multilayer structure including a plurality of layers composed of an inorganic insulating substance.

[0143] The planarization film 181 and the pixel defining film 380-inor may include contact holes (CNTr, CNTsl) that expose at least a part of the pixel driving unit PC located below the planarization film 181. Referring to FIG. 5, the cathode contact hole CNTr (hereinafter also referred to as the first opening or the first contact hole) is formed in the pixel defining film 380-inor and the planarization film 181, and overlaps a part of the connection member DE1 that is electrically connected to one electrode of the transistor included in the pixel driving unit PC in a plane. On the other hand, the voltage transmission contact hole CNTsl (hereinafter also referred to as the second opening or the second contact hole) is formed in the pixel defining film 380-inor and the planarization film 181, and overlaps a part of the driving low voltage line 174 located in the pixel driving unit PC in a plane.

[0144] A partition wall 390 is located above the pixel defining film 380-inor. The partition wall has an opening OPcatr corresponding to the opening OPr of the pixel defining film, and may also include a part of the separator SEP. Here, the opening OPcatr of the partition wall 390 overlaps the opening OPr of the pixel defining film in a plane and can be formed larger.

[0145] The partition wall 390 is formed to include at least two layers formed of a conductive material, and the conductive material constituting the partition wall 390 may include various metals and their alloys. The partition wall 390 may include metals and metal alloys such as aluminum (Al), copper (Cu), molybdenum (Mo), and titanium (Ti). In the embodiment of FIG. 5, it can include lower conductive partition walls 390a, 390ac (hereinafter also referred to as the first conductive partition walls) and upper conductive partition walls 390b, 390bc (hereinafter also referred to as the second conductive partition walls). The lower conductive partition walls (390a, 390ac) are formed of a metal containing aluminum (Al), and the upper conductive partition walls (390b, 390bc) can be formed of a metal containing titanium (Ti). The lower conductive partition walls (390a, 390ac) and the upper conductive partition walls (390b, 390bc) are in contact with each other respectively and are electrically separated from each other, and are divided into inner conductive partition walls (390a, 390b) and outer conductive partition walls (390ac, 390bc). Here, the inner conductive partition walls (390a, 390b) are the parts that partition and surround the opening OPcatr of the partition wall 390, and the outer conductive partition walls (390ac, 390bc) are the parts that are away from the opening (OPcatr) of the partition wall 390. The inner conductive partition walls (390a, 390b) and the outer conductive partition walls (390ac, 390bc) are electrically separated by a separator SEP, and the outer conductive partition walls (390ac, 390bc) may have a structure connected over the entire region.

[0146] The inner conductive partition walls (390a, 390b) can be divided into a lower inner conductive partition wall 390a (hereinafter also referred to as the first inner conductive partition wall) and an upper inner conductive partition wall 390b (hereinafter also referred to as the second inner conductive partition wall), and the outer conductive partition walls (390ac, 390bc) can be divided into a lower outer conductive partition wall 390ac (hereinafter also referred to as the first outer conductive partition wall) and an upper outer conductive partition wall 390bc (hereinafter also referred to as the second outer conductive partition wall).

[0147] The lower conductive partition walls (390a, 390ac) and the upper conductive partition walls (390b, 390bc) are in contact with each other, and the side surfaces of the lower conductive partition walls (390a, 390ac) and the side surfaces of the upper conductive partition walls (390b, 390bc) may coincide. The side surfaces of the lower conductive partition walls (390a, 390ac) and the side surfaces of the upper conductive partition walls (390b, 390bc) do not have to coincide around the opening OPcatr of the partition wall 390. That is, among the inner conductive partition walls (390a, 390b), on the opening OPcatr side of the partition wall 390, the upper inner conductive partition wall 390b may protrude from the lower inner conductive partition wall 390a to have a tip structure. Referring to FIG. 5, the side surface of the lower inner conductive partition wall 390a has a structure in contact with the cathode Cathoder and electrically connected thereto. On the other hand, depending on the embodiment, the side surfaces of the lower conductive partition walls (390a, 390ac) and the side surfaces of the upper conductive partition walls (390b, 390bc) do not have to coincide.

[0148] The inner conductive partition walls (390a, 390b) are electrically connected to a connection member DE1 that is electrically connected to one electrode of a transistor included in the pixel driving unit PC through a cathode contact hole CNTr formed in the pixel defining film 380-inor and the planarization film 181. As a result, the output current of the pixel driving unit PC is transmitted to the cathode Cathoder through the inner conductive partition walls (390a, 390b).

[0149] The outer conductive partition walls (390ac, 390bc) are electrically connected to a driving low voltage line 174 located in the pixel driving unit PC through a voltage transmission contact hole CNTsl formed in the pixel defining film 380-inor and the planarization film 181. As a result, a driving low voltage ELVSS is applied to the outer conductive partition walls (390ac, 390bc).

[0150] Within the opening OPcatr of the adjacent partition 390, the light-emitting layer EMLr is located above the anode Anode. On the other hand, above the upper conductive partitions (390b, 390bc), there may be located a separated light-emitting layer EMLri formed of the same material as the light-emitting layer EMLr located within the opening OPcatr of the adjacent partition 390 and separated therefrom, and / or a separated light-emitting layer (EMLgi, EMLbi) corresponding to a color different from that of the light-emitting layer EMLr located within the opening OPcatr. Specifically, above the upper inner conductive partition 390b, only the separated light-emitting layer EMLri formed of the same material as the light-emitting layer EMLr located within the opening OPcatr of the adjacent partition 390 is located, but above the upper outer conductive partition 390bc, there may be located a separated light-emitting layer (EMLgi, EMLbi) corresponding to a color different from that of the light-emitting layer EMLr located within the opening OPcatr.

[0151] The light-emitting layer EMLr located within the opening OPcatr of the partition 390 and the separated light-emitting layers (EMLri, EMLgi, EMLbi) can be separated by a tip structure in which the upper inner conductive partition 390b protrudes more than the lower inner conductive partition 390a without a separate etching process.

[0152] Within the opening OPcatr of the partition 390, the cathode Cathoder is located above the light-emitting layer EMLr. On the other hand, above the separated light-emitting layers (EMLri, EMLgi, EMLbi), a separated cathode Cathodesl formed of the same material as the cathode Cathoder is located. The separated cathode Cathodesl can be separated from the cathode Cathoder by a tip structure in which the upper inner conductive partition 390b protrudes more than the lower inner conductive partition 390a without a separate etching process.

[0153] The separated light-emitting layers (EMLri, EMLgi, EMLbi) and the separated cathode Cathodesl can be located on the entire surface of the upper conductive partitions (390b, 390bc), and can also be located on the tip structure of the protruding upper inner conductive partition 390b.

[0154] The separate light-emitting layers (EMLri, EMLgi, EMLbi) and the separate cathode Cathodesl are applied with the same voltage as that of the partition wall 390 in contact therewith. Specifically, in the portion of the separate cathode Cathodesl located on the inner conductive partition walls (390a, 390b), the output current of the pixel driving unit PC can be transmitted by being electrically connected to the cathode Cathoder through the inner conductive partition walls (390a, 390b) and the separate light-emitting layers (EMLri, EMLgi, EMLbi). In the portion of the separate cathode Cathodesl located on the outer conductive partition walls (390ac, 390bc), the driving low voltage ELVSS can be transmitted through the outer conductive partition walls (390ac, 390bc) and the separate light-emitting layers (EMLri, EMLgi, EMLbi).

[0155] On the other hand, the angle at which the light-emitting layer material is laminated (formed) is different from the angle at which the cathode material is laminated. The angle formed by the direction of laminating the cathode material with respect to the third direction DR3 can be larger than the angle formed by the direction of laminating the light-emitting layer material with respect to the third direction DR3. As a result, the light-emitting layer material is formed so as to be covered by a wide area by the tip of the upper inner conductive partition wall 390b, and the cathode material can be formed so as to be covered by a relatively narrow area. Therefore, as shown in FIG. 5, the light-emitting layer EMLr located within the opening OPcatr of the partition wall 390 is not formed entirely on the side surface of the lower inner conductive partition wall 390a and can be located centered on the upper side of the anode Anode. The cathode Cathoder can be electrically connected to each other by contacting the side surface of the lower inner conductive partition wall 390a. By adjusting the angle at which the cathode material is formed, unlike FIG. 5, it is also possible to form the separate cathode Cathodesl to have a structure in which it is connected without being separated from the cathode Cathoder.

[0156] The separate light-emitting layers (EMLri, EMLgi, EMLbi) and the separate cathode Cathodesl are separated by a separator SEP. The separator SEP according to the embodiment of FIG. 5 is formed across the partition wall 390, the separate light-emitting layers (EMLri, EMLgi, EMLbi), the separate cathode Cathodesl, and the encapsulation layer Encap.

[0157] That is, referring to the embodiment of FIG. 5, an encapsulation layer Encap is formed on the cathode Cathoder and the separate cathode Cathodesl. After the encapsulation layer Encap is formed, the separator SEP is formed by an etching process. The separator SEP basically serves to separate the conductive partition wall 390 and is formed across the encapsulation layer Encap, the separate cathode Cathodesl, the separate light-emitting layers (EMLri, EMLgi, EMLbi), and the partition wall 390, and may additionally be formed on a part of the pixel defining film 380-inor.

[0158] The separator SEP according to the embodiment of FIG. 5 is formed as an empty space.

[0159] However, depending on the embodiment, the separator SEP may fill the empty space with an insulating material, and in some embodiments, the separator SEP may not be formed on the encapsulation layer Encap. Regarding a part of the encapsulation layer Encap, even if an empty space is generated by the separator SEP, in this embodiment, since the partition wall 390 is formed of a conductive material, it is difficult for air and moisture to penetrate into the light-emitting layer EMLr, so there is a low possibility of deterioration of the characteristics of the light-emitting layer. In the embodiment of FIG. 5, the encapsulation layer Encap is shown to be relatively thin, which means that since it is etched to form the separator SEP, a part can be formed thinly. Depending on the embodiment, it can be formed thickly, different from the drawing.

[0160] Other features according to the above embodiments of FIGS. 4 and 5 will be specifically described with reference to FIGS. 6 and 7.

[0161] FIG. 6 and FIG. 7 are diagrams showing the effects of the embodiments of FIGS. 3 and 4.

[0162] First, in FIG. 6, a structure is schematically shown in which a separation cathode Cathodesl located on the outer conductive partition walls (390ac, 390bc) is located on the encapsulation layer and forms a capacitance with a sensing electrode 540 capable of sensing a touch of the light-emitting display device. In FIG. 6, the sensing electrode 540 is shown as floating in the air, which is because the intermediate layer is omitted, and an encapsulation layer and various insulating films may be located therebetween.

[0163] As shown in FIG. 6, a sensing electrode 540 for sensing a touch may be located on the front surface of the light-emitting display device. However, in order to prevent a problem that the sensing electrode 540 is affected as the output current of the pixel driving unit PC applied to the inner conductive partition walls (390a, 390b) and the separation cathode Cathodesl located thereon changes, a voltage having a certain voltage level (for example, a driving low voltage ELVSS) is applied to the outer conductive partition walls (390ac, 390bc) and the separation cathode Cathodesl located thereon, thereby reducing voltage fluctuations of the sensing electrode 540 and preventing noise from flowing in from the outside. As a result, the sensing operation of the light-emitting display device has an advantage of being more accurate.

[0164] On the other hand, in FIG. 7, in this embodiment, since a voltage is applied using the outer conductive partition walls (390ac, 390bc) which are a part of the partition wall 390 instead of a voltage line for applying a voltage, an advantage is explained that the resolution in the same area can be increased by removing the voltage line located adjacent to the pixel driving unit PC.

[0165] That is, FIG. 7(A) schematically shows a comparative example, and FIG. 7(B) schematically shows an embodiment.

[0166] In FIG. 7(A) which is a comparative example, two voltage lines 173 and 174 extending in the second direction DR2 and three pixel driving parts (PCr, PCg, PCb) are shown. In FIG. 7(B) which is an embodiment, the driving low voltage line 174 is omitted, and this portion constitutes a margin space Spc. Since the margin space Spc can be removed, the adjacent pixel driving parts (PCr, PCg, PCb) can be positioned to be more adjacent to each other. As a result, a light-emitting display device with the same area can be formed with a higher resolution.

[0167] On the other hand, referring to FIG. 7(B), the margin space Spc may extend in the first direction DR1. Generally, voltage lines to which the same voltage is applied may include a first voltage line extending in the second direction DR2 and a second voltage line extending in the first direction DR2. In this case, the first voltage line and the second voltage line may be located in different conductive layers. For example, the driving low voltage line 174 is divided into a first driving low voltage line extending in the second direction DR2 and a second driving low voltage line extending also in the first direction DR1, and the first driving low voltage line may be located in the first data conductive layer, and the second driving low voltage line may be located in the lower shield layer.

[0168] In such an embodiment, all two voltage lines can be removed, and as a result, by removing the margin space (Spc) extending in the first direction DR1, it can be formed with increased density. As a result, a light-emitting display device with the same area can be formed with a higher resolution.

[0169] The above has been described mainly centering on the embodiments of FIGS. 4 and 5.

[0170] Hereinafter, referring to FIGS. 8 to 12, various modified embodiments will be described.

[0171] FIGS. 8 to 12 are diagrams of a light-emitting display device according to other embodiments.

[0172] First, the embodiment of FIG. 8 will be described.

[0173] FIG. 8 is a modified embodiment of FIG. 5. Different from the embodiment of FIG. 5, a separator SEP is shown in which the space is filled with an organic substance instead of being formed as an empty space.

[0174] In the embodiment of FIG. 8, the separator SEP can be formed in the shape of a pillar of an organic substance, and in some embodiments, it can also be formed of an inorganic substance instead of an organic substance. According to the separator SEP of FIG. 8, compared with the separator SEP formed as an empty space, the property of blocking moisture and air from flowing into the light-emitting layer can be further improved. That is, even if the separator SEP is formed in the encapsulation layer Encap and filled with an insulating substance, compared with the separator SEP of FIG. 5 which is an empty space, air and moisture do not flow into the inside of the separator SEP, so it can have the characteristic of being easy to protect the light-emitting layer.

[0175] Hereinafter, the embodiment of FIG. 9 will be described.

[0176] In the embodiment of FIG. 9, a separator SEP filled with an insulating substance as in FIG. 8 and a transparent electrode PLEC added on the encapsulation layer Encap are formed. Here, the transparent electrode PLEC can be formed of a transparent conductive substance, and examples of the transparent conductive substance can include ITO (Indium Tin Oxide), poly(poly)-ITO, IZO (Indium Zinc Oxide), IGZO (Indium Gallium Zinc Oxide), and ITZO (Indium Tin Zinc Oxide).

[0177] The transparent electrode PLEC can be formed over the entire surface. The transparent electrode PLEC is electrically connected to the outer conductive partition walls (390ac, 390bc) through the separation light-emitting layers (EMLri, EMLgi, EMLbi) located on the outer conductive partition walls (390ac, 390bc), the separation cathodes Cathodesl, and the opening CNTp located in the encapsulation layer Encap. Since the outer conductive partition walls (390ac, 390bc) are connected to the drive low-voltage line 174 through the contact holes CNTsl, the drive low-voltage ELVSS is applied to the transparent electrode PLEC.

[0178] According to an embodiment as shown in FIG. 9, it may have a feature that noise is completely shielded by the sensing electrode (see reference numeral 540 in FIG. 6). That is, when the sensing electrode is positioned as in FIG. 6, noise is applied to the sensing electrode 540 as the output current of the pixel driving unit PC applied to the inner conductive partition walls (390a, 390b) and the separation cathodes Cathodesl located thereon changes. However, in FIG. 9, since the transparent electrode PLEC is located over the entire surface below the sensing electrode (see reference numeral 540 in FIG. 6) and on the inner conductive partition walls (390a, 390b) and the separation cathodes Cathodesl, the sensing electrode (see reference numeral 540 in FIG. 6) is electrically separated and shielded from the inner conductive partition walls (390a, 390b) and the separation cathodes Cathodesl, so that noise does not flow into the sensing electrode (see reference numeral 540 in FIG. 6).

[0179] Hereinafter, the embodiment of FIG. 10 will be described.

[0180] In the embodiment of FIG. 10, different from FIG. 5 where the pixel defining film is formed of an inorganic insulating material, a pixel defining film including an organic insulating material is formed.

[0181] The pixel defining film including the organic insulating material can be composed of a single film, but in the embodiment of FIG. 10, it includes a pixel defining film 380 composed of a triple layer.

[0182] The pixel defining film 380 according to the embodiment of FIG. 10 includes a first pixel defining film 380-orb (hereinafter also referred to as a black pixel defining film), a second pixel defining film 380-pl (hereinafter also referred to as an intermediate pixel defining film), and a third pixel defining film 380-ort (hereinafter also referred to as a transparent pixel defining film).

[0183] The first pixel defining film 380-orb has a black color so that light does not transmit therethrough, and in an embodiment, it can be formed of a negative-type black organic substance. The black organic substance can include a light-blocking substance, and examples of the light-blocking substance include carbon black, carbon nanotubes, a resin or paste containing a black dye, metal (for example, at least one of nickel, aluminum, molybdenum, and their alloys) particles, metal oxide particles, and / or metal nitride (for example, chromium nitride). Since the first pixel defining film 380-orb has a black color by including a light-blocking substance, it may have a property of absorbing / blocking light without being reflected. Since a negative-type organic substance is used, it may have a property that the portion covered with the mask is removed.

[0184] The second pixel defining film 380-pl can be a temporary protective layer for protecting the first pixel defining film 380-orb during the process, and can be an inorganic insulating film including silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiONx), or the like. On the other hand, according to an embodiment, the second pixel defining film 380-pl can also include an organic substance. On the other hand, the second pixel defining film 380-pl can also play a role of improving the contact characteristics between the first pixel defining film 380-orb and the third pixel defining film 380-ort.

[0185] The third pixel defining film 380-ort can have a property that light transmits therethrough, and in an embodiment, it can be formed of a positive-type photosensitive organic substance. As an example, photosensitive polyimide (PSPI) can be used. Since it has positive characteristics, the portion not covered with the mask can be removed. The third pixel defining film 380-ort has transparency, and light transmits and / or reflects therethrough.

[0186] The third pixel defining film 380-ort can serve as a spacer and can also serve as a contact assisting role between the first pixel defining film 380-orb and the light emitting layer EMLr above it.

[0187] The second pixel defining film 380-pl and the third pixel defining film 380-ort can be formed with a narrower width than the first pixel defining film 380-orb. That is, in the embodiment of FIG. 10, the opening OPr of the pixel defining film 380 can be located in the first pixel defining film 380-orb, and the second pixel defining film 380-pl and the third pixel defining film 380-ort can include an opening formed wider than the opening OPr.

[0188] On the other hand, depending on the embodiment, the second pixel defining film 380-pl may be omitted, and the pixel defining film 380 may be formed only by the first pixel defining film 380-orb and the third pixel defining film 380-ort.

[0189] The embodiment of FIG. 10 is different from the embodiment of FIG. 5 in that the pixel defining film 380 is formed of an organic material, and all other features are the same.

[0190] Hereinafter, the embodiment of FIG. 11 will be described.

[0191] FIG. 11 further shows an anode (Anode-r, Anode-g, Anode-b) according to an embodiment in the plan view of FIG. 4, and the planar structure of the anode can be various depending on the embodiment.

[0192] Referring to the embodiment of FIG. 11, the boundaries of the red anode Anode-r of the red light-emitting element, the green anode Anode-g of the green light-emitting element, and the blue anode Anode-b of the blue light-emitting element can be located on the plane between the separator SEP and the openings (OPcatr, OPcatg, OPcatb) of the partition walls. As a result, each anode (Anode-r, Anode-g, Anode-b) overlaps with the openings (OPcatr, OPcatg, OPcatb) of the partition walls and the openings (OPr, OPg, OPb) of the pixel defining film on the plane. Here, the red anode Anode-r of the red light-emitting element and the green anode Anode-g of the green light-emitting element overlap with the openings (OPr, OPg) of one pixel defining film on the plane, respectively, while the blue anode Anode-b of the blue light-emitting element overlaps with the openings OPb of two pixel defining films. Here, the blue anode Anode-b of the blue light-emitting element has a structure that does not overlap with the contact hole CNTb located between the openings OPb of the two pixel defining films. More specifically, the blue anode Anode-b of the blue light-emitting element includes an extension Anode-b1 that overlaps with the opening OPb of each pixel defining film on the plane and a connecting portion Anode-b2 that connects them, and the connecting portion Anode-b2 also has a structure that does not overlap with the contact hole CNTb on the plane. The position and shape where the connecting portion Anode-b2 connects the two extensions Anode-b1 can be variously changed depending on the embodiment.

[0193] Hereinafter, the embodiment of FIG. 12 will be described.

[0194] The embodiment of FIG. 12 is a modified embodiment of FIG. 8, showing a structure in which the separator SEP is not formed in the encapsulation layer Encap.

[0195] In the embodiment of FIG. 12, the separator SEP is formed across the separated cathode Cathodesl, the separated light-emitting layers (EMLri, EMLgi, EMLbi), and the partition wall 390, and can additionally be formed on a part of the pixel defining film 380-inor. Further, the separator SEP is filled with an insulating material and may be formed as an empty space depending on the embodiment.

[0196] In the embodiment of FIG. 12, a sealing layer Encap is formed on the separator SEP, the separated cathode Cathodesl, and the cathode Cathoder.

[0197] Since the separator SEP is not formed on the sealing layer Encap, the effect of preventing moisture and air from flowing into the light-emitting layer from the outside is improved.

[0198] Hereinafter, with reference to FIGS. 13 to 17, a structure of an electronic device using the above-described light-emitting display device and a structure of other parts of the light-emitting display device will be described centering on one embodiment.

[0199] FIG. 13 is a schematic perspective view of an electronic device according to an embodiment.

[0200] Referring to FIG. 13, the electronic device 1 is an electronic device that provides a display screen for displaying moving images and still images in the third direction DR3. For example, a TV, a notebook computer, a monitor, a billboard, the Internet of Things, a mobile phone, a smartphone, a tablet PC (Personal Computer), an electronic clock, a smartwatch, a watch phone, a head-mounted display, a mobile communication terminal, an electronic notebook, an e-book, a PMP (Portable Multimedia Player), a navigation device, a game machine, a digital camera, a camcorder, etc., that provide a display screen can be included in the electronic device 1.

[0201] The electronic device 1 includes a cover window WIN and a housing HM. Inside the cover window WIN and the housing HM, the light-emitting display device 10 shown in FIG. 14 may be located. Therefore, the cover window WIN and the housing HM can be combined to form the appearance of the electronic device 1.

[0202] The cover window WIN may include an insulating panel. For example, the cover window WIN can be made of glass, plastic, or a combination thereof. Depending on the embodiment, the cover window WIN can include a touch sensing portion capable of sensing touch.

[0203] The front surface of the cover window WIN can define the front surface of the electronic device 1.

[0204] The housing HM is coupled to the cover window WIN. The cover window WIN can be disposed on the front surface of the housing HM. The housing HM can be coupled to the cover window WIN to provide a predetermined accommodation space. The light-emitting display device 10 can be accommodated in a predetermined accommodation space provided between the housing HM and the cover window WIN.

[0205] The housing HM can include a material having relatively high rigidity. For example, the housing HM can include glass, plastic, or metal, or can include a plurality of frames and / or plates formed of a combination thereof. The housing HM has a back surface and side surfaces, and the cover window WIN is disposed above the housing HM, and can stably protect the configuration of the light-emitting display device 10 accommodated in the internal space formed by the housing HM and the cover window WIN from external impacts.

[0206] The electronic device 1 may include a display device (refer to reference numeral 10 in FIG. 14) that provides a display screen in the third direction DR3. Various display devices such as an inorganic light-emitting element display device, an organic light-emitting display device, and a quantum dot light-emitting display device can be used for the display device included in the electronic device 1. Hereinafter, as an example of the display device, a light-emitting display device including an organic light-emitting element will be mainly described, but the present invention is not limited thereto, and the same technical idea can be applied to other display devices as long as it is applicable.

[0207] The shape of the electronic device 1 can be variously changed. For example, the electronic device 1 may have a shape such as a horizontally long rectangle, a vertically long rectangle, a square, a rounded square, other polygons, or a circle. The shape of the display area DA of the electronic device 1 can also be the same as the general shape of the electronic device 1. In FIG. 13, a rectangular electronic device 1 in which the length in the first direction DR1 is relatively long is shown, but the present invention is not limited thereto.

[0208] The electronic device 1 may include a display area DA and a non-display area NDA. The display area DA and the non-display area NDA shown in FIG. 13 can correspond to the display area DA and the non-display area NDA of the light-emitting display device 10. The display area DA is an area where the screen is displayed, and the non-display area NDA is an area where the screen is not displayed. The display area DA generally occupies most of the area centered on the center of the electronic device 1, and the non-display area NDA may have a structure surrounding the periphery of the display area DA.

[0209] The display area DA may include a first display area DA1, a second display area DA2, and a third display area DA3. The second display area DA2 and the third display area DA3 are areas where components such as sensors and cameras for adding various functions to the electronic device 1 are arranged on the back surface (the surface located downward in the third direction DR3), and the second display area DA2 and the third display area DA3 correspond to the component area. The second display area DA2 and the third display area DA3 are surrounded by the first display area DA1. Not only the first display area DA1 but also the second display area DA2 and the third display area DA3 can all display images. The positions and numbers of the second display area DA2 and the third display area DA3 can be variously changed according to the embodiment.

[0210] Hereinafter, with reference to FIG. 14, the structure of a light-emitting display device, which is an example of a display device, will be described.

[0211] FIG. 14 is a perspective view of a light-emitting display device included in an electronic device according to an embodiment.

[0212] Referring to FIG. 14, an electronic device 1 according to an embodiment can include a light-emitting display device 10. The light-emitting display device 10 can display a screen on the electronic device 1 and provide a role of sensing or photographing the front surface of the electronic device 1. The light-emitting display device 10 may have a planar form similar to that of the electronic device 1. For example, the light-emitting display device 10 may have a form similar to a quadrilateral having sides in the first direction DR1 and sides in the second direction DR2. The corner portions where the sides in the first direction DR1 and the sides in the second direction DR2 meet can be formed round to have a curvature, but are not limited thereto and can also be formed at right angles. The planar form of the light-emitting display device 10 is not limited to a quadrilateral and can be formed to be similar to other polygons, a circle, or an ellipse.

[0213] The light-emitting display device 10 may include a display panel 100, a display driving unit 200, a circuit board 300, and a touch driving unit 400.

[0214] The display panel 100 may include a main area MA and a sub area SBA.

[0215] The main area MA may include a display area DA including pixels for displaying an image, and a non-display area NDA disposed around the display area DA. The display area DA may include a first display area DA1, a second display area DA2, and a third display area DA3. The second display area DA2 and the third display area DA3 not only include pixels, but also components such as sensors and cameras are disposed below in the third direction DR3, and the second display area DA2 and the third display area DA3 correspond to component areas.

[0216] The display area DA can emit light in the third direction DR3 from a plurality of light-emitting areas corresponding to a plurality of light-emitting elements. For example, the display panel 100 may include a pixel circuit portion including transistors, and a light-emitting element, and may include a pixel defining film having an opening that defines a light-emitting area of the light-emitting element. Here, the light-emitting element can include at least one of an organic light-emitting diode (OLED) including an organic light-emitting layer, a quantum dot light-emitting diode (QLED) including a quantum dot light-emitting layer, an inorganic light-emitting diode (ILED) including an inorganic semiconductor, and a micro light-emitting diode (Micro LED), but is not limited thereto.

[0217] The non-display area NDA is an outer area of the display area DA and surrounds the display area DA. The non-display area NDA is defined as a peripheral area of the main area MA of the display panel 100. The non-display area NDA may include a gate driving unit (not shown) that supplies a gate signal to a gate line, and a fan-out line (not shown) that connects the display driving unit 200 and the display area DA.

[0218] The sub-region SBA can be a region extended from one side of the main region MA. The sub-region SBA can include a flexible material that allows bending, folding, rolling, etc. For example, when the sub-region SBA is bent (folded back), the sub-region SBA is superimposed on the main region MA in the thickness direction (the third direction DR3). The sub-region SBA can include a display driving unit 200 and a pad unit connected to the circuit board 300. In other embodiments, the sub-region SBA can be omitted, and the display driving unit 200 and the pad unit can be arranged in the non-display region NDA.

[0219] The display driving unit 200 can output signals and voltages for driving the display panel 100. The display driving unit 200 can supply data voltages to the data lines. The display driving unit 200 can supply a power supply voltage to the power supply line and supply a gate control signal to the gate driving unit. The display driving unit 200 is formed of an integrated circuit (IC) and can be mounted on the display panel 100 by a COG (Chip on Glass) method, a COP (Chip on Plastic) method, or an ultrasonic bonding method. For example, the display driving unit 200 is arranged in the sub-region SBA and can be superimposed on the main region MA in the thickness direction (the third direction DR3) by bending the sub-region SBA. As another example, the display driving unit 200 can be mounted on the circuit board 300.

[0220] The circuit board 300 can be attached onto the pad unit of the display panel 100 by using an anisotropic conductive film (ACF). The lead lines of the circuit board 300 are electrically connected to the pad unit of the display panel 100. The circuit board 300 can be a flexible film such as a flexible printed circuit board, a printed circuit board, or a chip on film.

[0221] The touch driving unit 400 can be mounted on the circuit board 300. The touch driving unit 400 can be electrically connected to the touch sensing unit included in the electronic device 1. The touch driving unit 400 can supply a touch driving signal to a plurality of sensing electrodes of the touch sensing unit and sense the change amount of the capacitance between the plurality of sensing electrodes. For example, the touch driving signal can be a pulse signal having a predetermined frequency. The touch driving unit 400 can calculate the input necessity and the input coordinates based on the change amount of the capacitance between the plurality of sensing electrodes. The touch driving unit 400 can be formed as an integrated circuit IC.

[0222] Hereinafter, with reference to FIG. 15, the cross-sectional structure of the light-emitting display device 10 will be described.

[0223] FIG. 15 is a cross-sectional view of the light-emitting display device of FIG. 14.

[0224] Referring to FIG. 15, the display panel 100 may include a display layer DU and an external light reduction layer CFL. The display layer DU may include a substrate SUB, a driving element layer TFTL, a light-emitting element layer EML, and a sealing layer TFEL.

[0225] The substrate SUB can be a base substrate or a base member. The substrate SUB can be a flexible substrate that can be bent, folded, rolled, etc. For example, the substrate SUB can include a polymer resin such as polyimide (PI), but is not limited thereto. In other embodiments, the substrate SUB can include a glass material or a metal material.

[0226] The driving element layer TFTL is disposed on the substrate SUB. The driving element layer TFTL may include a plurality of transistors and capacitors for constituting a pixel circuit portion that outputs and transmits current to the light-emitting element. The driving element layer TFTL may further include a gate line, a data line, a power supply line, a gate control line, a fan-out line that connects the display driving unit 200 and the data line, and a lead line that connects the display driving unit 200 and the pad portion. Each of the transistors may include a semiconductor including a channel region, a source region, and a drain region, and a gate electrode located on one side of the semiconductor. Here, the source region and the drain region of the semiconductor can each serve as the source electrode (first electrode) and the drain electrode (second electrode) of the transistor. Also, when the gate driving unit is formed on one side of the non-display region NDA of the display panel 100, the gate driving unit may include a transistor.

[0227] The driving element layer TFTL is disposed in the display region DA, the non-display region NDA, and the sub-region SBA. The transistors, gate lines, data lines, and power supply lines of the driving element layer TFTL are disposed in the display region DA. The gate control line and the fan-out line of the driving element layer TFTL are disposed in the non-display region NDA. The lead line of the driving element layer TFTL is disposed in the sub-region SBA.

[0228] The light-emitting element layer EML has light-emitting elements and corresponding light-emitting regions, and is disposed on the driving element layer TFTL. The light-emitting element layer EML may include a plurality of light-emitting elements that include a first electrode, a second electrode, and a light-emitting layer and emit light, and a pixel defining film having an opening that defines the light-emitting region. The plurality of light-emitting elements of the light-emitting element layer EML are disposed in the display region DA.

[0229] In one embodiment, the light-emitting layer may be an organic light-emitting layer containing an organic substance. On both sides of the light-emitting layer, a functional layer including at least one layer among an electron injection layer, an electron transport layer, a hole transport layer, and a hole injection layer may be located. Here, the light-emitting layer and the functional layer together can be referred to as an intermediate layer. When the first electrode receives a voltage by the transistor of the driving element layer TFTL and the second electrode receives a driving low voltage, holes and electrons are respectively moved to the organic light-emitting layer by the hole transport layer and the hole transfer layer and the electron transport layer and the electron transfer layer, and can combine with each other in the organic light-emitting layer to emit light. Here, one of the first electrode and the second electrode may be an anode, and the other one may be a cathode.

[0230] In another embodiment, the light-emitting element may be a quantum dot light-emitting element including a quantum dot light-emitting layer, an inorganic light-emitting element including an inorganic semiconductor, or a micro light-emitting element.

[0231] The encapsulation layer TFEL can cover the upper surface and the side surface of the light-emitting element layer EML, and can protect the light-emitting element layer EML so that external moisture and air do not enter. The encapsulation layer TFEL may include at least one inorganic film and at least one organic film for encapsulating the light-emitting element layer EML.

[0232] The external light reduction layer CFL may be disposed on the encapsulation layer TFEL. The external light reduction layer CFL may include a plurality of color filters corresponding to the respective plurality of light-emitting regions. Also, a light-shielding member may be superimposed and located between the color filters adjacent to each other in the external light reduction layer CFL, or at the overlapping portion where the adjacent color filters overlap. The light-shielding member is located above or below in the third direction DR3 with respect to the color filter, and can also be located on both sides.

[0233] The external light reduction layer CFL can be directly disposed on the encapsulation layer TFEL, so that the light-emitting display device 10 may not require a separate substrate for the external light reduction layer CFL. Also, a polarizing plate is not attached on the upper portion of the external light reduction layer CFL. As a result, the thickness of the light-emitting display device 10 may be relatively small. Also, although there may be a disadvantage that the light-emitting display device 10 does not include a polarizing plate and external light is directly reflected, it may have an advantage that the reflection of external light is reduced by the color filter and the light-shielding member included in the external light reduction layer CFL. That is, since the color filter selectively transmits light of a specific wavelength and blocks or absorbs light of other wavelengths, and the light-shielding member absorbs external light, the amount of light flowing into the light-emitting display device 10 from the outside is reduced, and the amount of reflected light is also reduced, thereby reducing the disadvantage due to the reflection of external light.

[0234] According to an embodiment, the light-emitting display device 10 may further include an optical device 500. The optical device 500 may be disposed on the back surface of the second display area DA2 or the third display area DA3. The optical device 500 can emit or receive light in the infrared, ultraviolet, and visible light bands. For example, the optical device 500 may be an optical sensor that senses light incident on the light-emitting display device 10, such as a proximity sensor, an illuminance sensor, and a camera sensor or an image sensor.

[0235] Hereinafter, with reference to FIG. 16, the connection relationship of the components included in the light-emitting display device 10 will be specifically described.

[0236] FIG. 16 is a schematic plan view showing the connection relationship between the components of a light-emitting display device according to an embodiment.

[0237] Referring to FIG. 16, the display layer DU of the light-emitting display device 10 may include a display area DA and a non-display area NDA.

[0238] The display area DA is arranged at the center of the display panel 100. In the display area DA, a plurality of unit pixels PX, a plurality of gate lines GL, a plurality of data lines DL, and a plurality of power lines VL are arranged. Each of the plurality of unit pixels PX is the minimum unit that emits light, and includes a pixel circuit portion including a transistor and a capacitor, and a light emitting element through which current is transmitted from the pixel circuit portion.

[0239] Each unit pixel PX is connected to the gate line GL, the data line DL, and the power line VL, and the gate line GL and the power line VL may each include a plurality of lines.

[0240] The plurality of gate lines GL can supply the gate signals received from the gate driving unit 210 to the plurality of unit pixels PX. The plurality of gate lines GL extend in the first direction DR1 and can be spaced apart from each other in the second direction DR2 intersecting the first direction DR1.

[0241] The plurality of data lines DL can supply the data voltages received from the display driving unit 200 to the plurality of unit pixels PX. The plurality of data lines DL extend in the second direction DR2 and can be spaced apart from each other in the first direction DR1.

[0242] The plurality of power lines VL can supply the power voltages received from the display driving unit 200 to the plurality of unit pixels PX. Here, the power voltage is at least one of a driving voltage, an initialization voltage, a reference voltage, and a driving low voltage, and a plurality of these power voltages can be transmitted to the unit pixel PX. The plurality of power lines VL extend in the second direction DR2 and can be spaced apart from each other in the first direction DR1.

[0243] The non-display area NDA can surround the display area DA. In the non-display area NDA, the gate driving unit 210, the fan-out line FOL, and the gate control line GCL may be arranged.

[0244] The gate driving unit 210 can generate a plurality of gate signals based on a gate control signal, and can sequentially supply the plurality of gate signals to a plurality of gate lines GL in a set order.

[0245] The fan-out line FOL can extend from the display driving unit 200 to the display area DA. The fan-out line FOL can supply the data voltage received from the display driving unit 200 to a plurality of data lines DL.

[0246] The gate control line GCL can extend from the display driving unit 200 to the gate driving unit 210. The gate control line GCL can supply the gate control signal received from the display driving unit 200 to the gate driving unit 210.

[0247] Referring to FIG. 16, the light-emitting display device 10 can further include a sub-region SBA.

[0248] The sub-region SBA may include a display driving unit 200, a pad region PA, and first and second touch pad regions (TPA1, TPA2).

[0249] The display driving unit 200 can output signals and voltages for driving the display panel 100 to the fan-out line FOL. The display driving unit 200 can supply a data voltage to the data lines DL through the fan-out line FOL. The data voltage can be supplied to a plurality of unit pixels PX, and the luminance of the plurality of unit pixels PX can be controlled. The display driving unit 200 can supply a gate control signal to the gate driving unit 210 through the gate control line GCL.

[0250] The pad region PA, the first touch pad region TPA1, and the second touch pad region TPA2 can be arranged on the periphery of the sub-region SBA. The pad region PA may include a plurality of display pad portions DP. The plurality of display pad portions DP are connected to the graphics system through the circuit board 300. The plurality of display pad portions DP are connected to the circuit board 300, can receive digital video data, and can supply the digital video data to the display driving unit 200. The first touch pad region TPA1 and the second touch pad region TPA2 each include a plurality of touch pads (TP1, TP2), are connected to the touch driving unit 400 located on the circuit board 300, and can sense touches. The pad region PA, the first touch pad region TPA1, and the second touch pad region TPA2 are electrically connected to the circuit board 300 using a material such as an anisotropic conductive film or SAP (Self Assembly Anisotropic Conductive Paste).

[0251] Hereinafter, an embodiment of an electronic device including the light-emitting display device according to the present embodiment will be described with reference to FIG. 17.

[0252] FIG. 17 is a block diagram of an electronic device according to an embodiment of the present invention.

[0253] The electronic device 1 outputs various information through the display module MD2 within the operation system. When the processor PROC executes an application stored in the memory MM, the display module MD2 provides application information to the user through the display panel MD21. Here, as the display panel MD21, the above-described light-emitting display device can be used.

[0254] Processor PROC acquires an external input through input module MD1 or sensor module MD41 and executes an application corresponding to the external input. For example, when the user selects the camera icon displayed on display panel MD21, processor PROC acquires the user input through input sensor MD41-2 and activates camera module MD51. Processor PROC transmits the video data corresponding to the captured image acquired through camera module MD51 to display module MD2. Display module MD2 can display the image corresponding to the captured image through display panel MD21.

[0255] As yet another example, when personal information authentication is executed by display module MD2, fingerprint sensor MD41-1 acquires the input fingerprint information as input data. Processor PROC compares the input data acquired through fingerprint sensor MD41-1 with the authentication data stored in memory MM and executes an application based on the comparison result. Display module MD2 can display the information executed by the application logic through display panel MD21.

[0256] As yet another example, when the music streaming icon displayed on display module MD2 is selected, processor PROC acquires the user input through input sensor MD41-2 and activates the music streaming application stored in memory MM. When a music execution command is input in the music streaming application, processor PROC activates audio output module MD43 to provide the user with audio information corresponding to the music execution command.

[0257] The operation of electronic device 1 has been briefly described above. Next, the configuration of electronic device 1 will be described in detail. Some of the configurations of electronic device 1 to be described later can be provided as an integrated single configuration, or a single configuration can be separated into two or more configurations and provided.

[0258] Referring to FIG. 17, the electronic device 1 can communicate with an external electronic device 2 through a network (for example, a short-range wireless communication network or a long-range wireless communication network). According to one embodiment, the electronic device 1 may include a processor PROC, a memory MM, an input module MD1, a display module MD2, a power module MD3, an internal module MD4, and an external module MD5. According to one embodiment, the electronic device 1 may omit at least one of the above-described components or add one or more other components. According to one embodiment, some of the above-described components (for example, a sensor module MD41, an antenna module MD42, or an acoustic output module MD43) may be integrated into another component (for example, the display module MD2).

[0259] The processor PROC can execute software to control at least one other component (for example, a hardware or software component) of the electronic device 1 connected to the processor PROC and can perform various data processing or operations. According to one embodiment, as at least a part of the data processing or operation, the processor PROC stores instructions or data received from other components (for example, the input module MD1, the sensor module MD41, or the communication module MD53) in the volatile memory MM1, processes the instructions or data stored in the volatile memory MM1, and the result data may be stored in the non-volatile memory MM2.

[0260] The processor PROC may include a main processor MPROC and an auxiliary processor SPROC. The main processor MPROC may include one or more of a central processing unit (MPROC-1, CPU: central processing unit) or an application processor (AP: application processor). The main processor MPROC may further include any one or more of a graphics processing unit (MPROC-2, GPU: graphic processing unit), a communication processor (CP: communication processor), and an image signal processor (ISP: image signal processor). The main processor MPROC may further include a neural network processing unit (MPROC-3, NPU: neural processing unit). The neural network processing unit is a processor specialized for artificial intelligence model processing, and the artificial intelligence model can be generated through machine learning. The artificial intelligence model may include a plurality of artificial neural network layers. The artificial neural network may be one of a deep neural network (DNN: deep neural network), a CNN (convolutional neural network), an RNN (recurrent neural network), an RBM (restricted boltzmann machine), a DBN (deep belief network), a BRDNN (bidirectional recurrent deep neural network), deep Q-networks, or a combination of two or more of the above, but is not limited to the examples described above. The artificial intelligence model may include, in addition to or alternatively to the hardware structure, a software structure. At least two of the above-described processing units and processors may be implemented in one integrated configuration (e.g., a single chip) or each may be implemented in an independent configuration (e.g., multiple chips).

[0261] The auxiliary processor SPROC may include a controller SPROC-1. The controller SPROC-1 may include an interface conversion circuit and a timing control circuit. The controller SPROC-1 receives a video signal from the main processor MPROC, converts the data format of the video signal to match the interface specification with the display module MD2, and outputs video data. The controller SPROC-1 can output various control signals required for driving the display module MD2.

[0262] The auxiliary processor SPROC may further include a data conversion circuit SPROC-2, a gamma correction circuit SPROC-3, a rendering circuit SPROC-4, etc. The data conversion circuit SPROC-2 receives video data from the controller SPROC-1, and can compensate the video data so that the video is displayed with a desired luminance according to the characteristics of the electronic device 1 or the user's settings, or convert the video data for power consumption reduction or afterimage compensation. The gamma correction circuit SPROC-3 can convert video data or a gamma reference voltage so that the video displayed on the electronic device 1 has desired gamma characteristics. The rendering circuit SPROC-4 receives video data from the controller SPROC-1, and can render the video data in consideration of the pixel arrangement of the display panel MD21 applied to the electronic device 1. At least one of the data conversion circuit SPROC-2, the gamma correction circuit SPROC-3, and the rendering circuit SPROC-4 may be integrated with other components (for example, the main processor MPROC or the controller SPROC-1). At least one of the data conversion circuit SPROC-2, the gamma correction circuit SPROC-3, and the rendering circuit SPROC-4 can also be integrated into the data driver MD23 described later.

[0263] The memory MM can store various data used by at least one component of the electronic device 1 (e.g., the processor PROC or the sensor module MD41), as well as input data or output data for related instructions. The memory MM may include at least one or more of the volatile memory MM1 and the non-volatile memory MM2.

[0264] The input module MD1 can receive instructions or data used by components of the electronic device 1 (e.g., the processor PROC, the sensor module MD41, or the acoustic output module MD43) from outside the electronic device 1 (e.g., from a user or an external electronic device 2).

[0265] The input module MD1 may include a first input module MD11 into which instructions or data are input by a user and a second input module MD12 into which instructions or data are input by the external electronic device 2. The first input module MD11 may include a microphone, a mouse, a keyboard, a key (e.g., a button), or a pen (e.g., a passive pen or an active pen). The second input module MD12 can support a specified protocol that can be connected to the external electronic device 2 either wired or wirelessly. According to one embodiment, the second input module MD12 may include HDMI (registered trademark) (high definition multimedia interface), USB (universal serial bus) interface, SD card interface, or audio interface. The second input module MD12 may include a connector physically connectable to the external electronic device 2, e.g., an HDMI (registered trademark) connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0266] The display module MD2 visually provides information to the user. The display module MD2 may include a display panel MD21, a scan driver MD22, and a data driver MD23. The display module MD2 may further include a window, a chassis, and a bracket for protecting the display panel MD21.

[0267] The display panel MD21 can include a liquid crystal display panel, an organic light-emitting display panel, or an inorganic light-emitting display panel, and the type of the display panel MD21 is not particularly limited. The display panel MD21 can be of a rigid type or a flexible type that can be rolled or folded. The display module MD2 can further include a supporter, a bracket, or a heat dissipation member that supports the display panel MD21.

[0268] The scan driver MD22 can be implemented on the display panel MD21 as a driving chip. Also, the scan driver MD22 can be integrated into the display panel MD21. For example, the scan driver MD22 can include an ASG (Amorphous Silicon TFT Gate driver circuit), an LTPS (Low Temperature Polycrystalline Silicon), a TFT Gate driver circuit, or an OSG (Oxide Semiconductor TFT Gate driver circuit) built into the display panel MD21. The scan driver MD22 receives a control signal from the controller SPROC-1 and outputs a scan signal to the display panel MD21 in response to the control signal.

[0269] The display panel MD21 can further include a light-emitting driver. The light-emitting driver outputs a light-emitting control signal to the display panel MD21 in response to a control signal received from the controller SPROC-1. The light-emitting driver can be formed separately from the scan driver MD22 or can be integrated into the scan driver MD22.

[0270] The data driver MD23 receives a control signal from the controller SPROC-1, converts video data into an analog voltage (e.g., data voltage) in response to the control signal, and then outputs the data voltage to the display panel MD21.

[0271] The data driver MD23 can be integrated with other components (e.g., the controller SPROC-1). The functions of the interface conversion circuit and the timing control circuit of the above-described controller SPROC-1 can also be integrated into the data driver MD23.

[0272] The display module MD2 can further include a light-emitting driver and a voltage generation circuit, etc. The voltage generation circuit can output various voltages required for driving the display panel MD21.

[0273] The power supply module MD3 supplies power to the components of the electronic device 1. The power supply module MD3 may include a battery that charges the power supply voltage. The battery may include a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell. The power supply module MD3 may include a PMIC (power management integrated circuit). The PMIC supplies optimized power to each of the above-described modules and the modules to be described later. The power supply module MD3 may include a wireless power transmission and reception member electrically connected to the battery. The wireless power transmission and reception member may include a plurality of antenna radiators in the form of coils.

[0274] The electronic device 1 can further include an interior module MD4 and an exterior module MD5. The interior module MD4 may include a sensor module MD41, an antenna module MD42, and an acoustic output module MD43. The exterior module MD5 may include a camera module MD51, a light module MD52, and a communication module MD53.

[0275] The sensor module MD41 can sense an input by the user's body or an input by a pen of the first input module MD11, and generate an electrical signal or data value corresponding to the input. The sensor module MD41 may include at least one or more of a fingerprint sensor MD41-1, an input sensor MD41-2, and a digitizer MD41-3.

[0276] The fingerprint sensor MD41-1 can generate a data value corresponding to the user's fingerprint. The fingerprint sensor MD41-1 may include either an optical fingerprint sensor or a capacitive fingerprint sensor.

[0277] The input sensor MD41-2 can generate a data value corresponding to the coordinate information of an input by the user's body or an input by a pen. The input sensor MD41-2 generates the amount of change in capacitance due to the input as a data value. The input sensor MD41-2 can sense an input by a passive pen or transmit and receive data with an active pen.

[0278] The input sensor MD41-2 can also measure biological signals such as blood pressure, body water, or body fat. For example, when the user touches a part of the body to the sensor layer or the sensing panel and does not move for a certain period of time, based on the change in the electric field by a part of the body, the input sensor MD41-2 can sense the biological signal and output the information desired by the user to the display module MD2.

[0279] The digitizer MD41-3 can generate a data value corresponding to the coordinate information of an input by a pen. The digitizer MD41-3 generates the amount of change in electromagnetic field due to the input as a data value. The digitizer MD41-3 can sense an input by a passive pen or transmit and receive data with an active pen.

[0280] At least one of the fingerprint sensor MD41-1, the input sensor MD41-2, and the digitizer MD41-3 can also be embodied as a sensor layer formed on the display panel MD21 by a continuous process. The fingerprint sensor MD41-1, the input sensor MD41-2, and the digitizer MD41-3 can be disposed above the display panel MD21, and any one of the fingerprint sensor MD41-1, the input sensor MD41-2, and the digitizer MD41-3, for example, the digitizer MD41-3, can be disposed below the display panel MD21.

[0281] At least two or more of the fingerprint sensor MD41-1, the input sensor MD41-2, and the digitizer MD41-3 can be formed to be integrated into one sensing panel through the same process. When integrated into one sensing panel, the sensing panel is disposed between the display panel MD21 and a window disposed above the display panel MD21. According to one embodiment, the sensing panel can also be disposed on the window, and the position of the sensing panel is not particularly limited.

[0282] At least one of the fingerprint sensor MD41-1, the input sensor MD41-2, and the digitizer MD41-3 can be built into the display panel MD21. That is, according to the process of forming elements (for example, light-emitting elements, transistors, etc.) included in the display panel MD21, at least one of the fingerprint sensor MD41-1, the input sensor MD41-2, and the digitizer MD41-3 can be formed simultaneously.

[0283] In addition, the sensor module MD41 can generate an electrical signal or a data value corresponding to the internal state or the external state of the electronic device 1. The sensor module MD41 can further include, for example, a gesture sensor, a gyro sensor, a barometric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biological sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0284] The antenna module MD42 may include one or more antennas for transmitting signals or power externally or receiving them from the outside. According to one embodiment, the communication module MD53 can transmit signals to an external electronic device or receive them from an external electronic device through an antenna suitable for the communication method. The antenna pattern of the antenna module MD42 can also be integrated into one configuration of the display module MD2 (e.g., the display panel MD21) or the input sensor MD41-2, etc.

[0285] The acoustic output module MD43 is a device for outputting acoustic signals to the outside of the electronic device 1, and may include, for example, a speaker used for general applications such as multimedia playback or recording playback and a receiver used exclusively for telephone reception. According to one embodiment, the receiver can be formed integrally with or separately from the speaker. The acoustic output pattern of the acoustic output module MD43 can also be integrated into the display module MD2.

[0286] The camera module MD51 can capture still images and videos. According to one embodiment, the camera module MD51 may include one or more lenses, an image sensor, or an image signal processor. The camera module MD51 can further include an infrared camera capable of measuring the presence or absence of a user, the position of the user, the line of sight of the user, etc.

[0287] The light module MD52 can provide light. The light module MD52 may include a light-emitting diode or a xenon lamp. The light module MD52 can operate in conjunction with the camera module MD51 or independently.

[0288] The communication module MD53 can assist in establishing a wired or wireless communication channel between the electronic device 1 and the external electronic device 2, and in executing communication via the established communication channel. The communication module MD53 can include any one or all of a wireless communication module such as a cellular communication module, a short-range wireless communication module, or a GNSS (global navigation satellite system) communication module, and a wired communication module such as a LAN (local area network) communication module or a power line communication module. The communication module MD53 can communicate with the external electronic device 2 through a short-range communication network such as Bluetooth (registered trademark), WiFi direct or IrDA (infrared data association), or a cellular network, the Internet, or a long-range communication network such as a computer network (e.g., LAN or WAN). The various types of communication modules MD53 described above can be implemented on one chip or on separate chips respectively.

[0289] The input module MD1, the sensor module MD41, the camera module MD51, etc. can be utilized to control the operation of the display module MD2 in conjunction with the processor PROC.

[0290] Based on the input data received from the input module MD1, the processor PROC outputs instructions or data to the display module MD2, the audio output module MD43, the camera module MD51, or the light module MD52. For example, the processor PROC can generate video data corresponding to the input data applied by a mouse or an active pen and output it to the display module MD2, or generate instruction data corresponding to the input data and output it to the camera module MD51 or the light module MD52. If no input data is received from the input module MD1 for a certain period of time, the processor PROC can switch the operation mode of the electronic device 1 to the low power mode or the sleep mode, reducing the power consumed by the electronic device 1.

[0291] Based on the sensing data received from the sensor module MD41, the processor PROC outputs instructions or data to the display module MD2, the audio output module MD43, the camera module MD51, or the light module MD52. For example, after comparing the authentication data applied by the fingerprint sensor MD41-1 with the authentication data stored in the memory MM, the processor PROC can execute an application based on the comparison result. The processor PROC can execute instructions or output corresponding video data to the display module MD2 based on the sensing data sensed by the input sensor MD41-2 or the digitizer MD41-3. If the sensor module MD41 includes a temperature sensor, the processor PROC can receive temperature data for the temperature measured by the sensor module MD41 and further perform operations such as luminance correction for the video data based on the temperature data.

[0292] The processor PROC can receive measurement data from the camera module MD51 regarding the presence or absence of a user, the position of the user, the line of sight of the user, etc. The processor PROC can further perform operations such as luminance correction on the video data based on the measurement data. For example, the processor PROC that determines the presence or absence of a user based on the input from the camera module MD51 can output video data with corrected luminance to the display module MD2 through the data conversion circuit SPROC-2 or the gamma correction circuit SPROC-3.

[0293] Some of the above components are connected to each other through a communication method between peripheral devices, such as a bus, GPIO (general purpose input / output), SPI (serial peripheral interface), MIPI (mobile industry processor interface), or UPI (Ultra path interconnect) link, and can exchange signals (e.g., instructions or data) with each other. The processor PROC can communicate with the display module MD2 through an interface agreed upon with each other. For example, it can utilize any one of the above-described communication methods and is not limited to the above-described communication methods.

[0294] The electronic device 1 according to various embodiments disclosed in this specification can be a device in various forms. The electronic device 1 can include, for example, at least one of a portable communication device (e.g., a smartphone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, or a household electrical appliance. The electronic device 1 according to the embodiments of this specification is not limited to the above-described devices.

[0295] Although the embodiments of the present invention have been described in detail above, the scope of the rights of the present invention is not limited thereto, and various modifications and improvements made by those skilled in the art using the basic concept of the present invention defined in the following claims also belong to the scope of the rights of the present invention.

[0296] According to a preferred embodiment, it is as follows.

[0297] The background and problems of this case are as follows (i) to (v).

[0298] (i) In order to address the problem that "the material used for the cathode part that injects electrons in an organic light-emitting display device (OLED) is vulnerable to oxygen and moisture", studies on inverted OLEDs have been conducted. In the case of a bottom-emission type inverted OLED, it is said that an OLED that is resistant to oxygen and moisture can be realized by using ITO as the cathode and an inert material for the EIL laminated thereon. “Inverted OLED -Long lasting emission device, even on film” https: / / www.nhk.or.jp / strl / english / publica / giken_dayori / 194 / 5.html

[0299] (ii) However, in the inverted OLED, the film-forming process has to be greatly changed from the previous one.

[0300] (iii) Therefore, studies have been conducted on "Pseudo Inverted OLED" in which the cathode as the upper electrode in the OLED is connected to the driving transistor of the pixel circuit to which the driving low voltage (ELVSS) is connected, and the anode as the lower electrode in the OLED is connected to the driving high voltage (driving voltage ELVDD).

[0301] (iv) On the other hand, several structures have been proposed in which the cathode as the upper electrode made of a metal layer and the metal layer formed simultaneously therewith cover the entire display area (Patent Documents 1 to 4; in particular, FIG. 4 of Patent Document 1, FIG. 1A of Patent Document 2, etc.).

[0302] (v) However, with such a structure, it is difficult to arrange wirings that serve other roles in the upper metal layer or to perform noise shielding for the touch wirings.

[0303] Therefore, in a particularly preferred embodiment, the following A1 to A6 are adopted.

[0304] A1 A partition wall (390) covering the pixel defining layer is formed of a metal layer (such as FIG. 5 of the present application).

[0305] A2 Regarding the separator (SEP) as an intermittent portion of the partition wall (390), for example, it is provided in the form of a closed curve surrounding one red sub-pixel, one green sub-pixel, and two blue sub-pixels respectively (such as FIG. 11 of the present application).

[0306] A3 The inner portion of each closed curve in the metal layer of the partition wall (390) forms a cathode extension portion that surrounds the cathode (cathoder) for one or two pixel dots and contacts the sides with each other. And this cathode extension portion is connected to the driving transistor (T1 in FIG. 1) of the pixel circuit through a contact hole (CNTr) penetrating the planarization film (181) and the pixel defining layer (Pixel defining layer; 380-inor).

[0307] A4 The outer portion (separated cathode Cathodesl) of the closed curve in the metal layer of the partition wall (390) can be a pattern that is continuous in the horizontal and vertical directions with each other, and in particular, can be a wiring for the driving low voltage ELVSS. Regarding such an outer portion (separated cathode Cathodesl) of the closed curve, it can also be connected to wirings such as the driving low voltage line 174 through a contact hole (CNTsl) penetrating the planarization film (181) and the pixel defining layer (Pixel defining layer; 380-inor).

[0308] In the A5 manufacturing process, an emission layer of an OLED and a metal layer (cathoderi) of a cathode will be formed on the metal layer forming the partition wall (390). Therefore, in order to separate this metal layer (cathoderi) from the cathode (cathoder) within the pixel aperture, the metal layer forming the partition wall (390) is formed of a double metal layer, and the lower layer side is formed of a metal that is easily etched, so that a chip structure protruding into the pixel aperture is formed. The double metal layer can preferably be formed of an aluminum layer in the lower layer and a titanium layer in the upper layer.

[0309] A6 The pixel defining layer is formed of an inorganic film such as silicon oxide or silicon nitride.

Explanation of Signs

[0310] 10: Light-emitting display device SEP: Separator 380, 380-inor: Pixel defining film 380-orb: First pixel defining film 380-pl: Second pixel defining film 380-ort: Third pixel defining film 390, 390a, 390b, 390ac, 390bc: Partition wall Anode, Anode-r, Anode-g, Anode-b: Anode Anode-b1: Extension part Anode-b2: Connection part Cathoder: Cathode Cathodesl: Separate cathode EMLr: Emission layer EMLri, EMLgi, EMLbi: Separate emission layer Encap: Encapsulation layer CNTr, CNTg, CNTb: Contact hole CNTsl: Contact hole for voltage transmission PC, PCr, PCg, PCb: Pixel driving part OPcatr, OPcatg, OPcatb: Opening of partition wall OPr, OPg, OPb: Openings of the pixel defining film Spc: Spare space PLEC: Transparent electrode CNTp: Opening of the sealing layer 540: Sensing electrode BML1: Lower shielding layer ACT1: First semiconductor layer GE1: Gate electrode C1, C2: Capacitor LED: Light-emitting element SE1, DE1: Connecting member 110, SUB: Substrate 111: Buffer layer 141, 142: Gate insulating film 151: First interlayer insulating film 181: Planarization film 161, 162, 163, 166: Scan line 164: First light-emitting signal line 171: Data line 172: Driving voltage line 173: Reference voltage line 174: Driving low voltage line 176: Second initialization voltage line 177: First initialization voltage line T1, T2, T3, T4, T5, T6, T7, T8: Transistor

Claims

1. substrate; a pixel driver overlying the substrate and including a transistor; a planarization film covering the pixel driving unit; an anode located over the planarization film; a pixel defining film including an opening overlapping said anode in a planar manner, said pixel defining film including an inorganic insulating material; a partition wall having an opening overlapping the opening of the pixel defining film and having electrical conductivity; a light-emitting layer located within the opening of the pixel-defining membrane; a cathode overlying the light-emitting layer; and a separator that separates the partition walls; the partition is electrically connected to the transistor of the pixel driving unit through a first opening located across the pixel defining layer and the planarizing layer; The cathode is in contact with a side surface of the partition wall, and is thereby electrically connected to the transistor.

2. The partition includes a first conductive partition and a second conductive partition located on the first conductive partition, The light emitting display device of claim 1 , wherein the second conductive partition has a tip structure protruding from the first conductive partition.

3. The light-emitting display device according to claim 2 , wherein the tip structure protrudes toward the opening of the partition wall, overlapping the opening of the pixel-defining film.

4. The light emitting display device of claim 3 , wherein the first conductive partition comprises aluminum and the second conductive partition comprises titanium.

5. The partition wall is divided into an inner conductive partition wall and an outer conductive partition wall, the inner conductive partition wall is a portion that defines and surrounds the opening of the partition wall, and the outer conductive partition wall is a portion that is electrically isolated from the inner conductive partition wall, The inner conductive partition wall is composed of a double layer of a first inner conductive partition wall and a second inner conductive partition wall, The light emitting display device of claim 3 , wherein the outer conductive partition is formed of a double layer including a first outer conductive partition and a second inner conductive partition.

6. the inner partition is electrically connected to the transistor of the pixel driving unit through the first opening, The light emitting display device of claim 5 , wherein a constant voltage is transmitted to the outer partition through a second opening located across the pixel defining layer and the planarizing layer.

7. The light-emitting display device according to claim 6 , further comprising a separate light-emitting layer and a separate cathode formed on the upper side of the outer partition, the separate light-emitting layer and the separate cathode being separated from the light-emitting layer and the cathode, respectively.

8. further comprising an encapsulation layer covering the partition wall and the cathode; The light emitting display device according to claim 1 , wherein the separator is positioned across the encapsulation layer and the partition wall.

9. The light emitting display device of claim 8 , wherein the separator is filled with an insulating material.

10. the encapsulation layer and the separator further include a transparent electrode formed of a transparent conductive material; The light-emitting display device according to claim 9 , wherein a constant voltage is applied to the transparent electrode.

11. further comprising an encapsulation layer covering the partition wall and the cathode; The separator is located in the partition wall, The light emitting display device of claim 1 , wherein the encapsulation layer is located above the separator.

12. substrate; a pixel driver overlying the substrate and including a transistor; a planarization film covering the pixel driving unit; an anode located over the planarization film; a pixel defining membrane including an opening in planar overlap with said anode, said pixel defining membrane including a black pixel defining membrane and a transparent pixel defining membrane; a partition wall having an opening overlapping the opening of the pixel defining film and having electrical conductivity; a light-emitting layer located within the opening of the pixel-defining membrane; a cathode overlying the light-emitting layer; and a separator that separates the partition walls; the partition is electrically connected to the transistor of the pixel driving unit through a first opening located across the pixel defining layer and the planarizing layer; the cathode is in contact with a side surface of the partition and is electrically connected to the transistor; The black pixel defining film is formed of a black organic material or an organic material containing a light blocking material, The transparent pixel defining film is made of a light-transmitting photosensitive organic insulating material.

13. The light emitting display device of claim 12 , wherein the pixel defining film further comprises an intermediate pixel defining film that is an inorganic insulating film between the black pixel defining film and the transparent pixel defining film.

14. the partition wall includes a first conductive partition wall and a second conductive partition wall located on the first conductive partition wall, the second conductive partition has a tip structure protruding from the first conductive partition, The light emitting display device according to claim 12 , wherein the tip structure protrudes toward the opening of the partition wall, overlapping the opening of the pixel defining film.

15. The light emitting display device of claim 14 , wherein the first conductive partition comprises aluminum and the second conductive partition comprises titanium.

16. The partition wall is divided into an inner conductive partition wall and an outer conductive partition wall, the inner conductive partition wall is a portion that defines and surrounds the opening of the partition wall, and the outer conductive partition wall is a portion that is electrically isolated from the inner conductive partition wall, The inner conductive partition wall is composed of a double layer of a first inner conductive partition wall and a second inner conductive partition wall, The outer conductive partition wall is composed of a double layer of a first outer conductive partition wall and a second inner conductive partition wall, the inner conductive partition is electrically connected to the transistor of the pixel driving unit through the first opening, The light emitting display device of claim 14 , wherein a constant voltage is transmitted to the outer conductive partition through a second opening located across the pixel defining layer and the planarizing layer.

17. The light emitting display device according to claim 16 , further comprising a separate light emitting layer and a separate cathode formed on the upper side of the outer partition, the separate light emitting layer and the separate cathode being separated from the light emitting layer and the cathode, respectively.

18. further comprising an encapsulation layer covering the partition wall and the cathode; The light emitting display device of claim 12 , wherein the separator is positioned across the encapsulation layer and the partition wall.

19. The light emitting display device of claim 18 , wherein the separator is filled with an insulating material.

20. further comprising an encapsulation layer covering the partition wall and the cathode; The separator is located in the partition wall, The light emitting display device of claim 12 , wherein the encapsulation layer is located above the separator.

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