Signal boosting in serial interfaces

Abstract

To provide systems and methods for signal boosting in serial interfaces.SOLUTION: A system for boosting signals comprises boosting circuitry. The boosting circuitry is operatively coupled to a voltage supply 304 during a charging phase and is operatively coupled to the at least one data line 306 of signal transmission lines DP, DM during a discharging phase 308. During the discharging phase 310, at least one boosting capacitor 302 boosts voltage of one or more signals transmitted on the at least one line. The boosting circuitry also comprises switching circuitry that switches a state of the at least one boosting capacitor 302 from a state of being operatively coupled to the voltage supply 304 to a state of being operatively coupled to the at least one line of the signal transmission lines.SELECTED DRAWING: Figure 3

Description

Background Art

[0001]

[0001] A signal transmission line may be used to transmit data such as serialized data between an upstream device and a downstream device. However, in some cases, for example due to the resistance of the signal transmission line, the data signal strength may deteriorate over the length of the signal transmission line. This may cause an obstacle to data communication, for example, because the data signal is too weak to be accurately read by the downstream device at the time of reception.

Summary of the Invention

[0002]

[0002] Disclosed herein are a method and a system for signal boosting in a signal transmission line.

[0003]

[0003] According to a particular embodiment, a system for boosting a signal comprises a boosting circuit. The boosting circuit is configured to be operably coupled to a voltage supply source during a charging stage and to be operably coupled to at least one line of the signal transmission line during a discharging stage. During the discharging stage, at least one boosting capacitor may be provided, which boosts the voltage of one or more signals transmitted on at least one line. The boosting circuit may comprise a switching circuit configured to switch at least one boosting capacitor from a state of being operably coupled to the voltage supply source to a state of being operably coupled to at least one line of the signal transmission line.

[0004]

[0004] In some examples, the boosting circuit is incorporated into the signal transmission line.

[0005]

[0005] In some examples, at least one line includes a first line and a second line, the first line is configured to transmit a first signal, the second line is configured to transmit a second signal, and the first signal and the second signal are utilized for differential signal transmission. In some examples, at least one boost capacitor includes a first boost capacitor configured to boost the voltage of the first line and a second boost capacitor configured to boost the voltage of the second line. In some examples, the switching circuit is further configured to operably couple the first boost capacitor to the first line in a discharge phase in response to the first signal being greater than the second signal, and the switching circuit is further configured to operably couple the second boost capacitor to the second line in a discharge phase in response to the second signal being greater than the first signal. In some examples, while the first boost capacitor is operably coupled to a voltage supply source in a charging phase, the second boost capacitor is operably coupled to the second line in a discharge phase, and while the second boost capacitor is operably coupled to the voltage supply source in a charging phase, the first boost capacitor is operably coupled to the first line in a discharge phase.

[0006]

[0006] In some examples, the voltage supply source is programmed to supply a voltage determined based on an amount of voltage boost for one or more signals to be supplied.

[0007]

[0007] In some examples, the switching circuit is configured to switch at least one boost capacitor from a state operably coupled to a voltage supply source to a state operably coupled to at least one line of a signal transmission line in response to an output of an edge detection component. In some examples, the edge detection component is an equalizer. In some examples, the frequency response of the equalizer is programmable.

[0008]

[0008] In some examples, the duration of the discharge phase is programmable, and the duration of the discharge phase causes amplification of a high-frequency signal corresponding to the pre-emphasis of the rising edge and / or falling edge of one or more signals, and the amplification of the high-frequency signal cancels out the low-pass filter effect of the signal transmission line.

[0009]

[0009] In some examples, one or more signals conform to the Universal Serial Bus (USB) protocol.

[0010]

[0010] According to a particular embodiment, a method of boosting a signal includes obtaining one or more signals transmitted via at least one line of a signal transmission line coupling an upstream device to a downstream device. The method may further include switching a boost capacitor from being operably coupled to a voltage source in a charging phase to being operably coupled to at least one line of the signal transmission line in a discharge phase in response to detecting a rising edge and / or a falling edge of the one or more signals, the boost capacitor transferring charge to the at least one line while in the discharge phase.

[0011]

[0011] In some examples, at least one line includes a first line and a second line, the first line is configured to transmit a first signal, the second line is configured to transmit a second signal, and the first signal and the second signal are used for differential signal transmission. In some examples, at least one boost capacitor includes a first boost capacitor configured to boost the voltage of the first line and a second boost capacitor configured to boost the voltage of the second line. In some examples, the method further includes operably coupling the first boost capacitor to the first line in a discharge phase in response to the first signal being greater than the second signal, and operably coupling the second boost capacitor to the second line in a discharge phase in response to the second signal being greater than the first signal. In some examples, while the first boost capacitor is operably coupled to a voltage source in a charging phase, the second boost capacitor is operably coupled to the second line in a discharge phase, and while the second boost capacitor is operably coupled to the voltage source in a charging phase, the first boost capacitor is operably coupled to the first line in a discharge phase.

[0012]

[0012] In some examples, the method further includes determining a duration of the discharge phase and setting the duration of the discharge phase to a determined duration. In some examples, the duration of the discharge phase is determined by determining an amplification amount of a high-frequency signal corresponding to a pre-emphasis of a rising edge or a falling edge, and the amplification of the high-frequency signal cancels out the low-pass filter effect of the signal transmission line.

[0013]

[0013] In some examples, a rising edge and / or a falling edge is detected by an equalizer.

[0014]

[0014] In some examples, one or more signals conform to the Universal Serial Bus (USB) protocol.

[0015] A further understanding of the nature and advantages of the various embodiments can be realized by referring to the remainder of the specification and the drawings.

Brief Description of the Drawings

[0016]

Figure 1

Figure 2

Figure 3

Figure 4A

Figure 4B

Figure 4C

Figure 5

Modes for Carrying Out the Invention

[0017]

[0021] Here, specific embodiments are referred to in detail. Examples of these embodiments are shown in the accompanying drawings. It should be noted that these examples are described for illustrative purposes and are not intended to limit the scope of the present disclosure. Rather, alternatives, modifications, and equivalents of the described embodiments are included within the scope of this disclosure as defined by the appended claims. Further, specific details may be provided to facilitate a complete understanding of the described embodiments. Some embodiments within the scope of the present disclosure may be implemented without some or all of these details. Additionally, well-known features may not be described in detail for clarity.

[0018]

[0022] This specification discloses systems, methods, circuits, and techniques for boosting signals transmitted via signal transmission lines. In particular, in some embodiments, one or more boost capacitors are switched between a charging stage in which the boost capacitor is operably coupled to a voltage supply source and a discharging stage in which the boost capacitor is operably coupled to a data line of the signal transmission line, thereby transferring the accumulated charge to the line to boost the signal. The techniques described herein can be implemented with relatively simple components such as semiconductor-manufactured integrated capacitors, which can enable the systems described herein to be implemented with a stable temperature coefficient and relatively little manufacturing variation. Further, as will be described in more detail below, the techniques disclosed herein can enable signals to be boosted without the limitations from headroom limits associated with voltage supply. Further, as will be described in more detail below, the techniques disclosed herein can be implemented using high-speed data communication because the boost capacitors described herein can be switched between stages with relatively little latency. Accordingly, the techniques described herein can be utilized in connection with signal transmission lines configured for high-speed data communication. It should be noted that the techniques described herein can be implemented using both unidirectional and bidirectional data communication.

[0019]

[0023] As used herein, it should be understood that "signal transmission line" generally refers to any suitable medium or path configured to enable electrical signal propagation. For example, a signal transmission line can include printed circuit board (PCB) trace lines. As another example, a signal transmission line may include a cable.

[0020]

[0024] A signal transmission line may be used to communicate data between an upstream device (e.g., a transmission device) and a downstream device (e.g., a receiving device). A signal transmission line may be used to transmit serialized data that operates in association with a serial interface such as a Universal Serial Bus (USB) or USB 2.0 interface. In some cases, there may be signal attenuation due to the resistance of the signal transmission line, and this signal attenuation may interfere with data communication between the upstream device and the downstream device. For example, a data signal transmitted from an upstream device to a downstream device may be sufficiently attenuated by the time the downstream device receives a signal that the downstream device cannot read and / or utilize the received signal. Data attenuation can be particularly prominent for relatively long signal transmission lines that exceed 3 meters, exceed 5 meters, exceed 10 meters, etc. As an example, for instance, a cable used to transmit a signal according to the USB 2.0 protocol may be sufficiently attenuated at the downstream device and may become unusable or cause cascade data errors.

[0021]

[0025] Many of the examples described herein utilize the USB and / or USB2.0 signal transmission protocol. For example, the signal transmission line can transmit two signals generally referred to as DP and DM herein. These two signals can be regarded as differential signals, and the output signal S can be determined by subtracting DM from DP. Since the output signal S is a digital signal, the downstream device can determine S as DP - DM. Then, the downstream device can set S to 1 if the difference is positive and set S to 0 if the difference is negative. It should be noted that for S to be accurately determined, the DP and DM signals must remain sufficiently unattenuated so that the downstream device can accurately determine S. In other words, if DP and DM attenuate beyond the threshold level, the difference between DP and DM may no longer be accurately used to determine the output signal S.

[0022]

[0026] FIG. 1 shows a schematic diagram of an example of a system including an upstream device 102 and a downstream device 104. The upstream device 102 and the downstream device 104 can be operably coupled via a signal transmission line. The signal transmission line can include a data line configured to transmit a DP signal 106 and a DM signal 108. Note that FIG. 1 does not show the distance between the upstream device 102 and the downstream device 104, and thus the length of the signal transmission line. In some embodiments, the distance can be 1 meter, 3 meters, 5 meters, 10 meters, 20 meters, etc.

[0023]

[0027] As described above, signals may attenuate between the upstream device and the downstream device. Signal attenuation can be visualized using an eye diagram. In particular, an eye diagram can show the average of the amplitudes of several measurements of a data signal. In some cases, the eye diagram can include an inner region showing a minimum threshold with respect to the data signal amplitude to indicate whether the signal has deteriorated beyond the threshold level.

[0024]

[0028] FIG. 2 shows two examples of eye diagrams 202, 204. Eye diagram 202 shows a signal measured at a signal transmission line position relatively close to the transmission device, while eye diagram 204 shows a signal measured at a signal transmission line position relatively close to the receiving device. Referring to eye diagram 202, a data signal 206 is shown that represents the average of a plurality of data signal measurements. Eye diagram 202 also shows a region 208 that represents the magnitude of the desired signal. Note that the entirety of data signal 206 is completely outside region 208, indicating that signal attenuation is minimal as expected at a signal transmission line position relatively close to the transmission device.

[0025]

[0029] Referring to eye diagram 204, a data signal 210 is shown. Similar to data signal 206, data signal 210 represents the average of a plurality of data signal measurements, with the difference that the data signal measurements of data signal 210 are measured downstream relative to the data signal measurements of data signal 206. Eye diagram 204 includes region 208. Note that a portion of data signal 210 is within region 208, indicating that signal attenuation has increased to a point where data communication may be disrupted at a signal transmission line position relatively close to the receiving device. In other words, at the position where the data signals were measured to construct data signal 210, the data signals may result in errors when read and / or utilized by the receiving device.

[0026]

[0030] To solve the problem of deterioration or attenuation of data signals in a signal transmission line, previous techniques have been attempted. For example, one technique can use a signal redriver that can include a receiver, an equalizer, and a transmitter to capture and amplify the data signal. However, signal redriving can present problems. For example, the signal redriver can function best in unidirectional transmission via a signal transmission line, but in many protocols, the data line is bidirectional. To use a signal redriving technique with a bidirectional data line, a buffer can be utilized to detect the directionality of the signal and switch the data driving device accordingly. However, switching the data driving device using a buffer can add a significant amount of latency and may therefore not be suitable for use in high-speed data interfaces.

[0027]

[0031] As another example, a second technique can use current boosting to boost the signal. However, this technique can have its own drawbacks. For example, current injection may be implemented by coupling a resistor to a voltage source. However, since the resistance of the resistor and the duration for which the current is injected are not well controlled, the amount of current injected is also not well controlled. Further, referring to the DP signal and the DM signal of the USB2.0 signal transmission protocol, current boosting can be performed by boosting the DP signal and the DM signal separately. Since the amount of current injected is not well controlled (as described above), the DP signal and the DM signal can be boosted by different amounts, whereby the DP signal and the DM signal are no longer symmetric with respect to the center offset value that generates the DC offset bias. Such asymmetry can cause problems when using the DP signal and the DM signal in differential signal transmission to determine the output signal (as described above). Further, since the DP line may already be close to ground and the DP signal may already be close to Vnn (power supply voltage), the amount of boost that can be provided may be limited.

[0028]

[0032] Disclosed herein are methods, systems, and techniques for boosting a signal. In particular, in some embodiments, one or more boost capacitors are utilized to boost the signal. In particular, the boost capacitor may be configured to operate in a charging phase in which the boost capacitor is operably coupled to a voltage supply source, or in a discharging phase in which the boost capacitor is operably coupled to a data line of a signal transmission line. The boost capacitor may be switched between the charging phase and the discharging phase such that, during the charging phase, the boost capacitor accumulates charge from the voltage supply source and, during the discharging phase, the boost capacitor discharges the accumulated charge to the data line to boost the voltage of the data signal.

[0029]

[0033] FIG. 3 is a schematic diagram showing an example of the use of a boost capacitor for boosting a data signal. As shown, the boost capacitor 302 may be configured to be operably coupled to the voltage supply source 304 in the charging phase or to the data line 306 during the discharging phase. For example, during the discharging phase, the positive terminal of the boost capacitor 302 may be coupled to the DP line and the negative terminal of the boost capacitor 302 may be coupled to the DM line. As an example, during the charging phase 308, the boost capacitor 302 is operably coupled to the voltage supply source 304, whereby charge can be accumulated in the boost capacitor 302. Continuing with this example, during the discharging phase 310, the boost capacitor 302 can be operably coupled to the data line 306, whereby the charge accumulated in the boost capacitor 302 is discharged onto the data line 306, resulting in boosting the voltage of the data signal carried on the data line 306.

[0030]

[0034] In some embodiments, there may be multiple boost capacitors. For example, in some embodiments, multiple boost capacitors may be configured to operate complementarily. As a more specific example, in some embodiments, a first boost capacitor may be configured to be in a charging phase (e.g., by being operably coupled to a voltage source), while a second boost capacitor may be configured to be in a discharging phase (e.g., by being operably coupled to a signal line).

[0031]

[0035] In some embodiments, whether a particular boost capacitor is in a charging stage or a discharging stage can be controlled by a switching circuit. For example, the switching circuit can include an edge detector that detects, for example, rising edges and / or falling edges. Continuing with this example, in response to an edge being detected, the switching circuit can cause the boost capacitor to switch from a charging stage to a discharging stage or vice versa. In a particular case where the signal lines include a DP line and a DM line (as used in connection with the USB2.0 signal transmission protocol), the first boost capacitor can be switched from a charging stage to a discharging stage in response to the first edge detector detecting a rising edge. In other words, the discharging stage of the first boost capacitor can be initiated in response to DP being greater than DM. Conversely, the second boost capacitor can be switched from a charging stage to a discharging stage in response to the second edge detector detecting a falling edge. In other words, the discharging stage of the second boost capacitor can be initiated in response to DM being greater than DP. It should be noted that when the first boost capacitor is switched (e.g., from a charging stage to a discharging stage or vice versa), the second boost capacitor can be switched simultaneously so that the first boost capacitor and the second boost capacitor remain in complementary stages, with one boost capacitor in a charging stage and the other in a discharging stage.

[0032]

[0036] Figures 4A to 4C show a schematic diagram of an example of a system for implementing a plurality of boost capacitors according to some embodiments. As shown, the system may include a first boost capacitor 402 and a second boost capacitor 404. The first boost capacitor 402 and the second boost capacitor 404 may be configured to be operably coupled to the data signal line 406 during their respective discharge phases. As will be described in more detail below with reference to Figure 4B, the first boost capacitor 402 may be configured such that during the discharge phase, the positive plate of the first boost capacitor 402 is operably coupled to the DP line and the negative plate of the first boost capacitor 402 is operably coupled to the DM line. As will be described in more detail below with reference to Figure 4C, the second boost capacitor 404 may be configured such that during the discharge phase, the positive plate of the second boost capacitor 404 is operably coupled to the DM line and the negative plate of the second boost capacitor 404 is operably coupled to the DP line.

[0033]

[0037] As shown in Figure 4A, the first boost capacitor 402 is configured to be operably coupled to a first voltage supply 408 during the charging phase. Similarly, the second boost capacitor 404 is configured to be operably coupled to a second voltage supply 411 during the charging phase. Note that Figure 4A shows two separate voltage supplies each associated with a corresponding boost capacitor, but in some embodiments, the first boost capacitor 402 and the second boost capacitor 404 may be configured to be operably coupled to the same voltage supply during their respective charging phases.

[0034]

[0038] As shown in FIG. 4A, the first boost capacitor 402 may be switched between a charging phase and a discharging phase via a rising edge detector 410. For example, referring to FIG. 4B, in response to the rising edge detector 410 indicating that the voltage associated with the DP line is greater than the voltage associated with the DM line, as shown in FIG. 4B, a positive signal may be used to operably couple the first boost capacitor 402 to the signal line 406 such that the positive plate of the first boost capacitor 402 is coupled to the DP line and the negative plate of the first boost capacitor 402 is coupled to the DM line. Further, as shown in FIGS. 4A and 4B, an inverted signal from the edge detector 410 may be generated by an inverter 412, whereby the inverted signal serves to disconnect the first boost capacitor 402 from the first voltage supply 408. Thus, in response to the DP signal being greater than the DM line, the first boost capacitor 402 can be switched from the charging phase to the discharging phase.

[0035]

[0039] A similar technique can be utilized for the second boost capacitor 404. For example, referring to FIG. 4C, in response to the falling edge detector 414 indicating that the voltage associated with the DM line is greater than the voltage associated with the DP line, as shown in FIG. 4C, a positive signal may be used to operably couple the second boost capacitor 404 to the signal line 406 such that the positive plate of the second boost capacitor 404 is coupled to the DM line and the negative plate of the second boost capacitor 404 is coupled to the DP line. Further, as shown in FIGS. 4A and 4C, an inverted signal from the falling edge detector 414 may be generated by an inverter 416, whereby the inverted signal serves to disconnect the second boost capacitor 404 from the second voltage supply 411. Thus, in response to the DM line signal being greater than the DP line signal, the second boost capacitor 404 can be switched from the charging phase to the discharging phase.

[0036]

[0040] Referring back to FIG. 4A, it should be understood that the rising edge detector 410 and the falling edge detector 414 are each implemented as an equalizer, but other circuits may be used to implement the edge detectors.

[0037]

[0041] In some embodiments, various aspects of a system that utilizes one or more boost capacitors to boost a signal transmitted over a signal transmission line may be modified and / or programmed, for example. For example, in some embodiments, the number of boost capacitors used may be determined or set based on factors such as the length of the signal transmission line being used. As a more specific example, in some embodiments, a relatively small number of boost capacitors can be utilized for a shorter signal transmission line compared to a longer signal transmission line. As a specific example, referring to the first and second boost capacitors utilized to boost the DM line and the DP line as illustrated and described above in connection with FIGS. 4A - 4C, considering a longer signal transmission line (e.g., 10 meters, 12 meters, 20 meters, etc.), additional pairs of the first and second boost capacitors may be utilized at various points along the signal transmission line between the upstream device and the downstream device to provide multiple signal boost points.

[0038]

[0042] As another example, in some embodiments, (as shown and previously described in connection with FIGS. 4A - 4C, for example) when an equalizer is utilized to implement an edge detector, the frequency response and / or gain of the equalizer may be programmed. As yet another example, in some embodiments, the threshold at which an edge transition (e.g., a transition from a state where DP is less than DM to a state where DP is greater than DM, a transition from a state where DM is less than DP to a state where DM is greater than DP, etc.) is detected may be programmed. Thereby, the point of the edge transition at which a signal boost occurs can be set or modified. For example, by programming the equalizer characteristics (e.g., frequency response, gain, etc.) and / or the edge detection threshold, the boost may be configured to occur at the start of the detected edge, at the end of the detected edge, or during the edge transition.

[0039]

[0043] As yet another example, in some embodiments, the voltage supply utilized during a charging phase (e.g., for charging a boost capacitor) may be programmed. For example, the voltage supplied by the voltage supply may be set based on a particular application, such as based on the amount of expected attenuation and the corresponding amount of boost desired to counteract the expected attenuation. As a more specific example, the voltage supply may be programmed to supply a higher voltage in applications where a greater signal attenuation is expected (e.g., due to the use of a longer signal transmission line). In some embodiments, the voltage supply may be programmed based on the tolerance to data communication errors. For example, the voltage supply may be programmed to supply a higher voltage for applications with a relatively low tolerance to data communication errors compared to applications with a relatively high tolerance to data communication errors.

[0040]

[0044] In some embodiments, various aspects of a system that performs signal boosting can be programmed or configured to provide pre-emphasis to a signal at an edge transition (e.g., a rising edge transition or a falling edge transition). In particular, since the signal transmission line is considered to act as a transmission line having low-pass filter characteristics, high-frequency components corresponding to an edge (e.g., a rising edge or a falling edge) are attenuated due to the low-pass filter characteristics, so that when received by a downstream device, the edge can have a rounded rather than square shape. Continuing with this example, in some embodiments, the system can be configured to provide pre-emphasis to the high-frequency components of the edge in order to cancel out the low-pass filter effect of transmission through the signal transmission line. For example, the pre-emphasis can include boosting high-frequency components that overshoot a stalled signal level to a rising edge or undershoot a stalled signal level to a falling edge. The pre-emphasis of the high-frequency components can be performed by programming the duration for which the boost capacitor discharges and / or by programming the time with respect to the edge transition at which the boost capacitor discharges. The time with respect to the edge transition (e.g., at the start of the transition, at the end of the transition, in the middle of the transition, etc.) can be programmed by programming the switch resistance of a switch that operably couples the boost capacitor to the signal line.

[0041]

[0045] FIG. 5 is a flowchart of an example of a process 500 for boosting a signal within a signal transmission line according to some embodiments. The blocks of process 500 can be executed by one or more components of a boost circuit that can include one or more edge detectors, one or more inversion circuits, one or more boost capacitors, one or more voltage sources, and the like. In some embodiments, the blocks of process 500 may be executed in an order other than that shown in FIG. 5. In some embodiments, two or more blocks of process 500 can be executed substantially in parallel. In some embodiments, one or more blocks of process 500 can be omitted.

[0042]

[0046] Process 500 can start at 502 by obtaining one or more signals transmitted via at least one line of a signal transmission line that couples an upstream device to a downstream device. As described above, the one or more signals may be transmitted via one or more lines of the signal transmission line. As an example, as illustrated and described above in connection with FIGS. 1, 3, and 4A - 4C, the one or more signals can correspond to, for example, signals from a DP line and signals from a DM line used for differential signal transmission in a communication that follows the USB or USB2.0 protocol. It should be noted that the signal transmission line can be of any suitable length, such as 1 meter, 2 meters, 5 meters, 10 meters, 20 meters, etc.

[0043]

[0047] As described above in connection with FIGS. 3 and 4A - 4C, the signal transmission line can be associated with any suitable number of boost circuit instances (e.g., 1, 2, 5, etc.) along the signal transmission line, and each boost circuit instance is configured to boost a signal along at least one line of the signal transmission line. The boost circuit instance can include any suitable number of boost capacitors (e.g., one, two, etc.), and each boost capacitor is configured to be operably coupled to a voltage source during a charging stage and to be operably coupled to at least one line of the signal transmission line during a discharging stage. Examples of such boost circuits are illustrated and described above in connection with FIGS. 3 and 4A - 4C. It should be noted that in some embodiments, the boost circuit may be incorporated into a cable that acts as a signal transmission line. If the signal transmission line is a PCB trace, the boost circuit may be electrically coupled to the PCB trace.

[0044]

[0048] In 504, in response to detecting a rising edge and / or a falling edge of one or more signals, the boost capacitor (e.g., associated with a given boost circuit instance) can be switched from being operably coupled to a voltage source in a charging stage to being operably coupled to at least one of the signal transmission lines in a discharging stage. In other words, the boost capacitor can transfer charge to at least one line during the discharging stage to boost the signal of at least one line. As illustrated and described above in connection with FIGS. 4A-4C, in some embodiments, a boost circuit instance can have two or more boost capacitors that can operate complementarily. For example, in the example shown in FIGS. 4A-4C, the first boost capacitor can be in a charging stage while the second boost capacitor is in a discharging stage, or vice versa. In some embodiments, the first boost capacitor can be switched to the discharging stage in response to the DP signal being greater than the DM signal, and the corresponding second boost capacitor can be switched to the discharging stage in response to the DM signal being greater than the DP signal. Note that in such a case, by boosting both the DP signal and the DM signal, the DC common mode between the DP line and the DM line can remain stable, for example, without affecting the DC bias voltage.

[0045]

[0049] In some embodiments, edge detection may be performed via an equalizer, as illustrated and described above in connection with FIGS. 4A - 4C. As described above, in some embodiments, the characteristics of the equalizer, such as the frequency response and / or gain, may be programmed, which can affect the amount and / or timing of signal boost related to edge transitions. Other aspects of the boost circuit, such as the number of boost capacitors utilized, the voltage provided by each voltage source, the signal threshold used to detect edge transitions, etc., may be programmable. In addition to or instead of this, as described above, in some embodiments, the duration of the discharge phase and / or the time at which the discharge phase is initiated (with respect to rising edge or falling edge transitions) may be programmable and / or modifiable. Adjusting the discharge phase duration and / or the time at which the discharge phase is initiated with respect to edge transitions can act to pre - emphasize the edge transitions, thereby boosting the high - frequency components of the signal and canceling out the low - pass filter effect of the signal transmission line.

[0046]

[0050] As will be appreciated by those skilled in the art, various changes in the form and details of the embodiments described herein can be made without departing from the scope of the present disclosure. Further, while various advantages, aspects, and objectives have been described in connection with the various embodiments, the scope of the present disclosure should not be limited by reference to such advantages, aspects, and objectives. Rather, the scope of the present disclosure should be determined with reference to the appended claims.

Description of Reference Numerals

[0047] 102 Upstream device 104 Downstream device 106 DP signal 108 DM signal 202 Eye diagram 204 Eye diagram 206 Data signal 208 Region 210 Data signal 302 Boost capacitor 304 Voltage supply source 306 Data line 308 Charging stage 310 Discharging stage 402 First boost capacitor 404 Second boost capacitor 406 Signal line 408 First voltage supply source 410 Rising edge detector 411 Second voltage supply source 412 Inverter 414 Falling edge detector 416 Inverter 500 Process S Output signal

Claims

1. 1. A system for boosting a signal, comprising: a boost circuit, the boost circuit comprising: at least one boost capacitor configured to be operably coupled to a voltage supply source during a charging phase and to at least one line of the signal transmission lines during a discharging phase, for boosting a voltage of one or more signals transmitted on the at least one line during the discharging phase; a switching circuit configured to switch the at least one boost capacitor between being operably coupled to the voltage supply source and being operably coupled to the at least one line of the signal transmission line; A system comprising:

2. The system of claim 1 , wherein the boost circuit is integrated into the signal transmission line.

3. 2. The system of claim 1, wherein the at least one line comprises a first line and a second line, the first line configured to carry a first signal and the second line configured to carry a second signal, and the first signal and the second signal are utilized for differential signal transmission.

4. 4. The system of claim 3, wherein the at least one boost capacitor comprises a first boost capacitor configured to boost a voltage of the first rail and a second boost capacitor configured to boost a voltage of the second rail.

5. the switching circuit is further configured to operatively couple the first boost capacitor to the first rail during the discharging phase in response to the first signal being greater than the second signal; the switching circuit is further configured to operatively couple the second boost capacitor to the second rail during the discharging phase in response to the second signal being greater than the first signal. The system of claim 4.

6. 6. The system of claim 5, wherein the first boost capacitor is operably coupled to the voltage supply source during the charging phase while the second boost capacitor is operably coupled to the second line during the discharging phase, and the second boost capacitor is operably coupled to the voltage supply source during the charging phase while the first boost capacitor is operably coupled to the first line during the discharging phase.

7. The system of claim 1 , wherein the voltage supply is programmed to provide a voltage determined based on an amount of voltage boost to be provided to the one or more signals.

8. 2. The system of claim 1, wherein the switching circuit is configured to switch the at least one boost capacitor from being operably coupled to the voltage supply source to being operably coupled to the at least one line of the signal transmission line in response to an output of an edge detection component.

9. The system of claim 8 , wherein the edge detection component is an equalizer.

10. The system of claim 9 , wherein the frequency response of the equalizer is programmable.

11. 2. The system of claim 1, wherein a duration of the discharge phase is programmable, the duration of the discharge phase causing an amplification of a high frequency signal corresponding to a pre-emphasis of rising and / or falling edges of the one or more signals, the amplification of the high frequency signal countering a low pass filter effect of the signal transmission line.

12. The system of claim 1 , wherein the one or more signals comply with a Universal Serial Bus (USB) protocol.

13. 1. A method for boosting a signal, comprising: obtaining one or more signals transmitted over at least one line of a signal transmission line coupling an upstream device to a downstream device; in response to detecting a rising edge and / or a falling edge of the one or more signals, switching a boost capacitor from being operably coupled to a voltage supply source in a charging phase to being operably coupled to the at least one line of the signal transmission line in a discharging phase, wherein the boost capacitor transfers charge to the at least one line while in the discharging phase; The method includes:

14. 14. The method of claim 13, wherein the at least one line comprises a first line and a second line, the first line configured to carry a first signal and the second line configured to carry a second signal, and the first signal and the second signal are utilized for differential signal transmission.

15. 15. The method of claim 14, wherein the at least one boost capacitor comprises a first boost capacitor configured to boost a voltage of the first rail and a second boost capacitor configured to boost a voltage of the second rail.

16. operatively coupling the first boost capacitor to the first line during the discharging phase in response to the first signal being greater than the second signal; operatively coupling the second boost capacitor to the second line during the discharging phase in response to the second signal being greater than the first signal; The method of claim 15 further comprising:

17. 17. The method of claim 16, wherein the first boost capacitor is operably coupled to the voltage supply source during the charging phase while the second boost capacitor is operably coupled to the second line during the discharging phase, and the second boost capacitor is operably coupled to the voltage supply source during the charging phase while the first boost capacitor is operably coupled to the first line during the discharging phase.

18. determining the duration of said discharge phase; setting the duration of the discharge phase to the determined duration; The method of claim 13 further comprising:

19. 20. The method of claim 18, wherein the duration of the discharge phase is determined by determining an amount of amplification of a high frequency signal corresponding to a pre-emphasis of the rising edge or the falling edge, the amplification of the high frequency signal counteracting a low pass filter effect of the signal transmission line.

20. The method of claim 13 , wherein the rising edges and / or the falling edges are detected by an equalizer.

21. The method of claim 13 , wherein the one or more signals comply with a Universal Serial Bus (USB) protocol.

Images