Computer apparatus, system, control method, and program

Abstract

To provide a computer apparatus, and the like, that allows a plurality of processors to access an external device at a low cost in a NUMA system.SOLUTION: A computer apparatus includes: an input / output control unit which exists for each path for input / output to / from an external device and controls input / output to / from the external device through the path; an input / output management unit which selects a path according to an input / output request to the external device from a process running on the processor, and instructs the input / output control unit for the selected path to perform input / output to / from the external device; a process management unit which controls, when the input / output instructed by the input / output management unit to the input / output control unit is completed, a process to run on one of multiple processors. The process management unit can select a processor on which the process is to run when the input / output is completed, in accordance with the path selected by the input / output management unit.SELECTED DRAWING: Figure 20

Description

Technical Field

[0001] The present disclosure relates to a computer device, a system, a control method, and a program.

Background Art

[0002] For example, Patent Document 1 describes that any processor included in an information processing apparatus selects an access memory as a memory on the same system bus as the device when selecting an access memory to the device, and selects a startup processor of a device driver corresponding to the device as a processor on the same system bus as the device.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the information processing apparatus described in Patent Document 1, the nodes connected to a certain device are fixed. Therefore, when accessing a certain device, its path cannot be dispersed. That is, with respect to a specific device, it is not possible to access the device from a plurality of processors (a plurality of nodes) at a low access cost.

[0005] An object of the present disclosure is to provide a computer device, a system, a control method, and a program that solve the above problems.

Means for Solving the Problems

[0006] A computer device according to one aspect of the present disclosure includes a plurality of processors, an input / output control unit that exists for each path for input / output to an external device and controls input / output to the external device through the path, and an input / output management unit that selects a path to be used in response to an input / output request from a process running on the processor and instructs the input / output control unit of the selected path to perform input / output to the external device, and a process management unit that controls the process to be in a running state in any one of the plurality of processors when the input / output instructed by the input / output management unit to the input / output control unit is completed. The process management unit can select a processor that sets the process to a running state when the input / output is completed according to the path selected by the input / output management unit.

Effect of the Invention

[0007] According to the above aspect, when performing input / output to an external device, the paths to be used can be dispersed, and in a processor selected according to the path (path to be used) selected after the completion of the input / output, the process that is the source of the input / output request can be set to a running state.

Brief Description of the Drawings

[0008]

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Mode for Carrying Out the Invention

[0009] Hereinafter, each embodiment will be described with reference to the drawings. In all the drawings, the same or corresponding components are denoted by the same reference numerals, and common descriptions are omitted.

[0010] <First Embodiment> Hereinafter, an embodiment according to the present disclosure will be described with reference to the drawings.

[0011] This embodiment is based on, for example, a NUMA system and a multipath configuration in which a plurality of paths for connecting the system and the storage are provided. NUMA is an abbreviation for "Non-Uniform Memory Access" (non-uniform memory access). This embodiment is characterized by optimizing the storage access performance by matching the CPU (central processing unit) and the used path to the same node while dispersing the used paths (affinity).

[0012] Note that a processing device such as a CPU is also called a "processor".

[0013] In this embodiment, as a method for using paths in a distributed manner, the same path is used for a certain period, and the path to be used is changed at time intervals or based on the number of accesses. When the path is changed, the CPU that executes the process is also dynamically changed, and the storage access performance is improved by always associating the CPU with the path to be used on the same node.

[0014] Also, in this embodiment, by using different paths for each process, the paths are dispersed. Thus, it is characterized in that the paths are globally dispersed throughout the system.

[0015] When path dispersion is performed, affinity cannot be achieved, and when affinity is performed, path dispersion cannot be achieved. That is, the dispersion of multi-path usage and affinity are mutually conflicting technical elements. However, this embodiment is a technology characterized by achieving both the dispersion of multi-path usage and affinity.

[0016] A process is the smallest constituent unit when an application program is executed. One process is always executed on a single CPU. This is to increase the cache hit rate and improve performance by fixing the CPU that executes a certain process.

[0017] Also, in a computer system with a multi-path configuration where there are multiple paths to storage, in order to distribute the load, the path to be used is changed each time a process accesses the storage once. When a process accesses the storage, the process calls the function of the I / O control unit (input / output control unit) of the OS (operating system). The control of multi-path selection is performed on the OS side.

[0018] FIG. 1 is an example of a system configuration diagram for realizing an embodiment. The computer system 1 is a NUMA system. That is, in the computer system 1, all of the main memory is managed in a unified address space, and any CPU can access the main memory at all addresses. That is, a certain CPU can access the main memory within the same node, and can also access the main memory of other nodes. However, a certain CPU can access the main memory within the same node (which may be called local memory) at high speed using a high-speed transmission path, but accessing the main memory (which may be called remote memory) existing in another node takes relatively more time.

[0019] Note that the computer system 1 is also called a "computer device".

[0020] In the illustrated example, the computer system 1 is configured to include a plurality of nodes 3 and an interconnect 8 that interconnects the plurality of nodes. In the illustrated example, the computer system 1 has four nodes 3, and each node 3 is numbered #0, #1, #2, #3. One node 3 is configured to include a CPU group 4, a main memory 5, an I / O control unit 6, and a cache 7 (cache memory). The CPU group 4 has, for example, a 4-core CPU. Each CPU is numbered as follows. That is, the CPU group 4 of node #0 includes four CPUs: CPU#0, CPU#1, CPU#2, and CPU#3. Also, the CPU group 4 of node #1 includes four CPUs: CPU#4, CPU#5, CPU#6, and CPU#7. Also, the CPU group 4 of node #2 includes four CPUs: CPU#8, CPU#9, CPU#a, and CPU#b. Also, the CPU group 4 of node #3 includes four CPUs: CPU#c, CPU#d, CPU#e, and CPU#f. The CPUs included in the CPU group 4 can access the main memory 5 or the I / O control unit 6 via the cache 7 within their own nodes. Note that a CPU is equipped with various registers and can hold or read out the process information necessary for executing a process.

[0021] That is, the computer system 1 is configured to have a plurality of nodes 3. Also, the node 3 has a path used for input / output. Also, the node 3 may be equipped with one or more CPUs.

[0022] Note that the I / O control unit 6 is also called an "input / output control unit".

[0023] In addition, the computer system 1 is connected to the storage 2. The storage 2 is realized by using, for example, a magnetic hard disk drive (HDD), a solid state drive (SSD), or the like, and has a function of recording information. Specifically, the I / O control unit 6 of each node 3 in the computer system 1 is connected to the storage 2 via a path. Based on a request from the CPU, the I / O control unit 6 writes information to the storage 2 or reads information from the storage 2.

[0024] Note that the storage 2 is an aspect of an "external device".

[0025] The configuration combining the computer system 1 and the storage 2 (external device) may be referred to as a "system".

[0026] As a premise of this embodiment, the data stored in the main memory 5 is basically held in the cache 7. Therefore, the affinity setting between the main memory 5 and the CPU or the I / O control unit 6 is not described. In the literature on affinity, it is common to set the main memory 5 and the CPU in the same node. In this embodiment, the CPU and the I / O control unit 6 are set on the same node so that efficient access can be made to the data on the cache 7 of the same node, thereby improving performance.

[0027] Note that the CPU can also access an external device (such as the storage 2) via the I / O control unit 6 and its path within the same node, or via the I / O control unit 6 and its path within another node. Each of FIGS. 2 and 3 shows these two forms (states).

[0028] FIG. 2 is a schematic diagram showing an access path between a CPU that executes a process and a storage 2 in a case where the CPU and an I / O control unit 6 belong to the same node. Between the CPU and the I / O control unit 6 belonging to the same node, data can be exchanged via a cache 7. At this time, the access performance from the CPU to the storage 2 is optimized. In the technology of the present embodiment described below, it is aimed to continue this optimal state. That is, in the present embodiment, the selection of the path to be used is performed aiming to continue this state.

[0029] FIG. 3 is a schematic diagram showing an access path between a CPU that executes a process and a storage 2 in a case where the CPU and an I / O control unit 6 belong to different nodes. Between the CPU and the I / O control unit 6 belonging to different nodes, data is exchanged through the following path. Data read (read) or written (write) by the CPU on node #0 from / to the main memory 5 is registered in the cache 7 on node #0. On the other hand, data read from or written to the main memory 5 or the storage 2 by the I / O control unit 6 on node #1 is registered in the cache 7 on node #1. For example, when the I / O control unit 6 on node #1 reads data written by the CPU on node #0, the I / O control unit 6 on node #1 reads the cache 7 on node #0 via the interconnect 8. That is, the access performance to the storage 2 deteriorates. The same applies vice versa. When the CPU on node #0 reads data written by the I / O control unit 6 on node #1, the CPU on node #0 reads the cache 7 on node #1 via the interconnect 8. That is, the access performance to the storage 2 deteriorates. The technology of the present embodiment aims to eliminate such a state.

[0030] FIG. 4 is a reference diagram showing an example of a sequence of the relationship between a CPU that executes a process when accessing storage according to the related art and paths used. One line in the figure corresponds to one access to storage. The length of the horizontal line in each row represents the I / O latency. In the example shown here, the CPU that executes the process is always CPU#0. Also, the paths used when accessing storage are different each time. That is, the paths used circulate in the order of node#0 → node#1 → node#2 → node#3 → node#0 → ··· (the same hereinafter). In such related art, although the paths used are strictly dispersed, the ratio (optimization rate) at which the CPU and the I / O control unit 6 used exist on the same node is only 25%.

[0031] FIG. 5 is a schematic diagram showing an example of a sequence of the relationship between a CPU that executes a process and paths used when the process accesses storage in the present disclosure. In the illustrated example, each time a certain process makes 10 accesses to storage, the path used is switched at that timing. In the method of this embodiment, when the path is switched, the CPU that executes the process is also dynamically switched. Specifically, in the illustrated example, each time 10 accesses to storage are made, the I / O control unit 6 used changes as node#0 → node#1 → node#2 → node#3 → node#0 → ··· (the same hereinafter). Also, since the CPU is switched when the I / O control unit 6 is switched, a request for access is issued from the CPU existing in the same node as the I / O control unit 6 used at the time of the next access to storage. That is, in the method of this example, the ratio (optimization rate) at which the CPU that executes the process and the I / O control unit 6 used at the time of access to storage belong to the same node is 90%. That is, compared with the case of the reference example (related art) shown in FIG. 4, the storage access performance is improved.

[0032] That is, in the method shown in FIG. 5 (and the generalized method thereof), the CPU that executes the process is selected according to the selected usage path. As a result, the ratio (optimization rate) of the CPU that executes the process and the I / O control unit 6 used when accessing the storage belonging to the same node is higher than that in the related art. That is, in the present embodiment, the storage access performance is improved compared with the related art.

[0033] In addition, in the method of the present embodiment, I / O is performed using different paths even between processes. That is, even when a plurality of processes access the storage, the paths used between those storages are dispersed. Therefore, the paths used are globally dispersed throughout the system.

[0034] FIG. 6 is a block diagram showing an example of the configuration of programs and data arranged on the main memory 5 in the present disclosure. The programs are roughly classified into an application 51 (application program), an OS·52, and a firmware 53. In the present embodiment, the functions are shared between the OS·52 and the firmware 53, but a configuration may be adopted in which the OS·52 realizes the functions of the firmware 53 without having the firmware 53.

[0035] In FIG. 6, a process 511, an I / O management unit 521, a process management unit 531, and an I / O control unit 533 are programs. Further, process information 512, application data 513, path information 522, timer notification interval 524, issue count control information 525, semaphore 523 (wait queue), ready queue 532, instruction queue 534, and end queue 535 are data.

[0036] Application 51 includes a process 511, process information 512, and application data 513. The process 511 is the smallest unit of a program to be executed. There may be multiple processes 511. To distinguish each process 511 individually, it may be numbered as process #0, process #1, ···, process #n, etc. The process information 512 is a snapshot of the execution state of an individual process 511. The process information 512 is the information passed to the CPU when the process 511 is executed by the CPU. The process information 512 includes a process ID. The process ID is information (value) for uniquely identifying a process within the computer system 1. There is process information 512 for each individual process 511. The application data 513 is data required to run the application (for example, data in the application area).

[0037] The OS 52 includes an I / O management unit 521, path information 522, a semaphore 523, a timer notification interval 524, and issue count control information 525. Note that the OS 52 may have other data and programs that are not related to the gist of this embodiment (control of the path used when accessing the external storage 2).

[0038] The I / O management unit 521 manages input / output (I / O) under the management of the OS 52. The input / output (I / O) includes, for example, writing information to the storage 2 (output from the CPU side) and reading information from the storage 2 (input to the CPU side). The I / O management unit 521 selects a path to be used in response to an input / output request from a process 511 running on the CPU to the storage 2 (external device). Further, the I / O management unit 521 instructs the I / O control unit 533 of the selected path to perform input / output to the storage 2.

[0039] Note that the I / O management unit 521 is also called the "input / output management unit".

[0040] The path information 522 is information about the path for Storage 2. Specifically, the path information 522 holds the current path number (master path number) and other information related to the path in units of storage or in units of subdivided areas within the storage. The path number (master path number) is the number of the path to be used for accessing a specific storage or an area within the storage.

[0041] The semaphore 523 is data temporarily generated for accessing Storage 2. The semaphore 523 is data for controlling access to Storage 2. The semaphore 523 has a queue (waiting queue, queue) for a process to wait during I / O access. That is, the semaphore 523 is information used to control the number of simultaneous accesses to a specific resource under the management of the OS·52.

[0042] The timer notification interval 524 is a value that defines the time interval for periodically changing the above master path number.

[0043] The issue count control information 525 includes an issue count counter and a continuous issue upper limit count. The issue count control information 525 is information for counting the number of accesses to a specific storage or an area within the storage and controlling the change of the master path number. When an access to a specific storage or an area within the storage is performed, the above issue count counter is incremented (+1). When the value of the issue count counter reaches the continuous issue upper limit count, the master path number is changed.

[0044] The firmware 53 includes a process management unit 531 for each CPU, a ready queue 532 for each node, an I / O control unit 533 for each node, an instruction queue 534 for each node, and an end queue 535 for each node. That is, when assuming the configuration shown in FIG. 1, the process management unit 531 exists corresponding to each of the 16 CPUs #0, CPU #1, CPU #2, ···, CPU #f. Further, each of the ready queue 532, the I / O control unit 533, the instruction queue 534, and the end queue 535 exists corresponding to each of the 4 nodes #0, node #1, node #2, and node #3. Note that the firmware 53 may include other functions and elements that are not directly related to the gist of the present embodiment.

[0045] The process management unit 531 manages the operation of the process 511. The process management unit 531 manages the state of the process 511 (such as the ready state or the wait state), and controls the process 511 to operate on a predetermined CPU. The process management unit 531 of the present embodiment controls the process 511 to be in the run state on any one of the plurality of CPUs when the input / output instructed by the I / O management unit 521 to the I / O control unit 533 is completed. Note that the process management unit 531 can select the CPU that makes the process 511 in the run state when the input / output is completed according to the path (used path) selected by the I / O management unit 521.

[0046] The ready queue 532 is a waiting queue for processes in the ready state. In order to make a process that has been waiting (wait) be in the ready state again, the process is taken out from the wait queue and added to the ready queue 532. Predetermined CPU resources are sequentially allocated to the processes registered in the ready queue 532. In other words, the CPU refers to the ready queue 532, takes out the processes waiting in the ready queue 532, and executes them (run state).

[0047] The I / O control unit 533 exists for each path for input / output to the storage 2 (external device). The I / O control unit 533 controls the input / output to the storage 2 through the corresponding path. The I / O control unit 533 performs the input / output to the storage 2 according to the instructions from the process management unit 531. Also, when the input / output to the storage 2 is completed, the I / O control unit 533 sends a termination notice to the process management unit 531. During the execution of the input / output, the process is in a wait state, but when the I / O control unit 533 sends a termination notice to the process management unit 531, the process that was in the wait state can return to the run state again. Note that the I / O control unit 533 operates in the I / O control unit 6 shown in FIG. 1.

[0048] Note that the I / O control unit 533 is also referred to as the "input / output control unit".

[0049] The instruction queue 534 is a waiting queue for storing instruction information corresponding to access requests to the storage 2.

[0050] The termination queue 535 is a waiting queue for storing termination information (information including access results, etc.) when the access to the storage 2 is completed.

[0051] Among the queues described above, the ready queue 532 and the wait queue are FIFO (first-in-first-out) queues for registering and retrieving processes. Also, the instruction queue 534 and the termination queue 535 are FIFO queues for registering and retrieving instructions and terminations related to I / O requests, respectively. Since the I / O management unit 521, the process management unit 531, and the I / O control unit 533 may attempt to access the above queues simultaneously, appropriate exclusive control is performed using a locking mechanism or the like for each queue. Note that since the mechanism of the necessary exclusive control itself can be realized using well-known existing technologies, the detailed description thereof is omitted.

[0052] Next, the operation of the computer system 1 will be described.

[0053] FIG. 7 is a reference diagram (reference example) showing an example of an operation sequence when a computer system operates using related art.

[0054] In the example of the sequence shown in this figure, the CPU that executes process 511 is always CPU#0. However, when accessing (Read / Write) storage 2 from that process 511, a different path (for example, a path via node#0, a path via node#1, etc.) is used each time. That is, since process 511 is executed on CPU#0 on node#0, when path#1, path#2, or path#3 is selected, the latency in accessing storage 2 deteriorates. The specific sequence is as follows.

[0055] In the description of this figure, reference numerals S201 to S209 are operations related to the first I / O by process 511. Also, reference numerals S210 to S218 are operations related to the second I / O by process 511.

[0056] Process 511 is being executed on CPU#0. When that process 511 performs Read / Write (I / O) on storage 2 at S201, process 511 calls the I / O management unit 521 of the OS.

[0057] At S202, the I / O management unit 521 acquires the path number to be used from the path information 522 and updates the path number in the path information 522. For example, the update is performed according to the following formula (1).

[0058] New path number = (current path number + 1) % total number of paths ···(1)

[0059] However, the "%" in formula (1) is an operator for calculating the remainder in integer division. That is, according to formula (1), the new path number is the remainder when (the current path number + 1) is divided by the total number of paths. That is, the I / O management unit 521 updates the path information 522 so that the path number in the path information 522 becomes the above new path number.

[0060] In S202, the I / O management unit 521 gives an instruction for Read / Write (I / O) to the storage 2 to the I / O control unit 533 of the node (here, node #0) corresponding to the path number obtained above.

[0061] Also, in S203, the I / O management unit 521 generates a semaphore 523 and notifies the process management unit 531 in the CPU where the process is being executed of the process wait instruction.

[0062] Upon receiving the notification, the process management unit 531 makes a transition to the wait state of the process 511 in S203. That is, the process management unit 531 stores the values of various registers (a set of registers) of the CPU#0 at that time in the process information 512 of the process 511. Also, the process management unit 531 adds the process 511 to the wait queue of the semaphore 523. As a result, the process enters the wait state (S205).

[0063] On the other hand, the I / O control unit 533 that has received the Read / Write (I / O) instruction to the storage 2 performs a Read / Write access to the storage 2 in S206.

[0064] Also, the I / O control unit 533 gives an end notification to the CPU#0 that issued the instruction in S207. These Read / Write instructions and end notifications are managed in a queue structure. There is an instruction queue 534 and an end queue 535 for each node. The side that notifies adds the instruction or notification to the queue, and the side that receives the notification takes out those instructions or notifications from the queue.

[0065] Upon receiving the end notification, the process management unit 531 transitions the process 511 to the running state in S208. That is, the process management unit 531 retrieves a process from the wait queue of the semaphore 523 and stores the process information 512 in CPU #0, thereby causing the process to be executed on CPU #0. As a result, the process enters the running state (S209). The above is a series of operations for one storage access.

[0066] In FIG. 7, the processing of the second I / O is also shown. In this second processing, the process running on CPU #0 accesses storage 2 using the path of node #1.

[0067] That is, the operation of S211 corresponds to the operation of S202 in the first I / O. Also, the operation of S212 corresponds to the operation of S203 in the first I / O. Also, the operation of S213 corresponds to the operation of S204 in the first I / O. Also, the operation of S214 corresponds to the operation of S205 in the first I / O.

[0068] The operation of S215 corresponds to the operation of S206 in the first I / O. Also, the operation of S216 corresponds to the operation of S207 in the first I / O. However, in this second I / O, the I / O control unit 533 of node #1 performs these operations of S215 and S216.

[0069] And the operation of S217 corresponds to the operation of S208 in the first I / O. Also, the operation of S218 corresponds to the operation of S209 in the first I / O.

[0070] The same applies to the I / O after the third time. That is, even after the third time, the process 511 running on CPU #0 accesses storage 2 while changing the path in the order of node #2 → node #3 → node #0 → node #1 → ··· (the same hereinafter).

[0071] That is, the first I / O in FIG. 7 corresponds to the I / O (access to storage 2) shown in FIG. 2. The second I / O in FIG. 7 corresponds to the I / O (access to storage 2) shown in FIG. 3.

[0072] FIG. 8 is a schematic diagram showing an example of an operation sequence when the computer system 1 according to the present disclosure operates.

[0073] In the example shown in the figure, the CPU executing process 511 may be dynamically switched. That is, during the first predetermined number of I / Os or for a predetermined time, process 511 is continuously executed on CPU#0. And at a predetermined timing, a path switch may occur. The path switch may be performed, for example, at the timing when a predetermined number of I / Os are executed or at the timing when a predetermined time has elapsed. The path may be switched, for example, from path#0 to path#1. After the path switch, path#1 is continuously used. Also, after resuming from wait, the CPU on which process 511 is executed is switched to CPU#4 on node#1. Thereafter, until the next path switch timing comes, I / Os using path#1 are continuously performed, and process 511 is continuously executed on CPU#4.

[0074] In the operation sequence shown in FIG. 8, the operations specific to this embodiment (i.e., operations different from the operation sequence in FIG. 7) are as follows. That is, one of the features of this embodiment is the method (calculation method) by which the I / O management unit 521 determines the usage path in S302 and S313. Another feature of this embodiment is that in S303 and S314, the process management unit 531 calculates the termination notification destination node number based on the usage path number, and notifies the I / O control unit 533 of the node number calculated at the time of the storage access (Read / Write) instruction. Another feature of this embodiment is that in S308 and S319, the I / O control unit 533 issues a termination notification to the CPUs under the termination notification destination node number received above. As a result, the process 511 that is the I / O requester is to be executed on the CPU belonging to the node determined based on the usage path after the completion of the I / O. The detailed procedure will be described below.

[0075] In this example, the process 511 is being executed on CPU#0. In S301, the process 511 performs Read / Write of the storage 2. When the process 511 performs Read / Write (I / O) on the storage 2, it calls the function of the I / O management unit 521.

[0076] The called I / O management unit 521 acquires the master path number from the path information 522 in S302. At this point, the I / O management unit 521 does not update the master path number in the path information 522. The I / O management unit 521 calculates the actual usage path number from the acquired master path number and the process ID. The I / O management unit 521 calculates the usage path number, for example, by performing the calculation according to the following formula (2).

[0077] Usage path number = (master path number + hash(process ID)) % total number of paths ···(2)

[0078] In the above formula (2), hash() is an appropriate hash function. By using such a hash function, the numerical value added to the master path number (the numerical value based on the process ID) can be dispersed as uniformly as possible. If the process IDs themselves are originally uniformly dispersed, there is no need to use such a hash function, and the process ID can be directly added to the master path number.

[0079] As represented by formula (2), the I / O management unit 521 determines a master path number for identifying the master path among a plurality of paths, and selects a used path based on the process ID for identifying the process 511 that has made an input / output request and the master path number. Thereby, for each process 511, the paths used for input / output are dispersed.

[0080] Also, as represented by formula (2), the I / O management unit 521 may select a used path based on the value obtained by applying a hash function to the process ID. Also, using a method (mathematical formula) other than formula (2), the I / O management unit 521 can also select a used path based on the value obtained by applying a hash function to the process ID. Here, the hash function has the effect of dispersing the paths used for input / output for each process 511 based on the process ID.

[0081] Also, as represented by formula (2), the I / O management unit 521 may select the used path by adding (or subtracting) the value obtained by applying a hash function to the process ID to the master path number in a residue system modulo the number of paths (total number of all paths).

[0082] Next, the I / O management unit 521 gives an instruction to the process management unit 531 of the CPU executing the process to Read / Write to the storage 2.

[0083] Upon receiving the instruction, the process management unit 531 calculates the end notification destination node number from the path number to be used in S303. The process management unit 531 notifies the calculated node number to the I / O control unit 533 and issues an instruction for storage access (Read / Write).

[0084] Also, in S304, the I / O management unit 521 prepares (generates) a semaphore 523 and notifies the process management unit 531 of the running CPU to give an instruction for process wait.

[0085] Upon receiving the instruction for process wait, the process management unit 531 stores the state of CPU#0 in the process information 512 of process 511 and adds the process to the wait queue of the semaphore 523 in S305. As a result, the process enters the wait state (S306).

[0086] On the other hand, the I / O control unit 533 (here, the I / O control unit 533 of node #0) that has received the Read / Write instruction to storage 2 performs a Read / Write access to storage 2 in S307.

[0087] When the access to storage 2 is completed, the I / O control unit 533 (node #0) gives an end notification to the CPU under the end notification destination node number received during the I / O instruction in S308.

[0088] Upon receiving this end notification, the process management unit 531 transitions process 511 to the run state in S309. That is, the process management unit 531 retrieves the process from the wait queue of the semaphore 523, stores the process information 512 of that process in CPU#0, and causes the process to be executed on CPU#0. As a result, the process enters the run state (S310).

[0089] The above from S301 to S310 is the operation for one access to storage 2.

[0090] Even in subsequent storage accesses, as long as the master path number remains unchanged, the path number to be used also remains unchanged. That is, the process on CPU #0 accesses Storage 2 using the I / O control unit 533 of Node #0.

[0091] At the timing of path switching, the I / O management unit 521 updates (switches) the master path number. The timing of path switching may be when the number of storage accesses with the same master path number reaches a predetermined number, or when a regular timing when a predetermined time has elapsed arrives, or both.

[0092] The I / O management unit 521 calculates the master path number after switching, for example, by the following formula (3).

[0093] New master path number = (current master path number + 1) % total number of paths ··· (3)

[0094] As shown in formula (3), the I / O management unit 521 may update the master path number at a predetermined timing so as to circulate the master path number. Note that the method of updating the master path number so as to circulate it is not limited to the method by the calculation of formula (3). That is, the I / O management unit 521 may circulate the master path number in a method different from the method of incrementing by " + 1" each time.

[0095] In the case of the example of the operation sequence shown in FIG. 8, the I / O management unit 521 switches the path number at S311. The path used by the I / O management unit 521 to calculate and use after path switching is Path #1 (Node #1).

[0096] At S312, the process 511 performs the next I / O. That is, the process 511 calls the function of the I / O management unit 521.

[0097] Then, in S313, the I / O management unit 521 calculates the path to be used and instructs the process management unit 531 of the CPU being executed to perform Read / Write to the storage 2.

[0098] Upon receiving this instruction, the process management unit 531 calculates the node number of the end notification destination from the path number to be used in S314. Then, the process management unit 531 notifies the I / O control unit 533 of the node of the path to be used (here, the I / O control unit 533 of node #1) of the end notification destination node number and instructs access to the storage 2.

[0099] In S315, the I / O management unit 521 prepares (generates) the semaphore 523 and notifies the process management unit 531 of the CPU being executed of the process wait instruction.

[0100] Upon receiving the process wait instruction, the process management unit 531 transitions the process 511 to the wait state in S316. That is, the process management unit 531 stores the state of CPU#0 in the process information 512 of the process 511 and adds the process 511 to the wait queue of the semaphore 523. As a result, this process enters the wait state (S317).

[0101] On the other hand, the I / O control unit 533 (node #1) that has received the Read / Write instruction to the storage 2 performs Read / Write access to the storage 2 in S318.

[0102] Also, in S319, the I / O control unit 533 sends an end notification to the CPU (#4) under the node number of the end notification destination (node #1) received together with the Read / Write instruction.

[0103] Upon receiving this termination notice, the Process Management Unit 531 (CPU #4) transitions Process 511 to the running state at S320. That is, the Process Management Unit 531 (CPU #4) retrieves a process from the wait queue of the semaphore 523, stores the process information 512 of that process in CPU #4, and causes that process to be executed by CPU #4. As a result, that process enters the running state (S321).

[0104] Thus, in this embodiment, there may be a case where the CPU executing the process is dynamically switched as in the illustrated operation sequence.

[0105] Thereafter, as long as the master path number does not change, the path number used also does not change, and the process executed on CPU #4 accesses Storage 2 using the I / O control unit 533 of Node #1. Each time a path switch occurs at a predetermined timing (e.g., regular timing), the master path number is updated, and the path used and the CPU executing the process change dynamically.

[0106] As described above with reference to FIG. 8, the features of this embodiment are as follows. The computer system 1 includes a plurality of CPUs (processors). The I / O Management Unit 521 (input / output management unit) selects a path to be used in response to an input / output request from Process 511 running on a CPU to Storage 2 (external device). Further, the I / O Management Unit 521 instructs the I / O control unit 533 (input / output control unit) of the selected path to perform input / output to Storage 2. When the input / output instructed by the I / O Management Unit 521 to the I / O control unit 533 is completed, the Process Management Unit 531 controls so that Process 511 becomes the running state in any one of the plurality of CPUs. Also, the Process Management Unit 531 can select the CPU (or the node where the CPU exists) that makes Process 511 the running state when the input / output is completed according to the path selected by the I / O Management Unit 521.

[0107] Note that in the present embodiment, when the process management unit 531 selects a CPU that sets the process 511 to the running state when the input / output is completed, it selects a CPU belonging to the same node as the path selected for input / output by the I / O management unit 521.

[0108] Next, with reference to the flowchart, the detailed operations of each function will be described.

[0109] FIG. 9 is a flowchart showing the procedure of the process 511. On the computer system 1, various applications 51 can operate. The process 511 is managed by the OS as the smallest program unit constituting the application 51. The process 511 operates on the CPU. Hereinafter, the procedure will be described according to this flowchart.

[0110] In step S000, the process 511 determines whether to terminate. If the process 511 terminates (step S000: YES), the entire processing of this flowchart ends. If the process 511 does not terminate (step S000: NO), the process proceeds to the next step S001.

[0111] In step S001, the process 511 performs processing specific to the application. However, the processing in this step does not include I / O. The I / O processing is performed in the next step S002.

[0112] In step S002, the process 511 requests access (Read / Write) to the storage 2. Specifically, the process 511 accesses the storage 2 by calling the I / O management unit 521 which is a part of the functions of the OS 52. After the processing of this step ends, the process returns to step S000.

[0113] FIG. 10 is a flowchart showing the procedure of the initialization process executed by the I / O management unit 521 at the time of OS startup. The computer system 1 can connect a plurality of storages 2. One of these plurality of storages 2 is referred to as storage (i). However, i is an integer serving as an index. Hereinafter, the procedure will be described along this flowchart.

[0114] In step S010, the I / O management unit 521 determines whether the creation of path information for all the storages 2 connected to the computer system 1 is completed. If it is completed (step S010: YES), the process proceeds to step S013. If it is not completed (step S010: NO), the process proceeds to the next step S011. That is, after the creation of path information for all the storages is completed, the process proceeds to the processing after step S013.

[0115] When the process proceeds to step S011, the I / O management unit 521 acquires the I / O path information connected to storage (i).

[0116] Next, in step S012, the I / O management unit 521 stores the path information of storage (i) in the area of path information 522. The path information of each storage written by the I / O management unit 521 in the area of path information 522 includes the number of I / O paths (N), the initial value of the master path number (M), and the information of the I / O control unit (C) of each path. The value of the master path number (M) is an integer from 0 to (N - 1). The initial value of the master path number (M) may be, for example, 0. The value of the master path number (M) changes, for example, at a predetermined time interval. After the processing of this step is completed, the process returns to step S010 to determine whether there is another storage for which the creation of path information is not completed.

[0117] When the process proceeds to step S013, the I / O management unit 521 sets the timer notification interval 524. This timer notification interval 524 is the time interval for changing the value of the above master path number (M).

[0118] Next, in step S014, the I / O management unit 521 sets the continuous issuance upper limit count (issuance count control information 525). The continuous issuance upper limit count may be any number, and as an example, it may be "10" or the like.

[0119] Next, in step S015, the I / O management unit 521 clears (sets to the initial value 0) the issuance count counters (issuance count control information 525) of all storage devices. This issuance count counter is a counter for determining whether the number of I / Os has reached the above-mentioned continuous issuance upper limit count.

[0120] Next, in step S016, the I / O management unit 521 starts a timer. This timer is a general timer implemented in the CPU. When this timer is started, the timing operation starts, and the timer interrupt of the I / O management unit 521 occurs periodically at the timer notification interval 524 set in step S013. When this timer interrupt occurs, the timer interrupt processing (refer to FIG. 12) described later is called.

[0121] FIG. 11 is a flowchart showing the procedure of the storage Read / Write request processing by the I / O management unit 521. The processing of this I / O management unit 521 is activated by the storage Read / Write request from the process 511 in step S002 of FIG. 9.

[0122] First, in step S020, the I / O management unit 521 acquires the path information of the storage device (i) designated as the access target from the path information 522.

[0123] In step S021, the I / O management unit 521 determines whether the value of the issue count counter of the storage (i) has reached the continuous issue upper limit count. Note that both the issue count counter and the continuous issue upper limit count are included in the issue count control information 525. If the value of the issue count counter has already reached the continuous issue upper limit count (step S021: YES), the process proceeds to the next step S022. If the value of the issue count counter has not yet reached the continuous issue upper limit count (step S021: NO), the process jumps to step S024.

[0124] When proceeding to step S022, the I / O management unit 521 performs processing for changing the path to the storage (i). That is, the I / O management unit 521 updates the master path number (M) of the storage (i). The formula for this update is as shown in the following formula (4). In formula (4), "%" is an operator for obtaining the remainder in integer division.

[0125] M = (M + 1) % number of paths (N) ···(4)

[0126] That is, by performing the calculation of formula (4), as described above, the I / O management unit 521 updates the master path number so as to circulate the master path number.

[0127] Next, in step S023, the I / O management unit 521 clears the value of the issue counter of the storage (i). That is, the I / O management unit 521 initializes the issue counter to 0.

[0128] In step S024, the I / O management unit 521 calculates the path number (P) to be used from the master path number (M) and the process ID of the source process. The calculation of the path number is performed by the following formula (5).

[0129] P = (M + hash(process ID)) % N ···(5)

[0130] Equation (5) is an equation aimed at dispersing the paths used for each process as uniformly as possible. In Equation (5), hash() is an appropriate hash function. Through such an equation, overall, the paths to be used are dispersed. As for the hash function hash(), it is desirable to simplify the logic (computation procedure) as much as possible, and also to make the number of bits of the calculated hash value small enough to represent the number of paths (N), so as to calculate the hash value at high speed. Note that if the values of the process IDs are originally dispersed, the hash function may not be necessary.

[0131] Next, in step S025, the I / O management unit 521 prepares or generates a semaphore ID corresponding to the calculated path number (P).

[0132] Next, in step S026, the I / O management unit 521 increments (+1) the value of the issue count counter of the storage (i).

[0133] In step S027, the I / O management unit 521 instructs Read / Write by notifying the process management unit 531 of the execution CPU of the access instruction information, the end notification destination semaphore ID (F), and the I / O control unit (C) of the path number (P). Note that the access instruction information includes the transfer target storage (i), the storage address, the main memory address, the data transfer size, the data transfer direction, and the like.

[0134] Based on the notification in step S027, the operation of the I / O request by the process management unit 531 (see FIG. 14) is started. When the processing of the I / O request by the process management unit 531 is completed, the processing returns to the I / O management unit 521. Then, the I / O management unit 521 proceeds to step S028 without waiting for the response from the I / O control unit 533.

[0135] In step S028, the I / O management unit 521 requests the process management unit 531 to wait at the end notification destination semaphore ID (F) prepared or generated in step S025. Due to this request, the process management unit performs the process of the wait request (see FIG. 15). As a result, the process 511 being executed on the CPU transitions to the wait state (step S029).

[0136] When Read / Write is completed, in step S030, the process 511 transitions to the run state.

[0137] FIG. 12 is a flowchart showing the procedure of the timer interrupt operation of the I / O management unit 521. By operating the timer according to the timer notification interval 524 set in step S013 of FIG. 10, the process shown in FIG. 12 is periodically executed.

[0138] In step S040, the I / O management unit 521 updates the master path number (M) of all storage. The I / O management unit 521 calculates the updated master path number (M) by the following formula (6).

[0139] M = (M + 1) % N ···(6)

[0140] In step S041, the I / O management unit 521 clears (initializes to 0) the issue count counter of all storage. By these processes, the timer interrupt process of the I / O management unit 521 ends.

[0141] The process shown in this FIG. 12 is periodically executed. That is, periodically, the master path number of the storage is switched.

[0142] FIG. 13 is a flowchart showing the procedure of the main process of the process management unit 531. Regarding the main process of the process management unit 531, it can be described below with reference to this flowchart.

[0143] First, in step S050, the process management unit 531 checks for requests from the I / O management unit 521 and the I / O control unit 533. If there is a request (step S050: YES), it proceeds to step S056. If there is no request (step S050: NO), it proceeds to step S051.

[0144] When proceeding to step S051, the process management unit 531 checks whether there is a process in the ready queue of its own node. Then, depending on the check result, it branches in the next step S052.

[0145] In step S052, the process management unit 531 branches according to the check result in the above step S051. That is, if there is a process in the ready queue of its own node (step S052: YES), it proceeds to step S053 to execute that process. If there is no process in the ready queue of its own node (step S052: NO), it proceeds to step S059.

[0146] When proceeding to step S053, the process management unit 531 retrieves the process to be executed (A) from the ready queue of its own node.

[0147] Next, in step S054, the process management unit 531 sets the process information 512 of the process to be executed (A) in various registers in the CPU.

[0148] Next, in step S055, the process management unit 531 executes that process. That is, the process (A) is executed on the CPU, and that process (A) enters the running state.

[0149] On the other hand, when the process proceeds from step S050 to step S056, the process management unit 531 sequentially determines the type of the request. That is, in step S056, the process management unit 531 determines whether the request confirmed in step S050 is a wait request. If it is a wait request (step S056: YES), the process proceeds to step S060 (FIG. 15). If it is not a wait request (step S056: NO), the process proceeds to the next step S057.

[0150] When the process proceeds to step S057, the process management unit 531 determines whether the request confirmed in step S050 is an I / O request. If it is an I / O request (step S057: YES), the process proceeds to step S070 (FIG. 14). If it is not an I / O request (step S057: NO), the process proceeds to the next step S058.

[0151] In step S058, the process management unit 531 determines whether the request confirmed in step S050 is an I / O end request. If it is an I / O end request (step S058: YES), the process proceeds to step S090 (FIG. 17). If it is not an I / O end request (step S058: NO), the process management unit 531 further determines what other request it is and performs handling according to the request.

[0152] Note that after performing the processing according to each request, the control of the process management unit 531 returns to step S050. Also, after causing the process to be executed in step S055, the control of the process management unit 531 returns to step S050.

[0153] If it is determined in step S052 that there is no ready process, then in step S059, the process management unit 531 determines whether a process is currently being executed. If a process is currently being executed (step S059: YES), the process proceeds to step S055. That is, the process is in the run state. On the other hand, if a process is not currently being executed (step S059: NO), the process returns to step S050 again.

[0154] FIG. 14 is a flowchart showing the processing procedure of the I / O requests of the process management unit 531. The processing in FIG. 14 is called via the connector "B" from the branch of step S057: YES in FIG. 13. Note that the processing of the I / O requests to the process management unit 531 is based on the notification from the I / O management unit 521 in step S027 of FIG. 11.

[0155] In step S070, the process management unit 531 calculates the end notification destination node number (D) from the I / O control unit (C) notified from the I / O management unit 521 side. The end notification destination node number (D) to be calculated is the number of the node to which the I / O control unit (C) belongs. In this step, the process management unit 531 may calculate the end notification destination node number (D) from the number of the I / O control unit (C), or may calculate the end notification destination node number (D) by calculating some configuration information.

[0156] Next, in step S071, the process management unit 531 adds instruction data to the instruction queue of the I / O control unit (C). This instruction data includes access instruction information, an end notification destination semaphore ID (F), and the end notification destination node number (D).

[0157] Next, in step S072, the process management unit 531 notifies the I / O control unit (C) that the instruction data has been added to the instruction queue. After the end of this step, the control of the process management unit 531 returns to the main process (FIG. 13).

[0158] Note that when the notification in step S072 is performed, the processing of step S027 (FIG. 11) in the I / O management unit 521 is completed.

[0159] Figure 15 is a flowchart showing the processing procedure of the wait request of the process management unit 531. The processing in this Figure 15 is called from the branch of step S056: YES in Figure 13 via the connector "A". Note that the processing of the I / O request to the process management unit 531 is based on the wait request from the I / O management unit 521 in step S028 of Figure 11. Hereinafter, the processing procedure will be described along the flowchart.

[0160] In step S060, the process management unit 531 reads out various registers in the CPU and stores the contents in the process information 512 of the process (A). Thereby, the execution state of the process (A) is stored in the process information 512. By saving the contents of the registers when in the wait state in this way, when the process becomes the run state next, the processing of the process can be restarted from that state.

[0161] Next, in step S061, the process management unit 531 adds the process (A) to the wait queue of the semaphore ID (F). Thereby, the process (A) becomes the wait state. After the end of this step, the control of the process management unit 531 returns to the main processing (Figure 13).

[0162] Figure 16 is a flowchart showing the processing procedure of the access to the storage 2 in the I / O control unit 533. Note that the I / O control unit 533 operates in the I / O control unit 6 shown in Figure 1. In response to the notification made by the process management unit 531 in step S072 of Figure 14, the processing shown in this Figure 16 is activated. Hereinafter, the processing procedure will be described along the flowchart.

[0163] In step S080, the I / O control unit 533 refers to and checks the instruction queue of its own node.

[0164] In step S081, the I / O control unit 533 determines whether there is instruction data in the instruction queue of its own node. If there is instruction data (step S081: YES), the process proceeds to the next step S082. If there is no instruction data (step S081: NO), after performing the abnormal handling process, the process of this flowchart ends.

[0165] In step S082, the I / O control unit 533 extracts the instruction data from the instruction queue of its own node. The instruction data is the one added to the instruction data in the process of step S071 in FIG. 14. That is, the instruction data includes access instruction information, the end notification destination semaphore ID (F), and the end notification destination node number (D).

[0166] Next, in step S083, the I / O control unit 533 performs Read / Write on the storage 2 according to the access instruction information extracted in the above step S082. Also, the I / O control unit 533 performs data transfer with the main memory 5. That is, when reading data from the storage 2 (read), the I / O control unit 533 writes the data read from the storage 2 into the main memory 5. Also, when writing data to the storage 2 (write), the I / O control unit 533 sends the data read from the main memory 5 to the storage 2 side. When this data transfer is completed, that is, when read / write is completed, the process moves to the next step S084.

[0167] In step S084, the I / O control unit 533 adds the end notification destination semaphore ID (F) to the end queue of its own node.

[0168] Next, in step S085, the I / O control unit 533 issues an I / O end request to the CPUs belonging to the node number (D). In the process of this step, when there are multiple CPUs belonging to the target node, the I / O control unit 533 may select one of these multiple CPUs by using some method and issue an I / O end request to the selected CPU. Alternatively, the I / O control unit 533 may issue an I / O end request to all the CPUs belonging to the target node.

[0169] As a CPU selection means in the former case (when selecting one CPU), for example, information indicating whether each CPU included in the CPU group 4 is executing a process is stored in the main memory, and the I / O control unit 533 refers to the information and notifies the CPUs that are not executing a process. In the latter case (when issuing an end request to all the CPUs within the target node), all the CPUs that receive the notification start the process of FIG. 17, but only the CPU that first checks the end queue (the processes of steps S091 and S092 in FIG. 17) among those CPUs performs the subsequent process from the end queue and performs the subsequent process (the processes after step S093 in FIG. 17). That is, the CPUs that check the end queue after the second one can be configured to determine that the end queue is empty (S092: NO) and interrupt the process.

[0170] That is, a single node may include multiple CPUs (processors). In this case, which of the multiple CPUs belonging to a specific node takes over the execution of a process is determined as follows using one of multiple methods (the first method or the second method). As the first method, the process management unit 531 selects one of the multiple CPUs on the node. Also, the process management unit 531 controls the selected CPU so that the target process becomes a running state. Here, examples of the method for selecting one CPU are as follows. That is, the process management unit 531 can select one CPU on the node that is not executing other processes and control the selected CPU so that the target process becomes a running state. As the second method, the process management unit 531 notifies the multiple CPUs on the node (for example, all the CPUs on the node) to set the control process to a running state. As an example, the process management unit 531 sets a state in which all of those CPUs can retrieve the notification from the queue. Then, the CPU that retrieves the notification earliest among the multiple CPUs that have received the notification sets the target process to a running state in its own CPU.

[0171] Figure 17 is a flowchart showing the processing procedure of the I / O end request of the process management unit 531. The processing shown in Figure 17 is activated by the processing of step S085 by the I / O control unit 533 in Figure 16. Hereinafter, the procedure of the I / O end request processing will be described along the flowchart.

[0172] In step S090, the process management unit 531 identifies the I / O control unit (C) that is the source of the I / O end request. Requests from the I / O control unit 533 side to the process management unit 531 side are generally made using the function of hardware inter-processor communication (CPU-to-CPU communication). Inter-processor communication is an existing technology. Also, in inter-processor communication, it is also possible to identify and specify the processor of the source (sender) using existing technology. The process management unit 531 can identify the I / O control unit (C) that is the source of the I / O end request using such existing technology.

[0173] Next, in step S091, the process management unit 531 checks the end queue of the I / O control unit (C).

[0174] Then, in step S092, the process management unit 531 determines whether or not the end notification destination semaphore ID exists in the end queue checked in step S091. If the end notification destination semaphore ID exists (S092: YES), the process proceeds to the next step S093. If the end notification destination semaphore ID does not exist (S093: NO), it is determined that there is an abnormality, and further corresponding processing is performed, or the processing of this flowchart is simply interrupted and ended. As described above, when another CPU within the same node has already retrieved data from the end queue, the end notification destination semaphore ID does not exist in the end queue.

[0175] When proceeding to step S093, the process management unit 531 retrieves the end notification destination semaphore ID (F) from the end queue.

[0176] Next, in step S094, the process management unit 531 checks the wait queue of the end notification destination semaphore ID (F) retrieved in step S093.

[0177] Then, in step S095, the process management unit 531 determines whether there is a wait process in the wait queue confirmed in step S094. If there is a wait process in the wait queue (S095: YES), the process proceeds to the next step S096. If there is no wait process in the wait queue (S095: NO), it is an abnormality, and the process management unit 531 performs processing to handle this abnormality.

[0178] When proceeding to step S096, the process management unit 531 retrieves process (A) from the wait queue.

[0179] Next, in step S097, the process management unit 531 adds process (A) to the ready queue of its own node. As a result, process (A) becomes ready.

[0180] When the processing in FIG. 17 ends, the process returns to the main processing in FIG. 13. In the main processing in FIG. 13, the ready process (A) is retrieved from the ready queue and the execution of the process on the CPU is resumed, thereby ending the processing of the I / O management unit 521 in FIG. 11. Also, the processing of step S002 in FIG. 9 is completed.

[0181] According to this embodiment, the I / O management unit 521 can select a path for performing I / O (input / output). Also, after the completion of I / O, the process of the input / output requester can be set to the running state on the CPU selected according to the selected path. That is, the CPU executing process 511 can be dynamically changed. Thereby, the access performance to the storage 2 (external device) can be improved.

[0182] <Second Embodiment> Next, another embodiment according to the present disclosure will be described with reference to the drawings. Note that descriptions of matters already described in other embodiments may be omitted below. Here, the description will focus on matters specific to this embodiment.

[0183] FIG. 18 and FIG. 19 are schematic diagrams showing an example of an operation sequence when the computer system 1 of the present disclosure operates. FIGS. 18 and 19 show a series of operation sequences. That is, after the operation sequence shown in FIG. 18, the operation sequence shown in FIG. 19 is executed.

[0184] Regarding the basic configuration of the hardware and software of the computer system in this embodiment, since it is the same as that described in another embodiment, detailed description here is omitted.

[0185] In the embodiments already described, the paths used for accessing the storage 2 were dispersed based on the number of accesses. In the operation sequences (FIGS. 18 and 19) of this embodiment, this point is improved. That is, in this embodiment, the paths to be used are dispersed based on the data transfer amount at the time of accessing the storage 2. That is, this embodiment acts in a direction to eliminate or reduce the bias between the I / O paths of the data amount. That is, this embodiment can equalize the bias of the data transfer amount for each path to be used.

[0186] The features of the specific operation procedures in this embodiment are as described below.

[0187] One of the features in the operation sequence of this embodiment is the operations of S409 (FIG. 18) and S423 (FIG. 19) by the I / O control unit 533 operating in each node. After the I / O control unit 533 notifies the process management unit 531 of the end notification of the storage access (S075), in S409 (node #0) and S423 (node #2), the I / O operation information is stored in the main memory. Here, the I / O operation information is, for example, a value obtained by dividing the actual time taken for data transfer by the actual time (= operation rate), and is a value measured by the I / O control unit 533 at intervals of several seconds. The I / O operation information written in the main memory can be read by other functional units.

[0188] Note that the storage of the above operation information in the main memory by the I / O control unit 533 of each node may be performed, for example, immediately before or immediately after the notification of the I / O end request described in step S085 of FIG. 16.

[0189] One of the other features in the operation sequence of this embodiment is the process when the I / O management unit 521 switches the master path number. In this embodiment, the I / O management unit 521 determines the master path number after switching based on the I / O operation information of all nodes stored in the main memory at the timing of switching the master path number.

[0190] Specifically, in S412 of FIG. 18, the I / O management unit 521 reads out the operation information of all nodes from the main memory. Next, in S413, the I / O management unit 521 determines the number of the I / O path with the lowest operation rate among all nodes. The I / O management unit 521 sets the number of that path as the master path number after switching. The I / O management unit 521 stores the determined master path number in a storage means or the like. Then, in S414, the I / O management unit 521 calculates the difference between the operation rate of the I / O path with the highest operation rate and the operation rate of the I / O path with the lowest operation rate. The I / O management unit 521 stores the value of that difference in a storage means or the like. The information on the updated master path number and the information on the above operation rate difference are referred to when the I / O management unit 521 calculates the path number (P) to be used.

[0191] Note that in the flowchart of FIG. 11, the I / O management unit 521 updates the master path number (M) in step S022. Also, in the flowchart of FIG. 12, the I / O management unit 521 updates the master path number (M) in step S040.

[0192] Other features in the operation sequence of this embodiment are the methods by which the I / O management unit 521 calculates the usage path in S402 (FIG. 18) and S416 (FIG. 19). In this embodiment, when calculating the path number to be used in S402 and S416, the I / O management unit 521 forcibly replaces the path number to be used with the master path number at a predetermined ratio.

[0193] As a more specific method, for example, when obtaining the path number (P) to be used, the I / O management unit 521 uses the following formula (7) at a predetermined ratio instead of the already described formula (5).

[0194] P = (M + hash(process ID)) % N ···(5)

[0195] P = (M + 0) % N = M ···(7)

[0196] That is, formula (7) is obtained by replacing the hash function value "hash(process ID)" in formula (5) with "0". As a result, at a predetermined ratio, the master path number (M) is directly determined as the usage path number (P). Here, the above "predetermined ratio" may be, for example, the difference between the operating rate of the I / O path with the highest operating rate and the operating rate of the I / O path with the lowest operating rate. Since the path number with a low operating rate is determined as the master path number (M), by using formula (7), the usage rate of the path with a low operating rate can be increased, and load distribution considering the data transfer volume during I / O access can be performed.

[0197] Note that the determination of the path number (P) by the I / O management unit 521 is the process of step S024 in the flowchart of FIG. 11.

[0198] A specific example of this embodiment will be described. For example, when the I / O operation rates of nodes #0, #1, #2, and #3 are 25%, 30%, 10%, and 20% respectively, the highest operation rate is 30% of node #1, and the lowest operation rate is 10% of node #2. In this case, the I / O management unit 521 uses node #2 with the lowest operation rate as the master path number. That is, the master path number (M) is "2". Also, the I / O management unit 521 calculates the difference between the highest operation rate and the lowest operation rate as "20%" (= 30% - 10%). Further, when calculating the used path number, the I / O management unit 521 uses the maximum value (denoted as MAX) that the hash function value "hash(process ID)" in formula (5) can take. Then, when the I / O management unit 521 actually calculates the hash function value "hash(process ID)" of formula (5), if the value is smaller than (MAX * (the above operation rate difference)) ("*" is the multiplication operator), it replaces that "hash(process ID)" with 0. That is, formula (7) is used instead of formula (5). For example, by using such a calculation method, the usage frequency of the path with a lower operation rate can be increased by the amount of the above operation rate difference.

[0199] For example, when the hash function "hash()" generates a 32-bit unsigned binary hash value, it is as follows. That is, in this case, 0xffffffff is the logical maximum value (MAX) of the hash value. Therefore, when the condition hash(process ID) < (20% (operation rate difference) * 0xffffffff) is satisfied, the I / O management unit 521 replaces the value of hash(process ID) with 0. That is, on the premise that the hash function evenly distributes the process ID, statistically, the path number (P) used by 20% of all processes is the master path number (M). That is, it is as shown in the following formula (8).

[0200] P=(M + 0)%N=(2 + 0)%4=2 ···(8)

[0201] Note that the procedure for path dispersion described here is just an example, and other calculation methods may be used to equalize the data transfer volume during I / O access among paths. For example, not only the usage frequency of the path number with the lowest operating rate is adjusted, but the usage frequencies of the path numbers with the second lowest, third lowest, etc. operating rates may also be adjusted.

[0202] As described above, according to this embodiment, the I / O control unit 533 records operation information representing the operation status of paths. Also, the I / O management unit 521 selects a used path based on the operation information recorded for each of all paths. Here, the operation information is information representing the operation status of a path. In the example described in this embodiment, the operation information of a path is the input / output data transfer volume of that path during a past predetermined period. Note that other information may be used as the operation information. Also, the I / O management unit 521 manages the paths such that the lower the input / output data transfer volume of a path during a past predetermined period, the more likely that path is to be selected as the used path. Thereby, it is possible to avoid the concentration of use on a specific path.

[0203] Also, in this embodiment, the I / O management unit 521 calculates the operating rate of each path based on the input / output data transfer volume, uses the value obtained by subtracting the operating rate of the path with the lowest operating rate from the operating rate of the path with the highest operating rate as the operating rate difference, and based on that operating rate difference, makes it easier for the path with the lowest operating rate to be selected as the used path. Thereby, the path with the lowest operating rate is more likely to be selected as the used path at an appropriate ratio based on the above-described operating rate difference.

[0204] <Third Embodiment> Hereinafter, an embodiment according to the present disclosure will be described with reference to the drawings. Note that descriptions of matters already described in other embodiments may be omitted hereinafter. Here, the description will focus on matters specific to this embodiment.

[0205] FIG. 20 is a block diagram showing a schematic configuration of a computer device according to the present disclosure and a schematic configuration of a system including the computer device.

[0206] As shown in the figure, the computer device 1001 includes a plurality of processors 1004, an input / output management unit 1521, a process management unit 1531, and a plurality of input / output control units 1533. Further, the system 1999 includes the computer device 1001 and an external device 1002.

[0207] The computer device 1001 and the external device 1002 are connected via a plurality of paths. The paths are used for transferring input / output data and the like between the computer device 1001 and the external device 1002. In the illustrated example, the computer device 1001 and the external device 1002 are connected by P (P is an integer of 2 or more) paths. Each path is distinguished by numbers such as path #0, path #1, ···, path #(P - 1). In each of these plurality of paths, there is an input / output control unit 1533.

[0208] The processor 1004 sequentially reads a series of instructions from a main memory (not shown) and operates according to those instructions. The processor 1004 may be a so-called CPU (Central Processing Unit), GPU (Graphics Processing Unit), or the like. Further, the processor 1004 may be a CPU having a plurality of cores. Also, the processor 1004 may be some other general-purpose or dedicated processing device with a different name. In this figure, only one processor 1004 of the computer device 1001 is shown, but as described above, the computer device 1001 has a plurality of processors 1004.

[0209] Process 1511 runs on any one of the plurality of processors 1004. Process 1511 may request input / output to the external device 1002 from the input / output management unit 1521. The process 1511 that was running on a certain processor 1004 can continue to run on another processor 1004 by inheriting the context. For example, the process 1511 interrupts the processing from the state of running on the first processor 1004 for some reason (e.g., transition to a waiting state due to its own processing), and when restarted by some event (e.g., an external interrupt), it can run on a second processor 1004 different from the first processor 1004. Here, the above "context" may be the values of various registers at the time of interruption of processing, or the values stored in the main memory (not shown), or any other situation, or a combination of any of them.

[0210] The external device 1002 is a device connected to the outside of the computer device 1001. The external device 1002 is, for example, a storage device. Typical examples of the storage device are a magnetic hard disk device, an SSD (Solid State Drive) device, etc. The external device 1002 may be a device other than the storage device. For example, the external device 1002 may be a communication device, a printing device (printer), an image reading device (scanner), or some dedicated processing device, etc. Between the external device 1002 and the computer device 1001, input / output processing (transfer of input / output data, etc.) is performed via a path. Note that there may be a plurality of paths.

[0211] In response to a request for input / output from the process 1511 to the external device 1002, the input / output management unit 1521 appropriately selects a path (used path) to be used for the input / output, and notifies the input / output control unit 1533 for that path of the input / output request. That is, in response to an input / output request from the process 1511 running on the processor 1004 to the external device 1002, the input / output management unit 1521 selects a used path and instructs the input / output control unit 1533 of the selected path to perform input / output to the external device 1002. Further, when the input / output in the external device 1002 is completed, the input / output management unit 1521 notifies the process 1511 that is the request source of the completion. The input / output management unit 1521 may be realized as a part of the functions of the OS. Note that the input / output management unit 1521 is also referred to as the "I / O management unit".

[0212] Normally, the time for which the process 1511 waits for the completion of input / output in the external device 1002 is longer than the state (run state) in which the process 1511 is executing an instruction in the CPU 1004. Therefore, while the process 1511 is waiting for the completion of input / output in the external device 1002, it is controlled to be in a waiting state without consuming the CPU.

[0213] The input / output control unit 1533 has a function of controlling input / output to the external device 1002 through a path. The input / output control unit 1533 exists for each path for input / output to the external device 1002. The destination to which a plurality of paths are connected may be a single (common) external device 1002. The destinations to which a plurality of paths are connected may be a plurality of individual external devices 1002. The input / output control unit 1533 performs input / output to the external device 1002 based on an instruction from the input / output management unit 1521. This instruction from the input / output management unit 1521 may be transmitted to the input / output control unit 1533 via the process management unit 1531. When the input / output to the external device 1002 is completed, the input / output control unit 1533 notifies the process management unit 1531 of the completion. Based on this, the process 1511 that has been waiting for the end of the input / output can detect the end of the input / output. Note that the input / output control unit 1533 is also referred to as the "I / O control unit".

[0214] When the input / output management unit 1521 has completed the input / output instructed to the input / output control unit 1533, the process management unit 1531 controls so that the process 1511 (the process 1511 that requested the input / output) becomes in a running state in any one of the plurality of processors 1004. Also, the process management unit 1531 can select a processor 1004 that makes the process 1511 in a running state when the input / output is completed according to the path selected by the input / output management unit 1521. Instead of selecting an individual processor 1004, the process management unit 1531 may select a node to which the processor 1004 belongs. At this time, one node may include a plurality of processors 1004. When the process management unit 1531 selects a node to which the processor 1004 belongs instead of selecting an individual processor 1004, the process management unit 1531 has the same meaning as if it had selected a processor 1004 belonging to the selected node.

[0215] The process management unit 1531 can select a processor 1004 (or select a node to which the processor 1004 belongs) so that the input / output cost becomes as small as possible at least on some predetermined occasion. The input / output cost represents the amount of computing resources required for input / output. The input / output cost may include the time for reading, transferring, or writing data (input / output data) transferred for input / output from a main memory or the like.

[0216] As described above, the process management unit 1531 may be one that selects a processor 1004 (or a node to which the processor 1004 belongs) at least on some predetermined occasion. That is, the process management unit 1531 may always (that is, every time input / output is performed) select a processor 1004 (or a node to which the processor 1004 belongs) so that the input / output cost becomes small, or may select a processor 1004 (or a node to which the processor 1004 belongs) so that the input / output cost becomes small at a frequency lower than that.

[0217] Note that the input / output cost may vary depending on the relationship between the processor 1004 on which the process 1511 operates and the path used for input / output.

[0218] As an example, the process management unit 1531 may select the processor 1004 (or the node to which the processor 1004 belongs) based on the number of the path selected for input / output (the number of the used path). However, the method by which the process management unit 1531 selects the processor 1004 (or the node to which the processor 1004 belongs) is not necessarily limited to this.

[0219] Note that the process management unit 1531 may be implemented as firmware, for example. However, the process management unit 1531 may be a part of the functions of the OS instead of firmware.

[0220] That is, in the present embodiment, the computer device is controlled by the following control method. That is, the control method is a control method for controlling a computer device including a plurality of processors, and an input / output control unit existing for each path for input / output to an external device controls input / output to the external device through the path, and an input / output management unit selects a used path in response to an input / output request from a process running on the processor to the external device, and instructs the input / output control unit of the selected path to perform input / output to the external device, and a process management unit controls so that the process becomes a running state in any one of the plurality of processors when the input / output instructed by the input / output management unit to the input / output control unit is completed, and the process management unit can select a processor that makes the process a running state when the input / output is completed according to the path selected by the input / output management unit.

[0221] According to this embodiment, the path used for input / output can be dynamically changed. Also, the processor 1004 that executes the process 1511 can be dynamically changed. That is, by appropriately selecting the processor 1004 that executes the process 1511, the efficiency of input / output can be improved.

[0222] The computer system 1 and the computer device 1001 in the present disclosure are realized, for example, using the technology of a computer with a von Neumann architecture. In this case, the processor (such as a CPU) sequentially reads program instructions from the main memory and executes them. The processor writes data to the main memory, reads data from the main memory, and performs arithmetic operations and logical operations according to each instruction. When accessing the main memory, a cache memory may be used as necessary. Also, the processor transfers input / output data to and from an external device by giving an instruction to the external device.

[0223] The functions of each component described in this disclosure (which may include application functions, OS functions, and other functions (such as middleware, etc.)) can be realized as a program (including firmware). In that case, the program for realizing this function may be recorded on a computer-readable recording medium, and the program recorded on this recording medium may be read into a computer system and executed to realize it. Here, the "computer-readable recording medium" refers to a portable medium such as a flexible disk, a magneto-optical disk, a ROM, a CD-ROM, a DVD-ROM, a USB memory, or a storage device such as a hard disk built into a computer system. That is, the "computer-readable recording medium" may be a non-transitory computer-readable recording medium. Furthermore, the "computer-readable recording medium" also includes, like a communication line when transmitting a program via a network such as the Internet or a communication line such as a telephone line, something that temporarily and dynamically holds a program, and something that holds a program for a certain period of time, like the volatile memory inside a computer system that serves as a server or a client in that case. Also, the above program may be for realizing a part of the functions described above, and may further be something that can be realized in combination with a program already recorded in the computer system for the functions described above.

[0224] Note that instead of realizing at least some of the functions with a general-purpose computer and a program, some dedicated circuit (electronic circuit) may be used to realize them.

[0225] As described above, according to the present disclosure, at a predetermined timing, the execution CPU can be dynamically changed so that the process of the I / O requester is executed by the processor of the same node as the I / O path. Also, the I / O path (used path) used by the process can be made different. That is, overall, while performing load distribution of the I / O path, the cost of access from the CPU that executes the process that requests I / O to the I / O path can be reduced. For example, it is possible to control so that the CPU that executes the process that requests I / O and the I / O path are on the same node.

[0226] Note that the above "predetermined timing" is, for example, the timing when the I / O path to be used changes. However, it is not always necessary to dynamically change the CPU that executes the process at all timings when the I / O path to be used changes.

[0227] In other words, without deteriorating the latency of memory access, it becomes possible to increase the frequency of using the optimal combination of the optimal CPU and I / O path and access an external device.

[0228] Generally, affinity and I / O path distribution are conflicting requirements, but with the technology of the present disclosure, it is possible to achieve both of these simultaneously.

[0229] As background, in large server computers, mainframe computers, etc., there are cases where mission-critical operations are required to operate 24 hours a day, 365 days a year. That is, high performance and availability are required simultaneously.

[0230] In recent large computers, the NUMA model has been adopted, and an affinity technique that optimizes memory access by operating the CPU and memory on the same node in order to pursue high performance is used.

[0231] In addition, in order to improve availability, a computer device and an external device such as a storage device are connected by a plurality of cables, and a multi-path technology is used so that even if a failure occurs in the path of a certain cable, the operation can be continued with the remaining healthy cable paths. In a multi-path configuration, access to an external device is performed using a plurality of (all) paths in order to distribute the load of the paths. When using paths in a distributed manner, if the CPU is fixed by affinity, in the case of using a path of another node, since the memory access crosses between nodes, there is a problem that the latency of the memory access deteriorates. The technology of the present disclosure solves this problem.

[0232] Although the use of the technology of the present disclosure is not limited, for example, it is particularly effective to apply the technology to a large computer system such as a large server computer or a mainframe. Also, for example, in a computer system having a NUMA architecture, it is particularly effective to apply the technology to a computer system having a multi-path configuration in which an external device (such as storage) is connected by a plurality of paths.

[0233] As described above, the present disclosure has been described with reference to the embodiments, but the present disclosure is not limited to the above-described embodiments. Various changes that can be understood by those skilled in the art can be made to the configuration and details of the present disclosure within the scope of the present disclosure. And each embodiment can be combined with other embodiments as appropriate.

[0234] Some or all of the above embodiments can be described as follows in the appended claims, but are not limited thereto.

[0235] (Appended Claim 1) A plurality of processors, An input / output control unit that exists for each path for input / output to an external device and controls input / output to the external device through the path, An input / output management unit that selects a path to be used in response to an input / output request to the external device from a process operating on the processor and instructs the input / output control unit of the selected path to perform input / output to the external device. A process management unit that controls the process to be in a running state in any one of the plurality of processors when the input / output instructed by the input / output management unit to the input / output control unit is completed; comprising The process management unit can select a processor that sets the process to a running state when the input / output is completed according to the path selected by the input / output management unit. A computer device.

[0236] (Appendix 2) The computer device is configured to have a plurality of nodes, The node includes the path and one or more of the processors. The computer device according to Appendix 1.

[0237] (Appendix 3) When selecting a processor that sets the process to a running state when the input / output is completed, the process management unit selects a processor belonging to the same node as the path selected by the input / output management unit. The computer device according to Appendix 2.

[0238] (Appendix 4) The input / output management unit determines a master path number for identifying a master path among a plurality of paths, and selects the used path based on a process ID for identifying the process that made the input / output request and the master path number. The computer device according to any one of Appendices 1 to 3.

[0239] (Appendix 5) The input / output control unit records operation information indicating the operation status of the path. The input / output management unit selects the used path based on the operation information recorded for each of all paths. The computer device according to Appendix 1.

[0240] (Appendix 6) The operation information is the input / output data transfer volume on the path during a past predetermined period. The computer device according to Appendix 5.

[0241] (Appendix 7) The input / output management unit makes it easier to select the path as the used path as the input / output data transfer volume of the path during a past predetermined period is smaller. The computer device according to Appendix 6.

[0242] (Appendix 8) A computer device, and An external device connected to the computer device, and A system comprising: The computer device includes A plurality of processors, and An input / output control unit that exists for each path for input / output to the external device and controls the input / output to the external device through the path, An input / output management unit that selects a used path in response to an input / output request to the external device from a process running on the processor and instructs the input / output control unit of the selected path to perform input / output to the external device, A process management unit that controls a process to be in a running state in any one of the plurality of processors when the input / output instructed by the input / output management unit to the input / output control unit is completed, And comprises The process management unit can select a processor that sets the process to a running state when the input / output is completed according to the path selected by the input / output management unit. System.

[0243] (Appendix 9) A control method for controlling a computer device including a plurality of processors, comprising: A process in which an input / output control unit existing for each path for input / output to an external device controls the input / output to the external device through the path, The input / output management unit selects a usage path in response to an input / output request from a process running on the processor to the external device, and instructs the input / output control unit of the selected path to perform input / output to the external device; When the input / output instructed by the input / output management unit to the input / output control unit is completed, the process management unit controls any one of the plurality of processors so that the process is in a running state; including; The process management unit can select a processor that sets the process to a running state when the input / output is completed according to the path selected by the input / output management unit. Control method.

[0244] (Appendix 10) A program for causing a computer device including a plurality of processors to execute a control method, The control method includes: An input / output control unit existing for each path for input / output to an external device controls input / output to the external device through the path; The input / output management unit selects a usage path in response to an input / output request from a process running on the processor to the external device, and instructs the input / output control unit of the selected path to perform input / output to the external device; When the input / output instructed by the input / output management unit to the input / output control unit is completed, the process management unit controls any one of the plurality of processors so that the process is in a running state; including; The process management unit can select a processor that sets the process to a running state when the input / output is completed according to the path selected by the input / output management unit. Program.

[0245] (Appendix 11) One of the nodes includes a plurality of the processors. The computer device according to Appendix 2.

[0246] (Appendix 12) The process management unit selects one processor out of the plurality of processors on the node, and controls the process to be in the running state on the selected processor. The computer device according to Appendix 11.

[0247] (Appendix 13) The process management unit selects one processor that is not executing other processes out of the plurality of processors on the node, and controls the process to be in the running state on the selected processor. The computer device according to Appendix 12.

[0248] (Appendix 14) The process management unit notifies the plurality of processors on the node to set the process to the running state. Among the plurality of processors that have received the notification, the processor that retrieves the notification earliest sets the process to the running state on its own processor. The computer device according to Appendix 11.

[0249] (Appendix 15) The input / output management unit selects the usage path based on the value obtained by applying a hash function to the process ID. The computer device according to Appendix 4.

[0250] (Appendix 16) The input / output management unit selects the usage path by adding the value obtained by applying a hash function to the process ID to the master path number in a remainder system modulo the number of the paths. The computer device according to Appendix 15.

[0251] (Appendix 17) The input / output management unit updates the master path number at a predetermined timing so as to circulate the master path number. The computer device according to any one of Appendix 4, Appendix 15, or Appendix 16.

[0252] (Appendix 18) The input / output management unit calculates the operating rate of each path based on the input / output data transfer amount, and uses, as the operating rate difference, a value obtained by subtracting the operating rate of the path with the lowest operating rate from the operating rate of the path with the highest operating rate, and based on the operating rate difference, makes it easier for the path with the lowest operating rate to be selected as the used path. The computer device according to Appendix 6.

[0253] (Appendix 19) The external device is a storage device. The computer device according to any one of Appendix 1 to Appendix 7, or Appendix 11 to Appendix 18.

[0254] (Appendix 20) The computer device is configured to have a plurality of nodes. The node includes the path and one or more of the processors. The system according to Appendix 8.

[0255] (Appendix 21) When the process management unit selects a processor that sets the process to the running state when the input / output is completed, the process management unit selects a processor belonging to the same node as the path selected by the input / output management unit. The system according to Appendix 20.

[0256] (Appendix 22) The input / output management unit determines a master path number for identifying a master path among a plurality of paths, and selects the used path based on a process ID for identifying the process that made the input / output request and the master path number. The system according to any one of Supplementary Note 8, Supplementary Note 20, or Supplementary Note 21.

[0257] (Supplementary Note 23) The input / output control unit records operation information indicating the operation status of the path. The input / output management unit selects the used path based on the operation information recorded for each of all the paths. The system according to Supplementary Note 8.

[0258] (Supplementary Note 24) The operation information is the amount of input / output data transfer on the path in a past predetermined period. The system according to Supplementary Note 23.

[0259] (Supplementary Note 25) The input / output management unit makes it easier for the path with a smaller amount of input / output data transfer on the path in a past predetermined period to be selected as the used path. The system according to Supplementary Note 24.

[0260] (Supplementary Note 26) One of the nodes includes a plurality of the processors. The system according to Supplementary Note 20.

[0261] (Supplementary Note 27) The process management unit selects one of the plurality of processors on the node and controls the process to be in a running state in the selected processor. The system according to Supplementary Note 26.

[0262] (Supplementary Note 28) The process management unit selects one of the plurality of processors on the node that is not executing another process and controls the process to be in a running state in the selected processor. The system according to Supplementary Note 27.

[0263] (Supplementary Note 29) The process management unit notifies a plurality of the processors on the node to set the process to the running state. Among the plurality of processors that have received the notification, the processor that has retrieved the notification the earliest sets the process to the running state in its own processor. The system according to Supplementary Note 26.

[0264] (Supplementary Note 30) The input / output management unit selects the usage path based on the value obtained by applying a hash function to the process ID. The system according to Supplementary Note 22.

[0265] (Supplementary Note 31) The input / output management unit selects the usage path by adding the value obtained by applying a hash function to the process ID to the master path number in a residue system modulo the number of the paths. The system according to Supplementary Note 30.

[0266] (Supplementary Note 32) The input / output management unit updates the master path number at a predetermined timing so as to circulate the master path number. The system according to any one of Supplementary Note 22, Supplementary Note 30, or Supplementary Note 31.

[0267] (Supplementary Note 33) The input / output management unit calculates the operation rate of each path based on the input / output data transfer volume, sets the value obtained by subtracting the operation rate of the path with the lowest operation rate from the operation rate of the path with the highest operation rate as the operation rate difference, and makes it easier to select the path with the lowest operation rate as the usage path based on the operation rate difference. The system according to Supplementary Note 24.

[0268] (Supplementary Note 34) The external device is a storage device. The system according to Supplementary Note 8, or any one of Supplementary Notes 20 to 33.

[0269] (Appendix 35) The computer device is configured to have a plurality of nodes, The node includes the path and one or more of the processors, The control method described in Appendix 9.

[0270] (Appendix 36) When the process management unit selects a processor that sets the process to the running state when the input / output is completed, the process management unit selects a processor belonging to the same node as the path selected by the input / output management unit. The control method described in Appendix 35.

[0271] (Appendix 37) The input / output management unit determines a master path number for identifying a master path among a plurality of paths, and selects the used path based on a process ID for identifying the process that made the input / output request and the master path number. The control method described in any one of Appendix 9, Appendix 35, or Appendix 36.

[0272] (Appendix 38) The input / output control unit records operation information indicating the operation status of the path, The input / output management unit selects the used path based on the operation information recorded for each of all the paths. The control method described in Appendix 9.

[0273] (Appendix 39) The operation information is the amount of input / output data transfer on the path in a past predetermined period. The control method described in Appendix 38.

[0274] (Appendix 40) The input / output management unit makes it easier to select the path as the used path as the amount of input / output data transfer on the path in a past predetermined period is smaller. The control method described in Appendix 39.

[0275] (Appendix 41) One of the nodes includes a plurality of the processors. The control method according to Appendix 35.

[0276] (Appendix 42) The process management unit selects one of the plurality of processors on the node and controls the process to be in a running state in the selected processor. The control method according to Appendix 41.

[0277] (Appendix 43) The process management unit selects one of the plurality of processors on the node that is not executing another process and controls the process to be in a running state in the selected processor. The control method according to Appendix 42.

[0278] (Appendix 44) The process management unit notifies the plurality of processors on the node to set the process to a running state. Among the plurality of processors that have received the notification, the processor that retrieves the notification earliest sets the process to a running state in its own processor. The control method according to Appendix 41.

[0279] (Appendix 45) Claim * The input / output management unit selects the usage path based on the value obtained by applying a hash function to the process ID. The control method according to Appendix 37.

[0280] (Appendix 46) The input / output management unit selects the usage path by adding the value obtained by applying a hash function to the process ID to the master path number in a residue system modulo the number of paths. The control method according to Appendix 45.

[0281] (Appendix 47) The input / output management unit updates the master path number at a predetermined timing so as to circulate the master path number. The control method according to any one of Appendix 37, Appendix 45, or Appendix 46.

[0282] (Appendix 48) The input / output management unit calculates the operation rate of each path based on the input / output data transfer amount, and uses, as the operation rate difference, a value obtained by subtracting the operation rate of the path with the lowest operation rate from the operation rate of the path with the highest operation rate. Based on the operation rate difference, the path with the lowest operation rate is made more likely to be selected as the used path. The control method according to Appendix 39.

[0283] (Appendix 49) The external device is a storage device. The control method according to Appendix 9, or any one of Appendices 35 to 48.

[0284] (Appendix 50) The computer device is configured to have a plurality of nodes. Each node includes the path and one or more of the processors. The program according to Appendix 10.

[0285] (Appendix 51) When the process management unit selects a processor to set the process to the running state when the input / output is completed, the process management unit selects a processor belonging to the same node as the path selected by the input / output management unit. The program according to Appendix 50.

[0286] (Appendix 52) The input / output management unit determines a master path number for identifying a master path among a plurality of paths, and selects the used path based on a process ID for identifying the process that made the input / output request and the master path number. The program described in Supplementary Note 10, Supplementary Note 50, or Supplementary Note 51.

[0287] (Supplementary Note 53) The input / output control unit records operation information indicating the operation status of the path. The input / output management unit selects the used path based on the operation information recorded for each of all the paths. The program described in Supplementary Note 10.

[0288] (Supplementary Note 54) The operation information is the input / output data transfer volume on the path in a past predetermined period. The program described in Supplementary Note 53.

[0289] (Supplementary Note 55) The input / output management unit makes it easier for the path with a smaller input / output data transfer volume of the path in a past predetermined period to be selected as the used path. The program described in Supplementary Note 54.

[0290] (Supplementary Note 56) One of the nodes includes a plurality of the processors. The program described in Supplementary Note 50.

[0291] (Supplementary Note 57) The process management unit selects one of the plurality of processors on the node and controls the process to be in a running state in the selected processor. The program described in Supplementary Note 56.

[0292] (Supplementary Note 58) The process management unit selects one of the plurality of processors on the node that is not executing another process and controls the process to be in a running state in the selected processor. The program described in Supplementary Note 57.

[0293] (Supplementary Note 59) The process management unit notifies the plurality of processors on the node to set the process to the running state. Among the plurality of processors that have received the notification, the processor that retrieves the notification earliest sets the process to the running state in its own processor. The program described in Supplementary Note 56.

[0294] (Supplementary Note 60) The input / output management unit selects the usage path based on the value obtained by applying a hash function to the process ID. The program described in Supplementary Note 52.

[0295] (Supplementary Note 61) The input / output management unit selects the usage path by adding the value obtained by applying a hash function to the process ID to the master path number in a remainder system with the number of paths as the modulus. The program described in Supplementary Note 60.

[0296] (Supplementary Note 62) The input / output management unit updates the master path number at a predetermined timing so as to circulate the master path number. The program described in any one of Supplementary Note 52, Supplementary Note 60, or Supplementary Note 61.

[0297] (Supplementary Note 63) The input / output management unit calculates the operating rate of each path based on the input / output data transfer volume, uses the value obtained by subtracting the operating rate of the path with the lowest operating rate from the operating rate of the path with the highest operating rate as the operating rate difference, and makes it easier to select the path with the lowest operating rate as the usage path based on the operating rate difference. The program described in Supplementary Note 54.

[0298] (Supplementary Note 64) The external device is a storage device. The program described in Supplementary Note 10 or any one of Supplementary Notes 50 to 63.

[0299] (Appendix 65) A computer-readable recording medium recording a program for causing a computer device including a plurality of processors to execute a control method, wherein the control method includes: a process in which an input / output control unit existing for each path for input / output to an external device controls input / output to the external device through the path; a process in which an input / output management unit selects a path to be used in response to an input / output request to the external device from a process operating on the processor and instructs the input / output control unit of the selected path to perform input / output to the external device; a process in which a process management unit controls such that when the input / output instructed by the input / output management unit to the input / output control unit is completed, the process becomes a running state in any one of the plurality of processors; and the process management unit can select a processor that makes the process a running state when the input / output is completed according to the path selected by the input / output management unit; a computer-readable recording medium.

[0300] (Appendix 66) the computer device is configured to have a plurality of nodes, each node includes the path and one or more of the processors; a computer-readable recording medium according to Appendix 65.

[0301] (Appendix 67) when selecting a processor that makes the process a running state when the input / output is completed, the process management unit selects a processor belonging to the same node as the path selected by the input / output management unit; a computer-readable recording medium according to Appendix 66.

[0302] (Appendix 68) The input / output management unit determines a master path number for identifying a master path among a plurality of paths, and selects the path to be used based on a process ID for identifying the process that has made the input / output request and the master path number. A computer-readable recording medium according to any one of Appendices 65 to 67.

[0303] (Appendix 69) The input / output control unit records operation information indicating the operation status of the path. The input / output management unit selects the path to be used based on the operation information recorded for each of all the paths. A computer-readable recording medium according to Appendix 65.

[0304] (Appendix 70) The operation information is the input / output data transfer amount on the path in a past predetermined period. A computer-readable recording medium according to Appendix 69.

[0305] (Appendix 71) The input / output management unit makes it easier for a path with a smaller input / output data transfer amount in a past predetermined period to be selected as the path to be used. A computer-readable recording medium according to Appendix 70.

[0306] (Appendix 72) One of the nodes includes a plurality of the processors. A computer-readable recording medium according to Appendix 66.

[0307] (Appendix 73) The process management unit selects one of the plurality of processors on the node and controls the process to be in a running state in the selected processor. A computer-readable recording medium according to Appendix 72.

[0308] (Supplementary Note 74) The process management unit selects one processor among the plurality of processors on the node that is not executing another process, and controls the process to be in a running state on the selected processor. The computer-readable recording medium according to Supplementary Note 73.

[0309] (Supplementary Note 75) The process management unit notifies the plurality of processors on the node to set the process to a running state. Among the plurality of processors that have received the notification, the processor that retrieves the notification earliest sets the process to a running state on its own processor. The computer-readable recording medium according to Supplementary Note 72.

[0310] (Supplementary Note 76) The input / output management unit selects the usage path based on the value obtained by applying a hash function to the process ID. The computer-readable recording medium according to Supplementary Note 68.

[0311] (Supplementary Note 77) The input / output management unit selects the usage path by adding the value obtained by applying a hash function to the process ID to the master path number in a remainder system modulo the number of paths. The computer-readable recording medium according to Supplementary Note 76.

[0312] (Supplementary Note 78) The input / output management unit updates the master path number at a predetermined timing so as to circulate the master path number. The computer-readable recording medium according to any one of Supplementary Note 68, Supplementary Note 76, or Supplementary Note 77.

[0313] (Supplementary Note 79) The input / output management unit calculates the operation rate of each path based on the input / output data transfer volume, and uses, as the operation rate difference, the value obtained by subtracting the operation rate of the path with the lowest operation rate from the operation rate of the path with the highest operation rate. Based on the operation rate difference, the path with the lowest operation rate is made more likely to be selected as the used path. A computer-readable recording medium according to Supplementary Note 70.

[0314] (Supplementary Note 80) The external device is a storage device. A computer-readable recording medium according to any one of Supplementary Notes 65 to 79.

Explanation of Signs

[0315] 1 Computer system (computer device) 2 Storage (external device) 3 Node 4 CPU group (processor group) 5 Main memory 6 I / O control unit (input / output control unit) 7 Cache 8 Interconnect 51 Application 52 OS 53 Firmware 511 Process 512 Process information 513 Application data 521 I / O management unit (input / output management unit) 522 Path information 523 Semaphore 524 Timer notification interval 525 Issue count control information 531 Process management unit 532 Ready queue 533 I / O control unit (input / output control unit) 534 Instruction queue 535 End queue 1001 Computer device 1002 External device 1004 Processor 1511 Process 1521 Input / Output Management Unit (I / O Management Unit) 1531 Process Management Unit 1533 Input / Output Control Unit (I / O Control Unit) 1999 System

Claims

1. A plurality of processors; An input / output control unit that exists for each path for input / output to an external device and controls input / output to the external device through the path; An input / output management unit that selects a path to be used in response to an input / output request from a process running on the processor and instructs the input / output control unit of the selected path to perform input / output to the external device; A process management unit that controls a process to be in a running state in any one of the plurality of processors when the input / output instructed by the input / output management unit to the input / output control unit is completed; Comprising: The process management unit can select a processor that sets the process to a running state when the input / output is completed according to the path selected by the input / output management unit; A computer device.

2. The computer device is configured to have a plurality of nodes, The node includes the path and one or more of the processors; The computer device according to Claim 1.

3. When selecting a processor that sets the process to a running state when the input / output is completed, the process management unit selects a processor belonging to the same node as the path selected by the input / output management unit; The computer device according to Claim 2.

4. The input / output management unit determines a master path number for identifying a master path among a plurality of paths, and selects the path to be used based on a process ID for identifying the process that made the input / output request and the master path number; The computer device according to Claim 1.

5. The input / output control unit records operation information indicating the operation status of the path; The input / output management unit selects the path to be used based on the operation information recorded for each of all paths; The computer device according to Claim 1.

6. The operation information is the amount of input / output data transfer on the path in a past predetermined period; The computer device according to Claim 5.

7. The input / output management unit makes it easier to select the path as the path to be used as the smaller the amount of input / output data transfer on the path in a past predetermined period; The computer device according to Claim 6.

8. A computer device; An external device connected to the computer device; A system comprising: The computer device is, a plurality of processors, an input / output control unit that exists for each path for input / output to an external device and controls input / output to the external device through the path, an input / output management unit that selects a path to be used in response to an input / output request to the external device from a process running on the processor and instructs the input / output control unit of the selected path to perform input / output to the external device, a process management unit that controls the process to be in a running state in any one of the plurality of processors when the input / output instructed by the input / output management unit to the input / output control unit is completed, and includes, the process management unit can select a processor that sets the process to a running state when the input / output is completed according to the path selected by the input / output management unit, a system.

9. A control method for controlling a computer device including a plurality of processors, comprising: a process in which an input / output control unit that exists for each path for input / output to an external device controls input / output to the external device through the path; a process in which an input / output management unit selects a path to be used in response to an input / output request to the external device from a process running on the processor and instructs the input / output control unit of the selected path to perform input / output to the external device; a process in which a process management unit controls the process to be in a running state in any one of the plurality of processors when the input / output instructed by the input / output management unit to the input / output control unit is completed; and includes, the process management unit can select a processor that sets the process to a running state when the input / output is completed according to the path selected by the input / output management unit, a control method.

10. A program for causing a computer device including a plurality of processors to execute a control method, the control method comprising: a process in which an input / output control unit that exists for each path for input / output to an external device controls input / output to the external device through the path; a process in which an input / output management unit selects a path to be used in response to an input / output request to the external device from a process running on the processor and instructs the input / output control unit of the selected path to perform input / output to the external device; a process in which an input / output management unit selects a path to be used in response to an input / output request to the external device from a process running on the processor and instructs the input / output control unit of the selected path to perform input / output to the external device; When the input / output management unit has completed the input / output instructed to the input / output control unit, the process management unit controls the process to be in the run state in any one of the plurality of processors; including the process management unit can select a processor that sets the process to the run state when the input / output is completed according to the path selected by the input / output management unit; program.

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