Semiconductor device
The authentication system uses an arithmetic unit, electric lock, and pixel array with infrared elements to capture vein patterns, addressing the limitations of existing systems by providing a reliable and convenient method for biometric authentication and unlocking history recording.
Patent Information
- Application Number
- JP2025049457
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2018-10-05
- Filing Date
- 2025-03-25
- Publication Date
- 2025-07-03
- Estimated Expiration
- 2039-09-26
AI Technical Summary
Existing biometric authentication systems lack convenience and reliability in recording unlocking history, particularly in systems that utilize biometric communication terminals attached to living bodies.
An authentication system incorporating an arithmetic unit that supplies control information, an input/output unit with an electric lock and reading unit, and a pixel array with infrared light-emitting elements and photoelectric conversion elements, including oxide semiconductor films, to capture physical characteristics such as vein patterns for enhanced security and convenience.
The system provides a reliable and convenient method for authenticating individuals based on physical characteristics, allowing for secure recording of unlocking history and reducing the need for optical components, thereby enhancing security and convenience.
Smart Images

Figure 2025100562000001_ABST
Abstract
Description
[Technical field]
[0001] One aspect of the present invention relates to an authentication system or a method for recording unlocking history using the authentication system. do.
[0002] Note that one embodiment of the present invention is not limited to the above technical field. The technical field of one aspect relates to an article, a method, or a manufacturing method. One aspect of the present invention is a process, machine, manufacture, or composition. Therefore, the present invention more specifically disclosed herein The technical field of one embodiment of the present invention is a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, The driving method thereof or the manufacturing method thereof can be given as an example. [Background technology]
[0003] A biometric authentication system that communicates with a biometric communication terminal device attached to a living body via the living body. An authentication device for physical communication is known (Patent Document 1).
[0004] The biometric authentication device is a device that communicates with a biometric device through an electronic lock that is placed close to the body and a communication electrode. A transmission circuit transmits a start signal via the communication electrode, and a reception signal including a personal identification ID is received via the communication electrode. and a timing signal for transmitting the start signal intermittently through the receiving circuit. A proximity sensor that detects whether a living body is in proximity to a communication electrode based on a received signal level in the The device has a state determination unit and a matching unit that performs matching based on a personal identification ID, and detects whether a living body is in proximity. and an authentication control unit that permits authentication when the determination is made and the collation result is a match. [Prior art documents] [Patent documents]
[0005] Patent Document 1 Japanese Patent Application Laid-Open No. 2011-101095 Summary of the Invention Problems to be Solved by the Invention
[0006] One aspect of the present invention is to provide a novel authentication system excellent in convenience or reliability as one of the problems. Or, providing a method for recording unlocking history excellent in convenience or reliability is one of the problems. Or, providing a novel authentication system, a novel method for recording unlocking history, or a novel semiconductor device is one of the problems. Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not need to solve all of these problems. Note that other problems will be apparent from the descriptions in the specification, drawings, claims, etc., and it is possible to extract these other problems from the descriptions in the specification, drawings, claims, etc. Means for Solving the Problems
[0007]
[0008]
[0009]
[0010] One aspect of the present invention is an authentication system having an arithmetic unit and an input / output unit.
[0009] The arithmetic unit supplies first control information and second control information, and the arithmetic unit is supplied with a detection signal.
[0010] The input / output unit includes an electric lock and a reading unit.
[0011] The electric lock unlocks based on the second control information. Also, the reading unit supplies the first control information. is provided with a detection signal, and the reading unit includes a light emitting element and a pixel array.
[0012] The light emitting element irradiates light including infrared rays, the pixel array includes pixels, and the pixels include an imaging circuit and a photoelectric conversion element.
[0013] The imaging circuit is electrically connected to the photoelectric conversion element, and the imaging circuit includes a transistor. The transistor includes an oxide semiconductor film, and the photoelectric conversion element includes an organic semiconductor film.
[0014] Thereby, for example, physical characteristics can be photographed. Or, for example, the spread of veins or the pattern of vein arrangement can be photographed. Or, information included in physical characteristics can be extracted. Or, security can be enhanced. As a result, a new authentication system excellent in convenience or reliability can be provided.
[0015] Further, one aspect of the present invention is an authentication system in which the above arithmetic device includes an arithmetic unit and a storage unit is.
[0016] The storage unit stores a program and a first database.
[0017] Based on the program, the arithmetic unit extracts a feature amount from the detection signal, and the arithmetic unit uses the first data base to test the feature amount.
[0018] Based on the test result, the arithmetic unit supplies second control information.
[0019] Thereby, an individual having a predetermined physical characteristic can be authenticated. Or, security can be enhanced. As a result, a new authentication system excellent in convenience or reliability can be provided.
[0020] Also, one aspect of the present invention is an authentication system in which the above storage unit stores a second database. There is.
[0021] The arithmetic unit records the unlocking history in the second database based on the test result.
[0022] As a result, the unlocking history can be recorded. Or, an individual having a predetermined physical characteristic and the unlocking history can be recorded in association with each other. Or, security can be enhanced. As a result, it is possible to provide a novel authentication system excellent in convenience or reliability. There is.
[0023] Also, one aspect of the present invention is an authentication system in which the above pixel has a first layer and a second layer. There is.
[0024] The first layer has a first transistor and a second transistor, and the second layer has a light emitting element and a photoelectric conversion element.
[0025] One of the source or drain of the first transistor is electrically connected to one electrode of the light emitting element, and one of the source or drain of the second transistor is electrically connected to one electrode of the photoelectric conversion element. There is.
[0026] Also, one aspect of the present invention is an authentication system in which the above oxide semiconductor film has In, Zn, and M (M is Al, T i, Ga, Sn, Y, Zr, La, Ce, Nd or Hf). There is.
[0027] As a result, optical system components such as lenses can be reduced. Or, the thickness can be reduced. . Or, a wide range can be imaged. Or, it is easy to increase the area. Or, adjacent objects It can capture a written form or perform detailed imaging. As a result, a novel authentication system with excellent convenience or reliability can be provided.
[0028] Moreover, one aspect of the present invention is a method for recording unlocking history having a first step to a seventh step.
[0029] In the first step, imaging is performed to obtain a detection signal.
[0030] In the second step, if a change exceeding a predetermined magnitude is recognized in the detection signal, proceed to the third step; if only a change equal to or less than the predetermined magnitude is recognized, proceed to the first step.
[0031] In the third step, imaging is performed to obtain a detection signal.
[0032] In the fourth step, a feature amount is extracted from the detection signal.
[0033] In the fifth step, using the first database, the feature amount is verified. If the first database contains data that matches the feature amount, proceed to the sixth step; if the first database does not contain data that matches the feature amount, proceed to the first step.
[0034] In the sixth step, the second control information is supplied to unlock the electric lock.
[0035] In the seventh step, the unlocking history is recorded in the second database.
[0036] Thereby, the unlocking history can be recorded in the second database. Or, an individual having a predetermined physical characteristic can be associated with and recorded together with the unlocking history. Or, security It is possible to enhance security. As a result, a novel unlocking history recording method with excellent convenience or reliability can be provided.
[0037] In the drawings attached to this specification, the components are classified by function and shown as independent blocks in a block diagram. However, in reality, it is difficult to completely separate the actual components by function, and one component may be related to multiple functions.
[0038] In this specification, the source and drain of a transistor change their names depending on the polarity of the transistor and the levels of the potentials applied to the respective terminals. Generally, in an n-channel type transistor, the terminal to which a low potential is applied is called the source, and the terminal to which a high potential is applied is called the drain. Also, in a p-channel type transistor, the terminal to which a low potential is applied is called the drain, and the terminal to which a high potential is applied is called the source. In this specification, for the sake of convenience, when explaining the connection relationship of transistors, it is assumed that the source and drain are fixed, but in reality, the names of the source and drain change according to the above potential relationship.
[0039] In this specification, the source of a transistor means a source region that is a part of a semiconductor film functioning as an active layer, or a source electrode connected to the semiconductor film. Similarly, the drain of a transistor means a drain region that is a part of the semiconductor film, or a drain electrode connected to the semiconductor film. Also, the gate means a gate electrode.
[0040] In this specification, the state in which transistors are connected in series means, for example, that the first transistor Only one of the source or drain of the dissta is connected to only one of the source or drain of the second transistor. It means a state where only one of the source or drain of the transistor is connected to only one of the source or drain of the second transistor. Also, the state where the transistors are connected in parallel means that one of the source or drain of the first transistor is connected to one of the source or drain of the second transistor, and the other of the source or drain of the first transistor is connected to the other of the source or drain of the second transistor. In this specification, "connection" means electrical connection, corresponding to a state where current, voltage, or potential can be supplied or transmitted. Therefore, the state of being connected does not necessarily refer to the state of direct connection, but also includes the state of being indirectly connected through circuit elements such as wiring, resistors, diodes, and transistors so that current, voltage, or potential can be supplied or transmitted. Even when components that are independent on the circuit diagram are connected in this specification, in reality, for example, when a part of the wiring functions as an electrode, or when one conductive film has the functions of a plurality of components. In this specification, "connection" includes such cases where one conductive film has the functions of a plurality of components. Also, in this specification, one of the first electrode or the second electrode of the transistor refers to the source electrode, and the other refers to the drain electrode.
[0041]
[0042]
[0043]
Advantages of the Invention
[0044] According to one aspect of the present invention, a novel authentication system excellent in convenience or reliability is provided. It is possible. Or, it is possible to provide a method for recording unlocking history that is excellent in convenience or reliability. It is possible. Or, it is possible to provide a new authentication system, a new method for recording unlocking history, or a new semiconductor device.
[0045] Note that the description of these effects does not prevent the existence of other effects. Note that one aspect of the present invention does not necessarily have to have all of these effects. Note that other effects will be naturally apparent from the descriptions in the specification, drawings, claims, etc., and it is possible to extract these other effects from the descriptions in the specification, drawings, claims, etc.
Brief Description of the Drawings
[0046]
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Embodiments for Carrying Out the Invention
[0047] The authentication system according to one aspect of the present invention includes an arithmetic device and an input / output device. The arithmetic device supplies first control information and second control information and is supplied with a detection signal. Further, the input / output device includes an electric lock and a reading unit. The electric lock is unlocked based on the second control information. The reading unit is supplied with the first control information and supplies a detection signal, and includes a light-emitting element and a pixel array. The light-emitting element irradiates light including infrared rays, the pixel array includes pixels, the pixels include an imaging circuit and a photoelectric conversion element, the imaging circuit is electrically connected to the photoelectric conversion element, and the imaging circuit is a trans Including a stud, the transistor includes an oxide semiconductor film. Further, the photoelectric conversion element includes an organic semiconductor film.
[0048] Thereby, for example, physical characteristics can be photographed. Or, for example, the spread of veins or the pattern of vein arrangement can be photographed. Or, information included in physical characteristics can be extracted. Or, security can be enhanced. As a result, a novel authentication system excellent in convenience or reliability can be provided.
[0049] Embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description and it will be easily understood by those skilled in the art that the form and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention is not construed as being limited to the description of the embodiments shown below and it will be easily understood by those skilled in the art that the form and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention is not construed as being limited to the description of the embodiments shown below and is not to be construed as being limited to the description of the embodiments shown below.
[0050] In the configuration of the invention described below, the same reference numerals are commonly used for the same parts or parts having the same function among different drawings, and the repeated description thereof will be omitted. Further, when referring to the same function, the hatching patterns may be the same and may not be particularly labeled In the configuration of the invention described below, the same reference numerals are commonly used for the same parts or parts having the same function among different drawings, and the repeated description thereof will be omitted. Further, when referring to the same function, the hatching patterns may be the same and may not be particularly labeled In the configuration of the invention described below, the same reference numerals are commonly used for the same parts or parts having the same function among different drawings, and the repeated description thereof will be omitted. Further, when referring to the same function, the hatching patterns may be the same and may not be particularly labeled
[0051] In addition, the position, size, range, etc. of each configuration shown in the drawings may not represent the actual position, size, range, etc. for the sake of easy understanding. For this reason, the disclosed invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings. limited to the position, size, range, etc. disclosed in the drawings.
[0052] Note that the term "film" and the term "layer" can be interchanged with each other depending on the case or the situation For example, the term "conductive layer" can be replaced with "conductive film" It is possible to change it to the term "". Or, for example, it is possible to change the term "insulating film" to the term "insulating layer".
[0053] In this specification etc., a metal oxide is an oxide of a metal in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as Oxide Semiconductor or simply OS), etc. For example, when a metal oxide is used for the semiconductor layer of a transistor, the metal oxide may be referred to as an oxide semiconductor. That is, when described as an OS FET, it can be paraphrased as a transistor having a metal oxide or an oxide semiconductor.
[0054] Also, in this specification etc., a metal oxide having nitrogen may also be collectively referred to as a metal oxide (metal oxide). Also, a metal oxide having nitrogen may be referred to as a metal oxynitride.
[0055] (Embodiment 1) In this embodiment, the configuration of the authentication system according to one aspect of the present invention will be described with reference to FIGS. 1, 2, 11 to 13.
[0056] FIG. 1 is a diagram for explaining the configuration of the authentication system according to one aspect of the present invention. FIG. 1A is a block diagram of the authentication system according to one aspect of the present invention. Also, FIG. 1B is a top view of the reading unit used in the authentication system according to one aspect of the present invention, and FIG. 1C is a cross-sectional view taken along the cutting line A1 - A2 of FIG. 1B. Also, FIGS. 1D and 1E show the use of the reading unit of the authentication system according to one aspect of the present invention It is a schematic diagram for explaining a state of photographing a palm.
[0057] FIG. 2 is a flowchart for explaining a method of recording unlocking history using an authentication system according to an aspect of the present invention. It is a flowchart.
[0058] FIG. 11 is a cross-sectional view for explaining a pixel configuration of a semiconductor device that can be used in an authentication system according to an aspect of the present invention. It is a cross-sectional view for explaining a pixel configuration of a semiconductor device that can be used in an authentication system according to an aspect of the present invention.
[0059] FIG. 12 is a circuit diagram for explaining a pixel configuration of a semiconductor device that can be used in an authentication system according to an aspect of the present invention. It is a circuit diagram for explaining a pixel configuration of a semiconductor device that can be used in an authentication system according to an aspect of the present invention.
[0060] FIG. 13 is a block diagram for explaining a configuration of a semiconductor device that can be used in an authentication system according to an aspect of the present invention. It is a block diagram for explaining a configuration of a semiconductor device that can be used in an authentication system according to an aspect of the present invention.
[0061] In this specification, variables taking values of one or more integers may be used as symbols. For example, (p) including a variable p taking a value of one or more integers may be used as part of a symbol specifying any one of up to p components. Further, for example, (m, n) including a variable m and a variable n taking values of one or more integers may be used as part of a symbol specifying any one of up to m × n components. For example, (p) including a variable p taking a value of one or more integers may be used as part of a symbol specifying any one of up to p components. Further, for example, (m, n) including a variable m and a variable n taking values of one or more integers may be used as part of a symbol specifying any one of up to m × n components. For example, (m, n) including a variable m and a variable n taking values of one or more integers may be used as part of a symbol specifying any one of up to m × n components. For example, (m, n) including a variable m and a variable n taking values of one or more integers may be used as part of a symbol specifying any one of up to m × n components.
[0062] <Configuration Example 1 of Authentication System> The authentication system described in this embodiment includes an arithmetic unit 610 and an input / output device 620 (see FIG. 1A). (See FIG. 1A).
[0063] 《Arithmetic Unit 610》 The arithmetic unit 610 supplies control information CI1 and control information CI2. Further, the arithmetic unit 610 is supplied with a detection signal DS. The arithmetic unit 610 is supplied with a detection signal DS.
[0064] 《Input / Output Device 620》 The input / output device 620 includes an electric lock 670 and a reading unit 660.
[0065] 《Electric Lock 670》 The electric lock 670 unlocks based on the control information CI2.
[0066] 《Reading Unit 660》 The reading unit 660 is supplied with the first control information CI1 and supplies a detection signal DS. Also , the reading unit 660 includes a light-emitting element 40 and a pixel array 151 (see FIG. 1B).
[0067] For example, the semiconductor device described in Embodiment 2 can be used for the reading unit 660. It is possible.
[0068] 《Light-Emitting Element 40》 The light-emitting element 40 irradiates light IR including infrared rays (see FIG. 1C).
[0069] 《Pixel Array 151》 The pixel array 151 includes pixels 10 (see FIG. 13A).
[0070] 《Pixel 10》 The pixel 10 includes an imaging circuit 100 and a photoelectric conversion element 12 (see FIG. 12).
[0071] The imaging circuit 100 is electrically connected to the photoelectric conversion element 12, and the imaging circuit 100 includes a transistor .
[0072] The transistor includes an oxide semiconductor film (see FIG. 11).
[0073] Also, for the transistor according to one aspect of the present invention, it is preferable to use an oxide semiconductor film with a low carrier concentration. When reducing the carrier concentration of the oxide semiconductor film, the oxide semiconductor When reducing the carrier concentration of the oxide semiconductor film, the oxide semiconductor It is only necessary to reduce the impurity concentration and the density of defect levels in the body film. In this specification and the like, a low impurity concentration and a low density of defect levels are referred to as high-purity intrinsic or substantially high-purity intrinsic. Examples of impurities in the oxide semiconductor film include, for example, hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, and the like.
[0074] In particular, hydrogen contained in the oxide semiconductor film reacts with oxygen bonded to metal atoms to form water, so that oxygen vacancies may be formed in the oxide semiconductor film. If the channel formation region in the oxide semiconductor film contains oxygen vacancies, the transistor may have normally-on characteristics. Furthermore, a defect in which hydrogen enters an oxygen vacancy functions as a donor, and electrons that are carriers may be generated. Also, a part of hydrogen may combine with oxygen bonded to metal atoms to generate electrons that are carriers. Therefore, a transistor using an oxide semiconductor film containing a large amount of hydrogen is likely to have normally-on characteristics. Moreover, a defect in which hydrogen enters an oxygen vacancy can function as a donor in the oxide semiconductor film. However, it is difficult to quantitatively evaluate such a defect. Therefore, in the oxide semiconductor film,
[0075] it may be evaluated by the carrier concentration rather than the donor concentration. Thus, in this specification and the like, as a parameter of the oxide semiconductor film, the carrier concentration assuming a state where no electric field is applied may be used instead of the donor concentration. That is, the "carrier concentration" described in this specification and the like may be paraphrased as the "donor concentration". Therefore, when using an oxide semiconductor film for a transistor, hydrogen in the oxide semiconductor film should be minimized. That is, the "carrier concentration" described in this specification and the like may be paraphrased as the "donor concentration".
[0076] Therefore, when using an oxide semiconductor film for a transistor, hydrogen in the oxide semiconductor film should be minimized. Specifically, in the oxide semiconductor film, it is preferable that the secondary ions are reduced as much as possible. Secondary Ion Mass Spectrometer (SIMS) The hydrogen concentration obtained by 20 atoms / cm 3 Less than 1 ×10 19 atoms / cm 3 less than 5×10 18 atoms / cm 3 Not yet More preferably, 1×10 18 atoms / cm 3 Less than 100% hydrogen and other impurities. By using a sufficiently reduced oxide semiconductor film for a channel formation region of a transistor, It is possible to impart the desired electrical properties.
[0077] The carrier concentration of the oxide semiconductor film functioning as a channel formation region is 1×10 18 cm - 3 It is preferable that the value is less than 1×10 17 cm -3 More preferably, it is less than 1 ×10 16 cm -3 More preferably, it is less than 1×10 13 cm -3 is less than More preferably, 1×10 12 cm -3 It is more preferable that the ratio is less than 1. Lower limit of carrier concentration in an oxide semiconductor film functioning as a channel formation region There is no particular limit to the value, but for example, 1×10 -9 cm -3 It can be said that:
[0078] Photoelectric conversion element 12 The photoelectric conversion element 12 includes an organic semiconductor film (see FIG. 11).
[0079] As a result, for example, physical characteristics can be photographed. Or, for example, the spread or pattern of veins can be photographed. Or, information included in the physical characteristics can be extracted. Or, security can be enhanced. As a result, a new authentication system excellent in convenience or reliability can be provided. Or, the spread or pattern of veins can be photographed. Or, information included in the physical characteristics can be extracted. Or, security can be enhanced. As a result, a new authentication system excellent in convenience or reliability can be provided. Or, security can be enhanced. As a result, a new authentication system excellent in convenience or reliability can be provided.
[0080] <<Configuration Example 2 of Arithmetic Unit 610>> Further, the arithmetic unit 610 includes an arithmetic unit 611 and a storage unit 612 (see FIG. 1A).
[0081] The storage unit 612 stores programs and a database DB1.
[0082] Based on the program, the arithmetic unit 611 extracts a feature amount from the detection signal DS, and the arithmetic unit 611 validates the feature amount using the database DB1. Further, based on the verification result, the arithmetic unit 611 supplies control information CI2.
[0083] As a result, for example, an individual having a predetermined physical characteristic can be authenticated. Or, security can be enhanced. As a result, a new authentication system excellent in convenience or reliability can be provided.
[0084] <<Configuration Example 2 of Storage Unit 612>> Further, the storage unit 612 stores a database DB2.
[0085] Based on the verification result, the arithmetic unit 611 records the unlocking history in the database DB2.
[0086] As a result, the unlocking history can be recorded. Or, an individual having a predetermined physical characteristic and can record by associating the unlocking history. Or, security can be enhanced. As a result, it is possible to provide a new authentication system excellent in convenience or reliability.
[0087] 《Program》 The program according to one aspect of the present invention has a first step to a seventh step (see FIG. 2 ).
[0088] [First step] In the first step, imaging is performed to obtain a detection signal DS (see FIG. 2 (S1)). Specifically , the arithmetic unit 610 of the authentication system supplies a control signal CI1 (see FIG. 1A). Also , based on the control signal CI1, the light emitting element 40 of the reading unit 660 irradiates light IR including infrared rays and performs imaging using the pixel array 151. Note that the reading unit 660 supplies the detection signal DS . Thereby, the arithmetic unit 610 can obtain the detection signal DS.
[0089] [Second step] In the second step, if a change exceeding a predetermined magnitude is recognized in the detection signal DS , proceed to the third step, and if only a change equal to or less than the predetermined magnitude is recognized, proceed to the first step (see FIG. 2 (S2)). For example, when an object that shields or reflects part of the light IR is proximate to the reading unit 660, the detection signal DS changes (see FIGS. 1D or 1E ). Thereby, the authentication system can know that the subject is near the reading unit 660 .
[0090] [Third step] In the third step, imaging is performed to obtain a detection signal DS (see FIG. 2 (S3)). Specifically Specifically, the arithmetic unit 610 of the authentication system supplies a control signal CI1 (see FIG. 1A). Also, based on the control signal CI1, the light emitting element 40 of the reading unit 660 irradiates light IR including infrared rays, and images using the pixel array 151. Note that the reading unit 660 supplies a detection signal DS. Thereby, the arithmetic unit 610 can acquire the detection signal DS.
[0091] [Fourth Step] In the fourth step, a feature amount is extracted from the detection signal DS (see FIG. 2 (S4)). For example, a feature amount derived from the spread of veins or the pattern of vein arrangement is extracted from the detection signal DS.
[0092] [Fifth Step] In the fifth step, using the database DB1, the feature amount is verified. If the database DB1 contains data that matches the feature amount, proceed to the sixth step. Also, if the database DB1 does not contain data that matches the feature amount, proceed to the first step (see FIG. 2 ( S5)).
[0093] [Sixth Step] In the sixth step, control information CI2 is supplied to unlock the electric lock 670 (see FIG. 2 (S 6)).
[0094] [Seventh Step] In the seventh step, the unlocking history is recorded in the database DB2 (see FIG. 2 (S7) ).
[0095] Thereby, the unlocking history can be recorded in the second database DB2. Or, an individual with a predetermined physical characteristic can be associated with and recorded together with the unlocking history. Or, Security can be enhanced. As a result, a new unlocking method with excellent convenience or reliability can be provided. A method for recording a history can be provided.
[0096] Note that this embodiment can be appropriately combined with other embodiments shown in this specification. 。
[0097] (Embodiment 2) In this embodiment, a semiconductor device that can be used in an authentication system according to an aspect of the present invention, and its manufacturing method will be described with reference to the drawings.
[0098] First, a photoelectric conversion element is formed on a substrate, and an opening is provided in the substrate together with it. Next, a conductive layer is formed so as to be embedded in the opening. Then, a transistor is formed on the substrate. For example, a first transistor in which one of the source or drain is electrically connected to one electrode of the photoelectric conversion element, and a second transistor in which one of the source or drain is electrically connected to the conductive layer are formed.
[0099]
[0099] Next, the back surface of the substrate on which the transistor is formed is polished so that the conductive layer is exposed. Then, a light-emitting element having a pixel electrode, a light-emitting layer, and a common electrode is formed so that the conductive layer and the pixel electrode are electrically connected. The above is the manufacturing method of a semiconductor device that can be used in an authentication system according to an aspect of the present invention.
[0100]
[0100] In a semiconductor device that can be used in an authentication system according to an aspect of the present invention, light emitted from the light-emitting element and reflected from the subject is detected by the photoelectric conversion element. For example, by using an element that emits infrared light as the light-emitting element, a semiconductor that can be used in an authentication system according to an aspect of the present invention The device can have a function of performing biometric authentication such as fingerprint authentication and vein authentication. Or, it can have a function of performing defect analysis of industrial products, etc.
[0101] Also, by using an element that emits visible light as the light-emitting element, the semiconductor device that can be used in the authentication system of one aspect of the present invention can have a function of displaying an image. As described above The semiconductor device that can be used in the authentication system of one aspect of the present invention can have a function of displaying an image. Furthermore, by using an element that emits both infrared light and visible light as the light-emitting element, while performing the above biometric authentication and defect analysis, etc., an image can be displayed. For example, the authentication result, etc. can be displayed Even when an element that emits visible light is used as the light-emitting element, the visible light emitted by the light-emitting element and reflected from the subject is detected by the photoelectric conversion element, thereby enabling the above biometric authentication and defect analysis, etc.
[0102] In this specification, etc., infrared light refers to, for example, light having a wavelength of 0.7 μm or more and 1000 μm or less Also, near-infrared light, which is light having a wavelength of 0.7 μm or more and 2.5 μm or less, for example, may simply be referred to as infrared light.
[0103] In the semiconductor device that can be used in the authentication system of one aspect of the present invention, a light-emitting element and a photoelectric conversion element are formed on a layer in which a transistor and wiring, etc. electrically connected to the transistor are formed. Thereby, it is possible to suppress the light emitted by the light-emitting element from being blocked by the wiring, etc., so that the light emitted from the semiconductor device that can be used in the authentication system of one aspect of the present invention can be made highly bright, and the power consumption of the semiconductor device that can be used in the authentication system of one aspect of the present invention can be reduced. Also, the semiconductor device and wiring, etc. electrically connected to the transistor are formed. Thereby, it is possible to suppress the light emitted by the light-emitting element from being blocked by the wiring, etc., so that the light emitted from the semiconductor device that can be used in the authentication system of one aspect of the present invention can be made highly bright, and the power consumption of the semiconductor device that can be used in the authentication system of one aspect of the present invention can be reduced. Also, the semiconductor device and wiring, etc. electrically connected to the transistor are formed. Thereby, it is possible to suppress the light emitted by the light-emitting element from being blocked by the wiring, etc., so that the light emitted from the semiconductor device that can be used in the authentication system of one aspect of the present invention can be made highly bright, and the power consumption of the semiconductor device that can be used in the authentication system of one aspect of the present invention can be reduced. Also, the semiconductor device and wiring, etc. electrically connected to the transistor are formed. Thereby, it is possible to suppress the light emitted by the light-emitting element from being blocked by the wiring, etc., so that the light emitted from the semiconductor device that can be used in the authentication system of one aspect of the present invention can be made highly bright, and the power consumption of the semiconductor device that can be used in the authentication system of one aspect of the present invention can be reduced. Also, the semiconductor device and wiring, etc. electrically connected to the transistor are formed. Thereby, it is possible to suppress the light emitted by the light-emitting element from being blocked by the wiring, etc., so that the light emitted from the semiconductor device that can be used in the authentication system of one aspect of the present invention can be made highly bright, and the power consumption of the semiconductor device that can be used in the authentication system of one aspect of the present invention can be reduced. Also, the semiconductor device and wiring, etc. electrically connected to the transistor are formed. Thereby, it is possible to suppress the light emitted by the light-emitting element from being blocked by the wiring, etc., so that the light emitted from the semiconductor device that can be used in the authentication system of one aspect of the present invention can be made highly bright, and the power consumption of the semiconductor device that can be used in the authentication system of one aspect of the present invention can be reduced. Also, the semiconductor device Since it is possible to suppress the light incident thereon from being blocked by wirings or the like, the light detection sensitivity in a semiconductor device that can be used in an authentication system of one aspect of the present invention can be enhanced.
[0104] <Example of Cross-sectional Configuration of Pixel> FIG. 3 is a cross-sectional view for explaining a configuration example of Pixel 10, which is a pixel included in a semiconductor device of one aspect of the present invention. Pixel 10 includes a transistor 101, a transistor 132, a photoelectric conversion element 12, a light-emitting element 40, etc. between a substrate 30 and a substrate 50. Here, for the transistor 101 and the transistor 132, for example, a transistor (hereinafter, OS transistor) using a metal oxide in a channel formation region can be used.
[0105] As shown in FIG. 3, Pixel 10 can have a stacked configuration of a layer 61, a layer 62, and a layer 63. The layer 61 is provided with a substrate 30, an insulating layer 81, an insulating layer 82, a transistor 101 and a transistor 132, an insulating layer 80, and an insulating layer 86. The transistor 101 and the transistor 132 are provided between the insulating layer 82 and the insulating layer 80. Further, insulating layers 84 and 85 are provided so as to cover the channel formation region, the source region, and the drain region of the transistor 101 and the transistor 132. Also, an insulating layer 83 is provided between the insulating layer 82 and the insulating layer 84.
[0106] A conductive layer 21 is provided so as to be electrically connected to one of the source or drain of the transistor 101, and a conductive layer 22 is provided so as to be electrically connected to the other of the source or drain of the transistor 101. Also, one of the source or drain of the transistor 132 is electrically A conductive layer 23 is provided so as to be connected pneumatically, and a conductive layer 24 is provided so as to be electrically connected to the other of the source or drain of the transistor 132. Note that the conductive layers 21 to 24 may be referred to as wirings. Also, other conductive layers provided in the semiconductor device of one aspect of the present invention may also be referred to as wirings. As the substrate 30, a silicon substrate, a glass substrate, a ceramic substrate, a resin substrate, etc. can be used. Note that for other substrates provided in the semiconductor device of one aspect of the present invention, a substrate having the same material as the substrate 30 may be used in some cases. It is preferable to use a material in which impurities such as water and hydrogen hardly diffuse in at least one of the insulating layers 80 to 86. Thereby, the insulating layer can function as a barrier film, so that it is possible to effectively suppress impurities from entering the transistors 101 and 132 and the like. Therefore, the reliability of the semiconductor device of one aspect of the present invention can be improved. As the transistors provided in the layer 61, such as the transistor 101 and the transistor 132, thin film transistors such as OS transistors are preferable. Thereby, element isolation can be performed for the elements such as the transistors provided in the layer 61 without providing an element isolation layer such as a field oxide film. Therefore, the semiconductor device of one aspect of the present invention can be manufactured by a simple method.
[0107] The layer 62 is provided with a substrate 11 and a photoelectric conversion element 12. The substrate 11 is, for example, silicon
[0108]
[0109]
[0110] It can be used as a substrate. For example, it can be a silicon substrate having a single crystal with a crystal orientation of (100). It can be used as a substrate. The thickness of the substrate 11 is preferably 2 μm or more and 20 μm or less. Preferably.
[0111] In this specification and the like, the surface of the substrate 11 on the layer 61 side is defined as the front surface, and the surface on the layer 63 side is defined as the back surface. .
[0112] The photoelectric conversion element 12 can be provided on the substrate 11. For example, it can be a pn junction type photodiode , or a pin junction type photodiode. For example, by providing a low resistance region 13 on the substrate 11, the photoelectric conversion element 12 can be formed. For example, when the substrate 11 is a p-type substrate, by making the low resistance region 13 an n-type region, a pn junction type photodiode can be formed as the photoelectric conversion element 12. Here, the electrical resistance of the substrate 11 is preferably 8 Ω·cm or more and 12 Ω·cm or less. Preferably.
[0113] When the photoelectric conversion element 12 is formed by providing the low resistance region 13 on the substrate 11, it can be assumed that one electrode of the photoelectric conversion element 12 includes the low resistance region 13, and the other electrode of the photoelectric conversion element 12 can include the substrate 11. For example, when the substrate 11 is a p-type substrate and the low resistance region 13 is an n-type region, it can be assumed that the anode of the photoelectric conversion element 12 includes the substrate 11 and the cathode of the photoelectric conversion element 12 includes the low resistance region 13. It can be included. Included.
[0114] The low resistance region 13 is electrically connected to the conductive layer 21. Therefore, one electrode of the photoelectric conversion element 12 is electrically connected to one of the source or drain of the transistor 101 via the conductive layer 21. It is connected pneumatically. Therefore, the transistor 101 can have a function of controlling the operation of the photoelectric conversion element 12.
[0115] Also, an opening is provided in the substrate 11, and an insulating layer 87 is provided so as to cover the side surface of the opening. A conductive layer 14 is provided in the opening whose side surface is covered with the insulating layer 87, and the conductive layer 14 is electrically connected to the conductive layer 23.
[0116] When using an OS transistor as the transistor provided in the layer 61, such as the transistor 101 and the transistor 132, hydrogen in the insulating layer provided near the channel formation region of the transistor becomes one of the factors for generating carriers in the metal oxide layer. Therefore, it is better that there is less hydrogen in the insulating layer provided near the channel formation region of the OS transistor. On the other hand, when using a silicon substrate as the substrate 11, hydrogen in the insulating layer provided near the photoelectric conversion element 12 terminates the dangling bonds of silicon. Therefore, it is better that there is more hydrogen in the insulating layer provided near the photoelectric conversion element 12. Therefore, by forming the insulating layer 80 with a material that is difficult to permeate hydrogen, hydrogen can be confined on the substrate 11 side, and it is possible to suppress hydrogen from entering the transistor 101, the transistor 132, etc. Therefore, the reliability of the semiconductor device according to one aspect of the present invention can be improved compared to the case where the insulating layer 80 is not provided.
[0117] Examples of materials that are difficult to permeate hydrogen and can be used for the insulating layer 80 include aluminum oxide, aluminum oxynitride, gallium oxide, gallium oxynitride, yttrium oxide. , yttrium oxynitride, hafnium oxide, hafnium oxynitride, yttria-stabilized zir conia (YSZ), etc. may be mentioned.
[0118] A conductive layer 31, an insulating layer 32, a light-emitting element 40, and an insulating layer 33 are provided in the layer 63 . Further, a substrate 50 and a filter 51 are provided in the layer 63. The substrate 50 and the substrate 11 are sealed via a sealing layer 52. Here, as the light-emitting element 40, for example, an element having a function of emitting white light and red external light is preferably used.
[0119] The conductive layer 31 is provided so as to have a region in contact with the substrate 11. By providing the conductive layer 31 , the other electrode of the photoelectric conversion element 12 can be made to have a low resistance.
[0120] The insulating layer 32 is provided so as to cover the conductive layer 31, and the light-emitting element 40 is provided on the insulating layer 32 . The light-emitting element 40 has a laminated structure laminated in the order of a conductive layer 41, an EL layer 42, and a conductive layer 43 from the insulating layer 32 side. That is, the light-emitting element 40 can be an EL (Electro-Lumi nescence) element. By using an EL element as the light-emitting element 40 , the semiconductor device according to one aspect of the present invention can be miniaturized and thinned, so that it can be mounted on various electronic devices, and the portability of the electronic device can be improved. The conductive layer 41 is electrically connected to the conductive layer 14 through an opening provided in the insulating layer 32
[0121] . Further, an insulating layer 33 is provided so as to cover the end of the conductive layer 41. As the insulating layer 32 and the insulating layer 33, for example, an oxide insulating film, a nitride insulating film, an oxynitride insulating film, or
[0122] the like may be mentioned. A silicon oxynitride insulating film can be used. The insulating layer can be formed as a single layer or a laminate. Examples of the oxide insulating film include a silicon oxide film, an aluminum oxide film, a gallium oxide film, a germanium oxide film, a yttrium oxide film, a zirconium oxide film, a lanthanum oxide film, an eodymium oxide film, a hafnium oxide film, and a tantalum oxide film. Examples of the nitride insulating film include a silicon nitride film and aluminum nitride. Examples of the oxynitride insulating film include a silicon oxynitride film. Examples of the silicon oxynitride insulating film include a silicon oxynitride film. Note that other insulating layers included in the semiconductor device of one aspect of the present invention, such as the insulating layers 81 to 87, the gate insulating layers of the transistors 101 and 1 32, may also be insulating layers made of the above materials.
[0123] In this specification and the like, "silicon oxynitride" refers to a material having an oxygen content higher than the nitrogen content in its composition. Also, in this specification and the like, "silicon nitride oxide" refers to a material having a nitrogen content higher than the oxygen content in its composition.
[0124] In addition, a low-resistance conductive film such as a metal can be used for the conductive layer 41. For example, tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), cobalt (Co), nickel (Ni), titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu) , silver (Ag) and other metals, or an alloy thereof, or one or more of its metal nitrides can be used to form it. Note that the conductive layers 21 to 24, the conductive layer 14, and the transistors For the source electrode, drain electrode, gate electrode, etc. of the resistor 101 and the transistor 132, other conductive layers included in the semiconductor device according to one aspect of the present invention may also be conductive layers containing the above materials. In some cases, it is possible.
[0125] The conductive layer 41 and the conductive layer 43 function as electrodes of the light-emitting element 40. Therefore, one of the electrodes of the light-emitting element 40 can be electrically connected to one of the source or drain of the transistor 132 via the conductive layer 14 and the conductive layer 23. Accordingly, the transistor 132 can have a function of controlling the operation of the light-emitting element 40. Note that the conductive layer 41 can function as, for example, a pixel electrode of the light-emitting element 40, and the conductive layer 43 can function as, for example, a common electrode of the light-emitting element 40.
[0126] Here, a conductive layer having translucency can be used as the conductive layer 43. For example, when the light-emitting element 40 has a function of emitting visible light and infrared light, a translucent conductive layer that transmits visible light and infrared light can be used as the conductive layer 43. For example, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide (ITO: Indium Tin Oxide), indium tin oxide containing titanium oxide, indium zinc oxide, indium tin oxide to which silicon oxide is added, or the like can be used. Alternatively, cadmium tin oxide (CTO: Cadmium Tin Oxide) or the like can be used.
[0127] The sealing layer 52 suppresses the entry of oxygen, hydrogen, moisture, carbon dioxide, etc. into the light-emitting element 40. It has such a function. As the sealing layer 52, in addition to inert gases such as nitrogen and argon, an ultraviolet curable resin or a thermosetting resin can be used, and PVC (polyvinyl chloride), acrylic resin, polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EVA (ethylene vinyl acetate) etc. can be used. Also, a desiccant may be contained in the sealing layer 52. Moreover, as a part of the sealing layer 52, a protective layer such as silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, aluminum oxynitride, aluminum nitride oxide, DLC (Diamond Like Carbon) etc. may be provided. The filter 51 is provided so as to have a region overlapping with the photoelectric conversion element 12 and the light emitting element 40 through the sealing layer 52. The filter 51 has a function of absorbing light of a specific wavelength. For example, it has a function of absorbing light other than red light. In this case, assuming that white light is emitted from the light emitting element 40, the red light is emitted to the outside of the pixel 10 through the substrate 50 etc. Or, the filter 51 has a function of absorbing light other than, for example, green light. In this case, assuming that white light is emitted from the light emitting element 40, the green light is emitted to the outside of the pixel 10 through the substrate 50 etc. Or, the filter 51 has a function of absorbing light other than, for example, blue light. In this case, assuming that white light is emitted from the light emitting element 40, the blue light is emitted to the outside of the pixel 10 through the substrate 50 etc. Or, the filter 51 can be configured to have a function of absorbing light other than infrared light.
[0128]
[0129]
[0130] For example, it has a function of absorbing visible light. In this case, white light and red light are emitted from the light emitting element 40. If external light is emitted, infrared light is emitted to the outside of the pixel 10 via the substrate 50 and the like.
[0131] The pixel 10 includes a photoelectric conversion element 12 and a light-emitting element 40. 0 to the outside of the pixel 10 through the substrate 50 and the like, and is reflected by the subject. The emitted light can be detected by the photoelectric conversion element 12. By using an element that emits infrared light as the infrared ray 40, the semiconductor device of one embodiment of the present invention can For example, when a palm is placed on the semiconductor device of one embodiment of the present invention, Vein authentication can be performed by holding the device over the scanner, and fingerprint authentication can be performed by holding the finger over the scanner. In other words, the semiconductor device of one embodiment of the present invention can have a function of performing biometric authentication. In addition, the semiconductor device according to one embodiment of the present invention can be used for detecting foreign matter in food and analyzing defects in industrial products. It can also be used for non-destructive testing such as:
[0132] Here, the filter 51 is arranged so that the area overlapping not only the light emitting element 40 but also the photoelectric conversion element 12 is By providing the light emitting element 40 so as to have a light-emitting element, light emitted from the light emitting element 40 through the substrate 50 to the outside of the pixel 10 can be To prevent light of a wavelength other than the wavelength of the emitted light from being incident on the photoelectric conversion element 12. This improves the detection accuracy of the photoelectric conversion element 12, and the semiconductor device according to one embodiment of the present invention This can improve the reliability of the body device.
[0133] In addition, the light emitting element 40 has a function of emitting visible light such as white light, so that Such a semiconductor device can have a function of displaying an image. For example, a photoelectric conversion element 1 An image corresponding to the imaging data acquired by 2 can be displayed using the light-emitting element 40. Alternatively, information obtained from the imaging data acquired by the photoelectric conversion element 12, such as an authentication result, can be displayed. Alternatively, an image corresponding to the image data supplied from outside the pixel 10 can be displayed. For example, an image corresponding to the image data obtained via the Internet can be displayed.
[0134] As described above, by using an element that emits both infrared light and visible light as the light-emitting element 40, the semiconductor device according to one aspect of the present invention can perform the above-described biometric authentication, defect analysis, etc. while displaying an image. Even when an element that emits visible light is used as the light-emitting element 40, the visible light emitted from the light-emitting element 40 and injected outside the pixel 10 through the substrate 50 or the like and reflected by hitting the subject can be detected by the photoelectric conversion element 12, thereby performing the above-described biometric authentication, defect analysis, etc.
[0135] As described above, it can be said that the semiconductor device according to one aspect of the present invention is a semiconductor device including an imaging device provided with the photoelectric conversion element 12 and a display device provided with the light-emitting element 40.
[0136] Here, the substrate 50 is a substrate having translucency, such as a glass substrate. Thereby, it is possible to suppress the light emitted from the light-emitting element 40 and the light incident on the photoelectric conversion element 12 from being blocked by the substrate 50. Therefore, the light emitted from the semiconductor device according to one aspect of the present invention can be made highly bright, and the power consumption of the semiconductor device according to one aspect of the present invention can be reduced. In addition, the light detection sensitivity in the semiconductor device according to one aspect of the present invention can be enhanced.
[0137] Further, the conductive layer 31 can be a light-transmissive conductive layer, similar to the conductive layer 43. For example, a light-transmissive conductive layer that transmits visible light and infrared light can be used. Thereby, it is possible to suppress the light incident on the photoelectric conversion element 12 from being blocked by the conductive layer 31. Therefore, the light detection sensitivity in the semiconductor device according to one aspect of the present invention can be enhanced. Note that the conductive layer 31 can be made of, for example, a material that can be used for the conductive layer 43.
[0138] Note that the EL layer 42 overlapping with the conductive layer 41 and the conductive layer 43 can emit light, but the EL layer 42 that overlaps with the conductive layer 43 and does not overlap with the conductive layer 41 cannot emit light. Also, the EL layer 42 is an extremely thin film, and absorption of visible light and infrared light can be ignored. Therefore, the EL layer 42 and the conductive layer 43 can be provided on the photoelectric conversion element 12 in a stacked manner.
[0139] As shown in FIG. 3, the pixel 10 includes a transistor and a wiring or the like electrically connected to the transistor. On a layer 61 where these are formed, a photoelectric conversion element 12 and a light-emitting element 40 are formed. Thereby, it is possible to suppress the light emitted from the light-emitting element 40 from being blocked by the wiring or the like. Therefore, the light emitted from the semiconductor device according to one aspect of the present invention can be made highly bright, and the power consumption of the semiconductor device according to one aspect of the present invention can be reduced. Also, since it is possible to suppress the light incident on the semiconductor device from being blocked by the wiring or the like, the light detection sensitivity in the semiconductor device according to one aspect of the present invention can be enhanced.
[0140] FIG. 4A is a diagram showing a configuration example of a semiconductor device according to one aspect of the present invention. In FIG. 4A, the pixel 10 As an example, the configurations of pixel 10R, pixel 10G, pixel 10B, and pixel 10IR are shown. .
[0141] Pixel 10R, pixel 10G, pixel 10B, and pixel 10IR can each adopt the configuration shown in FIG. 3. Although layer 61 is omitted in FIG. 4A, actually, pixel 10R , pixel 10G, pixel 10B, and pixel 10IR each have layer 61.
[0142] In the semiconductor device according to one aspect of the present invention, the side surface of the photoelectric conversion element 12 having the configuration shown in FIG. 4A can be surrounded by a light control layer 56. The light control layer 56 functions as an element isolation layer between adjacent photoelectric conversion elements 12. Light incident from the light receiving surface of the photoelectric conversion element 12 toward the side surface can be reflected or attenuated by the light control layer 56. Therefore, it is possible to prevent the light from entering the adjacent photoelectric conversion elements 12. Thus, the detection accuracy by the photoelectric conversion element 12 can be improved, and the reliability of the semiconductor device according to one aspect of the present invention can be enhanced. Note that the light control layer 56 may not be provided.
[0143] It is preferable to use a material having a refractive index lower than that of silicon as the light control layer 56. For example, an insulator such as aluminum oxide, magnesium oxide, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, gallium oxide, germanium oxide, yttrium oxide, dysprosium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, or tantalum oxide can be used. Alternatively, an organic material such as an acrylic resin or polyimide may be used. By using a material having a refractive index lower than that of silicon, light incident on the side surface of the photoelectric conversion element 12 can be reflected or attenuated by the light control layer 56. . Light is more likely to be totally reflected. Also, instead of the above material, gases such as air, nitrogen, oxygen, argon, helium, etc. may be used, and in this case, a pressure lower than atmospheric pressure may be used. As the light control layer 56, a material that easily absorbs light may be used. For example, carbon-based black pigments such as carbon black, titanium-based black pigments such as titanium black, iron oxides, composite oxides of copper and chromium, resins added with materials such as composite oxides of copper, chromium, and zinc, etc. can be used.
[0144] As the light control layer 56, a material that easily absorbs light may be used. For example, carbon-based black pigments such as carbon black, titanium-based black pigments such as titanium black, iron oxides, composite oxides of copper and chromium, resins added with materials such as composite oxides of copper, chromium, and zinc, etc. can be used. As the light control layer 56, a material that easily absorbs light may be used. For example, carbon-based black pigments such as carbon black, titanium-based black pigments such as titanium black, iron oxides, composite oxides of copper and chromium, resins added with materials such as composite oxides of copper, chromium, and zinc, etc. can be used. As the light control layer 56, a material that easily absorbs light may be used. For example, carbon-based black pigments such as carbon black, titanium-based black pigments such as titanium black, iron oxides, composite oxides of copper and chromium, resins added with materials such as composite oxides of copper, chromium, and zinc, etc. can be used. As the light control layer 56, a material that easily absorbs light may be used. For example, carbon-based black pigments such as carbon black, titanium-based black pigments such as titanium black, iron oxides, composite oxides of copper and chromium, resins added with materials such as composite oxides of copper, chromium, and zinc, etc. can be used.
[0145] The light-emitting element 40 provided in the layer 63 can have functions of emitting, for example, white light and infrared light as described above. In the layer 63 of the pixel 10R, a filter 51R can be provided so as to have a region overlapping with the photoelectric conversion element 12 and the light-emitting element 40. The filter 51R has a function of transmitting, for example, red light. Therefore, the pixel 10R can have a function of emitting red light and detecting the red light by the photoelectric conversion element 12. The light-emitting element 40 provided in the layer 63 can have functions of emitting, for example, white light and infrared light as described above. In the layer 63 of the pixel 10R, a filter 51R can be provided so as to have a region overlapping with the photoelectric conversion element 12 and the light-emitting element 40. The filter 51R has a function of transmitting, for example, red light. Therefore, the pixel 10R can have a function of emitting red light and detecting the red light by the photoelectric conversion element 12. The light-emitting element 40 provided in the layer 63 can have functions of emitting, for example, white light and infrared light as described above. In the layer 63 of the pixel 10R, a filter 51R can be provided so as to have a region overlapping with the photoelectric conversion element 12 and the light-emitting element 40. The filter 51R has a function of transmitting, for example, red light. Therefore, the pixel 10R can have a function of emitting red light and detecting the red light by the photoelectric conversion element 12. The light-emitting element 40 provided in the layer 63 can have functions of emitting, for example, white light and infrared light as described above. In the layer 63 of the pixel 10R, a filter 51R can be provided so as to have a region overlapping with the photoelectric conversion element 12 and the light-emitting element 40. The filter 51R has a function of transmitting, for example, red light. Therefore, the pixel 10R can have a function of emitting red light and detecting the red light by the photoelectric conversion element 12. The light-emitting element 40 provided in the layer 63 can have functions of emitting, for example, white light and infrared light as described above. In the layer 63 of the pixel 10R, a filter 51R can be provided so as to have a region overlapping with the photoelectric conversion element 12 and the light-emitting element 40. The filter 51R has a function of transmitting, for example, red light. Therefore, the pixel 10R can have a function of emitting red light and detecting the red light by the photoelectric conversion element 12.
[0146] Also, in the layer 63 of the pixel 10G, a filter 51G can be provided so as to have a region overlapping with the photoelectric conversion element 12 and the light-emitting element 40. The filter 51G has a function of transmitting, for example, green light. Therefore, the pixel 10G can have a function of emitting green light and detecting the green light by the photoelectric conversion element 12. Also, in the layer 63 of the pixel 10G, a filter 51G can be provided so as to have a region overlapping with the photoelectric conversion element 12 and the light-emitting element 40. The filter 51G has a function of transmitting, for example, green light. Therefore, the pixel 10G can have a function of emitting green light and detecting the green light by the photoelectric conversion element 12. Also, in the layer 63 of the pixel 10G, a filter 51G can be provided so as to have a region overlapping with the photoelectric conversion element 12 and the light-emitting element 40. The filter 51G has a function of transmitting, for example, green light. Therefore, the pixel 10G can have a function of emitting green light and detecting the green light by the photoelectric conversion element 12. Also, in the layer 63 of the pixel 10G, a filter 51G can be provided so as to have a region overlapping with the photoelectric conversion element 12 and the light-emitting element 40. The filter 51G has a function of transmitting, for example, green light. Therefore, the pixel 10G can have a function of emitting green light and detecting the green light by the photoelectric conversion element 12.
[0147] Also, in the layer 63 of the pixel 10B, a filter 51B can be provided so as to have a region overlapping with the photoelectric conversion element 12 and the light-emitting element 40. The filter 51B has a function of transmitting, for example, blue light. Therefore, the pixel 10B can have a function of emitting blue light and detecting the blue light by the photoelectric conversion element 12. Also, in the layer 63 of the pixel 10B, a filter 51B can be provided so as to have a region overlapping with the photoelectric conversion element 12 and the light-emitting element 40. The filter 51B has a function of transmitting, for example, blue light. Therefore, the pixel 10B can have a function of emitting blue light and detecting the blue light by the photoelectric conversion element 12. Also, in the layer 63 of the pixel 10B, a filter 51B can be provided so as to have a region overlapping with the photoelectric conversion element 12 and the light-emitting element 40. The filter 51B has a function of transmitting, for example, blue light. Therefore, the pixel 10B can have a function of emitting blue light and detecting the blue light by the photoelectric conversion element 12. It can have a function detected by the electric conversion element 12.
[0148] Furthermore, a filter 51IR can be provided in the layer 63 of the pixel 10IR so as to have a region overlapping with the photoelectric conversion element 12 and the light emitting element 40. The filter 51IR has a function of transmitting infrared light and absorbing visible light, for example. Therefore, the pixel 10B can have a function of emitting infrared light and detecting the infrared light by the photoelectric conversion element 12. For example, it can have a function of transmitting infrared light and absorbing visible light. Thus, the pixel 10B can have a function of emitting infrared light and detecting the infrared light by the photoelectric conversion element 12. For example, it has a function of transmitting infrared light and absorbing visible light. Thus, the pixel 10B can have a function of emitting infrared light and detecting the infrared light by the photoelectric conversion element 12. For example, it has a function of transmitting infrared light and absorbing visible light. Thus, the pixel 10B can have a function of emitting infrared light and detecting the infrared light by the photoelectric conversion element 12.
[0149] The pixel 10R has a function of emitting red light and detecting the light, the pixel 10G has a function of emitting green light and detecting the light, the pixel 10B has a function of emitting blue light and detecting the light, and the pixel 10IR has a function of emitting infrared light and detecting the light. As a result, the semiconductor device according to one aspect of the present invention can display a color image and has a function of detecting visible light and infrared light. Note that the pixel 10R, the pixel 10G, and the pixel 10B may each have a function of emitting light of a color such as yellow, cyan, and magenta and detecting the light. The pixel 10R has a function of emitting red light and detecting the light, the pixel 10G has a function of emitting green light and detecting the light, the pixel 10B has a function of emitting blue light and detecting the light, and the pixel 10IR has a function of emitting infrared light and detecting the light. As a result, the semiconductor device according to one aspect of the present invention can display a color image and has a function of detecting visible light and infrared light. Note that the pixel 10R, the pixel 10G, and the pixel 10B may each have a function of emitting light of a color such as yellow, cyan, and magenta and detecting the light. The pixel 10R has a function of emitting red light and detecting the light, the pixel 10G has a function of emitting green light and detecting the light, the pixel 10B has a function of emitting blue light and detecting the light, and the pixel 10IR has a function of emitting infrared light and detecting the light. As a result, the semiconductor device according to one aspect of the present invention can display a color image and has a function of detecting visible light and infrared light. Note that the pixel 10R, the pixel 10G, and the pixel 10B may each have a function of emitting light of a color such as yellow, cyan, and magenta and detecting the light. The pixel 10R has a function of emitting red light and detecting the light, the pixel 10G has a function of emitting green light and detecting the light, the pixel 10B has a function of emitting blue light and detecting the light, and the pixel 10IR has a function of emitting infrared light and detecting the light. As a result, the semiconductor device according to one aspect of the present invention can display a color image and has a function of detecting visible light and infrared light. Note that the pixel 10R, the pixel 10G, and the pixel 10B may each have a function of emitting light of a color such as yellow, cyan, and magenta and detecting the light. Here, the pixel 10R, the pixel 10G, the pixel 10B, and the pixel 10IR can each be referred to as a sub-pixel. Also, it can be said that one pixel is constituted by the pixel 10R, the pixel 10G, the pixel 10B, and the pixel 10IR. In this specification and the like, the term "pixel" may indicate a "sub-pixel". For example, the pixel 10 can be said to be a sub-pixel. Here, the pixel 10R, the pixel 10G, the pixel 10B, and the pixel 10IR can each be referred to as a sub-pixel. Also, it can be said that one pixel is constituted by the pixel 10R, the pixel 10G, the pixel 10B, and the pixel 10IR. In this specification and the like, the term "pixel" may indicate a "sub-pixel". For example, the pixel 10 can be said to be a sub-pixel. Here, the pixel 10R, the pixel 10G, the pixel 10B, and the pixel 10IR can each be referred to as a sub-pixel. Also, it can be said that one pixel is constituted by the pixel 10R, the pixel 10G, the pixel 10B, and the pixel 10IR. In this specification and the like, the term "pixel" may indicate a "sub-pixel". For example, the pixel 10 can be said to be a sub-pixel.
[0150] Here, the pixel 10R, the pixel 10G, the pixel 10B, and the pixel 10IR can each be referred to as a sub-pixel. Also, it can be said that one pixel is constituted by the pixel 10R, the pixel 10G, the pixel 10B, and the pixel 10IR. In this specification and the like, the term "pixel" may indicate a "sub-pixel". For example, the pixel 10 can be said to be a sub-pixel. Here, the pixel 10R, the pixel 10G, the pixel 10B, and the pixel 10IR can each be referred to as a sub-pixel. Also, it can be said that one pixel is constituted by the pixel 10R, the pixel 10G, the pixel 10B, and the pixel 10IR. In this specification and the like, the term "pixel" may indicate a "sub-pixel". For example, the pixel 10 can be said to be a sub-pixel. Here, the pixel 10R, the pixel 10G, the pixel 10B, and the pixel 10IR can each be referred to as a sub-pixel. Also, it can be said that one pixel is constituted by the pixel 10R, the pixel 10G, the pixel 10B, and the pixel 10IR. In this specification and the like, the term "pixel" may indicate a "sub-pixel". For example, the pixel 10 can be said to be a sub-pixel. Here, the pixel 10R, the pixel 10G, the pixel 10B, and the pixel 10IR can each be referred to as a sub-pixel. Also, it can be said that one pixel is constituted by the pixel 10R, the pixel 10G, the pixel 10B, and the pixel 10IR. In this specification and the like, the term "pixel" may indicate a "sub-pixel". For example, the pixel 10 can be said to be a sub-pixel. Here, the pixel 10R, the pixel 10G, the pixel 10B, and the pixel 10IR can each be referred to as a sub-pixel. Also, it can be said that one pixel is constituted by the pixel 10R, the pixel 10G, the pixel 10B, and the pixel 10IR. In this specification and the like, the term "pixel" may indicate a "sub-pixel". For example, the pixel 10 can be said to be a sub-pixel.
[0151] A filter 53 is provided in the pixel 10R so as to have a region overlapping with the filter 51R. It is possible. Further, a filter 53 can be provided for the pixel 10G so as to have an area overlapping with the filter 51G. Further, a filter 53 can be provided for the pixel 10B so as to have an area overlapping with the filter 51B. The filter 53 has a function of transmitting visible light and absorbing infrared light. That is, the filter 53 can be said to be an infrared cut filter. By providing the filter 53 for the pixel 10R, the pixel 10G, and the pixel 10B, for example, even when all the light emitting elements 40 have a function of emitting infrared light, the photoelectric conversion element 12 included in the pixel 10R, the photoelectric conversion element 12 included in the pixel 10G, and the photoelectric conversion element 12 included in the pixel 10B are suppressed from detecting infrared light. Thereby, the detection accuracy by the photoelectric conversion element 12 can be improved, and the reliability of the semiconductor device according to one aspect of the present invention can be improved.
[0152] In FIG. 4A, a configuration in which the filter 53 is provided on the filter 51R, the filter 51G, and the filter 51B is shown. However, the filter 53 may be provided under the filter 51R, the filter 51G, and the filter 51B. On the layer 63, a microlens 54 can be provided so as to have an area overlapping with the photoelectric conversion element 12. Thereby, the light detection sensitivity by the photoelectric conversion element 12 can be improved.
[0153] Note that, in FIG. 4A, a configuration in which the filter 53 is provided on the filter 51R, the filter 51G, and the filter 51B is shown, but the filter 53 may be provided under the filter 51R, the filter 51G, and the filter 51B.
[0154] On the layer 63, a microlens 54 can be provided so as to have an area overlapping with the photoelectric conversion element 12. Thereby, the light detection sensitivity by the photoelectric conversion element 12 can be improved.
[0155] FIG. 4B is a diagram showing a configuration example of a semiconductor device according to one aspect of the present invention, and is a modified example of the configuration shown in FIG. 4A. In the semiconductor device having the configuration shown in FIG. 4B, the filter 5 is provided for the pixel 10G and the pixel 10B. 4A in that no resistor 3 is provided.
[0156] The filters 51G and 51B have a function of absorbing red light. In some cases, the pixel 10G may also absorb infrared light, which has a wavelength close to that of the color light. Even if the filter 53 having the function of absorbing infrared light is not provided in the pixel 10B, the filter 53 is provided in the pixel 10G. The photoelectric conversion element 12 provided in the pixel 10B detects infrared light. The semiconductor device of one embodiment of the present invention has the structure shown in FIG. As a result, the light emitted from the light emitting element 40 of the pixel 10G and the light emitted from the light emitting element 40 of the pixel 10B are Therefore, the light emitted from the light emitting element 40 can be prevented from being absorbed by the filter 53. Therefore, light emitted from the semiconductor device of one embodiment of the present invention can be made to have high luminance. The power consumption of the semiconductor device according to one embodiment of the present invention can be reduced. This makes it possible to improve the light detection sensitivity of the semiconductor device.
[0157] <An example of how to create pixels> 5A, 5B, 5C, 5D, 6A, 6B, 6C, 7A, and 7B are the same as those in FIG. 1A to 1C are diagrams illustrating an example of a method for manufacturing a pixel 10 having the configuration shown in FIG.
[0158] The thin films (insulating film, semiconductor film, conductive film, etc.) constituting the light-emitting device are formed by sputtering, Chemical Vapor Deposition (CVD) method, Air evaporation method, Pulsed Laser Deposition (PLD) on) method, Atomic Layer Deposition (ALD) method It can be formed using etc. As the CVD method, there are plasma enhanced chemical vapor deposition (PECVD D:Plasma Enhanced CVD) method, thermal CVD method, etc. Also, among the thermal CVD methods, there is metal organic chemical vapor deposition (MOCVD:Metal Organic CVD) method.
[0159] In addition, the thin films (insulating films, semiconductor films, conductive films, etc.) constituting the light emitting device can be formed by spin coating, dip coating, spray coating, droplet discharge method (inkjet, dispensing, etc.), printing method (screen printing, offset printing, etc.), and methods such as doctor knife, slit coater, roll coater, curtain coater, knife coater, etc.
[0160] When processing the thin films constituting the light emitting device, it can be processed using photolithography method, etc. Or, the thin film may be processed by nanoimprint method, sandblasting method, lift-off method, etc. Also, by a film forming method using a shielding mask such as a metal mask, island-shaped thin films may be directly formed.
[0161] Typically, there are the following two methods as the photolithography method. One is to form a resist mask on the processed thin film, process the thin film by etching, etc., and remove the resist mask. The other is a method of forming a photosensitive thin film and then performing exposure and development to process the thin film into a desired shape.
[0162] In the photolithography method, the light used for exposure is, for example, i-line (wavelength 365 nm), g -line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture of these lights can be used It is also possible. In addition, it is also possible to use ultraviolet rays, KrF laser light, ArF laser light, etc. It is also possible. Further, exposure may be performed by immersion lithography technology. Further, as the light used for exposure, extreme ultraviolet light (EUV: Extreme Ultra-violet) or X-rays may be used. It is also possible to use an electron beam instead of the light used for exposure. Using extreme ultraviolet light, X rays or an electron beam is preferable because extremely fine processing becomes possible. When exposure is performed by scanning a beam such as an electron beam, a photomask is unnecessary. .
[0163] For the etching of the thin film, a dry etching method, a wet etching method, a sandblasting method etc. can be used.
[0164] An example of a method for manufacturing the pixel 10 having the configuration shown in FIG. 3 will be described. First, a low-resistance region 13 is formed on the substrate 11 (FIG. 5A). Thereby, the photoelectric conversion element 12 can be manufactured. The low-resistance region 13 can be formed by adding impurities to the substrate 11. For example, by adding a pentavalent element such as phosphorus or arsenic, the low-resistance region 13 can be made into an n-type region, and by adding a trivalent element such as boron or aluminum, the low-resistance region 13 can be made into a p type region. When the substrate 11 is a p-type substrate, the low-resistance region 13 can be made into an n-type region, and when the substrate 11 is an n-type substrate, the low-resistance region 13 can be made into a p-type region.
[0165] As the method for adding the above impurities, an ion implantation method in which an ionized source gas is mass-separated and added, an ion doping method in which an ionized source gas is added without mass-separating, a plasma method, etc. can be used. Examples include my-mersion ion implantation.
[0166] Next, an opening is provided in the substrate 11. The opening does not need to penetrate all the way through the substrate 11. Thereafter, an insulating layer 87 is provided so as to cover the side surface of the opening, and the opening covered with the insulating layer 87 is filled with A conductive layer 14 is formed so as to cover the conductive layer 14 (FIG. 5B).
[0167] The substrate 11 may be an SOI substrate. In this case, the substrate is An opening is provided in the plate 11.
[0168] Next, an insulating layer 86 is formed on the insulating layer 87 and on the conductive layer 14, and an insulating layer 8 Then, the transistor 101 and the transistor 132 are formed on the insulating layer 80. The channel formation regions and source An insulating layer 85 and an insulating layer 84 are formed to cover the gate region and the drain region. An insulating layer 83 is formed on the insulating layer 84. The insulating layer 83 functions as an interlayer insulating film and is chemically Mechanical polishing (CMP) method The insulating layer 83 is not planarized. In addition, layers other than the insulating layer 83 may also be subjected to planarization processing by CMP or the like. This can be done.
[0169] Here, the transistor 101 and the transistor 132 can be manufactured in the same process. That is, a transistor having a function of controlling the operation of the photoelectric conversion element 12 and a light emitting element The transistor having the function of controlling the operation of the element 40 can be fabricated in the same process. Therefore, a transistor having a function of controlling the operation of the photoelectric conversion element 12 and a light emitting element The transistor having the function of controlling the operation of the element 40 and the transistor having the function of controlling the operation of the element 40 are fabricated in different processes. This simplifies the manufacturing process of the semiconductor device of one embodiment of the present invention. In this way, the semiconductor device of one embodiment of the present invention can be manufactured at low cost. Circuit elements other than transistors can also be fabricated in the same process as transistors.
[0170] After the transistor 101, the transistor 132, and the like are formed, the insulating layer 82 is formed. Then, openings are provided in the insulating layer 80 and the insulating layers 82 to 87, and the openings are filled with Specifically, the conductive layers 21 to 24 are formed on the source or forming a conductive layer 21 so as to be electrically connected to one of the drains and the low resistance region 13; The conductive layer 22 is electrically connected to the other of the source and drain of the transistor 101. In addition, one of the source and drain of the transistor 132 and the conductive layer 14 are formed. A conductive layer 23 is formed so as to be electrically connected to the source or drain of the transistor 132. A conductive layer 24 is formed so as to be electrically connected to the other of the electrodes.
[0171] After the conductive layers 21 to 24 are formed, a conductive layer 82 is formed on the conductive layers 21 to 24 and the insulating layer 82. An insulating layer 81 is formed (FIG. 5C). Then, the substrate 30 is bonded onto the insulating layer 81 (FIG. 5D). The insulating layer 81 and the substrate 30 can be bonded together, for example, by pressure bonding. Alternatively, By providing an adhesive layer between the insulating layer 81 and the substrate 30, the substrate 30 is bonded onto the insulating layer 81. The substrate 30 functions as a support substrate in the subsequent manufacturing steps. .
[0172] Next, polish the back surface of the substrate 11 and the insulating layer 87 to expose the conductive layer 14 (FIG. 6A). . For example, the substrate 11 can be polished by using a grinder. Also, after polishing the substrate 11 using a grinder, the substrate 11 and the insulating layer 87 can be polished by using the CMP method to expose the conductive layer 14. By using a grinder , the substrate 11 can be polished at high speed. Also, by using the CMP method , the polishing of the substrate 11 and the insulating layer 87 can be precisely performed, and the flatness of the substrate 11 can be improved . Note that the portion surrounded by the dotted line in FIG. 6A is the polished portion of the substrate 11 .
[0173] When the substrate 11 is a SOI substrate, the BOX layer, which is a layer having a material different from that of the low-resistance region 13, is polished to expose the conductive layer 14 . Thereby, the control of the polishing process can be easily performed .
[0174] Next, a conductive layer 31 is formed on the substrate 11 (FIG. 6B). Specifically, after forming a conductive film on the substrate 11, on the conductive layer 14, and on the insulating layer 87, patterning is performed by a photolithography method or the like . Then, the portion of the conductive film that contacts the conductive layer 14 is removed by an etching method or the like . Thus, the conductive layer 31 can be formed. Note that in FIG. 6B, the conductive layer 31 does not have a region in contact with the insulating layer 87, but it may have a region in contact with the insulating layer 87 .
[0175] Next, an insulating layer 32 is formed so as to cover the conductive layer 31 (FIG. 6C). Specifically, the conductive layer 3 1. Form an insulating film on the upper surface, on the substrate 11, on the conductive layer 14, and on the insulating layer 87, and reach the conductive layer 14. By providing an opening reaching the conductive layer 14 in the insulating film, the insulating layer 32 can be formed. Note that , in Fig. 6C, the insulating layer 32 has a region in contact with the insulating layer 87, but it does not necessarily have a region in contact with the insulating layer 87. Also, in Fig. 6C, the insulating layer 32 does not have a region in contact with the conductive layer 14, but it may have a region in contact with the conductive layer 14.
[0176] Next, form a conductive layer 41 so as to be electrically connected to the conductive layer 14. Then, form an EL layer 42 so as to have a region overlapping with the conductive layer 41, and form a conductive layer 43 so as to have a region overlapping with the conductive layer 41 and the EL layer 42 (Fig. 7A). Thus, the light-emitting element 40 can be manufactured. Here, the EL layer 42 can be formed by a method such as a vapor deposition method, a coating method, a printing method, a dispensing method.
[0177] Next, form a filter 51 on the substrate 50 (Fig. 7B). Here, in addition to the filter 51, a filter 53 having a function as an infrared light cut filter may be formed. Note that the filter 51 and the filter 53 can be formed by a method such as a vapor deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, an inkjet method, a coating method.
[0178] Then, use the sealing layer 52 to seal the substrate 50 and the substrate 11. The above is an example of a method for manufacturing the pixel 10 having the configuration shown in Fig. 3.
[0179] By manufacturing the pixel 10 by the method shown in Figs. 5 to 7, on the layer 61 which is a layer in which a transistor and wirings electrically connected to the transistor are formed, a photoelectric The conversion element 12 and the light-emitting element 40 can be formed. As a result, it is possible to suppress the light emitted by the light-emitting element 40 from being blocked by wiring or the like, so that the light emitted from the semiconductor device according to one aspect of the present invention can be made highly bright, and the power consumption of the semiconductor device according to one aspect of the present invention can be reduced. Further, since it is possible to suppress the light incident on the semiconductor device from being blocked by wiring or the like, the light detection sensitivity in the semiconductor device according to one aspect of the present invention can be enhanced. The light emitted can be suppressed from being blocked by wiring or the like, so that the light emitted from the semiconductor device according to one aspect of the present invention can be made highly bright, and the power consumption of the semiconductor device according to one aspect of the present invention can be reduced. The light emitted from the semiconductor device according to one aspect of the present invention can be made highly bright, and the power consumption of the semiconductor device according to one aspect of the present invention can be reduced. The light incident on the semiconductor device can be suppressed from being blocked by wiring or the like, so that the light detection sensitivity in the semiconductor device according to one aspect of the present invention can be enhanced. The light incident on the semiconductor device can be suppressed from being blocked by wiring or the like, so that the light detection sensitivity in the semiconductor device according to one aspect of the present invention can be enhanced. The light detection sensitivity in the semiconductor device according to one aspect of the present invention can be enhanced.
[0180] <Configuration Example of Light-Emitting Element> Figs. 8A to 8C are diagrams showing a configuration example of the light-emitting element 40. Fig. 8A shows a structure (single structure) in which an EL layer 42 is sandwiched between a conductive layer 41 and a conductive layer 43. As described above, the EL layer 42 contains a light-emitting material, for example, a light-emitting material that is an organic compound. The EL layer 42 contains a light-emitting material, for example, a light-emitting material that is an organic compound. The EL layer 42 contains a light-emitting material, for example, a light-emitting material that is an organic compound.
[0181] Fig. 8B is a diagram showing a laminated structure of the EL layer 42. Here, in the light-emitting element 40 having the structure shown in Fig. 8B, the conductive layer 41 functions as an anode, and the conductive layer 43 functions as a cathode. In the light-emitting element 40 having the structure shown in Fig. 8B, the conductive layer 41 functions as an anode, and the conductive layer 43 functions as a cathode. The EL layer 42 has a structure in which a hole injection layer 71, a hole transport layer 72, a light-emitting layer 73, an electron transport layer 74, and an electron injection layer 75 are sequentially laminated on the conductive layer 41. When the conductive layer 41 functions as a cathode and the conductive layer 43 functions as an anode, the lamination order is reversed.
[0182] The EL layer 42 has a structure in which a hole injection layer 71, a hole transport layer 72, a light-emitting layer 73, an electron transport layer 74, and an electron injection layer 75 are sequentially laminated on the conductive layer 41. When the conductive layer 41 functions as a cathode and the conductive layer 43 functions as an anode, the lamination order is reversed. The EL layer 42 has a structure in which a hole injection layer 71, a hole transport layer 72, a light-emitting layer 73, an electron transport layer 74, and an electron injection layer 75 are sequentially laminated on the conductive layer 41. When the conductive layer 41 functions as a cathode and the conductive layer 43 functions as an anode, the lamination order is reversed. The EL layer 42 has a structure in which a hole injection layer 71, a hole transport layer 72, a light-emitting layer 73, an electron transport layer 74, and an electron injection layer 75 are sequentially laminated on the conductive layer 41. When the conductive layer 41 functions as a cathode and the conductive layer 43 functions as an anode, the lamination order is reversed. The lamination order is reversed.
[0183] The light-emitting layer 73 appropriately combines a light-emitting material and a plurality of materials, and can be configured to obtain fluorescence emission or phosphorescence emission that exhibits a desired emission color. Also, the light-emitting layer 73 can be made to emit light of a desired emission color. The light-emitting layer 73 appropriately combines a light-emitting material and a plurality of materials, and can be configured to obtain fluorescence emission or phosphorescence emission that exhibits a desired emission color. Also, the light-emitting layer 73 can be made to emit light of a desired emission color. It may also have a different laminated structure. In this case, different materials may be used for each of the laminated light-emitting layers and other substances.
[0184] In the light-emitting element 40, for example, the conductive layer 41 shown in FIG. 8B is used as a reflective electrode, and the conductive layer 43 is used as a semi-transmissive / semi-reflective electrode to form a microcavity structure, so that the light emitted from the light-emitting layer 73 included in the EL layer 42 resonates between both electrodes, and the light transmitted through the conductive layer 43 can be enhanced.
[0185] When the conductive layer 41 of the light-emitting element 40 is a reflective electrode having a laminated structure of a conductive material having reflectivity and a conductive material having translucency (transparent conductive film), optical adjustment can be performed by controlling the film thickness of the transparent conductive film. Specifically, the electrode distance between the conductive layer 41 and the conductive layer 43 is preferably adjusted to be in the vicinity of mλ / 2 (where m is a natural number) with respect to the wavelength λ of the light obtained from the light-emitting layer 73.
[0186] In order to amplify the desired light (wavelength: λ) obtained from the light-emitting layer 73, the optical distance from the conductive layer 41 to the region (light-emitting region) where the desired light of the light-emitting layer can be obtained, and the optical distance from the conductive layer 43 to the region (light-emitting region) where the desired light of the light-emitting layer 73 can be obtained are each preferably adjusted to be in the vicinity of (2m'+ 1)λ / 4 (where m' is a natural number). Here, the light-emitting region refers to the recombination region of holes and electrons in the light-emitting layer 73. .
[0187] By performing such optical adjustment, the spectrum of the specific monochromatic light obtained from the light-emitting layer 73 can be narrowed, and light emission with good color purity can be obtained.
[0188] However, in the above case, the optical distance between the conductive layer 41 and the conductive layer 43 can be strictly said to be the total thickness from the reflection region in the conductive layer 41 to the reflection region in the conductive layer 43. However, since it is difficult to accurately determine the reflection regions in the conductive layer 41 and the conductive layer 43, it is assumed that any positions of the conductive layer 41 and the conductive layer 43 are reflection regions, and the above-described effects can be sufficiently obtained. Also, the optical distance between the conductive layer 41 and the light-emitting layer from which desired light is obtained can be strictly said to be the optical distance between the reflection region in the conductive layer 41 and the light-emitting region in the light-emitting layer from which desired light is obtained. However, since it is difficult to accurately determine the reflection region in the conductive layer 41 and the light-emitting region in the light-emitting layer from which desired light is obtained, it is assumed that any position of the conductive layer 41 is the reflection region and any position of the light-emitting layer from which desired light is obtained is the light-emitting region, and the above-described effects can be sufficiently obtained. However, since it is difficult to accurately determine the reflection regions in the conductive layer 41 and the conductive layer 43, it is assumed that any positions of the conductive layer 41 and the conductive layer 43 are reflection regions, and the above-described effects can be sufficiently obtained. Also, the optical distance between the conductive layer 41 and the light-emitting layer from which desired light is obtained can be strictly said to be the optical distance between the reflection region in the conductive layer 41 and the light-emitting region in the light-emitting layer from which desired light is obtained. However, since it is difficult to accurately determine the reflection region in the conductive layer 41 and the light-emitting region in the light-emitting layer from which desired light is obtained, it is assumed that any position of the conductive layer 41 is the reflection region and any position of the light-emitting layer from which desired light is obtained is the light-emitting region, and the above-described effects can be sufficiently obtained. However, since it is difficult to accurately determine the reflection regions in the conductive layer 41 and the conductive layer 43, it is assumed that any positions of the conductive layer 41 and the conductive layer 43 are reflection regions, and the above-described effects can be sufficiently obtained. Also, the optical distance between the conductive layer 41 and the light-emitting layer from which desired light is obtained can be strictly said to be the optical distance between the reflection region in the conductive layer 41 and the light-emitting region in the light-emitting layer from which desired light is obtained. However, since it is difficult to accurately determine the reflection region in the conductive layer 41 and the light-emitting region in the light-emitting layer from which desired light is obtained, it is assumed that any position of the conductive layer 41 is the reflection region and any position of the light-emitting layer from which desired light is obtained is the light-emitting region, and the above-described effects can be sufficiently obtained. However, since it is difficult to accurately determine the reflection regions in the conductive layer 41 and the conductive layer 43, it is assumed that any positions of the conductive layer 41 and the conductive layer 43 are reflection regions, and the above-described effects can be sufficiently obtained. Also, the optical distance between the conductive layer 41 and the light-emitting layer from which desired light is obtained can be strictly said to be the optical distance between the reflection region in the conductive layer 41 and the light-emitting region in the light-emitting layer from which desired light is obtained. However, since it is difficult to accurately determine the reflection region in the conductive layer 41 and the light-emitting region in the light-emitting layer from which desired light is obtained, it is assumed that any position of the conductive layer 41 is the reflection region and any position of the light-emitting layer from which desired light is obtained is the light-emitting region, and the above-described effects can be sufficiently obtained. However, since it is difficult to accurately determine the reflection regions in the conductive layer 41 and the conductive layer 43, it is assumed that any positions of the conductive layer 41 and the conductive layer 43 are reflection regions, and the above-described effects can be sufficiently obtained. Also, the optical distance between the conductive layer 41 and the light-emitting layer from which desired light is obtained can be strictly said to be the optical distance between the reflection region in the conductive layer 41 and the light-emitting region in the light-emitting layer from which desired light is obtained. However, since it is difficult to accurately determine the reflection region in the conductive layer 41 and the light-emitting region in the light-emitting layer from which desired light is obtained, it is assumed that any position of the conductive layer 41 is the reflection region and any position of the light-emitting layer from which desired light is obtained is the light-emitting region, and the above-described effects can be sufficiently obtained. However, since it is difficult to accurately determine the reflection regions in the conductive layer 41 and the conductive layer 43, it is assumed that any positions of the conductive layer 41 and the conductive layer 43 are reflection regions, and the above-described effects can be sufficiently obtained. Also, the optical distance between the conductive layer 41 and the light-emitting layer from which desired light is obtained can be strictly said to be the optical distance between the reflection region in the conductive layer 41 and the light-emitting region in the light-emitting layer from which desired light is obtained. However, since it is difficult to accurately determine the reflection region in the conductive layer 41 and the light-emitting region in the light-emitting layer from which desired light is obtained, it is assumed that any position of the conductive layer 41 is the reflection region and any position of the light-emitting layer from which desired light is obtained is the light-emitting region, and the above-described effects can be sufficiently obtained. However, since it is difficult to accurately determine the reflection regions in the conductive layer 41 and the conductive layer 43, it is assumed that any positions of the conductive layer 41 and the conductive layer 43 are reflection regions, and the above-described effects can be sufficiently obtained. Also, the optical distance between the conductive layer 41 and the light-emitting layer from which desired light is obtained can be strictly said to be the optical distance between the reflection region in the conductive layer 41 and the light-emitting region in the light-emitting layer from which desired light is obtained. However, since it is difficult to accurately determine the reflection region in the conductive layer 41 and the light-emitting region in the light-emitting layer from which desired light is obtained, it is assumed that any position of the conductive layer 41 is the reflection region and any position of the light-emitting layer from which desired light is obtained is the light-emitting region, and the above-described effects can be sufficiently obtained. However, since it is difficult to accurately determine the reflection regions in the conductive layer 41 and the conductive layer 43, it is assumed that any positions of the conductive layer 41 and the conductive layer 43 are reflection regions, and the above-described effects can be sufficiently obtained. Also, the optical distance between the conductive layer 41 and the light-emitting layer from which desired light is obtained can be strictly said to be the optical distance between the reflection region in the conductive layer 41 and the light-emitting region in the light-emitting layer from which desired light is obtained. However, since it is difficult to accurately determine the reflection region in the conductive layer 41 and the light-emitting region in the light-emitting layer from which desired light is obtained, it is assumed that any position of the conductive layer 41 is the reflection region and any position of the light-emitting layer from which desired light is obtained is the light-emitting region, and the above-described effects can be sufficiently obtained. However, since it is difficult to accurately determine the reflection regions in the conductive layer 41 and the conductive layer 43, it is assumed that any positions of the conductive layer 41 and the conductive layer 43 are reflection regions, and the above-described effects can be sufficiently obtained. Also, the optical distance between the conductive layer 41 and the light-emitting layer from which desired light is obtained can be strictly said to be the optical distance between the reflection region in the conductive layer 41 and the light-emitting region in the light-emitting layer from which desired light is obtained. However, since it is difficult to accurately determine the reflection region in the conductive layer 41 and the light-emitting region in the light-emitting layer from which desired light is obtained, it is assumed that any position of the conductive layer 41 is the reflection region and any position of the light-emitting layer from which desired light is obtained is the light-emitting region, and the above-described effects can be sufficiently obtained. However, since it is difficult to accurately determine the reflection regions in the conductive layer 41 and the conductive layer 43, it is assumed that any positions of the conductive layer 41 and the conductive layer 43 are reflection regions, and the above-described effects can be sufficiently obtained. Also, the optical distance between the conductive layer 41 and the light-emitting layer from which desired light is obtained can be strictly said to be the optical distance between the reflection region in the conductive layer 41 and the light-emitting region in the light-emitting layer from which desired light is obtained. However, since it is difficult to accurately determine the reflection region in the conductive layer 41 and the light-emitting region in the light-emitting layer from which desired light is obtained, it is assumed that any position of the conductive layer 41 is the reflection region and any position of the light-emitting layer from which desired light is obtained is the light-emitting region, and the above-described effects can be sufficiently obtained.
[0189] Since the light-emitting element 40 shown in FIG. 8B has a microcavity structure, it is possible to extract light (monochromatic light) of different wavelengths even if it has the same EL layer. Therefore, painting for obtaining different emission colors becomes unnecessary. Therefore, it is easy to achieve high definition. Also, combination with a coloring layer is possible. Furthermore, since it is possible to enhance the emission intensity in the front direction of a specific wavelength, power consumption can be reduced. Since the light-emitting element 40 shown in FIG. 8B has a microcavity structure, it is possible to extract light (monochromatic light) of different wavelengths even if it has the same EL layer. Therefore, painting for obtaining different emission colors becomes unnecessary. Therefore, it is easy to achieve high definition. Also, combination with a coloring layer is possible. Furthermore, since it is possible to enhance the emission intensity in the front direction of a specific wavelength, power consumption can be reduced. Since the light-emitting element 40 shown in FIG. 8B has a microcavity structure, it is possible to extract light (monochromatic light) of different wavelengths even if it has the same EL layer. Therefore, painting for obtaining different emission colors becomes unnecessary. Therefore, it is easy to achieve high definition. Also, combination with a coloring layer is possible. Furthermore, since it is possible to enhance the emission intensity in the front direction of a specific wavelength, power consumption can be reduced. Since the light-emitting element 40 shown in FIG. 8B has a microcavity structure, it is possible to extract light (monochromatic light) of different wavelengths even if it has the same EL layer. Therefore, painting for obtaining different emission colors becomes unnecessary. Therefore, it is easy to achieve high definition. Also, combination with a coloring layer is possible. Furthermore, since it is possible to enhance the emission intensity in the front direction of a specific wavelength, power consumption can be reduced. Since the light-emitting element 40 shown in FIG. 8B has a microcavity structure, it is possible to extract light (monochromatic light) of different wavelengths even if it has the same EL layer. Therefore, painting for obtaining different emission colors becomes unnecessary. Therefore, it is easy to achieve high definition. Also, combination with a coloring layer is possible. Furthermore, since it is possible to enhance the emission intensity in the front direction of a specific wavelength, power consumption can be reduced.
[0190] Note that the light-emitting element 40 shown in FIG. 8B does not necessarily have a microcavity structure. In this case, the light-emitting layer 73 has a structure that emits white light and infrared light, and by providing a coloring layer, , light of a specified color can be extracted. Also, when forming the EL layer 42, if painting is performed to obtain different emission colors, light of a specified color can be extracted without providing a coloring layer. When forming the EL layer 42, if painting is performed to obtain different emission colors, light of a specified color can be extracted without providing a coloring layer. able.
[0191] At least one of the conductive layer 41 and the conductive layer 43 can be an electrode having translucency (transparent electrode, semi-transmissive / semi-reflective electrode, etc.). When the electrode having translucency is a transparent electrode, the transmittance of visible light of the transparent electrode is 40% or more. Also, in the case of a semi-transmissive / semi-reflective electrode, the reflectance of visible light of the semi-transmissive / semi-reflective electrode is 20% or more and 80% or less, preferably 40% or more and 70% or less. Also, the resistivity of these electrodes is preferably 1×10 Ωcm or less. When the electrode having translucency is a transparent electrode, the transmittance of visible light of the transparent electrode is 40% or more. Also, in the case of a semi-transmissive / semi-reflective electrode, the reflectance of visible light of the semi-transmissive / semi-reflective electrode is 20% or more and 80% or less, preferably 40% or more and 70% or less. Also, the resistivity of these electrodes is preferably 1×10 Ωcm or less. Ωcm or less. -2 Ωcm or less.
[0192] When the conductive layer 41 or the conductive layer 43 is an electrode having reflectivity (reflective electrode), the reflectance of visible light of the electrode having reflectivity is 40% or more and 100% or less, preferably 70% or more and 100% % or less. Also, the resistivity of this electrode is preferably 1×10 Ωcm or less. -2 Ωcm or less.
[0193] The configuration of the light-emitting element 40 may be the configuration shown in Fig. 8C. Fig. 8C shows the configuration (tandem configuration) of the light-emitting element 40 in which three EL layers (EL layer 42a, EL layer 42b, and EL layer 42c) are provided between the conductive layer 41 and the conductive layer 43. Here, a charge generation layer 44a is provided between the EL layer 42a and the EL layer 42 b, and a charge generation layer 44b is provided between the EL layer 42b and the EL layer 42c. c. Here, for example, the EL layer 42a has a function of emitting blue light, the EL layer 42b has a function of emitting yellow light, and the EL layer 42c has a function of emitting infrared light. Since the complementary color of blue is yellow, able.
[0194] Here, for example, the EL layer 42a has a function of emitting blue light, the EL layer 42b has a function of emitting yellow light, and the EL layer 42c has a function of emitting infrared light. Since the complementary color of blue is yellow, is. In this case, the light-emitting element 40 having the configuration shown in FIG. 8C can have the function of emitting white light and infrared light. It is possible.
[0195] By forming the light-emitting element 40 in a tandem structure, the current efficiency and external quantum efficiency of the light-emitting element 40 can be increased. Therefore, the light emitted by the light-emitting element 40 can be made highly bright. In addition, the power consumption of the semiconductor device according to one aspect of the present invention can be reduced. Here, the EL layer 42a, the EL layer 42b, and the EL layer 42c can have the same configuration as the EL layer 42 shown in FIG. 8B. It is possible. The charge generation layer 44a has a function of injecting electrons into one of the EL layer 42a and the EL layer 42b and injecting holes into the other when a voltage is applied between the conductive layer 41 and the conductive layer 43. Further, the charge generation layer 44b has a function of injecting electrons into one of the EL layer 42b and the EL layer 42c and injecting holes into the other when a voltage is applied between the conductive layer 41 and the conductive layer 43. From the above, when a voltage is applied so that the potential of the conductive layer 41 is higher than the potential of the conductive layer 43, electrons are injected from the charge generation layer 44a into the EL layer 42a, and holes are injected from the charge generation layer 44a into the EL layer 42b. Further, electrons are injected from the charge generation layer 44b into the EL layer 42b, and holes are injected from the charge generation layer 44b into the EL layer 42c. It is possible.
[0196] The charge generation layer 44a has a function of injecting electrons into one of the EL layer 42a and the EL layer 42b and injecting holes into the other when a voltage is applied between the conductive layer 41 and the conductive layer 43. Further, the charge generation layer 44b has a function of injecting electrons into one of the EL layer 42b and the EL layer 42c and injecting holes into the other when a voltage is applied between the conductive layer 41 and the conductive layer 43. From the above, when a voltage is applied so that the potential of the conductive layer 41 is higher than the potential of the conductive layer 43, electrons are injected from the charge generation layer 44a into the EL layer 42a, and holes are injected from the charge generation layer 44a into the EL layer 42b. Further, electrons are injected from the charge generation layer 44b into the EL layer 42b, and holes are injected from the charge generation layer 44b into the EL layer 42c. It is possible. The charge generation layer 44a has a function of injecting electrons into one of the EL layer 42a and the EL layer 42b and injecting holes into the other when a voltage is applied between the conductive layer 41 and the conductive layer 43. Further, the charge generation layer 44b has a function of injecting electrons into one of the EL layer 42b and the EL layer 42c and injecting holes into the other when a voltage is applied between the conductive layer 41 and the conductive layer 43. From the above, when a voltage is applied so that the potential of the conductive layer 41 is higher than the potential of the conductive layer 43, electrons are injected from the charge generation layer 44a into the EL layer 42a, and holes are injected from the charge generation layer 44a into the EL layer 42b. Further, electrons are injected from the charge generation layer 44b into the EL layer 42b, and holes are injected from the charge generation layer 44b into the EL layer 42c. The charge generation layer 44a has a function of injecting electrons into one of the EL layer 42a and the EL layer 42b and injecting holes into the other when a voltage is applied between the conductive layer 41 and the conductive layer 43. Further, the charge generation layer 44b has a function of injecting electrons into one of the EL layer 42b and the EL layer 42c and injecting holes into the other when a voltage is applied between the conductive layer 41 and the conductive layer 43. From the above, when a voltage is applied so that the potential of the conductive layer 41 is higher than the potential of the conductive layer 43, electrons are injected from the charge generation layer 44a into the EL layer 42a, and holes are injected from the charge generation layer 44a into the EL layer 42b. Further, electrons are injected from the charge generation layer 44b into the EL layer 42b, and holes are injected from the charge generation layer 44b into the EL layer 42c. The charge generation layer 44a has a function of injecting electrons into one of the EL layer 42a and the EL layer 42b and injecting holes into the other when a voltage is applied between the conductive layer 41 and the conductive layer 43. Further, the charge generation layer 44b has a function of injecting electrons into one of the EL layer 42b and the EL layer 42c and injecting holes into the other when a voltage is applied between the conductive layer 41 and the conductive layer 43. From the above, when a voltage is applied so that the potential of the conductive layer 41 is higher than the potential of the conductive layer 43, electrons are injected from the charge generation layer 44a into the EL layer 42a, and holes are injected from the charge generation layer 44a into the EL layer 42b. Further, electrons are injected from the charge generation layer 44b into the EL layer 42b, and holes are injected from the charge generation layer 44b into the EL layer 42c. The charge generation layer 44a has a function of injecting electrons into one of the EL layer 42a and the EL layer 42b and injecting holes into the other when a voltage is applied between the conductive layer 41 and the conductive layer 43. Further, the charge generation layer 44b has a function of injecting electrons into one of the EL layer 42b and the EL layer 42c and injecting holes into the other when a voltage is applied between the conductive layer 41 and the conductive layer 43. From the above, when a voltage is applied so that the potential of the conductive layer 41 is higher than the potential of the conductive layer 43, electrons are injected from the charge generation layer 44a into the EL layer 42a, and holes are injected from the charge generation layer 44a into the EL layer 42b. Further, electrons are injected from the charge generation layer 44b into the EL layer 42b, and holes are injected from the charge generation layer 44b into the EL layer 42c. The charge generation layer 44a has a function of injecting electrons into one of the EL layer 42a and the EL layer 42b and injecting holes into the other when a voltage is applied between the conductive layer 41 and the conductive layer 43. Further, the charge generation layer 44b has a function of injecting electrons into one of the EL layer 42b and the EL layer 42c and injecting holes into the other when a voltage is applied between the conductive layer 41 and the conductive layer 43. From the above, when a voltage is applied so that the potential of the conductive layer 41 is higher than the potential of the conductive layer 43, electrons are injected from the charge generation layer 44a into the EL layer 42a, and holes are injected from the charge generation layer 44a into the EL layer 42b. Further, electrons are injected from the charge generation layer 44b into the EL layer 42b, and holes are injected from the charge generation layer 44b into the EL layer 42c. The charge generation layer 44a has a function of injecting electrons into one of the EL layer 42a and the EL layer 42b and injecting holes into the other when a voltage is applied between the conductive layer 41 and the conductive layer 43. Further, the charge generation layer 44b has a function of injecting electrons into one of the EL layer 42b and the EL layer 42c and injecting holes into the other when a voltage is applied between the conductive layer 41 and the conductive layer 43. From the above, when a voltage is applied so that the potential of the conductive layer 41 is higher than the potential of the conductive layer 43, electrons are injected from the charge generation layer 44a into the EL layer 42a, and holes are injected from the charge generation layer 44a into the EL layer 42b. Further, electrons are injected from the charge generation layer 44b into the EL layer 42b, and holes are injected from the charge generation layer 44b into the EL layer 42c. The charge generation layer 44a has a function of injecting electrons into one of the EL layer 42a and the EL layer 42b and injecting holes into the other when a voltage is applied between the conductive layer 41 and the conductive layer 43. Further, the charge generation layer 44b has a function of injecting electrons into one of the EL layer 42b and the EL layer 42c and injecting holes into the other when a voltage is applied between the conductive layer 41 and the conductive layer 43. From the above, when a voltage is applied so that the potential of the conductive layer 41 is higher than the potential of the conductive layer 43, electrons are injected from the charge generation layer 44a into the EL layer 42a, and holes are injected from the charge generation layer 44a into the EL layer 42b. Further, electrons are injected from the charge generation layer 44b into the EL layer 42b, and holes are injected from the charge generation layer 44b into the EL layer 42c.
[0197] Note that the charge generation layer 44 preferably transmits visible light (specifically, the transmittance of visible light of the charge generation layer 44 is 40% or more) from the viewpoint of light extraction efficiency. Further, the conductivity of the charge generation layer 44 may be lower than the conductivity of the conductive layer 41 or the conductivity of the conductive layer 43. It is possible. The charge generation layer 44 preferably transmits visible light (specifically, the transmittance of visible light of the charge generation layer 44 is 40% or more) from the viewpoint of light extraction efficiency. Further, the conductivity of the charge generation layer 44 may be lower than the conductivity of the conductive layer 41 or the conductivity of the conductive layer 43.
[0198] <Materials for light-emitting devices> Next, constituent materials that can be used for the light emitting element 40 will be described.
[0199] <<Conductive Layer 41 and Conductive Layer 43>> The conductive layer 41 and the conductive layer 43 may have any of the following functions as long as they function as an anode and a cathode. The following materials can be used in combination. For example, metals, alloys, and electrically conductive materials. Compounds and mixtures thereof can be appropriately used. Specifically, In-Sn oxide ITO, In-Si-Sn oxide (ITSO), In-Zn oxide In-W-Zn oxide and In-W-Zn oxide are also used. ), Chromium (Cr), Manganese (Mn), Iron (Fe), Cobalt (Co), Nickel (N i), copper (Cu), gallium (Ga), zinc (Zn), indium (In), tin (Sn ), Molybdenum (Mo), Tantalum (Ta), Tungsten (W), Palladium (Pd) , gold (Au), platinum (Pt), silver (Ag), yttrium (Y), neodymium (Nd), etc. Metals and alloys containing these in appropriate combinations can also be used. Elements in Groups 1 and 2 of the Periodic Table that do not contain Cs, Calcium (Ca), Strontium (Sr), Europium (Eu), Rare earth metals such as ytterbium (Yb) and alloys containing these in appropriate combinations, etc. Graphene and the like can be used.
[0200] <<Hole injection layer 71 and hole transport layer 72>> The hole injection layer 71 is configured to inject holes from the conductive layer 41 (the anode) or the charge generation layer 44 into the EL layer 42. It is a layer to be injected and contains a material with high hole injection properties. Here, the EL layer 42 is E L layer 42a, EL layer 42b, EL layer 42c, and EL layers 42(1) to EL layers 42(n) shall be included.
[0201] Examples of materials with high hole injection properties include transition metal oxides such as molybdenum oxide, vanadium oxide, ruthenium oxide, tungsten oxide, and manganese oxide. In addition, phthalocyanine-based compounds such as phthalocyanine (abbreviation: H2Pc) and copper phthalocyanine (abbreviation: CuPC), 4,4'-bis[N-(4-diphenylaminophenyl)-N-phenyl luminolamino]biphenyl (abbreviation: DPAB), N,N'-bis{4-[bis(3-methylp henyl)amino]phenyl}-N,N'-diphenyl-(1,1'-biphenyl)-4, 4'-diamine (abbreviation: DNTPD) and other aromatic amine compounds, or poly(3,4-ethyl enedioxythiophene) / poly(styrenesulfonic acid) (abbreviation: PEDOT / PSS) and other polymers can be used.
[0202]
[0203] Moreover, as a material with high hole injection properties, a composite material containing a hole transporting material and an acceptor material (electron accepting material) can also be used. In this case, electrons are drawn from the hole transporting material by the acceptor material, and holes are generated in the hole injection layer 71. The holes are then injected into the light emitting layer 73 through the hole transporting layer 72. Note that the hole injection layer 71 may be formed as a single layer made of a composite material containing a hole transporting material and an acceptor material (electron accepting material), or the hole transporting material and the acceptor material (electron accepting material) may be laminated in separate layers
[0203] The hole transport layer 72 is a layer that transports holes injected from the conductive layer 41 to the light-emitting layer 7 3 by the hole injection layer 71. The hole transport layer 72 is a layer containing a hole transport material. The hole transport material used for the hole transport layer 72 preferably has a HOMO level that is the same as or close to the HOMO level of the hole injection layer 71.
[0204] As the acceptor material used for the hole injection layer 71, metal oxides belonging to Groups 4 to 8 in the periodic table can be used. Specifically, molybdenum oxide, barium oxide, niobium oxide, tantalum oxide, chromium oxide, tungsten oxide, manganese oxide, rhenium oxide can be mentioned. Among them, molybdenum oxide is particularly preferable because it is stable even in the air, has low hygroscopicity, and is easy to handle. In addition, organic acceptors such as quinodimethane derivatives, chloranil derivatives, and hexaazatriphenylene derivatives can be used. Specifically, 7,7,8,8-tetracyano-2,3,5,6-tetrafluoroquinodimethane (abbreviation: F4-TCNQ), chloranil, 2,3,6,7,10,11-hexacyano-1, 4,5,8,9,12-hexaazatriphenylene (abbreviation: HAT-CN), etc. can be used.
[0205] As the hole transport material used for the hole injection layer 71 and the hole transport layer 72, a -6 cm 2 / Vs or higher hole mobility substance is preferable. As long as the substance has higher hole transportability than electrons, other substances can be used.
[0206] As the hole transport material, a π-electron excess type heteroaromatic compound (for example, a carbazole An indole derivative or an aromatic amine compound is preferred. Specific examples include 4,4'-bis [N-(1-naphthyl)-N-phenylamino]biphenyl (abbreviation: NPB or α-NP D), N,N'-bis(3-methylphenyl)-N,N'-diphenyl-[1,1'-bi phenyl]-4,4'-diamine (abbreviation: TPD), 4,4'-bis[N-(spiro-9 ,9'-bifluorene-2-yl)-N-phenylamino]biphenyl (abbreviation: BSPB ), 4-phenyl-4'-(9-phenylfluoren-9-yl)triphenylamine ( abbreviation: BPAFLP), 4-phenyl-3'-(9-phenylfluoren-9-yl)t riphenylamine (abbreviation: mBPAFLP), 4-phenyl-4'-(9-phenyl-9 H-carbazol-3-yl)triphenylamine (abbreviation: PCBA1BP), 3-[4 -(9-phenanthryl)-phenyl]-9-phenyl-9H-carbazole (abbreviation: P CPPn), N-(4-biphenyl)-N-(9,9-dimethyl-9H-fluorene-2 -yl)-9-phenyl-9H-carbazol-3-amine (abbreviation: PCBiF), N- (1,1'-biphenyl-4-yl)-N-[4-(9-phenyl-9H-carbazole -3-yl)phenyl]-9,9-dimethyl-9H-fluorene-2-amine (abbreviation: P CBBiF), 4,4'-diphenyl-4''-(9-phenyl-9H-carbazol- 3-yl)triphenylamine (abbreviation: PCBBi1BP), 4-(1-naphthyl)-4 ’-(9-phenyl-9H-carbazol-3-yl)triphenylamine (abbreviation: PC BANB), 4,4'-di(1-naphthyl)-4''-(9-phenyl-9H-carbaz ol-3-yl)triphenylamine (abbreviation: PCBNBB), 9,9-dimethyl-N- Phenyl-N-[4-(9-phenyl-9H-carbazol-3-yl)phenyl]fluoren-2-amine (abbreviation: PCBAF), N-phenyl-N-[4-(9-phenyl- 9H-carbazol-3-yl)phenyl]spiro-9,9'-bifluoren-2-amine (abbreviation: PCBASF), 4,4',4''-tris(carbazol-9-yl)tri phenylamine (abbreviation: TCTA), 4,4',4''-tris(N,N-diphenylamino)triphenylamine (abbreviation: TDATA), 4,4',4''-tris[N-(3 -methylphenyl)-N-phenylamino]triphenylamine (abbreviation: MTDATA) and other compounds having an aromatic amine skeleton, 1,3-bis(N-carbazolyl)benzene (abbreviation: mCP), 4,4'-di(N-carbazolyl)biphenyl (abbreviation: CBP), 3,6 -bis(3,5-diphenylphenyl)-9-phenylcarbazole (abbreviation: CzTP) , 3,3'-bis(9-phenyl-9H-carbazole) (abbreviation: PCCP), 3-[N -(9-phenylcarbazol-3-yl)-N-phenylamino]-9-phenylcarbazole (abbreviation: PCzPCA1), 3,6-bis[N-(9-phenylcarbazol- 3-yl)-N-phenylamino]-9-phenylcarbazole (abbreviation: PCzPCA2 ), 3-[N-(1-naphthyl)-N-(9-phenylcarbazol-3-yl)amino -9-phenylcarbazole (abbreviation: PCzPCN1), 1,3,5-tris[4-( N-carbazolyl)phenyl]benzene (abbreviation: TCPB), 9-[4-(10-phenyl -9-anthracenyl)phenyl]-9H-carbazole (abbreviation: CzPA), etc. of carb Compounds having a bazole skeleton, 4,4',4''-(benzene-1,3,5-triyl) Tris(dibenzothiophene) (abbreviation: DBT3P-II), 2,8-diphenyl-4- 4-(9-phenyl-9H-fluoren-9-yl)phenyl]dibenzothiophene (abbreviation : DBTFLP-III), 4-[4-(9-phenyl-9H-fluoren-9-yl )phenyl]-6-phenyldibenzothiophene (abbreviation: DBTFLP-IV), etc., compounds having a thieno phene skeleton, 4,4',4''-(benzene-1,3,5-triyl)tri (dibenzofuran) (abbreviation: DBF3P-II), 4-{3-[3-(9-phenyl- 9H-fluoren-9-yl)phenyl]phenyl}dibenzofuran (abbreviation: mmDBF FLBi-II), etc., compounds having a furan skeleton can be mentioned.
[0207] Furthermore, it is also possible to use polymer compounds such as poly(N-vinylcarbazole) (abbreviation: PVK), poly(4-vinyltriphenyl amine) (abbreviation: PVTPA), poly[N-(4-{N'-[4-(4-diphenyl amino)phenyl]phenyl-N'-phenylamino}phenyl)methacrylamide]( abbreviation: PTPDMA), poly[N,N'-bis(4-butylphenyl)-N,N'-bis (phenyl)benzidine] (abbreviation: Poly-TPD). can be.
[0208] However, the hole transporting material is not limited to the above, and various known materials can be used alone or in combination of one or more kinds to be used as a hole transporting material in the hole injection layer 71 and the hole transporting layer 72. Note that the hole transporting layer 72 may be formed of a plurality of layers. That is, for example the first hole transporting layer and the second hole transporting layer may be laminated.
[0209] <<Light-emitting layer 73>> The light-emitting layer 73 is a layer containing a light-emitting substance. As the light-emitting substance, substances exhibiting light-emitting colors such as blue, purple, blue-violet , green, yellow-green, yellow, orange, red, etc. can be appropriately used. Here, as shown in FIG. 8 C, when the light-emitting element 40 has a plurality of EL layers, by using different light-emitting substances for the light-emitting layers 73 provided in each EL layer, a configuration exhibiting different light-emitting colors can be achieved . Note that one light-emitting layer may have a laminated structure having different light-emitting substances .
[0210] In addition, the light-emitting layer 73 may have one or more kinds of organic compounds ( host material, assist material) in addition to the light-emitting substance (guest material). Also, as one or more kinds of organic compounds , one or both of a hole-transporting material and an electron-transporting material can be used
[0211] The light-emitting substance that can be used for the light-emitting layer 73 is not particularly limited, and a light-emitting substance that converts singlet excitation energy into light emission in the visible light region, or a light-emitting substance that converts triplet excitation energy into light emission in the visible light region can be used . Note that as the above light-emitting substance, for example, the following are exemplified .
[0212] As the light-emitting substance that converts singlet excitation energy into light emission, substances that emit fluorescence (fluorescent materials) are exemplified. For example, pyrene derivatives, anthracene derivatives, triphenylene derivatives, fluorene derivatives, carbazole derivatives, dibenzothiophene derivatives, dibenzofuran derivatives , dibenzoquinoxaline derivatives, quinoxaline derivatives, pyridine derivatives, pyrimidine derivatives , phenanthrene derivatives, naphthalene derivatives, etc. are exemplified. In particular, pyrene derivatives emit light It is preferable because of its high quantum yield. Specific examples of the pyrene derivative include N,N'-bis(3-methyl phenyl)-N,N'-bis[3-(9-phenyl-9H-fluoren-9-yl) phenyl]pyrene-1,6-diamine (abbreviation: 1,6mMemFLPAPrn), N,N '-diphenyl-N,N'-bis[4-(9-phenyl-9H-fluoren-9-yl) phenyl]pyrene-1,6-diamine (abbreviation: 1,6FLPAPrn), N,N'-bis (dibenzofuran-2-yl)-N,N'-diphenylpyrene-1,6-diamine (abbreviation : 1,6FrAPrn), N,N'-bis(dibenzothiophen-2-yl)-N,N' -diphenylpyrene-1,6-diamine (abbreviation: 1,6ThAPrn), N,N'-(py rene-1,6-diyl)bis[(N-phenylbenzo[b]naphtho[1,2-d]furan )-6-amine] (abbreviation: 1,6BnfAPrn), N,N'-(pyrene-1,6-di yl)bis[(N-phenylbenzo[b]naphtho[1,2-d]furan)-8-amine]( abbreviation: 1,6BnfAPrn-02), N,N'-(pyrene-1,6-diyl)bis (6,N-diphenylbenzo[b]naphtho[1,2-d]furan)-8-amine (abbreviation: 1,6BnfAPrn-03), etc. The pyrene derivative is a group of compounds useful for achieving the blue chromaticity in one aspect of the present invention. In addition, 5,6-bis[4-(10-phenyl-9-anthryl)phenyl]-2,
[0213] 2'-bipyridine (abbreviation: PAP2BPy), 5,6-bis[4'-(10-phenyl- 9-anthryl)biphenyl-4-yl]-2,2'-bipyridine (abbreviation: PAPP2B ), 5,6-bis[4'-(10-phenyl- Py), N,N'-bis[4-(9H-carbazol-9-yl)phenyl]-N,N' -diphenylstilbene-4,4'-diamine (abbreviation: YGA2S), 4-(9H-carb azol-9-yl)-4'-(10-phenyl-9-anthryl)triphenylamine (abbreviation: YGAPA), 4-(9H-carbazol-9-yl)-4'-(9,10-di phenyl-2-anthryl)triphenylamine (abbreviation: 2YGAPPA), N,9-di phenyl-N-[4-(10-phenyl-9-anthryl)phenyl]-9H-carbaz ol-3-amine (abbreviation: PCAPA), 4-(10-phenyl-9-anthryl)-4 '-(9-phenyl-9H-carbazol-3-yl)triphenylamine (abbreviation: PC BAPA), 4-[4-(10-phenyl-9-anthryl)phenyl]-4'-(9- phenyl-9H-carbazol-3-yl)triphenylamine (abbreviation: PCBAPBA ), perylene, 2,5,8,11-tetra(tert-butyl)perylene (abbreviation: TBP ), N,N''-(2-tert-butylanthracene-9,10-diyl-di-4,1- phenylene)bis[N,N',N'-triphenyl-1,4-phenylenediamine](abbre viation: DPABPA), N,9-diphenyl-N-[4-(9,10-diphenyl-2-a ntryl)phenyl]-9H-carbazol-3-amine (abbreviation: 2PCAPPA), N -[4-(9,10-diphenyl-2-anthryl)phenyl]-N,N',N'-tri phenyl-1,4-phenylenediamine (abbreviation: 2DPAPPA), etc. can be used .
[0214] In addition, as a luminescent substance that converts triplet excitation energy into luminescence, for example, a substance that emits phosphorescence Substances (phosphorescent materials) and thermally activated delayed fluorescence (TADF) materials that exhibit thermally activated delayed fluorescence are exemplified. (Thermally activated delayed fluorescence:TADF) materials are exemplified. Herein.
[0215] Examples of the phosphorescent materials include organometallic complexes, metal complexes (platinum complexes), rare earth metal complexes, and the like. Since these exhibit different emission colors (emission peaks) for each substance, they are appropriately selected and used as needed. Herein.
[0216] Examples of the phosphorescent materials that exhibit blue or green and have a peak wavelength of the emission spectrum in the range of 450 nm or more and 570 nm or less include the following substances. Herein.
[0217] For example, tris{2-[5-(2-methylphenyl)-4-(2,6-dimethylphenyl )-4H-1,2,4-triazol-3-yl-κN2]phenyl-κC}iridium (III) (abbreviation: [Ir(mpptz-dmp)3]), tris(5-methyl-3,4 -diphenyl-4H-1,2,4-triazolato)iridium(III) (abbreviation: [Ir (Mptz)3]), tris[4-(3-biphenyl)-5-isopropyl-3-phenyl yl-4H-1,2,4-triazolato]iridium(III) (abbreviation: [Ir(iPrp tz-3b)3]), tris[3-(5-biphenyl)-5-isopropyl-4-phenyl yl-4H-1,2,4-triazolato]iridium(III) (abbreviation: [Ir(iPr5 btz)3]), and other organometallic complexes having a 4H-triazole skeleton, tris[3- methyl-1-(2-methylphenyl)-5-phenyl-1H-1,2,4-triazolato iridium(III) (abbreviation: [Ir(Mptz1-mp)3]), tris(1-methyl Ruthenium(II) 5-phenyl-3-propyl-1H-1,2,4-triazolato I) (abbreviation: [Ir(Prptz1-Me)3]) having a 1H-triazole skeleton Organometallic complexes, fac-tris[1-(2,6-diisopropylphenyl)-2-f enyl-1H-imidazole]iridium(III) (abbreviation: [Ir(iPrpmi)3 )、tris[3-(2,6-dimethylphenyl)-7-methylimidazo[1,2-f] phenanthridinato]iridium(III) (abbreviation: [Ir(dmpimpt-Me)3 ) having an imidazole skeleton, bis[2-(4’,6’-diflu orophenyl)pyridinato-N,C 2’ iridium(III) tetrakis(1-pyrazo lyl)borate (abbreviation: FIr6), bis[2-(4’,6’-difluorophenyl)py ridinato-N,C 2’ iridium(III) picolinate (abbreviation: FIrpic), bi s[2-(3,5-bistrifluoromethyl-phenyl)-pyridinato-N,C 2’ i ridium(III) picolinate (abbreviation: [Ir(CF3ppy)2(pic)]), bi s[2-(4’,6’-difluorophenyl)pyridinato-N,C 2’ iridium(I II) acetylacetonate (abbreviation: FIr(acac)) having an electron-withdrawing group Organometallic complexes having a phenylpyridine derivative as a ligand, etc. are exemplified.
[0218] Exhibiting green or yellow, and having a peak wavelength of the emission spectrum of 495 nm or more and 590 nm or less Examples of the phosphorescent material include the following substances.
[0219] For example, tris(4-methyl-6-phenylpyrimidinato)iridium(III) (abbreviation : [Ir(mppm)3]), tris(4-t-butyl-6-phenylpyrimidinato)i ridium(III) (abbreviation: [Ir(tBuppm)3]), bis(acetylacetonato)bi s(6-methyl-4-phenylpyrimidinato)iridium(III) (abbreviation: [Ir(m ppm)2(acac)]), bis(acetylacetonato)bis(6-tert-butyl-4 -phenylpyrimidinato)iridium(III) (abbreviation: [Ir(tBuppm)2(a cac)]), bis(acetylacetonato)bis[6-(2-norbornyl)-4-phenyl pyrimidinato]iridium(III) (abbreviation: [Ir(nbppm)2(acac)]) , bis(acetylacetonato)bis[5-methyl-6-(2-methylphenyl)-4-pheny lpyramidinato]iridium(III) (abbreviation: [Ir(mpmppm)2(acac) ), bis(acetylacetonato)bis{4,6-dimethyl-2-[6-(2,6-dimethyl phenyl)-4-pyrimidinyl-κN3]phenyl-κC}iridium(III) (abbreviation : [Ir(dmppm-dmp)2(acac)]), bis(acetylacetonato)bis(4 ,6-diphenylpyrimidinato)iridium(III) (abbreviation: [Ir(dppm)2( acac)]) and other organometallic iridium complexes having a pyrimidine skeleton, bis(acetylacetona to)bis(3,5-dimethyl-2-phenylpyrazinato)iridium(III) ( abbreviation: [Ir(mppr-Me)2(acac)]), bis(acetylacetonato)bis(5 -isopropyl-3-methyl-2-phenylpyrazinato)iridium(III) (abbreviation: [Ir(mppr-iPr)2(acac)]) and other organometallic Iridium complex, tris(2-phenylpyridinato-N,C 2’ )iridium(III) (abbreviation: [Ir(ppy)3]), bis(2-phenylpyridinato-N,C 2’ )irid ium(III) acetylacetonate (abbreviation: [Ir(ppy)2(acac)]), bi s(benzo[h]quinolinato)iridium(III) acetylacetonate (abbreviation: [I r(bzq)2(acac)]), tris(benzo[h]quinolinato)iridium(II I)(abbreviation: [Ir(bzq)3]), tris(2-phenylquinolinato-N,C 2’ ) iridium(III) (abbreviation: [Ir(pq)3]), bis(2-phenylquinolinato- N,C 2’ )iridium(III) acetylacetonate (abbreviation: [Ir(pq)2(a cac)]), such as organometallic iridium complexes having a pyridine skeleton, bis(2,4-di phenyl-1,3-oxazolato-N,C 2’ )iridium(III) acetylacet onate (abbreviation: [Ir(dpo)2(acac)]), bis{2-[4’-(perfluoro phenyl)phenyl]pyridinato-N,C 2’}iridium(III) acetylacet onate (abbreviation: [Ir(p-PF-ph)2(acac)]), bis(2-phenylbenzo thiazolato-N,C 2’ )iridium(III) acetylacetonate (abbreviation: [Ir( bt)2(acac)]), etc., in addition to organometallic complexes such as tris(acetylacetonato)(mono phenanthroline)terbium(III) (abbreviation: [Tb(acac)3(Phen)] ), rare earth metal complexes such as
[0220] Among the above, those having a pyridine skeleton (particularly a phenylpyridine skeleton) or a pyrimidine skeleton Organometallic iridium complexes are useful compounds for achieving green chromaticity in one embodiment of the present invention. It is a compound group.
[0221] It has a yellow or red color and the peak wavelength of the emission spectrum is 570 nm or more and 750 nm or less. Examples of phosphorescent materials that can be used include the following substances.
[0222] For example, (diisobutyrylmethanato)bis[4,6-bis(3-methylphenyl)pyrimidinium] dinato]iridium(III) (abbreviation: [Ir(5mdppm)2(dibm)]), S[4,6-bis(3-methylphenyl)pyrimidinato](dipivaloylmethanato)yl Ir(III) (abbreviation: [Ir(5mdppm)2(dpm)]), (dipivaloyl Thanato)bis[4,6-di(naphthalene-1-yl)pyrimidinato]iridium(III ) (abbreviation: [Ir(d1npm)2(dpm)]) Metal Complex, (acetylacetonato)bis(2,3,5-triphenylpyrazinate)iridide Ir(tppr)2(acac)], bis(2,3,5-trimethylammonium bromide) Triphenylpyrazinate)(dipivaloylmethanato)iridium(III) (abbreviation: [Ir (tppr)2(dpm)]), bis{4,6-dimethyl-2-[3-(3,5-dimethyl {5-phenyl-2-pyrazinyl-κN}phenyl-κC}(2,6-diphenyl Tyl-3,5-heptanedionate-κ 2 O,O') Iridium(III) (abbreviation: [Ir (dmdppr-P)2(dibm)]), bis{4,6-dimethyl-2-[5-(4- Ciano-2,6-dimethylphenyl)-3-(3,5-dimethylphenyl)-2-pyraz nyl-κN]phenyl-κC}(2,2,6,6-tetramethyl-3,5-heptanedio nato-κ 2 O,O’)iridium(III)(abbreviation:[Ir(dmdppr-dmCP) 2(dpm)]), (acetylacetonato)bis[2-methyl-3-phenylquinoxali nato-N,C 2’ iridium(III)(abbreviation:[Ir(mpq)2(acac)]) , (acetylacetonato)bis(2,3-diphenylquinoxalinato-N,C 2’ )ir dium(III)(abbreviation:[Ir(dpq)2(acac)]), (acetylacetonato )bis[2,3-bis(4-fluorophenyl)quinoxalinato]iridium(III) (abbreviation:[Ir(Fdpq)2(acac)]) and other organometallic complexes having a pyrazine skeleton, tris(1-phenylisoquinolinato-N,C 2’ )iridium(III)(abbre viation:[Ir(piq)3]), bis(1-phenylisoquinolinato-N,C 2’ )irid ium(III) acetylacetonate(abbreviation:[Ir(piq)2(acac)]) and the like organic metal complexes having a pyridine skeleton, 2,3,7,8,12,13,17,18-o ctaethyl-21H,23H-porphyrin platinum(II)(abbreviation:[PtOEP]) and the like such as platinum complexes, tris(1,3-diphenyl-1,3-propanedionato)(monophen antroline) europium(III)(abbreviation:[Eu(DBM)3(Phen)]), tris [1-(2-thenoyl)-3,3,3-trifluoroacetonato](monophenanthro line) europium(III)(abbreviation:[Eu(TTA)3(Phen)]) Examples include rare earth metal complexes.
[0223] Among those described above, the organometallic iridium complex having a pyrazine skeleton is a group of compounds useful for achieving the red chromaticity in one aspect of the present invention. In particular, an organometallic iridium complex having a cyano group, such as [Ir(dmdppr-dm CP)2(dpm)], is highly stable and preferable.
[0224] As the blue light-emitting substance, a substance having a photoluminescence peak wavelength of 430 nm or more and 4 70 nm or less, more preferably 430 nm or more and 460 nm or less may be used. Also, as the green light-emitting substance, a substance having a photoluminescence peak wavelength of 500 nm or more and 54 0 nm or less, more preferably 500 nm or more and 530 nm or less may be used. For the red light-emitting substance, a substance having a photoluminescence peak wavelength of 610 nm or more and 680 nm or more below, more preferably 620 nm or more and 680 nm or less may be used. Note that the photo luminescence measurement may be performed on either a solution or a thin film.
[0225] By using such a compound in combination with the microcavity effect, the above-described chromaticity can be more easily achieved. At this time, the film thickness of the semi-transmissive / semi-reflective electrode (metal thin film portion) required to obtain the microcavity effect is preferably 20 nm or more and 40 nm or less. More preferably it is greater than 25 nm and 40 nm or less. Note that if it exceeds 40 nm, the efficiency may decrease and there is a possibility of deterioration.
[0226] As the organic compound (host material, assist material) used for the light-emitting layer 73, a light-emitting substance (guest A substance having an energy gap larger than the energy gap of the hole transport material can be selected and used singly or in combination. Note that the hole transport material described above and the electron transport material described below can also be used as a host material or an assist material, respectively.
[0227] When the light-emitting substance is a fluorescent material, it is preferable to use an organic compound having a large energy level of the singlet excited state and a small energy level of the triplet excited state as the host material. For example, it is preferable to use an anthracene derivative or a tetracene derivative. Specifically, 9 -phenyl-3-[4-(10-phenyl-9-anthryl)phenyl]-9H-carbazole (abbreviation: PCzPA), 3-[4-(1-naphthyl)-phenyl]-9-phenyl -9H-carbazole (abbreviation: PCPN), 9-[4-(10-phenyl-9-anthra cenyl)phenyl]-9H-carbazole (abbreviation: CzPA), 7-[4-(10-phe nyl-9-anthryl)phenyl]-7H-dibenzo[c,g]carbazole (abbreviation: c gDBCzPA), 6-[3-(9,10-diphenyl-2-anthryl)phenyl]- benzo[b]naphtho[1,2-d]furan (abbreviation: 2mBnfPPA), 9-phenyl- 10-{4-(9-phenyl-9H-fluoren-9-yl)biphenyl-4'-yl} anthracene (abbreviation: FLPPA), 5,12-diphenyltetracene, 5,12-bis (biphenyl-2-yl)tetracene, etc. can be mentioned. (biphenyl-2-yl)tetracene, etc. can be mentioned.
[0228] When the light-emitting substance is a phosphorescent material, as the host material, an organic compound having a triplet excitation energy (energy difference between the ground state and the triplet excited state) larger than the triplet excitation energy of the light-emitting substance is used. An organic compound may be selected. In this case, in addition to zinc and aluminum-based metal complexes, oxadiazole derivatives, triazole derivatives, benzimidazole derivatives, quinoxaline derivatives, dibenzoquinoxaline derivatives, dibenzothiophene derivatives, dibenzofuran derivatives, pyrimidine derivatives, triazine derivatives, pyridine derivatives, bipyridine derivatives, phen anthroline derivatives, etc., and in addition, aromatic amines, carbazole derivatives, etc. can be used. 。
[0229] Specifically, tris(8-quinolinolato)aluminum(III) (abbreviation: Alq), tris (4-methyl-8-quinolinolato)aluminum(III) (abbreviation: Almq3), bis(10-hydroxybenzo[h]quinolinato)beryllium(II) (abbreviation: BeBq 2), bis(2-methyl-8-quinolinolato)(4-phenylphenolato)aluminum (III) (abbreviation: BAlq), bis(8-quinolinolato)zinc(II) (abbreviation: Znq ), bis[2-(2-benzoxazolyl)phenolato]zinc(II) (abbreviation: ZnPB O), bis[2-(2-benzothiazolyl)phenolato]zinc(II) (abbreviation: ZnBT Z), etc. metal complexes, 2-(4-biphenylyl)-5-(4-tert-butylphenyl) -1,3,4-oxadiazole (abbreviation: PBD), 1,3-bis[5-(p-tert -butylphenyl)-1,3,4-oxadiazol-2-yl]benzene (abbreviation: OX D-7), 3-(4-biphenylyl)-4-phenyl-5-(4-tert-butylphen nyl)-1,2,4-triazole (abbreviation: TAZ), 2,2’,2’’-(1,3,5 -benzenetriyl)-tris(1-phenyl-1H-benzimidazole) (abbreviation: T PBI), bathophenanthroline (abbreviation: BPhen), bathocuproine (abbreviation: BC P), 2,9-bis(naphthalen-2-yl)-4,7-diphenyl-1,10-phenanthro antroline (abbreviation: NBphen), 9-[4-(5-phenyl-1,3,4-oxadiaz ol-2-yl)phenyl]-9H-carbazole (abbreviation: CO11), etc. of heterocyclic compounds, aromatic amine compounds such as NPB, TPD, BSPB, etc.
[0230] In addition, condensed polycyclic aromatic compounds such as anthracene derivatives, phenanthrene derivatives, pyrene derivatives, chrysene derivatives, dibenzo[g,p]chrysene derivatives, etc. are mentioned. Specifically, 9 ,10-diphenylanthracene (abbreviation: DPAnth), N,N-diphenyl-9- 4-(10-phenyl-9-anthryl)phenyl]-9H-carbazole-3-amine (abbreviation: CzA1PA), 4-(10-phenyl-9-anthryl)triphenylamine (abbreviation: DPhPA), YGAPA, PCAPA, N,9-diphenyl-N-{4-[4 (10-phenyl-9-anthryl)phenyl]phenyl}-9H-carbazole-3 -amine (abbreviation: PCAPBA), 9,10-diphenyl-2-[N-phenyl-N-( 9-phenyl-9H-carbazole-3-yl)amino]anthracene (abbreviation: 2PCA PA), 6,12-dimethoxy-5,11-diphenylchrysene, N,N,N’,N’, N’’,N’’,N’’’,N’’’-octaphenyldibenz[g,p]chrysene-2 ,7,10,15-tetraamine (abbreviation: DBC1), 9-[4-(10-phenyl-9 -anthracenyl)phenyl]-9H-carbazole (abbreviation: CzPA), 3,6-dif Enil-9-[4-(10-phenyl-9-anthryl)phenyl]-9H-carbazole l (abbreviation: DPCzPA), 9,10-bis(3,5-diphenylphenyl)anthracene ne (abbreviation: DPPA), 9,10-di(2-naphthyl)anthracene (abbreviation: DNA), 2-tert-butyl-9,10-di(2-naphthyl)anthracene (abbreviation: t-BuD NA), 9,9’-bianthryl (abbreviation: BANT), 9,9’-(stilbene-3,3 ’-diyl)diphenanthrene (abbreviation: DPNS), 9,9’-(stilbene-4,4’ -diyl)diphenanthrene (abbreviation: DPNS2), 1,3,5-tri(1-pyrenyl) benzene (abbreviation: TPB3), etc. can be used.
[0231] Also, when using a plurality of organic compounds in the light-emitting layer 73, it is preferable to use a compound that forms an exciplex in combination with a light-emitting substance. In this case, various organic compounds can be appropriately combined and used However, in order to efficiently form an exciplex, a compound that easily accepts holes (hole-transporting material) and a compound that easily accepts electrons (electron-transporting material) are combined It is particularly preferable. Specific examples of the hole-transporting material and the electron-transporting material can be the materials shown in this embodiment.
[0232] A TADF material is a material in which triplet excited states can be upconverted (reverse intersystem crossing) to singlet excited states by a small amount of thermal energy, and light emission (fluorescence) from singlet excited states can be efficiently presented. Also, as conditions for efficiently obtaining thermally activated delayed fluorescence, the energy difference between the triplet excited level and the singlet excited level is 0 eV or more and 0.2 eV or less, preferably It may be 0.1 eV or less and more than 0 eV. Also, the delayed fluorescence in the TADF material refers to luminescence with a spectrum similar to that of normal fluorescence but with a significantly longer lifetime. That lifetime is -6 10 -3 seconds or more, preferably 10
[0233] Examples of the TADF material include fullerenes and their derivatives, acridine derivatives such as proflavine, and eosin. Also, metal-containing porphyrins containing magnesium (Mg), zinc (Zn), cadmium (Cd), tin (Sn), platinum (Pt), indium (In), or palladium (Pd), etc. are mentioned. Examples of the metal-containing porphyrin include protoporphyrin-tin fluoride complex (SnF2(Proto IX)), meso porphyrin-tin fluoride complex (SnF2(Meso IX)), hematoporphyrin- tin fluoride complex (SnF2(Hemato IX)), coproporphyrin tetramethyl ester-tin fluoride complex (SnF2(Copro III-4Me)), octaethyl porphyrin-tin fluoride complex (SnF2(OEP)), etioporphyrin-tin fluoride complex (SnF2(Etio I)), octaethylporphyrin-platinum chloride complex (Pt Cl2OEP), etc.
[0234] In addition, 2-(biphenyl-4-yl)-4,6-bis(12-phenylindolo [2,3-a]carbazol-11-yl)-1,3,5-triazine (PIC-TRZ) , 2-{4-[3-(N-phenyl-9H-carbazol-3-yl)-9H-carbazol -9-yl]phenyl}-4,6-diphenyl-1,3,5-triazine (PCCz PTzn), 2-[4-(10H-phenoxazin-10-yl)phenyl]-4,6- diphenyl-1,3,5-triazine (PXZ-TRZ), 3-[4-(5-phenyl- 5,10-dihydrophenazin-10-yl)phenyl]-4,5-diphenyl-1,2 ,4-triazole (PPZ-3TPT), 3-(9,9-dimethyl-9H-acridine -10-yl)-9H-xanthene-9-one (ACRXTN), bis[4-(9,9- dimethyl-9,10-dihydroacridine)phenyl]sulfone (DMAC-DPS), 10-phenyl-10H,10’H-spiro[acridine-9,9’-anthracene]- 10’-one (ACRSA), etc., heterocyclic compounds having π-electron-rich heteroaromatic rings and π-electron-deficient heteroaromatic rings can be used. Note that a substance in which a π-electron-rich heteroaromatic ring and a π-electron-deficient heteroaromatic ring are directly bonded has both the donor property of the π-electron-rich heteroaromatic ring and the acceptor property of the π-electron-deficient heteroaromatic ring enhanced, and the energy difference between the singlet excited state and the triplet excited state becomes small, so it is particularly preferable. When using a TADF material, it can also be used in combination with other organic compounds. The energy difference between the singlet excited state and the triplet excited state becomes small, so it is particularly preferable. Note that when using a TADF material, it can also be used in combination with other organic compounds.
[0235] Note that when using a TADF material, it can also be used in combination with other organic compounds.
[0236] <<Electron transport layer 74>> The electron transport layer 74 is a layer that transports the electrons injected from the conductive layer 43 to the light-emitting layer 73 by the electron injection layer 75. Note that the electron transport layer 74 is a layer containing an electron transport material. The electron transport material used for the electron transport layer 74 preferably has an electron mobility of 1×10 3 to the light-emitting layer 73 by the electron injection layer 75. Note that the electron transport layer 74 is a layer containing an electron transport material. The electron transport material used for the electron transport layer 74 preferably has an electron mobility of 1×10 cm -6 cm 2 / Vs or more. As long as the substance has higher electron transportability than holes, other substances can be used. As long as the substance has higher electron transportability than holes, other substances can be used. Note that as long as the substance has higher electron transportability than holes, other substances can be used.
[0237] As the electron transporting material, metal complexes having a quinoline ligand, a benzoquinoline ligand, an oxazole ligand , or a thiazole ligand, oxadiazole derivatives, triazole derivatives, phenanthroline derivatives, pyridine derivatives, bipyridine derivatives, etc. can be mentioned. In addition, it is also possible to use π-electron deficient heteroaromatic compounds such as nitrogen-containing heteroaromatic compounds. It is possible.
[0238] Specifically, Alq3, tris(4-methyl-8-quinolinolato)aluminum(III )(abbreviation: Almq3), bis(10-hydroxybenzo[h]quinolinato)beryllium (II)(abbreviation: BeBq2), BAlq, Zn(BOX)2, bis[2-(2-hydroxy xyphenyl)benzothiazolato]zinc(II)(abbreviation: Zn(BTZ)2) and other metal complexes , 2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1,3,4- oxadiazole (abbreviation: PBD), 1,3-bis[5-(p-tert-butylphenyl yl)-1,3,4-oxadiazol-2-yl]benzene (abbreviation: OXD-7), 3- (4’-tert-butylphenyl)-4-phenyl-5-(4’’-biphenyl)-1 ,2,4-triazole (abbreviation: TAZ), 3-(4-tert-butylphenyl)-4 -(4-ethylphenyl)-5-(4-biphenylyl)-1,2,4-triazole (abbreviation : p-EtTAZ), bathophenanthroline (abbreviation: Bphen), bathocuproine (abbreviation: BCP), 4,4’-bis(5-methylbenzoxazol-2-yl)stilbene bene (abbreviation: BzOS) and other heteroaromatic compounds, 2-[3-(dibenzothiophene-4- 2-[3'-(Dibenzothiophen-4-yl)biphenyl-3-yl]dibenzof[h]quinoxaline (abbreviation: 2mDBTPDBq-II) , 2-[3'-(dibenzothiophen-4-yl)biphenyl-3-yl]dibenzof ,h]quinoxaline (abbreviation: 2mDBTBPDBq-II), 2-[4-(3,6-dif enyl-9H-carbazol-9-yl)phenyl]dibenzof[h]quinoxaline( abbreviation: 2CzPDBq-III), 7-[3-(dibenzothiophen-4-yl)phenyl dibenzof[h]quinoxaline (abbreviation: 7mDBTPDBq-II), 6-[3- (dibenzothiophen-4-yl)phenyl]dibenzof[h]quinoxaline (abbreviation: 6mDBTPDBq-II), etc. quinoxaline or dibenzoquinoxaline derivatives can be used .
[0239] Also, polymers such as poly(2,5-pyridinediyl) (abbreviation: PPy), poly[(9,9-dihexyl fluorene-2,7-diyl)-co-(pyridine-3,5-diyl)] (abbreviation: PF- Py), poly[(9,9-dioctylfluorene-2,7-diyl)-co-(2,2' -bipyridine-6,6'-diyl)] (abbreviation: PF-BPy) can be used .
[0240] Also, the electron transport layer 74 may not only be a single layer, but also have a structure in which two or more layers composed of the above substances are stacked .
[0241] <<Electron injection layer 75>> The electron injection layer 75 is a layer containing a substance with high electron injection properties. In the electron injection layer 75, lithium fluoride (LiF), cesium fluoride (CsF), calcium fluoride (CaF2), lithium oxide (LiO x Alkali metals, alkaline earth metals, or their compounds such as the following can be used. In addition, rare earth metal compounds such as erbium fluoride (ErF3) can be used. Further, an electride may be used for the electron injection layer 75. Examples of the electride include substances obtained by adding electrons at a high concentration to a mixed oxide of calcium and aluminum. Note that the materials constituting the above-described electron transport layer 74 can also be used.
[0242] Further, a composite material formed by mixing an organic compound and an electron donor may be used for the electron injection layer 75. Since electrons are generated in the organic compound by the electron donor in such a composite material, it has excellent electron injection properties and electron transport properties. In this case, the organic compound is preferably a material excellent in transporting the generated electrons. Specifically, for example, the electron transport materials (metal complexes, heteroaromatic compounds, etc.) used for the above-described electron transport layer 74 can be used. As the electron donor, any substance that exhibits electron-donating properties with respect to the organic compound may be used. Specifically, alkali metals, alkaline earth metals, and rare earth metals are preferable, and examples thereof include lithium, cesium, magnesium, calcium, erbium, ytterbium, etc. Further, alkali metal oxides and alkaline earth metal oxides are preferable, and examples thereof include lithium oxide, calcium oxide, barium oxide, etc. In addition, a Lewis base such as magnesium oxide can also be used. Further, organic compounds such as tetrathiafulvalene (abbreviation: TTF) can also be used.
[0243] <<Charge generation layer 44>> The charge generation layer 44 (charge generation layer 44a, charge generation layer 44b) is between the conductive layer 41 and the conductive layer 43. When a voltage is applied between the two EL layers 42, the conductive layer 44 is in contact with the charge generating layer 44. Electrons are injected into the EL layer 42 on the side closer to the conductive layer 41, and holes are injected into the EL layer 42 on the side opposite the conductive layer 43. The charge generating layer 44 has a function of injecting electrons. Even if a scepter is added to the electron transport material, the electron donor is added to the electron transport material. Alternatively, both of these configurations may be laminated. By forming the charge generating layer 44 using the above-mentioned material, when the EL layer is laminated, In this case, an increase in the driving voltage of the semiconductor device of one embodiment of the present invention can be suppressed.
[0244] In the case where the charge generating layer 44 is configured such that an electron acceptor is added to a hole transporting material, The acceptor is 7,7,8,8-tetracyano-2,3,5,6-tetrafluoroethane. Examples of the benzene ring include benzenetrimethylsilane (abbreviation: F4-TCNQ), chloranil, etc. Examples of the oxides of metals belonging to groups 4 to 8 of the periodic table include: , vanadium oxide, niobium oxide, tantalum oxide, chromium oxide, molybdenum oxide, tantalum oxide Examples of suitable oxides include rhenium oxide, manganese oxide, and rhenium oxide.
[0245] In the case where the charge generating layer 44 is configured such that an electron donor is added to an electron transporting material, The donor may be an alkali metal, an alkaline earth metal, a rare earth metal, or an element in the periodic table. Metals belonging to Groups 2 and 13 and their oxides and carbonates can be used. Specifically, lithium (Li), cesium (Cs), magnesium (Mg), calcium (C a), ytterbium (Yb), indium (In), lithium oxide, cesium carbonate, etc. It is preferably used. Further, an organic compound such as tetrathianaphthacene may be used as an electron donor. It may also be used.
[0246] In addition, for the production of the light-emitting element 40, a vacuum process such as a vapor deposition method, or a solution process such as a spin coating method or an inkjet method can be used. When using the vapor deposition method, physical vapor deposition methods (PVD methods) such as sputtering method, ion plating method, ion beam vapor deposition method, molecular beam vapor deposition method, vacuum vapor deposition method, etc., or chemical vapor deposition method (CVD method) etc. can be used. Particularly for the functional layers (hole injection layer, hole transport layer, light-emitting layer, electron transport layer, electron injection layer) and charge generation layer included in the EL layer of the light-emitting element, they can be formed by methods such as vapor deposition method (vacuum vapor deposition method etc.), coating method (dip coating method, die coating method, bar coating method, spin coating method, spray coating method etc.), printing method (inkjet method, screen (stencil printing) method, offset (lithographic printing) method, flexo (letterpress printing) method, gravure method, microcontact method etc.). When using the vapor deposition method, physical vapor deposition methods (PVD methods) such as sputtering method, ion plating method, ion beam vapor deposition method, molecular beam vapor deposition method, vacuum vapor deposition method, etc., or chemical vapor deposition method (CVD method) etc. can be used. For the functional layers (hole injection layer, hole transport layer, light-emitting layer, electron transport layer, electron injection layer) and charge generation layer included in the EL layer of the light-emitting element, they can be formed by methods such as vapor deposition method (vacuum vapor deposition method etc.), coating method (dip coating method, die coating method, bar coating method, spin coating method, spray coating method etc.), printing method (inkjet method, screen (stencil printing) method, offset (lithographic printing) method, flexo (letterpress printing) method, gravure method, microcontact method etc.). In addition, for the production of the light-emitting element 40, a vacuum process such as a vapor deposition method, or a solution process such as a spin coating method or an inkjet method can be used. For the functional layers (hole injection layer, hole transport layer, light-emitting layer, electron transport layer, electron injection layer) and charge generation layer included in the EL layer of the light-emitting element, they can be formed by methods such as vapor deposition method (vacuum vapor deposition method etc.), coating method (dip coating method, die coating method, bar coating method, spin coating method, spray coating method etc.), printing method (inkjet method, screen (stencil printing) method, offset (lithographic printing) method, flexo (letterpress printing) method, gravure method, microcontact method etc.). In addition, for the production of the light-emitting element 40, a vacuum process such as a vapor deposition method, or a solution process such as a spin coating method or an inkjet method can be used. For the functional layers (hole injection layer, hole transport layer, light-emitting layer, electron transport layer, electron injection layer) and charge generation layer included in the EL layer of the light-emitting element, they can be formed by methods such as vapor deposition method (vacuum vapor deposition method etc.), coating method (dip coating method, die coating method, bar coating method, spin coating method, spray coating method etc.), printing method (inkjet method, screen (stencil printing) method, offset (lithographic printing) method, flexo (letterpress printing) method, gravure method, microcontact method etc.). For the functional layers (hole injection layer, hole transport layer, light-emitting layer, electron transport layer, electron injection layer) and charge generation layer included in the EL layer of the light-emitting element, they can be formed by methods such as vapor deposition method (vacuum vapor deposition method etc.), coating method (dip coating method, die coating method, bar coating method, spin coating method, spray coating method etc.), printing method (inkjet method, screen (stencil printing) method, offset (lithographic printing) method, flexo (letterpress printing) method, gravure method, microcontact method etc.). For the functional layers (hole injection layer, hole transport layer, light-emitting layer, electron transport layer, electron injection layer) and charge generation layer included in the EL layer of the light-emitting element, they can be formed by methods such as vapor deposition method (vacuum vapor deposition method etc.), coating method (dip coating method, die coating method, bar coating method, spin coating method, spray coating method etc.), printing method (inkjet method, screen (stencil printing) method, offset (lithographic printing) method, flexo (letterpress printing) method, gravure method, microcontact method etc.).
[0247] In addition, each functional layer (hole injection layer, hole transport layer, light-emitting layer, electron transport layer, electron injection layer) and charge generation layer constituting the EL layer of the light-emitting element shown in this embodiment is not limited to the materials described above, and other materials can be used in combination as long as they can satisfy the functions of each layer. As an example, polymer compounds (oligomers, dendrimers, polymers etc.), medium molecular compounds (compounds in the intermediate region between low molecules and polymers: molecular weight 400 or more and 4000 or less), inorganic compounds (quantum dot materials etc.) etc. can be used. As for the quantum dot materials, colloidal quantum dot materials, alloy type quantum dot materials, core-shell type quantum dot materials, core type quantum dot materials etc. can be used. In addition, each functional layer (hole injection layer, hole transport layer, light-emitting layer, electron transport layer, electron injection layer) and charge generation layer constituting the EL layer of the light-emitting element shown in this embodiment is not limited to the materials described above, and other materials can be used in combination as long as they can satisfy the functions of each layer. In addition, each functional layer (hole injection layer, hole transport layer, light-emitting layer, electron transport layer, electron injection layer) and charge generation layer constituting the EL layer of the light-emitting element shown in this embodiment is not limited to the materials described above, and other materials can be used in combination as long as they can satisfy the functions of each layer. As an example, polymer compounds (oligomers, dendrimers, polymers etc.), medium molecular compounds (compounds in the intermediate region between low molecules and polymers: molecular weight 400 or more and 4000 or less), inorganic compounds (quantum dot materials etc.) etc. can be used. As an example, polymer compounds (oligomers, dendrimers, polymers etc.), medium molecular compounds (compounds in the intermediate region between low molecules and polymers: molecular weight 400 or more and 4000 or less), inorganic compounds (quantum dot materials etc.) etc. can be used. As an example, polymer compounds (oligomers, dendrimers, polymers etc.), medium molecular compounds (compounds in the intermediate region between low molecules and polymers: molecular weight 400 or more and 4000 or less), inorganic compounds (quantum dot materials etc.) etc. can be used. As for the quantum dot materials, colloidal quantum dot materials, alloy type quantum dot materials, core-shell type quantum dot materials, core type quantum dot materials etc. can be used. As for the quantum dot materials, colloidal quantum dot materials, alloy type quantum dot materials, core-shell type quantum dot materials, core type quantum dot materials etc. can be used.
[0248] <Example 2 of Pixel Cross-Sectional Structure> FIG. 9 is a cross-sectional view for explaining a configuration example of the pixel 10, and is a modified example of the pixel 10 having the configuration shown in FIG. 3. The pixel 10 having the configuration shown in FIG. 9 is different from the pixel 10 having the configuration shown in FIG. 3 in that the EL layer 42 is formed by painting separately. The pixel 10 having the configuration shown in FIG. 3 emits white light and infrared light for example, with the EL layer 42 provided in all the pixels 10. On the other hand, in the pixel 10 having the configuration shown in FIG. 9, for example, an EL layer 42 that emits red light, an EL layer 42 that emits green light, an EL layer 42 that emits blue light, and an EL layer 42 that emits infrared light are formed by painting separately. Therefore, it is not necessary to provide the filter 51 so as to have a region overlapping with the light-emitting element 40. Thus, it is possible to suppress the light emitted from the light-emitting element 40 from being absorbed by the filter 51. As a result, the light emitted from the semiconductor device according to one aspect of the present invention can be made highly bright, and the power consumption of the semiconductor device according to one aspect of the present invention can be reduced. Note that, also in the pixel 10 having the configuration shown in FIG. 9, the filter 51 may be provided so as to have a region overlapping with the light-emitting element 40. In this case, the color purity of the light emitted from the semiconductor device according to one aspect of the present invention can be enhanced.
[0249] In the pixel 10 having the configuration shown in FIG. 3, for example, the EL layer 42 provided in all the pixels 10 emits white light and infrared light. On the other hand, in the pixel 10 having the configuration shown in FIG. 9, for example, an EL layer 42 that emits red light, an EL layer 42 that emits green light, an EL layer 42 that emits blue light, and an EL layer 42 that emits infrared light are formed by painting separately. Therefore, it is not necessary to provide the filter 51 so as to have a region overlapping with the light-emitting element 40. Thus, it is possible to suppress the light emitted from the light-emitting element 40 from being absorbed by the filter 51. As a result, the light emitted from the semiconductor device according to one aspect of the present invention can be made highly bright, and the power consumption of the semiconductor device according to one aspect of the present invention can be reduced. Note that, also in the pixel 10 having the configuration shown in FIG. 9, the filter 51 may be provided so as to have a region overlapping with the light-emitting element 40. In this case, the color purity of the light emitted from the semiconductor device according to one aspect of the present invention can be enhanced. FIG. 10A is a cross-sectional view for explaining a configuration example of the pixel 10, and is a modified example of the pixel 10 having the configuration shown in FIG. 3. The pixel 10 having the configuration shown in FIG. 10A is different from the pixel 10 having the configuration shown in FIG. 3 in that the conductive layer 31 is not formed on the back surface of the substrate 11, and the low-resistance region 34 is formed on the back surface side of the substrate 11. Note that, also in the pixel 10 having the configuration shown in FIG. 9, the filter 51 may be provided so as to have a region overlapping with the light-emitting element 40.
[0250] FIG. 10A is a cross-sectional view for explaining a configuration example of the pixel 10, and is a modified example of the pixel 10 having the configuration shown in FIG. 3. The pixel 10 having the configuration shown in FIG. 10A is different from the pixel 10 having the configuration shown in FIG. 3 in that the conductive layer 31 is not formed on the back surface of the substrate 11, and the low-resistance region 34 is formed on the back surface side of the substrate 11. Note that, also in the pixel 10 having the configuration shown in FIG. 9, the filter 51 may be provided so as to have a region overlapping with the light-emitting element 40. In this case, the color purity of the light emitted from the semiconductor device according to one aspect of the present invention can be enhanced.
[0251] As shown in FIG. 6A, the low-resistance region 34 can be formed by adding impurities to the back surface of the substrate 11 after polishing the back surface of the substrate 11. For example, by adding a trivalent element, the low-resistance region 34 can be made into a p-type region, and by adding a pentavalent element, the low-resistance region 34 can be made into an n-type region. When the substrate 11 is a p-type substrate, the low-resistance region 34 can be made into a p-type region, and when the substrate 11 is an n-type substrate, the low-resistance region 34 can be made into an n-type region. Also, as the method for adding the above impurities, ion implantation method, ion doping method, plasma immersion ion implantation, etc. can be mentioned.
[0252] FIG. 10B is a cross-sectional view for explaining a configuration example of the pixel 10, and is a modified example of the pixel 10 having the configuration shown in FIG. 3. The pixel 10 having the configuration shown in FIG. 10B is different from the pixel 10 having the configuration shown in FIG. 3 in that a microlens 55 is provided
[0253] inside the layer 63. The microlens 55 is provided so as to have a region overlapping with the photoelectric conversion element 12. Thereby, light is incident on the photoelectric conversion element 12 in the vertical direction, and the light detection
[0254] sensitivity by the photoelectric conversion element 12 can be enhanced. Note that in FIG. 10B, the microlens 55 is provided so as to be covered by the insulating layer 32, but one aspect of the present invention is not limited to this. For example, the microlens 55 may be provided so as to be covered by the insulating layer 33. Also, a microlens array may be provided both inside the layer 63 and
[0255] <Cross-sectional configuration example of pixel 3> FIG. 11 is a cross-sectional view for explaining a configuration example of the pixel 10. The pixel 10 having the configuration shown in FIG. 11 has a transistor 101, a transistor 132, a photoelectric conversion element 12, a light-emitting element 40, etc. provided between a substrate 60 and a substrate 50.
[0256] The pixel 10 having the configuration shown in FIG. 11 can have a stacked configuration of a layer 61 and a layer 64. The layer 61 is provided with a substrate 60, an insulating layer 86, an insulating layer 80, a transistor 101 and a tran sistor 132, and an insulating layer 82. The transistor 101 and the transistor 1 32 are provided between the insulating layer 80 and the insulating layer 82. Further, an insulating layer 85 and an insulating layer 84 are provided so as to cover the channel formation region, the source region, and the drain region of the transistor 101 and the transistor 132. Also, an insulating layer 83 is provided between the insulating layer 84 and the insulating layer 82.
[0257] A conductive layer 21 is provided so as to be electrically connected to one of the source or drain of the transistor 101, and a conductive layer 22 is provided so as to be electrically connected to the other of the source or drain of the transistor 101. Also, a conductive layer 23 is provided so as to be electrically connected to one of the source or drain of the transistor 132, and a conductive layer 24 is provided so as to be electrically connected to the other of the source or drain of the transistor 132.
[0258] As the substrate 60, a silicon substrate, a glass substrate, a ceramic substrate, a resin substrate, etc. can be used. Note that a transistor or the like can be provided between the substrate 60 and the transistors 101 and 132. For example, when a silicon substrate is used as the substrate 60 a Si transistor can be provided.
[0259] The layer 64 includes an insulating layer 32, a light-emitting element 40, a photoelectric conversion element 12, and an insulating layer 33. The layer 64 is provided with a substrate 50 and a filter 51. 60 is sealed via a sealing layer 52 .
[0260] An insulating layer 32 is provided so as to cover the conductive layers 21 to 24, and a light-emitting element is formed on the insulating layer 32. 40 and a photoelectric conversion element 12 are provided.
[0261] The light emitting element 40 is formed by laminating a conductive layer 41, an EL layer 42, and a conductive layer 43 in this order from the insulating layer 32 side. The photoelectric conversion element 12 has a laminated structure in which a conductive layer 45, an active layer 4, and a conductive layer 4 are laminated from the insulating layer 32 side. 6, and a conductive layer 43 are laminated in this order.
[0262] Here, the conductive layer 41 and the conductive layer 45 can be formed in the same process. An insulating film is formed on the conductive layer 21 to the conductive layer 24 and on the insulating layer 82, and an opening reaching the conductive layer 21 is formed. An opening reaching the conductive layer 23 and the insulating film is provided to form the insulating layer 32. Next, a conductive film is formed on the insulating layer 32 and in the opening, and then photolithography is performed. Then, the conductive film is patterned by etching according to the pattern formed. In this manner, the conductive layer 41 and the conductive layer 45 are formed. can.
[0263] The conductive layer 43 is connected to both the common electrode of the light emitting element 40 and the common electrode of the photoelectric conversion element 12. As described above, by configuring the pixel 10 as shown in FIG. The manufacturing process of the semiconductor device of the present invention can be simplified. One aspect of the semiconductor device can be made at low cost.
[0264] The conductive layer 41 is electrically connected to the conductive layer 23 through an opening provided in the insulating layer 32. The conductive layer 45 is electrically connected to the conductive layer 21 through an opening provided in the insulating layer 32. Also, an insulating layer 33 is provided so as to cover the ends of the conductive layer 41 and the conductive layer 45.
[0265] For the conductive layer 41 and the conductive layer 45, a low-resistance conductive film such as a metal can be used. For example, , one or more of metals such as tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf ), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), cobalt (Co), nickel (Ni), titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), silver (Ag), etc., or an alloy thereof, or a metal nitride thereof can be used to form.
[0266] The conductive layer 45 has a function as an electrode of the photoelectric conversion element 12. Therefore, it can be said that one electrode of the photoelectric conversion element 1 2 is electrically connected to one of the source or drain of the transistor 101 through the conductive layer 21.
[0267] The active layer 46 can have a laminated structure in which a p-type semiconductor and an n-type semiconductor are laminated to realize a pn junction, or , a laminated structure in which a p-type semiconductor, an i-type semiconductor, and an n-type semiconductor are laminated to realize a pin junction, etc.
[0268] As the semiconductor used for the active layer 46, an inorganic semiconductor such as silicon, or an organic semiconductor containing an organic compound In particular, when an organic semiconductor material is used, the EL layer of the light-emitting element 40 This is preferable because the insulating layer 42 and the active layer 46 can be formed in the same manufacturing equipment.
[0269] When an organic semiconductor material is used for the active layer 46, fullerene is used as the n-type semiconductor material. (For example, C 60 , C 70 etc.) or its derivatives, etc. In addition, copper (II) phthalocyanine (Cu Pc) and 5,10,15,20-tetraphenylbisbenzo[5,6]indeno[1,2 ,3-cd:1',2',3'-lm]perylene (abbreviation: DBP) and other electron-donating organic The active layer 46 can be made of a semiconductor material having an electron-accepting property and a semiconductor material having an electron-donating property. The semiconductor materials may be laminated (pn laminated structure) between these, and an electron-accepting A stacked structure with a bulk heterostructure layer formed by co-evaporating a semiconductor material and an electron-donating semiconductor material (pin stack structure) is also acceptable. It also suppresses dark current when no light is irradiated. For this purpose, a hole is formed around (above or below) the pn stack structure or the pin stack structure. A layer functioning as a hole blocking layer or a layer functioning as an electron blocking layer may be provided.
[0270] When the pixel 10 has the configuration shown in FIG. 11, it is not necessary to provide a substrate 11 inside the pixel 10. For this reason, the substrate 60 and the substrate 50 are flexible substrates (hereinafter, flexible substrates). The semiconductor device of one embodiment of the present invention can be made into a flexible semiconductor device by using a flexible insulating film or the like. The device may be a body device.
[0271] As the flexible substrate, it is preferable to use a substrate using a film, particularly a resin film. It is preferable to use a substrate using . By doing so, the flexibility of the semiconductor device according to one aspect of the present invention can be enhanced, and weight reduction and thickness reduction are possible.
[0272] As the flexible substrate, for example, polyester resins such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN), polyacrylonitrile resin, acrylic resin , polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyphenylene ether sulfone (PES) resin, polyamide resin (nylon, aramid, etc.), polysiloxane resin, cycloolefin resin, polystyrene resin, polyamideimide resin, polyurethane resin, polyvinyl chloride resin, polyvinylidene chloride resin, polypropylene resin, polytetrafluoroethylene (PTFE) resin, ABS resin, cellulose nanofiber, etc. can be used. Or, glass having a thickness that has flexibility may be used.
[0273] <Example of Pixel Circuit Configuration> FIG. 12 is a circuit diagram for explaining a configuration example of pixel 10. Pixel 10 includes an imaging circuit 100 provided with a photoelectric conversion element 12 and a display circuit 130 provided with a light emitting element 40.
[0274] <<Example of Imaging Circuit Configuration>> In addition to the photoelectric conversion element 12, the imaging circuit 100 includes a transistor 101, a transistor 102 , a transistor 103, a transistor 104, and a capacitor element 105. Note that a configuration without providing the capacitor element 105 may also be adopted.
[0275] One electrode of the photoelectric conversion element 12 is electrically connected to one of the source or drain of the transistor 101. One of the source or drain of the transistor 101 is electrically connected to one of the source or drain of the transistor 102. One of the source or drain of the transistor 102 is electrically connected to one of the source or drain of the transistor 103. One of the source or drain of the transistor 103 is electrically connected to the gate of the transistor 104. The gate of the transistor 103 is electrically connected to one electrode of the capacitor element 105. One of the source or drain of the transistor 103 is electrically connected to one of the source or drain of the transistor 104.
[0276] Here, a node where one of the source or drain of the transistor 101, one of the source or drain of the transistor 102, the gate of the transistor 103, and one electrode of the capacitor element 105 are electrically connected is defined as node FD. Node FD can function as a charge storage unit.
[0277] The gate of the transistor 101 is electrically connected to the wiring 111. The gate of the transistor 102 is electrically connected to the wiring 112. The gate of the transistor 104 is electrically connected to the wiring 114. The other electrode of the photoelectric conversion element 12 is electrically connected to the wiring 121. The other of the source or drain of the transistor 102 is electrically connected to the wiring 122. The other of the source or drain of the transistor 104 is electrically connected to the wiring 124. The other electrode of the capacitor element 105 is electrically connected to the wiring 125.
[0278] The wirings 111, 112, and 114 have the function of scanning lines. The conduction of each transistor can be controlled by signals supplied to the gates of the respective transistors via line 112 and wiring 114. Wiring 124 has a function as a data line, and imaging data acquired by the photoelectric conversion element 12 is output to the outside of the imaging circuit 100 via wiring 124.
[0279] Wiring 121, wiring 122, and wiring 125 have a function as power supply lines. The imaging circuit 100 shown in FIG. 12 is configured such that the cathode of the photoelectric conversion element 12 is electrically connected to one of the source or drain of the transistor 101, and the anode of the photoelectric conversion element 12 is electrically connected to wiring 121. Therefore, by setting wiring 121 to a low potential and wiring 122 to a high potential, the node FD can be configured to be reset to a high potential and operated, so that the photoelectric conversion element 12 can be operated in reverse bias. Note that wiring 125 can be set to a low potential.
[0280] In this specification and the like, the high potential indicates a potential higher than the low potential. For example, the high potential can be a positive potential, and the low potential can be a ground potential or a negative potential.
[0281] Transistor 101 has a function as a transfer transistor. By setting transistor 101 to a conductive state, the potential of node FD can be set to a potential corresponding to the exposure amount of the photoelectric conversion element 12. Thereby, the imaging circuit 100 can acquire imaging data.
[0282] Transistor 102 has a function as a reset transistor. By setting transistor 102 to a conductive state, the potential of node FD is reset to the potential of wiring 122. It is possible to...
[0283] The transistor 103 has a function as an amplification transistor and can output according to the potential of the node FD. It is possible to perform the output.
[0284] The transistor 104 has a function as a selection transistor. By setting the transistor 104 to the conductive state, the imaging data can be output to the wiring 124. Specifically, the current in the wiring 124 can be set to a value corresponding to the imaging data. It is possible to output the imaging data to the wiring 124. Specifically, the current in the wiring 124 can be set to a value corresponding to the imaging data. It is possible to make the current in the wiring 124 a value corresponding to the imaging data.
[0285] <<Configuration Example of Display Circuit>> The display circuit 130 includes, in addition to the light-emitting element 40, a transistor 131, a transistor 132, a transistor 133, and a capacitor element 134.
[0286] One of the source or drain of the transistor 131 is electrically connected to the gate of the transistor 132. The gate of the transistor 132 is electrically connected to one electrode of the capacitor element 134. One of the source or drain of the transistor 132 is electrically connected to one of the source or drain of the transistor 133. One of the source or drain of the transistor 133 is electrically connected to the other electrode of the capacitor element 134. One of the source or drain of the transistor 131 is electrically connected to the gate of the transistor 132. The gate of the transistor 132 is electrically connected to one electrode of the capacitor element 134. One of the source or drain of the transistor 132 is electrically connected to one of the source or drain of the transistor 133. One of the source or drain of the transistor 132 is electrically connected to one of the source or drain of the transistor 133. One of the source or drain of the transistor 133 is electrically connected to the other electrode of the capacitor element 134. One of the source or drain of the transistor 133 is electrically connected to the other electrode of the capacitor element 134. The other electrode of the capacitor element 134 is electrically connected to one electrode of the light-emitting element 40.
[0287] The other of the source or drain of the transistor 131 is electrically connected to the wiring 141. The other of the source or drain of the transistor 132 is electrically connected to the wiring 142. The other of the source or drain of the transistor 133 is electrically connected to the wiring 143. The other of the source or drain of the transistor 132 is electrically connected to the wiring 142. The other of the source or drain of the transistor 133 is electrically connected to the wiring 143. The gate of the transistor 131 and the gate of the transistor 133 are connected to the wiring 1 The other electrode of the light emitting element 40 is electrically connected to the wiring 145. This is being continued.
[0288] The wiring 141 functions as a data line and has information regarding the light emission luminance of the light emitting element 40. The data is supplied to the display circuit 130 via a wiring 141. A wiring 143 is a monitor line. By detecting the current flowing through the wiring 143, the power supply of the light emitting element 40 can be determined. The wiring 144 functions as a scanning line, and the wiring 144 A signal is supplied to the gates of the transistors 131 and 133 via The conduction of the transistor 131 and the transistor 133 can be controlled.
[0289] The wiring 142 and the wiring 145 function as power supply lines. The anode of the light emitting element 40 is electrically connected to one of the source and drain of the transistor 132. The cathode of the light emitting element 40 is electrically connected to the wiring 145. In this way, the wiring 142 is set to a high potential and the wiring 145 is set to a low potential, so that the light-emitting element 40 is sequentially switched. Since the light emitting element 40 can be operated by bias, the This allows the light emitting element 40 to pass a current of a magnitude corresponding to the data. The data provided on path 130 can be used to illuminate the light at a brightness corresponding to the data.
[0290] In the display circuit 130 having the configuration shown in FIG. 12, the transistor 131 is turned on. Thus, the potential of the gate of the transistor 132 is changed to correspond to the data supplied from the wiring 141. It is possible to set the potential. Thereby, data can be written into the display circuit 130. It is possible.
[0291] The transistor 132 has a function as a driving transistor, and can control the current flowing through the light-emitting element 40 according to the potential supplied to the transistor. It is possible to control the current flowing through the light-emitting element 40 according to the potential supplied to the transistor.
[0292] Also, by bringing the transistor 133 into a conductive state, current can be passed through the wiring 143. Thereby, the electrical characteristics of the light-emitting element 40 and the like can be acquired. It is possible to control the current flowing through the light-emitting element 40 according to the potential supplied to the transistor.
[0293] In FIG. 12, the imaging circuit 100 and the display circuit 130 are not electrically connected. Thereby, the imaging circuit 100 and the display circuit 130 can be controlled independently. Note that in the case where the imaging circuit 100 and the display circuit 130 are electrically connected, the operations of the imaging circuit 100 and the display circuit 130 can be controlled in a mutually dependent manner. It is possible to control the imaging circuit 100 and the display circuit 130 independently. Note that in the case where the imaging circuit 100 and the display circuit 130 are electrically connected, the operations of the imaging circuit 100 and the display circuit 130 can be controlled in a mutually dependent manner. In the case where the imaging circuit 100 and the display circuit 130 are electrically connected, the operations of the imaging circuit 100 and the display circuit 130 can be controlled in a mutually dependent manner. It is possible to control the imaging circuit 100 and the display circuit 130 in a mutually dependent manner.
[0294] <Configuration example of semiconductor device> FIG. 13A is a block diagram for explaining a configuration example of a semiconductor device according to an aspect of the present invention. The semiconductor device includes a pixel array 151 having pixels 10 arranged in a matrix, a gate driver circuit 152, and a source driver circuit 153. The pixel 10 is provided with an imaging circuit 100 and a display circuit 130. The semiconductor device includes a pixel array 151 having pixels 10 arranged in a matrix, a gate driver circuit 152, and a source driver circuit 153. The pixel 10 is provided with an imaging circuit 100 and a display circuit 130. The gate driver circuit 152 has a function of selecting rows of the pixel array 151. The source driver circuit 153 has a function of generating data to be supplied to the display circuit 130. Also, the source driver circuit 153 receives the imaging data acquired by the imaging circuit 100 and The pixel 10 is provided with an imaging circuit 100 and a display circuit 130.
[0295] The gate driver circuit 152 has a function of selecting rows of the pixel array 151. The source driver circuit 153 has a function of generating data to be supplied to the display circuit 130. Also, the source driver circuit 153 receives the imaging data acquired by the imaging circuit 100 and The source driver circuit 153 has a function of generating data to be supplied to the display circuit 130. Also, the source driver circuit 153 receives the imaging data acquired by the imaging circuit 100 and The source driver circuit 153 receives the imaging data acquired by the imaging circuit 100 and It has a function of outputting to the outside of the device.
[0296] In the semiconductor device shown in FIG. 13A, all pixels 10 have both an imaging circuit 100 and a display circuit 130, but one aspect of the present invention is not limited to this. FIG. 13B is a diagram showing a configuration example of a pixel array 151, which is a modified example of the pixel array 151 having the configuration shown in FIG. 13A. The pixel array 151 having the configuration shown in FIG. 13B is different from the pixel array 151 having the configuration shown in FIG. 13A in that the imaging circuit 100 is provided only in some of the pixels 10. FIG. 13B is a diagram showing a configuration example of the pixel array 151, which is a modified example of the pixel array 151 having the configuration shown in FIG. 13A. The pixel array 151 having the configuration shown in FIG. 13B is different from the pixel array 151 having the configuration shown in FIG. 13A in that the imaging circuit 100 is provided only in some of the pixels 10. In the semiconductor device having the pixel array 151 having the configuration shown in FIG. 13B, the opening area of the display circuit 130 can be increased. As a result, the light emitted from the semiconductor device according to one aspect of the present invention can be made highly bright, and the power consumption of the semiconductor device according to one aspect of the present invention can be reduced. In the semiconductor device having the pixel array 151 having the configuration shown in FIG. 13B, the opening area of the display circuit 130 can be increased. As a result, the light emitted from the semiconductor device according to one aspect of the present invention can be made highly bright, and the power consumption of the semiconductor device according to one aspect of the present invention can be reduced.
[0297] Here, it is preferable to use OS transistors for the transistors 101 and 102 included in the imaging circuit 100 shown in FIG. 12 and the like. The OS transistor has extremely low off-current characteristics. By using OS transistors for the transistors 101 and 102, the period during which charge can be held at the node FD can be made extremely long. Therefore, the global shutter method that performs charge accumulation operations simultaneously for all pixels can be applied without complicating the circuit configuration and operation method. Here, it is preferable to use OS transistors for the transistors 101 and 102 included in the imaging circuit 100 shown in FIG. 12 and the like. The OS transistor has extremely low off-current characteristics. By using OS transistors for the transistors 101 and 102, the period during which charge can be held at the node FD can be made extremely long. Therefore, the global shutter method that performs charge accumulation operations simultaneously for all pixels can be applied without complicating the circuit configuration and operation method. Here, it is preferable to use OS transistors for the transistors 101 and 102 included in the imaging circuit 100 shown in FIG. 12 and the like. The OS transistor has extremely low off-current characteristics. By using OS transistors for the transistors 101 and 102, the period during which charge can be held at the node FD can be made extremely long. Therefore, the global shutter method that performs charge accumulation operations simultaneously for all pixels can be applied without complicating the circuit configuration and operation method. Here, it is preferable to use OS transistors for the transistors 101 and 102 included in the imaging circuit 100 shown in FIG. 12 and the like. The OS transistor has extremely low off-current characteristics. By using OS transistors for the transistors 101 and 102, the period during which charge can be held at the node FD can be made extremely long. Therefore, the global shutter method that performs charge accumulation operations simultaneously for all pixels can be applied without complicating the circuit configuration and operation method.
[0298] Here, it is preferable to use OS transistors for the transistors 101 and 102 included in the imaging circuit 100 shown in FIG. 12 and the like. The OS transistor has extremely low off-current characteristics. By using OS transistors for the transistors 101 and 102, the period during which charge can be held at the node FD can be made extremely long. Therefore, the global shutter method that performs charge accumulation operations simultaneously for all pixels can be applied without complicating the circuit configuration and operation method. Here, it is preferable to use OS transistors for the transistors 101 and 102 included in the imaging circuit 100 shown in FIG. 12 and the like. The OS transistor has extremely low off-current characteristics. By using OS transistors for the transistors 101 and 102, the period during which charge can be held at the node FD can be made extremely long. Therefore, the global shutter method that performs charge accumulation operations simultaneously for all pixels can be applied without complicating the circuit configuration and operation method. Here, it is preferable to use OS transistors for the transistors 101 and 102 included in the imaging circuit 100 shown in FIG. 12 and the like. The OS transistor has extremely low off-current characteristics. By using OS transistors for the transistors 101 and 102, the period during which charge can be held at the node FD can be made extremely long. Therefore, the global shutter method that performs charge accumulation operations simultaneously for all pixels can be applied without complicating the circuit configuration and operation method. Here, it is preferable to use OS transistors for the transistors 101 and 102 included in the imaging circuit 100 shown in FIG. 12 and the like. The OS transistor has extremely low off-current characteristics. By using OS transistors for the transistors 101 and 102, the period during which charge can be held at the node FD can be made extremely long. Therefore, the global shutter method that performs charge accumulation operations simultaneously for all pixels can be applied without complicating the circuit configuration and operation method. Here, it is preferable to use OS transistors for the transistors 101 and 102 included in the imaging circuit 100 shown in FIG. 12 and the like. The OS transistor has extremely low off-current characteristics. By using OS transistors for the transistors 101 and 102, the period during which charge can be held at the node FD can be made extremely long. Therefore, the global shutter method that performs charge accumulation operations simultaneously for all pixels can be applied without complicating the circuit configuration and operation method. Here, it is preferable to use OS transistors for the transistors 101 and 102 included in the imaging circuit 100 shown in FIG. 12 and the like. The OS transistor has extremely low off-current characteristics. By using OS transistors for the transistors 101 and 102, the period during which charge can be held at the node FD can be made extremely long. Therefore, the global shutter method that performs charge accumulation operations simultaneously for all pixels can be applied without complicating the circuit configuration and operation method.
[0299] FIG. 14A is a diagram schematically showing the operation method of the rolling shutter method, and FIG. 14B is a diagram schematically showing the global shutter method. En is the exposure (accumulation operation) of the nth column (n is a natural number). FIG. 14A is a diagram schematically showing the operation method of the rolling shutter method, and FIG. 14B is a diagram schematically showing the global shutter method. En is the exposure (accumulation operation) of the nth column (n is a natural number). ) Rn represents the read operation of the n-th column. In FIGS. 14A and 14B, the operations from the first row (Li ne[1]) to the M-th row (Line[M]) (M is a natural number) are shown.
[0300] The rolling shutter method is an operation method that sequentially performs exposure and data readout, and is a method of overlapping the read period of a certain row with the exposure periods of other rows. Since the read operation is performed immediately after exposure, imaging can be performed even with a circuit configuration having a relatively short data holding period. However, since an image of one frame is composed of data without imaging simultaneity, distortion occurs in the image in the imaging of a moving object. On the other hand, the global shutter method is an operation method that simultaneously exposes all pixels and holds data in each pixel, and reads out data row by row. Therefore, even in the imaging of a moving object, an image without distortion can be obtained.
[0301] When a transistor with a relatively high off-current such as an Si transistor is used for the pixel, since charge easily leaks from the charge accumulation section, the rolling shutter method is used. To implement the global shutter method using an Si transistor, it is necessary to separately provide a memory circuit or the like, and further complex operations must be performed at high speed. On the other hand, when an OS transistor is used for the pixel, since there is almost no charge leakage from the charge accumulation section, the global shutter method can be easily realized. Note that an OS transistor may also be applied to transistor 103 and transistor 104. Also, an OS transistor may be applied to transistors 131 to 133 included in the display circuit 130.
[0302] When a transistor with a relatively high off-current such as an Si transistor is used for the pixel, since charge easily leaks from the charge accumulation section, the rolling shutter method is used. To implement the global shutter method using an Si transistor, it is necessary to separately provide a memory circuit or the like, and further complex operations must be performed at high speed. On the other hand, when an OS transistor is used for the pixel, since there is almost no charge leakage from the charge accumulation section, the global shutter method can be easily realized. To implement the global shutter method using an Si transistor, it is necessary to separately provide a memory circuit or the like, and further complex operations must be performed at high speed. On the other hand, when an OS transistor is used for the pixel, since there is almost no charge leakage from the charge accumulation section, the global shutter method can be easily realized. When an OS transistor is used for the pixel, since there is almost no charge leakage from the charge accumulation section, the global shutter method can be easily realized.
[0303] Note that an OS transistor may also be applied to transistor 103 and transistor 104. Also, an OS transistor may be applied to transistors 131 to 133 included in the display circuit 130. Note that an OS transistor may also be applied to transistor 103 and transistor 104. Also, an OS transistor may be applied to transistors 131 to 133 included in the display circuit 130. A transistor may be applied. All of the transistors included in the semiconductor device according to one aspect of the present invention By using one type of transistor such as an OS transistor, the manufacturing process of the semiconductor device according to one aspect of the present invention can be simplified. Therefore, the semiconductor device according to one aspect of the present invention can be made at a low cost. Note that all or part of transistors 101 to 104 and transistors 131 to 133 may be Si transistors. Examples of the Si transistor include a transistor having amorphous silicon, a transistor having crystalline silicon (typically, low-temperature polysilicon, single-crystal silicon, etc.).
[0304] FIG. 15 is a circuit diagram for explaining a configuration example of the pixel 10, and is a modified example of the pixel 10 having the configuration shown in FIG. 12. The pixel 10 having the configuration shown in FIG. 15 is different from the pixel 10 having the configuration shown in FIG. 12 in that a wiring 155 having a function as a data line is electrically connected to the other electrode of the capacitive element 105 of the imaging circuit 100 instead of a wiring 125 having a function as a power supply line.
[0305] In the imaging circuit 100 having the configuration shown in FIG. 15, data can be supplied to the other electrode of the capacitive element 105 via the wiring 155. The data can be added to the imaging data acquired using the photoelectric conversion element 12. Thereby, for example, the imaging data acquired by the imaging circuit 100 can be corrected. For example, image processing such as noise removal can be performed on the imaging data acquired by the imaging circuit 100.
[0306] Note that in the imaging circuit 100 shown in FIG. 15, the anode of the photoelectric conversion element 12 is the transistor 10 One of the source or drain of 1 is electrically connected, and the cathode of the photoelectric conversion element 12 is wired It is configured to be electrically connected to 121. Therefore, by setting the wiring 121 to a high potential and the wiring 122 to a low potential, the node FD can be reset to a low potential and operated, so that the photoelectric conversion element 12 can be operated in reverse bias.
[0307] FIG. 16 is a block diagram for explaining a configuration example of a semiconductor device according to an aspect of the present invention, and is a modification of the semiconductor device having the configuration shown in FIG. 13A The semiconductor device having the configuration shown in FIG. 16 is different from the semiconductor device having the configuration shown in FIG. 13A in that it has a data generation circuit 154.
[0308] As the pixel 10 shown in FIG. 16, the pixel 10 having the configuration shown in FIG. 15 can be applied. The wiring 155 electrically connected to the imaging circuit 100 is electrically connected to the data generation circuit 154 The data generation circuit 154 has a function of generating data to be supplied to the imaging circuit 100 The data generated by the data generation circuit 154 is supplied to the imaging circuit 10 0 via the wiring 155. Specifically, the data generated by the data generation circuit 154 is supplied to the other electrode of the capacitive element 105 included in the imaging circuit 100 via the wiring 155
[0309] FIG. 17 is a timing chart for explaining an example of an operation method of the imaging circuit 100 having the configuration shown in FIG. 15. In the timing chart in this specification, "H" indicates a high potential and "L" indicates a low potential.
[0310] During the period T1, the potential of the wiring 111 and the potential of the wiring 112 are set to high potentials, and the wiring 114 By setting the potential of to a low potential, transistors 101 and 102 conduct , and transistor 104 becomes non-conductive. As a result, the potential of node FD is reset to the low potential that is the potential of wiring 122. Also, set the potential of wiring 155 to the potential V r ef which is the reference potential. The potential V ref can be, for example, the ground potential. In the following, the potential V r ef is set to the ground potential.
[0311] During period T2, by setting the potential of wiring 111 to a high potential and the potentials of wiring 112 and wiring 114 to low potentials, transistor 101 conducts and transistors 102 and 104 become non-conductive. As a result, the potential of node FD rises according to the exposure amount to the photoelectric conversion element 12. Note that the potential of wiring 155 remains at the potential V ref .
[0312] During period T3, by setting the potentials of wiring 111, wiring 112, and wiring 114 to low potentials , transistors 101, 102, and transistor 10 4 become non-conductive. As a result, the potential of node FD is determined and held. Thus, imaging data is acquired. Here, let the determined potential of node FD be potential V1. Note that the potential of wiring 155 remains at the potential V ref .
[0313] By using OS transistors with low off-current for transistors 101 and 102 that are electrically connected to node FD, leakage of charge from node FD can be suppressed, and the holding time of the imaging data acquired by the imaging circuit 100 can be extended.
[0314] During period T4, the potential of wiring 111 and the potential of wiring 112 are set to a low potential, and the potential of wiring 114 is set to a high potential, so that transistor 101 and transistor 102 become non-conductive and transistor 104 becomes conductive. As a result, a current I represented by the following mathematical formula (1) flows through wiring 124 ref where k is a proportionality constant and V th is the threshold voltage of transistor 103 The potential of wiring 155 remains at potential V ref .
[0315]
Equation
[0316] Thereafter, during period T5, the potential of wiring 155 is set to the potential corresponding to the data generated by the data generation circuit 154 shown in FIG. 16. Letting the potential be potential V2 and the capacitance coupling coefficient of node FD be 1, the potential of node FD becomes potential "V1 + V2". As a result, a current I represented by the following mathematical formula (2) flows through wiring 124
[0317]
Equation
[0318] After the current flowing through wiring 124 reaches the value represented by mathematical formula (2), "I ref -I" is calculated This calculation can be performed using an arithmetic circuit (not shown in FIG. 16 etc.). Note that in the following, "I ref -I" is denoted as ΔI
[0319]
Equation
[0320] Next, from ΔI shown in Equation (3), subtract ΔI0 which is "I ref -I" when not exposed. That is, calculate the value obtained by subtracting ΔI0 from "ΔI". This calculation can be performed using the above calculation circuit or the like. Here, ΔI0 can be expressed by the following Equation (4). Note that when the current flowing through wiring 124 is ΔI0, the potential of node FD is assumed to be the potential of wiring 122, and this potential is assumed to be the ground potential.
[0321]
Number
[0322] Therefore, "ΔI - ΔI0" can be expressed by the following Equation (5).
[0323]
Number
[0324] As described above, the value of the current flowing through wiring 124 corresponds to the product of the potential V1 corresponding to the imaging data acquired by imaging circuit 100 and the potential V2 corresponding to the data supplied from data generation circuit 154 to imaging circuit 100. Therefore, it is possible to add the data supplied from data generation circuit 154 to imaging circuit 100 to the imaging data acquired by imaging circuit 100. The above is the operation in period T5.
[0325] During period T6, set the potentials of wiring 111, wiring 112, and wiring 114 to low potential. As a result, transistors 101, 102, and 104 become non-conductive. This is an example of the operation method of the imaging circuit 100 configured as shown in FIG. 15.
[0326] <Configuration example of transistor> FIG. 18A shows a detailed configuration example of an OS transistor applicable to the transistor 101 and the like. The OS transistor shown in FIG. 18A has an insulating layer provided on a stack of a metal oxide layer and a conductive layer, and a groove reaching the metal oxide layer is provided in the insulating layer and the conductive layer to form a source electrode 205 and a drain electrode 206, which is a self-aligned configuration. The OS transistor has a channel formation region 210 formed in the metal oxide layer 207, a source region 203, and a drain region 204, and may further have a gate electrode 201, a gate insulating layer 202, and a back gate electrode 235. Here, at least the gate insulating layer 202 and the gate electrode 201 are provided in the groove. The groove may further be provided with a metal oxide layer 208. Also, the insulating layer 85 has a function as a gate insulating layer of the back gate electrode 235.
[0327] The OS transistor may have a self-aligned configuration in which the source region 203 and the drain region 204 are formed in the metal oxide layer using the gate electrode 201 as a mask, as shown in FIG. 18B.
[0328] Or, as shown in FIG. 18C, it may be a non-self-aligned top gate transistor having a region where the source electrode 205 or the drain electrode 206 overlaps with the gate electrode 201.
[0329]
[0330] The back gate electrode 235 is as shown in the cross-sectional view in the channel width direction of the transistor shown in FIG. 18D. It may be electrically connected to the gate electrode 201, which is the front gate of the transistors provided opposite to each other. Note that FIG. 18D shows the transistor of FIG. 18A as an example, but the same applies to transistors with other structures. Also, a configuration may be adopted in which a fixed potential different from that of the front gate can be supplied to the back gate electrode 235.
[0331] This embodiment can be appropriately combined with the descriptions of other embodiments.
[0332] (Embodiment 3) This embodiment will describe the configuration of a CAC (Cloud-Aligned Composite)-OS that can be used for the transistors disclosed in one aspect of the present invention.
[0333] For example, in CAC-OS, the elements constituting the metal oxide are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less, or in the vicinity thereof. Note that hereinafter, in the metal oxide, one or more metal elements are unevenly distributed, and a state in which regions having the metal element are mixed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less, or in the vicinity thereof is also referred to as a mosaic state or a patch state.
[0334] Note that the metal oxide preferably contains at least indium. In particular, it preferably contains indium and zinc. In addition to these, aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, One or more selected from among tantalum, tungsten, magnesium, etc. may be included. It may be.
[0335] For example, in In-Ga-Zn oxide, CAC-OS (among CAC-OS, In-G a-Zn oxide may be particularly referred to as CAC-IGZO.) refers to indium oxide (hereinafter, InO X1 (where X1 is a real number greater than 0).), or indium zinc oxide (hereinafter, In X2 Zn Y2 O Z2 (where X2, Y2, and Z2 are real numbers greater than 0).) and the like, and gallium oxide (hereinafter, GaO (where X3 is a real number greater than 0). X3 ), or gallium zinc oxide (hereinafter, Ga ) (hereinafter, Ga X4 Zn Y4 O Z4 (where X4, Y4, and Z4 are real numbers greater than 0).) and the like, and the material separates to form a mosaic shape, and the mosaic -like InO X1 , or In X2 Zn Y2 O Z2 is distributed uniformly in the film (hereinafter , also referred to as a cloud shape).
[0336] That is, CAC-OS is a composite metal oxide having a structure in which a region mainly composed of GaO X3 and a region mainly composed of In X2 Zn Y2 O Z2 , or InO X1 are mixed. In this specification, for example, when the atomic ratio of In to the element M in the first region is greater than the atomic ratio of In to the element M in the second region, it is said that the first region has a higher In concentration than the second region. region.
[0337] Note that IGZO is a common name and refers to one compound composed of In, Ga, Zn, and O in some cases There is. As a representative example, InGaO3(ZnO) m1 (m1 is a natural number), or In (1+ x0) Ga (1-x0) O3(ZnO) m0 (-1 ≦ x0 ≦ 1, m0 is an arbitrary number) is represented by a crystalline compound.
[0338] The above crystalline compound has a single crystal structure, a polycrystalline structure, or a CAAC (C-Axis Aligned Crystal) structure. Note that the CAAC structure is a crystal structure in which a plurality of IGZO nanocrystals have c-axis orientation and are connected without orientation in the a-b plane .
[0339] On the other hand, CAC-OS relates to the material composition of metal oxides. CAC-OS refers to a structure in which in a material composition containing In, Ga, Zn, and O, a region observed as nanoparticle-like with Ga as the main component in part and a region observed as nanoparticle-like with In as the main component in part are randomly dispersed in a mosaic pattern. Therefore, in CAC-OS, the crystal structure is a secondary element.
[0340] Note that CAC-OS does not include a laminated structure of two or more types of films with different compositions. For example, a structure composed of two layers of a film with In as the main component and a film with Ga as the main component is not included .
[0341] Note that the region where GaO X3 is the main component and In X2 Zn Y2 O Z2 or InO X1 is the main There may be cases where no clear boundary can be observed in the region that is the main component.
[0342] In addition, instead of gallium, one or more selected from aluminum, yttrium, copper, vanadium, beryllium , boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum , lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium etc. are included, CAC-OS is observed partly as a region of nanoparticles mainly composed of the metal element, and partly as a region of nanoparticles mainly composed of In in a configuration where they are randomly dispersed mosaically.
[0343] CAC-OS can be formed by sputtering, for example, under conditions where the substrate is not intentionally heated. Also, when forming CAC-OS by sputtering, as the film-forming gas , one or more selected from inert gases (typically argon), oxygen gas, and nitrogen gas can be used. Also, the lower the flow rate ratio of oxygen gas to the total flow rate of the film-forming gas during film formation, the more preferable, for example, the flow rate ratio of oxygen gas is 0% or more and less than 30%, preferably 0% or more and 10% or less.
[0344] When CAC-OS is measured using the θ / 2θ scan by the Out-of-plane method, which is a part of the X-ray diffraction (XRD) measurement method , it has the characteristic that no clear peak is observed. That is, it can be seen from the X-ray diffraction measurement that there is no orientation in the a-b plane direction and the c-axis direction of the measurement region.
[0345] In addition, CAC-OS is irradiated with an electron beam having a probe diameter of 1 nm (also referred to as a nano-beam electron beam). In the electron diffraction pattern obtained by the irradiation, a region with high luminance in a ring shape (ring region) and a plurality of bright spots are observed in the ring region. Therefore, it can be seen from the electron diffraction pattern that the crystal structure of CAC-OS has an nc (nano-crystal) structure without orientation in the plane direction and the cross-sectional direction. For example, in CAC-OS in In-Ga-Zn oxide, according to EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX), regions mainly composed of GaO
[0346] and regions mainly composed of In Zn O X3 or InO are unevenly distributed and mixed. X2 Zn Y2 O Z2 It can be confirmed that they have a structure in which they are unevenly distributed and mixed. X1 It can be confirmed that they have a structure in which they are unevenly distributed and mixed. It can be confirmed that they have a structure in which they are unevenly distributed and mixed.
[0347] CAC-OS has a structure different from that of an IGZO compound in which metal elements are uniformly distributed, and has properties different from those of an IGZO compound. That is, CAC-OS has regions mainly composed of GaO and regions mainly composed of In X3 Zn O X2 Zn Y2 O Z2 or InO X1 are phase-separated from each other, and the regions mainly composed of each element have a mosaic structure. are phase-separated from each other, and the regions mainly composed of each element have a mosaic structure.
[0348] Here, the regions mainly composed of In X2 Zn Y2 O Z2 or InO X1 are regions mainly composed of GaO X3 and the like is a region with higher conductivity compared to the region where it is the main component. That is, In X2 Zn Y2 O Z2 , or InO X1 is the main component, and when carriers flow through this region, the conductivity as a metal oxide is exhibited. Therefore, In X2 Zn Y2 O Z2 , or InO X1 is the main component and is distributed in a cloud-like shape in the metal oxide, enabling a high field-effect mobility (μ) to be achieved.
[0349] On the other hand, the region where GaO X3 etc. are the main components is a region with higher insulation compared to the region where In X2 Zn Y2 O Z2 , or InO X1 is the main component. That is, the region where GaO X3 etc. are the main components is distributed in the metal oxide, suppressing the leakage current and enabling a good switching operation to be achieved.
[0350] Therefore, when CAC-OS is used in a semiconductor device, the insulation caused by GaO X3 etc. and the conductivity caused by I n X2 Zn Y2 O Z2 , or InO X1 act complementarily so that a high on-current (I on ) and a high field-effect mobility (μ) can be achieved .
[0351] Also, the semiconductor device using CAC-OS has high reliability. Therefore, CAC-OS is optimal for various semiconductor devices including displays.
[0352] This embodiment can be appropriately combined with the descriptions of other embodiments.
[0353] (Embodiment 4) In this embodiment, an example of an electronic device that can use the semiconductor device of one aspect of the present invention will be described.
[0354] FIG. 19A shows a biometric authentication device, which includes a housing 911, an operation button 912, a detection unit 913, etc. By holding or bringing a hand or finger close to the detection unit 913, the shape of the vein can be recognized. The detection unit 913 can also display an image. The acquired data is transmitted to a server by a wireless communication unit 914 and compared with a database to identify an individual. In addition, a password or the like can be input using the operation button.
[0355] The semiconductor device of one aspect of the present invention is disposed directly below the detection unit 913. As a result, the detection sensitivity by the detection unit 9 13 can be increased, and a high-brightness image can be displayed on the detection unit 913.
[0356] FIG. 19B shows a non-destructive inspection device, which includes a housing 921, an operation panel 922, a transport mechanism 923, a monitor 924, a detection unit 925, etc. The member to be inspected 926 is transported directly below the detection unit 925 by the transport mechanism 923. The member to be inspected 926 is imaged by the semiconductor device of one aspect of the present invention provided in the detection unit 925, and the captured image is projected onto the monitor 924. Thereafter, it is transported to the outlet of the housing 921, and defective products are sorted and collected. The semiconductor device of one aspect of the present invention is disposed directly below the detection unit 925. As a result, the detection sensitivity by the detection unit 925 can be increased.
[0357] The semiconductor device of one aspect of the present invention is disposed directly below the detection unit 925. As a result, the detection sensitivity by the detection unit 925 can be increased.
[0358] Fig. 19C is a food sorting device, which includes a housing 931, operation buttons 932, a display unit 933, a light-shielding hood 93 4, etc. By closely attaching the light-shielding hood 93 4 provided around the light-receiving part to the inspected food materials such as fruits and imaging, foreign matters, insects, cavities and spoilage inside the food materials can be detected. Also, the sugar content, moisture content, etc. of the food materials can also be detected from the intensity of the detected infrared light, etc. The food sorting device can perform sorting of defective products and grades, and determination of the harvesting period .
[0359] The semiconductor device according to one aspect of the present invention can be provided in the light-receiving part. Thereby, the detection sensitivity of the light received by the light-receiving part can be increased. Note that the configuration shown in Fig. 19B may be used as a food sorting device . Alternatively, the configuration shown in Fig. 19C may be used as a non-destructive inspection device .
[0360] This embodiment can be appropriately combined with the descriptions of other embodiments
[0361] (Embodiment 5) In this embodiment, the market image of using the semiconductor device according to one aspect of the present invention will be described .
[0362] <Market Image> First, the market image of using the semiconductor device according to one aspect of the present invention is shown in Fig. 20 . In Fig. 20, region 701 represents a product region (OS Display) applicable to a display that applies a transistor having an oxide semiconductor in a channel formation region . Region 702 represents an LSI (Large Scale Integration) that applies a transistor having an oxide semiconductor in a channel formation region to an analog (ana . log) represents a product area (OS LSI analog) applicable to [[log]], and area 703 is an LSI applying a transistor having an oxide semiconductor in a channel formation area is applicable to digital ( d igital) product area (OS LSI digital). A semiconductor device according to an aspect of the present invention can be suitably used in the three areas of area 701, area 702, and area 703 shown in FIG. 20, or in other words, in three large markets.
[0363] Also, in FIG. 20, area 704 represents an area where area 701 and area 702 overlap, area 705 represents an area where area 702 and area 703 overlap, area 706 represents an area where area 701 and area 703 overlap, and area 707 represents an area where area 701, area 702, and area 703 all overlap.
[0364] In an OS Display, for example, FET structures such as a Bottom Gate type OS FET (BG OSFET) and a Top Gate type OS FET (TG OS FET) can be suitably used. Note that the Bottom Gate type OS FET includes a channel etch type FET and a channel protection type FET. Also, the Top Gate type OS FET includes a TGSA (Top Gate Self - Aligne d) type FET.
[0365] Also, in OS LSI analog and OS LSI digital, for example, a G ate Last type OS FET (GL OS FET) can be suitably used .
[0366] Incidentally, each of the above transistors includes a transistor having a Single Gate structure with one gate electrode, a transistor having a Dual Gate structure with two gate electrodes, or a transistor having three or more gate electrodes. Among the Dual Gate structure transistors, it is particularly preferable to use a transistor having an S-channel (surrounded channel) structure. Incidentally, in this specification and the like, an S-channel structure transistor refers to a structure of a transistor in which a channel formation region is electrically surrounded by an electric field of one and the other of a pair of gate electrodes. Also, as products included in the OS Display (region 701), there are products having an LCD (liquid crystal display), an EL (Electro Luminescence), and an LED (Light Emitting Diode) as display elements. Alternatively, it is also preferable to combine the above display element with a Q-Dot (Quantum Dot). Incidentally, in this embodiment, EL includes organic EL and inorganic EL. Also, in this embodiment, LED includes micro LED, mini LED, and macro LED. Incidentally, in this specification and the like, a light emitting diode having a chip area of 10000 μm or less is referred to as a micro LED, a light emitting diode having a chip area larger than 10000 μm and 1 mm or less is referred to as a mini LED, and a light emitting diode having a chip area larger than 1 mm is referred to as a macro LED.
[0367] Incidentally, each of the above transistors includes a transistor having a Single Gate structure with one gate electrode, a transistor having a Dual Gate structure with two gate electrodes, or a transistor having three or more gate electrodes. Among the Dual Gate structure transistors, it is particularly preferable to use a transistor having an S-channel (surrounded channel) structure. Incidentally, in this specification and the like, an S-channel structure transistor refers to a structure of a transistor in which a channel formation region is electrically surrounded by an electric field of one and the other of a pair of gate electrodes. Also, as products included in the OS Display (region 701), there are products having an LCD (liquid crystal display), an EL (Electro Luminescence), and an LED (Light Emitting Diode) as display elements. Alternatively, it is also preferable to combine the above display element with a Q-Dot (Quantum Dot).
[0368] Incidentally, in this embodiment, EL includes organic EL and inorganic EL. Also, in this embodiment, LED includes micro LED, mini LED, and macro LED. Incidentally, in this specification and the like, a light emitting diode having a chip area of 10000 μm or less is referred to as a micro LED, a light emitting diode having a chip area larger than 10000 μm and 1 mm or less is referred to as a mini LED, and a light emitting diode having a chip area larger than 1 mm is referred to as a macro LED. Incidentally, each of the above transistors includes a transistor having a Single Gate structure with one gate electrode, a transistor having a Dual Gate structure with two gate electrodes, or a transistor having three or more gate electrodes. Among the Dual Gate structure transistors, it is particularly preferable to use a transistor having an S-channel (surrounded channel) structure. Incidentally, in this specification and the like, an S-channel structure transistor refers to a structure of a transistor in which a channel formation region is electrically surrounded by an electric field of one and the other of a pair of gate electrodes. Also, as products included in the OS Display (region 701), there are products having an LCD (liquid crystal display), an EL (Electro Luminescence), and an LED (Light Emitting Diode) as display elements. Alternatively, it is also preferable to combine the above display element with a Q-Dot (Quantum Dot).
[0369] Incidentally, in this embodiment, EL includes organic EL and inorganic EL. Also, in this embodiment, LED includes micro LED, mini LED, and macro LED. Incidentally, in this specification and the like, a light emitting diode having a chip area of 10000 μm or less is referred to as a micro LED, a light emitting diode having a chip area larger than 10000 μm and 1 mm or less is referred to as a mini LED, and a light emitting diode having a chip area larger than 1 mm is referred to as a macro LED. Incidentally, in this specification and the like, a light emitting diode having a chip area of 10000 μm or less is referred to as a micro LED, a light emitting diode having a chip area larger than 10000 μm and 1 mm or less is referred to as a mini LED, and a light emitting diode having a chip area larger than 1 mm is referred to as a macro LED. 2 Incidentally, in this specification and the like, a light emitting diode having a chip area of 10000 μm or less is referred to as a micro LED, a light emitting diode having a chip area larger than 10000 μm and 1 mm or less is referred to as a mini LED, and a light emitting diode having a chip area larger than 1 mm is referred to as a macro LED. Incidentally, in this specification and the like, a light emitting diode having a chip area of 10000 μm or less is referred to as a micro LED, a light emitting diode having a chip area larger than 10000 μm and 1 mm or less is referred to as a mini LED, and a light emitting diode having a chip area larger than 1 mm is referred to as a macro LED. 2 Incidentally, in this specification and the like, a light emitting diode having a chip area of 10000 μm or less is referred to as a micro LED, a light emitting diode having a chip area larger than 10000 μm and 1 mm or less is referred to as a mini LED, and a light emitting diode having a chip area larger than 1 mm is referred to as a macro LED. 2 Incidentally, in this specification and the like, a light emitting diode having a chip area of 10000 μm or less is referred to as a micro LED, a light emitting diode having a chip area larger than 10000 μm and 1 mm or less is referred to as a mini LED, and a light emitting diode having a chip area larger than 1 mm is referred to as a macro LED. Incidentally, in this specification and the like, a light emitting diode having a chip area of 10000 μm or less is referred to as a micro LED, a light emitting diode having a chip area larger than 10000 μm and 1 mm or less is referred to as a mini LED, and a light emitting diode having a chip area larger than 1 mm is referred to as a macro LED. 2 Incidentally, in this specification and the like, a light emitting diode having a chip area of 10000 μm or less is referred to as a micro LED, a light emitting diode having a chip area larger than 10000 μm and 1 mm or less is referred to as a mini LED, and a light emitting diode having a chip area larger than 1 mm is referred to as a macro LED. There may be cases.
[0370] In addition, products included in the OS LSI analog (area 702) include various frequency sound ranges (for example, audible sounds with a frequency of 20 Hz or more and 20 kHz or less, or ultrasonic waves of 20 kHz or more, etc.) corresponding sound source localization devices, or battery control devices (ba ttery control ICs, battery protection ICs, or battery management systems), etc. can be mentioned.
[0371] In addition, products included in the OS LSI digital (area 703) include memory de vices, CPU (Central Processing Unit) devices, GPU (Graphics Processing Unit) devices, FPGA (fiel d-programmable gate array) devices, power devices, O S LSI and hybrid devices in which the S LSI and Si LSI are stacked or mixed, light-emitting elements etc. can be mentioned.
[0372] In addition, products included in area 704 include display elements having an infrared sensor or a near-infrared se nsor in the display area, or sensor-equipped signal processing devices having an OS FET, or embedded biosensor devices, etc. In addition, products included in area 705 include manuf acturing circuits having an A / D (Analog to Digital) conversion circuit, etc., or AI (Artificial Intellig ence) devices having the said manufacturing circuit, etc. In addition, products included in area 706 include Pi xel AI technology applied display devices, etc. Note that in this specification, etc. can be mentioned. And the Pixel AI technology refers to a technology that utilizes a memory composed of, for example, an OS FET mounted on a pixel circuit of a display. It refers to a technology that utilizes a memory constituted by, for example, an OS FET mounted on a pixel circuit of a display.
[0373] In addition, as products included in the region 707, there are composite products that combine all products included in the above regions 701 to 706. As products included in the region 707, there are composite products that combine all products included in the above regions 701 to 706.
[0374] As described above, the semiconductor device according to one aspect of the present invention can be applied to any product region as shown in FIG. 20. That is, the semiconductor device according to one aspect of the present invention can be applied to many markets. As described above, the semiconductor device according to one aspect of the present invention can be applied to any product region as shown in FIG. 20. That is, the semiconductor device according to one aspect of the present invention can be applied to many markets. It can be applied to many markets.
[0375] Note that the configuration shown in this embodiment can be implemented in appropriate combination with other embodiments described in this specification and the like. It can be implemented in appropriate combination with other embodiments described in this specification and the like.
[0376] This embodiment can be appropriately combined with the descriptions of other embodiments.
Description of Reference Numerals
[0377] 10: Pixel, 10B: Pixel, 10G: Pixel, 10IR: Pixel, 10R: Pixel, 11: Substrate , 12: Photoelectric Conversion Element, 13: Low-Resistance Region, 14: Conductive Layer, 21: Conductive Layer, 22: Conductive Layer , 23: Conductive Layer, 24: Conductive Layer, 30: Substrate, 31: Conductive Layer, 32: Insulating Layer, 33: Insulating Layer, 34: Low-Resistance Region, 40: Light-Emitting Element, 41: Conductive Layer, 42: EL Layer, 42a: EL Layer , 42b: EL Layer, 42c: EL Layer, 43: Conductive Layer, 44: Charge Generation Layer, 44a: Charge Generation Layer, 44b: Charge Generation Layer, 45: Conductive Layer, 46: Active Layer, 50: Substrate, 51: Filter , 51B: Filter, 51G: Filter, 51IR: Filter, 51R: Filter, 52 : Sealing layer, 53: Filter, 54: Microlens, 55: Microlens, 56: Optical control layer, 60: Substrate, 61: Layer, 62: Layer, 63: Layer, 64: Layer, 71: Hole injection layer, 72 : Hole transport layer, 73: Light-emitting layer, 74: Electron transport layer, 75: Electron injection layer, 80: Insulating layer, 8 1: Insulating layer, 82: Insulating layer, 83: Insulating layer, 84: Insulating layer, 85: Insulating layer, 86: Insulating layer , 87: Insulating layer, 100: Imaging circuit, 101: Transistor, 102: Transistor, 1 03: Transistor, 104: Transistor, 105: Capacitor element, 111: Wiring, 112 : Wiring, 114: Wiring, 121: Wiring, 122: Wiring, 124: Wiring, 125: Wiring, 1 30: Display circuit, 131: Transistor, 132: Transistor, 133: Transistor , 134: Capacitor element, 141: Wiring, 142: Wiring, 143: Wiring, 144: Wiring, 14 5: Wiring, 151: Pixel array, 152: Gate driver circuit, 153: Source driver circuit, 154: Data generation circuit, 155: Wiring, 201: Gate electrode, 202: Gate insulation layer, 203: Source region, 204: Drain region, 205: Source electrode, 206: Drain in electrode, 207: Metal oxide layer, 208: Metal oxide layer, 210: Channel formation region, 235: Back gate electrode, 610: Arithmetic unit, 611: Arithmetic section, 612: Memory section, 62 0: Input / output device, 660: Section, 670: Electric lock, 701: Region, 702: Region, 703: Region, 704: Region, 705: Region, 706: Region, 707: Region, 911: Housing, 91 2: Operation button, 913: Detection unit, 914: Wireless communication unit, 921: Housing, 922: Operation panel, 923: Conveying mechanism, 924: Monitor, 925: Detection unit, 926: Object to be inspected inspection member, 931: Housing, 932: Operation button, 933: Display section, 934: Light-shielding hood
Claims
1. Comprising a pixel array, The pixel array has a first layer, a second layer, and a third layer, Among the pixel arrays, the first pixel has a first transistor and a second transistor provided in the first layer, a first photoelectric conversion element provided in the second layer, and a first light-emitting element and a first filter provided in the third layer, One of the source or drain of the first transistor is electrically connected to one electrode of the first light-emitting element, and one of the source or drain of the second transistor is electrically connected to one electrode of the first photoelectric conversion element, The second pixel has a third transistor and a fourth transistor provided in the first layer, a second photoelectric conversion element provided in the second layer, and a second light-emitting element and a second filter provided in the third layer, One of the source or drain of the third transistor is electrically connected to one electrode of the second light-emitting element, and one of the source or drain of the fourth transistor is electrically connected to one electrode of the second photoelectric conversion element, The first light-emitting element and the second light-emitting element have the function of emitting white light and infrared light, The first filter has the function of absorbing infrared light and transmitting visible light, The second filter has the function of transmitting infrared light and absorbing visible light, a semiconductor device.
2. Comprising a pixel array, The pixel array has a first layer, a second layer, and a third layer, Among the pixel arrays, the first pixel has a first transistor and a second transistor provided in the first layer, a first photoelectric conversion element provided in the second layer, and a first light-emitting element and a first filter provided in the third layer, One of the source or drain of the first transistor is electrically connected to one electrode of the first light-emitting element, and one of the source or drain of the second transistor is electrically connected to one electrode of the first photoelectric conversion element, The second pixel has a third transistor and a fourth transistor provided in the first layer, a second photoelectric conversion element provided in the second layer, and a second light-emitting element and a second filter provided in the third layer, One of the source or drain of the third transistor is electrically connected to one electrode of the second light-emitting element, and one of the source or drain of the fourth transistor is electrically connected to one electrode of the second photoelectric conversion element. The channel formation regions of the first transistor, the second transistor, the third transistor, and the fourth transistor each have an oxide semiconductor. The first light-emitting element and the second light-emitting element have a function of emitting white light and infrared light. The first filter has a function of absorbing infrared light and transmitting visible light. The second filter has a function of transmitting infrared light and absorbing visible light, a semiconductor device.
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