Method and apparatus for intra-block copy mode coding with search range switching

Abstract

To provide a method and an apparatus for an intra block copy coding mode.SOLUTION: A method includes extracting at least one syntax element from a video stream, associating the at least one syntax element with intra block copy (IBC) prediction of the video block, and determining an IBC reference mode for IBC prediction of the video block, and the BC reference mode includes one of an IBC-free mode, a local reference IBC mode, a non-local reference IBC mode, and a local and non-local reference IBC mode, and the method further includes generating a reconstructed sample of the video block from the video stream on the basis of the IBC reference mode.SELECTED DRAWING: Figure 27

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to U.S. Nonprovisional Patent Application No. 17 / 704,948, filed March 25, 2022, which claims the benefit of priority to U.S. Provisional Patent Application No. 63 / 245,665, entitled "Method and Apparatus for Intra Block Copy (IntraBC) Mode Coding with Search Range Switching," filed September 17, 2021. Both prior patent applications are incorporated herein by reference in their entireties.

[0002] TECHNICAL FIELD This disclosure relates generally to video coding, and more particularly to intra block copy coding modes. [Background technology]

[0003] The discussion of the background art provided herein is intended to generally present the context for the present disclosure. The inventors' work is not admitted expressly or implicitly as prior art to the present disclosure to the extent that that work is described in this background section, along with aspects of the description that may not otherwise be admitted as prior art at the time of filing of this application.

[0004] Video coding and decoding may be performed using inter-picture prediction with motion compensation. Uncompressed digital video may include a series of pictures, each with spatial dimensions of, for example, 1920 x 1080 luma samples and associated fully sampled or subsampled chroma samples. The series of pictures may have a fixed or variable picture rate (also called frame rate), for example, 60 pictures per second or 60 frames per second. Uncompressed video has specific bitrate requirements for streaming or data processing. For example, a video with a pixel resolution of 1920 x 1080, a frame rate of 60 frames per second, and 4:2:0 chroma subsampling with 8 bits per pixel per color channel requires a bandwidth approaching 1.5 Gbit / s. One hour of such video requires more than 600 GBytes of storage space.

[0005] One goal of video coding and video decoding is to reduce redundancy in an uncompressed input video signal through compression. Compression can help reduce the aforementioned bandwidth and / or storage space requirements, sometimes by more than two orders of magnitude. Both lossless and lossy compression, as well as combinations thereof, can be used. Lossless compression refers to techniques in which an exact copy of the original signal can be reconstructed from the compressed original signal through the decoding process. Lossy compression refers to a coding / decoding process in which the original video information is not fully preserved during coding and cannot be fully recovered during decoding. When using lossy compression, the reconstructed signal may not be identical to the original signal, but the distortion between the original and reconstructed signal is small enough to make the reconstructed signal useful for its intended purpose, even with some information loss. For video, lossy compression is widely adopted in many applications. The amount of tolerable distortion depends on the application. For example, users of certain consumer video streaming applications may tolerate higher distortion than users of film or television broadcast applications. The compression ratio achievable by a particular coding algorithm can be selected or adjusted to reflect different distortion tolerances. That is, generally, higher distortion tolerance allows for coding algorithms that result in higher losses and higher compression ratios.

[0006] Video encoders and decoders can utilize techniques from several broad categories and steps, including, for example, motion compensation, Fourier transforms, quantization, and entropy coding.

[0007] Video codec technology may include a technique known as intra-coding. In intra-coding, sample values are represented without reference to samples or other data from previously reconstructed reference pictures. In some video codecs, pictures are spatially subdivided into blocks of samples. If all blocks of samples are coded in intra mode, the picture may be called an intra-picture. Intra-pictures and their derivatives, such as independent decoder refresh pictures, can be used to reset the decoder state and therefore can be used as the first picture in a coded video bitstream and video session or as a still image. The samples of the intra-predicted block can then be transformed to the frequency domain, and the transform coefficients thus generated can be quantized before entropy coding. Intra-prediction refers to a technique that minimizes sample values in the pre-transform domain. In some cases, the smaller the DC value and AC coefficients after the transform, the fewer bits required for a given quantization step size to represent the block after entropy coding.

[0008] For example, traditional intra-coding, such as that known from MPEG-2 generation coding techniques, does not use intra-prediction. However, some newer video compression techniques include techniques that attempt to code / decode blocks based on surrounding sample data and / or metadata that precede the block of data being intra-coded or intra-decoded in decoding order, e.g., obtained during the coding and / or decoding of spatial neighbors. Such techniques are hereinafter referred to as "intra-prediction" techniques. Note that, at least in some cases, intra-prediction uses reference data only from the current picture being reconstructed, and not from other reference pictures.

[0009] Intra-prediction may take many different forms. When two or more such techniques are available in a given video coding technology, the technique used may be referred to as an intra-prediction mode. One or more intra-prediction modes may be provided in a particular codec. In certain cases, a mode may have sub-modes and / or may be associated with various parameters, and the mode / sub-mode information and the intra-coding parameters of a block of video may be coded separately or collectively included in the mode's codeword. The codeword used for a given mode, sub-mode, and / or parameter combination may affect coding efficiency gains via intra-prediction, and therefore may also affect the entropy coding technique used to convert the codeword into a bitstream.

[0010] Certain modes of intra prediction were introduced in H.264, refined in H.265, and further refined in newer coding techniques such as joint search model (JEM), versatile video coding (VVC), and benchmark set (BMS). In general, intra prediction can use available neighboring sample values to form a predictor block. For example, available values of a particular neighboring sample set along a particular direction and / or line can be copied into the predictor block. A reference to the direction used can be coded in the bitstream or can itself be predicted.

[0011] Referring to FIG. 1A, shown at the bottom right is a subset of nine predictor directions specified by the 33 possible intra-predictor directions of H.265 (corresponding to the 33 angle modes of the 35 intra-modes specified in H.265). The point where the arrows converge (101) represents the sample being predicted. The arrows represent the direction from which neighboring samples are used to predict sample 101. For example, arrow (102) indicates that sample (101) is predicted from one or more neighboring samples to the upper right, at an angle of 45 degrees from horizontal. Similarly, arrow (103) indicates that sample (101) is predicted from one or more neighboring samples to the lower left of sample (101), at an angle of 22.5 degrees from horizontal.

[0012] 1A, a square block (104) of 4x4 samples (indicated by a thick dashed line) is depicted in the upper left. The square block (104) contains 16 samples, each labeled with "S," its position in the Y dimension (e.g., row index), and its position in the X dimension (e.g., column index). For example, sample S21 is the second sample (from the top) in the Y dimension and the first sample (from the left) in the X dimension. Similarly, sample S44 is the fourth sample in both the Y and X dimensions within the block (104). Because the size of the block is 4x4 samples, S44 is located in the lower right. Also shown are examples of reference samples that follow a similar numbering scheme. The reference samples are labeled R, their Y position (e.g., row index) and X position (column index) relative to the block (104). Both H.264 and H.265 use predicted samples that neighbor the block being reconstructed.

[0013] Intra-picture prediction of block 104 may begin by copying reference sample values from neighboring samples according to a signaled prediction direction. For example, assume that the coded video bitstream includes signaling for this block 104 indicating the prediction direction of the arrow (102), i.e., the sample is predicted from one or more prediction samples to the upper right, at a 45-degree angle from the horizontal. In such a case, samples S41, S32, S23, and S14 are predicted from the same reference sample R05. Then, sample S44 is predicted from reference sample R08.

[0014] In certain cases, the values of multiple reference samples may be combined, for example by interpolation, to calculate a reference sample, especially when the direction is not evenly divisible by 45 degrees.

[0015] The number of possible directions has increased as video coding technology continues to develop. In H.264 (2003), for example, nine different directions are available for intra prediction. This increased to 33 in H.265 (2013), and JEM / VVC / BMS can support up to 65 directions as of the time of this disclosure. Experimental studies have been conducted to help identify the most appropriate intra prediction directions, and these most appropriate directions can be coded with fewer bits using specific techniques of entropy coding, accepting a specific bit penalty for the direction. Furthermore, the direction itself may be predictable from neighboring directions used in the intra prediction of decoded neighboring blocks.

[0016] FIG. 1B shows a schematic diagram (180) showing 65 intra-prediction directions according to JEM to illustrate the increasing number of prediction directions in various encoding techniques that have evolved over time.

[0017] Methods for mapping bits representing intra-prediction directions to prediction directions in a coded video bitstream can vary between video coding techniques and can range, for example, from simple direct mappings of prediction directions to intra-prediction modes to complex adaptive schemes including codewords, most-probable modes, and similar techniques. However, in all cases, there may be certain directions of intra-prediction that are statistically less likely to occur in the video content than certain other directions. Because the goal of video compression is to reduce redundancy, in a well-designed video coding technique, these less-probable directions may be represented with more bits than more-probable directions.

[0018] Inter-picture prediction, or inter-prediction, may be based on motion compensation. In motion compensation, sample data from a previously reconstructed picture or part thereof (reference picture) may be used to predict a newly reconstructed picture or picture part (e.g., block) after being spatially shifted in a direction indicated by a motion vector (hereinafter MV). In some cases, the reference picture may be the same as the picture currently being reconstructed. The MV may have two dimensions, X and Y, or three dimensions, with the third dimension being an indication of the reference picture to be used (similar to the temporal dimension).

[0019] In some video compression techniques, a current MV applicable to a particular area of sample data can be predicted from other MVs, e.g., from other MVs related to other areas of sample data that are spatially adjacent to the area being reconstructed and precede the current MV in decoding order. Doing so can significantly reduce the overall amount of data required to code the MV by relying on the removal of redundancy in correlated MVs, thereby increasing compression efficiency. MV prediction can work effectively because, for example, when coding an input video signal derived from a camera (known as natural video), areas larger than the area to which a single MV is applicable have a statistical likelihood of moving in a similar direction in the video sequence and therefore, in some cases, can be predicted using similar motion vectors derived from MVs in neighboring areas. As a result, the actual MV of a given area is similar or identical to the MV predicted from the surrounding MVs. Such MVs can further be represented, after entropy coding, with fewer bits than would be used if the MV were coded directly rather than predicted from one or more neighboring MVs. In some cases, MV prediction can be an example of lossless compression of a signal (i.e., an MV) derived from an original signal (i.e., a sample stream). In other cases, the MV prediction itself may be lossy, for example due to rounding errors when computing the predictor from several surrounding MVs.

[0020] Various MV prediction mechanisms are described in H.265 / HEVC (ITU-T Rec. H.265, "High Efficiency Video Coding", December 2016). Among the many MV prediction mechanisms specified by H.265, the one described below is a technique hereafter referred to as "spatial merging".

[0021] Specifically, referring to Figure 2, a current block (201) contains samples that the encoder found during the motion search process to be predictable from a previous block of the same size but spatially shifted. Instead of coding its MV directly, the MV can be derived from metadata associated with one or more reference pictures, e.g., the last reference picture (in decoding order), using the MV associated with any one of five surrounding samples represented by A0, A1, and B0, B1, B2 (202 to 206, respectively). In H.265, MV prediction can use predictors from the same reference picture as neighboring blocks. Summary of the Invention [Means for solving the problem]

[0022] TECHNICAL FIELD Aspects of this disclosure relate generally to video coding, and more particularly to intra block copy coding modes. In some example implementations, TBD.

[0023] Aspects of the present disclosure also provide a video coding or decoding device or apparatus that includes circuitry configured to perform any of the above method implementations.

[0024] Aspects of the present disclosure also provide a non-transitory computer-readable medium storing instructions that, when executed by a computer, cause the computer to perform a method for video decoding and / or video encoding.

[0025] Further features, nature and various advantages of the disclosed subject matter will become more apparent from the following detailed description and accompanying drawings. [Brief explanation of the drawings]

[0026] [Figure 1A] 1 shows a schematic diagram of an exemplary subset of intra-prediction direction modes. [Figure 1B] 1 shows a diagram of a typical intra-prediction direction. [Figure 2] 1 shows a schematic diagram of a target block and spatial merge candidates around the target block used for motion vector prediction in one example. [Figure 3] FIG. 3 is a schematic diagram illustrating a simplified block diagram of a communication system (300) according to an exemplary embodiment. [Figure 4] FIG. 4 is a schematic diagram illustrating a simplified block diagram of a communication system (400) according to an exemplary embodiment. [Figure 5] FIG. 2 is a schematic diagram illustrating a simplified block diagram of a video decoder according to an example embodiment. [Figure 6] FIG. 1 is a schematic diagram illustrating a simplified block diagram of a video encoder according to an example embodiment. [Figure 7] FIG. 2 is a block diagram illustrating a video encoder according to another example embodiment. [Figure 8] FIG. 2 is a block diagram illustrating a video decoder according to another example embodiment. [Figure 9] FIG. 1 illustrates a coding block partitioning scheme according to an exemplary embodiment of the present disclosure. [Figure 10] FIG. 10 illustrates another scheme for coding block partitioning according to an exemplary embodiment of the present disclosure. [Figure 11] FIG. 10 illustrates another scheme for coding block partitioning according to an exemplary embodiment of the present disclosure. [Figure 12] FIG. 1 illustrates an example of division of a base block into coding blocks according to an exemplary division scheme. [Figure 13] FIG. 1 illustrates an exemplary division-of-thirds scheme. [Figure 14] FIG. 2 illustrates an exemplary quadtree / binary tree coding block partitioning scheme. [Figure 15] 1A and 1B illustrate a scheme for dividing a coding block into multiple transform blocks and the coding order of the transform blocks according to an exemplary embodiment of the present disclosure. [Figure 16]10A and 10B illustrate another scheme for dividing a coding block into multiple transform blocks and the coding order of the transform blocks according to an exemplary embodiment of the present disclosure. [Figure 17] FIG. 10 illustrates another scheme for dividing a coding block into multiple transform blocks, according to an exemplary embodiment of the present disclosure. [Figure 18] FIG. 1 illustrates the concept of intra block copying (IBC), which uses a reconstructed coding block within the same frame to predict a current coding block. [Figure 19] FIG. 10 illustrates an exemplary reconstructed sample that can be used as a reference sample for IBC. [Figure 20] FIG. 1 illustrates an exemplary reconstructed sample that can be used as a reference sample for an IBC with some exemplary limitations. [Figure 21] FIG. 1 illustrates an exemplary on-chip reference sample memory (RSM) update mechanism of an IBC. [Figure 22] FIG. 22 illustrates a spatial view of the example on-chip RSM update mechanism of FIG. 21. [Figure 23] FIG. 1 illustrates another exemplary on-chip reference sample memory (RSM) update mechanism of an IBC. [Figure 24] 10A-10C illustrate a comparison of spatial diagrams of an exemplary RSM update mechanism of IBC for horizontally and vertically partitioned superblocks. [Figure 25] 1 illustrates exemplary non-local and local search regions for IBC reference blocks. [Figure 26] FIG. 1 illustrates an example of restricting the location of reference blocks in an IBC using both local and non-local reference block search areas. [Figure 27] 1 is a flowchart illustrating a method according to an exemplary embodiment of the present disclosure. [Figure 28] FIG. 1 is a schematic diagram illustrating a computer system according to an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0027] The present invention will now be described in detail below with reference to the accompanying drawings, which form a part hereof, and which show, by way of illustration, specific embodiments of the invention. It should be noted, however, that the invention may be embodied in a variety of different forms, and thus, the subject matter encompassed or claimed should not be construed as being limited to any of the embodiments set forth below. It should also be noted that the present invention may be embodied as a method, apparatus, component, or system. Thus, embodiments of the present invention may take the form of, for example, hardware, software, firmware, or any combination thereof.

[0028] Throughout this specification and claims, terms may have nuanced meanings suggested or implied in context beyond their explicitly stated meaning. The phrases "in one embodiment" or "in some embodiments" used herein do not necessarily refer to the same embodiment, and the phrases "in another embodiment" or "in other embodiments" used herein do not necessarily refer to different embodiments. Similarly, the phrases "in one implementation" or "in some implementations" used herein do not necessarily refer to the same implementation, and the phrases "in another implementation" or "in other implementations" used herein do not necessarily refer to different implementations. For example, the claimed subject matter is intended to include all or some combinations of the example embodiments / implementations.

[0029] Generally, terms can be understood, at least in part, from their usage in context. For example, terms such as "and," "or," or "and / or" as used herein can include a variety of meanings that can depend, at least in part, on the context in which such terms are used. Typically, "or," when used to relate a list such as A, B, or C, is intended to mean A, B, and C, which are used herein in an inclusive sense, as well as A, B, or C, which are used herein in an exclusive sense. Furthermore, the terms "one or more" or "at least one" as used herein can be used to describe any feature, structure, or characteristic in a singular sense, or can be used to describe a combination of features, structures, or characteristics in a plural sense, depending, at least in part, on the context. Similarly, terms such as "a," "an," or "the" can also be understood to convey singular usage or plural usage, depending, at least in part, on the context. Furthermore, it is understood that the terms "based on" or "determined by" are not necessarily intended to convey an exclusive set of factors, but instead may allow for the existence of additional factors not necessarily explicitly described, again depending, at least in part, on the context.

[0030] Figure 3 shows a simplified block diagram of a communication system (300) according to one embodiment of the present disclosure. The communication system (300) includes, for example, multiple terminal devices that can communicate with each other via a network (350). For example, the communication system (300) includes a first pair of terminal devices (310) and (320) interconnected via the network (350). In the example of Figure 3, the first pair of terminal devices (310) and (320) may perform unidirectional transmission of data. For example, the terminal device (310) may code video data (e.g., a stream of video pictures captured by the terminal device (310)) for transmission to the other terminal device (320) via the network (350). The encoded video data may be transmitted in the form of one or more coded video bitstreams. The terminal device (320) may receive the coded video data from the network (350), decode the coded video data to reconstruct the video pictures, and display the video pictures according to the reconstructed video data. Unidirectional data transmission may be implemented, for example, in media serving applications.

[0031] In another example, the communication system (300) includes a second pair of terminal devices (330) and (340) performing bidirectional transmission of coded video data, which may be implemented, for example, during video conferencing applications. For the bidirectional transmission of data, in one example, each of the terminal devices (330) and (340) may code video data (e.g., of a stream of video pictures captured by that terminal device) for transmission to the other of the terminal devices (330) and (340) over the network (350). Each of the terminal devices (330) and (340) may also receive coded video data transmitted by the other of the terminal devices (330) and (340), decode the coded video data to reconstruct the video pictures, and display the video pictures on an accessible display device according to the reconstructed video data.

[0032] In the example of FIG. 3 , terminal devices 310, 320, 330, and 340 may be embodied as a server, a personal computer, and a smartphone, although the applicability of the principles underlying this disclosure is not so limited. Embodiments of the present disclosure may be implemented in desktop computers, laptop computers, tablet computers, media players, wearable computers, dedicated video conferencing equipment, and the like. Network 350 represents any number and type of network that conveys coded video data between terminal devices 310, 320, 330, and 340, including, for example, wired and / or wireless communication networks. Communication network 350 may exchange data over circuit-switched channels, packet-switched channels, and / or other types of channels. Exemplary networks include telecommunications networks, local area networks, wide area networks, and / or the Internet. For purposes of this discussion, the architecture and topology of network 350 may not be important to the operation of this disclosure unless explicitly described herein.

[0033] 4 illustrates the arrangement of a video encoder and a video decoder in a video streaming environment as an example of an application of the disclosed subject matter. The disclosed subject matter may be equally applied to other video-enabled applications including, for example, video conferencing, digital television broadcasting, gaming, virtual reality, storage of compressed video on digital media including CDs, DVDs, memory sticks, etc.

[0034] A video streaming system may include a video source (401), such as a video capture subsystem (413), which may include a digital camera, for creating a stream of uncompressed video pictures or images (402). In one example, the stream of video pictures (402) includes samples recorded by the digital camera of the video source 401. The stream of video pictures (402), shown in bold to emphasize its high data volume compared to the encoded video data (404) (or coded video bitstream), may be processed by an electronic device (420) including a video encoder (403) coupled to the video source (401). The video encoder (403) may include hardware, software, or a combination thereof to enable or implement aspects of the disclosed subject matter, as described in more detail below. The encoded video data (404) (or encoded video bitstream (404)), shown with thin lines to emphasize its low data volume compared to the stream of uncompressed video pictures (402), may be stored directly on the streaming server (405) or on a downstream video device (not shown) for future use. One or more streaming client subsystems, such as the client subsystems (406) and (408) of FIG. 4, can access the streaming server (405) to obtain copies (407) and (409) of the encoded video data (404). The client subsystem (406) may include a video decoder (410), for example, within the electronic device (430). The video decoder (410) decodes the input copy of the encoded video data (407) and creates an output stream of video pictures (411) that is uncompressed and can be rendered on a display (412) (e.g., a display screen) or other rendering device (not shown). The video decoder 410 may be configured to perform some or all of the various functions described in this disclosure.In some streaming systems, the encoded video data (404), (407), and (409) (e.g., video bitstreams) may be encoded according to a particular video coding / compression standard. Examples of such standards include ITU-T Recommendation H.265. In one example, a video coding standard under development is informally known as Versatile Video Coding (VVC). The disclosed subject matter may be used in the context of VVC, as well as other video coding standards.

[0035] It should be noted that the electronics (420) and (430) may include other components (not shown). For example, the electronics (420) may include a video decoder (not shown), and the electronics (430) may also include a video encoder (not shown).

[0036] 5 shows a block diagram of a video decoder (510) according to any of the following embodiments of the present disclosure. The video decoder (510) can be included in an electronic device (530). The electronic device (530) can include a receiver (531) (e.g., receiving circuitry). The video decoder (510) can be used in place of the video decoder (410) in the example of FIG. 4.

[0037] The receiver (531) may receive one or more coded video sequences to be decoded by the video decoder (510). In the same or another embodiment, one coded video sequence may be decoded at a time, with the decoding of each coded video sequence being independent of other coded video sequences. Each video sequence may be associated with multiple video frames or images. The coded video sequences may be received from a channel (501), which may be a hardware / software link to a storage device that stores the encoded video data or a streaming source that transmits the encoded video data. The receiver (531) may receive the coded video data along with other data, such as coded audio data and / or auxiliary data streams, which may be forwarded to respective processing circuits (not shown). The receiver (531) may separate the coded video sequences from other data. To combat network jitter, a buffer memory (515) may be located between the receiver (531) and the entropy decoder / parser (520) (hereinafter "parser (520)"). In certain applications, the buffer memory (515) may be implemented as part of the video decoder (510). In other applications, the buffer memory (515) may be separate and external to the video decoder (510) (not shown). In still other applications, there may be a buffer memory (not shown) external to the video decoder (510), for example, to combat network jitter, and there may be another buffer memory (515) internal to the video decoder (510), for example, to handle playback timing. When the receiver (531) is receiving data from a storage / forwarding device with sufficient bandwidth and controllability or from an isosynchronous network, the buffer memory (515) may be unnecessary or may be small. For use with best-effort packet networks such as the Internet, a sufficiently sized buffer memory (515) may be required, and its size may be relatively large.Such buffer memory may be implemented with an adaptive size and may be implemented at least in part in an operating system or similar element (not shown) external to the video decoder (510).

[0038] The video decoder (510) may include a parser (520) to recover symbols (521) from the coded video sequence. These categories of symbols include information used to manage the operation of the video decoder (510) and, potentially, information for controlling a rendering device, such as a display (512) (e.g., a display screen) that may or may not be an integral part of the electronic device (530), but may be coupled to the electronic device (530), as shown in Figure 5. Control information for the rendering device(s) may be included in supplemental enhancement information (SEI) messages or video usability information (VUI) messages. The parser (520) may parse / entropy decode the coded video sequence received by the parser (520). The entropy coding of the coded video sequence may be in the form of a variable length coding (VUI) parameter set fragment (not shown). The parser (520) may parse / entropy decode the coded video sequence received by the parser (520). The entropy coding of the coded video sequence may be in accordance with a video coding technique or standard and may be in accordance with various principles, including variable length coding, Huffman coding, arithmetic coding with or without context-sensitivity, etc. The parser (520) may extract from the coded video sequence a set of subgroup parameters for at least one of the subgroups of pixels in the video decoder based on at least one parameter corresponding to the subgroup. The subgroups may include Groups of Pictures (GOPs), pictures, tiles, slices, macroblocks, coding units (CUs), blocks, transform units (TUs), prediction units (PUs), etc. The parser (520) may also extract information from the coded video sequence, such as transform coefficients (e.g., Fourier transform coefficients), quantization parameter values, motion vectors, etc.

[0039] The analyzer (520) can perform entropy decoding / analysis operations on the video sequence received from the buffer memory (515) to produce symbols (521).

[0040] The reconstruction of the symbols (521) may involve several different processing or functional units, depending on the type of video picture or portion thereof being coded (inter-picture and intra-picture, inter-block and intra-block, etc.), as well as other factors. The units that are included and how they are included may be controlled by subgroup control information parsed from the coded video sequence by the parser (520). The flow of such subgroup control information between the parser (520) and the following several processing or functional units is not shown for the sake of simplicity.

[0041] In addition to the functional blocks already mentioned, the video decoder (510) may be conceptually subdivided into several functional units, as described below. In an actual implementation operating under commercial constraints, many of these functional units may interact closely with each other and may be, at least partially, integrated with each other. However, to clearly explain the various functions of the disclosed subject matter, the following disclosure will adopt a conceptual subdivision into functional units.

[0042] The first unit may include a scalar / inverse transform unit (551), which may receive quantized transform coefficients as well as control information from the parser (520) including information indicating which type of inverse transform to use, block size, quantization coefficients / parameters, quantization scaling matrices, etc. as symbol(s) (521). The scalar / inverse transform unit (551) may output blocks containing sample values that can be input to an aggregator (555).

[0043] In some cases, the output samples of the scaler / inverse transform (551) may relate to intra-coded blocks, i.e., blocks that do not use prediction information from a previously reconstructed picture but can use prediction information from a previously reconstructed portion of the current picture. Such prediction information may be provided by the intra-picture prediction unit (552). In some cases, the intra-picture prediction unit (552) may generate blocks of the same size and shape as the block being reconstructed using information from surrounding blocks that have already been reconstructed and stored in the current picture buffer (558). The current picture buffer (558), for example, buffers the partially reconstructed and / or fully reconstructed current picture. In some implementations, the aggregator (555) may add, on a sample-by-sample basis, the prediction information generated by the intra-prediction unit (552) to the output sample information provided by the scaler / inverse transform unit (551).

[0044] In other cases, the output samples of the scalar / inverse transform unit (551) may relate to an inter-coded, potentially motion-compensated, block. In such cases, the motion-compensated prediction unit (553) may access a reference picture memory (557) to fetch samples used for inter-picture prediction. After motion-compensating the fetched samples according to the symbols (521) associated with the block, these samples may be added to the output of the scalar / inverse transform unit (551) by an aggregator (555) to generate output sample information (the output of unit 551 may be referred to as a residual sample or residual signal). The address in the reference picture memory (557) from which the motion-compensated prediction unit (553) fetches the prediction samples may be controlled by a motion vector, available to the motion-compensated prediction unit (553) in the form of a symbol (521), which may have, for example, an X component, a Y component (shift), and a reference picture component (time). Motion compensation may also include interpolation of sample values fetched from the reference picture memory (557) when sub-sample accurate motion vectors are used, and may be associated with a motion vector prediction mechanism, etc.

[0045] The output samples of the aggregator (555) may be subjected to various loop filtering techniques in a loop filter unit (556). Video compression techniques are controlled by parameters contained in the coded video sequence (also referred to as the coded video bitstream) and may include in-loop filtering techniques available to the loop filter unit (556) as symbols (521) from the parser (520), but may also be responsive to meta-information obtained during decoding of a coded picture or previous portion of the coded video sequence (in decoding order), or to previously reconstructed, loop-filtered sample values. As described in more detail below, several types of loop filters may be included as part of the loop filter unit 556, in various orders.

[0046] The output of the loop filter unit (556) may be a sample stream that can be output to a rendering device (512) and also stored in a reference picture memory (557) for use in future inter-picture prediction.

[0047] Once a particular coded picture is fully reconstructed, it can be used as a reference picture for future inter-picture prediction. For example, once the coded picture corresponding to the current picture is fully reconstructed and the coded picture is identified as a reference picture (e.g., by the parser (520)), the current picture buffer (558) can become part of the reference picture memory (557), and any unused current picture buffer can be reallocated before beginning reconstruction of the next coded picture.

[0048] The video decoder (510) may perform decoding operations according to a predetermined video compression technique adopted in a standard such as ITU-T Rec. H.265. A coded video sequence may conform to the syntax specified by the video compression technique or standard being used, in the sense that the coded video sequence adheres to both the syntax of the video compression technique or standard and the profile documented in the video compression technique or standard. Specifically, a profile may select specific tools from among all tools available in the video compression technique or standard as tools intended for use only under that profile. To comply with a standard, the complexity of the coded video sequence may be within a range defined by a level of the video compression technique or standard. In some cases, the level limits the maximum picture size, maximum frame rate, maximum reconstruction sample rate (e.g., measured in megasamples per second), maximum reference picture size, etc. The limits set by the level may, in some cases, be further limited by a hypothetical reference decoder (HRD) specification and metadata for HRD buffer management signaled in the coded video sequence.

[0049] In some exemplary embodiments, the receiver (531) may receive additional (redundant) data along with the encoded video. The additional data may be included as part of the coded video sequence(s). The additional data may be used by the video decoder (510) to properly decode the data and / or to more accurately recover the original video data. The additional data may be in the form of, for example, temporal, spatial, or signal-to-noise ratio (SNR) enhancement layers, redundant slices, redundant images, forward error correction codes, etc.

[0050] 6 shows a block diagram of a video encoder (603) according to an exemplary embodiment of the present disclosure. The video encoder (603) may be included in an electronic device (620). The electronic device (620) may further include a transmitter (640) (e.g., a transmitting circuit). The video encoder (603) may be used in place of the video encoder (403) in the example of FIG.

[0051] The video encoder (603) may receive video samples from a video source (601) (which, in the example of FIG. 6, is not part of the electronic device (620)), which may capture video image(s) to be coded by the video encoder (603). In another example, the video source (601) may be implemented as part of the electronic device (620).

[0052] The video source (601) may provide a source video sequence to be coded by the video encoder (603) in the form of a digital video sample stream that can be of any suitable bit depth (e.g., 8-bit, 10-bit, 12-bit, ...), any color space (e.g., BT.601 Y CrCb, RGB, XYZ, ...), and any suitable sampling structure (e.g., Y CrCb 4:2:0, Y CrCb 4:4:4). In a media serving system, the video source (601) may be a storage device that can store previously prepared video. In a video conferencing system, the video source (601) may be a camera that captures local image information as a video sequence. The video data may be provided as multiple individual pictures or images that impart motion when viewed in sequence. The picture itself may be organized as a spatial array of pixels, each of which may contain one or more samples, depending on the sampling structure, color space, etc., used. Those skilled in the art can readily understand the relationship between pixels and samples. The following description focuses on samples.

[0053] According to some example embodiments, the video encoder (603) may code and compress pictures of a source video sequence into a coded video sequence (643) in real time or under any other time constraints required by the application. Enforcing an appropriate coding rate constitutes one function of the controller (650). In some embodiments, the controller (650) may be functionally coupled to and control other functional units, as described below. For simplicity, coupling is not shown. Parameters set by the controller (650) may include rate control-related parameters (picture skip, quantizer, lambda value for rate-distortion optimization techniques, etc.), picture size, group of pictures (GOP) layout, maximum motion vector search range, etc. The controller (650) may be configured with other appropriate functions associated with the video encoder (603) optimized for a particular system design.

[0054] In some example embodiments, the video encoder (603) may be configured to operate in a coding loop. As an overly simplified explanation, in one example, the coding loop may include a source coder (630) (e.g., responsible for creating symbols, such as a symbol stream, based on an input picture to be coded and one or more reference pictures) and a (local) decoder (633) embedded in the video encoder (603). The decoder (633) reconstructs the symbols to create sample data in a manner similar to that which a (remote) decoder would create, even if the embedded decoder 633 processes the video stream coded by the source coder 630 without entropy coding (because in the video compression techniques contemplated by the disclosed subject matter, any compression between the symbols and the coded video bitstream may be lossless). The reconstructed sample stream (sample data) is input to a reference picture memory (634). Because decoding the symbol stream leads to bit-accurate results regardless of the decoder's location (local or remote), the contents in the reference picture memory (634) are also bit-accurate between the local and remote encoders. In other words, the predictive portion of the encoder "sees" the exact same sample values for reference picture samples that the decoder will "see" when using prediction during decoding. This fundamental principle of reference picture synchrony (and the resulting drift if synchrony cannot be maintained, for example, due to channel error) is used to improve coding quality.

[0055] The operation of the "local" decoder (633) may be the same as the operation of a "remote" decoder, such as the video decoder (510), already described in detail above in conjunction with Figure 5. Referring also briefly to Figure 5, however, because symbols are available and the encoding / decoding of symbols into a coded video sequence by the entropy coder (645) and parser (520) may be lossless, the entropy decoding portion of the video decoder (510), including the buffer memory (515) and parser (520), may not be fully implemented in the local decoder (633) within the encoder.

[0056] At this point, it can be said that any decoder technology, except for parsing / entropy decoding, which may only exist in the decoder, may also necessarily need to exist in the corresponding encoder in substantially the same functional form. For this reason, the subject matter of the disclosure may focus on the decoder operation, which is similar to the decoding part of the encoder. Therefore, a description of the encoder technology can be omitted, since it is the reverse of the decoder technology described comprehensively. Only in certain areas or aspects will a more detailed description of the encoder be provided below.

[0057] In operation, in some example implementations, the source coder (630) may perform motion-compensated predictive coding, which predictively codes an input picture with reference to one or more previously coded pictures from a video sequence designated as “reference pictures.” In this manner, the coding engine (632) codes color channel differences (or residuals) between pixel blocks of the input picture and pixel blocks of reference picture(s) that may be selected as prediction reference(s) for the input picture. The terms “residue” and its adjective form “residual” may be used interchangeably.

[0058] The local video decoder (633) can decode coded video data of pictures that may be designated as reference pictures based on symbols created by the source coder (630). The operation of the coding engine (632) may advantageously be a lossy process. When the coded video data is decoded by a video decoder (not shown in FIG. 6), the reconstructed video sequence may typically be a replica of the source video sequence, with some errors. The local video decoder (633) may replicate the decoding process that may be performed by the video decoder on the reference pictures and store the reconstructed reference pictures in a reference picture cache (634). In this way, the video encoder (603) may locally store copies of reconstructed reference pictures that have common content with reconstructed reference pictures obtained by a far-end (remote) video decoder (without transmission errors).

[0059] The predictor (635) may perform the prediction search for the coding engine (632). That is, for a new picture to be coded, the predictor (635) may search the reference picture memory (634) for sample data (as candidate reference pixel blocks) or specific metadata, such as reference picture motion vectors, block shapes, etc., that can serve as appropriate prediction references for the new picture. The predictor (635) may operate on sample blocks, pixel blocks at a time, to find appropriate prediction references. In some cases, as determined by search results obtained by the predictor (635), the input image may have prediction references drawn from multiple reference pictures stored in the reference picture memory (634).

[0060] The controller (650) can manage the coding operations of the source coder (630), including, for example, setting the parameters and subgroup parameters used to encode the video data.

[0061] The output of all the aforementioned functional units can undergo entropy coding in an entropy coder (645), which converts the symbols produced by the various functional units into a coded video sequence by lossless compression of the symbols according to techniques such as Huffman coding, variable length coding, arithmetic coding, etc.

[0062] The transmitter (640) can buffer the coded video sequence produced by the entropy coder (645) and prepare it for transmission over a communication channel (660), which can be a hardware / software link to a storage device that stores the coded video data. The transmitter (640) can merge the coded video data from the video coder (603) with other data to be transmitted, such as coded audio data and / or auxiliary data streams (sources not shown).

[0063] The controller (650) can manage the operation of the video coder (603). During coding, the controller (650) can assign a particular coded picture type to each coded picture, which may affect the coding technique that can be applied to the respective picture. For example, images are often assigned as one of the following image formats:

[0064] It should be noted that an intra-picture (I-picture) may be one that can be coded and decoded without relying on other pictures in the sequence for prediction. Some video codecs allow different types of intra-pictures, including, for example, independent decoder refresh ("IDR") pictures. Those skilled in the art are aware of these variations of I-pictures and their respective uses and characteristics.

[0065] A predicted image (P-image) may be one that can be coded and decoded using intra- or inter-prediction, which uses at most one motion vector and reference index to predict the sample values of each block.

[0066] A bidirectionally predicted image (B-image) may be one that can be coded and decoded using intra- or inter-prediction, which uses up to two motion vectors and reference indices to predict the sample values of each block. Similarly, multiple predicted images may use more than two reference pictures and associated metadata for the reconstruction of a single block.

[0067] A source picture is generally spatially subdivided into multiple sample coding blocks (e.g., blocks of 4x4, 8x8, 4x8, or 16x16 samples each) and may be coded block by block. Blocks may be predictively coded with reference to other (already coded) blocks as determined by the coding assignment applied to the block's respective picture. For example, blocks of an I-picture may be non-predictively coded or predictively coded with reference to already coded blocks of the same picture (spatial prediction or intra-prediction). Pixel blocks of a P-picture may be predictively coded via spatial prediction or via temporal prediction with reference to one previously coded reference picture. Blocks of a B-picture may be predictively coded by spatial prediction or by temporal prediction with reference to one or two previously coded reference pictures. Source pictures or intermediate processed pictures may also be subdivided into other types of blocks for other purposes. The division of coding blocks and other types of blocks may or may not follow the same method, as described in more detail below.

[0068] The video encoder (603) may perform coding operations in accordance with a predetermined video coding technique or standard, such as ITU-T Rec. H.265. In its operations, the video encoder (603) may perform various compression operations, including predictive coding operations that exploit temporal and spatial redundancies in the input video sequence. Thus, the coded video data may conform to a syntax specified by the video coding technique or standard being used.

[0069] In some exemplary embodiments, the transmitter (640) may transmit additional data along with the encoded video. The source coder (630) may include such data as part of the coded video sequence. The additional data may include temporal / spatial / SNR enhancement layers, other forms of redundant data such as redundant pictures or slices, SEI messages, VUI parameter set fragments, etc.

[0070] Video may be captured in time sequence as multiple source pictures (video pictures). Intra-picture prediction (often abbreviated as intra-prediction) exploits spatial correlation within a given picture, while inter-picture prediction exploits temporal or other correlation between pictures. For example, a particular picture being encoded / decoded, called the current picture, may be divided into blocks. If a block in the current picture resembles a reference block in a previously coded, yet-buffered reference picture in the video, it may be coded by a vector called a motion vector. A motion vector points to a reference block within the reference picture and may have a third dimension that identifies the reference picture if multiple reference pictures are used.

[0071] In some exemplary embodiments, bi-prediction techniques can be used for inter-picture prediction. According to such bi-prediction techniques, two reference pictures, such as a first reference picture and a second reference picture, are used, both of which advance the current picture in the video in decoding order (but may be in the past or future, respectively, in display order). A block in the current picture can be coded by a first motion vector pointing to a first reference block in the first reference picture and a second motion vector pointing to a second reference block in the second reference picture. A block can be jointly predicted by a combination of the first reference block and the second reference block.

[0072] Additionally, merge mode techniques may be used to improve coding efficiency in inter-picture prediction.

[0073] According to some exemplary embodiments of the present disclosure, prediction, such as inter-picture prediction and intra-picture prediction, is performed on a block-by-block basis. For example, a picture in a sequence of video pictures is divided into coding tree units (CTUs) for compression, and the CTUs within a picture may have the same size, such as 64×64 pixels, 32×32 pixels, or 16×16 pixels. Generally, a CTU may include three parallel coding tree blocks (CTBs), i.e., one luma CTB and two chroma CTBs. Each CTU may be recursively quadtree-divided into one or more coding units (CUs). For example, a 64×64 pixel CTU may be divided into one CU of 64×64 pixels or four CUs of 32×32 pixels. One or more of the 32×32 blocks may each be further divided into four CUs of 16×16 pixels. In some exemplary embodiments, each CU may be analyzed during encoding to determine the prediction type of that CU from various prediction types, such as inter prediction and intra prediction. A CU may be divided into one or more prediction units (PUs) according to temporal and / or spatial predictability. Generally, each PU includes one luma prediction block (PB) and two chroma PBs. In one embodiment, prediction operations in coding (encoding / decoding) are performed on a prediction block basis. The division of a CU into PUs (or PBs of different color channels) may be performed in various spatial patterns. A luma PB or a chroma PB may include a matrix of sample values (e.g., luma values), such as 8x8 pixels, 16x16 pixels, 8x16 pixels, 16x8 pixels, etc.

[0074] 7 shows a diagram of a video encoder (703) according to another exemplary embodiment of this disclosure. The video encoder (703) is configured to receive a processed block (e.g., a predictive block) of sample values in a current video picture in a sequence of video pictures and encode the processed block into a coded picture that is part of a coded video sequence. The exemplary video encoder (703) may be used in place of the example video encoder (403) of FIG. 4.

[0075] For example, the video encoder (703) receives a matrix of sample values for a processing block, such as a predictive block of 8x8 samples. The video encoder (703) then determines, for example, using rate-distortion optimization (RDO), whether the processing block is best coded using intra-mode, inter-mode, or bi-predictive mode. If it is determined that the processing block is coded in intra-mode, the video encoder (703) may encode the processing block into a coded picture using intra-prediction techniques, and if it is determined that the processing block is coded in inter-mode or bi-predictive mode, the video encoder (703) may encode the processing block into a coded picture using inter-prediction techniques or bi-prediction techniques, respectively. In some exemplary embodiments, a merge mode may be used as a sub-mode of inter-picture prediction, in which motion vectors are derived from one or more motion vector predictors without the benefit of coded motion vector components outside the predictors. In some other exemplary embodiments, there may be motion vector components applicable to the current block. Thus, the video encoder (703) may include components not explicitly shown in FIG. 7, such as a mode decision module, to determine the prediction mode of a processing block.

[0076] In the example of Figure 7, the video encoder (703) includes an inter-encoder (730), an intra-encoder (722), a residual calculator (723), a switch (726), a residual encoder (724), a general-purpose controller (721), and an entropy encoder (725), which are coupled to each other as shown in the exemplary configuration of Figure 7.

[0077] The inter-encoder (730) is configured to receive samples of a current block (e.g., a processing block), compare the block to one or more reference blocks in a reference picture (e.g., blocks in previous and subsequent pictures in display order), generate inter-prediction information (e.g., a description of redundancy information, motion vectors, merge mode information according to the inter-encoding technique), and calculate an inter-prediction result (e.g., a predicted block) based on the inter-prediction information using any suitable technique. In some examples, the reference picture is a decoded reference picture decoded based on video information encoded using a decoding unit 633 incorporated in the example encoder 620 of FIG. 6 (shown as residual decoder 728 of FIG. 7, as described in further detail below).

[0078] The intra encoder (722) is configured to receive samples of a current block (e.g., a processing block), compare the block with previously coded blocks in the same picture, generate transformed quantized coefficients, and possibly also generate intra prediction information (e.g., intra prediction direction information according to one or more intra encoding techniques). The intra encoder (722) may calculate intra prediction results (e.g., predicted blocks) based on the intra prediction information and reference blocks in the same picture.

[0079] The general-purpose controller (721) may be configured to determine general-purpose control data and control other components of the video encoder (703) based on the general-purpose control data. In one example, the general-purpose controller (721) determines a prediction mode for a block and provides a control signal to the switch (726) based on the prediction mode. For example, if the prediction mode is intra-mode, the general-purpose controller (721) controls the switch (726) to select an intra-mode result for use by the residual calculator (723) and to control the entropy encoder (725) to select intra-prediction information and include the intra-prediction information in the bitstream. If the predicate mode of the block is inter-mode, the general-purpose controller (721) controls the switch (726) to select an inter-prediction result for use by the residual calculator (723) and to control the entropy encoder (725) to select inter-prediction information and include the inter-prediction information in the bitstream.

[0080] The residual calculator (723) may be configured to calculate the difference (residual data) between a received block and a prediction result for a block selected from the intra-encoder (722) or the inter-encoder (730). The residual encoder (724) may be configured to encode the residual data to generate transform coefficients. For example, the residual encoder (724) may be configured to transform the residual data from the spatial domain to the frequency domain to generate the transform coefficients. The transform coefficients then undergo a quantization process to obtain quantized transform coefficients. In various exemplary embodiments, the video encoder (703) also includes a residual decoder (728). The residual decoder (728) is configured to perform an inverse transform and generate decoded residual data. The decoded residual data can be used appropriately by the intra-encoder (722) and the inter-encoder (730). For example, the inter-encoder (730) can generate decoded blocks based on the decoded residual data and inter-prediction information, and the intra-encoder (722) can generate decoded blocks based on the decoded residual data and intra-prediction information. The decoded blocks are processed appropriately to generate decoded pictures, which can be buffered in a memory circuit (not shown) and used as reference pictures.

[0081] The entropy encoder (725) may be configured to format a bitstream to include the encoded blocks and to perform entropy coding. The entropy encoder (725) may be configured to include various information in the bitstream. For example, the entropy encoder (725) may be configured to include general control data, selected prediction information (e.g., intra-prediction information or inter-prediction information), residual information, and other appropriate information in the bitstream. Residual information may not be present when coding blocks in a merged sub-mode of either an inter mode or a bi-prediction mode.

[0082] 8 shows a diagram of an exemplary video decoder (810) according to another embodiment of the present disclosure. The video decoder (810) is configured to receive coded pictures that are part of a coded video sequence and decode the coded pictures to generate reconstructed pictures. In one example, the video decoder (810) may be used in place of the video decoder (410) of the example of FIG. 4.

[0083] In the example of Figure 8, the video decoder (810) includes an entropy decoder (871), an inter-decoder (880), a residual decoder (873), a reconstruction module (874), and an intra-decoder (872), all coupled together, as shown in the exemplary configuration of Figure 8.

[0084] The entropy decoder (871) can be configured to recover, from a coded picture, specific symbols that represent the syntax elements of which the coded picture is composed. Such symbols can include, for example, prediction information (e.g., intra- or inter-prediction information) that can identify the mode in which the block is coded (e.g., intra-mode, inter-mode, bi-prediction mode, merged submode, or another submode), specific samples or metadata used for prediction by the intra decoder (872) or inter decoder (880), residual information in the form of quantized transform coefficients, etc. In one example, if the prediction mode is an inter-mode or bi-prediction mode, the inter-prediction information is provided to the inter decoder (880), and if the prediction type is an intra-prediction type, the intra-prediction information is provided to the intra decoder (872). The residual information can undergo inverse quantization and be provided to the residual decoder (873).

[0085] The inter decoder (880) may be configured to receive the inter prediction information and generate inter prediction results based on the inter prediction information.

[0086] The intra decoder (872) may be configured to receive intra prediction information and generate a prediction result based on the intra prediction information.

[0087] The residual decoder (873) may be configured to perform inverse quantization to extract inverse quantized transform coefficients and process the inverse quantized transform coefficients to transform the residual from the frequency domain to the spatial domain. The residual decoder (873) may also utilize certain control information (to include quantization parameters (QPs)), which may be provided by the entropy decoder (871) (datapath not shown as this may only be a small amount of control information).

[0088] The reconstruction module (874) may be configured to combine, in the spatial domain, the residual as output by the residual decoder (873) and the prediction result (possibly as output by an inter-prediction module or an intra-prediction module) to form a reconstructed block that forms part of a reconstructed picture as part of the reconstructed video. Note that other appropriate operations, such as deblocking operations, may also be performed to improve visual quality.

[0089] It should be noted that the video encoders (403), (603), and (703) and the video decoders (410), (510), and (810) may be implemented using any suitable technique. In some exemplary embodiments, the video encoders (403), (603), and (703) and the video decoders (410), (510), and (810) may be implemented using one or more integrated circuits. In another embodiment, the video encoders (403), (603), and (603) and the video decoders (410), (510), and (810) may be implemented using one or more processors executing software instructions.

[0090] Turning to block partitioning for coding and decoding, a general partitioning can start from a base block and follow a predetermined rule set, a specific pattern, a partitioning tree, or any partitioning structure or scheme. The partitioning can be hierarchical and recursive. After partitioning or dividing the base block according to the exemplary partitioning procedure or any of the other procedures described below, or a combination thereof, a final set of partitions or coding blocks can be obtained. Each of these partitions can be at one of various partitioning levels in the partition hierarchy and can be of various shapes. Each partition can be referred to as a coding block (CB). In various exemplary partitioning implementations described further below, each resulting CB can be of any allowed size and partitioning level. Such a partition is referred to as a coding block because it forms a unit for which some basic coding / decoding decisions can be made and coding / decoding parameters can be optimized, determined, and signaled in the encoded video bitstream. The highest or deepest level in the final partition represents the depth of the coding block partitioning structure of the tree. The coding block can be a luma coding block or a chroma coding block. The CB tree structure for each color is sometimes called a coding block tree (CBT).

[0091] The coding blocks of all color channels may be collectively referred to as a coding unit (CU). The hierarchical structure of all color channels may be collectively referred to as a coding tree unit (CTU). The division pattern or structure of various color channels within a CTU may or may not be the same.

[0092] In some implementations, the coding partition tree scheme or structure used for the luma channel and the chroma channel may not be the same. In other words, the luma channel and the chroma channel may have separate coding tree structures or patterns. Furthermore, whether the luma channel and the chroma channel use the same coding partition tree structure or different coding partition tree structures, and the actual coding partition tree structure to be used, may depend on whether the slice being coded is a P slice, a B slice, or an I slice. For example, for an I slice, the chroma channel and the luma channel may have separate coding partition tree structures or coding partition tree structure modes, while for a P slice or a B slice, the luma channel and the chroma channel may share the same coding partition tree scheme. When separate coding partition tree structures or modes are applied, the luma channel may be partitioned into CBs by one coding partition tree structure, and the chroma channel may be partitioned into chroma CBs by another coding partition tree structure.

[0093] In some exemplary implementations, a predetermined partitioning pattern can be applied to the base block. As shown in FIG. 9, an exemplary four-way partition tree may start at a first predetermined level (e.g., a 64x64 block level or other size as the base block size), and the base block may be hierarchically partitioned down to a predetermined lowest level (e.g., a 4x4 level). For example, the base block may follow four predetermined partitioning options or patterns shown at 902, 904, 906, and 908, and the partitions represented by R may be recursively partitioned in that the same partitioning options shown in FIG. 9 may be repeated at lower scales down to the lowest level (e.g., a 4x4 level). In some implementations, additional restrictions may be applied to the partitioning scheme of FIG. 9. In the implementation of FIG. 9, rectangular partitions (e.g., 1:2 / 2:1 rectangular partitions) are possible but not repeated, while square partitions can be repeated. If necessary, subsequent partitioning of FIG. 9 by recursion generates a final set of coding blocks. A coding tree depth may be further defined to indicate the division depth from the root node or root block. For example, the coding tree depth of a 64x64 block root node or root block may be set to 0, and after the root block is further divided one more time following FIG. 9, the coding tree depth is increased by 1. The maximum or deepest level from the 64x64 base block to the 4x4 smallest partition is 4 (starting from level 0) in the above scheme. Such a division scheme may be applied to one or more of the color channels. Each color channel may be independently divided according to the scheme of FIG. 9 (e.g., a division pattern or option among the predetermined patterns may be independently determined for each color channel at each hierarchical level). Alternatively, two or more color channels may share the same hierarchical pattern tree of FIG. 9 (e.g., the same division pattern or option among the predetermined patterns may be selected for two or more color channels at each hierarchical level).

[0094] FIG. 10 illustrates another exemplary predetermined partitioning pattern that enables forming a partitioning tree through recursive partitioning. As shown in FIG. 10, an exemplary 10-way partitioning structure or pattern may be predefined. The root block may start from a predetermined level (e.g., from the base block at the 128×128 level or the 64×64 level). The exemplary partitioning structure of FIG. 10 includes various 2:1 / 1:2 and 4:1 / 1:4 rectangular partitions. A partition type having three subpartitions, indicated by 1002, 1004, 1006, and 1008 in the second column of FIG. 10, may be referred to as a "T" partition. The "T" partitions 1002, 1004, 1006, and 1008 may also be referred to as left T, upper T, right T, and lower T. In some exemplary implementations, none of the rectangular partitions in FIG. 10 may be further subdivided. A coding tree depth may be further defined to indicate the partition depth from the root node or root block. For example, the coding tree depth of the root node or root black of a 128x128 block may be set to 0, and after the root block is further divided following FIG. 10, the coding tree depth increases by 1. In some implementations, only the all-square partitions of 1010 may allow recursive division to the next level of the division tree following the pattern of FIG. 10. In other words, recursive division is not possible for the square partitions in T-shaped pattern 1002, pattern 1004, pattern 1006, and pattern 1008. If necessary, the division procedure following FIG. 10 by recursion generates a final set of coding blocks. Such a scheme may be applied to one or more of the color channels. In some implementations, more flexibility can be added to the use of partitions less than 8x8 levels. For example, 2x2 chroma inter prediction can be used in some cases.

[0095] In some other exemplary implementations of coding block partitioning, a quadtree structure may be used to divide a base block or an intermediate block into quadtree partitions. Such quadtree partitioning may be applied hierarchically and recursively to any square partition. Whether a base block or an intermediate block or a partition is further quadtree partitioned may be adapted to various local characteristics of the base block or intermediate block / partition. Quadtree partitioning at picture boundaries may also be applied. For example, implicit quadtree partitioning may be performed at picture boundaries, such that a block continues to be quadtree partitioned until its size fits within the picture boundary.

[0096] In some other exemplary implementations, hierarchical binary partitioning from the base block may be used. In such a scheme, the base block or mid-level block may be divided into two partitions. The bisection may be either horizontal or vertical. For example, a horizontal bisection may divide the base block or mid-level block into equal left and right partitions. Similarly, a vertical bisection may divide the base block or mid-level block into equal upper and lower partitions. Such bisection may be hierarchical and recursive. A decision may be made for each base block or mid-level block as to whether to continue the bisection scheme and, if the scheme continues further, whether to use horizontal or vertical bisection. In some implementations, further partitioning may stop at a predetermined minimum partition size (in one or both dimensions). Alternatively, further partitioning may stop once a predetermined division level or depth from the base block is reached. In some implementations, the aspect ratio of the partitions may be limited. For example, the aspect ratio of the partitions may not be less than 1:4 (or greater than 4:1). Thus, a vertical strip partition having a vertical to horizontal aspect ratio of 4:1 can only be further divided vertically into an upper partition and a lower partition, each having a vertical to horizontal aspect ratio of 2:1.

[0097] In yet some other examples, a three-part division scheme can be used to divide the base block or any intermediate blocks, as shown in FIG. 13 . The ternary pattern may be implemented vertically, as shown at 1302 in FIG. 13 , or horizontally, as shown at 1304 in FIG. 13 . The exemplary division ratio in FIG. 13 is shown as 1:2:1 either vertically or horizontally, but other ratios may be predefined. In some implementations, two or more different ratios may be predefined. Such a three-part division scheme can be used to complement a quadtree or binary structure; such a ternary tree division can capture objects located at block centers within one contiguous partition, while quadtrees and binary trees always divide along block centers, thus dividing objects into separate partitions. In some implementations, the width and height of the exemplary ternary tree division are always powers of two to avoid additional transformations.

[0098] The above partitioning schemes can be combined in any manner at different partitioning levels. As an example, the above-described quadtree and bisection schemes may be combined to partition a base block into a quadtree-bisection (QTBT) structure. In such a scheme, the base block or intermediate blocks / partitions may be either quadtree-partitioned or bisectioned, subject to a set of predetermined conditions, if specified. A specific example is shown in FIG. 14. In the example of FIG. 14, the base block is first quadtree-partitioned into four partitions, as shown by 1402, 1404, 1406, and 1408. Each of the resulting partitions is then either quadtree-partitioned into four further partitions (e.g., 1408), or bisectioned into two further partitions at the next level (e.g., either horizontally or vertically, e.g., 1402 or 1406, both symmetrical), or not divided (e.g., 1404). Bisection or quadtree partitioning may be recursively permitted for square partitions, as shown by the overall exemplary partition pattern in 1410 and the corresponding tree structure / representation in 1420, where solid lines represent quadtree partitioning and dashed lines represent bisection. A flag may be used for each bisection node (non-leaf bisection) to indicate whether the bisection is horizontal or vertical. For example, as shown in 1420, a flag "0" may represent a horizontal bisection, and a flag "1" may represent a vertical bisection, consistent with the partitioning structure in 1410. In the case of quadtree partitioning, it is not necessary to specify the partition type, since quadtree partitioning always divides a block or partition both horizontally and vertically to generate four sub-blocks / partitions of equal size. In some implementations, a flag "1" may represent a horizontal bisection, and a flag "0" may represent a vertical bisection.

[0099] In some example implementations of QTBT, the quadtree and bisection rule set may be represented by the following predetermined parameters and their associated corresponding functions: -CTU size: quadtree root node size (base block size) -MinQTSize: The minimum allowed quadtree leaf node size -MaxBTSize: Maximum allowed binary tree root node size -MaxBTDepth: Maximum allowed binary tree depth -MinBTSize: The minimum allowable binary tree leaf node size In some exemplary implementations of the QTBT partitioning structure, the CTU size may be set as 128x64 luma samples with two corresponding 64x128 blocks of chroma samples (if exemplary chroma subsampling is considered and used), MinQTSize may be set as 16x16, MaxBTSize may be set as 64x64, MinBTSize (for both width and height) may be set as 4x4, and MaxBTDepth may be set as 4. Quad-tree partitioning may first be applied to the CTU to generate quad-tree leaf nodes. The quad-tree leaf nodes can have sizes from their minimum allowable size of 16x16 (i.e., MinQTSize) to 128x128 (i.e., the CTU size). If a leaf node is 128x128, it will not be split initially by the binary tree because its size exceeds MaxBTSize (i.e., 64x64). Otherwise, nodes that do not exceed MaxBTSize may be split by the binary tree. In the example of Figure 14, the base block is 128x128. The base block can only be quadtree partitioned according to a predetermined set of rules. The base block has a partition depth of 0. Each of the four resulting partitions is 64x64, no more than MaxBTSize, and can be further quadtree or bipartitioned at level 1. The process continues. When the bipartition depth reaches MaxBTDepth (i.e., 4), no further partitions can be considered. If the width of a bipartition node is equal to MinBTSize (i.e., 4), no further horizontal partitions can be considered. Similarly, if the height of a bipartition node is equal to MinBTSize, no further vertical partitions can be considered.

[0100] In some example implementations, the above QTBT scheme may be configured to support flexibility for luma and chroma to have the same or separate QTBT structures. For example, for P slices and B slices, the luma and chroma CTBs in one CTU may share the same QTBT structure. However, for I slices, the luma CTB may be divided into CUs by a QTBT structure, and the chroma CTB may be divided into chroma CUs by a different QTBT structure. This means that CUs can be used to refer to different color channels within an I slice; for example, a CU in an I slice may consist of a coding block for the luma component or two coding blocks for the chroma components, while a CU in a P slice or B slice may consist of coding blocks for all three color components.

[0101] In some other implementations, the QTBT method may be supplemented with the ternary method described above. Such implementations may be referred to as multi-type tree (MTT) structures. For example, in addition to bisection of nodes, one of the trisection patterns in FIG. 13 may be selected. In some implementations, only square nodes may be subject to trisection. An additional flag may be used to indicate whether the trisection is horizontal or vertical.

[0102] The design of two-level or multi-level trees, such as the QTBT implementation and the QTBT implementation complemented by trisection, may be motivated primarily by reduced complexity. Theoretically, the complexity of traversing a tree is TD, where T represents the number of partition types and D is the depth of the tree. A trade-off can be made by using multiple types (T) while reducing the depth (D).

[0103] In some implementations, the CB may be further divided. For example, the CB may be further divided into multiple prediction blocks (PBs) for the purpose of intra-frame or inter-frame prediction during the coding and decoding processes. In other words, the CB may be further divided into different subpartitions, where individual prediction decisions / configurations may be made. In parallel, the CB may be further divided into multiple transform blocks (TBs) for the purpose of describing the level at which a transform or inverse transform of video data is performed. The division scheme of the CB into PBs and TBs may or may not be the same. For example, each division scheme may be performed using a unique procedure based on, for example, various characteristics of the video data. The division schemes of the PBs and TBs may be independent in some exemplary implementations. The division schemes and boundaries of the PBs and TBs may be correlated in some other exemplary implementations. In some implementations, for example, the TBs may be divided after PB division, and in particular, each PB may be determined following the division of the coding block and then further divided into one or more TBs. For example, in some implementations, the PB may be divided into one, two, four, or other number of TBs.

[0104] In some implementations, the luma and chroma channels may be processed differently to divide base blocks into coding blocks and further into prediction and / or transform blocks. For example, in some implementations, division of coding blocks into prediction and / or transform blocks may be allowed for the luma channel, but such division of coding blocks into prediction and / or transform blocks may not be allowed for the chroma channel(s). In such implementations, transform and / or prediction of luma blocks may therefore be performed only at the coding block level. In another example, the minimum transform block sizes of the luma and chroma channel(s) may be different, e.g., coding blocks of the luma channel may be allowed to be divided into smaller transform and / or predictive blocks than chroma channels. In yet another example, the maximum depth of division of coding blocks into transform and / or predictive blocks may differ between the luma and chroma channels, e.g., coding blocks of the luma channel may be allowed to be divided into deeper transform and / or predictive blocks than chroma channel(s). As a specific example, a luma coding block may be divided into transform blocks of multiple sizes that can be represented by a recursive division down to a maximum of two levels, allowing transform block shapes such as square, 2:1 / 1:2, 4:1 / 1:4, etc., and transform block sizes from 4 x 4 to 64 x 64. However, for chroma blocks, only the largest possible transform block specified for the luma block may be allowed.

[0105] In some example implementations for dividing a coding block into PBs, the depth, shape, and / or other characteristics of the PB division may depend on whether the PB is intra-coded or inter-coded.

[0106] The division of a coding block (or a prediction block) into transform blocks may be performed recursively or non-recursively in various exemplary manners, including but not limited to quadtree division and predetermined pattern division, further taking into account the transform blocks at the boundaries of the coding block or the prediction block. In general, the resulting transform blocks may be at different division levels, may not be the same size, and may not be square in shape (e.g., they may be rectangular with several allowed sizes and aspect ratios). Further examples are described in more detail below in connection with Figures 15, 16, and 17.

[0107] However, in some other implementations, the CB obtained through one of the above partitioning schemes may be used as a basic or minimum coding block for prediction and / or transform. In other words, no further partitioning is performed to perform inter-prediction / intra-prediction and / or transform. For example, the CB obtained from the above QTBT scheme may be used as a unit for performing prediction. Specifically, such a QTBT structure removes the concept of multiple partition types, i.e., the concept of separation between CUs, PUs, and TUs, and, as described above, increases the flexibility of CU / CB partition shapes. In such a QTBT block structure, CUs / CBs can be either square or rectangular in shape. The leaf nodes of such a QTBT are used as units for prediction and transform processing without further partitioning. This means that CUs, PUs, and TUs have the same block size in such an exemplary QTBT coding block structure.

[0108] The various CB division schemes described above, as well as further division of the CB into PB and / or TB (including no PB / TB division), can be combined in any manner. The following specific implementations are provided as non-limiting examples.

[0109] Specific exemplary implementations of the division of coding blocks and transform blocks are described below. In one such exemplary implementation, a base block may be divided into coding blocks using recursive quadtree division or the above-mentioned predetermined division patterns (such as those in FIGS. 9 and 10). At each level, local video data characteristics may determine whether to continue further quadtree division of a particular partition. The resulting CBs may be at various quadtree division levels and various sizes. The decision of whether to code a picture area using inter-picture (temporal) prediction or intra-picture (spatial) prediction may be made at the CB level (or at the CU level in the case of three color channels). Each CB may be further divided into one, two, four, or other numbers of PBs according to a predefined PB division type. Within one PB, the same prediction process may be applied, and related information may be sent to the decoder on a PB-by-PB basis. After obtaining residual blocks by applying a prediction process based on the PB division type, the CBs may be divided into TBs according to another quadtree structure similar to the coding tree of the CB. In this particular implementation, the CB or TB may not be limited to a square shape. Furthermore, in this particular example, the PB may be square or rectangular in shape for inter prediction, and may only be square in intra prediction. A coding block may be divided into, for example, four square-shaped TBs. Each TB may be further divided recursively (using quadtree division) into smaller TBs called residual quadtrees (RQTs).

[0110] Another exemplary implementation for dividing a base block into CBs, PBs, and / or TBs is further described below. For example, instead of using multiple partition unit types as shown in FIG. 9 or FIG. 10, a quadtree with nested multitype trees using bipartite and tripartite segmentation structures (e.g., QTBT or QTBT with ternary division as described above) may be used. Separation of CBs, PBs, and TBs (i.e., division of CBs into PBs and / or TBs, and division of PBs into TBs) may be abandoned except when necessary for CBs with sizes too large for the maximum transform length, which may require further division. This exemplary division scheme may be designed to support greater flexibility in CB division shapes so that both prediction and transformation can be performed at the CB level without further division. In such a coding tree structure, the CBs may have either a square or rectangular shape. Specifically, a coding tree block (CTB) may first be divided by a quadtree structure. Then, the leaf nodes of the quadtree may be further divided by a nested multitype tree structure. An example of a nested multitype tree structure using bisection or trisection is shown in Figure 11. Specifically, the exemplary multitype tree structure in Figure 11 includes four split types: vertical bisection (SPLIT_BT_VER) (1102), horizontal bisection (SPLIT_BT_HOR) (1104), vertical trisection (SPLIT_TT_VER) (1106), and horizontal trisection (SPLIT_TT_HOR) (1108). CB then corresponds to the leaf of the multitype tree. In this exemplary implementation, as long as CB is not too large relative to the maximum transform length, this segmentation is used for both prediction and transform processing without further splitting. This means that in most cases, CB, PB, and TB have the same block size in the quadtree with the nested multitype tree coding block structure. An exception occurs when the maximum supported transform length is smaller than the width or height of the color components of CB. In some implementations, in addition to bisection or trisection, the nested pattern of FIG. 11 can further include a quadtree division.

[0111] FIG. 12 shows a specific example of a quadtree with nested multitype tree coding block structures (including quadtree, bisection, and trisection options) for block division for one base block. More specifically, FIG. 12 shows a base block 1200 being quadtree-divided into four square partitions 1202, 1204, 1206, and 1208. A decision to further use the multitype tree structure and quadtree of FIG. 11 for further division is made for each quadtree-divided partition. In the example of FIG. 12, partition 1204 is not further divided. Partitions 1202 and 1208 each employ a different quadtree division. In partition 1202, the second-level quadtree-divided upper-left, upper-right, lower-left, and lower-right partitions employ third-level divisions: quadtree, horizontal bisection 1104 of FIG. 11, no division, and horizontal trisection 1108 of FIG. 11, respectively. Partition 1208 employs another quadtree division, and the second-level quadtree-divided upper-left, upper-right, lower-left, and lower-right partitions employ third-level divisions of vertical trisection 1106 in FIG. 11 , no division, no division, and horizontal bisection 1104 in FIG. 11 , respectively. Two of the subpartitions of the third-level upper-left partition of 1208 are further divided according to horizontal bisection 1104 and horizontal bisection 1108 in FIG. 11 , respectively. Partition 1206 employs the second-level division pattern of vertical bisection 1102 in FIG. 11 into two partitions, and the two partitions are further divided at the third level according to horizontal bisection 1108 and vertical bisection 1102 in FIG. 11 . A fourth-level division is further applied to one of them according to horizontal bisection 1104 in FIG. 11 .

[0112] In the above specific example, the maximum luma transform size may be 64 x 64, and the maximum supported chroma transform size may also be different from luma, for example, 32 x 32. Although the above example CB in Figure 12 is generally not further divided into smaller PBs and / or TBs, if the width or height of a luma coding block or a chroma coding block is larger than the maximum transform width or height, the luma coding block or the chroma coding block may be automatically divided horizontally and / or vertically to meet the horizontal and / or vertical transform size constraints.

[0113] In the specific example for dividing a base block into CBs, as described above, the coding tree scheme may support the ability for luma and chroma to have separate block tree structures. For example, in the case of P slices and B slices, the luma CTB and chroma CTB in one CTU may share the same coding tree structure. In the case of I slices, for example, luma and chroma may have separate coding block tree structures. When separate block tree structures are applied, the luma CTB may be divided into luma CBs by one coding tree structure, and the chroma CTB is divided into chroma CBs by another coding tree structure. This means that a CU in an I slice can consist of a coding block for the luma component or two coding blocks for the chroma components, while a CU in a P slice or B slice always consists of coding blocks for all three color components unless the video is monochrome.

[0114] When a coding block is further divided into multiple transform blocks, the transform blocks therein may be ordered in the bitstream according to various orders or scanning schemes. Exemplary implementations for dividing a coding block or a prediction block into transform blocks and the coding order of the transform blocks are described in further detail below. In some exemplary implementations, as described above, the transform division may support transform blocks of multiple shapes, such as 1:1 (square), 1:2 / 2:1, and 1:4 / 4:1, with transform block sizes ranging from 4×4 to 64×64. In some implementations, if the coding block is 64×64 or smaller, the transform block division may be applied only to the luma component, such that for chroma blocks, the transform block size is the same as the coding block size. Otherwise, if the width or height of the coding block is greater than 64, both the luma coding block and the chroma coding block may be implicitly divided into multiples of min(W,64)×min(H,64) and min(W,32)×min(H,32) transform blocks, respectively.

[0115] In some example implementations of transform block partitioning, for both intra-coded and inter-coded blocks, a coding block may be further partitioned into multiple transform blocks with a partition depth up to a predetermined number of levels (e.g., two levels). The partition depth and size of the transform blocks may be related. For some example implementations, an example mapping from the transform size of the current depth to the transform size of the next depth is shown below in Table 1.

[0116] [Table 1]

[0117] According to the example mapping in Table 1, for a 1:1 square block, the next-level transform division may create four 1:1 square sub-transform blocks. The transform division may stop at, for example, 4x4. Thus, a transform size of the current depth of 4x4 corresponds to the same size of 4x4 at the next depth. In the example of Table 1, for a 1:2 / 2:1 non-square block, the next-level transform division may create two 1:1 square sub-transform blocks, while for a 1:4 / 4:1 non-square block, the next-level transform division may create two 1:2 / 2:1 sub-transform blocks.

[0118] In some example implementations, further restrictions may be applied to the transform block partitioning for the luma component of an intra-coded block. For example, at each level of transform partitioning, all sub-transform blocks may be constrained to have equal sizes. For example, for a 32x16 coding block, level 1 transform partitioning creates two 16x16 sub-transform blocks, and level 2 transform partitioning creates eight 8x8 sub-transform blocks. In other words, to keep the transform units equal in size, second-level partitioning must be applied to all first-level sub-blocks. An example of transform block partitioning for an intra-coded square block according to Table 1 is shown in FIG. 15, with the coding order indicated by the arrows. Specifically, 1502 denotes a square coding block. The first-level partitioning into four equal-sized transform blocks according to Table 1 is shown in 1504, with the coding order indicated by the arrows. The second-level partitioning of all first-level equal-sized blocks according to Table 1 into 16 equal-sized transform blocks is shown in 1506, with the coding order indicated by the arrows.

[0119] In some example implementations, the above restrictions on intra-coding may not apply to the luma component of an inter-coded block. For example, after the first level of transform partitioning, any one of the sub-transform blocks may be further partitioned independently at another level. Thus, the resulting transform blocks may or may not be of the same size. An example partitioning of an inter-coded block into transform blocks with a coding order is shown in FIG. 16. In the example of FIG. 16, an inter-coded block 1602 is partitioned into transform blocks at two levels according to Table 1. At the first level, the inter-coded block is partitioned into four transform blocks of equal size. Then, only one of the four transform blocks (but not all of them) is further partitioned into four sub-transform blocks, resulting in a total of seven transform blocks with two different sizes, as shown at 1604. An example coding order of these seven transform blocks is indicated by the arrow at 1604 in FIG. 16.

[0120] In some example implementations, some additional restrictions on the transform blocks may be applied to the chroma component(s). For example, for the chroma component(s), the transform block size may be as large as the coding block size, but cannot be smaller than a predetermined size, e.g., 8x8.

[0121] In some other example implementations, for coding blocks with width (W) or height (H) greater than 64, both the luma coding block and the chroma coding block may be implicitly divided into multiples of min(W,64)×min(H,64) and min(W,32)×min(H,32) transform units, respectively, where, in this disclosure, “min(a,b)” can return the smaller value between a and b.

[0122] Figure 17 further illustrates another alternative exemplary scheme for dividing a coding block or a predictive block into transform blocks. As shown in Figure 17, instead of using recursive transform partitioning, a set of predetermined partition types may be applied to a coding block according to the transform type of the coding block. In the specific example shown in Figure 17, one of six exemplary partition types may be applied to divide the coding block into various numbers of transform blocks. Such a scheme for generating transform block partitions may be applied to either a coding block or a predictive block.

[0123] More specifically, the partitioning scheme of FIG. 17 provides up to six exemplary partition types for any given transform type (transform type refers to the type of primary transform, such as ADST, for example). In this scheme, every coding block or predictive block may be assigned a transform partition type, for example, based on a rate-distortion cost. In one example, the transform partition type assigned to a coding block or predictive block may be determined based on the transform type of the coding block or predictive block. As shown by the six transform partition types illustrated in FIG. 17, a particular transform partition type may correspond to the partition size and pattern of the transform block. The correspondence between various transform types and various transform partition types may be predefined. An example is shown below with capitalized labels indicating transform partition types that may be assigned to a coding block or predictive block based on a rate-distortion cost.

[0124] · PARTITION_NONE: Allocate a transformation size equal to the block size.

[0125] ·PARTITION_SPLIT: Allocates a transformation size that is 1 / 2 the width and 1 / 2 the height of the block size.

[0126] ·PARTITION_HORZ: Allocates a transformation size with the same width as the block size and half the height of the block size.

[0127] ·PARTITION_VERT: Allocates a transformation size with a width half the block size and a height equal to the block size.

[0128] PARTITION_HORZ4: Allocates a transformation size with the same width as the block size and 1 / 4 of the height of the block size.

[0129] PARTITION_VERT4: Allocates a transformation size that is 1 / 4 the width of the block size and the same height as the block size.

[0130] In the above example, all of the transform partition types shown in Figure 17 include uniform transform sizes for the partitioned transform blocks. This is not a limitation but merely an example. In some other implementations, mixed transform block sizes may be used for the partitioned transform blocks in a particular partition type (or pattern).

[0131] Video blocks (PBs or CBs, also referred to as PBs when not further divided into multiple predictive blocks) can be predicted in various ways rather than being directly encoded, thereby exploiting various correlations and redundancies within the video data to improve compression efficiency. Correspondingly, such predictions may be performed in various modes. For example, video blocks may be predicted by intra-prediction or inter-prediction. In particular, in inter-prediction mode, a video block may be predicted by one or more other reference blocks or inter-prediction blocks from one or more other frames via either single-reference or mixed-reference inter-prediction. To perform inter-prediction, a reference block may be specified by its frame identifier (the temporal position of the reference block) and a motion vector (the spatial location of the reference block) that indicates the spatial offset between the current block being encoded or decoded and the reference block. The reference frame identification and motion vector may be signaled within the bitstream. The motion vector, as a spatial block offset, may be signaled directly or may itself be predicted by another reference motion vector or a predictor motion vector. For example, the current motion vector may be predicted directly by a reference motion vector (e.g., of a candidate neighboring block) or by a combination of the reference motion vector and the motion vector difference (MVD) between the current motion vector and the reference motion vector. The latter is sometimes referred to as merge mode with motion vector difference (MMVD). The reference motion vector may be identified in the bitstream as, for example, a pointer to a spatially adjacent block of the current block or a temporally adjacent but spatially co-located block.

[0132] In some other exemplary implementations, intra block copy (IBC) prediction may be used. In IBC, a current block in a current frame may be predicted using another block in the current frame (not a temporally different frame, hence the term "intra") in combination with a block vector (BV) to indicate the offset of the location of the intra predictor or reference block relative to the location of the block being predicted. The location of the coding block may be represented, for example, by the pixel coordinates of its left corner relative to the upper left corner of the current frame (or slice). Thus, the IBC mode uses a similar inter prediction concept within the current frame. For example, a BV may be predicted directly by another reference BV or by a combination of the BV difference between the current BV and the reference BV, which is similar to predicting an MV using a reference MV and an MV difference in inter prediction. IBC is particularly useful for providing improved coding efficiency for encoding and decoding video frames with screen content that has a significant number of recurring patterns, such as text information where identical text segments (characters, symbols, words, phases, etc.) appear in different parts of the same frame and can be used to predict each other.

[0133] In some implementations, IBC may be treated as a separate prediction mode other than the normal intra prediction mode and the normal inter prediction mode. Thus, the selection of a prediction mode for a particular block may be made and signaled among three different prediction modes: intra prediction, inter prediction, and IBC mode. In these implementations, flexibility may be built into each of these modes to optimize coding efficiency in each of these modes. In some other implementations, IBC may be treated as a submode or branch within the inter prediction mode, using similar motion vector determination, reference, and coding mechanisms. In such implementations (unified inter prediction mode and IBC mode), the flexibility of IBC may be somewhat limited to harmonize common inter prediction modes with IBC modes. However, such implementations are less complex and can still utilize IBC to improve coding efficiency for video frames characterized by screen content, for example. In some exemplary implementations, using existing pre-specified mechanisms for separate inter prediction and intra prediction modes, the inter prediction mode may be extended to support IBC.

[0134] These prediction mode selections can be made at various levels, including but not limited to, the sequence level, frame level, picture level, slice level, CTU level, CT level, CU level, CB level, or PB level. For example, for IBC purposes, a decision on whether to adopt IBC mode may be made and signaled at the CTU level. If a CTU is signaled as adopting IBC mode, all coding blocks in the entire CTU may be predicted by IBC. In some other implementations, IBC prediction may be determined at the superblock (SB) level. Each SB may be split into multiple CTUs or partitions in various manners (e.g., quadtree partitioning). Examples are provided further below.

[0135] FIG. 18 illustrates an exemplary snapshot of a section of a current frame containing multiple CTUs from the decoder's perspective. Each square block, such as 1802, represents a CTU. The CTUs may be one of various predetermined sizes, as described in detail above. Each CTU may contain one or more coding blocks (or prediction blocks for a particular color channel). The horizontally shaded CTUs represent CTUs that have already been reconstructed. CTU 1804 represents the current CTU being reconstructed. Within the current CTU 1804, the horizontally shaded coding blocks represent blocks that have already been reconstructed within the current CTU, while the diagonally shaded coding blocks 1806 are currently being reconstructed, while the unshaded coding blocks within the current CTU 1804 are awaiting reconstruction. Other unshaded CTUs have not yet been processed.

[0136] The position or offset of a reference block (relative to the current block) used to predict a current coding block in IBC may be indicated by a BV, as shown by the exemplary arrow in FIG. 18. For example, a BV may indicate, in vector form, the position difference between the upper-left corner of the reference block (labeled "Ref" in FIG. 18) and the current block. FIG. 18 is illustrated using a CTU as the basic IBC unit. The underlying principle applies to implementations in which an SB is used as the basic IBC unit. In such implementations, each superblock may be divided into multiple CTUs, and each CTU may be further divided into multiple coding blocks, as described in more detail below.

[0137] As will be further disclosed in more detail below, depending on the location of the reference CTU / SB relative to the current CTU / SB of the IBC, the reference CTU / SB may be referred to as a local CTU / SB or a non-local CTU / SB. The local CTU / SB may refer to a CTU / SB that coincides with the current CTU / SB or a CTU / SB that is near the current CTU / SB and has been reconstructed (e.g., the CTU / SB immediately to the left of the current CTU / SB). The non-local CTU / SB may refer to a CTU / SB that is further away from the current CTU / SB. Either or both the local CTU / SB and the non-local CTU / SB may be searched for a reference block when performing IBC prediction for the current coding block. Because on-chip and off-chip storage management (such as an off-chip picture buffer (DPB) and / or on-chip memory) of reconstructed samples for local or non-local CTU / SB references may differ, the specific manner in which the IBC is implemented may depend on whether the reference CTU / SB is local or non-local. The reconstructed local CTU / SB samples may be suitable for storage, for example, in an on-chip memory of an encoder or decoder for IBC, and the reconstructed non-local CTU / SB samples may be stored, for example, in an off-chip DPB memory.

[0138] In some implementations, the locations of reconstructed blocks that can be used as reference blocks for the current coding block 1804 may be limited. Such limitations may be the result of various factors and may depend on whether IBC is implemented as an integrated part of a general inter-prediction mode, a special extension of an inter-prediction mode, or a separate, independent IBC mode. In some examples, only the current reconstructed CTU / SB sample may be searched to identify an IBC reference block. In some other examples, as shown by the bold dashed box 1808 in FIG. 18, the current reconstructed CTU / SB sample and another neighboring reconstructed CTU / SB sample (e.g., the left-neighbor CTU / SB) may be available for reference block search and selection. In such implementations, only the local reconstructed CTU / SB sample may be used for IBC reference block search and selection. In some other examples, a particular CTU / SB may not be available for IBC reference block search and selection for various other reasons. For example, the CTU / SB 1810 marked with a cross in FIG. 18 may be used for special purposes (e.g., wavefront parallel processing), as further described below, and therefore may not be available for searching and selecting a reference block for the current block 1804.

[0139] In some implementations, limitations on already reconstructed CTUs / SBs that are permitted to be used to provide IBC reference blocks or reference samples may result from the adoption of parallel decoding, in which two or more coding blocks are decoded simultaneously. An example is shown in FIG. 19, where each square represents a CTU / SB. As shown by the CTUs / SBs shaded with diagonal lines in FIG. 19, parallel decoding may be implemented in which multiple CTUs / SBs in several consecutive rows and every other column (every two columns) may be reconstructed in parallel. Other CTUs / SBs shaded with horizontal lines have already been reconstructed, and CTUs / SBs not shaded have not yet been constructed. In such parallel processing, for a currently parallel processed CTU / SB whose top left coordinate is (x0, y0), the reconstructed sample at (x, y) can be accessed to predict the current CTU / SB in the IBC only if the vertical coordinate y is less than y0 and the horizontal coordinate x is less than x0+2(y0-y), and therefore the already constructed CTU / SB shaded with horizontal lines can be used as a reference for the current block processed in parallel.

[0140] In some implementations, the write-back delay of immediately reconstructed samples to the off-chip DPB can impose further restrictions on the CTU / SB that can be used to provide IBC reference samples for the current block, especially if the off-chip DPB is used to hold IBC reference samples. An example is shown in FIG. 20, and additional restrictions may apply in addition to those shown in FIG. 19. Specifically, to allow for the hardware write-back delay, direct reconstruction regions cannot be accessed by IBC prediction for reference block search and selection. The number of restricted or prohibited direct reconstruction regions can range from 1 to n CTU / SB (n is a positive integer). Thus, in addition to the specific parallelism restrictions of FIG. 19, if the coordinates of the top-left position of one current CTU / SB are (x0, y0), prediction at position (x, y) can be accessed by the IBC if the vertical coordinate y is less than y0 and the horizontal coordinate is less than x0 + 2(y0 - y) - D, where D indicates the number of direct reconstruction regions (e.g., to the left of the current CTU / SB) that are restricted / prohibited as IBC references. Figure 20 shows such additional CTU / SB restricted as IBC reference samples with D = 2. These additional CTU / SB not available as IBC references are shown with reverse diagonal shading.

[0141] In some implementations described in further detail below, both local and non-local CTU / SB search areas can be used for IBC reference block search and selection. Furthermore, when on-chip memory is used, some of the restrictions on the availability of already constructed CTU / SBs as IBC references regarding write-back latency can be relaxed or removed. In some further implementations, the scheme used when local and non-local CTU / SBs coexist can differ due to, for example, differences in the management of reference block buffering using either on-chip or off-chip memory. These implementations are described in further detail in the disclosure below.

[0142] In some implementations, IBC may be implemented as an extension of an inter-prediction mode that treats the current frame as a reference frame in the inter-prediction mode so that blocks in the current frame can be used as prediction references. Thus, such an IBC implementation can follow the coding path for inter-prediction even if the IBC process only involves the current frame. In such implementations, the reference structure of the inter-prediction mode may be adapted to IBC, and the representation of the addressing mechanism for reference samples using BVs may be similar to motion vectors (MVs) in inter-prediction. Thus, IBC may be implemented as a special inter-prediction mode that relies on a similar or identical syntax structure and decoding process as an inter-prediction mode based on the current frame as a reference frame.

[0143] In such implementations, IBC may be treated as an inter-prediction mode, so intra-only predicted slices must become predicted slices to enable the use of IBC. In other words, intra-only predicted slices are not inter-predicted (because intra-prediction modes do not invoke any inter-prediction processing paths), and therefore IBC is not allowed for prediction in such intra-only slices. When IBC is applicable, the coder extends the reference picture list by one entry for a pointer to the current picture. Thus, the current picture can occupy at most one picture-sized buffer in the shared decoded picture buffer (DPB). Signaling to use IBC may be implicit in the selection of a reference frame in an inter-prediction mode. For example, if the selected reference picture points to the current picture, the coding unit uses IBC with an inter-prediction-like coding path with special IBC extensions, if necessary and available. In some specific implementations, reference samples in the IBC process may not be loop-filtered before being used for prediction, in contrast to regular inter-prediction. Furthermore, the corresponding reference current picture may be a long-term reference frame because it will be near the next frame to be encoded or decoded. In some implementations, to minimize memory requirements, the coder may immediately release the buffer after reconstructing the current picture. The coder may return a filtered version of the reconstructed picture to the DPB as a short-term reference when it becomes a reference picture for a later frame in true inter prediction, even if it is unfiltered when used for IBC.

[0144] In the above exemplary implementation, IBC may be simply an extension of inter prediction mode, but IBC may be treated with some special procedures that may deviate from normal inter prediction. For example, IBC reference samples may not be filtered. In other words, reconstructed samples before the in-loop filtering process, including deblocking filtering, sample adaptive offset (SAO) filtering, cross-component sample offset (CCSO) filtering, etc., may be used for IBC prediction, while normal inter prediction modes use filtered samples for prediction. In another example, luma sample interpolation for IBC may not be performed, and chroma sample interpolation may be necessary only when the chroma BV is non-integer when derived from the chroma BV. In yet another example, if the chroma BV is non-integer and the reference block for IBC is near the boundary of the area available for IBC reference, the surrounding reconstructed samples may be outside the boundary to perform chroma interpolation. A BV pointing to a single next boundary line cannot avoid such cases.

[0145] In such implementations, the prediction of the current block by IBC can reuse the prediction and coding mechanisms of the inter prediction process, including using the current BV and the reference BV to predict, for example, additional BV differences. However, in some specific implementations, the luma BV may be implemented with integer resolution rather than fractional precision like the MV of regular inter prediction.

[0146] In some implementations, as shown as 1810 in Figure 18, to enable wavefront parallel processing (WPP), all CTUs and SBs indicated by horizontal shading in Figure 18 can be used for IBC reference block search and selection, except for the two CTUs to the upper right of the current CTU (indicated by crosses in Figure 18), thus covering almost the entire already reconstructed area of the current picture, with a few exceptions for parallel processing purposes.

[0147] In some other implementations, the area in which the IBC reference block can be searched and selected may be limited to the local CTU / SB. An example is shown by the bold dotted box 1808 in FIG. 18. In such an example, the CTU / SB to the left of the current CTU can serve as the reference sample area for the IBC at the start of the reconstruction process of the current CTU. When using such a local reference area, instead of allocating additional external memory space to the DPB, on-chip memory space may be allocated to hold the local CTU / SB for IBC reference. In some implementations, fixed on-chip memory may be used for the IBC, thereby reducing the complexity of implementing the IBC in a hardware architecture. In this way, a dedicated IBC mode independent of normal inter prediction may be implemented to utilize on-chip memory rather than being implemented as a mere extension of the inter prediction mode.

[0148] For example, a fixed on-chip memory size for storing local IBC reference samples, such as left CTUs or SBs, may be 128x128 for each color component. In some implementations, the maximum CTU size may also be 128x128. In such cases, the reference sample memory (RSM) may hold samples having the size of a single CTU. In some other alternative implementations, the CTU size may be smaller. For example, the CTU size may be 64x64. Thus, the RSM may simultaneously hold multiple (four in this example) CTUs. In yet some other implementations, the RSM may hold multiple SBs, each of which may contain one or more CTUs, and each CTU may contain multiple coding blocks.

[0149] In some implementations of the local on-chip IBC reference, the on-chip RSM may hold one CTU and implement a continuous update mechanism to replace the reconstructed samples of the left-neighboring CTU with the reconstructed samples of the current CTU. FIG. 21 shows a simplified example of such a continuous RSM update mechanism at four intermediate times during the reconstruction process. In the example of FIG. 21, the RSM has a fixed size to hold one CTU. The CTU may include implicit partitions. For example, the CTU may be implicitly divided into four separate regions (e.g., quadtree partitions). Each area may include multiple coding blocks. The CTU may be 128x128 in size, while each of the exemplary regions or partitions may be 64x64 in size, based on an exemplary quadtree partition. At each intermediate time, the horizontally shaded region / section of the RSM holds the corresponding reconstructed reference samples of the left-neighboring CTU, and the vertically shaded gray region / section holds the corresponding reconstructed reference samples of the current CTU. The diagonally shaded coding block of the RSM represents the current coding block within the current region being coded / decoded / reconstructed.

[0150] At the first intermediate time, which represents the start of the current CTU reconstruction, the RSM may contain reconstructed reference samples of the left-neighboring CTU only for each of the four exemplary regions, as shown by 2102. At the other three intermediate times, the reconstruction process gradually replaces the reconstructed reference samples of the left-neighboring CTU with the reconstructed samples of the current CTU. A reset of a 64x64 region / partition in the RSM occurs when the coder processes the first coding block of that region / partition. When resetting a region in the RSM, the region is considered blank and does not hold reconstructed reference samples for the IBC (in other words, the region in the RSM is not ready to be used as an IBC reference sample). Once the corresponding current coding block in that region is processed, the corresponding block in the RSM is recorded with the reconstructed sample of the corresponding block of the current CTU to be used as the reference sample for the IBC of the next current block, as shown in FIG. 21 for intermediate times 2104, 2106, and 2108. Once all coding blocks corresponding to a region / division of the RSM have been processed, the entire region is filled with reconstructed samples of these current coding blocks as IBC reference samples, as shown by the regions fully shaded with vertical lines in Figure 21 at various intermediate times. Thus, at intermediate times 2104 and 2106, some regions / divisions in the RSM hold IBC reference samples from neighboring CTUs, some other regions / divisions hold reference samples entirely from the current CTU, while some regions / divisions partially hold reference samples from the current CTU and are partially blank (not used for IBC reference as a result of the reset process described above).Once the last region (e.g., the bottom right region) is processed, all other three regions hold the reconstructed samples of the current CTU as reference samples for IBC, but the last region / section partially holds the reconstructed samples of the corresponding coding block in the current CTU and is partially blank until the last coding block of the CTU is reconstructed, at which point the entire RSM holds the reconstructed samples of the current CTU and is ready to be used for the next CTU if it is also coded in IBC mode.

[0151] Figure 22 illustrates the implementation of the above-described continuous update of a spatial RSM, particularly at intermediate times, showing both the left-neighbor CTU and the current CTU with the current coding block (block shaded with diagonal shading). The corresponding reconstructed samples of these two CTUs that are in the RSM and are valid as IBC reference samples for the current coding block are shown with horizontal and vertical shading. At this particular reconstruction time in this example, the process replaces samples covered by the unshaded area in the left-neighbor CTU with the area of the current CTU shaded with vertical shading in the RSM. The remaining effect samples from the neighboring CTU are shown as horizontal shading.

[0152] In the exemplary implementation described above, if the fixed RSM size is the same as the CTU size, the RSM is implemented to contain one CTU. In some other implementations, if the CTU size is smaller, the RSM can contain multiple CTUs. For example, the CTU size may be 32x32, but the fixed RSM size may be 128x128. Thus, the RSM can hold samples of 16 CTUs. Following the same underlying RSM update principle described above, the RSM can hold 16 neighboring CTUs of the current 128x128 patch before they are reconstructed. As soon as processing of the first coding block of the current 128x128 patch begins, the first 32x32 region of the RSM, initially filled with reconstructed samples of one neighboring CTU, can be updated, as described above for the RSM holding a single CTU. The remaining 15 32x32 regions contain the 15 neighboring CTUs as reference samples for IBC. Once the CTU corresponding to the first 32x32 region of the current 128x128 patch being decoded is reconstructed, the first 32x32 region of the RSM is updated with the reconstructed samples of this CTU. The CTU corresponding to the second 32x32 region of the current 128x128 patch can then be processed and finally updated with the reconstructed samples. This process continues until all 16 32x32 regions of the RSM contain reconstructed samples for the current 128x128 patch (all 15 CTUs). The decoding process then proceeds to the next 128x128 patch.

[0153] In some other implementations, as an extension of Figures 21 and 22, the RSM can hold a set of neighboring CTUs. One current CTU is processed at a time, and the portion of the RSM holding the furthest neighboring CTU is updated in the manner described above with the reconstructed current CTU. For the next current CTU, the furthest neighboring CTU in the RSM is also updated and replaced. Thus, the multiple CTUs held in the fixed-size RSM are updated as a moving window of neighboring CTUs of the IBS.

[0154] A further specific example of a local IBC using an on-chip RSM is shown in FIG. 23. In this example, the maximum block size of the IBC mode may be limited. For example, the largest IBC block may be 64x64. The on-chip RSM may be configured with a fixed size, such as 128x128, corresponding to a superblock (SB). The RSM implementation in FIG. 23 uses similar basic principles to those in FIGS. 21 and 22. In FIG. 23, the RSM may hold multiple neighboring and / or current CTUs as IBC reference samples. In the example of FIG. 23, the SB may be quadtree-divided. Correspondingly, the RSM may be quadtree-divided into four regions or units, each 64x64. Each of these regions may hold one or more coding blocks. Alternatively, each of these regions may hold one or more CTUs, and each CTU may hold one or more coding blocks. The coding order of the quadtree regions may be predefined. For example, the coding order may be top-left, top-right, bottom-left, and bottom-right. The quadtree division of the SB in Figure 23 is just one example. In some other alternative implementations, the SB may be divided according to any other scheme. The RSM update implementation of the local IBC described herein applies to these alternative division schemes.

[0155] In such a local SBC implementation, the local reference blocks that can be used for SBC prediction can be restricted. For example, it can be required that the reference block and the current block be in the same SB row. Specifically, the local reference block may only be placed in the current SB or one SB to the left of the current SB. An exemplary current block predicted by SBC using another allowed coding block is shown by the dashed arrow in Figure 23. When the current SB or the left SB is used for SBC reference, the reference sample update procedure in the RSM can follow the reset procedure described above. For example, when any of the 64x64 units of reference sample memories starts updating with reconstructed samples from the current SB, the previously stored reference samples (from the left SB) for the entire 64x64 unit are marked as unavailable for generating IBC prediction samples and are gradually updated with the reconstructed samples of the current block.

[0156] Figure 23 shows five exemplary states of the RSM during local IBC decoding of the current SB in panel 2302. Again, the horizontally shaded areas of the RSM in each exemplary state hold the corresponding reference samples of the corresponding quadtree region of the left-neighboring SB, and the vertically shaded gray areas / sections hold the corresponding reference samples of the current SB. The diagonally shaded coding blocks of the RSM represent the current coding block within the current quadtree region being coded / decoded. At the start of coding of each current SB, the RSM stores the samples of the previously coded SB (RSM state (0) in Figure 23). When the current block is located in one of the four 64x64 quadtree regions of the current SB, the corresponding region in the RSM is reset and used to store the samples of the current 64x64 coding region. In this way, the samples in each 64x64 quadtree region of the RSM are gradually updated by the samples in the current SB (state (1) to state (3)). When the current SB is completely coded, the entire RSM is filled with all the samples of the current SB (state (4)).

[0157] Each of the 64x64 regions in panel 2302 of Figure 23 is labeled with a spatial coding sequence number. Sequences 0-3 represent the four 64x64 quadtree regions of the left-neighboring SB, and sequences 4-7 represent the four 64x64 quadtree regions of the current SB panel. In Figure 23, panel 2304 further illustrates the corresponding spatial distributions of reference samples in the left-neighboring and current SBs within the 128x28 RSM for RSM states (1), (2), and (3) in panel 2302 of Figure 23. Shaded regions without crosses represent regions with reconstructed samples within the RSM. Shaded regions with crosses represent regions where the reconstructed samples of the left SB within the RSM are reset (and therefore unavailable as reference samples for the local SBC).

[0158] The coding order of the 64x64 regions and the corresponding RSM update order can follow either horizontal scanning (as previously shown in Figure 23) or vertical scanning. Horizontal scanning starts from the top left, top right, bottom left, and bottom right. Vertical scanning starts from the top left, bottom left, top right, and bottom left. The left-neighbor SB and current SB reference sample update processes for horizontal scanning and vertical scanning are shown in panels 2402 and 2404 of Figure 24, respectively, for comparison when each of the four 64x64 regions of the current SB is being reconstructed. In Figure 24, the 64x64 regions shaded with horizontal lines without crosses represent regions with samples available for SBC. The regions shaded with horizontal lines with crosses represent regions of the left-neighbor SB that have been updated to the corresponding reconstructed samples of the current SB. The unshaded regions represent unprocessed regions of the current SB. The blocks shaded with diagonal lines represent the current coding block being processed.

[0159] As shown in FIG. 24, depending on the position of the current coding block relative to the current SB, the following restrictions may apply regarding the reference blocks of the IBC:

[0160] If the current block falls into the top-left 64x64 region of the current SB, in addition to the already reconstructed samples of the current SB, it can also refer to reference samples in the bottom-right, bottom-left, and top-right 64x64 blocks of the left SB, as shown in 2412 (for horizontal scanning) and 2422 (for vertical scanning) in Figure 24.

[0161] If the current block falls into the upper right 64x64 block of the current SB, in addition to the already reconstructed samples of the current SB, if the luma sample located at (0,64) relative to the current SB has not yet been reconstructed, the current block can also refer to reference samples in the lower left 64x64 block and the lower right 64x64 block of the left SB (2414 in Figure 24). Otherwise, the current block can also refer to reference samples in the lower right 64x64 block of the left SB of the SBC (2426 in Figure 24).

[0162] If the current block falls into the lower-left 64x64 block of the current SB, in addition to the already reconstructed samples of the current SB, if the luminance position (64,0) has not yet been reconstructed for the current SB, the current block can also refer to reference samples in the upper-right 64x64 block and the lower-right 64x64 block of the left SB (2424 in Figure 24). Otherwise, the current block can also refer to reference samples in the lower-right 64x64 block of the left SB of the SBC (2416 in Figure 24).

[0163] If the current block falls in the bottom right 64x64 block of the current SB, it can only refer to already reconstructed samples in the current SB of the SBC (2418 and 2428 in Figure 24).

[0164] As described above, in some example implementations, either or both of local and non-local based CTU / SB may be used for IBC reference block search and selection. Furthermore, when an on-chip RSM is used for local reference, some of the restrictions on the availability of already constructed CTU / SB as IBC reference regarding write-back latency may be relaxed or removed. Such implementations may be applied regardless of whether parallel decoding is used.

[0165] An exemplary implementation of local and non-local reference CTU / SBs that may be used for IBC is shown in FIG. 25, where again each square represents a CTU / SB. CTU / SBs shaded with diagonal lines represent the current CTU / SB (labeled as “0”), while CTU / SBs shaded with horizontal lines (labeled as “1”), vertical lines (labeled as “2”), and reverse diagonal lines (labeled as “3”) represent regions that have already been configured. Unshaded CTU / SBs represent regions that have not yet been reconstructed. Parallel decoding similar to that in FIGS. 19 and 20 is assumed. CTU / SBs shaded with vertical lines (“2”) and reverse diagonal lines (“3”) represent exemplary regions that are typically restricted as SBC references for the current CTU / SB due to write-back delays to the DPB when only off-chip memory is used for SBC references (see FIG. 20). When an on-chip RSM is used, one or more of the restricted regions in FIG. 20 need not be restricted, as they can be referenced directly from the RSM. Note that the number of restricted regions that can be accessed via the RSM for IBC reference may depend on the size of the RSM. In the example of FIG. 25, the RSM holds one CTU / SB and may employ the RSM update mechanism described above. Thus, one of two sets of adjacent CTU / SBs, labeled "3" and shaded with back-hatching in FIG. 20, may be available for local reference. The RSM then holds samples from the left CTU / SB and the current CTU / SB. Thus, in the example of FIG. 25, the search region available for the non-local SBC reference block includes the CTU / SB labeled "1" (search region 1, or SA1), the scan region available for the local SBC reference block includes the CTU / SB labeled "2" and "0" (SA2), and the restricted region of the SBC reference block includes the CTU / SB labeled "3" due to the write-back delay. In some other implementations, with sufficient on-chip RSM size to hold the entire restricted CTU / SB, all these potentially restricted regions can be included in the RSM for local reference.

[0166] Figure 26 further illustrates additional restrictions on reference coding blocks that may be used by IBC to predict the current coding block when both local and non-local reference searches are permitted and enabled. In Figure 26, each square again represents a CTU / SB. The CTU / SB shaded with horizontal lines represents a CTU / SB that has already been constructed. The unshaded CTU / SB represents an area that has not yet been reconstructed. The CTU / SB with reversed diagonal shading is not permitted for IBC reference. (Although only the current CTU / SB is shown here as permitted for IBC reference, the basic principle applies to the situation where only the first of two CTU / SBs with reversed diagonal shading is not permitted, as in Figure 25.) The coding block with the diagonal shading is the current coding block. Coding blocks A, B, and C are potential IBC reference blocks for the current coding block. The other shaded coding blocks in the current CTU / SB are already constructed. In this implementation, reference coding block B is allowed because it is completely outside the restricted region, in SA2 (local search area), and has already been reconstructed. Coding block C is also allowed because it is completely outside the restricted region, in SA1 (non-local search area), and has already been reconstructed. Coding block A cannot be used as a predictive block because it overrides SA1 and SA2. In other words, a reference coding block that overrides both SA1 and SA2 may not be allowed because the IBC's handling of SA1 and SA2 is different and may not be easily harmonized.

[0167] Turning to coding block vectors (BVs) in IBC, some exemplary implementations may use a process similar to that specified for inter prediction, but may use simpler rules for BV prediction candidate list construction. For example, the candidate list construction for some inter prediction implementations may consist of five spatial, one temporal, and six history-based candidates. In such inter prediction, multiple candidate comparisons may be performed for the history-based candidates to avoid duplicate entries in the final candidate list. Furthermore, list construction may include pairwise averaging candidates. In some exemplary implementations of BV prediction, the IBC list construction process may consider several (e.g., two) spatially adjacent BVs and several (e.g., five) history-based BVs (HBVPs), with only the first HBVP being compared with the spatial candidate when added to the candidate list. While regular inter prediction may use two different candidate lists, one for merge mode and one for normal mode, the candidate list for IBC may be used in both cases for BVs. However, merge mode may use up to six candidates in the list, while normal mode only uses the first two candidates. In some example implementations, block vector difference (BVD) coding uses a motion vector difference (MVD) process and can result in a final BV of arbitrary size. The reconstructed BV can point to an area outside the reference sample area and require correction by removing the absolute offset in each direction using modulo arithmetic by the width and height of the RSM.

[0168] In the above implementations where either or both local and non-local IBC references are used, a loop filter can be utilized under certain circumstances. For example, when a non-local IBC search range is used (with or without a local IBC search range), for example, for one picture, the loop filter can be disabled for the same picture within the IBC. On the other hand, when only a local IBC search range is used (without a non-local IBC search range), the loop filter can be used for the same picture. The loop filter can include, but is not limited to, a deblocking filter, a constrained directional enhancement filter (CDEF), sample adaptive offset (SAO) filtering, a cross-component sample offset (CCSO) filter, and a loop restoration filter (LR). In this way, a dedicated second picture buffer for enabling IBC can be avoided.

[0169] Turning now to IBC-related signaling, in some implementations, a flag used to indicate whether IBC is enabled for a current block is first transmitted in the bitstream for the current block. Such a flag may be signaled at a higher level, such as the CTU, CU, sequence, slice, or picture level. Then, if the current block is in an IBC mode (either as a mode separate from the inter-prediction mode or as an integral part of the inter-prediction mode), a reference block can be searched for and the corresponding BV can be determined by the encoder. For BV prediction, a BV difference is derived in the decoder by subtracting the predicted BV from the current BV, and the BV difference can then be classified into multiple types (e.g., four types) according to the horizontal and vertical components of the BV difference value. The BV difference type information may be further signaled in the bitstream, and the BV difference values of the two (horizontal and vertical) components may be signaled thereafter. In some example implementations, a set of high-level syntax flags is further included in the bitstream and used to indicate the allowable local and / or non-local reference ranges for IBC prediction. Such a set of flags can be signaled at various levels, for example, at the CTU, CU, sequence, slice, or picture level.

[0170] For example, a syntax flag called global_ibc_flag can be used to turn on / off non-local base regions, and another syntax flag called local_ibc_flag can be used to turn on / off local base regions for IBC prediction. These two syntax flags may be controlled independently of each other. In other words, these flags can have any combination of flag values. Each of these flags may be signaled at the same but different levels. In one example, when both flags are turned off, IBC is effectively disabled. In this case, the non-local IBC flag and the local IBC flag are set to a particular level. If the IBC is signaled independently at that level (such as the picture level or sequence level), then the IBC enablement flag at that level (such as the picture level or sequence level) mentioned above does not need to be signaled in the bitstream.

[0171] In some example implementations, the non-local IBC syntax flag global_ibc_flag and the local IBC syntax flag local_ibc_flag may be configured with certain dependencies. For example, the non-local global_ibc_flag may be signaled first. Depending on its value, local_ibc_flag may be signaled or inferred. If global_ibc_flag is equal to 0 (meaning not used), local_ibc_flag may be inferred to be 1 (meaning used), in association with IBC not being signaled but being signaled as being used (e.g., by a high-level IBC that enables the above syntax). In this example, one or both of the local and non-local flags are signaled only if the IBC enable flag is on. Otherwise, neither of these two flags need to be signaled.

[0172] In some example implementations, for example, if a non-local-based IBC search range is used for a picture, the loop filter is disabled for the same picture. On the other hand, if only a local-based IBC search range (rather than a non-local-based IBC search range) is used, the loop filter may be used for the same picture. Therefore, the loop filter enable flag for IBC is signaled on the condition that IBC is used and a non-local-based IBC search range is not used. In other words, if the other flags above indicate that a non-local-based IBC is not used, the loop filter enable flag may be signaled. The loop filter enable flag indicates whether the local-based IBC should invoke the loop filter. Otherwise, if IBC is not used or if only a non-local IBC is used, it is inferred that loop filtering is disabled, and the loop filter enable flag does not need to be signaled. Specifically, the signaling of the use of the loop filter may be conditional on the value of global_ibc_flag. If global_ibc_flag is on (meaning that a non-local IBC reference search is used), the picture's loop filter enable flag is inferred to be 0 (or turned off) and does not need to be signaled.

[0173] As described above, the various flags or syntax elements described above can indicate or signal the IBC reference mode of the current block, either alone or in various combinations. The IBC reference mode represents how the local search region and the non-local search region are accessible to the IBC prediction block. For example, a combination of these flags or syntax elements can indicate that only the CTUs or SBs in the local search region are available for IBC reference, and thus for the local reference IBC mode. In another example, a combination of these flags or syntax elements can indicate that only the CTUs or SBs in the non-local search region are available for IBC reference, and thus for the non-local IBC reference mode. In yet another example, a combination of these flags or syntax elements can indicate that both the CTUs or SBs in the local search region and the non-local search region are available for IBC reference, and thus for both the local and non-local reference IBC modes. To determine the IBC reference mode, the decoder can extract these syntax elements independently or based on their dependencies as described above, thereby obtaining information for determining the search region of the IBC reference block.

[0174] Figure 27 shows a flowchart 2700 of an example method according to the principles underlying the above-described implementation of IBC. The example method flow starts at 2701. At S2710, at least one syntax element associated with intra block copy (IBC) prediction of a video block is extracted from a video stream. At S2720, an IBC reference mode for IBC prediction of the video block is determined, where the IBC reference mode can include one of an IBC-free mode, a local reference IBC mode, a non-local reference IBC mode, and a local and non-local reference IBC mode. At S2730, a reconstructed sample of the video block is generated from the video stream based on the IBC reference mode. The example method flow ends at S2799.

[0175] In the embodiments and implementations of the present disclosure, any steps and / or operations may be combined or arranged in any quantity or order as needed. Two or more of the steps and / or operations may be performed in parallel. The embodiments and implementations of the present disclosure may be used separately or combined in any order. Furthermore, each of the methods (or embodiments), the encoder, and the decoder may be implemented by processing circuitry (e.g., one or more processors or one or more integrated circuits). In one example, the one or more processors execute a program stored on a non-transitory computer-readable medium. The embodiments of the present disclosure may apply to luma blocks or chroma blocks. The term block may be interpreted as a prediction block, a coding block, or a coding unit (CU). The term block here may also be used to refer to a transform block. In the following sections, references to "block size" may refer to the block width or height, the maximum value of the width and height, the minimum value of the width and height, the size of a region (width * height), or the aspect ratio of the block (width:height or height:width).

[0176] The techniques described above may be implemented as computer software using computer-readable instructions and physically stored on one or more computer-readable media. For example, Figure 28 illustrates a computer system (2800) suitable for implementing certain embodiments of the disclosed subject matter.

[0177] Computer software may be coded using any suitable machine code or computer language that can be subjected to assembly, compilation, linking, or similar mechanisms to generate code containing instructions that can be executed by one or more computer central processing units (CPUs) and graphics processing units (GPUs), etc., directly, or through interpretation and execution of microcode, etc.

[0178] The instructions may be executed by various types of computers or components thereof, including, for example, personal computers, tablet computers, servers, smartphones, gaming devices, Internet of Things devices, and the like.

[0179] 28 for computer system (2800) are exemplary in nature and are not intended to suggest any limitation as to the scope of use or functionality of the computer software implementing embodiments of the present disclosure. The arrangement of components should not be interpreted as having any dependency or requirement relating to any one or combination of components illustrated in the exemplary embodiment of computer system (2800).

[0180] The computer system (2800) may include certain human interface input devices. Such human interface input devices may respond to input by one or more human users, for example, via tactile input (e.g., keystrokes, swipes, data glove movements), audio input (e.g., voice, clapping), visual input (e.g., gestures), or olfactory input (not shown). The human interface devices may be used to capture certain media that do not necessarily involve direct conscious human input, such as audio (speech, music, ambient sounds, etc.), images (scanned images, photographic images obtained from a still image camera, etc.), and video (two-dimensional video, three-dimensional video including stereoscopic video, etc.).

[0181] The input human interface devices may include one or more (only one of each is shown) of a keyboard (2801), a mouse (2802), a trackpad (2803), a touch screen (2810), a data glove (not shown), a joystick (2805), a microphone (2806), a scanner (2807), and a camera (2808).

[0182] The computer system (2800) may also include certain human interface output devices. Such human interface output devices may stimulate one or more of the human user's senses, for example, through tactile output, sound, light, and smell / taste. Such human interface output devices may include haptic output devices (e.g., haptic feedback via a touchscreen (2810), data gloves (not shown), or joystick (2805), although some haptic feedback devices may not function as input devices), audio output devices (e.g., speakers (2809), headphones (not shown)), and visual output devices (e.g., screens (2810), including CRT screens, LCD screens, plasma screens, and OLED screens, each with or without touchscreen input capability and each with or without haptic feedback capability, some of which may be capable of outputting two-dimensional visual output or three-dimensional or higher-dimensional output through means such as stereographic output, virtual reality glasses (not shown), holographic displays and smoke tanks (not shown), and printers (not shown)).

[0183] The computer system (2800) may also include human-accessible storage devices and their associated media such as optical media including CD / DVD ROM / RW (2820) with CD / DVD or similar media (2821), thumb drives (2822), removable hard drives or solid state drives (2823), legacy magnetic media such as tape and floppy disks (not shown), and dedicated ROM / ASIC / PLD-based devices such as security dongles (not shown).

[0184] Those skilled in the art will also understand that the term "computer-readable medium" as used in connection with the presently disclosed subject matter does not encompass transmission media, carrier waves, or other transitory signals.

[0185] The computer system 2800 may also include an interface 2854 to one or more communication networks 2855. The networks may be, for example, wireless, wired, or optical. The networks may further be local, wide-area, metropolitan, vehicular, and industrial, real-time, delay-tolerant, and the like. Examples of networks include local area networks such as Ethernet; cellular networks including WLAN, GSM, 3G, 4G, 5G, LTE, and the like; television wired or wireless wide-area digital networks including cable, satellite, and terrestrial television; and vehicular and industrial networks including CAN bus. Certain networks typically require an external network interface adapter connected to a particular general-purpose data port or peripheral bus 2849 (e.g., a USB port on the computer system 2800); others are generally integrated into the core of the computer system 2800 by connecting to a system bus, as described below (e.g., an Ethernet interface for a PC computer system or a cellular network interface for a smartphone computer system). Using any of these networks, the computer system 2800 can communicate with other entities. Such communications may be one-way receive only (e.g., broadcast TV), one-way transmit only (e.g., CANbus to a particular CANbus device), or two-way, e.g., to other computer systems using local or wide area digital networks. Specific protocols and protocol stacks may be used in each of those networks and network interfaces, as described above.

[0186] The aforementioned human interface devices, human-accessible storage devices, and network interfaces may be attached to the core (2840) of the computer system (2800).

[0187] The core (2840) may include one or more central processing units (CPUs) (2841), graphics processing units (GPUs) (2842), dedicated programmable processing units in the form of field programmable gate arrays (FPGAs) (2843), task-specific hardware accelerators (2844), and graphics adapters (2850). These devices, along with read-only memory (ROM) (2845), random access memory (2846), and internal mass storage devices (2847), such as internal non-user-accessible hard drives or SSDs, may be connected via a system bus (2848). In some computer systems, the system bus (2848) is accessible in the form of one or more physical plugs, allowing expansion with additional CPUs, GPUs, and the like. Peripheral devices may be attached directly to the core's system bus (2848) or via a peripheral bus (2849). In one example, a display (2810) may be connected to the graphics adapter (2850). Peripheral bus architectures include PCI, USB, and the like.

[0188] The CPU (2841), GPU (2842), FPGA (2843), and accelerator (2844) can combine to execute specific instructions that may constitute the aforementioned computer code. That computer code can be stored in ROM (2845) or RAM (2846). Transient data can also be stored in RAM (2846), while persistent data can be stored, for example, in internal mass storage (2847). The use of cache memory, which can be closely associated with one or more CPUs (2841), GPUs (2842), mass storage devices (2847), ROM (2845), RAM (2846), etc., can enable fast storage and retrieval in any of the memory devices.

[0189] The computer-readable medium may bear computer code for performing various computer-implemented operations. The medium and computer code may be those specially designed and constructed for the purposes of the present disclosure, or they may be of the kind well known and available to those skilled in the computer software arts.

[0190] As a non-limiting example, a computer system (2800) having the architecture, and in particular a core (2840), can provide functionality as a result of processor(s) (including a CPU, GPU, FPGA, accelerator, etc.) executing software embodied in one or more tangible computer-readable media. Such computer-readable media may be user-accessible mass storage devices as introduced above, as well as media associated with specific storage devices of the core (2840) that are non-transitory in nature, such as the core's internal mass storage device (2847) or ROM (2845). Software implementing various embodiments of the present disclosure can be stored in such devices and executed by the core (2840). The computer-readable media may include one or more memory devices or chips, depending on particular needs. The software can cause the core (2840), and in particular the processors therein (including a CPU, GPU, FPGA, etc.), to perform particular processes or particular portions of particular processes described herein, including defining data structures stored in RAM (2846) and modifying such data structures according to the software-defined processes. Additionally, or alternatively, a computer system may provide functionality as a result of logic hardwired or otherwise embodied in circuitry (e.g., accelerator (2844)) that can operate in place of or in conjunction with software to perform particular processes or portions of particular processes described herein. Where appropriate, references to software may encompass logic, and vice versa. Where appropriate, references to computer-readable media may encompass circuitry (such as an integrated circuit (IC)) that stores software for execution, circuitry that embodies logic for execution, or both. The present disclosure encompasses any appropriate combination of hardware and software.

[0191] While this disclosure has described several exemplary embodiments, there are modifications, substitutions, and various substitute equivalents that fall within the scope of this disclosure. It will thus be appreciated that those skilled in the art can devise numerous systems and methods that, although not explicitly shown or described herein, embody the principles of the present disclosure and are therefore within its spirit and scope.

[0192] Appendix A: Acronyms JEM: Joint Exploration Model VVC: Versatile Video Coding BMS: Benchmark Set MV: Motion Vector HEVC: High Efficiency Video Coding SEI: Supplemental Extended Information VUI: Video Usability Information GOP: Group of Pictures TU: Conversion unit PU: Prediction Unit CTU: Coding Tree Unit CTB: coding tree block PB: Predicted Block HRD: Hypothetical Reference Decoder SNR: Signal-to-Noise Ratio CPU: Central Processing Unit GPU: Graphics Processing Unit CRT: cathode ray tube LCD: Liquid crystal display OLED: Organic Light Emitting Diode CD: Compact Disc DVD: Digital Video Disc ROM: Read-Only Memory RAM: Random Access Memory ASIC: Application Specific Integrated Circuit PLD: Programmable Logic Device LAN: Local Area Network GSM: Global System for Mobile Communications LTE: Long Term Evolution CANBus: Controller Area Network Bus USB: Universal Serial Bus PCI: Peripheral Component Interconnect FPGA: Field Programmable Gate Area SSD: Solid State Drive IC: Integrated Circuit HDR: High Dynamic Range SDR: Standard Dynamic Range JVET: Joint Video Exploration Team MPM: Most Probable Mode WAIP: Wide-angle Intra Prediction CU: Coding Unit PU: Prediction Unit TU: Conversion unit CTU: Coding Tree Unit PDPC: Position-dependent prediction combination ISP: Intra-subpartition SPS: Sequence parameter settings PPS: Picture Parameter Set APS: Adaptive Parameter Set VPS: Video Parameter Set DPS: Decoding Parameter Set ALF: Adaptive Loop Filter SAO: Sample Adaptive Offset CC-ALF: Cross-component adaptive loop filter CDEF: Constrained Directivity Enhancement Filter CCSO: Cross-component sample offset LSO: Local Sample Offset LR: Loop Recovery Filter AV1:AOMedia Video 1 AV2:AOMedia Video 2 RPS: Reference Picture Set DPB: Decoded Picture Buffer MMVD: Merge mode with motion vector difference IntraBC or IBC: Intrablock copy BV: Block Vector BVD: Block Vector Difference RSM: Reference Sample Memory [Explanation of symbols]

[0193] 101 Samples 102 Arrow 103 Arrow Block 201 202 Surrounding Samples 203 Surrounding Samples 204 Surrounding Samples 205 Surrounding Samples 206 Surrounding Samples 104 blocks 300 Communication Systems 310 Terminal Devices 320 terminal devices 330 Terminal Devices 340 Terminal Devices 350 Network 400 Communication Systems 401 Video Source 402 Video Picture or Image Stream 403 Video Encoder 404 Encoded Video Data (or Encoded Video Bitstream) 405 Streaming Server 406 Client Subsystem 407 Copy of encoded video data 408 Client Subsystem 409 Copy of encoded video data 410 Video Decoder 411 Video Picture Output Stream 412 Display 413 Video Capture Subsystem 420 Electronic equipment 430 Electronic equipment 501 Channel 510 Video Decoder 512 display 515 buffer memory 520 Parser 521 Symbol 530 Electronic Devices 531 Receiver 551 Scaler / Descaler Unit 552 Intra Prediction Units 553 Motion Compensation Prediction Unit 555 Aggregator 556 Loop Filter Unit 557 Reference Picture Memory 558 Current Picture Buffer 601 Video Sources 603 Video Encoder 620 Electronic Devices, Encoders 630 Source Coder 632 Coding Engine 633 Decoder, Decoding Unit 634 Reference Picture Memory 635 Predictor 640 Transmitter 643 coded video sequence 645 Entropy Coder 650 Controller 660 channels 703 Video Encoder 721 General-purpose controller 722 Intra Encoder 723 Residual Calculator 724 Residual Encoder 725 Entropy Encoder 726 Switch 728 Residual Decoder 730 Interencoder 810 Video Decoder 871 Entropy Decoder 872 Intra Decoder 873 Residual Decoder 874 Reconstruction Module 880 Interdecoder 902 Splitting Options or Patterns 904 Splitting Options or Patterns 906 Splitting Options or Patterns 908 Splitting Options or Patterns 1002 Partition, Pattern 1004 Partition, Pattern 1006 Partition, Pattern 1008 Partition, Pattern 1102 Vertical bisection 1104 Horizontal bisection 1106 Vertical third division 1108 Horizontal third division 1200 base block 1202 Square Partition 1204 Square Partition 1206 Square Partition 1208 Square Partition 1402 partition 1404 Partition 1406 Partition 1408 Partition 1410 Overall Example Partition Patterns 1420 Corresponding Tree Structure / Representation 1502 Square Coding Block 1602 Block 1802 Block 1804 Current CTU 1806 Coding Block 1808 thick dotted frame 1810 CTU / SB 2104 Intermediate Time 2106 Intermediate Time 2108 Intermediate Time 2302 Panel 2304 Panel 2402 Panel 2404 Panel 2700 Flowchart 2800 Computer Systems 2801 keyboard 2802 Mouse 2803 Trackpad 2805 Joystick 2806 Microphone 2807 Scanner 2808 Camera 2809 Speaker 2810 screen 2820 CD / DVD ROM / RW 2821 Medium 2822 thumb drive 2823 Removable Hard Drive or Solid State Drive 2840 cores 2841 Central Processing Unit (CPU) 2842 Graphics Processing Unit (GPU) 2843 Field Programmable Gate Array (FPGA) 2844 Hardware Accelerator 2845 Read-Only Memory (ROM) 2846 Random Access Memory 2847 Internal Mass Storage 2848 System Bus 2849 Peripheral Bus 2850 graphics adapter 2854 Network Interface 2855 Communication Networks

Claims

1. 1. A method for reconstructing video blocks in a video stream, comprising: receiving the video stream; extracting at least one syntax element from the video stream, the at least one syntax element being associated with intra block copy (IBC) prediction of the video block; determining an IBC reference mode for the IBC prediction of the video block, the IBC reference mode comprising one of an IBC-free mode, a local reference IBC mode, a non-local reference IBC mode, and a local and non-local reference IBC mode; generating reconstructed samples of the video blocks from the video stream based on the IBC reference mode.

2. The method of claim 1 , wherein the video block belongs to a current IBC prediction unit comprising multiple video blocks.

3. 3. The method of claim 2, wherein, for the non-local reference IBC mode, reference blocks for the IBC prediction of the video block comprise reference samples in a reconstructed intra-frame region that is not adjacent to the current IBC prediction unit in a coding direction of the current IBC prediction unit.

4. 4. The method of claim 1, wherein, in the local reference IBC mode, a reference block for the IBC prediction of the video block comprises a reference sample within a predetermined set of neighboring units of the current IBC prediction unit or a video block already reconstructed with the current IBC prediction unit.

5. The method of claim 4 , wherein the predetermined set of neighboring units comprises a single left-neighbor unit of the current IBC prediction unit.

6. The method of claim 4 , wherein, for the local reference IBC mode, reference samples for the IBC prediction are maintained in a fixed-size on-chip reference sample memory (RSM).

7. The method of claim 6 , wherein the fixed size of the RSM corresponds to the size of one IBC prediction unit.

8. a first portion of the RSM comprising corresponding samples of the video block already reconstructed in the current IBC prediction unit; a second portion of the RSM comprising corresponding reconstructed samples from a predetermined set of the neighboring units; The method of claim 7.

9. 10. The method of claim 8, further comprising: replacing reconstructed samples of the neighboring unit in the RSM that corresponds to the video block in the current IBC prediction unit with the reconstructed samples of the video block.

10. the current IBC prediction unit is partitioned into a predetermined partition set; the video block is a first coding block to be reconstructed for a current partition of the predetermined partition set; The method further includes resetting a partition of the RSM corresponding to the current partition as unavailable for IBC reference before reconstruction of the video block. The method of claim 6.

11. 3. The method of claim 1, wherein the at least one syntax element comprises a first flag for indicating, when set, that a local IBC reference is valid, and a second flag for indicating, when set, that a non-local reference IBC is valid.

12. determining, in response to the first flag being set and the second flag not being set, that the IBC reference mode is the local reference IBC mode; determining, in response to the second flag being set and the first flag not being set, that the IBC reference mode is the non-local reference IBC mode; determining, in response to both the first flag and the second flag being unset, that the IBC reference mode is the local and non-local reference IBC mode; determining, in response to both the first flag and the second flag being unset, that the IBC reference mode is the IBC-less mode. The method of claim 11.

13. The method of claim 11 , wherein the first flag and the second flag are signaled in the video stream at a coding block level, a coding unit level, a coding tree unit level, a slice level, a picture level, or a sequence level.

14. 3. The method of claim 1, wherein the at least one syntax element comprises a first flag to indicate whether IBC is used for the video block.

15. determining, in response to the first flag indicating that IBC is not used for the video block, that the IBC reference mode is the IBC-less mode. The method of claim 14.

16. In response to the first flag indicating that IBC is used for the video block, further extracting a second flag as part of the at least one syntax element to indicate whether a non-local IBC reference is used; inferring, in response to the second flag indicating that a non-local IBC reference is not used, that the IBC reference mode of the video block is the local reference IBC mode.

16. The method of claim 15.

17. further extracting, in response to the second flag indicating that a non-local IBC reference is used, a third flag as part of the at least one syntax element to indicate whether a local IBC reference is used; determining, in response to the third flag indicating that a local IBC reference is used, that the IBC reference mode is the local and non-local reference IBC mode; determining, in response to the third flag indicating that a local IBC reference is not used, that the IBC reference mode is the non-local reference IBC mode; 17. The method of claim 16.

18. loop filtering is enabled when the IBC reference mode is the local reference IBC mode; the loop filtering process is disabled when the IBC reference mode is the non-local reference IBC mode or the local and non-local reference IBC mode; 4. The method according to any one of claims 1 to 3.

19. 20. The method of claim 18, wherein whether the loop filtering is enabled is derived from the at least one syntax element for signaling the IBC reference mode.

20. 1. A video processing device for reconstructing video blocks in a video stream, the device comprising: a memory for storing computer instructions; and executing said computer instructions to: extracting at least one syntax element from the video stream, the at least one syntax element being associated with intra block copy (IBC) prediction of the video block; determining an IBC reference mode for the IBC prediction of the video block, the IBC reference mode comprising one of an IBC-free mode, a local reference IBC mode, a non-local reference IBC mode, and a local and non-local reference IBC mode; generating reconstructed samples of the video blocks from the video stream based on the IBC reference mode.

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