Display device

The display device addresses high-resolution and high-frequency challenges by using an adder circuit outside the display area to enhance pixel aperture ratio and reduce power consumption, achieving improved image quality and brightness.

JP2025120196APending Publication Date: 2025-08-15SEMICON ENERGY LAB CO LTD
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Patent Information

Application Number
JP2025087968
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2018-05-25
Filing Date
2025-05-27
Publication Date
2025-08-15

AI Technical Summary

Technical Problem

Display devices face challenges in achieving high resolution, high frame frequency, wide data potential range, and high brightness while maintaining low power consumption and aperture ratio, particularly with the increasing complexity of pixel circuits.

Method used

A display device design incorporating an adder circuit outside the display area that efficiently adds data from the source driver, using transistors and capacitors to generate higher voltages and reduce wire density within the display area, thereby enhancing pixel aperture ratio and reducing power consumption.

Benefits of technology

The solution allows for improved image quality with higher brightness, increased frame frequency, and reduced power consumption by effectively supplying voltages beyond the source driver's output, while maintaining a high aperture ratio.

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Abstract

To provide a display device whose image quality can be increased.SOLUTION: A display device includes an addition circuit provided inside and outside a display region. The addition circuit has a function of adding a plurality of pieces of data supplied from a source driver. A part of elements in the addition circuit is disposed in the display region in a divisional manner. Therefore, the restriction about the size of the element included in the addition circuit can be relieved and the data can be added efficiently. Moreover, by providing another element included in the addition circuit outside the display region, the number of wires in the display region can be reduced and an opening ratio in a pixel can be increased.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] One aspect of the present invention relates to a display device.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field of one aspect relates to an article, a method, or a manufacturing method. One aspect of the present invention is a process, machine, manufacture, or composition. Therefore, the invention disclosed herein more specifically relates to The technical field of one aspect of the present invention is a semiconductor device, a display device, a liquid crystal display device, a light-emitting device, a lighting device, device, power storage device, storage device, imaging device, operation method thereof, or manufacturing method thereof One example can be mentioned.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. The term generally refers to a semiconductor device. A transistor and a semiconductor circuit are examples of a semiconductor device. A display device, an imaging device, or an electronic device may include a semiconductor device. [Background technology]

[0004] A technology for constructing a transistor using a metal oxide formed on a substrate has been attracting attention. For example, a transistor using zinc oxide or In-Ga-Zn oxide is used for the display of a display device. The technology used for the basic switching elements is disclosed in Patent Document 1 and Patent Document 2. .

[0005] In addition, a memory device having a structure in which a transistor with extremely low off-state current is used as a memory cell is disclosed in a patent document. This is disclosed in reference 3.

[0006] Furthermore, various improvements and applications have been attempted for liquid crystal display devices. Patent Document 4 discloses a transparent display that displays images by sequential operations. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Japanese Patent Application Laid-Open No. 2007-123861 [Patent Document 2] Japanese Patent Application Laid-Open No. 2007-96055 [Patent Document 3] Japanese Patent Application Laid-Open No. 2011-119674 [Patent Document 4] Japanese Patent Application Publication No. 2018-21974 Summary of the Invention [Problem to be solved by the invention]

[0008] Display devices are becoming increasingly high-resolution, with 8K4K (pixel count: 7680 x 4320) resolution or Hardware that can display at higher resolutions is being developed. The introduction of HDR (High Dynamic Range) display technology, which improves image quality through adjustments, is also progressing. There is.

[0009] To display clear gradations, the range of data potentials that can be supplied to the display element must be wide. On the other hand, for example, the output voltage of a source driver for a liquid crystal display device is about 15V. To supply a voltage higher than this to the display element, a high-output source driver must be used. High-output source drivers consume a lot of power, so a new driver IC must be developed. Sometimes it has to be.

[0010] In addition, to display moving images more smoothly, it is necessary to increase the frame frequency. As the number of pixels increases, the horizontal period becomes shorter, making it difficult to increase the frame frequency. By realizing a configuration that makes it easy to increase the frame frequency, field sequential This also makes it easier to apply to liquid crystal display devices.

[0011] While it is desirable to solve the above problems, increasing the number of components in the pixel circuit reduces the aperture ratio. Therefore, it is preferable to configure the pixel circuit with fewer elements.

[0012] Therefore, one aspect of the present invention is to provide a display device that can improve image quality. One of the purposes is to supply a voltage to the display element that is equal to or higher than the output voltage of the source driver. It is another object of the present invention to provide a display device capable of displaying an image with high brightness. It is an object of the present invention to provide a display device that can improve the image quality. It is an object of the present invention to provide a display device capable of increasing the wave number of pixels. An object of the present invention is to provide a display device that can increase the aperture ratio.

[0013] Another object is to provide a display device with low power consumption. One of the purposes is to provide a new display device. Another object of the present invention is to provide a method for driving the display device. Another object is to provide a novel semiconductor device or the like.

[0014] The description of these problems does not preclude the existence of other problems. It is not necessary for the present invention to solve all of these problems. The above will be made clear from the description, drawings, claims, etc. It is possible to extract other issues from the descriptions in the patent, claims, etc. [Means for solving the problem]

[0015] One aspect of the present invention relates to a display device capable of improving image quality.

[0016] One embodiment of the present invention is a display device having a pixel and a first circuit, the first circuit is electrically connected to the path, and the first circuit has a transistor and a first capacitance element; The transistor is provided outside the display area, the first capacitor element is provided within the display area, and the first The circuit has a function of adding the first data and the second data to generate the third data. The pixel has a function of holding third data and a function of performing display according to the third data. It is a display device having the above.

[0017] The first capacitance element has a plurality of second capacitance elements, and the plurality of second capacitance elements are connected in parallel. It is composed of:

[0018] The first circuit includes a first transistor, a second transistor, a third transistor, a first capacitor element, and one of the source and drain of the first transistor is connected to a pixel and one of the source and drain of the first transistor is electrically connected to the first capacitor. The other electrode of the first capacitance element is electrically connected to the second transistor. the source or drain of the first transistor, and the source or drain of the second transistor. Either the source or the drain of the third transistor is electrically connected to either the source or the drain of the third transistor. The other of the source or drain of the first transistor is connected to the source of the second transistor. The source and drain may be electrically connected to each other.

[0019] The pixel has a fourth transistor and a second circuit, and One of the source and drain of the fourth transistor is electrically connected to the first circuit. The other of the drains is electrically connected to a second circuit, and the second circuit includes a display element. It is possible.

[0020] The second circuit includes a fifth transistor, a third capacitor, and a light-emitting element as a display element. The gate of the fifth transistor is connected to the source or drain of the fourth transistor. The source or drain of the fifth transistor is electrically connected to the other. One electrode of the light emitting element is electrically connected to one of the electrodes of the third capacitor element. The other electrode of the third capacitor is electrically connected to the gate electrode of the fifth transistor. The power supply voltage Vcc can be electrically connected to the power supply voltage Vcc.

[0021] The second circuit further includes a sixth transistor, and the source or drain of the sixth transistor One of the drains is electrically connected to one electrode of the light-emitting element, and the source of the sixth transistor is The other of the source and drain of the fifth transistor is electrically connected to the source and drain of the fifth transistor. may be connected to

[0022] Alternatively, the second circuit has a liquid crystal element as a display element, and one electrode of the liquid crystal element is connected to a fourth The gate electrode may be electrically connected to one of the source and the drain of the transistor. The second circuit further includes a fourth capacitor, and one electrode of the fourth capacitor is connected to the liquid crystal element. The electrode may be electrically connected to one of the electrodes.

[0023] a transistor included in the first circuit and the pixel has a metal oxide in a channel formation region; Metal oxides include In, Zn, and M (M is Al, Ti, Ga, Sn, Y, Zr, La, C It is preferred that the alloy comprises at least one of:

[0024] The channel width of the transistor in the first circuit is Preferably it is greater than the width. [Effects of the Invention]

[0025] To provide a display device capable of improving image quality by using one embodiment of the present invention. Alternatively, a voltage higher than the output voltage of the source driver can be supplied to the display element. Alternatively, it is possible to provide a display device that can increase the brightness of a displayed image. Alternatively, a display device capable of increasing the frame frequency can be provided. Alternatively, a display device capable of increasing the aperture ratio of a pixel can be provided. It is possible.

[0026] Alternatively, a display device with low power consumption can be provided. Alternatively, a novel display device or the like can be provided. Furthermore, a method for operating the display device can be provided. Alternatively, a novel semiconductor device or the like can be provided. It can be provided. [Brief explanation of the drawings]

[0027] [Figure 1] 1A and 1B are diagrams illustrating a display device. [Figure 2] FIG. 2 is a diagram illustrating an adder circuit and a pixel. [Figure 3] 1A and 1B are diagrams illustrating a display device. [Figure 4] 4 is a timing chart illustrating the operation of an adder circuit and a pixel. [Figure 5] FIG. 2 is a diagram illustrating an adder circuit and a pixel. [Figure 6] 1A to 1D are diagrams illustrating circuit blocks. [Figure 7] 1A to 1D are diagrams illustrating circuit blocks. [Figure 8] 1A to 1C are diagrams illustrating circuit blocks. [Figure 9] 1A and 1B are diagrams illustrating an adder circuit and a pixel. [Figure 10] FIG. 2 is a diagram illustrating the configuration of an adder circuit and a pixel used in a simulation. [Figure 11] 1 is a timing chart used in a simulation. [Figure 12] (A) to (D) Schematic diagrams explaining the simulation results. [Figure 13] FIG. 2 is a diagram illustrating a pixel layout. [Figure 14] 1A to 1C are diagrams illustrating a display device. [Figure 15] (A) and (B) are diagrams illustrating the touch panel. [Figure 16] 1A and 1B are diagrams illustrating a display device. [Figure 17] 1A and 1B are diagrams illustrating a display device. [Figure 18] 1A and 1B are diagrams illustrating a display device. [Figure 19] 1A and 1B are diagrams illustrating a display device. [Figure 20] 1A to 1E are diagrams illustrating a display device. [Figure 21] 1A to 1C are diagrams illustrating a transistor. [Figure 22]1A to 1C are diagrams illustrating a transistor. [Figure 23] 1A to 1C are diagrams illustrating a transistor. [Figure 24] 1A to 1C are diagrams illustrating a transistor. [Figure 25] (A) to (F) are diagrams illustrating electronic devices. DETAILED DESCRIPTION OF THE INVENTION

[0028] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. The present invention may be modified in various forms and details without departing from the spirit and scope of the present invention. It will be readily apparent to those skilled in the art that the present invention can be modified in various ways. The present invention is not limited to the above-described embodiments. In the drawings, the same reference numerals are used to designate the same parts or parts having similar functions. The same elements in the drawings are used interchangeably, and repeated explanations may be omitted. In some cases, the timing may be omitted or changed as appropriate between different drawings.

[0029] In addition, even if it is shown as a single element on the circuit diagram, there may be functional problems. If there is no need for a single element, the element may be composed of multiple elements. For example, a transistor that operates as a switch may be used. In some cases, multiple resistors may be connected in series or in parallel. In some cases, the sensor may be divided and placed in multiple positions.

[0030] In addition, when one conductor has multiple functions such as wiring, electrode, and terminal, In this specification, the same element may be referred to by multiple names. Even if the circuit diagram shows direct connections between elements, In some cases, the elements are connected via multiple conductors, and in this specification, Even configurations such as this are included in the category of direct connection.

[0031] (Embodiment 1) In this embodiment, a display device which is one embodiment of the present invention will be described with reference to drawings.

[0032] One embodiment of the present invention is to provide a circuit having a function of adding data (hereinafter referred to as an adding circuit) in a display area. The adder circuit adds the data supplied from the source driver. Therefore, it is possible to generate a voltage higher than the output of the source driver. do.

[0033] The adder circuit is electrically connected to all pixels in the column direction of the display area, and some of its elements are Therefore, the size of the elements in the adder circuit is limited to This allows the addition of data to be performed efficiently. By placing other elements outside the display area, the number of wires within the display area can be reduced. The aperture ratio of the pixel can be increased.

[0034] FIG. 1 illustrates a display device according to one embodiment of the present invention. The pixel 10, the source driver 12, the gate driver 13, and the circuit 11 are arranged in the direction of the arrow. The source driver 12 is electrically connected to the circuit 11. The gate driver 13 , is electrically connected to the pixel 10. The circuit 11 is electrically connected to the pixel 10. Although an example in which one gate driver 13 is provided on one end of the display area 15 is shown, Alternatively, another gate driver may be provided on the other end of the pixel 10, and the pixels 10 may be driven by two gate drivers.

[0035] The circuit 11 can be provided for each column and is electrically connected to all the pixels 10 arranged in the same column. Additionally, the elements of circuit 11 can be provided inside or outside the display area.

[0036] The circuit 11 is an adder circuit, and receives first data and second data supplied from the source driver 12. The pixel 10 has a function of adding the data of the first and second pixels by capacitive coupling to generate third data. a transistor and a display element, and a function of retaining third data and a function of storing third data The display element has a function of displaying a signal in accordance with the received signal.

[0037] FIG. 2 shows the circuit 11 and the pixel 1 arranged in any one column (the m-th column) of the display device shown in FIG. 0 (pixels 10[m, 1] to [m, n] (m and n are natural numbers equal to or greater than 1)) do.

[0038] The circuit 11 includes a transistor 101, a transistor 102, a transistor 103, and a capacitor. The transistor 101 may have a capacitance element 104. One of the inputs is electrically connected to one electrode of the capacitor 104. One electrode is electrically connected to one of the source and the drain of the transistor 102 . The source or drain of the transistor 102 is connected to the source or drain of the transistor 103. is electrically connected to one of the drains.

[0039] Here, the capacitance element 104 is configured by connecting a plurality of capacitance elements 106 in parallel. 6 in a distributed manner within the display area, the total area of the capacitor elements 104 can be increased. In addition, the area occupied by the circuit 11 outside the display area can be reduced. It is possible to make the frame narrow. Note that some capacitor elements 106 are also provided outside the display area. The number of the capacitor elements 106 does not have to match the number of the pixels 10. By adjusting the number of capacitance elements 106 connected in parallel, the capacitance value of the capacitance element 104 can be adjusted to a desired value. can be a value of

[0040] The capacitor 106 has a wiring 125 as one electrode and another wiring overlapping with the wiring 125 as the other electrode. Therefore, the capacitance element 106 is arranged in the display area as shown in FIG. However, the aperture ratio does not decrease significantly.

[0041] The pixel 10 may include a transistor 105 and a circuit block 110. The circuit block 110 includes a transistor, a capacitance element, a display element, and the like. One of the source and drain of the transistor 105 can be a transistor. The source or drain of the transistor 105 is electrically connected to the source or drain of the transistor 101. The other of the source and drain is electrically connected to the circuit block 110 .

[0042] Here, one of the source and drain of the transistor 101 and one of the capacitors 104 A wiring (wiring 12) connecting the electrode and one of the source and drain of the transistor 105 5) is a node NM. The other of the source and drain of the transistor 105 and The wiring connecting the circuit block 110 is referred to as a node NP. The node NP is a floating The display element included in the circuit block 110 operates in accordance with the potential of the node NP. Make.

[0043] The circuit 11 and the pixel 10 are connected to various wirings. The gate of the transistor 101 is electrically connected to a wiring 121. The gate of the transistor 102 is electrically connected to a wiring 122. The gate of the transistor 103 is electrically connected to the wiring 121. The gate of the transistor 105 is electrically connected to a wiring 123. Either the source or the drain of the transistor 101 is electrically connected to the wiring 125. The other of the source or drain of transistor 102 and the other of the source or drain of transistor 101 The other drain is electrically connected to the wiring 124. Rain's other side is V ref Wiring that can supply a reference potential (e.g., 0V) and electrically connected to each other.

[0044] The wirings 121, 122, and 123 (123[1] to [n]) function as gate lines. For example, the wirings 121 and 122 are electrically connected to a circuit that controls the operation of the circuit 11. The wiring 123 can be electrically connected to the gate driver 13. The wiring 124 can be electrically connected to the source driver 12 (see FIG. 1).

[0045] In the circuit 11, first, the first data (weight: W) is written to the node NM. The other electrode of the capacitor 104 is connected to a “V ref " is supplied to the capacitor element 104, and "WV re f Next, the node NM is set to a floating state, and the other potential of the capacitor 104 is set to a Provide the pole with the second data (Data: D).

[0046] At this time, the capacitance value of the capacitance element 104 is C 104 , the capacitance value of node NM is C NM Then, The potential of node NM is W+(C 104 / (C 104 +C NM ))×(DV ref ) and Here, C 104 Increase the value of C NM If we can ignore the value of The potential of M is "W+DV ref In one aspect of the present invention, as described above, It is easy to increase the total area of 104 and the capacitance value, so data addition can be performed efficiently. This can be done easily.

[0047] Therefore, “W” = “D”, “V ref "=0V, and C 104 C NM Compared to If it is large enough, the potential of node NM approaches "2D" or "2W", and the source driver This means that a potential approximately twice the output of 12 can be supplied to node NM.

[0048] This action makes it possible to generate a high voltage even when using a general-purpose driver IC. For example, it is possible to drive a liquid crystal element that requires a high voltage for gradation control. The voltage supplied from the source driver 12 to drive general liquid crystal elements and light emitting elements is Since the power consumption can be reduced to about half, the power consumption of the display device can be reduced.

[0049] Alternatively, correction data may be supplied as the first data (weight: W). By adding the correction data to the image data, the luminance variations inherent to the display device can be corrected. Or, since the brightness can be corrected on a pixel-by-pixel basis, it can be used for HDR display. In addition, when a light-emitting element is used as a display element, the display quality is preferably the same as that of the driving transistor. Since it is affected by threshold voltage variations, the threshold voltage correction data of the transistor in question may be supplied as the first data (weight: W) to improve the display quality. The first data (weight: W) and the second data (data: D) may be interchanged.

[0050] In one embodiment of the present invention, the transistor of a particular pixel 10 is turned on in accordance with the operation of adding the potentials described above. The potential of the node NP (=the potential of the node NM) is determined by keeping the node 105 conductive. By performing such an operation sequentially from pixel 10[m,1] to [m,n], That is, the potential of the node NP can be determined. can be supplied.

[0051] The nodes NM and NP act as storage nodes. By turning on the transistor, data can be written to each node. By making the transistor non-conductive, the data can be held in each node. By using a transistor with extremely low off-state current as the resistor, leakage current can be suppressed. This makes it possible to hold the potential of each node for a long time. In this paper, we use a transistor (hereinafter referred to as OS transistor) that uses a metal oxide for the channel formation region. You can be there.

[0052] Specifically, any or all of the transistors 101, 102, 103, and 105 are O It is preferable to use an O type transistor for the elements of the circuit block 110. An S transistor may be used. Also, when operating within an allowable range of leakage current, In this case, a transistor having Si in the channel formation region (hereinafter referred to as Si transistor) is applied. Alternatively, an OS transistor and a Si transistor may be used in combination. The Si transistor may be a transistor having amorphous silicon, a transistor having crystalline silicon, Transistors having silicon (typically low-temperature polysilicon or single-crystal silicon) Examples include:

[0053] The semiconductor material used for the OS transistor has an energy gap of 2 eV or more. Metal oxides having a specific resistance of 2.5 eV or more, more preferably 3 eV or more, can be used. A typical example is an oxide semiconductor containing indium, for example, a CAAC -OS or CAC-OS can be used. CAAC-OS forms a crystal. The atoms are stable, making it suitable for transistors where reliability is important. Because it exhibits high mobility, it is suitable for use in transistors that operate at high speed.

[0054] Since the energy gap of the semiconductor layer of an OS transistor is large, the current is several yA / μm (channel The OS transistor exhibits extremely low off-state current characteristics (current value per 1 μm of transistor width). The stan- dard is free from impact ionization, avalanche breakdown, and short channel effects. These features differ from those of Si transistors, making it possible to form highly reliable circuits. In addition, the variation in electrical characteristics caused by the non-uniformity of crystallinity, which is a problem in Si transistors, This is less likely to occur with OS transistors.

[0055] The semiconductor layer of the OS transistor is made of, for example, indium, zinc, and M (aluminum). , titanium, gallium, germanium, yttrium, zirconium, lanthanum, cerium In-M-Zn oxides containing metals such as tin, neodymium, or hafnium The film can be made of a material such as a silicon dioxide film.

[0056] When the oxide semiconductor constituting the semiconductor layer is an In-M-Zn oxide, The atomic ratio of the metal elements in the sputtering target used to form a film is In≧M It is preferable that Zn≧M is satisfied. The atomic ratios were In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In :M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4. 1, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5: The atomic ratio of the semiconductor layers to be formed is preferably 1:8 or the like. This includes a ±40% variation in the atomic ratio of metal elements contained in the ring target.

[0057] The semiconductor layer is made of an oxide semiconductor with a low carrier density. Carrier density is 1×10 17 / cm 3 Less than 1 × 10 15 / cm 3 Further details are as follows: Preferably 1 x 10 13 / cm 3 Less than or equal to 1×10 11 / cm 3 Below, further Preferably 1 x 10 10 / cm 3 Less than 1 x 10 -9 / cm 3 More than career secrets Such an oxide semiconductor can be a highly pure intrinsic or This oxide semiconductor has a low density of defect states and is stable. It can be said that this oxide semiconductor has stable characteristics.

[0058] However, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. It is sufficient to use an appropriate composition depending on the required properties (e.g., the mobility, threshold voltage, etc.). In order to obtain the semiconductor characteristics of a transistor, the carrier density, impurity concentration, and defect density of the semiconductor layer must be carefully considered. It is preferable to appropriately set the density, atomic ratio of metal element to oxygen, interatomic distance, density, etc. stomach.

[0059] In the oxide semiconductor that constitutes the semiconductor layer, silicon and carbon, which are group 14 elements, If oxygen is contained, oxygen vacancies increase, causing the semiconductor layer to become n-type. The concentration of ammonium nitrate and carbon (Secondary Ion Mass Spectroscopy (SIMS)) The concentration obtained by ss Spectrometry) is calculated as 2 x 10 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following applies.

[0060] In addition, alkali metals and alkaline earth metals generate carriers when bonded with oxide semiconductors. This may result in an increase in the off-state current of the transistor. The concentration of alkali metals or alkaline earth metals in the conductor layer (concentration obtained by SIMS) degrees) to 1 x 10 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / c m 3 Do the following:

[0061] In addition, if nitrogen is contained in the oxide semiconductor that constitutes the semiconductor layer, electrons, which are carriers, This increases the carrier density and makes it easier to become n-type. Transistors using conductors tend to be normally-on. The nitrogen concentration (obtained by SIMS) was 5×10 18 atoms / cm 3 Below It is preferable to do so.

[0062] In addition, if hydrogen is contained in the oxide semiconductor that constitutes the semiconductor layer, the oxide that bonds with the metal atoms Since the oxygen reacts with oxygen to form water, oxygen vacancies may be formed in the oxide semiconductor. If the channel formation region in the conductor contains oxygen vacancies, the transistor will be normally on. Furthermore, defects in which hydrogen has entered the oxygen vacancies act as donors, In addition, some of the hydrogen atoms bond with the metal atoms, resulting in the generation of carrier electrons. It may combine with hydrogen to generate electrons, which are carriers. A transistor including an oxide semiconductor having such a structure tends to be normally on.

[0063] A defect in which hydrogen is inserted into an oxygen vacancy can function as a donor in an oxide semiconductor. However, it is difficult to quantitatively evaluate the defects. Therefore, in this specification, the acid As a parameter of the compound semiconductor, we assume a state in which no electric field is applied, rather than the donor concentration. In other words, the "carrier concentration" described in this specification and the like is This can sometimes be rephrased as "donor concentration."

[0064] Therefore, it is preferable that the amount of hydrogen in the oxide semiconductor be reduced as much as possible. In the oxide semiconductor, the hydrogen concentration obtained by SIMS is 1×10 20 atoms / cm 3 Less than 1 x 10 19 atoms / cm 3 Less than 5x1 0 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 less than An oxide semiconductor in which impurities such as hydrogen are sufficiently reduced is used as the channel type of a transistor. By using it in the composition region, stable electrical characteristics can be imparted.

[0065] The semiconductor layer may also have a non-single crystal structure, for example. The non-single crystal structure may have a c-axis orientation. CAAC-OS (C-Axis Aligned Crystalline ne Oxide Semiconductor), polycrystalline, microcrystalline, or non-crystalline Among non-single crystalline structures, the amorphous structure has the highest defect level density and CAA C-OS has the lowest density of defect states.

[0066] An amorphous oxide semiconductor film has, for example, a disordered atomic arrangement and does not contain crystalline components. Alternatively, the amorphous oxide film may have a completely amorphous structure and no crystalline portion. stomach.

[0067] The semiconductor layer may have an amorphous structure, a microcrystalline structure, a polycrystalline structure, or a CAAC structure. The film may be a mixed film having two or more of the -OS region and the single crystal structure region. The film may have a single layer structure including two or more of the above-mentioned regions, or a laminated structure. It may have a structure.

[0068] Hereinafter, we will discuss CAC (Cloud-Aligned C), which is one type of non-single-crystal semiconductor layer. This article explains the structure of the .NET composite OS.

[0069] CAC-OS is a type of oxide semiconductor in which the elements constituting the oxide semiconductor are 0.5 nm to 10 nm thick. Preferably, the material is unevenly distributed in a size range of 1 nm to 2 nm or in the vicinity thereof. In the following, it is assumed that one or more metal elements are contained in the oxide semiconductor. The region containing the metal element is unevenly distributed and has a size of 0.5 nm to 10 nm, preferably 1 nm A mixed state of particles with sizes of 2 nm or less or close to that size is called a mosaic or patch state. It is also called.

[0070] Note that the oxide semiconductor preferably contains at least indium. In addition to these, aluminum, gallium, yttrium, and zinc are preferably contained. Thorium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium Rumanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, Contains one or more selected from tantalum, tungsten, magnesium, etc. It may be included.

[0071] For example, CAC-OS made of In-Ga-Zn oxide (In-Ga-Zn oxide among CAC-OS) α-Zn oxide may be specifically referred to as CAC-IGZO. (Hereinafter, InO X1 (X1 is a real number greater than 0) or indium zinc oxide compound (hereinafter referred to as In X2 Zn Y2 O Z2 (X2, Y2, and Z2 are real numbers greater than 0) ) and gallium oxide (hereinafter referred to as GaO X3 (X3 is a real number greater than 0) . ), or gallium zinc oxide (Ga X4 Zn Y4 O Z4 (X4, Y4, and Z4 is a real number greater than 0.) The material is separated into two parts, forming a mosaic pattern. Mosaic InO X1 , or In X2 Zn Y2 O Z2 is uniformly distributed in the film This is a cloud-like configuration (hereinafter also referred to as "cloud-like").

[0072] In other words, CAC-OS is X3 The region where In is the main component and X2 Zn Y2 O Z2 , or InO X1 A composite oxide semiconductor having a structure in which a region in which In this specification, for example, the atomic ratio of In to the element M in the first region is is greater than the atomic ratio of In to the element M in the second region. Compared to region 2, the concentration of In is higher.

[0073] IGZO is a common name and refers to a compound of In, Ga, Zn, and O. A typical example is InGaO3(ZnO) m1 (m1 is a natural number), or In ( 1+x0) Ga (1-x0)O3(ZnO) m0 (-1≦x0≦1, m0 is an arbitrary number) Examples of such crystalline compounds include:

[0074] The crystalline compound has a single crystal structure, a polycrystalline structure, or a CAAC structure. The CAAC structure is a structure in which multiple IGZO nanocrystals have a c-axis orientation and are aligned in the ab plane. is a non-oriented connected crystal structure.

[0075] On the other hand, CAC-OS refers to the material structure of an oxide semiconductor. In a material composition containing Ga, Zn, and O, some nanoparticles with Ga as the main component were observed. The region where the In nanoparticles are observed is shown in part. This refers to a structure in which the pixels are randomly distributed in a mosaic pattern. The crystal structure is a secondary factor.

[0076] It should be noted that the CAC-OS does not include a laminated structure of two or more films with different compositions. For example, a structure consisting of two layers, one containing In as the main component and the other containing Ga as the main component, is not included. do not have.

[0077] In addition, GaO X3 The region where In is the main component and X2 Zn Y2 O Z2 , or InO X1 but In some cases, a clear boundary between the main component region and the main component region cannot be observed.

[0078] Instead of gallium, aluminum, yttrium, copper, vanadium, and beryllium can be used. , boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum , lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium If one or more selected elements such as sodium are included, CAC-OS will The nanoparticle-like regions are observed in the region where the metal element is the main component, and the region where In is the main component. The nanoparticle-like regions are randomly dispersed in a mosaic pattern. say.

[0079] CAC-OS is formed by sputtering without intentionally heating the substrate. In addition, when the CAC-OS is formed by a sputtering method, the deposition gas is The gas is selected from an inert gas (typically argon), oxygen gas, and nitrogen gas. One or more of these may be used. The lower the flow rate ratio of the gas, the more preferable. For example, the flow rate ratio of oxygen gas is preferably 0% or more and less than 30%. It is more preferable to set the content to 0% or more and 10% or less.

[0080] CAC-OS is a type of X-ray diffraction (XRD) measurement method. When measured using the θ / 2θ scan by the out-of-plane method, In other words, from the X-ray diffraction measurement, It can be seen that the orientation of the regions in the ab plane direction and the c axis direction is not observed.

[0081] In addition, CAC-OS uses an electron beam with a probe diameter of 1 nm (also called a nanobeam electron beam). In the electron diffraction pattern obtained by irradiating the sample, a ring-shaped area of high brightness (phosphor) is formed. The electron diffraction pattern is Therefore, the crystal structure of CAC-OS does not have orientation in the planar direction and the cross-sectional direction. It can be seen that it has a nano-crystal structure.

[0082] For example, in the CAC-OS of In-Ga-Zn oxide, energy dispersive X Energy Dispersive X-ray spectroscopy (EDX) EDX mapping obtained using scopy revealed that GaO X3 The region where is the principal component And, In X2 Zn Y2 O Z2 , or InO X1 The area where the main component is unevenly distributed and mixed It can be confirmed that the compound has a structure similar to that of the compound shown in FIG.

[0083] CAC-OS has a structure different from that of IGZO compounds, in which metal elements are uniformly distributed. CAC-OS has different properties from ZO compounds. X3 The main ingredients are In a certain area, X2 Zn Y2 O Z2 , or InO X1 The region where is the principal component and The phases are separated into two, and the regions containing each element as the main component are arranged in a mosaic pattern.

[0084] Here, In X2 Zn Y2 O Z2 , or InO X1 The region where is the main component is GaO X3 This region has higher conductivity than the region where In is the main component. X2 Zn Y 2O Z2 , or InO X1 The carriers flow through the region where the main component is oxidized. Therefore, the conductivity of In is expressed as a semiconductor. X2 Zn Y2 O Z2 , or In O X1 The region where the main component is distributed in a cloud-like shape in the oxide semiconductor allows for a high electric field. Effective mobility (μ) can be achieved.

[0085] On the other hand, GaO X3 The region where the main components are In X2 Zn Y2 O Z2 , or InO X This region has higher insulating properties than the region where GaO is the main component. X3 etc. The distribution of the main component in the oxide semiconductor suppresses leakage current and provides good switching. Switching operation can be realized.

[0086] Therefore, when CAC-OS is used in a semiconductor device, GaO X3 Insulation caused by And, In X2 Zn Y2 O Z2 , or InO X1 The conductivity caused by the This results in a high on-state current (I on ) and high field-effect mobility (μ) This can be done.

[0087] Furthermore, semiconductor devices using CAC-OS have high reliability. , and is suitable as a constituent material for various semiconductor devices.

[0088] As shown in FIG. 3A, the display device of one embodiment of the present invention includes a capacitor 104 and a capacitor 105 in the circuit 11. These elements may be incorporated into the source driver 12. By adopting this configuration, a narrow frame It becomes possible to

[0089] When the pixel circuit and the source driver 12 are monolithically integrated on the substrate, A stack structure may be used in which the driver 12 and any element of the circuit 11 overlap each other. This configuration allows for greater freedom in designing the elements of the circuit 11, improving electrical characteristics. It can be raised.

[0090] Although the example in which the circuit 11 is provided for each column is shown in FIG. 1, as shown in FIG. 3B, A selection circuit 16 is provided between the pixel 10 and the pixel 10, and data is written to the pixels in a plurality of columns. This may be performed with one circuit 11. By adopting this configuration, the number of circuits 11 can be reduced. In FIG. 3B, one circuit 11 and one selection circuit Although an example of writing to three columns of pixels with 16 combinations is shown, the present invention is not limited to this. The number of columns can be determined within the allowable range of writing time.

[0091] The transistors 101, 102, and 103 included in the circuit 11 are provided outside the display area. Therefore, it is less subject to size restrictions and has a larger channel width than the transistors provided in pixels. By using a transistor with a large channel width, the wiring 125 and the like can be This reduces the charge and discharge time for the pixel, making it easier to increase the frame frequency. This makes it easier to apply to high-definition displays with a large number of pixels and a short horizontal period.

[0092] In addition, by using OS transistors for the transistors 101, 102, and 103, the circuit 11 can withstand high voltages, and the voltage generated during data addition remains stable even at tens of volts. In addition, the transistors 101, 102, and 103 can be mounted on an IC chip. In the case of using a Si transistor, a higher speed operation can be achieved. When the transistors 101, 102, and 103 are provided in the IC chip, may be used as an OS transistor.

[0093] Next, using the timing chart shown in FIG. 4, data is written to the pixel 10 using the circuit 11. In the following explanation, high potential is referred to as "H" and low potential as "L". The weight to be supplied to pixel 10[1] is represented as "W[1]" and the image data is represented as "D[1] ", the weight supplied to pixel 10[2] is "W[2]", and the image data is "D[2]". "V ref For example, 0V, GND potential, or a specific reference potential can be used as ". Cut.

[0094] In addition, in the distribution, coupling or loss of potential, the circuit configuration and operation timing, etc. The detailed changes due to the capacitive coupling are not taken into account. Although it depends on the capacitance ratio of the side, for the sake of clarity, the capacitance value of the circuit block 110 is assumed to be sufficiently Assume a small value.

[0095] At time T1, “W[1]” is supplied to the wiring 124, and the potential of the wirings 121 and 123[1] is set to “H ” the transistor 103 is turned on, and the potential of the other electrode of the capacitor 104 becomes “V r ef This operation is a reset operation to perform the subsequent addition operation (capacitive coupling operation). be.

[0096] Also, the transistors 101 and 105 are turned on, and the potential of the wiring 124 is written to the node NP[1]. This operation is a weight write operation, and the potential of node NP[1] is "W[1 ]”

[0097] At time T2, the potential of the wiring 121 is set to "L" and the potential of the wiring 123[1] is set to "H." At this time, the transistors 101 and 103 are non-conductive. At this time, "W[1]" is applied to the node NP[1]. The capacitance element 104 is held at "W[1]-V ref " is maintained. This is the write operation of "W[1]" in pixel 10[1].

[0098] At time T3, “D[1]” is supplied to the wiring 124, the potential of the wiring 121 is set to “L”, and the potential of the wiring 122 is set to “L”. When the potential of 123[1] is set to "H", the transistors 102 and 105 are turned on. When this happens, the potential of the other electrode of the capacitor 104 becomes “D[1]”, and the node "D[1]" is added to the potential of NP[1]. This operation is an addition operation, and the potential of node NP The potential of [1] is "W[1]+D[1]-V ref At this time, "V ref ”=0 Then, the potential of the node NP[1] is "W[1]+D[1]". The potential of

[0049] is supplied to the display element, and a display is performed.

[0099] At time T4, when the potential of the wiring 121, 122, and 123[1] is set to "L", the transistor 1 05 becomes non-conductive, the potential of node NP[1] is maintained, and the display is This concludes the description of the operation of pixel 10[1].

[0100] Similar operations are applied to pixel 10[2] at times T5 to T8, thereby In this case, it is possible to display according to "W[2]+D[2]".

[0101] As shown in FIG. 5, the circuit 11 is not only provided on one end side of the display area 15 but also on the other opposite end side. It may also be provided in

[0102] Here, the circuit 11 provided on one end side of the display area 15 is referred to as a circuit 11a. The operation of the circuit 11a is controlled by signals supplied from the wirings 121a and 122a. The display area 15 is electrically connected to the display driver 12a. The circuit 11 is a circuit 11b. The circuit 11b receives signals supplied from wirings 121b and 122b. The operation of the circuit 11b is controlled by a signal. The circuit 11b is electrically connected to a source driver 12b. do.

[0103] The circuits 11a and 11b are operated so as to output the same data at the same timing. In other words, the source drivers 12a and 12b output the same data at the same timing. The wiring 121a and the wiring 121b, and the wiring 121a and the wiring 121b are The same operation signal is supplied at the same timing.

[0104] By operating in this manner, the circuit 11a and the circuit 11b can be operated simultaneously. Therefore, the same data can be output to the wiring 125 at high speed. In a display device with a large number of pixels and a short horizontal period, the parasitic capacitance of the wiring 125 is This makes it easier to accommodate larger display devices.

[0105] 6A to 6C are applicable to the circuit block 110 and include a light-emitting element as a display element. This is an example of a configuration that includes:

[0106] The structure shown in FIG. 6A includes a transistor 111, a capacitor 113, and a light-emitting element 114. One of the source and drain of the transistor 111 is connected to one of the light-emitting elements 114. One electrode of the light-emitting element 114 is electrically connected to one electrode of the capacitor 113. The other electrode of the capacitor 113 is electrically connected to the gate of the transistor 111. The gate of the transistor 111 is electrically connected to a node NP. do.

[0107] The other of the source and the drain of the transistor 111 is electrically connected to a wiring 128. The other electrode of the light emitting element 114 is electrically connected to the wiring 129. For example, the wiring 128 can supply high potential power. In addition, the wiring 129 can supply a low potential power supply.

[0108] In the configuration shown in FIG. 6A, the potential of the node NM is higher than the threshold voltage of the transistor 111. When this occurs, a current flows through the light emitting element 114. Therefore, the weight (W) of the node NP is The light emitting element 114 may start emitting light at the stage when the data is written, which may limit the use of the device. be.

[0109] Alternatively, as shown in FIG. 6B, one electrode of the light emitting element 114 is electrically connected to the wiring 128. The other electrode of the light emitting element 114 is connected to the other of the source or drain of the transistor 111. This configuration may be electrically connected to another circuit block 1 having a light emitting element 114. It can also be applied to 10.

[0110] FIG. 6C shows a configuration in which a transistor 112 is added to the configuration of FIG. 6A. One of the source or drain of transistor 112 is connected to the source or drain of transistor 111. The other of the source and drain of the transistor 112 is electrically connected to The gate of the transistor 112 is electrically connected to the wiring 130. The wiring 130 serves as a signal line for controlling the conduction of the transistor 112. It can have a function.

[0111] In this configuration, the potential of the node NP is equal to or higher than the threshold voltage of the transistor 111. When the transistor 112 is conductive, a current flows through the light emitting element 114. Therefore, the weight ( The light emitting element 114 starts emitting light at an arbitrary timing after the addition of the data (W) and the data (D). This can be done.

[0112] FIG. 6D shows a configuration in which a transistor 115 is added to the configuration of FIG. 6C. One of the source or drain of transistor 115 is connected to the source or drain of transistor 111. The other of the source and drain of the transistor 115 is electrically connected to The gate of the transistor 115 is electrically connected to a wiring 132. The wiring 132 functions as a signal line that controls the conduction of the transistor 115. can have:

[0113] The wiring 131 can be electrically connected to a source of a specific potential such as a reference potential. A specific potential is applied to either the source or drain of transistor 111 from line 131. This also makes it possible to stabilize the writing of image data.

[0114] The wiring 131 can be connected to the circuit 120 and has a function as a monitor line. The circuit 120 can also be configured to control the specific potential source and the electrical characteristics of the transistor 111. The correction data generating unit may have one or more of the functions of acquiring the correction data and generating the correction data.

[0115] 7A to 7D are applicable to the circuit block 110 and include a liquid crystal element as a display element. This is an example of a configuration that includes:

[0116] The structure shown in FIG. 7A includes a capacitor 116 and a liquid crystal element 117. One electrode of the capacitor 7 is electrically connected to one electrode of the capacitor 116. One electrode of the transistor is electrically connected to a node NP.

[0117] The other electrode of the capacitor 116 is electrically connected to the wiring 133. One electrode is electrically connected to a wiring 134. The wirings 133 and 134 are used to supply power. For example, the wirings 133 and 134 may be connected to a reference potential such as GND or 0V or to an arbitrary potential. can be supplied.

[0118] Note that the capacitor 116 may be omitted as shown in FIG. In addition, an OS transistor can be used as the transistor connected to the node NP. Since the transistor has an extremely small leakage current, the capacitor 116 that functions as a storage capacitor Even if the transistor is omitted, the display can be maintained for a relatively long time. Even in cases where the display period can be shortened by high-speed operation, such as field sequential driving, It is effective to omit the capacitor element 116. By omitting the capacitor element 116, the aperture ratio can be improved. Alternatively, the transmittance of the pixel can be improved.

[0119] In the configurations of FIGS. 7A and 7B, when the potential of the node NP is higher than the operating threshold of the liquid crystal element 117, When the weight is determined, the liquid crystal element 117 starts to operate. The display operation may start when the data is written, and the usage may be limited. In the case of a transmissive liquid crystal display device, the timing at which the addition of weight (W) and data (D) is completed is By combining this with other operations such as turning off the backlight until the Even if the object is not visible, it is possible to suppress its visibility.

[0120] FIG. 7C shows a configuration in which a transistor 118 is added to the configuration of FIG. 7A. One of the source and drain of the capacitor 118 is electrically connected to one electrode of the capacitor element 116. The other of the source and drain of the transistor 118 is electrically connected to the node NP. The gate of the transistor 118 is electrically connected to the wiring 127. 27 can function as a signal line for controlling the conduction of the transistor 118. .

[0121] In this configuration, when the transistor 118 is turned on, the potential of the node NP is applied to the liquid crystal element 117. Therefore, at any timing after the addition of weight (W) and data (D), The liquid crystal element can then start operating.

[0122] When the transistor 118 is off, the voltage supplied to the capacitor element 116 and the liquid crystal element 117 is Since the supplied potential is maintained, the capacitor element 116 and the It is preferable to reset the potential supplied to the liquid crystal element 117. For example, a reset potential is supplied to the wiring 124, and the transistors 101 and 118 are turned on. are simultaneously made conductive.

[0123] FIG. 7D shows a configuration in which a transistor 119 is added to the configuration of FIG. 7C. One of the source and drain of the transistor 119 is electrically connected to one electrode of the liquid crystal element 117. The other of the source and the drain of the transistor 119 is electrically connected to a wiring 131. The gate of the transistor 119 is electrically connected to the wiring 138. The reference numeral 38 can function as a signal line for controlling the conduction of the transistor 119 .

[0124] The circuit 120 electrically connected to the wiring 131 is the same as that described above with reference to FIG. In addition, the potential supplied to the capacitor element 116 and the liquid crystal element 117 is reset. It may be possible.

[0125] 8A to 8C are the same as those shown in FIG. ref Example of wiring for supplying As shown in FIG. 8(A), when a light-emitting element is used as a display element, V ref The wiring 128 can be applied to the wiring for supplying "V ref "teeth Since it is preferable that the potential is 0V, GND, or low potential, the wiring 128 is at least one of these. The wiring 128 also has a function of supplying one of the potentials. When it gets crowded, ref " is supplied, and the light emitting element 114 is made to emit light. Alternatively, as shown in FIG. 8B, a wiring for supplying a low potential may be used. 129 to "V ref " may be applied as wiring for supplying ".

[0126] Also, as shown in FIG. 8(C), when a liquid crystal element is used as a display element, ref ” The wiring 133 can be applied to the wiring for supplying the Regardless of the type of display element, ref Dedicated common wiring to supply may be provided.

[0127] In one embodiment of the present invention, as illustrated in FIGS. 9(A) and 9(B), A back gate may be provided in the front gate. This shows a configuration in which the gate is electrically connected to the gate, which has the effect of increasing the on-state current. 1 shows a configuration in which the back gate is electrically connected to a wiring 135 that can supply a constant potential. This allows the threshold voltage of the transistor to be controlled. A back gate may also be provided for the transistor having the gate.

[0128] Next, we will explain the simulation results for pixel operation. The figure shows the configuration of one column of pixels (PIX) used in the image sensor and the circuit 11 connected to the column. The number of circuits is assumed to be 100 to 2000, and the circuit block 110 has the configuration shown in FIG. The simulation was carried out by changing the number of pixels. The voltage change at node NP was investigated.

[0129] The parameters used in the simulation are as follows, and the transistor size is L / W. = 4 μm / 30 μm (transistors Tr1, Tr2, Tr3), L / W = 4 μm / 10 μ m (transistor Tr4), the capacitance of the capacitance element Cs is 100 fF, and the capacitance of the liquid crystal element Clc is The value was 100 fF, and the common electrodes VCOM and TCOM were set to 0 V. The voltage applied to the gate was +15V for "H" and -10V for "L".

[0130] The wiring PL connecting the circuit 11 and the pixel PIX is provided with a resistor R1 corresponding to a parasitic resistor, The capacitance C3 equivalent to the parasitic capacitance is incorporated in the same number as the pixels. (sum of C2), the parasitic capacitance of the wiring PL (sum of C3), and the resistance of the wiring PL (sum of R1) are Since the values depend on the number of resistors, the values shown in Table 1 were used. SPICE was used.

[0131] [Table 1]

[0132] Figure 11 shows the timing chart used in the simulation. Here, the weight (W) The data (D) was all set to 5V. ref " was set to 0V.

[0133] 12(A) to 12(D) show the results when the number of pixels is set to 100, 500, 1000, and 2000. These are the simulation results for each pixel. The change in voltage at node NP when a read operation is performed is shown on the time axis.

[0134] With 100 pixels, writing is stable, but the total capacitance of C1 is small, so data It is not possible to fully add up the figures.

[0135] At 500 pixels, the simulation parameters used in this study were suitable and corresponded to the capacity ratio. This shows that data can be added together.

[0136] In the case of 1000 pixels, the total capacitance value of C1 is somewhat large, so the first pixel to be written is PIX[1 In the case of ], the writing of W is not completed within the writing time, and the data potential does not rise sufficiently. After pixel PIX[2], writing is not possible due to the influence of the charge remaining in the wiring PL. Stabilize.

[0137] At 2000 pixels, the total capacitance of C1 becomes too large, and the writing of W at pixel PIX[1] The total capacitance of C1 is too large, so the effect is not visible on the screen. This also affects PIX[2] and later.

[0138] From the above simulation results, it is possible to find a combination of appropriate operation parameters and an appropriate number of pixels. It was confirmed that data addition could be performed stably.

[0139] The total capacitance of the capacitance element C1 has a strong influence on the operation. This can be easily adjusted by the number of connected capacitance elements C2. Even if the number of pixels is 1000, 2000 or more, the number of capacitance elements C2 can be adjusted. This allows appropriate operation as shown in FIG. 12(B).

[0140] Next, the simulation results for the pixel layout will be explained. 10A and 10B correspond to pixels PIX[1] to PIX[3], and show an example of a layout of three vertical pixels. .

[0141] In the layout shown in FIG. 13, the capacitance element Cs is omitted, and the pixel voltage corresponding to the node NP is The figure shows the top electrode PE. As an example of a transistor, a bottom gate type (back gate) The pixel pitch is assumed to be 136 μm.

[0142] The capacitance element C1 is formed by a conductive layer formed in the same process as the gate wiring and a conductive layer formed in the same process as the source wiring. The conductive layers formed in the process are used as a pair of electrodes. In other words, each pixel has an area where the two electrodes overlap with each other through an insulating layer (for example, a gate insulating film). In addition, since the capacitance elements C2 are connected in parallel, This is equivalent to a large capacitance element.

[0143] That is, since the capacitance element C1 is divided and arranged, the aperture ratio and transmittance of the pixel are improved. In addition, the conductive layers constituting the capacitor element can be electrically connected to each other by using the following method. It is preferable to use a connection wiring BR that bridges the gate wiring. For example, the source wiring can be fabricated in the same process. The aperture ratio ((area of pixel electrode PE) / (area of pixel)) was estimated to be about 90.5%.

[0144] The above simulation results confirmed the effect of one aspect of the present invention.

[0145] This embodiment mode can be implemented by appropriately combining with the configurations described in other embodiment modes. It is possible.

[0146] (Embodiment 2) In this embodiment, a configuration example of a display device using a liquid crystal element and a configuration example of a display device using a light-emitting element will be described. In this embodiment, the display described in the first embodiment is Description of the elements, operations and functions of the device will be omitted.

[0147] 14A to 14C show the structure of a display device to which one embodiment of the present invention can be applied. Figure.

[0148] The display device described in this embodiment uses the adder circuit and pixels described in the first embodiment. The scanning line driving circuit described below can be used as a gate driver and a signal line driver. The circuit corresponds to a source driver.

[0149] In FIG. 14A, a display portion 215 provided on a first substrate 4001 is surrounded by a A sealant 4005 is provided, and the display portion 215 is attached to the sealant 4005 and the second substrate 4. Sealed by 006.

[0150] In FIG. 14A, a scanning line driving circuit 221a, a signal line driving circuit 231a, and a signal line driving circuit 232a and the common line driver circuit 241a are provided on a printed circuit board 4041. The integrated circuits 4042 are made of a single crystal semiconductor or a polycrystalline The common line driving circuit 241a is made of a semiconductor. , 129, 132, 133, 135, etc., and has the function of supplying a specified potential.

[0151] The scanning line driving circuit 221a, the common line driving circuit 241a, the signal line driving circuit 231a, and the signal Various signals and potentials given to the signal line driving circuit 232a are transmitted through an FPC (Flexible Printed Circuit). ble printed circuit)4018.

[0152] The integrated circuit 4042 included in the scanning line driver circuit 221a and the common line driver circuit 241a is The signal line driver circuit 231a and the signal line driver The integrated circuit 4042 included in the drive circuit 232a has a function of supplying image data to the display unit 215. The integrated circuit 4042 is surrounded by a sealant 4005 on the first substrate 4001. It is implemented in a different area from the area where it is installed.

[0153] The method of connecting the integrated circuit 4042 is not particularly limited, and may be wire bonding. COG (Chip On Glass) method, TCP (Tape Carrier Package method, COF (Chip On Film) method, etc. can be used. .

[0154] FIG. 14B shows an integrated circuit included in the signal line driver circuit 231a and the signal line driver circuit 232a. The circuit 4042 is implemented by the COG method. The display unit 215 and the display unit 216 can be integrally formed on the same substrate to form a system-on-panel. Cut.

[0155] In FIG. 14B, the scanning line driving circuit 221a and the common line driving circuit 241a are connected to the display unit 2. 15. The driving circuit is formed on the same substrate as the pixel circuit in the display unit 215. By forming the parts at the same time, the number of parts can be reduced, which increases productivity. can.

[0156] In FIG. 14B, the display portion 215 provided on the first substrate 4001 and the scanning line driver A sealant 4005 is provided to surround the common line driving circuit 221a and the common line driving circuit 241a. In addition, a display unit 215, a scanning line driving circuit 221a, and a common line driving circuit The second substrate 4006 is provided on the display unit 215, the scanning line driver 241a. The driving circuit 221a and the common line driving circuit 241a are mounted on the first substrate 4001 and the sealing material 40. The display element is sealed by the second substrate 4005 and the second substrate 4006 .

[0157] In addition, in FIG. 14B, the signal line driver circuit 231a and the signal line driver circuit 232a are separately 4001 and mounted on the first substrate 4001, but the present invention is not limited to this configuration. The scanning line driver circuit may be formed separately and mounted, or may be mounted as part of the signal line driver circuit or the scanning line driver circuit. A part of the driving circuit may be formed separately and mounted. The signal line driving circuit 231a and the signal line driving circuit 232a are formed on the same substrate as the display unit 215. That's fine.

[0158] The display device also includes a panel in which a display element is sealed, and a controller for the panel. This may also include a module in which an IC or the like including the above is mounted.

[0159] The display portion and the scanning line driver circuit provided on the first substrate have a plurality of transistors. The transistor described in the above embodiment can be used as the transistor. can be done.

[0160] The structure of the transistors in the peripheral driver circuits and the pixel circuits in the display area is The transistors in the peripheral driver circuit may be the same or different. The transistors may have the same structure, or may have two or more types of transistor structures. Similarly, the transistors in the pixel circuit may all have the same structure. Alternatively, the semiconductor device may have two or more transistor structures.

[0161] In addition, an input device 4200 can be provided over the second substrate 4006. The display device shown in any one of (a) to (c) provided with an input device 4200 functions as a touch panel. It can be done.

[0162] There is no limitation on the detection elements (also referred to as sensor elements) included in the touch panel of one embodiment of the present invention. We offer a variety of sensors that can detect the proximity or contact of a finger, stylus, or other object. , can be applied as a sensing element.

[0163] The sensor type may be, for example, a capacitance type, a resistive film type, a surface acoustic wave type, or an infrared type. Various methods can be used, such as a pressure-sensitive method, an optical method, or the like.

[0164] In this embodiment, a touch panel having a capacitance type detection element will be described as an example. .

[0165] The capacitance type includes a surface capacitance type, a projected capacitance type, etc. The capacitance type includes the self-capacitance type and the mutual capacitance type. This is preferable because it enables simultaneous multi-point detection.

[0166] The touch panel of one embodiment of the present invention is formed by bonding a display device and a sensing element that are separately manufactured. A detector element is formed on one or both of a substrate supporting a display element and an opposing substrate. Various configurations can be applied, such as a configuration in which electrodes or the like are provided.

[0167] 15(A) and (B) show examples of touch panels. FIG. 15(A) shows a touch panel 4 15(B) is a perspective view of the input device 4200. For clarity, only representative components are shown.

[0168] The touch panel 4210 is made by bonding a display device and a sensing element that are separately manufactured. be.

[0169] The touch panel 4210 has an input device 4200 and a display device, which are stacked on top of each other. It is being done.

[0170] The input device 4200 includes a substrate 4263, an electrode 4227, an electrode 4228, and a plurality of wirings 4237. , a plurality of wirings 4238 and a plurality of wirings 4239. For example, the electrode 4227 is The electrode 4228 can be electrically connected to the wiring 4237 or the wiring 4239. The FPC 4272b can be electrically connected to the wires 4239. and electrically connects to each of the plurality of wirings 4238. 3b can be provided.

[0171] Alternatively, a touch sensor may be provided between the first substrate 4001 and the second substrate 4006 of the display device. In the case where a touch sensor is provided between the first substrate 4001 and the second substrate 4006, In this case, in addition to capacitive touch sensors, optical touch sensors using photoelectric conversion elements are also available. may be applied.

[0172] 16(A) and 16(B) are cross-sectional views of the portion indicated by the chain line N1-N2 in FIG. 14(B). The display device shown in FIGS. 16A and 16B has an electrode 4015. The terminals of the FPC 4018 are electrically connected via the anisotropic conductive layer 4019. 16(A) and (B), the electrode 4015 is formed by insulating layers 4112 and 4111. and electrically connected to the wiring 4014 in an opening formed in the insulating layer 4110. do.

[0173] The electrode 4015 is formed from the same conductive layer as the first electrode layer 4030. The source and drain electrodes of the transistor 4010 and the transistor 4011 are the same. The same conductive layer is used.

[0174] The display portion 215 and the scanning line driver circuit 221a provided on the first substrate 4001 are 16A and 16B, the display unit 215 includes a plurality of transistors. 4010 and a transistor 4011 included in the scanning line driver circuit 221a. 16A and 16B, the transistor 4010 and the transistor Although a bottom-gate transistor is shown as an example of the transistor 4011, a top-gate transistor may also be used. It may also be a transistor.

[0175] In FIGS. 16A and 16B, an insulating layer is formed on the transistor 4010 and the transistor 4011. 16B, a partition wall 451 is provided over the insulating layer 4112. 0 is formed.

[0176] The transistor 4010 and the transistor 4011 are provided over an insulating layer 4102. The transistor 4010 and the transistor 4011 are formed by insulating layers 4111. The electrode 4017 is formed on the semiconductor substrate 401. The electrode 4017 functions as a back gate electrode. It is possible.

[0177] 16A and 16B includes a capacitor 4020. 020 is an electrode 4021 formed in the same process as the gate electrode of the transistor 4010, and an electrode formed in the same process as the source electrode and the drain electrode. The poles overlap with an insulating layer 4103 between them.

[0178] Generally, the capacitance of a capacitor provided in a pixel portion of a display device is determined by the capacitance of a transistor disposed in the pixel portion. The capacitance is set to be able to hold charge for a predetermined period, taking into consideration factors such as leakage current of the capacitor. The capacitance of the capacitor may be set in consideration of the off-state current of the transistor.

[0179] The transistor 4010 provided in the display portion 215 is electrically connected to a display element. (A) is an example of a liquid crystal display device using a liquid crystal element as a display element. In the liquid crystal display device, a liquid crystal element 4013 is a display element. 31, and a liquid crystal layer 4008. The second electrode layer 4031 is provided to sandwich the liquid crystal layer 4008. The first electrode layer 4030 and the second electrode layer 4031 are disposed on the second substrate 4006 side. Overlapping through layer 4008.

[0180] As the liquid crystal element 4013, liquid crystal elements to which various modes are applied can be used. For example, VA (Vertical Alignment) mode, TN (Twisted Nematic (IPS) mode, In-Plane-Switching (IPS) mode, A SM(Axially Symmetric aligned Micro-cell) Mode, OCB (Optically Compensated Bend) Mode, F LC (Ferroelectric Liquid Crystal) mode, AFLC (AntiFerroelectric Liquid Crystal) mode, EC B(Electrically Controlled Birefringence) Use of LCD elements that use mode, VA-IPS mode, guest host mode, etc. can be done.

[0181] In addition, the liquid crystal display device shown in this embodiment may be a normally black liquid crystal display device, for example. A transmissive liquid crystal display device employing a vertical alignment (VA) mode may also be used. The code is MVA (Multi-Domain Vertical Alignment) nt) mode, PVA (Patterned Vertical Alignment) mode, ASV (Advanced Super View) mode, etc. can.

[0182] The liquid crystal element is an element that controls the transmission or non-transmission of light by the optical modulation action of the liquid crystal. The optical modulation effect of liquid crystals is due to the electric field (horizontal electric field, vertical electric field or The liquid crystal used in the liquid crystal element is thermoelectric. ropic liquid crystal, low molecular liquid crystal, polymer liquid crystal, polymer dispersed liquid crystal (PDLC) Dispersed Liquid Crystal, Ferroelectric Liquid Crystal, Antiferroelectric Liquid Crystal These liquid crystal materials can exhibit a cholesteric phase, a smectic phase, etc. depending on the conditions. These phases include nematic, cubic, chiral nematic, and isotropic phases.

[0183] FIG. 16 shows an example of a liquid crystal display device having a vertical electric field type liquid crystal element. Similarly, a liquid crystal display device having a liquid crystal element of the lateral electric field type can be applied. When the formula is adopted, a liquid crystal that exhibits a blue phase without using an alignment film may be used. When the temperature of cholesteric liquid crystal is increased, it changes from the cholesteric phase to the isotropic phase. The blue phase appears just before the transition to the In order to improve the optical field range, a liquid crystal composition containing 5% by weight or more of a chiral agent is mixed. 08. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a short response time. Furthermore, a liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent is No alignment treatment is required, and viewing angle dependency is small. This eliminates the need for rubbing, preventing electrostatic damage caused by rubbing. This makes it possible to reduce defects or damage to the liquid crystal display device during the manufacturing process.

[0184] The spacers 4035 are columnar spacers obtained by selectively etching an insulating layer. The distance (cell gap) between the first electrode layer 4030 and the second electrode layer 4031 is controlled. A spherical spacer may also be used.

[0185] If necessary, a black matrix (light-shielding layer), a colored layer (color filter), a polarizing Optical members (optical substrates) such as a member, a phase difference member, an anti-reflection member, etc. may be provided as appropriate. For example, circularly polarized light produced by a polarizing substrate and a retardation substrate may be used. A backlight, a sidelight, or the like may be used. Micro LEDs or the like may be used as the light.

[0186] In the display device shown in FIG. 16A, the following is provided between the second substrate 4006 and the second electrode layer 4031: A light-shielding layer 4132, a colored layer 4131, and an insulating layer 4133 are provided.

[0187] Materials that can be used for the light-shielding layer include carbon black, titanium black, gold, Examples of the light-shielding layer include metals, metal oxides, and composite oxides including solid solutions of multiple metal oxides. The film may be a film containing a resin material, or may be a thin film made of an inorganic material such as a metal. For example, a laminated film of a film containing a material of a colored layer may be used as the light-shielding layer. A film containing a material used for a color layer that transmits light of a certain color and a material used for a color layer that transmits light of another color are used. By using the same material for the colored layer and the light-shielding layer, This is preferable because it allows the equipment to be standardized and the process to be simplified.

[0188] Materials that can be used for the coloring layer include metal materials, resin materials, pigments, and dyes. The light-shielding layer and the colored layer may be formed by, for example, an ink-jet method. It can be formed using:

[0189] The display device shown in FIGS. 16A and 16B includes an insulating layer 4111 and an insulating layer 4104. The insulating layer 4111 and the insulating layer 4104 are made of insulating layers that are not easily permeated by impurity elements. By sandwiching the semiconductor layer of the transistor between the insulating layer 4111 and the insulating layer 4104, It is possible to prevent the intrusion of impurities.

[0190] Furthermore, a light-emitting element can be used as a display element included in a display device. For example, an EL element that utilizes electroluminescence can be used. An EL element has a layer containing a light-emitting compound between a pair of electrodes (also called an "EL layer"). When a potential difference greater than the threshold voltage of the EL element is generated between the pair of electrodes, Holes are injected from the anode side and electrons are injected from the cathode side. The injected electrons and holes are The electrons recombine in the layer, causing the light-emitting material contained in the EL layer to emit light.

[0191] As the EL element, for example, an organic EL element or an inorganic EL element can be used. LEDs (including micro LEDs) that use compound semiconductors as light-emitting materials are also EL elements. It is one of them, and LED can also be used.

[0192] When a voltage is applied to an organic EL element, electrons are emitted from one electrode and holes are emitted from the other electrode. are injected into the EL layer, and then the carriers (electrons and holes) recombine. By this, the light-emitting organic compound forms an excited state, and the excited state returns to the ground state. Due to this mechanism, such a light-emitting element is called a current-excited light-emitting element. It is called a child.

[0193] In addition to the light-emitting compound, the EL layer may contain a material having a high hole injection property and a material having a high hole transport property. , hole blocking material, material with high electron transporting ability, material with high electron injecting ability, or bipolar The layer may contain a highly functional substance (a substance having high electron-transporting and hole-transporting properties).

[0194] The EL layer can be formed by a variety of methods, including vapor deposition (including vacuum deposition), transfer, printing, inkjet, and coating. It can be formed in any way.

[0195] Inorganic EL elements are divided into dispersion-type inorganic EL elements and thin-film-type inorganic EL elements depending on the element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of a light-emitting material are dispersed in a binder. The emission mechanism is a donor-acceptor interaction that utilizes the donor and acceptor levels. Thin-film inorganic EL devices sandwich the light-emitting layer between dielectric layers. Furthermore, this structure is sandwiched between electrodes, and the light emission mechanism utilizes the inner-shell electron transition of metal ions. In this example, the light-emitting element is an organic EL element. do.

[0196] The light emitting element only needs to have at least one of the pair of electrodes transparent in order to extract light. The transistor and the light emitting element are formed on the substrate, and light is emitted from the surface opposite to the substrate. Top emission structure, which emits light from the top surface, and bottom emission structure, which emits light from the surface of the substrate. (bottom emission) structure and double-sided emission (dual emission) structure There are light emitting elements with a light-emitting structure, and any light emitting element with an emission structure can be applied.

[0197] FIG. 16(B) shows a light-emitting display device (also called an "EL display device") that uses light-emitting elements as display elements. The light-emitting element 4513 is an example of a display element. The light-emitting element 4513 is electrically connected to the transistor 4010. The electrode layer 4030, the light-emitting layer 4511, and the second electrode layer 4031 are laminated together. The light emitting element 4513 may be arranged in accordance with the direction of light to be extracted from the light emitting element 4513. The configuration of 13 can be changed as appropriate.

[0198] The partition wall 4510 is formed using an organic insulating material or an inorganic insulating material. An opening is formed on the first electrode layer 4030 using a resin material, and the side of the opening is It is preferable to form the inclined surface with a curvature.

[0199] The light-emitting layer 4511 may be composed of a single layer or a plurality of layers stacked. Either way is fine.

[0200] The light emitting element 4513 emits light in a variety of colors, including white, red, green, and blue, depending on the material that makes up the light emitting layer 4511. , cyan, magenta, or yellow, etc.

[0201] To achieve color display, a white light-emitting element 4513 is combined with a colored layer. There are two methods: one is to combine the two and the other is to provide a light emitting element 4513 with a different luminescent color for each pixel. The first method has higher productivity than the latter method. However, the latter method is less productive than the former method because it requires separate production. In addition to the latter method, it is possible to obtain an emission color with higher color purity than the former method. By adding a microcavity structure to the element 4513, color purity can be further improved. can be done.

[0202] The light-emitting layer 4511 may contain an inorganic compound such as quantum dots. By using the child dots in the light-emitting layer, they can also function as a light-emitting material.

[0203] The second electrode layer is formed to prevent oxygen, hydrogen, moisture, carbon dioxide, and the like from entering the light-emitting element 4513. A protective layer may be formed on the insulating layer 4031 and the partition wall 4510. The protective layer may be formed of silicon nitride. silicon nitride oxide, aluminum oxide, aluminum nitride, aluminum oxynitride, Forming aluminum oxide nitride, DLC (Diamond Like Carbon), etc. In addition, the first substrate 4001, the second substrate 4006, and the sealing material 4 The space sealed by 005 is sealed with a filler 4514. In addition, a protective film (laminating film) with high airtightness and low outgassing is used to prevent exposure to the outside air. It is preferable to package (enclose) the product in a protective film (film, ultraviolet curing resin film, etc.) or a cover material. Desirable.

[0204] Filler 4514 can be an inert gas such as nitrogen or argon, or an ultraviolet curing resin or Thermosetting resins can be used, such as PVC (polyvinyl chloride), acrylic resin, Polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or Ethylene vinyl acetate (EVA) can also be used. may contain a desiccant.

[0205] The sealing material 4005 is made of glass materials such as glass frit, or ordinary materials such as two-component mixed resin. Resin materials such as heat-curable resin, photo-curable resin, and thermosetting resin can be used. The sealing material 4005 may also contain a desiccant.

[0206] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) may be attached to the light-emitting surface of the light-emitting element. Optical films such as retardation plates (λ / 4 plates, λ / 2 plates), color filters, etc. may be provided as needed. In addition, an anti-reflection film may be provided on the polarizing plate or the circular polarizing plate. Anti-glare treatment can be applied to further diffuse reflected light and reduce glare.

[0207] In addition, by using a microcavity structure for the light-emitting element, it is possible to extract light with high color purity. In addition, by combining a microcavity structure with a color filter, This reduces congestion and improves the visibility of the displayed image.

[0208] A first electrode layer and a second electrode layer (a pixel electrode layer, a common electrode layer, In the case of the counter electrode layer, the direction of the light to be extracted, the location of the electrode layer, and The light transmission property or reflectivity can be selected depending on the pattern structure of the electrode layer.

[0209] The first electrode layer 4030 and the second electrode layer 4031 are made of an indium oxide containing tungsten oxide. oxide, indium zinc oxide with tungsten oxide, indium oxide with titanium oxide Indium tin oxide, indium tin oxide containing titanium oxide, indium zinc oxide A conductive material having light-transmitting properties, such as indium tin oxide doped with silicon oxide, may be used. This can be done.

[0210] The first electrode layer 4030 and the second electrode layer 4031 are made of tungsten (W) and molybdenum. (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (N b), Tantalum (Ta), Chromium (Cr), Cobalt (Co), Nickel (Ni), Titanium Metals such as titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), and silver (Ag) or its alloy, or metal nitride thereof. .

[0211] The first electrode layer 4030 and the second electrode layer 4031 are made of a conductive polymer (conductive polymer). The conductive polymer can be formed using a conductive composition containing a conductive polymer. For example, a so-called π-electron conjugated conductive polymer can be used. or its derivatives, polypyrrole or its derivatives, polythiophene or its derivatives or a copolymer consisting of two or more of aniline, pyrrole and thiophene, or Its derivatives are also included.

[0212] In addition, since transistors are easily damaged by static electricity, a protection circuit for protecting the drive circuit is required. It is preferable that the protection circuit is configured using a non-linear element.

[0213] As shown in FIG. 17, the transistors and the capacitors are arranged so as to have overlapping regions in the height direction. For example, the transistor 4011 and the transistor 4020 which form the driver circuit may be By overlapping the transistor 4021 and the transistor 4022, a display device with a narrow frame can be obtained. The pixel circuit includes a transistor 4010, a transistor 4023, and a capacitor 402. If the pixels are arranged so that they overlap even partially, the aperture ratio and resolution can be improved. In addition, in FIG. 17, a stack structure is applied to the liquid crystal display device shown in FIG. 16(A). Although an example is shown, it may also be applied to the EL display device shown in FIG. 16(B).

[0214] In addition, in the pixel circuit, a transparent conductive film with high transparency to visible light is used for the electrodes and wiring. By doing so, it is possible to increase the light transmittance within the pixel, and it is possible to substantially improve the aperture ratio. In addition, when an OS transistor is used, the semiconductor layer also has a light-transmitting property. This allows for an increased aperture ratio. This is especially useful when transistors are not stacked. It is also effective in

[0215] Furthermore, a display device may be constructed by combining a liquid crystal display device and a light emitting device.

[0216] The light emitting device is disposed on the opposite side of the display surface or at the edge of the display surface. The light-emitting device can also be called a backlight.

[0217] Here, the light emitting device is a plate-shaped or sheet-shaped light guide part (also called a light guide plate) and a light source that emits light of different colors. The light emitting element may be disposed near a side surface of the light guide portion. Then, light can be emitted from the side of the light guide to the inside. The light guide has a mechanism to change the light path ( This allows the light-emitting device to emit light to the pixel area of the display panel. Alternatively, a light-emitting device can be placed directly under the pixel without providing a light guide section. It may also be configured to place

[0218] The light emitting device preferably has light emitting elements of three colors: red (R), green (G), and blue (B). Furthermore, it may have a white (W) light emitting element. It is preferable to use an LED (Light Emitting Diode). .

[0219] Furthermore, the light emitting element has a full width at half maximum (FWHM) of its emission spectrum. at Half Maximum) is 50 nm or less, preferably 40 nm or less, more preferably Preferably, the diameter is 30 nm or less, more preferably 20 nm or less, and the color purity is extremely high. It is preferable that the full width at half maximum of the emission spectrum is as small as possible. However, it can be set to, for example, 1 nm or more. It is possible to produce a vivid display with high color reproducibility.

[0220] In addition, the red light emitting element has a peak wavelength of 625 nm or more and 650 nm or less in the emission spectrum. It is preferable to use an element located within the range below. Use an element whose spectral peak wavelength is in the range of 515 nm to 540 nm. It is preferable that the blue light emitting element has an emission spectrum with a peak wavelength of 445 nm or more. It is preferable to use elements that lie within the 70 nm range or less.

[0221] The display device sequentially blinks the three color light emitting elements and drives the pixels in synchronization with this. The color display can be performed based on the sequential additive color mixing method. This can also be called sequential driving.

[0222] Field sequential driving allows for the display of vivid color images. By using the above driving method, it is possible to display smooth moving images. It is not necessary to configure a pixel with multiple sub-pixels of different colors, and the effective reflective area of one pixel (effective surface area) The display area (also called the aperture ratio) can be increased, allowing for brighter displays. Since there is no need to provide a color filter to the pixel, the transmittance of the pixel can be improved. Furthermore, the manufacturing process can be simplified and the manufacturing cost can be reduced. It can be reduced.

[0223] 18(A) and 18(B) are schematic cross-sectional views of a display device capable of field sequential driving. The first substrate 4001 of the display device has a backlight that can emit light of each of the R, G, and B colors. In field sequential driving, each RGB color Since colors are expressed by time-division light emission, color filters are not required.

[0224] The backlight unit 4340a shown in FIG. 18(A) has a diffusion plate 4352 directly below the pixels. The light emitting element 4342 is provided in a plurality of layers. The light emitted from 42 to the first substrate 4001 side is diffused to make the brightness uniform within the display surface. A polarizing plate may be provided between the light emitting element 4342 and the diffusion plate 4352 as needed. The diffusion plate 4352 may be omitted if it is not necessary. It is also possible to omit 32.

[0225] The backlight unit 4340a can be equipped with many light-emitting elements 4342. In addition, a light guide plate is not required, and the light efficiency of the light emitting element 4342 is If necessary, the light emitting element 4342 may be provided with a lens 43 for diffusing light. 44 may be provided.

[0226] The backlight unit 4340b shown in FIG. 18(B) has a diffusion plate 4352 directly below the pixels. The light guide plate 4341 is provided at the end of the light guide plate 4341. The light guide plate 4341 has an uneven shape on the side opposite to the diffusion plate 4352. The guided light can be scattered by the uneven surface and emitted in the direction of the diffusion plate 4352.

[0227] The light emitting element 4342 can be fixed to a printed circuit board 4347. ), the light emitting elements 4342 of each color of RGB are shown overlapping, but The light emitting elements 4342 of each color B can be arranged side by side. A reflective layer 4348 that reflects visible light is provided on the side opposite to the light emitting element 4342. It is okay to do so.

[0228] The backlight unit 4340b can reduce the number of light-emitting elements 4342. It can be made low cost and thin.

[0229] The liquid crystal element may be a light-scattering type liquid crystal element. It is preferable to use an element having a composite material of a liquid crystal and a polymer. For example, a polymer dispersed liquid crystal Alternatively, a polymer network liquid crystal (PNLC) A liquid crystal (LC) element may also be used.

[0230] The light-scattering liquid crystal element is a liquid crystal layer in a three-dimensional network structure of a resin part sandwiched between a pair of electrodes. The liquid crystal part is made of a material such as nematic liquid crystal. The resin portion can be made of a photo-curable resin. For example, monofunctional monomers such as acrylates and methacrylates, diacrylates, triacrylates, Multifunctional monomers such as acrylates, dimethacrylates, trimethacrylates, or A polymerizable compound in which these are mixed can be used.

[0231] Light-scattering liquid crystal elements utilize the anisotropy of the refractive index of the liquid crystal material to transmit or scatter light. The resin portion may also have anisotropy in refractive index. When the liquid crystal molecules are aligned in a certain direction according to the voltage applied to the element, the refraction of the liquid crystal part and the resin part A direction occurs in which the difference in the refractive index becomes smaller, and the light incident along this direction is scattered by the liquid crystal section. Therefore, the light-scattering liquid crystal element is visually perceived as transparent from this direction. On the other hand, when the alignment of the liquid crystal molecules becomes random according to the applied voltage, the liquid crystal part and the resin Since there is no significant change in the refractive index difference between the liquid crystal and the liquid crystal, the incident light is scattered by the liquid crystal. Therefore, the light-scattering liquid crystal element remains opaque regardless of the viewing direction.

[0232] FIG. 19(A) shows a case where the liquid crystal element 4013 of the display device of FIG. 18(A) is replaced with a light scattering type liquid crystal element 401. The light scattering type liquid crystal element 4016 has a liquid crystal portion and a resin portion. It has a composite layer 4009, a first electrode layer 4030, and a second electrode layer 4031. The elements related to the cold sequential driving are the same as those in FIG. 18(A), but the light scattering type liquid crystal When the element 4016 is used, the alignment film and the polarizing plate are not required. Although 5 is shown in the form of a sphere, it may also be cylindrical.

[0233] FIG. 19(B) shows a case where the liquid crystal element 4013 of the display device of FIG. 18(B) is replaced with a light scattering type liquid crystal element 401 18B, the light scattering type liquid crystal element 4016 is replaced with a voltage It operates in a mode where it transmits light when no voltage is applied and scatters light when a voltage is applied. By adopting this configuration, the normal state (the state where no display is made) ) can be used to make a transparent display device. In this case, when the light scattering operation is performed, It is possible to display in color.

[0234] Modified examples of the display device shown in FIG. 19(B) are shown in FIGS. 20(A) to 20(E). In A) to E), for clarity, some elements of FIG. 19(B) are used, and other elements are is omitted in the illustration.

[0235] FIG. 20(A) shows a structure in which the first substrate 4001 functions as a light guide plate. The outer surface of the substrate 4001 may be provided with an uneven shape. In this configuration, a light guide plate is separately provided. Since it is not necessary to mount a light guide plate, the manufacturing cost can be reduced. Since there is no attenuation of light, the light emitted by the light emitting element 4342 can be used efficiently. do.

[0236] FIG. 20B shows a configuration in which light is incident from the vicinity of the end of the composite layer 4009. 9 and the second substrate 4006, and the interface between the composite layer 4009 and the first substrate 4001. The composite layer 4 can emit light to the outside from the light-scattering liquid crystal element by utilizing total reflection at the The resin portion of the substrate 4009 has a refractive index larger than that of the first substrate 4001 and the second substrate 4006. Use low-cost materials.

[0237] Note that the light-emitting element 4342 is not only provided on one side of the display device, but also as shown in FIG. Alternatively, the light emitting element 43 may be provided on two sides facing each other. Furthermore, the light emitting element 43 may be provided on three or four sides. By providing 42 on multiple sides, it is possible to compensate for light attenuation and support large-area display elements. It is possible.

[0238] FIG. 20(D) shows a display device in which light emitted from a light emitting element 4342 passes through a mirror 4345. This configuration makes it easier to guide light to the display device from a certain angle. Therefore, total internal reflection can be efficiently achieved.

[0239] FIG. 20(E) shows a configuration having a stack of layers 4003 and 4004 on a composite layer 4009. One of the layer 4003 and the layer 4004 is a support such as a glass substrate, and the other is an inorganic The composite layer 40 may be formed of a film, an organic resin coating film, or a similar material. The resin portion of the layer 4009 is made of a material having a refractive index greater than that of the layer 4004. The layer 4002 uses a material having a refractive index higher than that of the layer 4003 .

[0240] A first interface is formed between composite layer 4009 and layer 4004, and layer 4004 and layer 400 A second interface is formed between the first interface and the second interface. The light that passes through can be totally reflected at the second interface and returned to the composite layer 4009. Therefore, the light emitted by the light emitting element 4342 can be used efficiently.

[0241] The configurations in FIG. 19(B) and FIG. 20(A) to (E) can be combined with each other. can be done.

[0242] This embodiment mode can be implemented by appropriately combining with the configurations described in other embodiment modes. It is possible.

[0243] (Embodiment 3) In this embodiment mode, the transistors described in the above embodiment modes can be replaced with An example of a transistor that can be used will be described with reference to the drawings.

[0244] The display device of one embodiment of the present invention includes a bottom-gate transistor and a top-gate transistor. The present invention can be fabricated using various types of transistors, such as a transistor having a MOSFET. The semiconductor layer materials and transistor structures used can be easily replaced to suit the production line. It is possible.

[0245] [Bottom-gate transistor] FIG. 21(A1) shows a channel protection transistor, which is a type of bottom gate transistor. 21(A1) is a cross-sectional view of the transistor 810 in the channel length direction. The transistor 810 is formed on the substrate 771. The electrode 746 is provided with an insulating layer 772 interposed therebetween. The semiconductor layer 742 is provided. The electrode 746 can function as a gate electrode. The insulating layer 726 is provided as a gate electrode. It can function as a gate insulating layer.

[0246] In addition, an insulating layer 741 is provided on a channel formation region of the semiconductor layer 742. Electrodes 744a and 744b are provided on the insulating layer 726 in contact with a portion of the insulating layer 726. 744a can function as either a source or drain electrode. It can function as the other of the source electrode and the drain electrode. A portion of the pole 744 b is formed on the insulating layer 741 .

[0247] The insulating layer 741 can function as a channel protection layer. By providing the electrode 744a and the electrode 744b, the exposure of the semiconductor layer 742 that occurs when the electrode 744a and the electrode 744b are formed can be prevented. Therefore, when the electrodes 744a and 744b are formed, the semiconductor layer This prevents the channel formation region 742 from being etched. According to this, a transistor with good electrical characteristics can be realized.

[0248] The transistor 810 includes an electrode 744a, an electrode 744b, and an insulating layer 741. The insulating layer 729 is disposed on the insulating layer 728 .

[0249] When an oxide semiconductor is used for the semiconductor layer 742, at least one of the electrodes 744a and 744b At least in the area in contact with the semiconductor layer 742, oxygen is taken from a part of the semiconductor layer 742, and oxygen vacancies are formed. It is preferable to use a material that can generate oxygen vacancies in the semiconductor layer 742. The resulting region has an increased carrier concentration, which makes it n-type, forming an n-type region (n + area) Therefore, the region can function as a source region or a drain region. When an oxide semiconductor is used for the semiconductor layer 742, oxygen is taken from the semiconductor layer 742, and oxygen vacancies occur. Examples of materials that can generate this include tungsten and titanium. Cut.

[0250] The source and drain regions are formed in the semiconductor layer 742, forming an electrode 744a In addition, the contact resistance between the electrode 744b and the semiconductor layer 742 can be reduced. The electrical characteristics of the transistor, such as the effective mobility and threshold voltage, can be improved. can.

[0251] When a semiconductor such as silicon is used for the semiconductor layer 742, the semiconductor layer 742 and the electrode 744a and between the semiconductor layer 742 and the electrode 744b, as an n-type semiconductor or a p-type semiconductor. It is preferable to provide a layer that functions as an n-type semiconductor or a p-type semiconductor. It can function as a source or drain region of a transistor.

[0252] The insulating layer 729 has a function of preventing or reducing diffusion of impurities into the transistor from the outside. It is preferable to form the insulating layer 729 using a material having the above structure. You can also do this.

[0253] The transistor 811 shown in FIG. 21A2 has a back gate electrode over the insulating layer 729. The transistor 810 differs from the transistor 810 in that it has a functioning electrode 723. The electrode 723 is an electrode It can be formed using the same materials and methods as 746.

[0254] In general, the back gate electrode is formed of a conductive layer, and the gate electrode and the back gate electrode form a semiconductor. The back gate electrode is disposed so as to sandwich the channel forming region of the layer. The back gate electrode can be made to function in the same manner as the gate electrode. Alternatively, the potential may be set to ground potential (GND potential) or any other potential. By changing the potential of the gate electrode independently of the gate electrode, the threshold voltage of the transistor can be controlled. The voltage can be varied to any desired value.

[0255] In addition, both the electrode 746 and the electrode 723 can function as gate electrodes. Therefore, the insulating layer 726, the insulating layer 728, and the insulating layer 729 are gate insulating layers. The electrode 723 can function as a layer between the insulating layer 728 and the insulating layer 729. It may also be provided in.

[0256] When one of the electrodes 746 and 723 is referred to as a "gate electrode," the other is referred to as a "back electrode." For example, in the transistor 811, the electrode 723 is called a "gate electrode." When the term "electrode" is used, the electrode 746 is referred to as a "back gate electrode." When the transistor 811 is used as a top gate electrode, In addition, either the electrode 746 or the electrode 723 can be considered as a "first The first gate electrode is sometimes referred to as the "first gate electrode" and the other as the "second gate electrode."

[0257] By providing the electrode 746 and the electrode 723 with the semiconductor layer 742 interposed therebetween, the electrode 74 6 and the electrode 723 are set to the same potential, the region where carriers flow in the semiconductor layer 742 The area becomes larger in the film thickness direction, so the amount of carrier movement increases. As the on-current of the transistor 811 increases, the field effect mobility also increases.

[0258] Therefore, the transistor 811 is a transistor having a large on-state current relative to its area. That is, the area occupied by the transistor 811 is set to According to one embodiment of the present invention, the area occupied by a transistor can be reduced. Therefore, according to one embodiment of the present invention, a highly integrated semiconductor device can be realized. It is possible.

[0259] In addition, since the gate electrode and back gate electrode are formed from a conductive layer, they can be The function of preventing the electric field generated from acting on the semiconductor layer where the channel is formed (especially static electricity The back gate electrode has an electric field shielding function against the semiconductor layer. By forming a back gate electrode and covering the semiconductor layer with the back gate electrode, the electric field shielding function can be improved. .

[0260] In addition, by forming the back gate electrode using a conductive film having a light-shielding property, This prevents light from entering the semiconductor layer from the side. This can prevent degradation of electrical characteristics, such as a shift in the threshold voltage of a transistor. .

[0261] According to one embodiment of the present invention, a highly reliable transistor can be provided. A highly reliable semiconductor device can be realized.

[0262] FIG. 21(B1) shows a channel protection type transistor 82 having a different configuration from that shown in FIG. 21(A1). 8 is a cross-sectional view of the transistor 820 in the channel length direction. It has a similar structure, but differs in that an insulating layer 741 covers the edge of a semiconductor layer 742. In addition, an opening formed by selectively removing a part of the insulating layer 741 that overlaps the semiconductor layer 742 In this portion, the semiconductor layer 742 and the electrode 744a are electrically connected. In another opening formed by selectively removing a portion of the insulating layer 741 that overlaps with the semiconductor layer 42, The insulating layer 729 is electrically connected to the electrode 744b. The overlapping region can function as a channel protection layer.

[0263] The transistor 821 shown in FIG. 21B2 has a back gate electrode over the insulating layer 729. It differs from transistor 820 in that it has a functioning electrode 723 .

[0264] By providing the insulating layer 741, the semiconductor generated when the electrodes 744a and 744b are formed can be prevented. Therefore, when forming the electrode 744a and the electrode 744b, the layer 742 can be prevented from being exposed. In addition, the semiconductor layer 742 can be prevented from becoming thin.

[0265] Also, the transistors 820 and 821 are the same as the transistors 810 and 821. The distance between the electrode 744a and the electrode 746 and the distance between the electrode 744b and the electrode 746 are smaller than the distance between the electrode 744a and the electrode 746 and the electrode 744b. Therefore, the parasitic capacitance generated between the electrode 744a and the electrode 746 is In addition, the parasitic capacitance generated between the electrode 744b and the electrode 746 can be reduced. According to one embodiment of the present invention, a transistor with favorable electrical characteristics can be realized. Cut.

[0266] The transistor 825 shown in FIG. 21C1 is a bottom-gate transistor. 8 is a cross-sectional view of a channel-etched transistor 825 in the channel length direction. The resistor 825 forms the electrodes 744a and 744b without using the insulating layer 741. Therefore, a part of the semiconductor layer 742 that is exposed when the electrodes 744a and 744b are formed is On the other hand, since the insulating layer 741 is not provided, the transistor production It can improve sexuality.

[0267] The transistor 826 shown in FIG. 21C2 has a back gate electrode over the insulating layer 729. It differs from transistor 825 in that it has a functioning electrode 723 .

[0268] 22(A1) to (C2) show transistors 810, 811, 820, 821, 825, 826 are cross-sectional views in the channel width direction.

[0269] In the structures shown in FIGS. 22(B2) and 22(C2), the gate electrode and the back gate electrode are connected. The gate electrode and the back gate electrode have the same potential. It is sandwiched between a gate electrode and a back gate electrode.

[0270] The length of each of the gate electrode and the back gate electrode in the channel width direction is 2 in the channel width direction, and the entire channel width direction of the semiconductor layer 742 is 726, 741, 728, and 729 are sandwiched between the gate electrode or the back gate electrode. It is a structure that

[0271] With this structure, the semiconductor layer 742 included in the transistor can be used as a gate electrode and a barrier layer. The gate electrode can be electrically surrounded by the electric field of the gate electrode.

[0272] Like the transistor 821 or the transistor 826, the gate electrode and the back gate The electric field of the electrode electrically surrounds the semiconductor layer 742 in which the channel formation region is to be formed. The device structure of the transistor is called the Surrounded channel (S-channel el) structure.

[0273] By using an S-channel structure, either one of the gate electrode and the back gate electrode By both, an electric field is effectively applied to the semiconductor layer 742 to induce a channel. This improves the current driving capability of the transistor and makes it possible to obtain high on-current characteristics. In addition, since it is possible to increase the on-current, it is possible to miniaturize transistors. In addition, the S-channel structure allows for mechanical Strength can be increased.

[0274] [Top-gate transistor] The transistor 842 illustrated in FIG. 23A1 is a top-gate transistor. The electrode 744a and the electrode 744b are formed on the insulating layer 728 and the insulating layer 729. The insulating film 742 is electrically connected to the semiconductor layer 742 in the opening.

[0275] In addition, a part of the insulating layer 726 that does not overlap with the electrode 746 is removed, and the electrode 746 and the remaining insulating layer 726 as a mask to introduce impurities into the semiconductor layer 742. It is possible to form an impurity region in a self-aligned manner. The sintered body 842 has an area where the insulating layer 726 extends beyond the edge of the electrode 746. The impurity concentration in the region of the layer 742 into which the impurity is introduced through the insulating layer 726 is Therefore, the semiconductor layer 742 is an insulating layer. The area overlapping the layer 726 but not the electrode 746 is provided with an LDD (Lightly Deposited Diode). A doped drain region is formed.

[0276] The transistor 843 shown in FIG. 23A2 has the electrode 723. 2. The transistor 843 has an electrode 723 formed on a substrate 771. The electrode 723 has a region overlapping with the semiconductor layer 742 with the insulating layer 772 interposed therebetween. can function as a back gate electrode.

[0277] In addition, the transistor 844 shown in FIG. 23B1 and the transistor 845 shown in FIG. 23B2 As in the case of the electrode 845, the insulating layer 726 in the area that does not overlap with the electrode 746 may be entirely removed. In addition, the transistor 846 shown in FIG. 23(C1) and the transistor shown in FIG. 23(C2) The insulating layer 726 may remain, as may the insulating layer 847.

[0278] The transistors 842 to 847 are also formed with the electrode 746. By introducing impurities into the semiconductor layer 742 using the mask, According to one aspect of the present invention, the impurity region can be formed in a self-aligned manner. According to one embodiment of the present invention, a highly integrated transistor can be realized. Therefore, a semiconductor device with a high resistance can be realized.

[0279] Transistors 842, 843, 844, 845, and 846 are shown in FIGS. 847 are cross-sectional views in the channel width direction.

[0280] The transistors 843, 845, and 847 are respectively However, the present invention is not limited to this, and the transistor 84 may have an S-channel structure. 3. Transistor 845 and transistor 847 should not be of S-channel structure. That's fine.

[0281] This embodiment mode can be implemented by appropriately combining with the configurations described in other embodiment modes. It is possible.

[0282] (Fourth embodiment) Examples of electronic devices that can use the display device according to one embodiment of the present invention include display devices, personal computers, and the like. a personal computer, an image storage device or image reproduction device equipped with a recording medium, a mobile phone, a mobile phone Game consoles, including those with a camcorder, portable data terminals, e-book terminals, video cameras, digital still cameras Cameras such as cameras, goggle-type displays (head-mounted displays), navigation systems, audio playback devices (car audio, digital audio players, etc.), copying machines, fax machines, printers, printer-combined machines, automated teller machines (ATMs), Examples of such electronic devices include vending machines. Specific examples of these electronic devices are shown in Figure 25.

[0283] FIG. 25(A) shows a digital camera, which includes a housing 961, a shutter button 962, a microphone 963, and a microphone 964. 63, speaker 967, display unit 965, operation keys 966, zoom lever 968, lens 9 By using the display device of one embodiment of the present invention for the display portion 965, various images can be displayed. The following display can be performed.

[0284] FIG. 25(B) shows a digital signage having a large display unit 922. The display device of one embodiment of the present invention is used for the display portion 922. Therefore, a high-quality display can be achieved.

[0285] FIG. 25C shows an example of a mobile phone, which includes a housing 951, a display unit 952, and an operation button 953. , an external connection port 954, a speaker 955, a microphone 956, a camera 957, etc. The mobile phone has a touch sensor on the display unit 952. All operations, such as inputting, can be performed by touching the display unit 952 with a finger or a stylus. The housing 951 and the display unit 952 are flexible and can be folded as shown in the figure. By using the display device of one embodiment of the present invention for the display portion 952, , various images can be displayed.

[0286] FIG. 25(D) shows a video camera, which includes a first housing 901, a second housing 902, a display unit 903, The operation key 904, the lens 905, the connection part 906, the speaker 907, etc. The lens 904 and the lens 905 are provided in the first housing 901, and the display unit 903 is provided in the second housing 902. By using the display device of one embodiment of the present invention for the display portion 903, various It is possible to display a clear image.

[0287] FIG. 25(E) shows a television, which includes a housing 971, a display unit 973, operation keys 974, and a speaker 975. The display unit 973 has a touch sensor 975, a communication connection terminal 976, an optical sensor 977, etc. The display device of one embodiment of the present invention is provided in the display portion 973. By using this, various images can be displayed.

[0288] FIG. 25(F) shows a portable data terminal, which includes a housing 911, a display portion 912, a speaker 913, a camera, and a camera body. The display unit 912 has a touch panel for inputting and outputting information. By using the display device of one embodiment of the present invention for the display portion 912, various images can be displayed. It is possible to provide instructions.

[0289] This embodiment mode can be implemented by appropriately combining with the configurations described in other embodiment modes. It is possible. [Explanation of symbols]

[0290] 10: pixel, 11: circuit, 11a: circuit, 11b: circuit, 12: source driver, 12a : source driver, 12b: source driver, 13: gate driver, 15: display area, 16: selection circuit, 101: transistor, 102: transistor, 103: transistor , 104: Capacitor element, 105: Transistor, 106: Capacitor element, 110: Circuit block 111: transistor, 112: transistor, 113: capacitance element, 114: light emitting element 115: transistor, 116: capacitance element, 117: liquid crystal element, 118: transistor 119: transistor, 120: circuit, 121: wiring, 121a: wiring, 121b: wiring Wire, 122: Wiring, 122a: Wiring, 122b: Wiring, 123: Wiring, 124: Wiring, 1 25: Wiring, 127: Wiring, 128: Wiring, 129: Wiring, 130: Wiring, 131: Wiring ,132: Wiring, 133: Wiring, 134: Wiring, 135: Wiring, 136: Pixel pitch, 1 38: Wiring, 215: Display unit, 221a: Scanning line driving circuit, 231a: Signal line driving circuit, 232a: signal line driving circuit, 241a: common line driving circuit, 723: electrode, 724a: electrode , 724b: electrode, 726: insulating layer, 728: insulating layer, 729: insulating layer, 741: insulating layer , 742: semiconductor layer, 744a: electrode, 744b: electrode, 746: electrode, 771: substrate, 772: insulating layer, 810: transistor, 811: transistor, 820: transistor , 821: transistor, 825: transistor, 826: transistor, 842: transistor Transistor, 843: Transistor, 844: Transistor, 845: Transistor, 84 6: Transistor, 847: Transistor, 901: Housing, 902: Housing, 903: Display 904: Operation keys, 905: Lens, 906: Connection part, 907: Speaker, 911: Housing, 912: display unit, 913: speaker, 919: camera, 921: pillar, 922: display 951: housing, 952: display unit, 953: operation buttons, 954: external connection port, 9 55: Speaker, 956: Microphone, 957: Camera, 961: Housing, 962: Shutter Button, 963: microphone, 965: display, 966: operation keys, 967: speaker, 96 8: Zoom lever, 969: Lens, 971: Housing, 973: Display, 974: Operation keys , 975: speaker, 976: communication connection terminal, 977: optical sensor, 4001: substrate, 4 003: layer, 4004: layer, 4005: sealing material, 4006: substrate, 4008: liquid crystal layer, 4009: Composite layer, 4010: Transistor, 4011: Transistor, 4013: Liquid crystal Element, 4014: wiring, 4015: electrode, 4016: light scattering type liquid crystal element, 4017: electrode , 4018: FPC, 4019: anisotropic conductive layer, 4020: capacitance element, 4021: electrode, 4022: transistor, 4023: transistor, 4030: electrode layer, 4031: electrode layer, 4032: insulating layer, 4033: insulating layer, 4035: spacer, 4041: printed circuit board board, 4042: integrated circuit, 4102: insulating layer, 4103: insulating layer, 4104: insulating layer, 4 110: insulating layer, 4111: insulating layer, 4112: insulating layer, 4131: coloring layer, 4132: Light-shielding layer, 4133: insulating layer, 4200: input device, 4210: touch panel, 4227: Electrode, 4228: Electrode, 4237: Wiring, 4238: Wiring, 4239: Wiring, 4263: Substrate, 4272b: FPC, 4273b: IC, 4340a: Backlight unit, 4 340b: backlight unit, 4341: light guide plate, 4342: light emitting element, 4344: Lens, 4345: Mirror, 4347: Printed circuit board, 4348: Reflective layer, 4352: Expander Scattering plate, 4510: partition wall, 4511: light-emitting layer, 4513: light-emitting element, 4514: filler

Claims

[Claim 1] A display device including a pixel, a first source driver, a second source driver, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a first capacitor, a first wiring, and a second wiring, the first to sixth transistors are provided outside the display area, the first capacitance element and the pixel are provided in a display region, one of a source and a drain of the first transistor is electrically connected to the pixel and one electrode of the first capacitor element; the other of the source and the drain of the first transistor is electrically connected to the first source driver; the other electrode of the first capacitor element is electrically connected to one of the source or the drain of the second transistor and one of the source or the drain of the third transistor; the other of the source and the drain of the third transistor is electrically connected to the first wiring; the other of the source and the drain of the first transistor is electrically connected to the other of the source and the drain of the second transistor; one of a source and a drain of the fourth transistor is electrically connected to the pixel and one electrode of the first capacitor element; the other of the source and the drain of the fourth transistor is electrically connected to the second source driver; the other electrode of the first capacitor element is electrically connected to one of the source or the drain of the fifth transistor and one of the source or the drain of the sixth transistor; the other of the source and the drain of the sixth transistor is electrically connected to the second wiring; the other of the source and the drain of the fourth transistor is electrically connected to the other of the source and the drain of the fifth transistor.

Citation Information

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