Semiconductor device

Abstract

To improve the reliability of a light-emitting device and impart flexibility to a light-emitting device including a thin film transistor that uses an oxide semiconductor film.SOLUTION: A light-emitting device comprises a drive circuit section including a thin film transistor for drive circuits and a pixel section including a thin film transistor for pixels, on the same flexible substrate. The thin film transistor for drive circuits and the thin film transistor for pixels are inverted-staggered thin film transistors each including an oxide semiconductor layer partially in contact with an oxide insulation layer. A color filter layer and a light-emitting element are provided on the oxide insulation layer in the pixel section, and a conductive layer overlapping a gate electrode layer and the oxide semiconductor layer is provided on the oxide insulation layer in the thin film transistor for drive circuits. Metal conductive films are used for the gate electrode layer, a source electrode layer, and a drain electrode layer.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a light-emitting device in which a layer containing an organic compound is used as a light-emitting layer, and a method for manufacturing the same. The present invention relates to an electronic device that incorporates a light-emitting display device having light-emitting elements as a component.

[0002] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to a general category of semiconductor devices, including electro-optical devices such as light-emitting devices, semiconductor circuits, and electronic equipment. be. [Background technology]

[0003] It uses organic compounds as light emitters, which have characteristics such as thinness, light weight, high-speed response, and low DC voltage operation. The light-emitting element is being considered for application to next-generation flat panel displays and next-generation lighting. In particular, a display device in which light-emitting elements are arranged in a matrix is more suitable than a conventional liquid crystal display device. Compared to LCDs, it is believed to have an advantage in that it has a wider viewing angle and better visibility.

[0004] The light-emitting mechanism of a light-emitting element is to sandwich an EL layer between a pair of electrodes and apply a voltage to the cathode. The electrons injected from the anode and the holes injected from the anode recombine at the luminescent centers of the EL layer and form molecules. When an exciton is formed, and the molecular exciton relaxes to the ground state, it releases energy and emits light. It is said that the excited state is either singlet or triplet, and light emission occurs depending on which excitation state. It is believed that this is possible even after going through a state of

[0005] The EL layer constituting the light-emitting element has at least a light-emitting layer. a layered structure having a hole injection layer, a hole transport layer, an electron transport layer, an electron injection layer, etc. It is also possible.

[0006] Metal oxides are also attracting attention as materials that exhibit semiconducting properties. Examples of oxides include tungsten oxide, tin oxide, indium oxide, and zinc oxide. There are thin-film transistors that use metal oxides that exhibit such semiconducting properties as their channel formation regions. Such a capacitor is already known (Patent Document 1 and Patent Document 2).

[0007] Furthermore, TFTs using oxide semiconductors have high field-effect mobility. It is also possible to configure a driving circuit for a display device or the like using the above. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] Japanese Patent Application Laid-Open No. 2007-123861 [Patent Document 2] Japanese Patent Application Laid-Open No. 2007-96055 Summary of the Invention [Problem to be solved by the invention]

[0009] Thin film transistors that use oxide semiconductor films have high operating speeds and are relatively easy to manufacture. Therefore, it is required to have sufficient reliability.

[0010] To improve the operating characteristics and reliability of a thin film transistor using an oxide semiconductor film This is one of the challenges.

[0011] In particular, it is preferable that the operating speed of the thin film transistors used in the drive circuit section is fast.

[0012] For example, the channel length (L) of a thin film transistor can be shortened or the channel width (W) can be widened. However, shortening the channel length (L) reduces the switching characteristics. In addition, increasing the channel width (W) reduces the There is a problem in that the capacitance load of the film transistor itself increases.

[0013] Therefore, even if the channel length is short, a device having a thin film transistor with stable electrical characteristics can be obtained. It is also an object of the present invention to provide an optical device.

[0014] In addition, when forming a plurality of different circuits on an insulating surface, for example, a pixel section and a driver circuit section can be formed at the same time. When formed on one substrate, the thin film transistor used in the pixel portion has excellent switching properties. The thin film transistors used in the drive circuit section are required to have high switching characteristics, for example, a large on-off ratio. In particular, the higher the resolution of the display device, the faster the display speed. Since the image writing time is shortened, the operating speed of the thin film transistors used in the drive circuit section is also improved. Preferably, the rate is fast.

[0015] Another challenge is to reduce the variations in the electrical characteristics of thin film transistors that use oxide semiconductor films. It shall be one.

[0016] The object is to provide flexibility to a light-emitting device having a thin film transistor using an oxide semiconductor film. This is one of the topics. [Means for solving the problem]

[0017] A light-emitting element and a thin film transistor including an oxide semiconductor layer are provided over a flexible substrate, A light-emitting device is fabricated.

[0018] A light-emitting element and a thin film transistor including an oxide semiconductor layer may be directly formed on a flexible substrate. Alternatively, a light-emitting element and a thin film transistor including an oxide semiconductor layer are formed on another substrate, and After the formation, the film may be peeled off and transferred to a flexible substrate. In order to achieve this, the formation substrate is peeled off from the light-emitting element and the thin film transistor including the oxide semiconductor layer. A layer is provided.

[0019] Examples of flexible substrates include polyethylene terephthalate (PET) and polyethylene naphtha. Polyester resins such as phthalate (PEN), polyacrylonitrile resins, polyimide resins , polymethyl methacrylate resin, polycarbonate resin (PC), polyether sulfur Polyolefin resin (PES), polyamide resin, cycloolefin resin, polystyrene resin, Amide-imide resin, polyvinyl chloride resin, etc. can be suitably used. A structure in which a fibrous body is impregnated with an organic resin (so-called prepreg) may be used as the support.

[0020] Alternatively, a metal substrate formed into a thin film having flexibility may be used. The material for the metal substrate is not particularly limited, but aluminum is Preferred are alloys of metals such as aluminum, copper, nickel, aluminum alloys, and stainless steel. It can be used appropriately.

[0021] One embodiment of the light emitting device of the present invention is a light emitting device including a driving circuit thin film transistor on the same flexible substrate. a pixel section including a driving circuit section and a pixel section including a pixel thin film transistor, The thin film transistor for the pixel and the thin film transistor for the pixel are formed by a gate electrode layer, a gate insulating layer on the gate electrode layer, and a gate insulating layer. an oxide semiconductor layer on the gate insulating layer, and a source electrode layer and a drain electrode layer on the oxide semiconductor layer; and a layer in contact with a part of the oxide semiconductor layer is formed on the oxide semiconductor layer, the source electrode layer, and the drain electrode layer. a color filter layer on the oxide insulating layer in the pixel portion; A first electrode layer, an EL layer, a second electrode layer, and a second electrode layer are electrically connected to the pixel thin film transistor on the pixel thin film transistor. A gate electrode layer is formed on the oxide insulating layer in the thin film transistor for the driving circuit. A conductive layer overlapping the electrode layer and the oxide semiconductor layer is provided, and a gate electrode layer, a source electrode layer, and The drain electrode layer is a metal conductive film.

[0022] Another embodiment of the light emitting device of the present invention includes a thin film transistor for a driving circuit on the same flexible substrate. and a pixel portion including a thin film transistor for a pixel, The thin film transistor for the pixel and the thin film transistor for the gate electrode layer are formed by a gate insulating layer on the gate electrode layer. an oxide semiconductor layer on the gate insulating layer, a source electrode layer and a drain electrode layer on the oxide semiconductor layer; a source electrode layer and a drain electrode layer; and a portion of the oxide semiconductor layer on the source electrode layer and the drain electrode layer. In the pixel area, a color filter layer is formed on the oxide insulating layer. A first electrode is formed on the filter layer and electrically connected to the pixel thin film transistor through the connection electrode layer. a thin film transistor for a driving circuit, comprising a stack of an electrode layer, an EL layer, and a second electrode layer; A conductive layer overlapping with the gate electrode layer and the oxide semiconductor layer is provided over the oxide insulating layer, The electrode layer, the source electrode layer, and the drain electrode layer are made of a metal conductive film.

[0023] The thin film transistors for pixels and the thin film transistors for driving circuits are bottom gate structure reverse staggered Thin film transistors for pixels and thin film transistors for driver circuits are used. The oxide insulating layer is in contact with the oxide semiconductor layer exposed between the source electrode layer and the drain electrode layer. The thin film transistor is a channel-etched type having a film formed thereon.

[0024] The thin film transistor for the driver circuit has a structure in which an oxide semiconductor layer is sandwiched between a gate electrode and a conductive layer. This reduces the variation in the threshold voltage of the thin film transistor, resulting in a stable It is possible to provide a light-emitting device including a thin film transistor having good electrical characteristics. The layer may be at the same potential as the gate electrode layer, at a floating potential, or at a fixed potential. For example, the potential may be GND or 0V. Also, by applying an arbitrary potential to the conductive layer, the thin film transistor The threshold voltage of the transistor can be controlled.

[0025] The pixel thin film transistor and the pixel electrode may be formed in direct contact with each other, or a connection electrode layer may be formed between them. The connection electrode layer may be made of Al, Cr, Cu, Ta, Ti, M A film mainly composed of an element selected from o and W, or an alloy film of these elements A layered film can be used.

[0026] The conductive layer provided on the oxide semiconductor layer of the thin film transistor for the driving circuit, the first wiring (terminal The first wiring (also called a terminal or a connection electrode) and the second wiring (also called a terminal or a connection electrode) are connected to the pixel. Indium oxide, indium oxide tin oxide alloy, indium oxide zinc oxide can be produced in the same process as the electrodes. The conductive layer may be formed using an alloy or an oxide conductive material such as zinc oxide, or may be formed using the same material as the connection electrode layer. In the process, a film containing elements selected from Al, Cr, Cu, Ta, Ti, Mo, and W as its main component, Alternatively, it may be formed using a metal material such as an alloy film of these materials.

[0027] In addition, light-emitting elements of multiple types of luminescent colors and pixel elements electrically connected to the light-emitting elements can be formed on the same substrate. Thin film transistors can be formed to manufacture light-emitting devices such as displays.

[0028] In addition, a plurality of light-emitting elements that emit white light are provided, and the light-emitting areas of the respective light-emitting elements are overlapped. An optical film, specifically a color filter, is provided on the display to create a full-color light-emitting display device. The color filter here includes a black matrix and an overcoat. Three color filter layers (red color filter, blue color filter, green color filter) It does not refer to the entire film with a color filter, but to a single color filter. refers to.

[0029] One embodiment of a method for manufacturing a light-emitting device of the present invention for realizing the above structure is a method for manufacturing a light-emitting device of the present invention. A gate electrode layer is formed using a metal conductive film on a flexible substrate having an insulating surface including a gate electrode. A gate insulating layer is formed on the gate electrode layer, an oxide semiconductor layer is formed on the gate insulating layer, and an oxide semiconductor layer is formed on the gate insulating layer. After dehydrating or dehydrogenating the compound semiconductor layer, the oxide semiconductor layer is The source electrode layer and the drain electrode layer are formed by using a metal conductive film on the oxide semiconductor layer to prevent re-contamination of water and hydrogen. a source electrode layer and a drain electrode layer; and An oxide insulating layer is formed in contact with a part of the conductor layer, and a thin film transistor for the drive circuit is formed in the drive circuit section. and forming a pixel thin film transistor in the pixel portion, and forming a color film on the oxide insulating layer in the pixel portion. A color filter layer is formed on the color filter layer, and electrically connected to the pixel thin film transistor. forming a first electrode layer, an EL layer on the first electrode layer, and a second electrode layer on the EL layer; In the driver circuit portion, a gate electrode layer and an oxide semiconductor layer of a driver circuit thin film transistor A conductive layer is formed on the overlapping oxide insulating layer in the same process as the first electrode layer.

[0030] Another embodiment of the method for manufacturing a light-emitting device of the present invention for realizing the above structure is a method for manufacturing a driving circuit portion and a light-emitting device of the present invention. A gate electrode layer is formed on a flexible substrate having an insulating surface including a pixel portion, and a gate insulating layer formed using a metal conductive film; an oxide semiconductor layer formed over the gate insulating layer; After the oxide semiconductor layer is dehydrated or dehydrogenated, the oxide semiconductor layer is The source electrode layer and the gate electrode layer are formed by using a metal conductive film on the oxide semiconductor layer. A drain electrode layer is formed, and an oxide semiconductor layer is formed on the oxide semiconductor layer, the source electrode layer, and the drain electrode layer. An oxide insulating layer is formed in contact with a part of the compound semiconductor layer, and a thin film transistor for the drive circuit is formed in the drive circuit section. A pixel thin film transistor is formed on the oxide insulating layer in the pixel portion. A color filter layer is formed, and a pixel thin film transistor and a connection electrode layer are formed on the color filter layer. A first electrode layer is formed on the first electrode layer, and an EL layer is formed on the EL layer. A second electrode layer is formed, and in the drive circuit section, a gate electrode of a thin film transistor for the drive circuit is formed. a conductive layer formed over the oxide insulating layer overlapping with the oxide semiconductor layer and the oxide insulating layer in the same process as the connection electrode layer; do.

[0031] Another embodiment of the method for manufacturing a light-emitting device of the present invention for realizing the above structure is a method for manufacturing a driving circuit portion and a light-emitting device of the present invention. A peeling layer is formed on a substrate having an insulating surface including a pixel portion, and the peeling layer is formed in a driver circuit portion. A thin film transistor for a driver circuit having an oxide semiconductor layer is formed on the substrate, and peeled off in a pixel portion. a pixel thin film transistor having an oxide semiconductor layer on the layer; A first electrode layer is formed to electrically connect to the thin film transistor for the driving circuit and the thin film transistor for the pixel. The film transistor and the first electrode layer are transferred from the formation substrate to the support substrate using a release layer. The first thin film transistor for the driver circuit and the second thin film transistor for the pixel are transferred to the support substrate. The first electrode layer is transferred onto a flexible substrate, and an EL layer is formed on the first electrode layer transferred onto the flexible substrate. A second electrode layer is formed on the EL layer.

[0032] Another embodiment of the method for manufacturing a light-emitting device of the present invention for realizing the above structure is a method for manufacturing a driving circuit portion and a light-emitting device of the present invention. A peeling layer is formed on a substrate having an insulating surface including a pixel portion, and the peeling layer is formed in a driver circuit portion. A thin film transistor for a driver circuit having an oxide semiconductor layer is formed on the substrate, and peeled off in a pixel portion. a pixel thin film transistor having an oxide semiconductor layer on the layer; A first electrode layer is formed to electrically connect to the thin film transistor for the driving circuit and the thin film transistor for the pixel. The film transistor and the first electrode layer are transferred from the formation substrate to the support substrate using a release layer. The first thin film transistor for the driver circuit and the second thin film transistor for the pixel are transferred to the support substrate. The first electrode layer is transferred onto a flexible substrate, and an EL layer is formed on the first electrode layer transferred onto the flexible substrate. a second electrode layer is formed on the EL layer, and a flexible metal substrate is provided on the second electrode layer; The driver circuit portion and the pixel portion are sealed with a flexible metal substrate.

[0033] In the photolithography process in the manufacturing process of the light-emitting device described above, the transmitted light A mask layer formed by a multi-tone mask, which is an exposure mask with multiple intensities, is used. An etching step may also be performed.

[0034] The mask layer formed using the multi-tone mask has a shape with multiple film thicknesses. By etching the surface, the shape can be further modified, allowing for different patterns to be created. Therefore, a single multi-tone mask can be used for multiple etching processes. Therefore, it is possible to form mask layers corresponding to at least two or more different patterns. This reduces the number of exposure masks and the corresponding photolithography process. This allows for a reduction in the number of steps, thereby simplifying the process.

[0035] The above configuration solves at least one of the above problems.

[0036] The oxide semiconductor used in this specification is, for example, InMO3(ZnO) m (m>0) A thin film is formed as shown in the figure, and a thin film transistor is fabricated using the thin film as an oxide semiconductor layer. Here, M is one metal element selected from Ga, Fe, Ni, Mn and Co, or It indicates multiple metal elements. For example, M can be Ga, Ga and Ni, or In some cases, the above metal elements other than Ga, such as Ga and Fe, may be contained. In addition to the metallic elements contained as M, Fe, Ni and other transition elements are also present as impurity elements. Some of them contain transition metal elements or oxides of the transition metals. , InMO3(ZnO) m Among the oxide semiconductor layers with a structure expressed as (m>0), M is The oxide semiconductor with a structure containing Ga is called an In-Ga-Zn-O oxide semiconductor. The film is also called an In-Ga-Zn-O based non-single crystal film.

[0037] In addition to the above, metal oxides that can be used for the oxide semiconductor layer include In-Sn-Zn-O In-Al-Zn-O system, Sn-Ga-Zn-O system, Al-Ga-Zn-O system, Sn -Al-Zn-O series, In-Zn-O series, Sn-Zn-O series, Al-Zn-O series, In- O-based, Sn-O-based, and Zn-O-based metal oxides can be used. The oxide semiconductor layer made of the material may contain silicon oxide.

[0038] The oxide semiconductor is preferably an oxide semiconductor containing In, more preferably an oxide semiconductor containing In and In order to make the oxide semiconductor layer i-type (intrinsic), dehydration is performed. It is effective to subject the product to a hydrogenation or dehydrogenation process.

[0039] Heat treatment is carried out under an inert gas atmosphere such as nitrogen or rare gas (argon, helium, etc.). In this case, the oxide semiconductor layer becomes oxygen-deficient by heat treatment, resulting in low resistance, that is, N-type ( N - Then, the oxide insulating film in contact with the oxide semiconductor layer is formed, and the oxide insulating film is processed after the formation. By performing heat treatment, the oxide semiconductor layer is made into an oxygen-excess state, which increases the resistance, i.e., I In addition, solid-phase oxidation is performed to place the oxide semiconductor layer in an oxygen-excess state. This allows us to obtain thin film transistors with good electrical characteristics and high reliability. It is possible to manufacture and provide a light-emitting device that can achieve this.

[0040] Dehydration or dehydrogenation is carried out using an inert gas such as nitrogen or a noble gas (argon, helium, etc.). Heat treatment in an atmosphere at 400°C or higher and 750°C or lower, preferably 420°C or higher and 570°C or lower This process reduces impurities such as moisture contained in the oxide semiconductor layer. O) can be prevented from re-impregnating.

[0041] The heat treatment for dehydration or dehydrogenation can be carried out in a nitrogen atmosphere with H2O of 20 ppm or less. It is also possible to carry out the treatment in ultra-dry air with an H2O concentration of 20 ppm or less.

[0042] The oxide semiconductor layer that has been dehydrated or dehydrogenated is Even when TDS measurements were performed on the body layer up to 450°C, two peaks of water were observed, and at least 300 The heat treatment conditions should be such that a single peak that appears around ℃ is not detected. Alternatively, a thin-film transistor using a dehydrogenated oxide semiconductor layer was found to have a TDS value of 4 Even when measurements are taken up to 50°C, the water peak that appears around 300°C is not detected.

[0043] The heating temperature T at which the oxide semiconductor layer is dehydrated or dehydrogenated is changed to the temperature at which the oxide semiconductor layer is dehydrated or dehydrogenated. The water or hydrogen is then reintroduced into the same furnace where the hydrogenation or dehydrogenation was performed, without exposing the material to the atmosphere. It is important that the oxide semiconductor layer is dehydrated or dehydrogenated to reduce its resistance, i.e., N-type (N - After that, a thin film is formed using an oxide semiconductor layer that has been made high-resistive and i-type. When a transistor is fabricated, the threshold voltage (Vth) of the thin film transistor is set to a positive value. This allows realization of a so-called normally-off switching element. The channel is formed when the gate voltage is as close to 0V as possible and the threshold voltage is a positive value. It is desirable for semiconductor devices (light emitting devices) that the threshold voltage of the thin film transistor is If the value is negative, current flows between the source and drain electrodes even when the gate voltage is 0V. In an active matrix display device, the circuit The electrical characteristics of the thin film transistors that make up the display are important, and these electrical characteristics determine the performance of the display device. Among the electrical characteristics of a thin film transistor, the threshold voltage is particularly important. Even if the field-effect mobility is high, the positive value of the threshold voltage is high, or the threshold voltage is negative. In addition, when the absolute value of the threshold voltage is large, it is difficult to control the circuit. In the case of a thin film transistor with a low driving voltage, it acts as a switch The N-channel thin-film transistor In the case of a transistor, a channel is formed only when a positive voltage is applied to the gate, and a drain current begins to flow. It is desirable that the channel is not formed unless the driving voltage is high, and also that the negative voltage The fact that a channel is formed and drain current flows even in this state is a problem for thin film transistors used in circuits. It is not suitable as a transistor.

[0044] In addition, the gas atmosphere used to lower the temperature from T is different from the gas atmosphere used to raise the temperature to T. It is also possible to switch to a gas atmosphere, for example, by switching to air in the same furnace where dehydration or dehydrogenation was performed. The furnace is filled with high-purity oxygen gas, N2O gas, or ultra-dry air (dew point Cooling is carried out by filling the container with a temperature of -40°C or less, preferably -60°C or less.

[0045] The moisture content in the film is reduced by heat treatment for dehydration or dehydrogenation, and then the film containing moisture is Cool slowly (or cool) in an atmosphere that is free from dew (dew point is -40°C or less, preferably -60°C or less). By using the oxide semiconductor film, the electrical characteristics of the thin film transistor can be improved and mass production can be achieved. This will realize thin-film transistors that are both reliable and high-performance.

[0046] In this specification, the method is carried out under an inert gas atmosphere of nitrogen or a rare gas (argon, helium, etc.). This heat treatment is called a heat treatment for dehydration or dehydrogenation. Dehydrogenation does not only mean that hydrogen is released as H2 by the hydrogenation process, but also means that hydrogen is released as H For convenience, this term is used to refer to the elimination of OH and other groups.

[0047] Heat treatment is carried out under an inert gas atmosphere such as nitrogen or rare gas (argon, helium, etc.). In this case, the oxide semiconductor layer becomes oxygen-deficient by heat treatment, resulting in low resistance, that is, N-type ( N - (e.g., converted into a new product)

[0048] In addition, the high resistance drain region (HRD) that is oxygen deficient and overlaps with the drain electrode layer is The source electrode (also called the resistance drain region) is also formed. The oxygen-deficient high-resistance source region (HRS) overlaps the layer. e Source region) is formed.

[0049] Specifically, the carrier concentration in the high-resistance drain region is 1×10 18 / cm 3 Within the above range and the carrier concentration in the channel formation region is at least 1×10 18 / cm 3 (less than) The carrier concentration in this specification is determined by Hall effect measurement at room temperature. This refers to the carrier concentration value measured.

[0050] Then, at least a part of the dehydrated or dehydrogenated oxide semiconductor layer is brought into an oxygen-excess state. By doing so, the resistance is further increased, that is, the I-type is formed, and a channel forming region is formed. The treatment for bringing the hydrated or dehydrogenated oxide semiconductor layer into an oxygen-excess state is as follows: forming an oxide insulating film in contact with the dehydrogenated or dehydrogenated oxide semiconductor layer by a sputtering method or by oxidation; Heat treatment after forming the insulating film, or heat treatment in an atmosphere containing oxygen, or in an inert gas atmosphere After heating in an oxygen atmosphere, the process is cooled in an ultra-dry air (dew point below -40°C, preferably This is preferably done by cooling to a temperature of -60°C or below.

[0051] In addition, at least a part of the dehydrated or dehydrogenated oxide semiconductor layer (a part overlapping with the gate electrode layer) is The part where the gate electrode is located is used as the channel formation region, so by selectively creating an oxygen-excess state, a high resistance The oxide semiconductor layer may be in contact with the dehydrated or dehydrogenated oxide semiconductor layer. The source electrode layer and the drain electrode layer are formed from metal electrodes such as Ti. The exposed area that does not overlap with the drain electrode layer is selectively made into an oxygen-excess state to form a channel forming area. When the oxygen-excess state is selectively created, the second layer overlapping the source electrode layer can be formed. A first high-resistance source region and a second high-resistance drain region overlapping the drain electrode layer are formed. The region between the first high-resistance source region and the second high-resistance drain region is a channel formation region. That is, the channel length of the channel formation region is equal to that of the source electrode layer and the drain electrode layer. Become self-consistent.

[0052] This allows the fabrication of a light-emitting device having a thin film transistor with good electrical characteristics and high reliability. , it becomes possible to provide.

[0053] Note that a high-resistance drain region is formed in the oxide semiconductor layer overlapping with the drain electrode layer. This makes it possible to improve the reliability of the drive circuit when it is formed. By forming a resistive drain region, the drain electrode layer, the high-resistive drain region, and the channel It is possible to form a structure in which the conductivity can be changed stepwise over the formation region. Therefore, when the drain electrode layer is connected to a wiring that supplies a high power supply potential VDD, Even if a high electric field is applied between the gate electrode layer and the drain electrode layer, the high resistance drain region acts as a buffer. This prevents a local high electric field from being applied, improving the breakdown voltage of the thin film transistor. It is possible.

[0054] In addition, in the oxide semiconductor layer overlapping with the drain electrode layer and the source electrode layer, By forming a drive circuit, a channel region and a high-resistance source region are formed. Specifically, the high resistance drain region can be formed by By forming the gate insulating film, the leakage current of the transistor flowing between the drain electrode layer and the source electrode layer can be reduced. The drain electrode layer, the high-resistance drain region on the drain electrode layer side, and the channel-type The order is the channel region, the high-resistance source region on the source electrode layer side, and the source electrode layer. In the drain formation region, the leakage current flows from the high-resistance drain region on the drain electrode layer side to the channel region. The gate insulating layer and the channel formation region have high resistance when the transistor is off. The back channel (channel away from the gate electrode layer) can be concentrated in the vicinity It is possible to reduce leakage current in the surface of the formation region.

[0055] In addition, a high-resistance source region overlapping the source electrode layer and a high-resistance drain region overlapping the drain electrode layer are formed. The gate region overlaps with a part of the gate electrode layer via the gate insulating layer, although this depends on the width of the gate electrode layer. As a result, the electric field strength in the vicinity of the end of the drain electrode layer can be more effectively alleviated.

[0056] In addition, an oxide conductive layer may be formed between the oxide semiconductor layer and the source electrode and the drain electrode. The oxide conductive layer preferably contains zinc oxide as a component, and more preferably contains indium oxide. For example, zinc oxide, zinc aluminum oxide, zinc oxynitride, Lead aluminum, zinc gallium oxide, or the like can be used. Drain region (LRN (Low Resistance N-type conduction ivity region and LRD (Low Resistance Drain) region. Specifically, the carrier concentration in the low-resistance drain region is The HRD region is larger than the HRD region, for example, 1×10 20 / cm 3 More than 1×10 21 / c m 3 The oxide conductive layer is preferably in the range of the oxide semiconductor layer and the source electrode. By providing the gate electrode between the source and drain electrodes, the contact resistance can be reduced, enabling high-speed operation of the transistor. This allows for improved frequency characteristics of peripheral circuits (drive circuits). .

[0057] The oxide conductive layer and the metal layer for forming the source and drain electrodes can be deposited consecutively. is.

[0058] The first wiring and the second wiring are formed by an oxide film that functions as an LRN or an LRD. The laminated wiring may be made of the same material as the conductive layer and a metal material. By stacking conductive layers, the coverage of steps such as overcoming lower layer wiring and openings is improved. This improves wiring resistance and reduces local wiring damage caused by migration. This is expected to have the effect of preventing excessive resistance and disconnection, making it possible to provide a highly reliable light-emitting device. can.

[0059] Furthermore, when the first wiring and the second wiring are connected as described above, the oxide conductive layer is sandwiched between them. By connecting the two electrodes, an insulating oxide is formed on the metal surface of the connection (contact part). This is expected to prevent an increase in contact resistance due to An optical device may be provided.

[0060] In addition, thin film transistors are easily damaged by static electricity, so the gate line or source A protection circuit for protecting the thin film transistors in the pixel area can be provided on the same substrate as the line. The protection circuit is preferably configured using a nonlinear element using an oxide semiconductor layer. It's nice.

[0061] The ordinal numbers such as 1st and 2nd are used for convenience and do not indicate the order of processes or stacking. Furthermore, the specific names used in this specification are not intended to identify the invention. This does not indicate [Effects of the Invention]

[0062] A light-emitting device using an oxide semiconductor layer and having a thin film transistor with excellent electrical characteristics and reliability is provided. It can be achieved. [Brief explanation of the drawings]

[0063] [Figure 1] 1A and 1B illustrate a light-emitting device. [Figure 2] 1A to 1C illustrate a method for manufacturing a light-emitting device. [Figure 3] 1A to 1C illustrate a method for manufacturing a light-emitting device. [Figure 4] 1A to 1C illustrate a method for manufacturing a light-emitting device. [Figure 5] 1A to 1C illustrate a method for manufacturing a light-emitting device. [Figure 6] 1A to 1C illustrate a method for manufacturing a light-emitting device. [Figure 7] 1A to 1C illustrate a method for manufacturing a light-emitting device. [Figure 8] 1A to 1C illustrate a method for manufacturing a light-emitting device. [Figure 9] 1A to 1C illustrate a method for manufacturing a light-emitting device. [Figure 10] 1A and 1B illustrate a light-emitting device. [Figure 11] 1A and 1B illustrate a light-emitting device. [Figure 12] FIG. 1 is a block diagram illustrating a light-emitting device. [Figure 13] FIG. 2 illustrates a configuration of a signal line driver circuit. [Figure 14] FIG. 1 is a circuit diagram showing a configuration of a shift register. [Figure 15] 1A and 1B are an equivalent circuit diagram of a shift register and a timing chart illustrating the operation of the shift register; [Figure 16] 1A and 1B illustrate a light-emitting device. [Figure 17] 1A to 1C illustrate a method for manufacturing a light-emitting device. [Figure 18] 1A to 1C illustrate a method for manufacturing a light-emitting device. [Figure 19] FIG. 1 is a diagram illustrating a pixel equivalent circuit of a light-emitting device. [Figure 20] 1A and 1B illustrate a light-emitting device. [Figure 21] 1A and 1B are diagrams illustrating light-emitting elements. [Figure 22] 1A and 1B illustrate a light-emitting device. [Figure 23] 1A and 1B are diagrams illustrating electronic devices. [Figure 24] 1A and 1B are diagrams illustrating electronic devices. [Figure 25] 1A and 1B are diagrams illustrating electronic devices. [Figure 26] 1A and 1B are diagrams illustrating electronic devices. [Figure 27] 1A and 1B illustrate a light-emitting device. [Figure 28] 1A to 1C illustrate a method for manufacturing a light-emitting device. [Figure 29] 1A to 1C illustrate a method for manufacturing a light-emitting device. [Figure 30] 1A to 1C illustrate a method for manufacturing a light-emitting device. DETAILED DESCRIPTION OF THE INVENTION

[0064] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. Those skilled in the art will recognize that various changes in form and details may be made without departing from the spirit and scope of the present invention. Therefore, the present invention should be interpreted as being limited to the following description of the embodiments. In the configuration described below, parts that have the same parts or similar functions are not included. The same reference numerals are used in common between different drawings for corresponding parts, and repeated explanations thereof will be omitted.

[0065] (Embodiment 1) A light-emitting device including a thin film transistor and its manufacturing process are shown in FIGS. This will be explained using:

[0066] A light-emitting device according to one embodiment of the present invention is shown in FIG. 1. The light-emitting device shown in FIG. 1 has a flexible substrate 100 a pixel portion including a light-emitting element, a thin film transistor 170, and a capacitor 147; 180, and a driving circuit section including a first terminal 121, a connection electrode 120, a terminal electrode 128 for connection, and a second A terminal 122 and a terminal electrode 129 for connection are provided. An oxide insulating layer 107 and a protective insulating layer 106 are formed on the thin film transistor 170. It is being done.

[0067] The light-emitting element is formed by laminating a first electrode layer 110, an EL layer 194, and a second electrode layer 195. The drain electrode layer of the thin film transistor 170 and the first electrode layer 110 are in contact with each other. By forming the thin film transistor 170, the thin film transistor 170 is electrically connected to the pixel portion. A color filter layer 191 is formed on the protective insulating layer 106. It is covered with an overcoat layer 192 and then covered with a protective insulating layer 109. The electrode layer 110 is formed on the protective insulating layer 109. In addition, the partition wall separating the light emitting elements 193 is formed on the thin film transistor 170 .

[0068] In the driving circuit section, the thin film transistor 180 has a conductive layer above the gate electrode layer and the semiconductor layer. The drain electrode layer 165b is a conductive layer formed in the same process as the gate electrode layer. It is in electrical contact with layer 162.

[0069] The flexible substrate 100 may be made of, for example, polyethylene terephthalate (PET), polyethylene terephthalate (PE), or polyethylene terephthalate (PE). Polyester resins such as phenyl naphthalate (PEN), polyacrylonitrile resin, polyimide resin, polymethyl methacrylate resin, polycarbonate resin (PC), polyether Sulfone resin (PES), polyamide resin, cycloolefin resin, polystyrene resin , polyamide-imide resin, polyvinyl chloride resin, etc. can be suitably used. A structure in which a fiber body is impregnated with an organic resin (so-called prepreg) may be used as the flexible substrate. stomach.

[0070] The light-emitting device shown in this embodiment is a bottom emission type in which light is extracted from the surface on the flexible substrate 100 side. Therefore, a substrate having light-transmitting properties is used as the flexible substrate 100. In the case of a top emission type in which light is emitted from the surface opposite to the surface of the flexible substrate 100, a non-transparent substrate is used. Alternatively, a metal substrate may be used which is thin enough to have sufficient flexibility. The material for the metal substrate is not particularly limited, but aluminum is Suitable metal alloys include aluminum, copper, nickel, aluminum alloys, and stainless steel. It can be used for.

[0071] The manufacturing method will be described in detail below with reference to Figures 2 to 5 and Figure 11. This corresponds to a cross-sectional view of the device.

[0072] A conductive layer is formed on the entire surface of a flexible substrate 100, which is a substrate having an insulating surface. After forming the resist pattern, a first photolithography process is performed to form a resist mask and then etching is performed. By removing unnecessary portions, wiring and electrodes (gate electrode layer 101, gate electrode layer 161, The conductive layer 162, the capacitor wiring layer 108, and the first terminal 121 are formed. As shown in the figure, when etching is performed so that the ends of the wiring and electrodes are tapered, the lamination The gate electrode layer 101 and the gate electrode layer 161 are preferably formed on the insulating film 161 so that the coverage of the insulating film 161 is improved. are included in the gate wiring.

[0073] There is no significant restriction on the flexible substrate that can be used for the flexible substrate 100 having an insulating surface. Although there is no limit, it is necessary that the material has at least heat resistance sufficient to withstand subsequent heat treatment. This becomes:

[0074] The insulating film that serves as the base film is formed on the flexible substrate 100, the gate electrode layer 101, the gate electrode layer 161, and the conductive film. The base film may be provided between the electrode layer 162, the capacitor wiring layer 108, and the first terminal 121. , which has the function of preventing the diffusion of impurity elements from the flexible substrate 100, and A laminated structure made of one or more films selected from a bare film, a silicon nitride oxide film, and a silicon oxynitride film. It can be formed by:

[0075] The gate electrode layer 101, the gate electrode layer 161, the conductive layer 162, the capacitor wiring layer 108, and the first The materials for terminal 121 are molybdenum, titanium, chromium, tantalum, tungsten, and aluminum. Metallic materials such as tungsten, copper, neodymium, scandium, etc., or alloy materials containing these as the main components. The film can be formed as a single layer or a laminate.

[0076] For example, the gate electrode layer 101, the gate electrode layer 161, the conductive layer 162, the capacitance wiring layer 108, The two-layer laminated structure of the first terminal 121 is a molybdenum layer laminated on an aluminum layer. Two-layer laminate structure with a molybdenum layer on a copper layer, two-layer laminate structure with a molybdenum layer on a copper layer, Two-layer laminated structure consisting of a titanium nitride layer or a tantalum nitride layer, and a molybdenum nitride layer on the titanium nitride layer. It is preferable to use a two-layer laminate structure in which a tongue layer is laminated. A tungsten layer or a tungsten nitride layer and an alloy of aluminum and silicon or aluminum It is preferable to use a structure in which a titanium alloy and a titanium nitride layer or a titanium layer are laminated.

[0077] Next, the gate electrode layer 101, the gate electrode layer 161, the conductive layer 162, the capacitance wiring layer 108, A gate insulating layer 102 is formed over the first terminal 121 (see FIG. 2A).

[0078] The gate insulating layer 102 is formed by depositing a silicon oxide layer using a plasma CVD method, a sputtering method, or the like. a silicon nitride layer, a silicon oxynitride layer, a silicon nitride oxide layer, or an aluminum oxide layer in a single layer or For example, SiH4, oxygen, and nitrogen are used as the deposition gas. A silicon oxynitride layer may be formed by plasma CVD. The thickness is 100 nm to 500 nm. In the case of a laminate, for example, the thickness is 50 nm to 2 a first gate insulating layer having a thickness of 500 nm or less and a second gate insulating layer having a thickness of 5 nm or more and 300 nm or less on the first gate insulating layer; The second gate insulating layer is laminated to a thickness of 1 m or less.

[0079] In this embodiment, the gate insulating layer 102 is formed by plasma CVD to a thickness of 200 nm or more. A bottom silicon oxide layer is formed.

[0080] Next, an oxide semiconductor film 13 having a thickness of 2 nm to 200 nm is formed on the gate insulating layer 102. 0 (see Figure 2(B)).

[0081] Before forming the oxide semiconductor film by a sputtering method, argon gas was introduced to form a plasma. Reverse sputtering is performed to generate a mask, and dust adhering to the surface of the gate insulating layer 102 is removed. Reverse sputtering is a method in which a target is sputtered in an argon atmosphere without applying a voltage to the target. A voltage is applied to the substrate side using an RF power supply under atmospheric pressure, forming plasma near the substrate and modifying the surface. It is to be noted that nitrogen, helium, or the like may be used in place of the argon atmosphere. Alternatively, the treatment may be carried out in an argon atmosphere to which oxygen, N2O, etc. has been added. It may be performed in an atmosphere containing Cl2, CF4, etc.

[0082] The oxide semiconductor film 130 is an In—Ga—Zn—O based non-single crystal film, an In—Sn—Zn—O based , In-Al-Zn-O system, Sn-Ga-Zn-O system, Al-Ga-Zn-O system, Sn- Al-Zn-O series, In-Zn-O series, Sn-Zn-O series, Al-Zn-O series, In-O In this embodiment, an In-Ga-based, Sn-O-based, or Zn-O-based oxide semiconductor film is used. -The film is formed by sputtering using a Zn-O-based oxide semiconductor target. The semiconductor film 130 is heated under a rare gas (typically argon) atmosphere, an oxygen atmosphere, or a rare gas atmosphere. It can be formed by sputtering in an atmosphere of oxygen (typically argon). In addition, when using the sputtering method, a target containing SiO2 in an amount of 2% by weight or more and 10% by weight or less is used. The oxide semiconductor film 130 is formed using a film forming agent, and a SiOx (x>0) that inhibits crystallization is formed on the oxide semiconductor film 130. This causes crystallization during the heat treatment for dehydration or dehydrogenation in the subsequent process. It is preferable to inhibit caries.

[0083] Here, an oxide semiconductor target containing In, Ga, and Zn (In2O3:Ga2O 3:ZnO=1:1:1[mol%], In:Ga:Zn=1:1:0.5[atom% ]) was used, the distance between the substrate and the target was 100 mm, the pressure was 0.2 Pa, and the DC (D C) Power supply 0.5 kW, argon and oxygen (argon:oxygen = 30 sccm:20 sccm The film is formed in an atmosphere with a flow rate of 40% (oxygen flow rate ratio of 40%). This is preferable because it reduces dust and makes the film thickness distribution uniform. The thickness of the crystal film is set to 5 nm to 200 nm. Then, a 3 mm thick film was formed by sputtering using an In-Ga-Zn-O oxide semiconductor target. A 0 nm thick In-Ga-Zn-O based non-single crystal film was formed. As an oxide semiconductor target containing In:Ga:Zn=1:1:1 [atom %], A target having a composition ratio of In:Ga:Zn=1:1:2 [atom %] was used. It can also be done as follows.

[0084] The sputtering method uses RF sputtering, which uses a high frequency power supply, and DC sputtering. There is the DC sputtering method, and there is also the pulsed DC sputtering method, which applies a pulsed bias. RF sputtering is mainly used to deposit insulating films, while DC sputtering is mainly used to deposit metal films. It is used when forming a film.

[0085] There are also multi-target sputtering devices that can accommodate multiple targets of different materials. The equipment can deposit layers of different materials in the same chamber, or multiple types of materials in the same chamber. It is also possible to simultaneously discharge and deposit the same materials.

[0086] Also, a sputtering apparatus using a magnetron sputtering method equipped with a magnet mechanism inside the chamber and ECR sputtering using plasma generated by microwaves without glow discharge. There are sputtering devices that use this method.

[0087] In addition, in the film formation method using the sputtering method, the target material and the sputtering gas component are mixed during film formation. Reactive sputtering is used to form thin films of these compounds by chemically reacting them with each other. There is also a bias sputtering method in which a voltage is also applied to the substrate.

[0088] Next, a second photolithography process is performed on the oxide semiconductor film 130, and a resist mask 137 is formed, and the oxide semiconductor film 130 and the gate insulating layer 102 are removed by etching. A contact hole reaching the first terminal 121 is formed in the gate insulating layer 102 by removing the necessary portion. 119 and a contact hole 123 reaching the conductive layer 162 (see FIG. 2(C)). ).

[0089] In this way, in a state where the oxide semiconductor film 130 is laminated on the entire surface of the gate insulating layer 102, When a step of forming a contact hole in the insulating layer 102 is performed, a laser is formed on the surface of the gate insulating layer 102. Since the resist mask does not come into direct contact with the gate insulating layer 102, contamination (such as adhesion of impurities) on the surface of the gate insulating layer 102 is prevented. ) can be prevented. This improves the condition of the device, leading to improved reliability.

[0090] A resist pattern may be formed directly on the gate insulating layer to open the contact holes. In that case, after the resist is removed, a heat treatment is performed to dehydrate the surface of the gate insulating film. It is preferable to carry out the dehydrogenation treatment in an inert gas atmosphere (nitrogen or helium). Heat treatment (400℃ to 750℃) in an oxygen atmosphere (e.g., fluorine, neon, argon, etc.) (below) to remove impurities such as hydrogen and water contained in the gate insulating layer.

[0091] Next, the resist mask 137 is removed, and the oxide semiconductor film 130 is subjected to a third photolithography. The resist masks 135a and 135b formed in the etching process are used to etch the islands. The oxide semiconductor layers 131 and 132 are formed in an island shape (see FIG. 3A). Resist masks 135a and 135b for forming the compound semiconductor layer are formed by an inkjet method. If the resist mask is formed by an inkjet method, a photomask is not required. Therefore, the manufacturing cost can be reduced.

[0092] Next, the oxide semiconductor layers 131 and 132 are dehydrated or dehydrogenated. Hydrogenated oxide semiconductor layers 133 and 134 are formed (see FIG. 3B). The temperature of the first heat treatment for hydrogenation or dehydrogenation is 400°C or higher and 750°C or lower, preferably 4 If the temperature is 425°C or higher, the heat treatment time can be 1 hour or less. If the temperature is below 25°C, the heat treatment time should be longer than 1 hour. The substrate is placed in an electric furnace, which is a type of heat treatment apparatus, and the oxide semiconductor layer is heated under a nitrogen atmosphere. After the heat treatment, the oxide semiconductor layer was remixed with water and hydrogen without being exposed to the air. In this embodiment, the oxide semiconductor layer is obtained by dehydrating or desorbing the oxide semiconductor layer. Using the same furnace, heat the material from the heating temperature T for hydrogenation to a temperature high enough to prevent water from entering again. Specifically, the temperature is gradually cooled in a nitrogen atmosphere until it drops by 100°C or more below the heating temperature T. The atmosphere is not limited, and dehydration can be performed under rare gas atmospheres such as helium, neon, and argon. Or dehydrogenation is carried out.

[0093] The oxide semiconductor layer is subjected to heat treatment at a temperature of 400 to 700°C. This process dehydrates and dehydrogenates the material, preventing subsequent re-impregnation with water (H2O).

[0094] The heat treatment device is not limited to an electric furnace, and may be, for example, a GRTA (Gas Rapid Th thermal annealing) equipment, LRTA (Lamp Rapid Thermal) Use an RTA (Rapid Thermal Anneal) device such as an LRTA devices can be used with halogen lamps, metal halide lamps, and xenon lamps. Arc lamps, carbon arc lamps, high-pressure sodium lamps, high-pressure mercury lamps, etc. It is a device that heats the object to be treated by radiating light (electromagnetic waves) emitted from a lamp. Heat is generated by heat conduction or heat radiation from heating elements such as TA devices, lamps, and resistance heating elements. The GRTA is a device that uses high-temperature gas to heat the object to be treated. The gas used is a rare gas such as argon or nitrogen, which is suitable for heating. The RTA method uses an inert gas that does not react with the material being treated. Heat treatment may be performed at up to 750°C for several minutes.

[0095] In the first heat treatment, nitrogen or a rare gas such as helium, neon, or argon is used. It is preferable that the oxide semiconductor layer does not contain water, hydrogen, or the like. The dehydration and dehydrogenation heat treatment is carried out at temperatures up to 750°C in a nitrogen atmosphere containing 20 ppm or less of H2O. It is preferable to carry out the treatment in an atmosphere. Alternatively, the nitrogen, helium, or neodymium introduced into the heat treatment device may be used. The purity of rare gases such as argon and argon should be 6N (99.9999%) or higher, preferably 7N ( 99.99999%) or more (i.e., impurity concentration is 1 ppm or less, preferably 0.1 ppm) It is preferable to use the following.

[0096] Depending on the conditions of the first heat treatment or the material of the oxide semiconductor layer, the oxide semiconductor layer may be crystallized and microcrystalline. For example, the crystallinity may be 90% or more, or 80% or more. In some cases, the oxide semiconductor film may be a microcrystalline oxide semiconductor film. Depending on the material of the oxide semiconductor film, it may become an amorphous oxide semiconductor film that does not contain crystalline components. In addition, there are also microcrystalline parts (grain size 1 nm to 20 nm (typically Generally, the oxide semiconductor film may have a thickness of 2 nm to 4 nm. When high-temperature heat treatment is performed using RTA (GRTA, LRTA), the surface of the oxide semiconductor film Needle-like crystals may also appear on the side in the vertical direction (thickness direction).

[0097] The first heat treatment of the oxide semiconductor layer is performed to process the oxide semiconductor layers into island-shaped oxide semiconductor layers 131 and 132. In that case, the oxide semiconductor film 130 may be subjected to the first heat treatment. The substrate is then removed from the heating device and subjected to a photolithography process.

[0098] The heat treatment for dehydration and dehydrogenation of the oxide semiconductor layer is carried out after the oxide semiconductor layer is formed. After the source electrode and the drain electrode are laminated on the semiconductor layer, After forming a passivation film thereon, the step of forming the insulating film may be carried out.

[0099] Also, contact holes 123 and 119 are formed in the gate insulating layer 102 as shown in FIG. 2(C). The step of forming the oxide semiconductor film 130 is performed after the oxide semiconductor film 130 is subjected to dehydration or dehydrogenation treatment. Good too.

[0100] Note that the etching of the oxide semiconductor film here is not limited to wet etching, but may be dry etching. Etching may also be used.

[0101] The etching gas used in dry etching is a gas containing chlorine (chlorine-based gas, for example For example, chlorine (Cl2), boron chloride (BCl3), silicon chloride (SiCl4), carbon tetrachloride (CC l4) etc.) are preferred.

[0102] In addition, gases containing fluorine (fluorine-based gases, such as carbon tetrafluoride (CF4) and sulfur fluoride (SF 6), nitrogen fluoride (NF3), trifluoromethane (CHF3), etc.), hydrogen bromide (HBr ), oxygen (O2), and rare gases such as helium (He) and argon (Ar) Additive gases, etc. can be used.

[0103] As a dry etching method, parallel plate type RIE (Reactive Ion Etch) ing) method and ICP (Inductively Coupled Plasma) A combined plasma etching method can be used. It is possible to etch into the desired processed shape. The etching conditions (the amount of power applied to the coil-type electrode, the amount of power applied to the electrode on the substrate side) were determined as follows: The amount of power used, the temperature of the electrode on the substrate, etc. are adjusted appropriately.

[0104] The etching solution used for wet etching is a mixture of phosphoric acid, acetic acid, and nitric acid. Alternatively, ITO07N (manufactured by Kanto Chemical Co., Ltd.) may be used.

[0105] In addition, after wet etching, the etching solution is washed away together with the etched material. The waste etching solution containing the removed material is purified to remove the contained material. The indium and the like contained in the oxide semiconductor layer may be recycled from the waste liquid after etching. By recovering and reusing materials, resources can be used more effectively and costs can be reduced. .

[0106] The etching conditions (etching) are adjusted to suit the material so that the desired processing shape can be etched. The etching conditions (liquid, etching time, temperature, etc.) are adjusted appropriately.

[0107] Next, a metal conductive film made of a metal material is formed on the oxide semiconductor layers 133 and 134 by sputtering or a vacuum deposition method. It is formed by vacuum evaporation.

[0108] The material of the metal conductive film is an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W. Alternatively, alloys containing the above elements or alloy films of a combination of the above elements may be used. The metal conductive film may have a single layer structure or a laminated structure of two or more layers. , a single layer structure of aluminum film containing silicon, a titanium film laminated on an aluminum film Two-layer structure: Ti film, and aluminum film is laminated on top of the Ti film, and then Examples include a three-layer structure with a titanium film formed on aluminum (Al). (Ti), Tantalum (Ta), Tungsten (W), Molybdenum (Mo), Chromium (Cr ), neodymium (Nd), scandium (Sc) A mixed film, an alloy film, or a nitride film may also be used.

[0109] When heat treatment is performed after forming the metal conductive film, the metal conductive film must have heat resistance to withstand this heat treatment. It is preferable to make it

[0110] Next, a fourth photolithography step is performed to form resist masks 136a, 136b, and 136c. 6c, 136d, 136e, 136f, and 136g are formed, and the metal conductive film is etched. The unnecessary portions are removed to form the source electrode layer 105a, the drain electrode layer 105b, and the source electrode layer 105c. 165a, the drain electrode layer 165b, the capacitance electrode layer 149, the connection electrode 120, and the second terminal A child 122 is formed (see FIG. 3(C)).

[0111] Note that the oxide semiconductor layers 133 and 134 are removed when the metal conductive film is etched. The materials and etching conditions are adjusted accordingly.

[0112] In this embodiment, a Ti film is used as the metal conductive film, and the oxide semiconductor layers 133 and 134 are In this study, an In-Ga-Zn-O oxide was used, and ammonia hydrogen peroxide (ammonia hydrogen peroxide) was used as an etchant. A mixture of nia, water, and hydrogen peroxide is used.

[0113] In this fourth photolithography step, the source electrode layers 105a and 165a and the drain electrode layers 105b and 165c are formed. The connecting electrode 120 and the second terminal 122 are made of the same material as the conductive electrode layers 105b and 165b. The second terminal 122 is formed on the source wiring (the source electrode layer 105a , 165a) and the connection electrode 120. The contact hole 119 is formed in contact with the first terminal 121 and electrically connected.

[0114] Note that resist masks 136a and 136b for forming the source and drain electrode layers are 6b, 136c, 136d, 136e, 136f, and 136g are formed by the inkjet method. If the resist mask is formed by the inkjet method, a photomask is not required. This reduces manufacturing costs.

[0115] Next, resist masks 136a, 136b, 136c, 136d, 136e, 136f, 136g is removed, and the oxide insulating film 136g is removed to form a protective insulating film in contact with the oxide semiconductor layers 133 and 134. A film 107 is formed.

[0116] At this stage, regions of the oxide semiconductor layers 133 and 134 that are in contact with the oxide insulating film are formed. In this region, a region overlapping with the oxide insulating film 107 via the gate electrode layer and the gate insulating layer This is the channel forming region.

[0117] The oxide insulating film 107 has a thickness of at least 1 nm and is formed by an oxide method such as a sputtering method. The insulating film 107 can be formed by using an appropriate method that does not allow impurities such as water and hydrogen to be mixed in. In this embodiment, a silicon oxide film having a thickness of 300 nm is used as the oxide insulating film 107. The substrate temperature during film formation should be between room temperature and 300°C. In this embodiment, the temperature is set to room temperature. (typically argon) atmosphere, oxygen atmosphere, or rare gas (typically argon) atmosphere The process can be carried out under an oxygen atmosphere. For example, a silicon target can be used to produce oxygen. Silicon oxide can be formed by sputtering in a nitrogen atmosphere. The oxide insulating film formed in contact with the oxide semiconductor layer is resistant to moisture, hydrogen ions, and OH - It does not contain impurities such as these, and uses an inorganic insulating film that blocks them from entering from the outside. Typically, a silicon oxide film, a silicon nitride oxide film, an aluminum oxide film, or an aluminum oxynitride film Ninium, etc. are used.

[0118] Next, a second heat treatment (preferably 2) is carried out under an inert gas atmosphere or a nitrogen gas atmosphere. For example, the temperature is increased by heating in a nitrogen atmosphere. The second heat treatment is carried out at 250°C for 1 hour under atmospheric pressure. The oxide semiconductor layers 133 and 134 are in contact with the oxide insulating film 107. It is heated in this state.

[0119] Through the above steps, the oxide semiconductor layer after film formation is dehydrated or dehydrogenated. After the heat treatment for reducing the resistance, a part of the oxide semiconductor layer is selectively treated with an oxygen-excess This is the state.

[0120] As a result, a channel formation region overlapping with the gate electrode layer 161 in the oxide semiconductor layer 133 is formed. The region 166 is I-shaped and includes a high-resistance source region 167a overlapping the source electrode layer 165a, The high-resistance drain region 167b overlapping the drain electrode layer 165b is formed in a self-aligned manner. Similarly, in the oxide semiconductor layer 134, the gate The channel forming region 116 overlapping with the electrode layer 101 is I-shaped, and the source electrode layer 105a The high-resistance source region 117a overlaps the drain electrode layer 105b. The region 117b is formed in a self-aligned manner, and the oxide semiconductor layer 103 is formed.

[0121] Note that the drain electrode layers 105b and 165b (and the source electrode layers 105a and 165a) overlap. In the folded oxide semiconductor layers 103 and 163, high-resistance drain regions 117b and 167b ( Alternatively, by forming high resistance source regions 117a, 167a, The reliability can be improved. Specifically, the high-resistance drain regions 117b and 167b By forming the drain electrode layers 105b and 165b, the high resistance drain region 117b , 167b, the conductivity can be changed stepwise from the channel forming region 116 to the channel forming region 166. Therefore, the drain electrode layers 105b and 165b can be provided with a high voltage. When the gate electrode layers 101 and 161 are connected to a wiring that supplies a potential VDD, the gate electrode layers 101 and 161 are connected to a wiring that supplies a potential VDD. Even if a high electric field is applied between the drain electrode layers 105b and 165b, the high resistance drain region is This buffer prevents localized high electric fields from being applied, improving the breakdown voltage of the transistor. It is possible.

[0122] In addition, the drain electrode layers 105b and 165b (and the source electrode layers 105a and 165a) overlap. In the folded oxide semiconductor layer, the high-resistance drain region 117b, 167b (or high-resistance source region) By forming the channel regions 117a and 167a, the channel region 117a is formed. This allows for a reduction in leakage current in the regions 116 and 166.

[0123] In this embodiment, a silicon oxide film is formed as the oxide insulating film 107 by a sputtering method. After this, a heat treatment is performed at 250 to 350°C to remove the oxide between the source and drain regions. Oxygen is impregnated and diffused into the oxide semiconductor layer from the exposed portion of the compound semiconductor layer (channel formation region). By forming a silicon oxide film by sputtering, excess acid in the silicon oxide film is eliminated. The oxygen can be impregnated and diffused into the oxide semiconductor layer by heat treatment. The channel region can be made highly resistive by the impregnation and diffusion of oxygen into the oxide semiconductor layer. This allows for the creation of a normally-off thin film transistor. can be obtained.

[0124] The high-resistance source region or the high-resistance drain region in the oxide semiconductor layer is preferably formed of an oxide semiconductor. When the oxide layer is thin, 15 nm or less, it is formed throughout the entire thickness direction. When the thickness of the conductor layer is thicker, between 30 nm and 50 nm, a part of the oxide semiconductor layer, The resistance of the region in contact with the source electrode layer or the drain electrode layer and its vicinity is reduced, forming a high-resistance source region. Alternatively, a high-resistance drain region is formed, and the region of the oxide semiconductor layer close to the gate insulating film is It can also be type I.

[0125] Furthermore, heat treatment is carried out in the atmosphere at 100°C to 200°C for 1 hour to 30 hours. In this embodiment, heat treatment is performed at 150° C. for 10 hours. The heating temperature may be maintained, or the temperature may be increased from room temperature to 100°C or more and 200°C or less. The heating to the heating temperature and the cooling from the heating temperature to room temperature may be repeated several times. The heat treatment may be performed under reduced pressure before the oxide insulating film is formed. By this heat treatment, the oxide semiconductor layer can be freed from the oxide film. Hydrogen is taken into the oxide insulating layer, and a normally-off thin film transistor can be obtained. This makes it possible to improve the reliability of the semiconductor device.

[0126] A protective insulating layer may be further formed over the oxide insulating film 107. For example, The RF sputtering method is suitable for mass production, so it is used to form a protective insulating layer. This is a preferred method. The protective insulating layer is resistant to moisture, hydrogen ions, and OH - Contains impurities such as First, inorganic insulating films are used to block these substances from entering from the outside, and silicon nitride films and nitride films are used. An aluminum film, a silicon nitride oxide film, an aluminum oxynitride film, or the like is used. In this case, a protective insulating layer 106 is formed using a silicon nitride film as a protective insulating layer (see FIG. 4(A)). (see).

[0127] By the above steps, the thin film transistor 180 is formed in the driver circuit section and the thin film transistor 180 is formed in the pixel section on the same substrate. The thin film transistor 170 and the capacitor 147 can be fabricated on the thin film transistor 17. 0, 180 are oxides including a high-resistance source region, a high-resistance drain region, and a channel forming region. The thin film transistor is a bottom-gate type thin film transistor including a nitride semiconductor layer. 170, 180 are high-resistance drain regions or high-resistance source regions even when a high electric field is applied. This acts as a buffer, preventing localized high electric fields from being applied, improving the breakdown voltage of the transistor. It is.

[0128] The capacitor 147 is formed by connecting the gate insulating layer 102 in the capacitor section as a dielectric and the capacitor wiring layer 108. The capacitor electrode layer 149 is formed.

[0129] By forming the driver circuit and the pixel section on the same substrate, the connection wiring between the driver circuit and external signals can be The wires can be shortened, and the light emitting device can be made smaller and less expensive.

[0130] Next, a color filter layer 191 is formed on the protective insulating layer 106. For example, green color filter layer, blue color filter layer, red color filter layer, etc. A green color filter layer, a blue color filter layer, a red color filter layer, and a Each color filter layer is formed by a printing method, an inkjet method, a photolithography method, etc. The color filter layer is formed by etching using lithography technology. By doing so, the color filter layer and the light emitting layer can be attached without depending on the accuracy of the lamination of the sealing substrate. In this embodiment, the fifth, sixth, and seventh optical elements can be aligned with the light-emitting regions of the optical elements. 7. Perform the photolithography process to form the green color filter layer, the blue color filter layer, and the A red color filter layer is formed.

[0131] Next, a color filter layer (a green color filter layer, a blue color filter layer, and a red color filter layer) is formed. An overcoat layer 192 is formed to cover the color filter layer (color filter layer). The resin 92 has a light-transmitting property. In this embodiment, the eighth photolithography step is performed. This is performed to form an overcoat layer 192.

[0132] Here, an example of full color display using three colors of RGB is shown, but there is no particular limitation. A full color display may be performed using the four colors of BW.

[0133] Next, the protective insulating layer 109 is formed to cover the overcoat layer 192 and the protective insulating layer 106. The protective insulating layer 109 is made of an inorganic insulating film, such as a silicon nitride film or an aluminum nitride film. A protective insulating layer 109 and a silicon nitride oxide film, an aluminum nitride film, an aluminum oxynitride film, or the like are used. If the insulating film has the same composition as the protective insulating layer 106, the insulating film will be thin when a contact hole is formed later. This is preferable because etching can be performed in a single step.

[0134] Next, a ninth photolithography step is performed to form a resist mask, and an oxide insulating film 1 07, the protective insulating layer 106 and the protective insulating layer 109 are etched to form the drain electrode layer 105 A contact hole 125 reaching b is formed, and the resist mask is removed (see FIG. 5(A)). Also, by this etching, a contact hole 122 reaching the second terminal 122 is formed. 7. A contact hole 126 reaching the connection electrode 120 is also formed. A resist mask for forming the hole may be formed by an ink-jet method. When the mask is formed using the inkjet method, no photomask is required, reducing manufacturing costs. can.

[0135] Next, a light-transmitting conductive film is formed. Indium (In2O3) and indium oxide tin oxide alloy (In2O3-SnO2, IT The transparent conductive film (abbreviated as O) is formed by sputtering or vacuum deposition. As another material for the conductive film, a nitrogen-containing Al-Zn-O-based non-single crystal film, i.e., Al-Zn- Zn-O based non-single crystal film containing nitrogen, Sn- A Zn-O based non-single crystal film may also be used. The composition ratio (atomic %) is set to 47 atomic % or less, and the composition ratio (atomic %) of aluminum in the non-single crystal film is set to %), and the composition ratio (atomic %) of aluminum in the non-single crystal film is larger than that of nitrogen in the non-single crystal film. The composition ratio (atomic percentage) of the element is larger than that of the element. Etching of such materials is performed using a hydrochloric acid solution. However, since ITO etching is particularly prone to leaving residue, To improve this, an indium oxide-zinc oxide alloy (In2O3-ZnO) may be used.

[0136] The composition ratio of the light-transmitting conductive film is expressed in atomic percent, and is measured by an electron probe microanalyzer. (EPMA:Electron Probe X-ray MicroAnalyzer ) will be evaluated by analysis.

[0137] Next, a tenth photolithography process is performed to form a resist mask and apply etching. The unnecessary portions of the conductive film having a higher light-transmitting property are removed to form the first electrode layer 110, the conductive layer 111, Terminal electrodes 128 and 129 are formed, and the resist mask is removed.

[0138] The gate insulating layer 102 is a dielectric, and the capacitor formed by the capacitor wiring layer 108 and the capacitor electrode layer 149 is The capacitor 147 can also be formed on the same substrate. 49 is a part of the power supply line, and the capacitance wiring layer 108 is a part of the gate electrode layer of the driving TFT. It is a department.

[0139] Terminal electrodes 128 and 129 formed on the terminal portion are electrodes or wiring used for connection with an FPC. The terminal electrode 128 formed on the first terminal 121 via the connection electrode 120 is The second terminal 122 is a terminal electrode for connection that functions as an input terminal of the gate wiring. The formed terminal electrode 129 is a connection terminal electrode that functions as an input terminal of the source wiring. do.

[0140] 11(A1) and 11(A2) are top views of the gate wiring terminal portion at this stage. The cross-sectional views are shown in Fig. 11(A1) and Fig. 11(A2) along the line C1-C2. In FIG. 11(A1), a conductive film formed on the oxide insulating film 107 is The conductive film 155 is a terminal electrode for connection that functions as an input terminal. In the terminal portion, a first terminal 151 made of the same material as the gate wiring and a source The connection electrode 153 made of the same material as the wiring is directly overlapped with the gate insulating layer 102. The connection electrode 153 and the conductive film 155 are provided on the oxide insulating film 107. The electrodes are directly connected to each other through the contact holes provided therein for electrical continuity.

[0141] 11(B1) and 11(B2) are a top view and a cross-sectional view of a source wiring terminal portion. Also, FIG. 11(B1) is taken along the line D1-D2 in FIG. 11(B2). 11B1 corresponds to a cross-sectional view of the conductive film formed over the oxide insulating film 107. The film 155 is a terminal electrode for connection that functions as an input terminal. In the terminal portion, an electrode 156 made of the same material as the gate wiring is connected to the source wiring. The electrode 1 overlaps the second terminal 150, which is electrically connected to the electrode 1, via the gate insulating layer 102. 56 is not electrically connected to the second terminal 150, and the electrode 156 is connected to the second terminal 150. If you set it to a different potential, such as floating, GND, or 0V, you can reduce noise. A capacitance for preventing static electricity or a capacitance for preventing static electricity can be formed. is electrically connected to the conductive film 155 through the oxide insulating film 107.

[0142] A plurality of gate wirings, source wirings, and capacitance wirings are provided depending on the pixel density. In addition, in the terminal section, a first terminal has the same potential as the gate wiring, a second terminal has the same potential as the source wiring, and The second terminal, the third terminal at the same potential as the capacitance wiring, and so on are arranged in a row. The number of terminals may be any number and may be determined appropriately by the implementer.

[0143] The pixel section is made up of thin-film transistors and storage capacitors arranged in a matrix corresponding to each pixel. This can be used as one of the substrates for manufacturing an active matrix display device. For convenience, this type of substrate is referred to as an active matrix substrate in this specification.

[0144] The conductive layer 111 is provided in a position overlapping with the channel formation region 166 of the oxide semiconductor layer. Therefore, a bias-thermal stress test (hereinafter referred to as BT) is conducted to check the reliability of thin film transistors. In the test, the threshold voltage of the thin film transistor 180 before and after the BT test was In addition, the conductive layer 111 has a potential that is the same as that of the gate electrode layer 161. It may be the same as or different from the first gate electrode layer and may also function as a second gate electrode layer. The potential of the conductive layer 111 may be GND, 0V, or may be in a floating state. .

[0145] Next, a partition wall 193 is formed so as to cover the periphery of the first electrode layer 110. The partition wall 193 is , polyimide, acrylic, polyamide, epoxy or other organic resin film, inorganic insulating film or white It is formed using xanthane resin.

[0146] Siloxane-based resin is a Si-OS compound formed using siloxane-based materials as starting materials. The siloxane resin corresponds to a resin containing an i bond. Alternatively, an organic group having a fluoro group may be used. That's fine.

[0147] The partition wall 193 may be made of PSG (phosphorus glass), BPSG (borophosphorus glass), or the like. In addition, by laminating a plurality of insulating films made of these materials, the partition wall 1 can be formed. 93 may be formed.

[0148] The method for forming the partition wall 193 is not particularly limited, and may be a sputtering method, an SOG method, a sintered glass (SOG) method, or the like, depending on the material. Pin coating, dip coating, spray coating, droplet ejection method (inkjet method, screen printing , offset printing, etc.), doctor knife, roll coater, curtain coater, knife Further, as another insulating layer used in the light emitting device, the partition wall 193 The materials and methods given above as examples may be used.

[0149] The partition wall 193 is made of a photosensitive resin material, and an opening is formed on the first electrode layer 110. The sidewall of the opening is preferably formed as an inclined surface having a continuous curvature. When a photosensitive resin material is used for the partition wall 193, the process of forming a resist mask can be omitted. In this embodiment, an eleventh photolithography step is performed to form the partition wall 1. Form 93.

[0150] An EL layer 194 is formed on the first electrode layer 110, and a second electrode layer 195 is formed on the EL layer 194. The second electrode layer 195 is electrically connected to a common potential line. The second electrode layer 195 can be made of various materials, but a material with a small work function is preferred. For example, specifically, alkali metals such as Li and Cs, and aluminum metals such as Mg, Ca, and Sr. Potassium earth metals and alloys containing them (Mg:Ag, Al:Li, etc.), as well as Yb and E In this embodiment, the second electrode layer 195 is preferably made of aluminum. A membrane is used.

[0151] In this way, 11 photolithography processes were carried out using 11 photomasks to create a thin film. A driving circuit section having a thin film transistor 180, a thin film transistor 170, and a light emitting element 1, which has a pixel portion, a capacitor 147 having a storage capacitor, and an external extraction terminal portion. The light-emitting device of this embodiment mode can be manufactured.

[0152] In this embodiment, the oxide insulating film 107, the protective insulating layer 106, and the protective insulating layer 10 9 in a single photolithography process. Alternatively, the process may be divided into a plurality of photolithography steps using different photomasks. The oxide insulating film 107 and the protective insulating layer 106, which will be the interlayer insulating layer, are first subjected to a fifth photolithography. A contact hole is formed by a photolithography process, and then the sixth to ninth photolithography processes are carried out. Therefore, after forming the RGB color filter layer and the overcoat layer, the 10th filter layer is formed. Even if a contact hole is formed in the protective insulating layer 109 by a photolithography process, In this case, the number of photolithography steps and photomasks increases by one, and the number of photolithography steps and photomasks increases by one. The fabrication involves 12 photolithography steps and 12 photomasks.

[0153] In the photolithography process described above, the transmitted light has a plurality of intensities. The etching step may be performed using a mask layer formed by a multi-tone mask. stomach.

[0154] The mask layer formed using the multi-tone mask has a shape with multiple film thicknesses. The shape can be further modified by etching, creating different patterns. Therefore, it can be used for multiple etching processes. Thus, it is possible to form mask layers corresponding to at least two different patterns. This reduces the number of exposure masks and the corresponding photolithography process. This allows for simplification of the process.

[0155] In addition, when manufacturing a light emitting device, a power supply electrically connected to the source electrode layer of the driving TFT is A power supply line is provided, and the power supply line intersects with the gate line and the source line, and The gate electrode layer is formed using the same material and process as the gate electrode layer.

[0156] In addition, when a light emitting device is manufactured, one electrode of the light emitting element is the drain electrode layer of the driving TFT. and a common potential line electrically connected to the other electrode of the light-emitting element. The common potential line can be formed using the same material and process as the gate electrode layer. .

[0157] In addition, when a light-emitting device is manufactured, one pixel has a plurality of thin film transistors. A connection portion is provided to connect the gate electrode layer of the membrane transistor to the other drain electrode layer. can be.

[0158] By forming the thin film transistor using an oxide semiconductor, the manufacturing cost can be reduced. In particular, the oxide insulating film formed in contact with the oxide semiconductor layer by the above method can be By doing so, it is possible to manufacture and provide a thin film transistor having stable electrical characteristics. Therefore, a light emitting device having a thin film transistor with good electrical characteristics and high reliability can be provided. It is possible.

[0159] Since the semiconductor layer in the channel formation region is a high resistance region, the electrical characteristics of the thin film transistor are This stabilizes the device and prevents an increase in off-state current. This results in good electrical characteristics and reliability. This makes it possible to provide a light-emitting device having a thin film transistor with good performance.

[0160] In addition, thin film transistors are easily damaged by static electricity, etc. The protection circuit is preferably provided over the same substrate as the gate insulating film. It is preferable to configure it using a nonlinear element. For example, the protection circuit is In this embodiment, a plurality of protection circuits are provided between the terminal and the signal line input terminal. In this case, a surge voltage is applied to the scanning lines, signal lines, and capacitance bus lines due to static electricity, etc., and the pixel transistors are turned off. It is designed to prevent damage to transistors, etc. Therefore, the protection circuit has a surge current When a voltage is applied, the protection circuit is configured to release the charge to the common wiring. It consists of a nonlinear element arranged in parallel with the scan line. It is composed of a two-terminal element such as a diode or a three-terminal element such as a transistor. It is possible to form it in the same process as the thin film transistor 170 of the pixel portion. For example, By connecting the terminal and the drain terminal, it can have the same characteristics as a diode. do.

[0161] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is.

[0162] (Embodiment 2) In this embodiment, the oxide semiconductor layer and the source electrode layer or the drain electrode layer in Embodiment 1 are An example in which an oxide conductive layer is provided as a source region and a drain region between an electrode layer and a semiconductor layer is shown in FIGS. 7. Therefore, the other steps can be performed in the same manner as in the first embodiment, and the same parts as in the first embodiment can be performed. The description of the parts having the same functions and the repetition of the steps will be omitted. 7 is the same as FIG. 1 to FIG. 5 except for some differences in the steps, and therefore the same parts are designated by the same reference numerals. The same reference numerals will be used and detailed explanations of the same parts will be omitted.

[0163] First, the steps up to FIG. 3(B) in the first embodiment are carried out in accordance with the first embodiment. A) is the same as Figure 3(B).

[0164] An oxide conductive film 140 is formed on the dehydrated or dehydrogenated oxide semiconductor layers 133 and 134. Then, a metal conductive film made of a metal conductive material is laminated on the oxide conductive film 140 .

[0165] The oxide conductive film 140 can be formed by a sputtering method, a vacuum deposition method (electron beam deposition method, etc.), or The material of the oxide conductive film 140 is an arc discharge ion plating method or a spray method. The material preferably contains zinc oxide as an ingredient and does not contain indium oxide. As such an oxide conductive film 140, zinc oxide, zinc aluminum oxide, etc. Aluminum, zinc aluminum oxynitride, zinc gallium oxide, etc. can be applied. The thickness is appropriately selected within the range of 50 nm to 300 nm. In this case, a target containing 2% by weight or more and 10% by weight or less of SiO2 is used for film formation, and the oxide The conductive film contains SiOx (X>0) which inhibits crystallization, and the dehydration or decomposition process is performed later. It is preferable to prevent crystallization during the heat treatment for hydrogenation.

[0166] Next, a fourth photolithography step is performed to form resist masks 136a, 136b, and 136c. 6c, 136d, 136e, 136f, and 136g are formed, and a metal conductive film is formed by etching. The unnecessary portions of the source electrode layer 105a, the drain electrode layer 105b, and the source electrode layer 105c are removed. 165a, the drain electrode layer 165b, the capacitance electrode layer 149, the connection electrode 120, and the second terminal A child 122 is formed (see FIG. 6(B)).

[0167] Note that when the metal conductive film is etched, the oxide conductive film 140, the oxide semiconductor layer 133, The materials and etching conditions are adjusted appropriately so that the layer 134 is not removed.

[0168] Next, resist masks 136a, 136b, 136c, 136d, 136e, 136f, 136g is removed, and the source electrode layer 105a, the drain electrode layer 105b, and the source electrode layer 16 5a, the oxide conductive film 140 is etched using the drain electrode layer 165b as a mask, and an acid The oxide conductive layers 164a and 164b, the oxide conductive layers 104a and 104b, and the capacitor electrode layer 185 are The oxide conductive film 140 containing zinc oxide is formed by, for example, a resist. It can be easily etched using an alkaline solution such as a stripper for steel. In the same process, oxide conductive layers 138 and 139 are also formed on the terminal portions.

[0169] A channel region is formed by utilizing the difference in etching rate between the oxide semiconductor layer and the oxide conductive layer. In order to separate the oxide conductive layer, an etching process is performed to separate the oxide conductive layer. The oxide conductive layer on the oxide semiconductor layer is formed by utilizing the fact that the ionization rate is faster than that of the oxide semiconductor layer. The layer is selectively etched.

[0170] Therefore, the resist masks 136a, 136b, 136c, 136d, 136e, and 136f The removal of 136g is preferably performed by an ashing process. In the case of etching, the oxide conductive film 140 and the oxide semiconductor layers 133 and 134 are excessively etched. To prevent etching, the etching conditions (type of etchant, concentration, etching time) ) and adjust accordingly.

[0171] As in this embodiment, after etching the oxide semiconductor layer into an island shape, the oxide conductive film and the gold A metal conductive film is laminated, and a wiring pattern including a source electrode layer and a drain electrode layer is formed using the same mask. By etching the conductive film, an oxide conductive film remains under the wiring pattern of the metal conductive film. It can be done.

[0172] At the contact between the gate wiring (conductive layer 162) and the source wiring (drain electrode layer 165b), However, since the oxide conductive layer 164b is formed below the source wiring, the buffer The series resistance is only that of the thickness, and it is preferable because it does not form an insulating oxide with metal. stomach.

[0173] The oxide insulating film 107 serving as a protective insulating film in contact with the oxide semiconductor layers 133 and 134 is formed. In this embodiment, a silicon oxide film having a thickness of 300 nm is used as the oxide insulating film 107. The film is formed using a deposition method.

[0174] Next, a second heat treatment (preferably 2) is carried out under an inert gas atmosphere or a nitrogen gas atmosphere. For example, the temperature is increased by heating in a nitrogen atmosphere. The second heat treatment is carried out at 250°C for 1 hour under atmospheric pressure. The oxide semiconductor layers 133 and 134 are in contact with the oxide insulating film 107. It is heated in this state.

[0175] Through the above steps, the oxide semiconductor layer after film formation is dehydrated or dehydrogenated. After the heat treatment for reducing the resistance, a part of the oxide semiconductor layer is selectively treated with an oxygen-excess This is the state.

[0176] As a result, a channel formation region overlapping with the gate electrode layer 161 in the oxide semiconductor layer 133 is formed. The region 166 is an I-type region, and has a high resistance that overlaps the source electrode layer 165a and the oxide conductive layer 164a. The anti-source region 167a and the high-temperature insulating layer 166a overlapping the drain electrode layer 165b and the oxide conductive layer 164b. The resistive drain region 167b is formed in a self-aligned manner, and the oxide semiconductor layer 163 is formed. Similarly, in the oxide semiconductor layer 134, a channel is formed overlapping with the gate electrode layer 101. The region 116 is an I-type region, and has a high conductivity that overlaps the source electrode layer 105a and the oxide conductive layer 104a. The resistive source region 117a overlaps with the drain electrode layer 105b and the oxide conductive layer 164b. The high-resistance drain region 117b is formed in a self-aligned manner, and the oxide semiconductor layer 103 is formed. can be.

[0177] The oxide semiconductor layers 163 and 103, the drain electrode layer 105b made of a metal material, and the drain electrode The oxide conductive layers 104b and 164b provided between the electrode layers 165b are low-resistance drain regions ( LRN (Low Resistance N-type conductivity) area It also functions as a low resistance drain (LRD) region. Similarly, the oxide semiconductor layers 163 and 103 and the source electrode layer 105a made of a metal material are The oxide conductive layers 104a and 164a provided between the source electrode layers 165a are low-resistance source layers. Low Resistance N-type conduction region (LRN) ty region, also called LRS (Low Resistance Source) region) and The drain electrode is made of an oxide semiconductor layer, a low-resistance drain region, and a metal material. By using a layered structure, the breakdown voltage of the transistor can be further improved. In other words, the carrier concentration in the low-resistance drain region is higher than that in the high-resistance drain region (HRD region). is also large, for example, 1×10 20 / cm 3 More than 1×10 21 / cm 3 Within the following range preferable.

[0178] By the above process, the thin film transistor 181 is formed in the driver circuit portion and the thin film transistor 182 is formed in the pixel portion on the same substrate. The thin film transistor 171 can be fabricated in the above manner. an oxide semiconductor layer including a high-resistance source region, a high-resistance drain region, and a channel formation region; Therefore, the thin film transistors 171 and 18 are bottom gate thin film transistors. 1 is a structure in which the high-resistance drain region or the high-resistance source region acts as a buffer even when a high electric field is applied. This prevents the application of a local high electric field, improving the breakdown voltage of the transistor.

[0179] In the capacitance section, the capacitance wiring layer 108, the gate insulating layer 102, the oxide conductive layer 104b The capacitance electrode layer 185 is formed in the same process as the drain electrode layer 105b. A capacitor 146 is formed by laminating the capacitor electrode layer 149 .

[0180] Next, the protective insulating layer 106 is formed over the oxide insulating film 107, and the protective insulating layer A color filter layer 191 is formed on the substrate 106. The protective insulating layer 106 and the overcoat layer 192 are formed. A protective insulating layer 109 is formed.

[0181] Next, a ninth photolithography step is carried out in the same manner as in the first embodiment to form a resist mask. The oxide insulating film 107, the protective insulating layer 106, and the protective insulating layer 109 are formed by etching. A contact hole 125 reaching the drain electrode layer 105b is formed, and the resist mask is removed. (See FIG. 6(D)). Also, the etching here reaches the second terminal 122. A contact hole 127 and a contact hole 126 reaching the connection electrode 120 are also formed.

[0182] Next, a light-transmitting conductive film is formed, and a tenth photolithography step is performed to form a resist. A mask is formed, and unnecessary portions are removed by etching to form the first electrode layer 110 and the conductive layer 111, terminal electrodes 128 and 129 are formed, and the resist mask is removed (see FIG. 7(A)). ).

[0183] Similarly to the first embodiment, an eleventh photolithography step is carried out to form the partition wall 193. An EL layer 194 and a second electrode layer 195 are stacked on a first electrode layer 110 to form a light-emitting element. The light-emitting device of this embodiment mode is manufactured (see FIG. 7(B)).

[0184] The oxide conductive layer is formed as a source region and a drain region by forming an oxide semiconductor layer and a source electrode layer. By providing the source and drain electrode layers between the source and drain regions, the resistance of the source and drain regions can be reduced. The source region and the drain region can be formed in a single layer, and the transistor can operate at high speed. The use of an oxide conductive layer as a gate insulating layer improves the frequency characteristics of the peripheral circuit (drive circuit). This is effective for the contact between the metal electrode (Ti, etc.) and the oxide semiconductor layer. This is because the contact between the conductive layer and the oxide layer can reduce the contact resistance.

[0185] In addition, molybdenum (Mo), which is used as a part of the wiring material in light-emitting devices (e.g., The problem was that the contact resistance with the oxide semiconductor layer was high. Molybdenum (Mo) is less likely to oxidize than titanium (Ti), so it absorbs oxygen from the oxide semiconductor layer. The removal effect is weak, and the contact interface between molybdenum (Mo) and the oxide semiconductor layer does not become n-type. However, even in such a case, the oxide semiconductor layer and the source and drain electrode layers By placing an oxide conductive layer between the two, the contact resistance can be reduced, and the frequency of the peripheral circuit (drive circuit) can be reduced. The numerical characteristics can be improved.

[0186] Since the channel length of the thin film transistor is determined when the oxide conductive layer is etched, For example, the channel length can be shortened to between 0.1 μm and 2 μm. The operating speed can be increased.

[0187] (Embodiment 3) In this embodiment, the oxide semiconductor layer and the source electrode in Embodiment 1 or 2 are and an oxide conductive layer is provided between the source and drain electrode layers. Other examples are shown in Figs. 8 and 9. Therefore, the other parts are the same as in the first or second embodiment. and parts that are the same as or have similar functions to those in the first or second embodiment. 8 and 9 are the same as those in FIGS. 1 to 7. Since the two are the same except for some differences, the same symbols are used for the same parts and detailed explanations of the same parts are omitted. The clarification is omitted.

[0188] First, according to the first embodiment, a metal conductive film is formed on the flexible substrate 100. Etching is performed using a resist mask formed by the first photolithography process. 1 terminal 121, gate electrode layer 161, conductive layer 162, gate electrode layer 101, capacitance wiring layer Form 108.

[0189] Next, the first terminal 121, the gate electrode layer 161, the conductive layer 162, the gate electrode layer 101, the capacitor A gate insulating layer 102 is formed on the wiring layer 108, and an oxide semiconductor film and an oxide conductive film are laminated. The gate insulating layer, the oxide semiconductor film, and the oxide conductive film are successively formed without exposure to the air. It is possible.

[0190] A resist mask is formed over the oxide conductive film by a second photolithography process. the gate insulating layer, the oxide semiconductor film, and the oxide conductive film are etched using a mask; A contact hole 119 reaching the first terminal 121, a contact hole 118 reaching the conductive layer 162, and a contact hole 119 reaching the conductive layer 162 are formed. Form rule 123.

[0191] The resist mask in the second photolithography process is removed, and then a second photoresist is formed on the oxide conductive film. A resist mask is formed by the third photolithography process. An island-shaped oxide semiconductor layer and an island-shaped oxide conductive layer are formed using a resist mask in a deposition process.

[0192] In this way, in a state where the oxide semiconductor film and the oxide conductive film are stacked on the entire surface of the gate insulating layer, When a step of forming a contact hole in the gate insulating layer is performed, a resist mask is formed on the surface of the gate insulating layer. Since the mask does not come into direct contact with the gate insulating layer, contamination of the surface (such as adhesion of impurities) can be prevented. Therefore, the state of the interfaces between the gate insulating layer and the oxide semiconductor film and between the gate insulating layer and the oxide conductive film can be improved. This leads to improved reliability.

[0193] Next, the oxide semiconductor layer and the oxide conductive layer are stacked together and subjected to heat treatment for dehydration and dehydrogenation. Heat treatment at temperatures between 400 and 700°C dehydrates the oxide semiconductor layer. This allows dehydrogenation and prevents subsequent re-impregnation with water (H2O).

[0194] This heat treatment prevents the oxide conductive layer from containing crystallization inhibitors such as silicon oxide. The oxide conductive layer crystallizes as long as the oxide conductive layer is kept at a constant temperature. The crystals of the oxide conductive layer grow in a columnar shape relative to the underlying surface. As a result, in order to form the source electrode layer and the drain electrode layer, the upper layer of the oxide conductive layer is When etching a metal conductive film, it is possible to prevent the formation of undercuts.

[0195] Furthermore, the conductivity of the oxide conductive layer is improved by heat treatment for dehydration and dehydrogenation of the oxide semiconductor layer. Note that the heat treatment for only the oxide conductive layer can be performed at a lower temperature than that for the oxide semiconductor layer. Heat treatment may also be performed.

[0196] In addition, when a peeling layer is formed and a thin film transistor and a light-emitting element are formed on a substrate, dehydration By the heat treatment of hydrogenation and dehydrogenation, when the film is separated from the production substrate to the support substrate in a later process, the separation is easy. This facilitates peeling at the delamination interface.

[0197] In addition, the first heat treatment of the oxide semiconductor layer and the oxide conductive layer is performed to form an island-shaped oxide semiconductor layer and This can also be performed on an oxide semiconductor film and an oxide conductive film before they are processed into an oxide conductive layer. In this case, after the first heating process, the substrate is removed from the heating apparatus and the photolithography process is performed. Do the following.

[0198] Through the above steps, the oxide semiconductor layers 133 and 134 and the oxide conductive layers 142 and 143 are obtained. (See FIG. 8A). The oxide semiconductor layer 133, the oxide conductive layer 142, and the oxide semiconductor layer 1 The oxide conductive layer 34 and the oxide conductive layer 143 are island-shaped stacked layers formed using the same mask. .

[0199] Next, a fourth photolithography step is performed to form resist masks 136a, 136b, and 136c. 6c, 136d, 136e, 136f, and 136g are formed, and a metal conductive film is formed by etching. The unnecessary portions of the source electrode layer 105a, the drain electrode layer 105b, and the source electrode layer 105c are removed. 165a, the drain electrode layer 165b, the capacitance electrode layer 149, the connection electrode 120, and the second terminal A child 122 is formed (see FIG. 8(B)).

[0200] Note that when the metal conductive film is etched, the oxide conductive layers 142 and 143 and the oxide semiconductor layer The materials and etching conditions are adjusted appropriately so that the layers 133 and 134 are not removed. .

[0201] Next, resist masks 136a, 136b, 136c, 136d, 136e, 136f, 136g is removed, and the source electrode layer 105a, the drain electrode layer 105b, and the source electrode layer 16 5a, the oxide conductive layers 142 and 143 are etched using the drain electrode layer 165b as a mask. Then, oxide conductive layers 164a and 164b and oxide conductive layers 104a and 104b are formed ( The oxide conductive layers 142 and 143 containing zinc oxide are formed by, for example, resist. It can be easily etched using alkaline solutions such as fluorine strippers.

[0202] Therefore, the resist masks 136a, 136b, 136c, 136d, 136e, and 136f The removal of 136g is preferably performed by an ashing process. In the case of etching, the oxide conductive layers 142 and 143 and the oxide semiconductor layers 133 and 134 are To avoid excessive etching, the etching conditions (type of etchant, concentration, etching Adjust the time (time) accordingly.

[0203] The oxide insulating film 107 serving as a protective insulating film in contact with the oxide semiconductor layers 133 and 134 is formed. In this embodiment, a silicon oxide film having a thickness of 300 nm is used as the oxide insulating film 107. The film is formed using a deposition method.

[0204] Next, a second heat treatment (preferably 2) is carried out under an inert gas atmosphere or a nitrogen gas atmosphere. For example, the temperature is increased by heating in a nitrogen atmosphere. The second heat treatment is carried out at 250°C for 1 hour under atmospheric pressure. The oxide semiconductor layers 133 and 134 are in contact with the oxide insulating film 107. It is heated in this state.

[0205] Through the above steps, the oxide semiconductor layer after film formation is dehydrated or dehydrogenated. After the heat treatment for reducing the resistance, a part of the oxide semiconductor layer is selectively treated with an oxygen-excess This is the state.

[0206] As a result, a channel formation region overlapping with the gate electrode layer 161 in the oxide semiconductor layer 133 is formed. The region 166 is an I-type region, and has a high resistance that overlaps the source electrode layer 165a and the oxide conductive layer 164a. The anti-source region 167a and the high-temperature insulating layer 166a overlapping the drain electrode layer 165b and the oxide conductive layer 164b. The resistive drain region 167b is formed in a self-aligned manner, and the oxide semiconductor layer 163 is formed. Similarly, in the oxide semiconductor layer 134, a channel is formed overlapping with the gate electrode layer 101. The region 116 is an I-type region, and has a high conductivity that overlaps the source electrode layer 105a and the oxide conductive layer 104a. The resistive source region 117a overlaps with the drain electrode layer 105b and the oxide conductive layer 164b. The high-resistance drain region 117b is formed in a self-aligned manner, and the oxide semiconductor layer 103 is formed. can be.

[0207] The oxide semiconductor layers 163 and 103, the drain electrode layer 105b made of a metal material, and the drain electrode The oxide conductive layers 104b and 164b provided between the electrode layers 165b are low-resistance drain regions ( Similarly, the oxide semiconductor layer 163 also functions as a LRN region and an LRD region. 103 and the source electrode layer 105a made of a metal material, and the source electrode layer 165a are provided between the The oxide conductive layers 104a and 164a are low-resistance source regions (also called LRN regions and LRS regions). The oxide semiconductor layer, the low-resistance drain region, and the drain region made of metal material also function as a gate. By using this structure for the gate electrode layer, the breakdown voltage of the transistor can be further improved. Specifically, the carrier concentration in the low-resistance drain region is higher than that in the high-resistance drain region (HRD region). ), e.g., 1×10 20 / cm 3 More than 1×10 21 / cm 3 Within the following range It is preferable to have one.

[0208] By the above steps, the thin film transistor 182 is formed in the driver circuit portion and the thin film transistor 183 is formed in the pixel portion on the same substrate. The thin film transistor 172 can be fabricated in the same manner as above. an oxide semiconductor layer including a high-resistance source region, a high-resistance drain region, and a channel formation region; Therefore, the thin film transistors 172 and 18 are bottom gate thin film transistors. 2. Even when a high electric field is applied, the high-resistance drain region or high-resistance source region acts as a buffer. This prevents the application of a local high electric field, improving the breakdown voltage of the transistor.

[0209] In the capacitance section, the capacitance wiring layer 108, the gate insulating layer 102, the drain electrode layer 105 A capacitor 147 is formed by laminating a capacitor electrode layer 149 formed in the same process as in b.

[0210] Next, the protective insulating layer 106 is formed over the oxide insulating film 107, and the protective insulating layer A color filter layer 191 is formed on the substrate 106. The protective insulating layer 106 and the overcoat layer 192 are formed. A protective insulating layer 109 is formed.

[0211] Next, a ninth photolithography step is carried out in the same manner as in the first embodiment to form a resist mask. The oxide insulating film 107, the protective insulating layer 106, and the protective insulating layer 109 are formed by etching. A contact hole 125 reaching the drain electrode layer 105b is formed, and the resist mask is removed. (See FIG. 8(D)). Also, the etching here reaches the second terminal 122. A contact hole 127 and a contact hole 126 reaching the connection electrode 120 are also formed.

[0212] Next, a light-transmitting conductive film is formed, and a tenth photolithography step is performed to form a resist. A mask is formed, and unnecessary portions are removed by etching to form the first electrode layer 110 and the conductive layer 111, terminal electrodes 128 and 129 are formed, and the resist mask is removed (see FIG. 9(A)). ).

[0213] Similarly to the first embodiment, an eleventh photolithography step is carried out to form the partition wall 193. An EL layer 194 and a second electrode layer 195 are stacked on a first electrode layer 110 to form a light-emitting element. The light-emitting device of this embodiment mode is manufactured (see FIG. 9(B)).

[0214] The oxide conductive layer is formed as a source region and a drain region by forming an oxide semiconductor layer and a source electrode layer. By providing the source and drain electrode layers between the source and drain regions, the resistance of the source and drain regions can be reduced. The source region and the drain region can be formed in a single layer, and the transistor can operate at high speed. The use of an oxide conductive layer as a gate insulating layer improves the frequency characteristics of the peripheral circuit (drive circuit). This is effective for the contact between the metal electrode (Ti, etc.) and the oxide semiconductor layer. This is because the contact resistance between the conductive oxide layer and the conductive oxide layer is low.

[0215] An oxide conductive layer is interposed between the oxide semiconductor layer and the source and drain electrode layers. This reduces contact resistance and improves the frequency characteristics of the peripheral circuits (drive circuits). .

[0216] Since the channel length of the thin film transistor is determined when the oxide conductive layer is etched, For example, the channel length L can be set to 0.1 μm or more and 2 μm or less. This shortens the time required for the operation, thereby increasing the operating speed.

[0217] (Fourth embodiment) In this embodiment mode, the first thin film transistor and the first light-emitting element in the pixel portion in Embodiment 1 are 16 to 18 show examples of light-emitting devices in which the electrode layers are electrically connected to each other via a connection electrode layer. Therefore, other steps can be performed in the same manner as in the first embodiment, and the same parts as in the first embodiment or The description of parts having similar functions and repeated steps will be omitted. 18 is the same as in FIGS. 1 to 5 except for some differences in the steps, and therefore the same parts are designated by the same reference numerals. The same reference numerals will be used and detailed explanations of the same parts will be omitted.

[0218] The light emitting device of this embodiment is shown in FIG. The electrode layer 105b is electrically connected to the first electrode layer 110 via the connection electrode layer 196. A method for manufacturing the light-emitting device shown in FIG. 16 will be described with reference to FIGS.

[0219] First, the steps up to FIG. 4(A) in the first embodiment are carried out in accordance with the first embodiment. (A) is the same as FIG. 4(A).

[0220] Next, a fifth photolithography step is performed to form a resist mask, and an oxide insulating film 1 The contact hole 107 and the protective insulating layer 106 are etched to reach the drain electrode layer 105b. a contact hole 125, a contact hole 127 reaching the second terminal 122, and a contact hole 128 reaching the connection electrode 120. A contact hole 126 is formed to reach the resist mask 124, and the resist mask is removed (see FIG. 17(B)). ).

[0221] Next, a conductive film is formed, and a sixth photolithography step is performed to form a resist mask. The unnecessary portions are removed by etching to form the connection electrode layer 196, the conductive layer 112, and the terminal electrode 1 13 and 114 are formed, and the resist mask is removed (see FIG. 17(C)). Since a metal conductive film can be used for the connection electrode layer 196, the conductive layer 112, and the terminal electrode 1 13 and 114 can also be metal conductive layers.

[0222] The connection electrode layer 196 is mainly composed of an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W. A laminated film combining a film containing the metal component or an alloy film of the metal component can be used. Therefore, as in this embodiment, the conductive layer 112 and the terminal electrodes 113 and 114 are connected to the connection electrode layer 196. When they are formed in the same process, the conductive layer 112 and the terminal electrodes 113 and 114 are also made of Al, Cr, Cu, A film containing an element selected from Ta, Ti, Mo, and W as a main component, or an alloy film thereof. The conductive film is not limited to a single layer containing the above-mentioned elements. The conductive film can be formed by a method such as sputtering or the like. Vacuum deposition (electron beam deposition, etc.), arc discharge ion plating, spray -method can be used.

[0223] Next, seventh to ninth photolithography steps are performed on the protective insulating layer 106 in the pixel area. A white RGB color filter layer 191 is formed, and a tenth photolithography process is performed. An overcoat layer 192 is formed to cover the color filter layer 191. 96, conductive layer 112, terminal electrodes 113, 114, protective insulating layer 106 and overcoat layer A protective insulating layer 109 is formed to cover 192 (see FIG. 17(D)).

[0224] Next, an eleventh photolithography step is performed to form a resist mask, and a protective insulating layer 1 A contact hole 125 reaching the connection electrode layer 196 is formed by etching in step 09. The resist mask is removed. Also, the etching here removes the surface of the terminal electrodes 113 and 114. The protective insulating layer 109 is also removed to expose the terminal electrodes 113 and 114 (see FIG. 18(A)). .

[0225] Next, a light-transmitting conductive film is formed, and a twelfth photolithography step is performed. A mask is formed, and unnecessary portions are removed by etching to form the first electrode layer 110. Then, the resist mask is removed.

[0226] Similarly to the first embodiment, a thirteenth photolithography step is carried out to form the partition wall 193. An EL layer 194 and a second electrode layer 195 are stacked on a first electrode layer 110 to form a light-emitting element. The light-emitting device of this embodiment mode is manufactured (see FIG. 18(B)).

[0227] When forming the connection electrode layer 196, the power supply line is made of the same material as the connection electrode layer 196 and in the same process. The common potential line can also be formed using the same material and process as the connection electrode layer 196. It can be formed by

[0228] This embodiment mode can be combined with any one of Embodiment Modes 1 to 3 as appropriate.

[0229] (Embodiment 5) In this embodiment mode, an example in which a part of a manufacturing process of a thin film transistor is different from that in Embodiment Mode 1 is shown in FIG. 10 is the same as FIGS. 1 to 5 except for some differences in the steps. The same reference numerals are used in the places, and detailed explanations of the same parts will be omitted.

[0230] First, according to the first embodiment, a gate electrode layer and a gate insulating layer are formed on a substrate, and then a gate insulating layer is formed on a pixel portion. A contact hole reaching the gate electrode layer is formed by a second photolithography process. Form (not shown).

[0231] Next, the oxide semiconductor film 130 is formed, and the oxide semiconductor film 130 is subjected to a third photolithography. The oxide semiconductor layers 131 and 132 are processed into island-shaped oxide semiconductor layers by a filming process.

[0232] Next, the oxide semiconductor layers 131 and 132 are dehydrated or dehydrogenated. The temperature of the first heat treatment for hydrogenation is 400°C or higher and 750°C or lower, preferably 425°C. If the temperature is 425°C or higher, the heat treatment time can be 1 hour or less. If the temperature is less than 1 hour, the heat treatment time is set to be longer than 1 hour. The substrate is placed in an electric furnace, which is one of the devices, and the oxide semiconductor layer is heated under a nitrogen atmosphere. After the heat treatment, the oxide semiconductor layer is kept away from the air to prevent water and hydrogen from re-entering the oxide semiconductor layer. After that, the same furnace is filled with high-purity oxygen gas, high-purity N2O gas, Alternatively, cooling is performed by introducing ultra-dry air (dew point below -40°C, preferably below -60°C). It is preferable that the oxygen gas or N2O gas does not contain water, hydrogen, etc. The purity of oxygen gas or N2O gas introduced into the heat treatment equipment must be 6N (99.9999%) or higher. Preferably, 7N (99.99999%) or more (i.e., oxygen gas or N2O gas) It is preferable to keep the impurity concentration at 1 ppm or less, preferably 0.1 ppm or less.

[0233] The heat treatment device is not limited to an electric furnace, and may be, for example, a GRTA (Gas Rapid Th thermal annealing) equipment, LRTA (Lamp Rapid Thermal) Use an RTA (Rapid Thermal Anneal) device such as an LRTA devices can be used with halogen lamps, metal halide lamps, and xenon lamps. Arc lamps, carbon arc lamps, high-pressure sodium lamps, high-pressure mercury lamps, etc. It is a device that heats the object to be treated by radiating light (electromagnetic waves) emitted from a lamp. Heat is generated by heat conduction or heat radiation from heating elements such as TA devices, lamps, and resistance heating elements. The GRTA is a device that uses high-temperature gas to heat the object to be treated. The gas used is a rare gas such as argon or nitrogen, which is suitable for heating. The RTA method uses an inert gas that does not react with the material being treated. Heat treatment may be performed at up to 750°C for several minutes.

[0234] After the first heat treatment for dehydration or dehydrogenation, the temperature is preferably 200° C. or higher and 400° C. or lower. Or heat treatment at a temperature between 200°C and 300°C in an oxygen gas or N2O gas atmosphere. The theory may also be carried out.

[0235] In addition, the first heat treatment of the oxide semiconductor layers 131 and 132 is performed to process the oxide semiconductor layers into island-shaped oxide semiconductor layers. In that case, the oxide semiconductor film 130 may be subjected to the first heat treatment. The substrate is then removed from the heating device and subjected to a photolithography process.

[0236] By going through the above steps, the entire oxide semiconductor film is made into an oxygen-excess state, and thus a high resistance Therefore, the oxide semiconductor layer 168 is made entirely i-type. A body layer 118 is obtained.

[0237] Next, a fourth photolithography is performed on the oxide semiconductor layer 168 and the oxide semiconductor layer 118. A resist mask is formed by a process, and selective etching is performed to form the source electrode layer and the drain. An oxide electrode layer is formed, and an oxide insulating film 107 is formed by sputtering.

[0238] Next, in order to reduce the variation in the electrical characteristics of the thin film transistors, Alternatively, heat treatment (preferably at 150°C or higher and lower than 350°C) is carried out in a nitrogen gas atmosphere. For example, heat treatment is performed in a nitrogen atmosphere at 250° C. for 1 hour.

[0239] Next, the protective insulating layer 106 is formed over the oxide insulating film 107, and the protective insulating layer A color filter layer 191 is formed on the substrate 106. The protective insulating layer 106 and the overcoat layer 192 are formed. A protective insulating layer 109 is formed.

[0240] Next, a ninth photolithography step is performed to form a resist mask, and a gate insulating layer 1 02, the oxide insulating film 107, the protective insulating layer 106, and the protective insulating layer 109 are etched. The first terminal 121, the conductive layer 162, the drain electrode layer 105b, and the second terminal 122 After forming a light-transmitting conductive film, a tenth photolithography step is performed. A resist mask is formed by a lithography process, and selective etching is performed to form the first electrode layer. 110, a terminal electrode 128, a terminal electrode 129, and a wiring layer 145 are formed.

[0241] In this embodiment, the first terminal 121 and the terminal electrode 128 are connected via the connection electrode 120. In this example, the drain electrode layer 165b and the conductive layer 162 are directly connected without using a wiring. This is done via the line layer 145.

[0242] In the capacitance section, the capacitance wiring layer 108, the gate insulating layer 102, the source electrode layer and the drain electrode layer The capacitor 147 is formed by laminating the inner electrode layer and the capacitor electrode layer 149 formed in the same process. are.

[0243] By the above process, the thin film transistor 183 is formed in the driver circuit portion and the thin film transistor 184 is formed in the pixel portion on the same substrate. A thin film transistor 173 can be fabricated on the substrate.

[0244] As in the first embodiment, a partition wall 193 is formed, an EL layer 194 is formed on the first electrode layer 110, and a second The light emitting device of this embodiment having a light emitting element is fabricated by laminating two electrode layers 195 (FIG. 1 0).

[0245] This embodiment mode can be combined with any one of Embodiment Modes 1 to 4 as appropriate.

[0246] (Embodiment 6) In this embodiment mode, a thin film transistor is formed on a flexible substrate by performing a peeling and transfer process from another substrate. 2 shows an example of a method for manufacturing a light-emitting device provided with a transistor. An example of a light-emitting device described in this embodiment is shown in FIG. This embodiment is the same as the first embodiment except for some differences in the process. The same parts are designated by the same reference numerals, and detailed explanations of the same parts will be omitted.

[0247] The light emitting device 8400 includes a pixel portion 8250, a driver circuit portion 8252, and terminal portions 8254 and 8255. The pixel portion 8250 and the driver circuit portion 8252 are made of a thin, light-transmitting, and lightweight material. It is provided between a first substrate 8100 and a thin, low-permeability second substrate 8144. The pixel portion 8250 and the driver circuit portion 8252 are formed on a resin layer in contact with the first substrate 8100. It is held between 8141 and a resin layer 8142 in contact with a second substrate 8144 .

[0248] The pixel portion 8250 includes a thin film transistor 170, a first electrode layer 110, an EL layer 194, a second The light emitting element includes the electrode layer 195. One of the gate electrode and drain electrode is connected to the first electrode layer 110 of the light-emitting element. The pixel portion 8250 is provided so as to cover a part of the first electrode layer 110. It has a quantity of 147.

[0249] The driver circuit portion 8252 includes a thin film transistor 180 .

[0250] An outline of a method for manufacturing the light-emitting device 8400 exemplified in this embodiment is as follows. , a terminal portion of the light emitting device 8400, a thin film transistor 170, a thin film transistor 180, A capacitor 147, a color filter layer 191, an overcoat layer 192, an oxide insulating film 107, The protective insulating layer 106, the protective insulating layer 109, and the first electrode layer 110 of the light-emitting element are used as layers to be peeled. Then, the peeled layer is formed on the second substrate (support substrate). After the substrate is temporarily attached to the first substrate, it is peeled off from the first substrate. The separation layer is attached to a thin, light-weight, and light-transmitting first substrate 8100 and then transferred. The second substrate that was temporarily attached to the peeling layer is removed. After forming a light emitting element on the exposed first electrode layer 110, a light emitting element was formed on the peeled layer. A thin second substrate 8144 with low water permeability is attached to the surface of the light emitting device 8400. do.

[0251] An example of a method for manufacturing the light-emitting device 8400 will be described in detail with reference to FIGS.

[0252] A separation layer 302 is formed on a first manufacturing substrate 300, and a first insulating layer 810 is formed on the separation layer 302. Preferably, the first insulating layer 4 is formed without exposing the formed release layer 302 to the atmosphere. The layer 8104 is formed continuously. By forming the layers continuously, the separation layer 302 and the insulating layer 8 This can prevent dust and impurities from getting into the space between the electrodes 104.

[0253] The first fabrication substrate 300 may be a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, or the like. A heat-resistant plate or metal substrate that can withstand the processing temperature of this embodiment can be used. In the manufacturing process of a semiconductor device, a plastic substrate having the above properties may be used. The substrate to be fabricated can be selected appropriately according to the process.

[0254] In addition, for glass substrates, if the temperature of the subsequent heat treatment is high, the distortion point will be 730°C or higher. For the glass substrate, for example, aluminosilicate glass, aluminum Glass materials such as lumino borosilicate glass and barium borosilicate glass are used. By containing more barium oxide (BaO) than boric acid, it is possible to produce a more practical heat-resistant gas. For this reason, it is preferable to use a glass substrate containing more BaO than B2O3. Alternatively, crystallized glass or the like can be used.

[0255] In this step, the peeling layer 302 is provided over the entire surface of the first manufacturing substrate 300. However, if necessary, a peeling layer 302 is provided on the entire surface of the first manufacturing substrate 300, and then the peeling layer 302 may be selectively removed to provide a release layer only in a desired area. A peeling layer 302 is formed in contact with the first fabrication substrate 300. A silicon oxide film, a silicon oxynitride film, a silicon nitride film, a silicon nitride film, a silicon nitride oxide film, a silicon oxide film, a silicon nitride film, a silicon oxide ... nitride An insulating layer such as a silicon film may be formed.

[0256] The release layer 302 may be made of tungsten (W), molybdenum (Mo), titanium (Ti), or tantalum. (Ta), niobium (Nb), nickel (Ni), cobalt (Co), zirconium (Zr ), ruthenium (Ru), rhodium (Rh), palladium (Pd), osmium (Os) , iridium (Ir), silicon (Si), or an alloy containing the element as the main component The layer is made of a material or a compound material containing the above element as a main component, and is a single layer or a laminated layer. The crystal structure of the silicon-containing layer may be any of amorphous, microcrystalline, and polycrystalline.

[0257] The peeling layer 302 can be formed by a sputtering method, a plasma CVD method, a coating method, a printing method, or the like. The coating method includes a spin coating method, a droplet ejection method, and a dispense method.

[0258] When the release layer 302 has a single layer structure, it is preferably a tungsten layer, a molybdenum layer, or a titanium layer. A layer containing a mixture of tungsten and molybdenum is formed. Alternatively, a layer containing tungsten oxide or a layer containing an oxynitride, a layer containing an oxide or oxynitride of molybdenum, or a layer containing tungsten A layer containing an oxide or oxynitride of a mixture of titanium and molybdenum is formed. The mixture of tungsten and molybdenum corresponds to, for example, an alloy of tungsten and molybdenum. do.

[0259] When the peeling layer 302 has a laminated structure, it is preferable that the first layer is a tungsten layer, the second layer is a molybdenum layer, and the third layer is a tungsten layer. A layer containing a mixture of tungsten and molybdenum is formed, and a second layer containing tungsten and molybdenum is formed. Oxides, nitrides, and oxynitrides of tungsten, molybdenum, or mixtures of tungsten and molybdenum Or, a nitride oxide is formed.

[0260] The peeling layer 302 is a stacked structure of a layer containing tungsten and a layer containing tungsten oxide. In the case of forming a tungsten-containing layer, an insulating layer made of oxide is formed on the tungsten-containing layer. By forming the insulating layer, a layer containing tungsten oxide is formed at the interface between the tungsten layer and the insulating layer. It may be possible to utilize the fact that

[0261] In addition, when a peeling layer is formed and a thin film transistor and a light emitting element are formed on a substrate, oxidation The dehydration and dehydrogenation heat treatment of the semiconductor layer also heats the peeling layer, and the resulting substrate is then heated in the subsequent process. When peeling from the plate to the support substrate, peeling at the interface of the peel layer becomes easy.

[0262] The surface of the layer containing tungsten may be treated by thermal oxidation, oxygen plasma treatment, or an acid treatment such as ozone water. A layer containing tungsten oxide may be formed by treating the surface with a solution having a strong chemical action. The plasma treatment and heat treatment are carried out using oxygen, nitrogen, nitrous oxide alone, or these gases and their combinations. It may be performed in a mixed gas atmosphere with other gases. This may be performed in a mixed gas atmosphere with tungsten nitride, oxynitride, etc. The same applies to the case where a layer containing a nitride and a nitride oxide is formed. After that, a silicon nitride layer, a silicon oxynitride layer, or a silicon nitride oxide layer may be formed thereon.

[0263] The layer to be peeled 304 is formed on the peeling layer 302. The layer to be peeled 304 is a first insulating layer 8104. On top are a thin film transistor 170, a thin film transistor 180, a capacitor 147, and a color filter. layer 191, an overcoat layer 192, an oxide insulating film 107, a protective insulating layer 106, and a protective insulating Layer 109 includes a first electrode layer 110 of the light-emitting element.

[0264] First, a first insulating layer 8104 is formed on the peeling layer 302. The first insulating layer 8104 is , a single layer or a multilayer insulating film containing nitrogen and silicon, such as silicon nitride, silicon oxynitride, or silicon nitride oxide, It is preferable to form it by

[0265] The first insulating layer 8104 is formed by using a sputtering method, a plasma CVD method, a coating method, a printing method, or the like. For example, the film can be formed by plasma CVD at a film formation temperature of 250°C. By forming the membrane at a temperature of 400°C or higher, it is possible to obtain a dense membrane with extremely low water permeability. The thickness of the first insulating layer 8104 is 10 nm or more and 1000 nm or less, and further 100 nm or less. More preferably, it is 700 nm or less.

[0266] By providing the first insulating layer 8104, the insulating layer 8104 can be easily removed at the interface with the peeling layer 302 in a later peeling step. Furthermore, the semiconductor element and wiring are not cracked or damaged during the subsequent peeling process. The first insulating layer 8104 also serves as a protective layer for the light emitting device 8400. It functions as such.

[0267] The layer to be peeled 304 is formed on the first insulating layer 8104. The layer to be peeled 304 is formed by the method described in Embodiment 1. Since the method described in the previous section can be applied to form the semiconductor device, detailed description thereof will be omitted here.

[0268] Next, a second fabrication substrate 306 is temporarily attached to the layer to be peeled 30 using a removable adhesive layer 305. By bonding the second substrate 306 to the peeled layer 304, The layer to be peeled 304 can be easily peeled from the peeling layer 302. This reduces the stress on the adhesive 304, protecting the thin film transistor. The use of layer 305 allows the second fabrication substrate 306 to be easily removed when it is no longer needed. Cut.

[0269] The removable adhesive layer 305 can be, for example, a water-soluble resin. The water-soluble resin spread on the layer to be peeled 304 reduces the unevenness of the layer to be peeled 304, and the layer to be peeled 304 is adhered to the second substrate 306. In addition, the removable adhesive layer 305 may be an adhesive that can be peeled off by light or heat. The adhesive may be laminated on a water-soluble resin.

[0270] Next, the layer to be peeled 304 is peeled off from the first fabrication substrate 300 (see FIG. 28(B)). A variety of methods can be used.

[0271] For example, when a metal oxide film is formed as the peeling layer 302 on the side in contact with the first insulating layer 8104, In this case, the metal oxide film is weakened by crystallization, and the peeled layer 304 is attached to the first substrate 3. After the metal oxide film is weakened by crystallization, it can be peeled off from the substrate. Furthermore, a part of the peeling layer 302 is immersed in a solution or a halogen fluoride gas such as NF3, BrF3, or ClF3. The metal oxide film may be further etched away and peeled off at the weakened metal oxide film.

[0272] The peeling layer 302 may be a film containing nitrogen, oxygen, hydrogen, or the like (for example, amorphous silicon containing hydrogen). a transparent film, a hydrogen-containing alloy film, an oxygen-containing alloy film, etc.) as a first substrate 300; When a substrate having the above structure is used, the separation layer 302 is irradiated with laser light from the first formation substrate 300. The nitrogen, oxygen, and hydrogen contained in the separation layer are vaporized by irradiation, and the separation layer is separated from the first fabrication substrate 300. A method of peeling between the release layer 302 can be used.

[0273] The peeling layer 302 is removed by etching, and the peeled layer 304 is then attached to the first substrate. It may be peeled off from 300.

[0274] Also, a method of mechanically polishing and removing the first fabrication substrate 300, or a method of removing the first fabrication substrate 300 Removed by etching with halogen fluoride gases such as NF3, BrF3, ClF3, or HF In this case, the peeling layer 302 does not need to be used.

[0275] In addition, laser irradiation, etching with gas or solution, or sharp knives or scalpels may cause A groove is formed by using the adhesive to expose the release layer 302, and the release layer 302 is then bonded to the adhesive using the groove as a starting point. The layer to be peeled 304 is attached to the first fabrication substrate at the interface with the first insulating layer 8104 which functions as a protective layer. It can also be peeled off from the plate 300.

[0276] The peeling method may involve, for example, applying mechanical force (pulling off with a human hand or a gripping tool). The separation can be carried out by using a method such as a separation process using a rotating roller. The liquid is dropped onto the interface between the release layer 302 and the first insulating layer 8104, so that the liquid penetrates the interface between the release layer 302 and the first insulating layer 8104. The layer to be peeled 304 may be peeled off from 2. Also, a fluorine such as NF3, BrF3, or ClF3 may be added to the groove. Fluoride gas is introduced, and the peeling layer 302 is etched and removed with the fluoride gas, leaving a film having an insulating surface. Alternatively, a method of peeling the layer to be peeled 304 from the first fabrication substrate 300 may be used. When peeling, a liquid such as water may be poured on the film.

[0277] As another peeling method, when the peeling layer 302 is formed of tungsten, ammonia The peeling can be performed while etching the peeling layer with a mixed solution of water and hydrogen peroxide. .

[0278] Next, a thin, light-weight first substrate 8100 is attached to the peeled layer 304, and a resin layer 8 141 is used for adhesion (see FIG. 29(A)).

[0279] The first substrate 8100 is thin and lightweight and has light-transmitting properties, and is flexible and resistant to visible light. A light-transmitting substrate can be used, such as polyethylene terephthalate (PET). Polyester resins such as polyethylene naphthalate (PEN), polyacrylonitrile resins Fat, polyimide resin, polymethyl methacrylate resin, polycarbonate resin (PC), Polyethersulfone resin (PES), polyamide resin, cycloolefin resin, poly Styrene resin, polyamide-imide resin, polyvinyl chloride resin, etc. can be suitably used. The first substrate 8100 may be made of a material containing nitrogen and silicon, such as silicon nitride or silicon oxynitride. A protective film with low water permeability, such as a film containing aluminum or a film containing nitrogen and aluminum, such as aluminum nitride, is used. The first substrate 8100 may be a fibrous body impregnated with an organic resin. A structure (so-called prepreg) may also be used.

[0280] When the material of the first substrate 8100 contains fibrous materials, the fibrous materials may be made of organic compounds or inorganic compounds. High-strength fibers of organic compounds are used. Specifically, high-strength fibers have a tensile modulus or Young's modulus It refers to fibers with high fiber resistance, and typical examples are polyvinyl alcohol fibers and polyester fibers. Fibers, polyamide fibers, polyethylene fibers, aramid fibers, polyparaphenylene Benzobisoxazole fiber, glass fiber, or carbon fiber. Examples of the glass fiber include E glass, S glass, D glass, Q glass, and the like. These are used in the form of woven or nonwoven fabric, and the fibrous body is impregnated with an organic resin. The cured structure may be used as the first substrate 8100. Using a structure made of fiber and organic resin increases reliability against damage caused by bending or localized pressure. This is a preferred configuration because it improves the performance.

[0281] When the first substrate 8100 includes the above-described fibrous body, the light from the light emitting element In order to reduce the obstruction of the fibers from leaking to the outside, the fibers are made of nanofibers of 100 nm or less. It is also preferable to match the refractive index of the fiber body with that of the organic resin or adhesive. preferable.

[0282] The resin layer 8141 may be a light-curing adhesive such as an ultraviolet-curing adhesive, or a reaction-curing adhesive. Various curing adhesives such as thermosetting adhesives and anaerobic adhesives can be used. These adhesives include epoxy resin, acrylic resin, silicone resin, and phenolic resin. Resins and the like can be used.

[0283] When a prepreg is used as the first substrate 8100, the first substrate 8100 is directly peeled off without using an adhesive. The separation layer 304 and the first substrate 8100 are bonded together by pressure. Resins are available in a variety of types, including reactive curing, heat curing, and UV curing, which can be hardened by additional processing. It is best to use one that undergoes further degradation.

[0284] After providing the first substrate 8100, the second fabrication substrate 306 and the removable adhesive layer 305 are removed. The first electrode layer 110 is then exposed (see FIG. 29(B)).

[0285] Through the above steps, the thin film transistor 170 and the thin film transistor The peeled layer 304 can be formed on which the first electrode layer 180 and the first electrode layer 110 of the light emitting element are formed. .

[0286] Next, a partition wall 193 is formed to cover a part of the first electrode layer 110. The EL layer 194 is formed on the insulating layer 192. The EL layer 194 may be made of either a low molecular weight material or a high molecular weight material. The EL layer 194 may be made of only organic compound materials. The EL layer 194 includes not only those consisting of an inorganic compound but also those containing an inorganic compound as a part thereof. Even if the light-emitting layer has a single layer structure consisting of one light-emitting layer, each layer has a different function. For example, in addition to the light-emitting layer, a hole injection layer, a hole transport layer, and layer, carrier blocking layer, electron transport layer, electron injection layer, etc. It is to be noted that layers that simultaneously have two or more functions of each layer are It may also include:

[0287] The EL layer 194 can be formed by a deposition method, an ink jet method, a spin coating method, a dip coating method, or the like. A coating method, a nozzle printing method, or the like can be used regardless of whether it is a wet method or a dry method.

[0288] Next, a second electrode layer 195 is formed on the EL layer 194. The second electrode layer 195 is The first electrode layer 110 may be formed using the same materials as those described above for the first electrode layer 110. When the first electrode layer 110 is used as an anode, the second electrode layer 195 becomes a cathode, and the first electrode layer 110 becomes a cathode. When the second electrode layer 195 is used as an anode, the second electrode layer 195 is preferably used as an anode. and the second electrode layer 195 are formed by selecting materials having work functions according to the polarities of the first and second electrode layers 195. do.

[0289] In this embodiment, the first electrode layer 110 is used as an anode, and the EL layer 194 is A hole injection layer, a hole transport layer, a light emitting layer, and an electron injection layer are laminated in this order from the electrode layer 110 side. Various materials can be used for the light-emitting layer. For example, A fluorescent compound or a phosphorescent compound that emits phosphorescence can be used. A material with a small work function is used for 195. Also, light is extracted from the first electrode layer 110 side. Therefore, a material with high reflectivity is selected for the second electrode layer 195 .

[0290] Through the above steps, a pixel portion 8250 including a thin film transistor 170 and a light-emitting element can be formed. Cut.

[0291] A protective film may be provided on the second electrode layer 195. For example, a sputtered protective film may be used as the protective film. For example, silicon nitride, silicon oxynitride, etc. can be deposited by coating, plasma CVD, coating, printing, etc. , a material containing nitrogen and silicon such as silicon oxynitride, or a single layer or It is formed in multiple layers. Alternatively, the inorganic insulating film and an organic insulating film such as a resin film are laminated to provide protection. By providing a protective film, moisture and gases such as oxygen can be prevented from entering the element portion. The thickness of the protective film that functions as a protective layer is 10 nm or more and 1000 nm or less. The terminal portion 8254 is preferably 100 nm or more and 700 nm or less. A shadow mask or the like is used to mask 8255 so that a protective film is not formed (see Figure 30). ).

[0292] Next, a second substrate 8144 is attached to cover the pixel portion 8250 and the driver circuit portion 8252. A second substrate 8250 is formed on the pixel portion 8250 and the driver circuit portion 8252 using a resin layer 8142. Glue 144 together.

[0293] It is preferable to use a material with good adhesiveness for the resin layer 8142. For example, acrylic resin, polycarbonate, etc. Polyimide resin, melamine resin, polyester resin, polycarbonate resin, phenol resin Fat, epoxy resin, polyacetal, polyether, polyurethane, polyamide (nylon organic compounds such as furan resin, diallyl phthalate resin, and silica glass. A compound consisting of silicon, oxygen, and hydrogen formed using siloxane polymer-based materials as starting materials. Among these, inorganic siloxane polymers containing Si-O-Si bonds, or alkylsiloxane polymers mer, alkylsilsesquioxane polymer, hydrogenated silsesquioxane polymer, hydrogen The hydrogen bonded to silicon is methyl or fluoro, as exemplified by hydroxylated alkylsilsesquioxane polymers. Organosiloxane polymers substituted with organic groups such as phenyl can be used. Furthermore, the resin layer 8142 may contain fibers in these materials.

[0294] The resin layer 8142 can be formed by, for example, applying a composition using a coating method, and then drying and heating it. In addition, a structure in which a fibrous body is impregnated with an organic resin can be used as the resin layer 8142. It can also be done as follows.

[0295] A thin substrate with low water permeability is used as the second substrate 8144. For example, a metal substrate is used. The material for the metal substrate is not particularly limited, but aluminum, Copper, nickel, aluminum alloy, stainless steel, or other metal alloys are preferred. Before bonding the second substrate 8144, it is possible to bake in a vacuum or It is preferable to perform a Zuma treatment to remove water adhering to the surface of the metal substrate. A resin film is also provided on the surface of the second substrate 8144 to protect the second substrate 8144. That's fine.

[0296] The second substrate 8144 can also be attached using a laminator. A sheet of adhesive is attached to the metal substrate using a magnet, and then the pixel part 8 is attached to the metal substrate. 250 and the driving circuit section 8252 may be adhered using a laminator. A resin layer 8142 is printed on a second substrate 8144 by inkjet printing or the like, and then the resin layer 8142 is attached to the light emitting element. There is also a method of using a laminator to bond the film. This is preferable as bubbles are less likely to get in (see Figure 27).

[0297] In the above manner, a light-emitting device of one embodiment of the present invention can be manufactured.

[0298] In this embodiment mode, the thin film transistor and the first electrode of the light-emitting element are provided on the peeled layer. However, the invention disclosed in this specification is not limited to this, and a method for forming a light emitting element is also possible. The peeling and transfer may be performed after the second electrode of the light-emitting element is formed (that is, after the second electrode of the light-emitting element is formed). The layer to be peeled, on which only the first insulating layer and the first electrode are formed, is peeled and transferred to the first substrate. After the first insulating layer is formed, a thin film transistor or a light emitting element may be fabricated. After the film is formed on the substrate and peeled off and transferred to the substrate, a thin film transistor or a light emitting element may be manufactured.

[0299] The light emitting device 8400 of this embodiment includes a first substrate 8100 that is thin, light-transmitting, and lightweight. and a second substrate 8144 which is thin and has low water permeability, so it is lightweight and easy to handle. It is possible to provide a light emitting device that is easy to handle and flexible. The metal substrate is used as a plate 8144 to support the light emitting device. Therefore, the light emitting device can have a long life.

[0300] According to this embodiment, a thin film transistor manufactured using a substrate with high heat resistance is thinly Therefore, the first substrate is not limited by the heat resistance of the first substrate. Therefore, a thin film transistor having high reliability and good electrical characteristics can be formed without any cracks. A light-emitting device in which such thin film transistors are incorporated into a pixel section and a driving circuit section on the same substrate. is highly reliable and has excellent operating characteristics.

[0301] Note that the configuration of this embodiment mode can be used in appropriate combination with configurations of other embodiments. It shall be possible.

[0302] (Embodiment 7) In this embodiment mode, in the light-emitting device described in any of Embodiments 1 to 6, and an active matrix type light emitting element using electroluminescence. An example of fabricating an optical display device will be described.

[0303] Light-emitting elements that utilize electroluminescence are either organic or inorganic. Generally, the former is an organic EL element, and the latter is an inorganic EL element. It is called.

[0304] In an organic EL element, electrons and holes are released from a pair of electrodes by applying a voltage to the light-emitting element. are injected into the layers containing the light-emitting organic compounds, causing a current to flow. The recombination of the electrons and holes creates an excited state in the light-emitting organic compound. The excited state is then converted to the ground state, at which point light is emitted. Such a light-emitting element is called a current-excited light-emitting element.

[0305] Inorganic EL elements are divided into dispersion-type inorganic EL elements and thin-film-type inorganic EL elements depending on the element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of a light-emitting material are dispersed in a binder. The emission mechanism is a donor-acceptor interaction that utilizes the donor and acceptor levels. Thin-film inorganic EL devices sandwich the light-emitting layer between dielectric layers. Furthermore, this structure is sandwiched between electrodes, and the light emission mechanism utilizes the inner-shell electron transition of metal ions. In this example, the light-emitting element is an organic EL element. do.

[0306] FIG. 19 shows an example of a pixel configuration to which digital time gray scale driving can be applied as an example of a light emitting device. Figure.

[0307] The configuration and operation of a pixel to which digital time gray scale driving can be applied will be described. The figure shows an n-channel transistor using an oxide semiconductor layer as a channel formation region in one pixel. Here is an example of using two of them.

[0308] The pixel 6400 includes a switching transistor 6401, a driving transistor 6402, It has a light emitting element 6404 and a capacitor element 6403. 01 has a gate connected to a scanning line 6406 and a first electrode (one of the source and drain electrodes) The first electrode (the other of the source electrode and the drain electrode) is connected to a signal line 6405, and the second electrode (the other of the source electrode and the drain electrode) is connected to a drive The driving transistor 6402 is connected to the gate of the driving transistor 6402. The gate is connected to a power supply line 6407 via a capacitor element 6403, and the first electrode is connected to a power supply line 640 7, and the second electrode is connected to the first electrode (pixel electrode) of the light emitting element 6404. The second electrode of the light emitting element 6404 corresponds to a common electrode 6408. It is electrically connected to a common potential line formed on the substrate.

[0309] A low power supply potential is set to the second electrode (common electrode 6408) of the light emitting element 6404. The low power supply potential is a low power supply potential with respect to the high power supply potential set to the power supply line 6407. Potential < High power supply potential. For example, GND, 0V, etc. are set as low power supply potential. The potential difference between the high power supply potential and the low power supply potential is applied to the light emitting element 6404. Then, in order to make the light emitting element 6404 emit light by passing a current through the light emitting element 6404, a high power supply potential and the low power supply potential is set to be equal to or greater than the forward threshold voltage of the light emitting element 6404. Each potential is set.

[0310] The capacitor element 6403 is omitted by substituting the gate capacitance of the driving transistor 6402. The gate capacitance of the driving transistor 6402 is determined by the channel region A capacitance may be formed between the gate electrode and the transistor.

[0311] In the case of a voltage input voltage driving method, the gate of the driving transistor 6402 is connected to The driving transistor 6402 is either fully on or off. A video signal is input, that is, the driving transistor 6402 is operated in a linear region. The driving transistor 6402 is operated in a linear region, so that the voltage of the driving transistor 6402 is higher than the voltage of the power supply line 6407. A high voltage is applied to the gate of the driving transistor 6402. The signal line 6405 is connected to A voltage equal to or greater than (power supply line voltage+Vth of the driving transistor 6402) is applied.

[0312] Furthermore, when analog grayscale driving is performed instead of digital time grayscale driving, the input of the signal is different. By doing so, the same pixel configuration as in FIG. 19 can be used.

[0313] When analog gradation driving is performed, a light emitting element 6404 is connected to the gate of a driving transistor 6402. A voltage equal to or greater than the forward voltage of the light emitting element 64 and the Vth of the driving transistor 6402 is applied. The forward voltage in 04 refers to the voltage required to achieve the desired brightness, and It should be noted that the driving transistor 6402 is designed to operate in the saturation region. By inputting an optical signal, a current can be passed through the light emitting element 6404. In order to operate the transistor 6402 in the saturation region, the potential of the power supply line 6407 is The potential of the light emitting element is made higher than the gate potential of the capacitor 6402. A current corresponding to a video signal is passed through 6404, enabling analog gradation driving.

[0314] Note that the pixel configuration shown in Fig. 19 is not limited to this. For example, A switch, a resistor, a capacitor, a transistor, a logic circuit, or the like may be added.

[0315] Next, the configuration of the light emitting element will be described with reference to FIG. 20. Here, the driving TFT is The cross-sectional structure of a pixel will be explained using the example of the type shown in Figures 20(A), (B), and (C). The TFTs 7001, 7011, and 7021, which are driving TFTs used in light-emitting devices, are The thin film transistors can be manufactured in the same manner as in the first to fifth embodiments. It is a thin film transistor with high performance.

[0316] The light emitting element only needs to have at least one of the anode and cathode transparent in order to extract light. Then, a thin film transistor and a light emitting element are formed on the substrate, and light is taken from the surface opposite to the substrate. A top-side emission structure that emits light from the surface on the substrate side, a bottom-side emission structure that emits light from the surface on the substrate side, and a structure that emits light from the substrate side and the substrate There are also light-emitting elements with a double-sided emission structure that emit light from the opposite side of the pixel. The present invention can also be applied to light emitting devices having the following structure.

[0317] A light emitting element with a bottom emission structure will be described with reference to FIG.

[0318] The driving TFT 7011 is an n-type TFT, and the light emitted from the light emitting element 7012 is incident on the first electrode layer 70. 20A shows a cross-sectional view of a pixel when light is emitted to the driving TFT 701. The first conductive film 7017 of the light-emitting element 7012 is electrically connected to the first conductive film 7017. An electrode layer 7013 is formed, and an EL layer 7014 and a second electrode layer 7015 are formed on the first electrode layer 7013. The conductive film 7017 is covered with a protective insulating layer 7035 and a protective insulating layer 7036. The drive current is supplied through contact holes formed in the protective insulating layer 7032 and the oxide insulating layer 7031. It is electrically connected to the drain electrode layer of the active TFT 7011 .

[0319] The light-transmitting conductive film 7017 may be formed of indium oxide containing tungsten oxide, Indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, Titanium-containing indium tin oxide, indium tin oxide, indium zinc oxide, oxide ketone A light-transmitting conductive film such as indium tin oxide to which indium is added can be used.

[0320] In addition, various materials can be used for the first electrode layer 7013 of the light-emitting element. When the electrode layer 7013 is used as a cathode, a material having a small work function is used. For example, alkali metals such as Li and Cs, and alkaline earth metals such as Mg, Ca, and Sr, and alloys containing these (Mg:Ag, Al:Li, etc.), as well as rare earth elements such as Yb and Er. In FIG. 20A, the thickness of the first electrode layer 7013 is set to a thickness that allows light to pass through. (Preferably, about 5 nm to 30 nm) For example, an aluminum film having a thickness of 20 nm is A silicon film is used as the first electrode layer 7013 .

[0321] After a light-transmitting conductive film and an aluminum film are stacked, the film is selectively etched. The light-transmitting conductive film 7017 and the first electrode layer 7013 may be formed by the above method. This is preferable because etching can be performed using the same mask.

[0322] The periphery of the first electrode layer 7013 is covered with a partition wall 7019. The partition wall 7019 is made of polyimide. Organic resin films such as amide, acrylic, polyamide, and epoxy, inorganic insulating films, and organic polysiloxane The partition wall 7019 is formed by using a photosensitive resin material, and the first electrode layer An opening is formed on the surface of the substrate 7013, and the sidewall of the opening has a continuous curvature. It is preferable to form the partition wall 7019 so as to have a flat surface. In this case, the step of forming a resist mask can be omitted.

[0323] The EL layer 7014 formed on the first electrode layer 7013 and the partition wall 7019 is at least The light-emitting layer may be included, and the light-emitting layer may be composed of a single layer or a plurality of layers. When the EL layer 7014 is made up of multiple layers, the cathode and An electron injection layer, an electron transport layer, a light emitting layer, a hole transport layer, and a second electrode layer are formed on the first electrode layer 7013. The hole injection layer and the hole injection layer are laminated in this order. Note that it is not necessary to provide all of these layers.

[0324] The stacking order is not limited to the above, and the first electrode layer 7013 may function as an anode. On the electrode layer 7013, a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer are formed in this order. However, when comparing power consumption, the first electrode layer 7013 is used as a cathode. By this function, an electron injection layer, an electron transport layer, a light emitting layer, a hole transport layer, By stacking the layer in order of the hole injection layer, it is possible to suppress the voltage rise in the drive circuit section and reduce power consumption. This is preferable because it can be done easily.

[0325] In addition, various materials can be used for the second electrode layer 7015 formed on the EL layer 7014. For example, when the second electrode layer 7015 is used as an anode, the work function is large. Materials such as ZrN, Ti, W, Ni, Pt, Cr, ITO, IZO, ZnO, etc. Any transparent conductive material is preferable. Also, a shielding film 7016, for example, For example, a metal that blocks light, a metal that reflects light, or the like is used. In this embodiment, the second electrode layer 7 An ITO film is used as the shielding film 7015 and a Ti film is used as the shielding film 7016 .

[0326] An EL layer 7014 including a light-emitting layer is sandwiched between a first electrode layer 7013 and a second electrode layer 7015. In the case of the element structure shown in FIG. Light emitted from the element 7012 is emitted to the first electrode layer 7013 side as shown by the arrow, The light passes through the color filter layer 7033 and exits to the outside.

[0327] The color filter layer 7033 can be formed by a droplet discharge method such as an ink jet method, a printing method, or a photolithography method. Each is formed by an etching method using graphic technology.

[0328] The color filter layer 7033 is covered with an overcoat layer 7034, which is further provided with a protective insulating layer. In FIG. 20(A), the overcoat layer 7034 is thin. As shown in the figure, the overcoat layer 7034 has irregularities caused by the color filter layer 7033. It has the function of flattening the surface.

[0329] Next, a light emitting element with a dual emission structure will be described with reference to FIG.

[0330] In FIG. 20B, the conductive film 7021 is electrically connected to the driving TFT 7021. A first electrode layer 7023 of a light-emitting element 7022 is formed on the first electrode layer 7027. An EL layer 7024 and a second electrode layer 7025 are laminated in this order on the conductive layer 7023. The film 7027 is formed into a protective insulating layer 7045, a protective insulating layer 7042, and an oxide insulating layer 7041. The drain electrode layer of the driving TFT7021 is electrically connected to the drain electrode layer through the contact hole. It continues.

[0331] The light-transmitting conductive film 7027 may be formed of indium oxide containing tungsten oxide, Indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, Titanium-containing indium tin oxide, indium tin oxide, indium zinc oxide, oxide ketone A light-transmitting conductive film such as indium tin oxide to which indium is added can be used.

[0332] Various materials can be used for the first electrode layer 7023. For example, When 7023 is used as a cathode, a material with a small work function, specifically, for example, Li or Alkali metals such as Cs, and alkaline earth metals such as Mg, Ca, and Sr, and In addition to alloys containing Mg (Mg:Ag, Al:Li, etc.), rare earth metals such as Yb and Er are preferred. In this embodiment mode, the first electrode layer 7023 is used as a cathode, and its thickness is set to a thickness that allows light to pass through. For example, the thickness of an aluminum film having a thickness of 20 nm is set to a value of about 5 nm to 30 nm. An aluminum film is used as the cathode.

[0333] After a light-transmitting conductive film and an aluminum film are stacked, the film is selectively etched. The light-transmitting conductive film 7027 and the first electrode layer 7023 may be formed by the above method. Etching can be preferably performed using the same mask.

[0334] The periphery of the first electrode layer 7023 is covered with a partition wall 7029. The partition wall 7029 is made of polyimide. Organic resin films such as amide, acrylic, polyamide, and epoxy, inorganic insulating films, and organic polysiloxane The partition wall 7029 is formed by using a photosensitive resin material, and the first electrode layer An opening is formed on 7023, and the side walls of the opening are formed with a continuous curvature. It is preferable to form the partition wall 7029 so as to have a flat surface. In this case, the step of forming a resist mask can be omitted.

[0335] The EL layer 7024 formed on the first electrode layer 7023 and the partition wall 7029 is a light-emitting layer. It may be composed of a single layer or multiple layers stacked together. When the EL layer 7024 is composed of multiple layers, the layer that functions as the cathode An electron injection layer, an electron transport layer, a light emitting layer, a hole transport layer, a hole injection layer, and a hole transport layer are formed on the first electrode layer 7023. It is not necessary to provide all of these layers.

[0336] The stacking order is not limited to the above, and the first electrode layer 7023 may be used as an anode, and a hose may be formed on the anode. Alternatively, the layer may be laminated in the following order: hole injection layer, hole transport layer, light emitting layer, electron transport layer, and electron injection layer. However, when comparing power consumption, the first electrode layer 7023 is used as a cathode, and electrons are injected onto the cathode. The stacking order of the injection layer, electron transport layer, light-emitting layer, hole transport layer, and hole injection layer reduces power consumption. is preferable because it is small.

[0337] The second electrode layer 7025 formed on the EL layer 7024 can be made of various materials. For example, when the second electrode layer 7025 is used as an anode, the work function is large. It is preferable to use a transparent conductive material such as ITO, IZO, or ZnO. In this embodiment, the second electrode layer 7025 is used as an anode, and an I Form a TO film.

[0338] An EL layer 7024 including a light-emitting layer is sandwiched between a first electrode layer 7023 and a second electrode layer 7025. In the case of the element structure shown in FIG. The light emitted from the element 7022 travels between the second electrode layer 7025 and the first electrode layer 7026 as shown by the arrows. It is injected onto both sides of the polar layer 7023.

[0339] The color filter layer 7043 can be formed by a droplet discharge method such as an ink jet method, a printing method, or a photolithography method. Each is formed by an etching method using graphic technology.

[0340] The color filter layer 7043 is covered with an overcoat layer 7044, which is further provided with a protective insulating layer. Covered by layer 7045.

[0341] However, if a light-emitting element with a dual-side emission structure is used and both display surfaces are full color, Since light from the second electrode layer 7025 side does not pass through the color filter layer 7043, a separate color filter is required. It is preferable that a sealing substrate provided with a color filter layer be provided above the second electrode layer 7025.

[0342] Next, a light emitting element with a top emission structure will be described with reference to FIG.

[0343] In FIG. 20C, a TFT 7001 which is a driving TFT is an n-type, and a light emitting element 7002 emits light. 20(C) shows a cross-sectional view of a pixel in the case where incident light exits to the second electrode layer 7005 side. ) the first electrode layer 7002 of the light emitting element 7002 electrically connected to the driving TFT 7001. 7003 is formed on the first electrode layer 7003, and an EL layer 7004 and a second electrode layer 7005 are formed on the first electrode layer 7003. 05 are stacked in order.

[0344] Various materials can be used for the first electrode layer 7003. For example, When 7003 is used as a cathode, a material with a small work function, specifically, for example, Li or Alkali metals such as Cs, and alkaline earth metals such as Mg, Ca, and Sr, and In addition to alloys containing Mg (Mg:Ag, Al:Li, etc.), rare earth metals such as Yb and Er are preferred. .

[0345] The periphery of the first electrode layer 7003 is covered with a partition wall 7009. The partition wall 7009 is made of polyimide. Organic resin films such as amide, acrylic, polyamide, and epoxy, inorganic insulating films, and organic polysiloxane The partition wall 7009 is formed by using a photosensitive resin material, and the first electrode layer An opening is formed on 7003, and the sidewall of the opening has a continuous curvature. It is preferable to form the partition wall 7009 so that it has a flat surface. In this case, the step of forming a resist mask can be omitted.

[0346] The EL layer 7004 formed on the first electrode layer 7003 and the partition wall 7009 is at least The light-emitting layer may be included, and the light-emitting layer may be composed of a single layer or a plurality of layers. When the EL layer 7004 is made up of multiple layers, the cathode and An electron injection layer, an electron transport layer, a light emitting layer, a hole transport layer, and The hole injection layer is laminated in this order. Note that it is not necessary to provide all of these layers.

[0347] The stacking order is not limited to the above, and the hole injection onto the first electrode layer 7003 used as the anode may be Alternatively, the layer, hole transport layer, light emitting layer, electron transport layer and electron injection layer may be laminated in this order.

[0348] In Figure 20(C), hole injection is performed on a laminated film in which a Ti film, an aluminum film, and a Ti film are laminated in this order. The electron injection layer, hole transport layer, light emitting layer, electron transport layer, and electron injection layer are stacked in this order, and Mg:A A laminate of a g-alloy thin film and ITO is formed.

[0349] However, when the TFT 7001 is an n-type, an electron injection layer and an electron transport layer are provided on the first electrode layer 7003. The voltage in the drive circuit is lower when the layer, light-emitting layer, hole transport layer, and hole injection layer are stacked in this order. This is preferable because it can suppress the rise in temperature and reduce power consumption.

[0350] The second electrode layer 7005 is formed using a light-transmitting conductive material, for example. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium Indium tin oxide, indium zinc oxide, indium tin oxide with silicon oxide added, etc. A light-transmitting conductive film may be used.

[0351] An EL layer 7004 including a light-emitting layer is sandwiched between a first electrode layer 7003 and a second electrode layer 7005. In the case of the pixel shown in FIG. 20(C), the light-emitting element 7002 is Light emitted from 002 is emitted to the second electrode layer 7005 side as shown by the arrow.

[0352] In FIG. 20C, the drain electrode layer of the TFT 7001 is an oxide insulating layer 705 1, electrically connected to the first electrode layer 7003 via the protective insulating layer 7052 and the protective insulating layer 7055 The planarization insulating layer 7053 is made of polyimide, acrylic, benzocyclobutene, poly In addition to the above resin materials, low dielectric constant resins such as ethylenediamine, propylenediamine, and epoxy resins can be used. Dielectric materials (low-k materials), siloxane resins, PSG (phosphor glass), BPSG (phosphor glass) In addition, insulating films made of these materials can be used in multiple layers. The planarization insulating layer 7053 may be formed by stacking several layers. The formation method is not particularly limited, and may be a sputtering method, an SOG method, a spin coating method, or the like, depending on the material. Dip, spray coating, droplet ejection method (inkjet method, screen printing, offset Printing, etc.), doctor knife, roll coater, curtain coater, knife coater, etc. You can be there.

[0353] In addition, in order to insulate the first electrode layer 7003 from the first electrode layer 7003 of an adjacent pixel, The partition wall 7009 is made of polyimide, acrylic, polyamide, epoxy, etc. The partition wall 700 is formed using an organic resin film such as silicon, an inorganic insulating film, or organic polysiloxane. 9 is made of a photosensitive resin material, and an opening is formed on the first electrode layer 7003. It is preferable that the side wall of the mouth be formed as an inclined surface having a continuous curvature. When a photosensitive resin material is used for the partition wall 7009, a step of forming a resist mask is performed. can be omitted.

[0354] In the structure of FIG. 20C, when full color display is performed, for example, the light emitting element 70 02 is a green light emitting element, one of the adjacent light emitting elements is a red light emitting element, and the other The light-emitting element is a blue light-emitting element. In addition to the three types of light-emitting elements, a white element is also included, making a total of four A light-emitting display device capable of full-color display may be manufactured using a variety of light-emitting elements.

[0355] In the structure of FIG. 20(C), all the light emitting elements are white light emitting elements. A sealing substrate having a color filter or the like is disposed above the light emitting element 7002. A light-emitting display device capable of full color display may be manufactured. By combining a color filter and a color conversion layer, a full color display is achieved. It is possible.

[0356] 20A to 20C show an example in which the thin film transistor and the first electrode layer are in direct contact with each other. 1. As in the fourth embodiment, the drain electrode layer of the thin film transistor and the first electrode layer are Alternatively, the TFT 700 may be electrically connected to the TFT 700 via a connection electrode layer. 1, 7011, and 7021 are also thin films as shown in the second, third, and fifth embodiments. A transistor may also be used.

[0357] Of course, a single-color display may be performed. For example, a lighting device may be formed using white light. Alternatively, a monochromatic light emitting device may be used to form an area color type light emitting device.

[0358] If necessary, an optical film such as a polarizing film, eg, a circular polarizing plate, may be provided.

[0359] Although organic EL elements have been described as light-emitting elements here, inorganic EL elements can also be used as light-emitting elements. It is also possible to provide an L element.

[0360] The thin film transistor (driving TFT) that controls the driving of the light emitting element and the light emitting element are electrically However, the current control TFT is connected between the driving TFT and the light emitting element. The configuration may be such that the power supply is connected to the power supply.

[0361] This embodiment mode can be combined with other embodiment modes as appropriate.

[0362] (Embodiment 8) In this embodiment mode, an example of an element structure of the light-emitting element shown in any of Embodiments 1 to 7 will be described. do.

[0363] The element structure shown in FIG. 21(A) includes a pair of electrodes (a first electrode 1001 and a second electrode 1002) ) and an EL layer 1003 including a light-emitting region is sandwiched between them. In the description of the embodiment, the first electrode 1001 is used as an anode, and the second electrode 10 02 shall be used as the cathode.

[0364] The EL layer 1003 may be formed to include at least a light-emitting layer. The functional layer other than the light-emitting layer may be a layer having a high hole injection property. a substance with high hole transporting properties, a substance with high electron transporting properties, a substance with high electron injecting properties, a bipolar substance, A layer containing a material with a high electron and hole transporting property can be used. Specifically, functional layers such as a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer are appropriately combined. It can be used in combination.

[0365] The light-emitting element shown in FIG. 21(A) is formed between a first electrode 1001 and a second electrode 1002. The resulting potential difference causes a current to flow, and holes and electrons recombine in the EL layer 1003, causing light to be emitted. In other words, the EL layer 1003 is configured to form a light-emitting region.

[0366] Light is emitted through either the first electrode 1001 or the second electrode 1002, or both. Therefore, the power is taken out to the outside by either the first electrode 1001 or the second electrode 1002. One or both of the layers are made of a material having light-transmitting properties.

[0367] The EL layer is disposed between the first electrode 1001 and the second electrode 1002 as shown in FIG. 21(B). In the case of a laminated structure of n layers (n is a natural number of 2 or more), Between the mth (m is a natural number, 1 to n-1) EL layer and the (m+1)th EL layer It is preferable that a charge generating layer 1004 is provided for each of the first and second electrodes.

[0368] The charge generating layer 1004 may be a composite material of an organic compound and a metal oxide, a metal oxide, an organic compound, and a Alkali metals, alkaline earth metals, or composite materials with these compounds, as well as Examples of composite materials of organic compounds and metal oxides include Examples include organic compounds and metal oxides such as V2O5, MoO3, and WO3. Examples of the compounds include aromatic amine compounds, carbazole derivatives, aromatic hydrocarbons, and polymer compounds (oligosaccharides). Various compounds such as copolymers, dendrimers, polymers, etc. can be used. As for organic compounds, hole-transporting organic compounds with a hole mobility of 10 -6 cm 2 / Vs or later However, it is preferable to use a material that has a higher hole transporting property than an electron transporting property. If desired, other materials may be used. The material has excellent carrier injection and carrier transport properties, enabling low current operation of light-emitting devices. It is possible.

[0369] The charge generating layer 1004 is made of a composite material of an organic compound and a metal oxide, and other materials. For example, a layer containing a composite material of an organic compound and a metal oxide and a layer containing an electron transport material may be formed. A compound selected from the electron donating materials is combined with a layer containing a compound having high electron transport properties. Alternatively, a layer containing a composite material of an organic compound and a metal oxide and a transparent conductive film may be combined. may be formed in combination with each other.

[0370] A light-emitting element having such a configuration is less likely to suffer from problems such as energy transfer and quenching. By expanding the range of materials available, light-emitting devices can be made that have both high luminous efficiency and a long lifespan. It is also easy to obtain phosphorescence in one EL layer and fluorescence in the other. .

[0371] The charge generating layer 1004 is formed by applying a voltage between the first electrode 1001 and the second electrode 1002. When the charge generation layer 1004 is formed on the EL layer 1003, holes are generated. The other EL layer 1001 has a function of injecting ions into the EL layer 1002 and a function of injecting electrons into the other EL layer 1003 .

[0372] The light-emitting element shown in FIG. 21(B) can be variously produced by changing the type of light-emitting substance used in the light-emitting layer. In addition, it is possible to obtain various luminescent colors by using multiple luminescent materials with different luminescent colors. By using such a material, it is possible to obtain light emission with a broad spectrum or white light emission.

[0373] When white light is obtained using the light-emitting element shown in FIG. 21(B), a combination of a plurality of light-emitting layers is used. The light source may be configured to emit white light containing red, blue, and green light. The first EL layer contains a fluorescent material as a light-emitting material, and the second EL layer contains green and red phosphorescent materials as light-emitting materials. In addition, a first EL layer that emits red light and a second EL layer that contains The second EL layer emits green light, and the third EL layer emits blue light. Alternatively, even if the device has a light-emitting layer that emits light of complementary colors, it can emit white light. In a stacked element in which two EL layers are stacked, the color emitted from the first EL layer is When the color of the light emitted from the first EL layer and the color of the light emitted from the second EL layer are in a complementary color relationship, Examples of color relationships include blue and yellow, or blue-green and red.

[0374] In the configuration of the above-mentioned stacked element, a charge generating layer may be disposed between the stacked EL layers. By doing so, it is possible to realize a long-life element in the high-brightness region while maintaining a low current density. In addition, the voltage drop due to the resistance of the electrode material can be reduced, allowing for uniform light emission over a large area. This becomes possible.

[0375] This embodiment mode can be combined with any one of the first to seventh embodiments.

[0376] (Embodiment 9) In this embodiment mode, the appearance and cross section of a light-emitting display panel (also referred to as a light-emitting panel) will be described with reference to FIGS. 22 is a diagram showing a thin film transistor and a thin film transistor formed on a first flexible substrate. 10 is a plan view of a panel in which a light-emitting element and a second flexible substrate are sealed with a sealant. 22(B) corresponds to a cross-sectional view taken along line HI in FIG. 22(A).

[0377] A pixel portion 4502, a signal line driver circuit 4503a, and a signal line driver circuit 4503b are provided over a first flexible substrate 4501. The sealing material 4 is formed so as to surround the gate electrodes 4503b and the scanning line driver circuits 4504a and 4504b. 505 is provided. In addition, a pixel portion 4502, signal line driver circuits 4503a and 4503b A second flexible substrate 4506 is provided on the scanning line driver circuits 4504a and 4504b. Therefore, the pixel portion 4502, the signal line driver circuits 4503a and 4503b, and the scanning line The driver circuits 4504a and 4504b are formed by a first flexible substrate 4501, a sealant 4505, and a second flexible substrate 4502. The flexible substrate 4506 is sealed together with the filler material 4507. A protective film (laminating film) with high airtightness and low outgassing to prevent exposure to the outside air It is preferable to package (enclose) the product in a protective film (such as a film or ultraviolet curing resin film) or a cover material. stomach.

[0378] A pixel portion 4502 and a signal line driver circuit 4503 are provided on the first flexible substrate 4501. The scanning line driver circuits 4503a and 4503b and the scanning line driver circuits 4504a and 4504b are made of a plurality of thin film transistors. In FIG. 22B, a thin film transistor 4510 included in a pixel portion 4502 and a thin film transistor 4509 included in the signal line driver circuit 4503a are illustrated.

[0379] The thin film transistors 4509 and 4510 each include the oxide semiconductor layer described in any of Embodiments 1 to 5. Highly reliable thin film transistors including the thin film transistors for the driver circuits can be applied. The transistor 4509 may be the thin film transistors 180 and 181 shown in any of the first to fifth embodiments. 182, as the thin film transistor 4510 for the pixel, the thin film transistors 170, 171 , 172 can be used. In this embodiment, the thin film transistors 4509, 4 510 is an n-channel thin film transistor.

[0380] The oxide semiconductor layer of the thin film transistor 4509 for the driver circuit is formed over the insulating layer 4544. A conductive layer 4540 is provided in a position overlapping the channel forming region. By placing the gate electrode at a position overlapping the channel formation region of the semiconductor layer, the The amount of change in the threshold voltage of the thin film transistor 4509 can be reduced. The potential of the gate electrode layer 4540 may be the same as that of the gate electrode layer of the thin film transistor 4509 or may be different. The conductive layer 4 may be formed of a metal or a silicon dioxide film, and may function as a second gate electrode layer. The potential of 540 may be GND, 0V, or may be in a floating state.

[0381] Although not shown, the oxide insulating layer 4542 and the insulating layer 4544 may be formed by a method similar to that described in Embodiment 1. Such a protective insulating layer 106 may be provided.

[0382] In addition, the thin film transistor 4510 is electrically connected to a first electrode layer 4517 .

[0383] The oxide insulating layer 4542 was formed using a material and a method similar to those of the oxide insulating film 107 described in Embodiment 1. It can be formed as follows.

[0384] A color filter layer 4545 is formed on the oxide insulating layer 4541 so as to overlap with the light-emitting region of the light-emitting element 4511. Formed on 4542.

[0385] It also functions as a planarizing insulating film to reduce the surface irregularities of the color filter layer 4545. It is covered with an overcoat layer 4543 .

[0386] In addition, an insulating layer 4544 is formed on the overcoat layer 4543. The protective insulating layer 109 may be formed using a material and a method similar to those of the protective insulating layer 109 described in Embodiment 1.

[0387] Further, 4511 corresponds to a light-emitting element, and a first electrode layer which is a pixel electrode of the light-emitting element 4511 The thin film transistor 4510 is electrically connected to the source electrode layer or the drain electrode layer of the thin film transistor 4517. The light emitting element 4511 is configured with a first electrode layer 4517, an electroluminescent layer 45 12, and the second electrode layer 4513, but is not limited to the structure shown. The configuration of the light emitting element 4511 can be changed appropriately according to the direction of the light extracted from 511. can be done.

[0388] The partition wall 4520 is formed using an organic resin film, an inorganic insulating film, or organic polysiloxane. In particular, a photosensitive material is used to form an opening on the first electrode layer 4517, and the sidewall of the opening It is preferable to form the inclined surface so that the inclined surface has a continuous curvature.

[0389] The electroluminescent layer 4512 may be composed of a single layer or a plurality of layers stacked. It doesn't matter whether it's done or not.

[0390] The second electrode layer is formed to prevent oxygen, hydrogen, moisture, carbon dioxide, and the like from entering the light-emitting element 4511. A protective film may be formed on the partition wall 4513 and the partition wall 4520. The protective film may be a silicon nitride film, A silicon nitride oxide film, a DLC film, or the like can be formed.

[0391] In addition, signal line driver circuits 4503a and 4503b, scanning line driver circuits 4504a and 4504b Various signals and potentials applied to the pixel portion 4502 are transmitted through the FPC 4518a, 4518b, and It is supplied by b.

[0392] The connection terminal electrode 4515 is made of the same conductive film as the first electrode layer 4517 of the light emitting element 4511. The terminal electrode 4516 is formed from the source electrode layer and the drain electrode layer of the thin film transistor 4509. The conductive film is formed from the same conductive film as the electrode layer.

[0393] The connection terminal electrode 4515 is connected to the terminal of the FPC 4518a via the anisotropic conductive film 4519. are electrically connected to each other.

[0394] The flexible substrate positioned in the direction of light extraction from the light emitting element 4511 is a second substrate that is transparent. In this case, the material must be plastic, polyester film or aluminum. A light-transmitting material such as Kryl film is used.

[0395] In addition to inert gases such as nitrogen and argon, filler 4507 can also be used as UV-curable resin. It can be made of oil or thermosetting resin, and PVC (polyvinyl chloride), acrylic, Polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EV A (ethylene vinyl acetate) can be used. For example, nitrogen can be used as a filler. That's fine.

[0396] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) may be provided on the light-emitting surface of the light-emitting element. Optical films such as retardation plates (λ / 4 plates, λ / 2 plates) and color filters may be provided as appropriate. In addition, an anti-reflection film may be provided on the polarizing plate or the circular polarizing plate. Anti-glare treatment can be applied to diffuse reflected light and reduce glare.

[0397] The signal line driver circuits 4503a and 4503b and the scanning line driver circuits 4504a and 4504b are , a single-crystal semiconductor film or a polycrystalline semiconductor film formed on a separately prepared flexible substrate The signal line driver circuit may be mounted on the scanning line driver circuit. Only the drive circuit or only a part of it may be separately formed and mounted, and is not limited to the configuration of FIG. do not have.

[0398] Through the above steps, a highly reliable light-emitting device (display panel) can be manufactured as a semiconductor device. This can be done.

[0399] (Embodiment 10) In this embodiment mode, at least a part of the driver circuit and a pixel portion are disposed on the same flexible substrate. An example of fabricating a thin film transistor will be described below.

[0400] The thin film transistors disposed in the pixel portion are formed according to any one of Embodiments 1 to 5. The thin film transistors shown in the first to fifth embodiments are n-channel TFTs, so that the Among them, part of the driver circuit can be configured with n-channel TFTs. The transistor is formed on the same flexible substrate.

[0401] An example of a block diagram of an active matrix display device is shown in FIG. A pixel portion 5301, a first scanning line driver circuit 5302, a second scanning line driver circuit 5303, and a third scanning line driver circuit 5304 are provided on a flexible substrate 5300. The pixel portion 5301 has a scan line driver circuit 5303 and a signal line driver circuit 5304. Signal lines are arranged extending from a signal line driver circuit 5304, and a plurality of scanning lines are arranged in a first scanning line driver circuit. The second scanning line driver circuit 5302 and the second scanning line driver circuit 5303 are arranged to extend from each other. At the intersections of the scanning lines and the signal lines, pixels each having a display element are arranged in a matrix. The flexible substrate 5300 of the display device is an FPC (Flexible Printed Circuit). The timing control circuit 5305 (controller 5306) is connected to the timing control circuit 5305 via a connection part such as a timing control circuit (controller 5306). The power supply is connected to the power supply (also called a controller or control IC).

[0402] In FIG. 12A, a first scanning line driver circuit 5302, a second scanning line driver circuit 5303, a signal The signal driver circuit 5304 is formed on the same flexible substrate 5300 as the pixel portion 5301. Therefore, the number of external components such as drive circuits can be reduced, which contributes to cost reduction. In addition, when a driving circuit is provided outside the flexible substrate 5300, it becomes necessary to extend the wiring. If a driver circuit is provided on the same flexible substrate 5300, the number of connections between the wirings increases. The number of connections between wiring can be reduced, improving reliability and yield. Cut.

[0403] The timing control circuit 5305 controls the first scanning line driver circuit 5302 as follows: The first scanning line driving circuit start signal (GSP1), the scanning line driving circuit clock signal (GCK1). The timing control circuit 5305 also supplies the second scanning line driving circuit For example, the second scanning line driver circuit start signal (GSP2) (start The signal line supplies the clock signal (GCK2) for the scanning line driver circuit. The driver circuit 5304 is provided with a start signal (SSP) for the signal line driver circuit, a clock for the signal line driver circuit, and a Clock signal (SCK), video signal data (DATA) (also simply called video signal), Each clock signal is a multiple of clock signals with different periods. It may be a clock signal or may be supplied together with an inverted clock signal (CKB). The first scanning line driver circuit 5302 and the second scanning line driver circuit 53 It is possible to omit either 03 or 04.

[0404] In FIG. 12B, circuits with low driving frequencies (for example, the first scanning line driving circuit 5302, the The second scanning line driver circuit 5303 is formed on the same flexible substrate 5300 as the pixel portion 5301, and 53 shows a configuration in which a line driver circuit 5304 is formed on a substrate different from that of the pixel portion 5301. This structure allows for a lower field-effect mobility than a transistor using a single crystal semiconductor. The driving circuit formed on the flexible substrate 5300 is configured by thin film transistors. Therefore, it is possible to increase the size of the display device, reduce costs, improve yields, etc. It is possible.

[0405] The thin film transistors described in Embodiments 1 to 5 are n-channel TFTs. 3(A) and 13(B) show the configuration and operation of a signal line driver circuit configured with n-channel TFTs. An example will be given below.

[0406] The signal line driver circuit includes a shift register 5601 and a switching circuit 5602 . The switching circuit 5602 is composed of switching circuits 5602_1 to 5602_N (N is a natural number). The switching circuits 5602_1 to 5602_N each have a plurality of circuits. , a plurality of thin film transistors 5603_1 to 5603_k (k is a natural number) The thin film transistors 5603_1 to 5603_k are N-channel TFTs. An example will be explained.

[0407] The connection relationship of the signal line driver circuit will be described using the switching circuit 5602_1 as an example. The first terminals of the thin film transistors 5603_1 to 5603_k are connected to the wirings 5604_1 The second terminals of the thin film transistors 5603_1 to 5603_k are connected to the first terminals of the thin film transistors 5603_1 to 5603_k. are connected to the signal lines S1 to Sk, respectively. The gate of k is connected to the wiring 5605_1.

[0408] The shift register 5601 sequentially outputs H level (H signal) to the wirings 5605_1 to 5605_N. , also referred to as a high power supply potential level), and the switching circuits 5602_1 to 56 It has the function of selecting 02_N in order.

[0409] The switching circuit 5602_1 is connected to the wirings 5604_1 to 5604_k and the signal lines S1 to Sk. the wiring 5604_ The switches have the function of controlling whether or not the potentials of 1 to 5604_k are supplied to the signal lines S1 to Sk. In this way, the switching circuit 5602_1 has a function as a selector. The transistors 5603_1 to 5603_K are connected to the wirings 5604_1 to 5604_k, respectively. A function of controlling the conduction state of the signal lines S1 to Sk, that is, the wirings 5604_1 to 5604_k The thin film transistor 560 has a function of supplying a potential to the signal lines S1 to Sk. Each of 3_1 to 5603_K has a function as a switch.

[0410] The wirings 5604_1 to 5604_k each carry video signal data (DATA). The video signal data (DATA) is an analog signal corresponding to the image information or image signal. This is often a signal.

[0411] Next, the operation of the signal line driver circuit of FIG. 13(A) will be explained with reference to the timing chart of FIG. 13(B). 13B shows signals Sout_1 to Sout_N and An example of Vdata_1 to Vdata_k is shown. are examples of output signals of the shift register 5601, and signals Vdata_1 to Vdata _k are examples of signals input to the wirings 5604_1 to 5604_k, respectively. One operation period of the signal line driving circuit corresponds to one gate selection period in the display device. The selection period is divided into periods T1 to TN, for example. This is the period for writing video signal data (DATA) to the pixels belonging to the selected row. be.

[0412] In the drawings of the present embodiment, the signal waveforms of the components are rounded for clarity. Therefore, the scale may not necessarily be limited to that shown. It should be noted that

[0413] During the period T1 to the period TN, the shift register 5601 outputs a high-level signal to the wiring 560 For example, in the period T1, the shift registers 5 601 outputs a high-level signal to the wiring 5605_1. 5603_1 to 5603_k are turned on, so the wiring 5604_1 to 5604_k and the signal At this time, the wirings 5604_1 to 5604_k are in a conductive state. Data(S1)~Data(Sk) are input. Data(S1)~Data(Sk ) belong to the selected row via thin film transistors 5603_1 to 5603_k. In this way, during the periods T1 to TN, the pixels in the first to k-th columns are written. Then, the video signal data (DATA) is sent to the pixels belonging to the selected row in order of k columns. It will be written.

[0414] As described above, video signal data (DATA) is written to pixels in multiple columns. This makes it possible to reduce the number of video signal data (DATA) or the number of wirings. This reduces the number of connections to external circuits. By writing directly to the memory, the writing time can be increased, and the video signal can be written This can prevent under-crowding.

[0415] The shift register 5601 and the switching circuit 5602 are the same as those in the first embodiment. It is possible to use a circuit configured with thin film transistors shown in the above to 5. The polarity of all the transistors in the soft resistor 5601 is set to N-channel or P-channel. The polarity of the casing can be either one of the polarities.

[0416] The configuration of the scanning line driving circuit will be described. The scanning line driving circuit includes a shift register, a buffer, and a In some cases, a level shifter, a buffer, etc. may also be included. In the scanning line driving circuit, a clock signal (CLK) and a start pulse are input to the shift register. The selection signal is generated by inputting the selection signal (SP). are buffered and amplified in the buffer and supplied to the corresponding scanning line. The gate electrodes of the transistors of the pixels for one line are connected. Since the transistors must be turned on simultaneously, the buffer can pass a large current. Whatever is available is used.

[0417] Regarding one form of a shift register used in a part of a scanning line driver circuit and / or a signal line driver circuit, This will be explained with reference to FIGS. 14 and 15.

[0418] Regarding the shift registers of the scanning line driver circuit and the signal line driver circuit, please refer to FIGS. 14 and 15. The shift register includes the first pulse output circuit 10_1 to the Nth pulse output circuit 10_2. The path 10_N (N≧3) is a natural number (see FIG. 14A). The first pulse output circuit 10_1 to the N-th pulse output circuit 10_N of the shift register are A first clock signal CK1 is output from the first wiring 11, and a second clock signal CK2 is output from the second wiring 12. a third clock signal CK2 from the third wiring 13; a fourth clock signal CK3 from the fourth wiring 14; A clock signal CK4 is supplied to the first pulse output circuit 10_1. The start pulse SP1 (first start pulse) is input from the 5th stage. In the n-th pulse output circuit 10_n (n is a natural number of 2≦n≦N), the pulse The signal from the output circuit 10_n-1 (called the previous stage signal OUT(n-1)) (n≧2, a natural number) ) is input to the first pulse output circuit 10_1. Similarly, the signal from the n-th pulse output circuit 10_3 in the second stage or later is input. In _n, the signal from the (n+2)th pulse output circuit 10_(n+2) in the second stage (later stage Therefore, the pulse output circuit of each stage outputs a signal OUT(n+2). a first output signal (OUT( 1) (SR) to OUT(N)(SR)), a second output signal electrically connected to another wiring, etc. As shown in FIG. 14(A), the signal (OUT(1) to OUT(N)) is output. Since the last two stages of the soft register do not receive the next stage signal OUT(n+2), As an example, a second start pulse SP2 and a third start pulse SP3 are separately generated. The configuration may be such that the above is input.

[0419] The clock signal (CK) alternates between H level and L level (L signal, low power supply potential) at regular intervals. Here, the first clock signal (CK1) to the second clock signal (CK2) are signals that repeat a cycle of 1 / 2 levels. The fourth clock signal (CK4) is delayed by 1 / 4 cycle in order. The first clock signal (CK1) to the fourth clock signal (CK4) are used to generate a pulse output circuit. The clock signal is controlled by the GCK It is sometimes called SCK, but here we will explain it as CK.

[0420] The first input terminal 21, the second input terminal 22, and the third input terminal 23 are connected to the first wiring 11 to It is electrically connected to any one of the fourth wirings 14. For example, in FIG. The first pulse output circuit 10_1 has a first input terminal 21 electrically connected to the first wiring 11. The second input terminal 22 is electrically connected to the second wiring 12, and the third input terminal 23 is The second pulse output circuit 10_2 is electrically connected to the third wiring 13. The first input terminal 21 is electrically connected to the second wiring 12, and the second input terminal 22 is electrically connected to the third wiring The third input terminal 23 is electrically connected to the fourth wiring 14. There are.

[0421] Each of the first pulse output circuit 10_1 to the N-th pulse output circuit 10_N has a first input terminal 21, a second input terminal 22, a third input terminal 23, a fourth input terminal 24, a fifth input terminal 14B, the input terminal 25, the first output terminal 26, and the second output terminal 27. In the first pulse output circuit 10_1, a first clock signal is input to a first input terminal 21. A first clock signal CK1 is input to the first input terminal 21, a second clock signal CK2 is input to the second input terminal 22, and a third clock signal CK3 is input to the third input terminal 23. A third clock signal CK3 is input to the input terminal 23 of the clock generator 10, and a start signal CK4 is input to the fourth input terminal 24 of the clock generator 10. A pulse is input, the subsequent signal OUT(3) is input to the fifth input terminal 25, and the first output The first output signal OUT(1)(SR) is output from the terminal 26, and the second output signal OUT(1)(SR) is output from the second output terminal 27. The second output signal OUT(1) is output.

[0422] The first pulse output circuit 10_1 to the N-th pulse output circuit 10_N are three-terminal thin film transistors. In addition to transistors (also called TFTs: Thin Film Transistors), The four-terminal thin film transistor described in the above embodiment can be used. 1 shows a symbol of the four-terminal thin film transistor 28 described in the above embodiment. The symbol of the thin film transistor 28 shown in FIG. 14(C) is the same as that of any of the first to fifth embodiments. This refers to the four-terminal thin film transistor described above, and will be used in the drawings and the like below. In this specification, a thin film transistor has two gate electrodes via a semiconductor layer. In this case, the gate electrode below the semiconductor layer is called the lower gate electrode, and the gate electrode above the semiconductor layer is called the upper gate electrode. The gate electrode of the thin film transistor 28 is also called the upper gate electrode. and a second control signal G2 input to the upper gate electrode. It is an element that can perform electrical control between the In terminal and the Out terminal.

[0423] When an oxide semiconductor is used for a semiconductor layer including a channel formation region of a thin film transistor, The threshold voltage may shift to the negative or positive side depending on the process. Therefore, in a thin film transistor using an oxide semiconductor for a semiconductor layer including a channel formation region, A configuration that allows the threshold voltage to be controlled is preferable. The threshold voltage of the thin film transistor 28 is controlled by gate electrodes above and below the channel forming region of the thin film transistor 28. A gate electrode is provided through a gate insulating film, and the potential of the upper and / or lower gate electrodes is controlled. By doing so, it is possible to control the temperature to a desired value.

[0424] Next, an example of a specific circuit configuration of the pulse output circuit will be described with reference to FIG.

[0425] The first pulse output circuit 10_1 includes a first transistor 31 to a thirteenth transistor 43. (See FIG. 14(D)). In addition, the first input terminal 21 to the fifth input terminal a first output terminal 25, a first output terminal 26, a second output terminal 27, and a first high power supply potential VDD a power supply line 51 to which a second high power supply potential VCC is supplied, a power supply line 52 to which a low power supply potential The first transistor 31 to the thirteenth transistor 4 are connected to the power supply line 53 to which VSS is supplied. A signal or a power supply potential is supplied to 3. Here, the magnitude of the power supply potential of each power supply line in FIG. The minor relationship is that the first power supply potential VDD is equal to or higher than the second power supply potential VCC, and The potential VCC is set to a potential higher than the third power supply potential VSS. The fourth clock signal (CK1) to the fourth clock signal (CK4) alternate between high and low levels at regular intervals. It is a signal, but when it is at H level it is VDD and when it is at L level it is VSS. By making the potential VDD of the power supply line 51 higher than the potential VCC of the power supply line 52, the operation is not affected. The potential applied to the gate electrode of the transistor can be kept low without causing a problem. This reduces the threshold shift of the transistor and suppresses degradation. ), among the first transistor 31 to the thirteenth transistor 43, the first The sixth transistor 31, the sixth transistor 36 to the ninth transistor 39 are connected to the transistors shown in FIG. It is preferable to use a four-terminal thin film transistor 28 shown in (C). The sixth transistor 31, the sixth transistor 36 to the ninth transistor 39 are connected to the source or drain of the The potential of the node to which one of the electrodes is connected is switched by the control signal of the gate electrode. It is a transistor that is required to respond to a control signal input to the gate electrode. Fast response (steep rise of on-current) reduces malfunction of pulse output circuits Therefore, the four-terminal thin-film transistor shown in Figure 14(C) By using the resistor 28, the threshold voltage can be controlled, and malfunctions can be further reduced. In FIG. 14(D), the first control signal G1 and Although the second control signal G2 is the same control signal, a different control signal may be input. good.

[0426] In FIG. 14(D), the first terminal of the first transistor 31 is electrically connected to the power supply line 51. The second terminal is electrically connected to the first terminal of the ninth transistor 39, and the gate electrode ( The lower gate electrode and the upper gate electrode are electrically connected to the fourth input terminal 24. The second transistor 32 has a first terminal electrically connected to the power supply line 53 and a second terminal a gate electrode electrically connected to the first terminal of the ninth transistor 39; The third transistor 33 has a first terminal electrically connected to the gate electrode of the third transistor 34. The first terminal is electrically connected to the input terminal 21, and the second terminal is electrically connected to the first output terminal 26. The fourth transistor 34 has a first terminal electrically connected to the power supply line 53 and a second terminal electrically connected to the power supply line 53. The second terminal is electrically connected to the first output terminal 26. The fifth transistor 35 One terminal is electrically connected to the power supply line 53, and the second terminal is connected to the gate voltage of the second transistor 32. and the gate electrode of the fourth transistor 34, the gate electrode of which is electrically connected to the fourth input The sixth transistor 36 has a first terminal electrically connected to the power supply line 5. 2, and the second terminal is electrically connected to the gate electrode of the second transistor 32 and the fourth transistor The gate electrode (the lower gate electrode and the upper gate electrode) of the transistor 34 is electrically connected to the gate electrode of the transistor 34. The gate electrode of the seventh transistor 3 is electrically connected to the fifth input terminal 25. The first terminal of the transistor 7 is electrically connected to the power supply line 52, and the second terminal of the transistor 38 is electrically connected to the power supply line 52. The gate electrodes (lower gate electrode and upper gate electrode) are electrically connected to the second terminal. The eighth transistor 38 is electrically connected to the third input terminal 23. The gate electrode of the second transistor 32 and the gate electrode of the fourth transistor 34 are electrically connected to each other. and the gate electrodes (lower gate electrode and upper gate electrode) are connected to the second input terminal 2 The ninth transistor 39 has a first terminal electrically connected to the first transistor 2. The second terminal is electrically connected to the second terminal of the first transistor 31 and the second terminal of the second transistor 32. The gate electrode of the third transistor 33 and the gate electrode of the tenth transistor 40 are supplied with a voltage. The gate electrodes (lower gate electrode and upper gate electrode) are electrically connected to the power supply line 52. The tenth transistor 40 has a first terminal electrically connected to the first input terminal 21. , the second terminal is electrically connected to the second output terminal 27, and the gate electrode is The second terminal of the ninth transistor 39 is electrically connected to the second terminal of the eleventh transistor 4 1 has a first terminal electrically connected to the power supply line 53 and a second terminal electrically connected to the second output terminal 27. and the gate electrode of the second transistor 32 and the gate electrode of the fourth transistor The twelfth transistor 42 is electrically connected to the gate electrode of the first terminal is electrically connected to the power supply line 53, the second terminal is electrically connected to the second output terminal 27, The gate electrode of the seventh transistor 37 (the lower gate electrode and the upper gate electrode) The thirteenth transistor 43 has a first terminal electrically connected to the power supply line 53. , the second terminal is electrically connected to the first output terminal 26, and the gate electrode is The gate electrodes (lower gate electrode and upper gate electrode) of the seventh transistor 37 are electrically connected. are actively connected.

[0427] In FIG. 14D, the gate electrode of the third transistor 33, the gate electrode of the tenth transistor 4 The connection point of the gate electrode of the ninth transistor 30 and the second terminal of the ninth transistor 39 is referred to as node A. The gate electrode of the second transistor 32, the gate electrode of the fourth transistor 34, the second terminal of the fifth transistor 35, the second terminal of the sixth transistor 36, the second terminal of the eighth transistor The connection point between the first terminal of the eleventh transistor 38 and the eleventh transistor 41 is referred to as node B (see FIG. 1). 5(A)).

[0428] A thin film transistor is a transistor having at least three elements including a gate, a drain, and a source. An element having terminals, and a channel region between a drain region and a source region, A current can be passed through the drain region, the channel region, and the source region. The source and drain vary depending on the structure and operating conditions of the thin film transistor. Therefore, it is difficult to determine whether the source or drain is the source or drain. The region that functions as a drain is sometimes not called a source or drain. For example, they may be referred to as the first terminal and the second terminal, respectively.

[0429] In FIG. 14(D) and FIG. 15(A), the node A is set to the floating state. A capacitor may be provided separately to perform a strap operation. To achieve this, a capacitor having one electrode electrically connected to the node B may be provided separately.

[0430] Here, the timing of the shift register having a plurality of pulse output circuits shown in FIG. A shift chart is shown in FIG. 15(B). In this case, the period 61 in FIG. 15(B) corresponds to the vertical blanking period, and the period 62 corresponds to the gate selection period. do.

[0431] As shown in FIG. 15A, the ninth transistor, whose gate is supplied with the second power supply potential VCC, By providing the transistor 39, the following occurs before and after the bootstrap operation: There are advantages like this.

[0432] If the ninth transistor 39 having the second potential VCC applied to its gate electrode is not present, the boot When the potential at node A rises due to the strapping operation, the second terminal of the first transistor 31 The potential of the source, which is the first power supply potential VDD, rises and becomes higher than the first power supply potential VDD. The source of the first transistor 31 is switched to the first terminal side, that is, the power supply line 51 side. In the first transistor 31, the gate and source are electrically connected to each other, and the gate and drain are electrically connected to each other. In addition, a large bias voltage is applied, which causes a large stress and leads to transistor deterioration. Therefore, the ninth transistor, to whose gate electrode the second power supply potential VCC is applied, By providing transistor 39, the potential of node A is However, the potential of the second terminal of the first transistor 31 does not increase. That is, by providing the ninth transistor 39, the first transistor The negative bias voltage applied between the gate and source of the transistor 31 can be reduced. Therefore, by using the circuit configuration of this embodiment, the gate of the first transistor 31 The negative bias voltage applied between the gate and source can also be reduced, reducing the first-order This can suppress the deterioration of the transistor 31.

[0433] The ninth transistor 39 is provided at a location corresponding to the second gate of the first transistor 31. and a gate of the third transistor 33 via a first terminal and a second terminal. In this embodiment, a system having a plurality of pulse output circuits may be provided. In the case of a soft register, the signal line driver circuit has more stages than the scanning line driver circuit. The resistor 39 may be omitted, which has the advantage of reducing the number of transistors.

[0434] Note that the semiconductor layers of the first to thirteenth transistors 31 to 43 are made of oxide semiconductor. By using a conductor, the off-current of the thin film transistor is reduced, and the on-current and This allows for increased field effect mobility and reduced degradation. In addition, a transistor including an oxide semiconductor can: Compared to transistors using amorphous silicon, a high potential is applied to the gate electrode. Therefore, the degree of deterioration of the transistor due to the second power supply potential VCC is small. The same operation can be obtained by supplying the first power supply potential VDD to the power supply line. Since the number of power supply lines can be reduced, the circuit can be made smaller.

[0435] The gate electrodes (lower gate electrode and upper gate electrode) of the seventh transistor 37 the clock signal provided by the third input terminal 23 to the gate of the eighth transistor 38 The voltage supplied to the gate electrodes (lower gate electrode and upper gate electrode) by the second input terminal 22 is The clock signal is applied to the gate electrode of the seventh transistor 37 (the lower gate electrode and the upper gate electrode). a clock signal provided by the second input terminal 22 to the gate electrode of the eighth transistor; The gate electrodes (lower gate electrode and upper gate electrode) of the gate electrode 38 are connected to the third input terminal 23. Therefore, the same effect can be achieved by rearranging the wiring so that the clock signal is supplied. In the shift register shown in FIG. 15A, the seventh transistor 37 and The seventh transistor 37 is turned off, and the eighth transistor 38 is turned on. The seventh transistor 37 is turned off, and the eighth transistor 38 is turned on. By turning off the inverter 38, the second input terminal 22 and the third input terminal 23 The voltage drop at node B is caused by the voltage drop at the gate of the seventh transistor 37. The potential of the gate electrode of the eighth transistor 38 decreases. On the other hand, in the shift register shown in FIG. 15(A), the seventh The seventh transistor 37 and the eighth transistor 38 are both in an on state. is on, the eighth transistor 38 is off, and then the seventh transistor 37 is off. , the eighth transistor 38 is turned off, so that the second input terminal 22 and The voltage drop at the node B caused by the voltage drop at the input terminal 23 of the third transistor is The potential of the gate electrode of the transistor 38 can be reduced to one time. The gate electrodes (lower gate electrode and upper gate electrode) of the seventh transistor 37 are connected to the third A clock signal CK3 is supplied from the input terminal 23, and the gate electrode of the eighth transistor 38 (the lower gate electrode and the upper gate electrode) receive a clock signal CK from the second input terminal 22. 2 is supplied because the number of times the potential of node B changes This is preferable because it reduces the noise and the amount of noise.

[0436] In this way, the potentials of the first output terminal 26 and the second output terminal 27 are maintained at the L level. By configuring the node B to periodically receive a high-level signal during this period, the pulse output This can suppress malfunction of the power circuit.

[0437] (Embodiment 11) The light emitting device disclosed in this specification can be applied to various electronic devices (including gaming machines). The electronic device can be, for example, a television device (television or television receiver) (also called signal processors), computer monitors, digital cameras, digital video cameras , digital photo frames, mobile phones (also called mobile phones or mobile phone devices), portable games Examples include gaming machines, mobile information terminals, sound reproduction devices, and large game machines such as pachinko machines. .

[0438] In this embodiment mode, a flexible light emitting device formed by applying the above embodiment mode is used. An example of application to a telephone is shown in FIGS.

[0439] FIG. 23(C) is a front view of the mobile phone, and FIG. 23(D) is a side view of the mobile phone. 23(B) is a vertical view of the mobile phone, and the housings are made up of housings 1411a and 1411b. At least the display area of the housings 1411a and 1411b is made of a transparent holding member. FIG. 23(A) is a cross-sectional view of the inside of the housing 1411a and the housing 1411b. When viewed from the front, 411a has a rectangular shape with long and short sides, and the corners of the rectangle are rounded. In this embodiment, the direction parallel to the long side of the rectangular front shape is the longitudinal direction. The direction parallel to the short side is called the transverse direction.

[0440] The shapes of the housings 1411a and 1411b when viewed from the side are also rectangular with long and short sides. In this embodiment, the long side of the rectangular shape is The direction parallel to the sides is the longitudinal direction, and the direction parallel to the short sides is called the depth direction.

[0441] The mobile phone shown in FIGS. 23(A) to 23(D) has a display area 1413, operation buttons 1414, and a 404, a touch panel 1423, and a light-emitting panel 1411a, 1411b in the housings 1411a, 1411b. 421, and a wiring board 1425. A touch panel 1423 may be provided as needed. good.

[0442] The light-emitting panel 1421 is the light-emitting device (light-emitting panel or light-emitting device) described in any of the above embodiments 1 to 10. Optical module) can be used.

[0443] As shown in FIGS. 23B and 23C, the light-emitting panel 1421 is shaped like a housing 1411a. It is arranged so as to cover not only the front area on the viewing side but also a part of the upper and lower areas. Therefore, a display area 1413 is also formed at the top of the mobile phone in the longitudinal direction. 27 can be formed. That is, a display area 1427 is also formed on the top surface of the mobile phone. This allows you to, for example, take out your mobile phone even if it is in your breast pocket. The display area 1427 can be viewed without any need for a keyboard.

[0444] The display areas 1413 and 1427 display whether there is an email, whether there is an incoming call, the date and time, the telephone number, the name of the person, etc. If necessary, only the display area 1427 may be displayed, and the other areas may be displayed. By not displaying the information, energy savings can be achieved.

[0445] A cross-sectional view of FIG. 23(D) is shown in FIG. 24. As shown in FIG. 24, The light-emitting panel 1421 is provided continuously from the top surface to the front and bottom surface. On the back side of 1421, there is a wiring board 1425 electrically connected to the light-emitting panel 1421, a battery A touch panel 1426 is also provided on the viewing side of the housing 1411a. 3 is placed.

[0446] The mobile phone of this embodiment can display images and text whether it is placed vertically or horizontally. can.

[0447] The light-emitting panel 1421 is not produced separately for the front and top areas, but is produced in the front display area. 1413 and the upper display area 1427. The production time can be reduced.

[0448] A touch panel 1423 is arranged on the housing 1411a, and a display area 1413 is A touch panel button 1414 is displayed. By touching the button 1414 with a finger, This allows the user to operate the display contents of the display area 1413. The email is created by touching the button 1414 in the display area 1413 with a finger or the like. It is possible to do so.

[0449] The button 1414 on the touch panel 1423 can be displayed when necessary. When 14 is not required, images and text can be displayed in the entire display area 1413.

[0450] Furthermore, the upper long side of the cross-sectional shape of the mobile phone may also have a radius of curvature. When the shape is formed so that the upper long side has a curvature radius, the light emitting panel 1421 and the touch panel The cross-sectional shape of each of the modules 1423 also has a radius of curvature on the upper long side. That is, when the display area 1413 is viewed from the front, the front This means that it protrudes in a round shape towards the center.

[0451] 25(A) and 25(B) show flexible light-emitting devices formed by applying the above-described embodiment. This is an example of application to an electronic book. Figure 25(A) shows the electronic book in an open state, and Figure 2 5(B) shows the electronic book in a closed state. The flexible display panel 4312 and the third display panel 4313 are formed by applying the above embodiment. A light-emitting device (light-emitting panel) having such a structure can be used.

[0452] The first housing 4305 includes a first display panel 4311 having a first display portion 4301. The second housing 4306 includes a second display panel having an operation unit 4304 and a second display unit 4307. The third display panel 4313 is a double-sided display panel. The third display panel 4313 has a first display panel 4302 and a fourth display panel 4310. The first housing 4305 is inserted between the first display panel 4311 and the second display panel 4312. The first display panel 4311, the third display panel 4313, the second display panel 4312, and The first and second housings 4306 are connected by a fastening part 4308 in which a drive circuit is provided. The electronic book of FIG. 25 has a first display unit 4301, a second display unit 4307, and a third display unit 4308. The display unit 4302 has four display screens, a first display unit 4303 and a second display unit 4310.

[0453] A first housing 4305, a first display panel 4311, a third display panel 4313, a second display panel 4314, a The display panel 4312 and the second housing 4306 are flexible. In addition, plastic substrates are used for the first housing 4305 and the second housing 4306, and If a thin film is used for the display panel 4313, a thin e-book can be produced. .

[0454] The third display panel 4313 has both a third display portion 4302 and a fourth display portion 4310. The third display panel 4313 is a dual-emission type display panel. Alternatively, a single-side emission type display panel may be attached to the substrate.

[0455] FIG. 26 shows a light emitting device formed by applying the above embodiment as an indoor lighting device 3001. The light-emitting device shown in the above embodiment mode can be made large in area; The light-emitting device described in the above embodiment can be used as a lighting device having a large area. It can also be used as a desk lamp 3000. In addition to lighting fixtures and tabletop lighting fixtures, this also includes wall-mounted lighting fixtures, interior lighting for vehicles, and emergency lights. can be.

[0456] As described above, the light-emitting devices described in Embodiments 1 to 10 can be used in various electronic devices. The display panel can be provided with the above-mentioned structure, thereby providing a highly reliable electronic device. [Explanation of symbols]

[0457] 10 Pulse output circuit 11 Wiring 12 Wiring 13 Wiring 14 Wiring 15 Wiring 21 Input terminal 22 Input terminal 23 Input terminal 24 input terminals 25 Input terminals 26 Output terminal 27 Output terminal 28 Thin-film transistor 31 Transistor 32 transistors 33 Transistor 34 transistors 35 transistors 36 transistors 37 Transistor 38 transistors 39 Transistor 40 transistors 41 Transistor 42 transistors 43 Transistor 51 Power line 52 Power line 53 Power line 61 period 62 period 100 flexible substrate 101 gate electrode layer 102 Gate insulating layer 103 Oxide semiconductor layer 104a Oxide conductive layer 104b Oxide conductive layer 105a Source electrode layer 105b drain electrode layer 117a High-resistance source region 117b High-resistivity drain region 135a Resist mask 136a Resist mask 106 Protective insulation layer 107 Oxide insulating film 108 Capacitive wiring layer 109 Protective insulation layer 110 Electrode layer 111 Conductive layer 112 Conductive layer 113 Terminal electrode 116 Channel formation region 118 Oxide semiconductor layer 119 Contact Hole 120 connecting electrode 121 terminal 122 terminals 123 Contact Hole 125 Contact Hole 126 Contact Hole 127 Contact Hole 128 Terminal electrode 129 Terminal electrode 130 Oxide semiconductor film 131 Oxide semiconductor layer 133 Oxide semiconductor layer 134 Oxide semiconductor layer 137 Resist mask 138 Oxide conductive layer 140 Oxide Conductive Film 142 Oxide conductive layer 143 Oxide conductive layer 145 Wiring layer 146 capacity 147 capacity 149 Capacitive electrode layer 150 terminals 151 terminals 153 Connecting electrode 155 Conductive film 156 Electrode 161 gate electrode layer 162 Conductive layer 163 Oxide semiconductor layer 164a Oxide conductive layer 164b Oxide conductive layer 165a Source electrode layer 165b Drain electrode layer 166 Channel formation region 167a High-resistance source region 167b High-resistivity drain region 168 Oxide semiconductor layer 170 Thin-Film Transistor 171 Thin-film transistor 172 Thin-film transistor 173 Thin-film transistor 180 Thin-Film Transistor 181 Thin-film transistor 182 Thin-film transistor 183 Thin-film transistor 185 Capacitive electrode layer 191 Color filter layer 192 Overcoat layer 193 Bulkhead 194 EL layer 195 Electrode layer 196 Connection electrode layer 300 Fabricated Board 302 Peeling layer 304 Peeling layer 305 Adhesive layer 306 Fabrication substrate 1001 Electrode 1002 Electrode 1003 EL layer 1004 Charge generation layer 1404 Operation button 1413 Display area 1414 Button 1421 Light-emitting panel 1423 Touch Panel 1425 Wiring board 1426 Battery 1427 Display area 3000 Tabletop Lighting Fixtures 3001 Lighting equipment 4301 Display section 4302 Display section 4304 Operation unit 4305 Housing 4306 Housing 4307 Display section 4308 Binding section 4310 Display section 4311 Display Panel 4312 Display Panel 4313 Display Panel 4501 Flexible substrate 4502 Pixel section 4505 Sealing material 4506 Flexible substrate 4507 Filling material 4509 Thin-film transistor 4510 Thin-film transistor 4511 Light-emitting element 4512 Electroluminescent layer 4513 Electrode layer 4515 Connection terminal electrode 4516 Terminal electrode 4517 Electrode layer 4519 Anisotropic conductive film 4520 Bulkhead 4540 Conductive layer 4542 Oxide insulating layer 4543 Overcoat layer 4544 Insulation layer 4545 Color filter layer 5300 Flexible substrate 5301 Pixel unit 5302 Scanning line driver circuit 5303 Scanning line driver circuit 5304 Signal line driver circuit 5305 Timing control circuit 5601 Shift Register 5602 Switching Circuit 5603 Thin-film transistor 5604 Wiring 5605 Wiring 6400 pixels 6401 Switching transistor 6402 Drive transistor 6403 Capacitor element 6404 Light-emitting element 6405 signal line 6406 scan lines 6407 Power line 6408 Common electrode 7001 TFT 7002 Light-emitting element 7003 Electrode layer 7004 EL layer 7005 Electrode layer 7009 Bulkhead 7011 Driving TFT 7012 Light-emitting element 7013 Electrode layer 7014 EL layer 7015 Electrode layer 7016 Shielding membrane 7017 Conductive film 7019 Bulkhead 7021 Driving TFT 7022 Light-emitting element 7023 Electrode layer 7024 EL layer 7025 Electrode layer 7027 Conductive film 7029 Bulkhead 7031 Oxide insulating layer 7032 Protective insulation layer 7033 Color filter layer 7034 Overcoat layer 7035 Protective insulation layer 7041 Oxide insulating layer 7042 Protective insulation layer 7043 Color filter layer 7044 Overcoat layer 7045 Protective insulation layer 7051 Oxide insulating layer 7052 Protective insulation layer 7053 Planarization insulating layer 7055 Protective insulation layer 8100 board 8104 Insulation layer 8141 Resin layer 8142 Resin layer 8144 PCB 8250 pixel unit 8252 Drive circuit section 8254 Terminal section 8400 Light-emitting device 1411a housing 1411b housing 4503a Signal line driver circuit 4504a Scanning line driver circuit 4518a FPC

Claims

[Claim 1] A transistor is provided on a flexible substrate. The transistor is a gate electrode layer; a gate insulating layer having a region located above the gate electrode layer; an oxide semiconductor layer having a region located above the gate insulating layer; a source electrode layer and a drain electrode layer having a region located above the oxide semiconductor layer; an insulating layer having a region located above the oxide semiconductor layer and a region located above the source electrode layer and the drain electrode layer.

Images