Display device

The display device addresses high-resolution and layout challenges by using silicon and metal oxide transistors on separate layers, enhancing transistor performance and enabling efficient current supply, resulting in high-definition displays with reduced power consumption and simplified circuitry.

JP2025120436APending Publication Date: 2025-08-15SEMICON ENERGY LAB CO LTD
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Patent Information

Application Number
JP2025099121
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2016-08-03
Filing Date
2025-06-13
Publication Date
2025-08-15

AI Technical Summary

Technical Problem

Display devices, particularly those in head-mounted displays, face challenges in achieving high resolution due to leakage currents in transistors on SOI substrates, which limit frame frequency and require large channel lengths, complicating circuit layout and reducing current supply capacity.

Method used

A display device design featuring a pixel circuit with a first transistor on a first element layer and a second transistor on a second element layer, where the first transistor drives the second transistor, utilizing silicon in the channel formation region for the first transistor and metal oxide for the second, allowing for increased layout area and breakdown voltage, and reducing electrical characteristic variations.

Benefits of technology

The design enables high-definition displays with a narrower frame, reduced power consumption, and simplified circuit design by alleviating layout constraints and improving transistor durability and current supply capacity.

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Abstract

To provide a display device including a display portion with extremely high resolution.SOLUTION: A display device includes a pixel circuit and a light-emitting element. The pixel circuit includes a first element layer including a first transistor and a second element layer including a second transistor. The first transistor includes silicon at a channel formation region. The first transistor has a function of driving the light-emitting element. The second transistor has a function of a switch. The second transistor includes metal oxide at a channel formation region. The metal oxide has a function of a semiconductor. The second element layer is provided above the first element layer.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present invention relates to an article, a method, or a manufacturing method. The invention relates to the manufacture or composition of matter. One embodiment of the present invention is a semiconductor device, a light-emitting device, a display device, an electronic device, a lighting device, or any of these. and a driving method thereof, or a manufacturing method thereof. Alternatively, the present invention relates to an electronic device, a light-emitting device, a lighting device, or a manufacturing method thereof, which are provided with a display device. Regarding.

[0002] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to devices in general. Transistors, semiconductor circuits, arithmetic units, memory devices, etc. are types of semiconductor devices. In addition, the light emitting device, the display device, the electronic device, the lighting device and the electronic device are semiconductor devices. It may have a location. [Background technology]

[0003] The display devices installed in head-mounted displays and the like require extremely high definition. For example, in Patent Document 1, in order to increase the resolution of the display unit, The electroluminescent (EL) capacitor was formed on an SOI (Silicon On Insulator) substrate. A fluorescent (luminescent) display device is disclosed. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] International Publication No. 2014 / 63116 Summary of the Invention [Problem to be solved by the invention]

[0005] The transistor formed on the SOI substrate has a leakage current when the transistor is turned off. (off-state current) is several p(1×10 -12 ) A, so when used for pixels, the frame frequency It's hard to make the number smaller.

[0006] The signal voltage (video voltage) of the source line applied to the pixel is S / N (Signal / Noise e) When considering the variation in the ratio or the electrical characteristics of the transistor, a voltage of several volts is required. Therefore, a high breakdown voltage is required for the transistor to which the video voltage is applied. To achieve this, the channel length (L) of the transistor must be increased to about 1 μm. This places a significant constraint on the circuit layout.

[0007] When increasing the resolution of the display, the current flowing through the display element is reduced as the display element per pixel becomes smaller. On the other hand, in transistors formed on SOI substrates, the field effect mobility The degree of the current is so high that the current supply capacity is excessive, making it difficult to drive with an appropriate amount of current. To address this issue, the channel length (L) of the transistor is increased to about 1 μm. However, as mentioned above, this places a large constraint on the circuit layout. It was.

[0008] An object of one embodiment of the present invention is to provide a display device whose display portion can have high resolution. Another object of the present invention is to provide a display device that can achieve a narrower frame. Alternatively, one of the objects is to provide a display device that can avoid the complication of circuit design. Another object is to provide a display device with low power consumption. One of the objects is to provide a novel display device. One of the objectives is to provide an electronic device equipped with the above. One of the objectives is to

[0009] The description of these problems does not preclude the existence of other problems. It is not necessary to solve all of these problems. It will be clear from the description of the specification, etc. that there are other problems than those mentioned above. It is possible to extract it. [Means for solving the problem]

[0010] One embodiment of the present invention includes a pixel circuit and a light-emitting element. The pixel circuit includes a first transistor. a first device layer having a first transistor and a second device layer having a second transistor, The first transistor has silicon in a channel formation region, and the second transistor is a light-emitting element. The first transistor has a function of driving the second transistor, and the second transistor has a function of switching the second transistor. The transistor has a metal oxide in a channel forming region, and the metal oxide has a semiconductor function. The second element layer is a display device disposed above the first element layer.

[0011] One embodiment of the present invention includes a pixel circuit and a light-emitting element. The pixel circuit includes a first transistor. a first device layer having a first transistor and a second device layer having a second transistor, The first transistor has silicon in a channel formation region, and the second transistor is a light-emitting element. The first transistor has a function of driving the second transistor, and the second transistor has a function of switching the second transistor. The transistor has a metal oxide in a channel forming region, and the metal oxide has a semiconductor function. The second element layer is provided above the first element layer, and the layer having the light-emitting element is It is a display device provided above the

[0012] One embodiment of the present invention includes a pixel circuit, a light-emitting element, and a driver circuit. a first element layer having the transistor; a second element layer having the second transistor; the driving circuit includes a third transistor and a fourth transistor; The first transistor is electrically connected to a source line or a gate line, and the second transistor has a channel forming The first transistor has a function of driving a light-emitting element, and the second transistor has a function of driving a light-emitting element. The first transistor has a function of a switch, and the second transistor has a gold layer in a channel forming region. The metal oxide has a semiconductor function, and the third transistor and the fourth transistor The transistor is provided in a first element layer, and the second element layer is provided above the first element layer. It is a display device that can be used.

[0013] One embodiment of the present invention includes a pixel circuit, a light-emitting element, and a driver circuit. a first element layer having the transistor; a second element layer having the second transistor; the driving circuit includes a third transistor and a fourth transistor; The first transistor is electrically connected to a source line or a gate line, and the second transistor has a channel forming The first transistor has a function of driving a light-emitting element, and the second transistor has a function of driving a light-emitting element. The first transistor has a function of a switch, and the second transistor has a gold layer in a channel forming region. The metal oxide has a semiconductor function, and the third transistor and the fourth transistor The transistor is provided in a first element layer, and the second element layer is provided above the first element layer. The layer having the light-emitting element is a display device provided above the second element layer.

[0014] In one embodiment of the present invention, the pixel circuit further comprises a fifth transistor. The fifth transistor has a function of a switch, and the fifth transistor is provided in the second element layer. A display device is preferred.

[0015] In this specification, a connector, such as an FPC (Flexible Printed Circuit) Printed Circuit) or TCP (Tape Carrier Packet a module with a TCP (transmitter / receiver) attached, and a module with a printed wiring board attached to the TCP. COG (Chip On Glass) method on a substrate on which a module or display element is formed Depending on the formula, a module on which an IC (integrated circuit) is directly mounted may also be included in the display device. [Effects of the Invention]

[0016] One embodiment of the present invention can provide a display device whose display portion can have high definition. Alternatively, it is possible to provide a display device that can achieve a narrower frame. It is possible to provide a display device that can avoid the complication of circuit design. A display device can be provided. Alternatively, a novel display device can be provided. Alternatively, an electronic device including the display device (display panel) can be provided. It is possible to provide new electronic devices.

[0017] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have to have all of these effects. The above will be made clear from the description, drawings, claims, etc. It is possible to extract other effects from the descriptions in the aspects and claims. [Brief explanation of the drawings]

[0018] [Figure 1] 1A and 1B are schematic diagrams illustrating one embodiment of the present invention. [Figure 2] 1A and 1B are schematic cross-sectional views illustrating one embodiment of the present invention. [Figure 3] 1A and 1B are schematic diagrams illustrating one embodiment of the present invention. [Figure 4] 1A and 1B are schematic diagrams illustrating one embodiment of the present invention. [Figure 5] 1A and 1B are a block diagram and a circuit diagram illustrating one embodiment of the present invention. [Figure 6] 1A and 1B are schematic diagrams illustrating one embodiment of the present invention. [Figure 7] 1A and 1B are schematic cross-sectional views illustrating one embodiment of the present invention. [Figure 8] 1A and 1B are schematic cross-sectional views illustrating one embodiment of the present invention. [Figure 9] 1A and 1B are schematic cross-sectional views illustrating one embodiment of the present invention. [Figure 10] 1A and 1B are schematic cross-sectional views illustrating one embodiment of the present invention. [Figure 11] FIG. 2 is a diagram illustrating a display module. [Figure 12] 1. An electronic device according to an embodiment. [Figure 13] 1. An electronic device according to an embodiment. [Figure 14] 1. An electronic device according to an embodiment. [Figure 15] 1. An electronic device according to an embodiment. [Figure 16] 1. An electronic device according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0019] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. and variations in form and details may be made without departing from the spirit and scope of the present invention. It will be readily apparent to those skilled in the art that modifications may be made. It should not be construed as being limited to the description of the embodiments.

[0020] In the configuration of the invention described below, the same parts or parts having similar functions The same reference numerals are used in common between different drawings, and repeated explanations will be omitted. When referring to similar functions, the hatch pattern may be the same and no particular reference numeral may be given.

[0021] In each figure described in this specification, the size, layer thickness, or area of each component is The figures may be exaggerated for clarity and are not necessarily limited to that scale. stomach.

[0022] In this specification, ordinal numbers such as "first" and "second" are used to avoid confusion of components. The number is not a numerical limitation.

[0023] (Embodiment 1) The display device according to one embodiment of the present invention includes a transistor for driving a light-emitting element (a driving transistor The video voltage of the source line is applied to the gate of the driving transistor. A transistor (selection transistor) that functions as a switch to select the The drive transistor is placed on the second element layer, which is the upper layer. Like transistors fabricated using silicon-on-insulator (Si-on-insulator) substrates, The select transistor is a transistor having a capacitor in the channel forming region. Metal oxides (hereinafter referred to as oxide semiconductors, or OS) that function as The transistor has a gate inductor (also called a gate conductor) in a channel formation region.

[0024] By arranging the drive transistor and the selection transistor on different layers, The layout area of the transistor can be increased. The select transistor is By using a structure in which a semiconductor is used in a channel formation region, silicon can be effectively used in the channel formation region. The select transistor can be used as a drive transistor, and the breakdown voltage can be increased compared to the other transistors. By placing the transistor on a different element layer from the driving transistor, the constraints on the circuit layout can be alleviated, and the driving transistor Therefore, the channel length of the drive transistor can be designed to be large. This allows for a circuit layout that adjusts the supply capacity, and also improves the durability of the drive transistor. In addition, by adding impurity elements to the channel forming region, It is possible to provide a driving transistor with reduced variations in electrical characteristics such as threshold voltage. .

[0025] FIG. 1A is a schematic diagram for explaining the configuration of a display device.

[0026] The display device 10 shown in FIG. 1(A) includes a driving circuit 11, a driving circuit 12, and a display unit 13. do.

[0027] The driving circuit 11 functions as a gate line side driving circuit. Output to the port line GL.

[0028] The driver circuit 12 functions as a source line side driver circuit. Output to source line SL.

[0029] The display unit 13 has a plurality of pixel circuits 20. The pixel circuits 20 receive scanning signals and video signals. It has the function of driving a light-emitting element (not shown) that is a display element in response to various signals such as voltage. do.

[0030] The pixel circuit 20 includes an element layer 21 and an element layer 22. The pixel circuit 20 includes, for example, , has two transistors: a selection transistor and a drive transistor.

[0031] As shown in FIG. 1A, the element layer 21 and the element layer 22 are stacked. A display element is provided on the element layer 22 of the pixel circuit 20, but is not shown in FIG. are.

[0032] The element layer 21 includes a transistor having silicon in a channel forming region (Si transistor). The drive transistor is provided in the

[0033] Si transistors are made on an SOI (Silicon On Insulator) substrate, Ruiha SIMOX(Separation by IMplanted OXygen) It is preferable that the transistor is manufactured using single crystal silicon as the substrate, or Single crystal silicon is fabricated by directly forming impurity regions and element isolation regions on a silicon wafer. A Si transistor using a capacitor may also be used.

[0034] The term "SOI substrate" refers to a substrate with a silicon semiconductor layer on an insulating surface. In this specification, a semiconductor layer made of a material other than silicon is provided on an insulating surface. In other words, the semiconductor layer of an "SOI substrate" is The substrate is not limited to silicon semiconductor layers. Also, the substrate in "SOI substrate" is a silicon wafer. Not only semiconductor substrates such as glass substrates, quartz substrates, sapphire substrates, and metal substrates, This also includes semiconductor substrates. In other words, semiconductor materials are formed on conductive substrates or insulating substrates with insulating surfaces. The term "SOI substrate" broadly includes those having layers such as:

[0035] The threshold voltage of Si transistors can be easily controlled by channel doping. The Si transistor has a structure in which single crystal silicon is used in the channel formation region. Therefore, the Si transistor of the element layer 21 can be By using it in the drive transistor, the variation in threshold voltage is reduced and the amount of current that flows is increased. It is possible.

[0036] The driving transistor formed of a Si transistor in the element layer 21 is By stacking the select transistors above and below, it is possible to achieve a large area layout. In this case, even if the area occupied by one pixel is small, the driving transistor can be This allows the area occupied by the Si transistors that function as a pixel to be increased. In a display device with a pixel density of 3000 ppi, the area of one pixel, which corresponds to a subpixel, is stripe The layout can be estimated to be about 2.75 μm × 8.75 μm. When laying out two transistors, a selection transistor and a drive transistor, with a channel length of 1 μm, Although the circuit layout becomes more difficult, it is possible to achieve this with a single Si transistor with a channel length of 1 μm. Therefore, the Si transistor channel The length of the channel can be increased, which increases the breakdown voltage and reduces the current supply capacity. The force can be adjusted. Note that ppi is a unit that represents the number of pixels per inch. .

[0037] Si transistors can be microfabricated and are used in pixel circuits, such as logic circuits that require high-speed operation. Therefore, the display device 10 can be made lighter and the display device 10 can be made The weight of an electronic device equipped with the device 10 can be reduced.

[0038] The driving transistor used in the element layer 21 is preferably a p-channel type, but may be an n-channel type. The transistor in the device layer 21 may be a transistor having silicon in the channel forming region. Since it is a transistor, it can be made into a p-channel type or n-channel type by changing the conductivity type of the added impurity element. Different channel types can be easily produced.

[0039] The light-emitting element whose light emission is controlled by the pixel circuit 20 may be, for example, an organic EL element, an inorganic Use of EL elements, LED (Light Emitting Diode) elements, etc. can be done.

[0040] The element layer 22 includes a transistor having an oxide semiconductor in a channel formation region (OS transistor). A selection transistor is provided in the gate electrode.

[0041] The oxide semiconductor that can be used for the element layer 22 is resistant to avalanche breakdown and has insulating properties. For example, silicon has a small band gap of 1.12 eV, so it is A phenomenon called Lanche breakdown, in which electrons are generated like an avalanche, is likely to occur, and the gate insulating layer The more electrons that can cross the barrier, the more they are accelerated to high speeds. , the band gap is wide at 2 eV or more, and avalanche breakdown is less likely to occur, and compared to silicon, It has high resistance to hot carrier degradation and therefore high dielectric strength.

[0042] In addition, the band gap of silicon carbide, which is one of the high dielectric strength materials, and the above oxide The band gaps of the oxide semiconductors used in the semiconductor layers are the same, but The field effect mobility of silicon carbide is about two orders of magnitude smaller than that of silicon carbide. The barrier to the gate insulating layer is made of silicon carbide, gallium nitride, or silicon. The electrons injected into the gate insulating layer are much smaller than those of the silicon It is less susceptible to hot carrier degradation than silicon nitride, gallium nitride, or silicon, and has a high dielectric strength. stomach.

[0043] Therefore, OS transistors have a small off-state current even when miniaturized. has a higher breakdown voltage than Si transistors. In addition, it is possible to operate at a lower frame frequency. When the voltage is applied to the capacitor, it is possible to make it difficult for dielectric breakdown to occur due to the application of a video voltage.

[0044] FIG. 1B shows a pixel circuit 2 having the element layer 21 and the element layer 22 shown in FIG. 1A. 0 and the light emitting element connected to the pixel circuit 20 are shown in a schematic circuit diagram, which is divided into layers. In addition, in FIG. 1B, pixel circuits and light emitting elements for two pixels are shown.

[0045] In FIG. 1(B), the x-direction, the y-direction, and the z-direction are illustrated. The y direction is the direction parallel to the gate line GL as shown in FIG. The z direction is a direction parallel to the source line SL as shown in FIG. , a direction perpendicular to a plane defined by the x-direction and the y-direction. The element layer 22 is provided by stacking layers having transistors in the z direction.

[0046] In FIG. 1B, the element layer 21 includes gate lines GL, anode lines anode, and drive lines GL. In FIG. 1B, the element layer 22 includes a transistor M2. The transistor M1 functions as a select transistor. ) the element layer 23 has the light-emitting element EL and the cathode line (cathode).

[0047] The elements such as transistors on each layer are electrically connected via wiring etc. as shown in Figure 1(B). It can be connected.

[0048] As shown in FIGS. 1A and 1B, a display device 10 according to one embodiment of the present invention includes a light-emitting element EL. A transistor M2 for driving the video voltage of the source line SL is disposed in the element layer 21. A transistor M1 is placed in the device layer, which functions as a switch, to supply a voltage to the gate of the transistor M2. The transistor M2 is arranged in the element layer 22, which is the upper layer of the transistor M1. Transistors that have silicon in the channel formation region, such as transistors fabricated using silicon The transistor M1 is a transistor having an oxide semiconductor in a channel formation region. Let's say.

[0049] The transistor M1 and the transistor M2 of the pixel circuit 20 are arranged on different layers. By configuring the transistor M2 in this manner, the layout area of the transistor M2 can be increased. The transistor M1 has a structure in which an oxide semiconductor is used for the channel formation region, and thus silicon The breakdown voltage can be increased compared to a transistor having a channel formation region. By placing transistor M1 on a different device layer from transistor M2, the constraints on the circuit layout are relaxed. Therefore, the channel length of the transistor M2 can be designed to be large. It is possible to perform a circuit layout that adjusts the current supply capacity of the transistor M2. In addition, the impurity element is introduced into the channel forming region. The transistor M has reduced variations in electrical characteristics such as threshold voltage by adding It can be 2.

[0050] FIG. 2 shows a schematic cross-sectional view corresponding to FIG. 1(B). In FIG. 2, as in FIG. 1(B), A device layer 21 having a transistor M2, a device layer 22 having a transistor M1, and a light-emitting A device layer 23 having device EL is shown.

[0051] 2 shows a base substrate 31, an insulating layer 33, a semiconductor layer 35, a gate insulating layer 38, a gate electrode 39, a gate insulating layer 39 ... electrode 39, a gate electrode 39, a gate electrode 39, a gate electrode 39, Electrode layer 39, insulating layer 40, insulating layer 41, insulating layer 42, gate electrode layer 43C, electrode layer 43A, An electrode layer 43B, a gate insulating layer 44, an oxide semiconductor layer 45, a source electrode 46A, a drain electrode Electrode 46B, electrode 46C, insulating layer 47, insulating layer 48, insulating layer 49, conductive layer 50, insulating layer 51 , the EL layer 52, and the conductive layer 53. The semiconductor layer 35 includes an impurity region 36A, The transistor has an impurity region 36B and a channel forming region 37. M1, transistor M2 and light-emitting element EL are shown.

[0052] The transistor M2 is formed by adding conductive material to the impurity regions 36A and 36B. By changing the impurity element added, it is easy to make either n-channel or p-channel types. It can be done.

[0053] In FIG. 2, the transistor M2 may have a sidewall insulating layer. In addition, in FIG. 2, the transistor M2 has an element isolation layer surrounding it. 2, the impurity region 36A of the transistor M2 and The impurity region 36B may have a configuration including a silicide region or the like.

[0054] Gate electrode layer 39, gate electrode layer 43C, electrode layer 43A, electrode layer 43B, source electrode 4 6A, drain electrode 46B, electrode 46C, conductive layer 50, and conductive layer 53. As the conductive material, the conductive materials mentioned in the description of each conductive layer in the second embodiment are used. It is possible.

[0055] Insulating layer 33, gate insulating layer 38, insulating layer 40, insulating layer 41, insulating layer 42, gate insulating layer 44, insulating layer 47, insulating layer 48, insulating layer 49, and insulating layer 51; For this purpose, the insulating materials mentioned in the description of each insulating layer in the second embodiment can be used. Cut.

[0056] A base substrate 31, a semiconductor layer 35, an EL layer 52, an impurity region 36A, an impurity region 36B, The materials applicable to the channel forming region 37 are the same as those described in the description of the second embodiment. Any of the materials can be used.

[0057] The oxide semiconductor layer 45 is composed of In, M (M is Al, Ga, Y, or Sn), Zn, For example, the oxide semiconductor layer 45 may have a structure in which the atomic ratio of In is greater than the atomic ratio of M. However, the semiconductor device of one embodiment of the present invention is not limited thereto. , a structure having a region in which the atomic ratio of In is smaller than the atomic ratio of M, or a region in which the atomic ratio of In is smaller than the atomic ratio of M The ratio may be the same as the atomic ratio of M.

[0058] The oxide semiconductor layer 45 has a region in which the atomic ratio of In is larger than the atomic ratio of M, The field effect mobility of the transistor M1 can be increased. The field-effect mobility of M1 is 10 cm 2 / Vs, more preferably transistor M1 The field-effect mobility of 30 cm 2 / Vs can be exceeded.

[0059] As shown in FIG. 2, the semiconductor layer 35 of the transistor M2 and the oxide layer of the transistor M1 It is preferable that the layer 44 and the layer 45 do not overlap each other.

[0060] The semiconductor layer 35 of the transistor M2 and the oxide semiconductor layer 45 of the transistor M1 are mutually If they overlap, the operation of one transistor may affect the other. To avoid this effect, the distance between the transistors M1 and M2 is A structure in which the distance between the transistors M1 and M2 is increased, or a conductive layer is provided between the transistors M1 and M2. However, in the former configuration, the display device becomes thicker, For example, when the display device 10 is formed on a flexible substrate or the like, bendability or the like becomes an issue. In the latter case, the step of forming the conductive layer is increased, and in the former case, Similarly, the display device becomes thicker, which can be a problem.

[0061] On the other hand, in the display device 10 according to one embodiment of the present invention, the transistors M1 and M 2 are arranged so as to overlap each other, and the semiconductor layers of the transistors are not overlapped. By arranging transistor M1 and transistor M2 in an overlapping manner, the transistor layer in one pixel is This increases the freedom of the out.

[0062] The transistor M1 has an oxide semiconductor between the source electrode 46A and the drain electrode 46B. The transistor M1 has a channel etch structure in which a part of the conductor layer 45 is exposed. The transistor M2 is not limited to an etched structure and may be a channel protection structure. A gate electrode layer 39 is formed on a channel forming region 37 of the semiconductor layer 35 via an insulating layer 38. The transistor M2 is not limited to a top gate structure, but can also be a double gate structure. A gate structure or a multi-gate structure may also be used.

[0063] As shown in FIG. 2, a display device 10 according to an embodiment of the present invention includes a transistor included in a pixel circuit 20. By arranging the transistor M1 and the transistor M2 on different layers, the transistor M2 The layout area of the transistor M1 can be increased. By adopting a structure in which silicon is used in the channel formation region, a transistor having silicon in the channel formation region can be obtained. The breakdown voltage can be increased compared to the transistor M1. By placing it on the device layer, the constraints on the circuit layout can be relaxed, and the channel of transistor M2 can be Therefore, the current supply capacity of transistor M2 can be adjusted. This allows for a circuit layout that is more suitable for the transistor M2. In addition, by adding impurity elements to the channel forming region, it is possible to reduce the threshold voltage. This allows the transistor M2 to have reduced variations in electrical characteristics.

[0064] 3(A) and (B) show an example of a pixel circuit. The pixel circuit is shown together with the light-emitting element EL.

[0065] In FIG. 3A, a transistor M1, a transistor M2, a capacitance element C1, a light-emitting element EL , an anode line anode, a cathode line cathode, a source line SL, and a gate line G L is shown in the circuit in which a capacitance element C1 is added to the pixel circuit 20 described in FIG. The corresponding pixel circuit is shown in FIG. 3(A). It can be omitted by increasing the gate capacitance of the transistor M1.

[0066] FIG. 3(B) is an example of a pixel circuit different from that shown in FIG. 3(A). ) is a p-channel type, but the transistor M2 shown in Figure 3( In the pixel circuit 20A of B), a transistor M1, a transistor M2, a capacitance element C1, and a light emitting element An element EL, an anode line anode, a cathode line cathode, a source line SL, and a gate The route line GL is shown.

[0067] FIG. 3C shows an example of a pixel circuit different from those shown in FIGS. 3A and 3B. In FIG. 3(B), a transistor M3 is used to monitor the amount of current flowing through the transistor M2. The pixel circuit 20B in FIG. 3C is a circuit in which a transistor and a monitor line ML are added. A resistor M1, a transistor M2, a transistor M3, a capacitance element C1, a light-emitting element EL, and an anode, cathode, monitor, and source lines; The gate line GL is shown.

[0068] FIG. 4 shows the transistors M1 to M3 included in the pixel circuit 20B shown in FIG. 4 is a schematic diagram of a circuit shown in each layer in the same manner as in FIG. 1(B). The pixel circuits and light emitting elements for the number of pixels are shown.

[0069] In FIG. 4, the element layer 22 includes a source line SL and a transistor that functions as a selection transistor. In addition to the capacitor M1 and the capacitor C1, the circuit also includes a transistor M3 and a monitor line ML. The resistor M3 is an element for passing current through the monitor line ML and functions as a switch. Therefore, like the transistor M1, the transistor M3 is provided in the element layer 22. By adopting this configuration, it is possible to form a driving transistor in the element layer 21. The functional transistor M2 can be easily laid out with a long channel length.

[0070] FIG. 5A shows an example of a driving circuit 11 that functions as a gate line side driving circuit. are.

[0071] FIG. 5A shows a shift register 61 and a buffer circuit 62. The clock signal 61 has a plurality of pulse output circuits, and outputs, for example, a gate clock signal GCLK, an inverted clock signal GCLK, and an inverted clock signal GCLK. The gate clock signal GCLKB and the gate start pulse GSP are used as control signals. The buffer circuit 62 outputs a pulse signal SR_OUT to the buffer circuit 62. The scanning signal with increased current supply capacity corresponding to the scan signal SR_OUT is sent to the gate line G of each row. Output to L.

[0072] The buffer circuit 62 can be formed by transistors of the same conductivity type. As shown in the figure, CMOS (Complementary Metal Oxide Semiconductor) In FIG. 5(B), it is preferable to configure the circuit with a transistor. The transistor M11 is a p-channel type, the transistor M12 is an n-channel type, and the pulse signal S The current required to set the voltage of the gate line GL to VDD or VSS is generated according to R_OUT. It can be flushed.

[0073] FIG. 5C shows an example of the drive circuit 12 that functions as a source line side drive circuit. are.

[0074] In FIG. 5C, a video voltage generating circuit 63 and a buffer circuit 64 are shown. The voltage generating circuit 63 includes a plurality of pulse output circuits, a latch circuit, and a digital-to-analog converter. For example, the circuit includes a source clock signal SCLK and an inverted source clock signal SCLKB. and a control signal such as a source start pulse SSP, data is supplied to the source line SL of each column. The buffer circuit 64 outputs a video voltage Vdata corresponding to the data signal DATA. It has an amplifier that functions as a follower circuit.

[0075] The buffer circuit 64 is preferably constructed of a CMOS circuit as shown in FIG. 5(D). In FIG. 5D, the transistor M13 is a p-channel transistor, and the transistor M14 is a It is an n-channel type and generates differential voltages AMP+ and AMP- according to the video voltage Vdata. The output stage of the amplifier has transistors M13 and M14, which are applied to the source of each column. A current corresponding to the video voltage Vdata is output to the line SL.

[0076] FIG. 6 shows an element layer having a buffer circuit 62 connected to the gate line GL shown in FIG. 5(B). 21C, the element layer 2 having the buffer circuit 64 connected to the source line SL shown in FIG. 5(D). 1B is a schematic diagram of the circuit shown divided into layers in the same manner as in FIG. 1B. FIG. 6 shows pixel circuits and light emitting elements for two pixels.

[0077] In FIG. 6, the element layers 21B and 21C are Si transistors that can easily form CMOS circuits. The buffer circuit 62 and the buffer layer 21 can be provided in the same layer as the element layer 21 where the buffer is provided. The transistors M11 to M14 in the buffer circuit 64 are required to pass a large current. Therefore, by placing it in the same layer as a Si transistor with high field effect mobility, The size can be reduced, which allows for a narrower frame of the display device.

[0078] The display device according to one embodiment of the present invention described above includes a transistor for driving a light-emitting element. (drive transistor) is arranged in the first element layer, and the video voltage of the source line is applied to the drive transistor. A transistor (select transistor) is used to act as a switch to supply a voltage to the gate of the The drive transistor is arranged on the second element layer, which is the layer above the first element layer. Transistors fabricated using silicon-on-insulator (I) substrates The transistor has a channel formation region made of silicon. is a metal oxide (oxide semiconductor) that functions as a semiconductor, or OS (Oxide Semiconductor) The transistor has a gate insulator (also called an insulator) in a channel formation region.

[0079] By arranging the drive transistor and the selection transistor on different layers, The layout area of the transistor can be increased. The select transistor is By using a structure in which a semiconductor is used in a channel formation region, silicon can be effectively used in the channel formation region. The select transistor can be used as a drive transistor, and the breakdown voltage can be increased compared to the other transistors. By placing the transistor on a different element layer from the driving transistor, the constraints on the circuit layout can be alleviated, and the driving transistor Therefore, the channel length of the drive transistor can be designed to be large. This allows for a circuit layout that adjusts the supply capacity, and also improves the durability of the drive transistor. In addition, by adding impurity elements to the channel forming region, It is possible to provide a driving transistor with reduced variations in electrical characteristics such as threshold voltage. .

[0080] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0081] (Embodiment 2) The display device of one embodiment of the present invention includes a transistor using silicon (Si transistor) and and a transistor using an oxide semiconductor (OS transistor). The data is made up of silicon wafers, SOI (Silicon on Insulator) substrates, and insulating The display device can be formed by using a silicon thin film or the like on the edge surface. A method for manufacturing the device will be described with reference to FIGS.

[0082] In this embodiment, a Si transistor is manufactured using an SOI substrate, and then an OS transistor is manufactured. The following will explain the case of manufacturing a star as an example.

[0083] First, a method for manufacturing an SOI substrate will be described.

[0084] As shown in FIG. 7(A), after cleaning the bond substrate 80, an insulating film is applied to the surface of the bond substrate 80. Layer 33 is formed.

[0085] A silicon single crystal semiconductor substrate can be used as the bond substrate 80. The bond substrate 80 is made of silicon having a strain in the crystal lattice, and germanium is added to silicon. A semiconductor substrate such as doped silicon germanium may also be used.

[0086] The single crystal semiconductor substrate used for the bond substrate 80 has a crystal axis direction that is perpendicular to the substrate. It is desirable that the lattice defects are uniform, but it is also necessary to completely eliminate lattice defects such as point defects, line defects, and planar defects. It is not necessary for the crystal to be a perfect crystal.

[0087] The shape of the bond substrate 80 is not limited to a circle, and it may be processed into a shape other than a circle. For example, the shape of the base substrate 31 to be bonded later is generally rectangular, and Considering that the exposure area of an exposure apparatus such as a projection exposure apparatus is rectangular, the bond substrate 80 The shape of the bond substrate 80 may be processed to be rectangular. This can be done by cutting a circular single crystal semiconductor substrate.

[0088] The insulating layer 33 may be a single insulating layer or a laminate of multiple insulating layers. The thickness of the insulating layer 33 is determined so that the region containing impurities can be removed later. Taking this into consideration, it is preferable to set the thickness to 15 nm or more and 500 nm or less.

[0089] The insulating layer 33 may be made of a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a silicon nitride oxide film. Bare film, germanium oxide film, germanium nitride film, germanium oxynitride film, germanium nitride oxide film An insulating layer containing silicon or germanium in its composition, such as an aluminum film, can be used. Insulation made of metal oxides such as aluminum oxide, tantalum oxide, and hafnium oxide layer, an insulating layer made of a metal nitride such as aluminum nitride, a metal oxide layer such as aluminum nitride insulating layer made of metal oxide nitride, insulating layer made of metal nitride oxide such as aluminum oxide nitride Layers may also be used.

[0090] In this embodiment, the silicon oxide formed by thermally oxidizing the bond substrate 80 is 7A, the insulating layer 33 is used as the bond substrate 80. The insulating layer 33 is formed to cover the entire surface of the bond substrate 80. It is sufficient that the conductor is formed as follows.

[0091] The insulating layer 33 is a film for forming a smooth and hydrophilic bonding surface on the surface of the bond substrate 80. Therefore, the average roughness Ra of the insulating layer 33 is set to 0.7 nm or less, and more preferably, 0.4 nm or less. The thickness of the insulating layer 33 is preferably 5 nm or more and 500 nm or less. Preferably, it should be 10 nm or more and 200 nm or less.

[0092] Next, as shown in FIG. 7(B), ions made of ions accelerated by an electric field are applied to the bond substrate 80. The electron beam is irradiated through the insulating layer 33 as shown by the arrow, and the electron beam is incident from the surface of the bond substrate 80. In the region of a certain depth, a weakened layer 82 having microvoids is formed. For example, the weakened layer may be formed by a crystal It means a layer that has been locally weakened by structural disorder, and this state is called the process of forming the embrittlement layer. The area from one surface of the bond substrate to the embrittlement layer is also weakened to some extent. In some cases, the embrittlement layer refers to the area that will be separated later and the layer in its vicinity.

[0093] The depth of the region where the embrittlement layer 82 is formed depends on the acceleration energy of the ion beam and the ion beam The incident angle can be adjusted by adjusting the incident angle. A weakened layer 82 is formed at the depth of the ion implantation. The thickness of the semiconductor layer 84 is determined. The depth at which the embrittlement layer 82 is formed is, for example, 50 nm or more. The thickness can be 00 nm or less, and preferably 50 nm or more and 200 nm or less.

[0094] Ions are implanted into the bond substrate 80 by an ion doping method that does not involve mass separation. However, the present invention is based on the ion separation method involving mass separation. An injection method may also be used.

[0095] Next, as shown in FIG. 7(C), the bond substrate 80 and the base plate 31 are bonded together with the insulating layer 33 sandwiched therebetween. The substrate 31 is attached to the substrate.

[0096] The bonding is performed by first bonding the base substrate 31 and the insulating layer 33 on the bond substrate 80 together, A pressure of 1 N / cm was applied to a part of the overlapped base substrate 31 and bond substrate 80. 2 More than 500N / c m 2 Less than 11N / cm, preferably 2 More than 20N / cm2 Apply pressure of the following level. When pressure is applied, the base substrate 31 and the insulating layer 33 start to bond from that portion, and eventually become dense. The bond extends to the entire surface.

[0097] The bonding is achieved using van der Waals forces and hydrogen bonds, making it strong even at room temperature. Since the above bonding can be performed at low temperatures, the base substrate 3 For example, the base substrate 31 may be made of alumina. Borosilicate glass, barium borosilicate glass, aluminoborosilicate glass, etc. In addition to various glass substrates used for semiconductor devices, we also manufacture substrates such as quartz substrates, ceramic substrates, and sapphire substrates. Furthermore, the base substrate 31 may be made of silicon, gallium arsenide, insulator, or the like. A semiconductor substrate such as aluminum phosphide can be used. Alternatively, a stainless steel substrate can be used. A metal substrate may be used as the base substrate 31. The substrate has a thermal expansion coefficient of 25×10 -7 / ℃ or more 50×10 -7 / °C or less (preferably, 30×10 -7 / ℃ or more 40×10 -7 / ℃ or less), and the strain point is 580℃ or more and 680℃ or less. It is preferable to use a substrate having a temperature of 600° C. or lower (preferably 600° C. or higher and 680° C. or lower). Furthermore, if a non-alkali glass substrate is used as the glass substrate, contamination of the display device due to impurities can be prevented. can be suppressed.

[0098] The glass substrate used is a mother glass substrate developed for the manufacture of liquid crystal panels. As for mother glass, for example, 3rd generation (550mm x 650mm), .5th generation (600mm x 720mm), 4th generation (680mm x 880mm or 73 0mm x 920mm), 5th generation (1100mm x 1300mm), 6th generation (1500 mm×1850mm), 7th generation (1870mm×2200mm), 8th generation (2200 Substrates with sizes such as 2400mm x 2400mm are known. By using it as the base substrate 31 to manufacture an SOI substrate, the area of the SOI substrate can be increased. can.

[0099] Next, by performing a heat treatment, adjacent microvoids in the embrittlement layer 82 are bonded together. As a result, the volume of the microvoids increases. As a result, as shown in FIG. 7(D), In this case, the semiconductor layer 84, which is part of the bond substrate 80, is separated from the bond substrate 80. Since the layer 33 is bonded to the base substrate 31, the layer 33 is bonded to the base substrate 31 from the bond substrate 80. The separated semiconductor layer 84 is fixed. To separate the semiconductor layer 84 from the bond substrate 80, The temperature of the heat treatment is set so as not to exceed the strain point of the base substrate 31 .

[0100] This heat treatment involves the use of an RTA (Rapid Thermal Anneal) device, a resistor A heating furnace or microwave heating device can be used. The RTA device is a GRTA (Gas Rapid Thermal Anneal) equipment, LRTA (Lamp Rapid A GRTA device can be used. In this case, the heating temperature should be between 550°C and 650°C, and the treatment time should be between 0.5 and 60 minutes. When using a resistance heating furnace, the heating temperature should be between 200°C and 650°C, and the treatment time should be 2 The period can be more than 1 hour and less than 4 hours.

[0101] The semiconductor layer 84 adhered to the base substrate 31 is formed with the embrittlement layer 82. The separation in the crystal causes crystal defects or impairs the flatness of the surface. Therefore, in one embodiment of the present invention, in order to reduce crystal defects and improve flatness, Then, a process for removing oxide films such as native oxide films formed on the surface of the semiconductor layer 84 was performed. Thereafter, the semiconductor layer 84 is irradiated with laser light.

[0102] In this embodiment, the semiconductor layer 84 is immersed in DHF containing hydrogen fluoride at a concentration of 0.5 wt %. The oxide film is removed by exposing it to the silicon dioxide for 2 seconds.

[0103] The laser light irradiation can be performed with an energy density sufficient to partially melt the semiconductor layer 84. If the semiconductor layer 84 is completely melted, random nucleation occurs in the liquid phase. In addition, when the semiconductor layer 84 is recrystallized, microcrystals are generated, which reduces the crystallinity. By partially melting the semiconductor layer 84, crystal growth progresses from the unmelted solid phase portion. The vertical growth causes the crystallization of the semiconductor layer 84. The defects are reduced and the crystallinity is restored. This means that the semiconductor layer 84 is melted up to the interface with the insulating layer 33 and is in a liquid state. On the other hand, the semiconductor layer 84 being in a partially molten state means that the upper layer is molten and in a liquid phase, and the lower layer is in a solid phase. It refers to a certain state.

[0104] In this embodiment, when the thickness of the semiconductor layer 84 is about 146 nm, the laser light irradiation is performed as follows: This can be done as follows: A XeCl excimer laser is used as the laser oscillator for the laser light. (Wavelength: 308 nm, pulse width: 20 ns, repetition frequency: 30 Hz) is used. The cross section of the laser beam is shaped into a line of 0.4 mm x 120 mm. The laser beam is irradiated onto the semiconductor layer 84 at a speed of 0.5 mm / sec. As shown in FIG. 7(E), a semiconductor layer 85 in which the crystal defects have been repaired is formed.

[0105] Next, after the laser light is irradiated, the surface of the semiconductor layer 85 may be etched. When the surface of the semiconductor layer 85 is etched after the irradiation of the laser beam, the irradiation of the laser beam is not necessarily performed. It is not necessary to etch the surface of the semiconductor layer 84 before irradiating the laser light. When the surface of the semiconductor layer 84 is etched, the semiconductor layer 85 is not necessarily etched after the irradiation of the laser light. It is not necessary to etch the surface of the substrate. Alternatively, after the irradiation of the laser beam, the surface of the substrate may be etched before the irradiation of the laser beam. The surface of the semiconductor layer may be etched.

[0106] By the etching, the semiconductor is thinned to a thickness that is optimal for the semiconductor element to be formed later. Not only can the layer 85 be thinned, but the surface of the semiconductor layer 85 can be flattened.

[0107] After the laser light irradiation, the semiconductor layer 85 is subjected to a heat treatment at a temperature of 500° C. or more and 650° C. or less. By this heat treatment, the semiconductor layer 8 that was not recovered by the irradiation of the laser light is preferably This heat treatment can eliminate defects in the semiconductor layer 85 and relax the strain in the semiconductor layer 85. TA (Rapid Thermal Anneal) equipment, resistance heating furnace, microwave heating The RTA device can be a GRTA (Gas Rapid Thermal Analysis Unit). thermal annealing) equipment, LRTA (Lamp Rapid Thermal An For example, when a resistance heating furnace is used, the heating temperature is 600°C. Cook for 4 hours.

[0108] Next, as shown in FIG. 8(A), the base in which the insulating layer 33 and the semiconductor layer 85 are bonded together is formed. The semiconductor layer of the substrate 31 is partially etched to form an island-shaped semiconductor layer 35. Complete.

[0109] The semiconductor layer 35 is made of p-type impurities such as boron, aluminum, and gallium to control the threshold voltage. Alternatively, n-type impurities such as phosphorus and arsenic may be added.

[0110] Next, as shown in FIG. 8(B), a gate insulating layer 38 is formed to cover the semiconductor layer 35. The gate insulating layer 38 is formed by subjecting the surface of the semiconductor layer 35 to an oxidation treatment by high density plasma treatment. The high density plasma treatment can be carried out by using, for example, He, A Mixtures of rare gases such as r, Kr, and Xe with oxygen, nitrogen oxide, ammonia, nitrogen, and hydrogen In this case, the plasma is excited by introducing microwaves, and low electron High-density plasma can be generated at high temperatures.

[0111] The oxidation or nitridation of the semiconductor film by the high-density plasma treatment described above proceeds through a solid-phase reaction. The interface state density between the gate insulating layer 38 and the semiconductor layer 35 can be made extremely low. The semiconductor layer 35 is directly oxidized or nitrided by high-density plasma treatment. The thickness of the insulating layer can be prevented from varying. The surface of the semiconductor film is oxidized by a solid-phase reaction using high-density plasma treatment. This prevents oxidation from progressing too quickly only at the interface, resulting in a gate with good uniformity and low interface state density. The insulating layer formed by the high density plasma treatment can be The transistor formed by including the insulating layer in part or all of the It is possible.

[0112] Alternatively, the semiconductor layer 35 is thermally oxidized to form the gate insulating layer 38. Also, a method such as plasma CVD or sputtering may be used to deposit silicon oxide, oxynitride, or the like. silicon oxide, silicon oxynitride, silicon nitride, hafnium oxide, aluminum oxide or tantalum oxide The gate insulating layer 38 may be formed by a single layer or a stack of films containing gallium.

[0113] After forming a conductive layer on the gate insulating layer 38, the conductive layer is processed into a predetermined shape. A gate electrode layer 39 is formed above the semiconductor layer 35. The gate electrode layer 39 is formed by CVD. The gate electrode layer 39 can be formed by a deposition method, a sputtering method, or the like. , tungsten (W), titanium (Ti), molybdenum (Mo), aluminum (Al), Copper (Cu), chromium (Cr), niobium (Nb), etc. can be used. An alloy containing the above metal as the main component may be used, or a compound containing the above metal may be used. Semiconductors such as polycrystalline silicon doped with impurity elements such as phosphorus that give conductivity to the conductor film. It may also be formed using the body.

[0114] In this embodiment, the gate electrode layer 39 is formed of a single conductive layer. The gate electrode layer 39 is formed of a plurality of stacked conductive layers. It's okay to have it.

[0115] The combination of two conductive layers is tantalum nitride or tantalum in the first layer and tantalum in the second layer. Tungsten can be used. In addition to the above examples, tungsten nitride and tungsten, Examples include molybdenum nitride and molybdenum, aluminum and tantalum, and aluminum and titanium. Tungsten and tantalum nitride have high heat resistance, so after forming two conductive layers, In the process, a heat treatment for the purpose of thermal activation can be performed. As a combination of layers, for example, silicon and nickel doped with impurities to give n-type conductivity can be used. Tungsten silicide, silicon doped with impurities to give it n-type conductivity In the case of a three-layer structure in which three conductive layers are stacked, a molybdenum film and an aluminum film are used. It is preferable to employ a laminated structure of an aluminum film and a molybdenum film.

[0116] Next, as shown in FIG. 8(C), an impurity element 71 is added using the gate electrode layer 39 as a mask. The semiconductor layer 35 includes p-type impurity regions 36A and 36B. In this embodiment, a p-channel transistor is formed. As an example, an impurity element (e.g., boron) that imparts p-type conductivity to the semiconductor layer 35 is used. In the case of an n-channel transistor, an impurity that gives the semiconductor layer 35 an n-type conductivity is added. Addition of a metal element (e.g., phosphorus or arsenic).

[0117] Next, as shown in FIG. 8(D), an insulating layer is formed to cover the gate electrode layer 39 and the gate insulating layer 38. By providing the insulating layer 40, the surface of the gate electrode layer 39 is protected from the heat treatment. Specifically, the insulating layer 40 can be made of silicon nitride, silicon nitride oxide, or the like. It is preferable to use silicon oxynitride, aluminum nitride, aluminum oxide, silicon oxide, etc. In this embodiment, a silicon oxynitride film having a thickness of about 50 nm is used as the insulating layer 40. There are.

[0118] In this embodiment, the insulating layer 41 and the insulating layer 42 are laminated on the insulating layer 40. The insulating layer formed on the insulating layer 40 may be a single insulating layer, or may be a laminate of three or more insulating layers. It may be layered.

[0119] The surface of the insulating layer 42 is polished by chemical mechanical polishing (CMP). The surface may be flattened by, for example, mechanical polishing.

[0120] Next, as shown in FIG. 9(A), a gate electrode layer 43C and an electrode layer 43 A and electrode layer 43B are formed.

[0121] The gate electrode layer 43C, the electrode layer 43A, and the electrode layer 43B are made of molybdenum, titanium, and the like. , chromium, tantalum, tungsten, neodymium, scandium, and other metallic materials, Conductive layers using alloy materials containing these metals as the main component, or nitrides of these metals, can be used as single layers or It can be used in a laminated state. In this case, aluminum or copper can be used as the metal material. Alternatively, copper is used in combination with high melting point metal materials to avoid problems with heat resistance and corrosion. High melting point metal materials include molybdenum, titanium, chromium, tantalum, and tungsten. Stainless steel, neodymium, scandium, etc. can be used.

[0122] For example, a gate electrode layer 43C, an electrode layer 43A, and an electrode layer 43B each having a two-layer laminated structure B is a two-layer laminated structure with a molybdenum film laminated on an aluminum film, and Two-layer structure with a butane film laminated on top, titanium nitride film or tantalum nitride film laminated on top of a copper film A two-layer structure or a two-layer structure in which a titanium nitride film and a molybdenum film are laminated is preferred. The gate electrode layer 43C, the electrode layer 43A, and the electrode layer 43B have a three-layer laminated structure. Examples include aluminum films, aluminum-silicon alloy films, and aluminum-titanium alloy films. A gold film or an aluminum-neodymium alloy film is used as an intermediate layer, and a tungsten film, tungsten nitride film, It is preferable to use a laminated structure in which a stainless steel film, a titanium nitride film, or a titanium film is used as an upper and lower layer. stomach.

[0123] In addition, the gate electrode layer 43C, the electrode layer 43A, and the electrode layer 43B are made of indium oxide, indium Indium tin oxide, indium oxide, zinc oxide, zinc aluminum oxide, zinc oxynitride A light-transmitting conductive oxide layer such as lead aluminum or zinc gallium oxide is used. It is also possible.

[0124] The thickness of the gate electrode layer 43C, the electrode layer 43A, and the electrode layer 43B is 10 nm to 400 nm. nm, preferably 100 nm to 200 nm. After forming a 150 nm conductive layer for the gate electrode by sputtering using a target, The conductive layer is etched into a desired shape to form a gate electrode layer 43C and an electrode layer 4 3A and electrode layer 43B are formed. The end of the formed gate electrode is tapered. This is preferable because it improves the coverage of the gate insulating layer to be laminated thereon. The mask may be formed by an ink-jet method. This eliminates the need for a photomask, thereby reducing manufacturing costs.

[0125] Next, as shown in FIG. 9(B), the gate electrode layer 43C, the electrode layer 43A and the electrode layer 4 A gate insulating layer 44 is formed on the gate insulating layer 3B. The gate insulating layer 44 is formed by plasma CVD or Using a sputtering method, silicon oxide film, silicon nitride film, silicon oxynitride film, silicon nitride oxide film , aluminum oxide film, aluminum nitride film, aluminum oxynitride film, aluminum nitride oxide film forming a single layer or a laminate of a hafnium film, hafnium oxide film, or tantalum oxide film; It is desirable that the gate insulating layer 44 contains as little impurities as possible, such as moisture and hydrogen. When forming a silicon oxide film by sputtering, silicon is used as the target. A quartz target or a quartz target is used, and oxygen or oxygen and argon are used as sputtering gas. A mixed gas of the following is used.

[0126] By removing impurities, an oxide semiconductor that has been made i-type or substantially i-type (highly purified) Since highly purified oxide semiconductors are extremely sensitive to interface states and interface charges, The interface between the oxide semiconductor and the gate insulating layer 44 is important. The gate insulating layer (GI) in contact with the nitride semiconductor is required to be of high quality.

[0127] For example, high density plasma CVD using microwaves (2.45GHz) produces dense, high dielectric strength films. This is preferable because it allows the formation of a high-quality insulating layer. By closely contacting the gate insulating layer, the interface state is reduced and the interface characteristics are improved. This is because it is possible to do so.

[0128] Of course, if a good insulating layer can be formed as a gate insulating layer, sputtering is also possible. Other film-forming methods such as a coating method or a plasma CVD method can also be applied. This process improves the film quality of the gate insulating layer and the interface characteristics between the gate insulating layer and the oxide semiconductor. In any case, it is important that the film quality as a gate insulating layer is good. Of course, the interface state density between the gate insulating layer and the oxide semiconductor is reduced to form a good interface. If possible, that's good.

[0129] An insulating layer using a material with high barrier properties, a silicon oxide film with a low nitrogen content, and a silicon oxynitride film Alternatively, the gate insulating layer 44 may be formed by laminating an insulating layer such as a base film. In this case, insulating layers such as silicon oxide films and silicon oxynitride films are used as insulating layers with high barrier properties and oxide semiconductors. As an insulating layer with high barrier properties, for example, a silicon nitride film or a silicon nitride oxide film is used. , aluminum nitride film, or aluminum nitride oxide film. By using a thin insulating layer, impurities in the atmosphere such as moisture or hydrogen, or impurities contained in the substrate, Impurities such as alkali metals and heavy metals contained in the oxide semiconductor layer, the gate insulating layer 44, or Alternatively, it is possible to prevent the intrusion of the oxide semiconductor layer into the interface between the oxide semiconductor layer and another insulating layer and the vicinity thereof. In addition, a silicon oxide film or a silicon oxynitride film having a low nitrogen content that is in contact with the oxide semiconductor layer By forming an insulating layer such as This can be prevented.

[0130] For example, the first gate insulating layer is formed by sputtering to a thickness of 50 nm to 200 nm. Silicon nitride film (SiNy (y>0)) and forming a second gate insulating layer on the first gate insulating layer. The silicon oxide film (SiO ) with a thickness of 5 nm to 300 nm is used as the insulating layer. x (x>0) The gate insulating layer 44 may be laminated to a thickness of 100 nm. The thickness can be set appropriately depending on the characteristics required for the transistor, and is 350 nm to 400 nm. That's fine.

[0131] In this embodiment, a silicon nitride film having a thickness of 50 nm is formed by sputtering. The gate insulating layer 4 has a structure in which a silicon oxide film having a thickness of 100 nm is laminated by the method. Form 4.

[0132] In order to minimize the inclusion of hydrogen, hydroxyl groups, and moisture in the gate insulating layer 44, As a pretreatment for film formation, the gate electrode layer 43C and the electrode layer 43D are formed in a preheating chamber of the sputtering device. The base substrate 31 on which the pole layer 43A and the electrode layer 43B are formed is preheated, and the base substrate 3 It is preferable to desorb and exhaust impurities such as moisture or hydrogen adsorbed on the catalyst layer 1. The heating temperature is 100°C or higher and 400°C or lower, preferably 150°C or higher and 300°C or lower. The evacuation means provided in the preheating chamber is preferably a cryopump. The process of (2) can be omitted.

[0133] Next, a film having a thickness of 2 nm to 200 nm, preferably 3 nm, is deposited on the gate insulating layer 44. and forming an oxide semiconductor layer having a thickness of 3 nm to 20 nm, more preferably 50 nm to 100 nm. The oxide semiconductor layer is formed by sputtering using an oxide semiconductor as a target. The oxide semiconductor layer is formed under a rare gas (for example, argon) atmosphere, an oxygen atmosphere, or Alternatively, it is formed by sputtering in a mixed atmosphere of rare gas (e.g., argon) and oxygen. Then, as shown in FIG. 9B, the oxide semiconductor layer is removed by etching or the like. The gate insulating layer 44 is processed into a desired shape, and an island-like An oxide semiconductor layer 45 is formed.

[0134] The oxide semiconductor layer can be formed using any of the above-described oxide semiconductors.

[0135] In this embodiment, the material contains In (indium), Ga (gallium), and Zn (zinc). 30 nm thick In-Ga-Z obtained by sputtering using a metal oxide target An nO-based non-single-crystal film is used as the oxide semiconductor layer. The composition of each metal is In:Ga:Zn=1:1:0.5, In:Ga:Zn=1:1:1, or Alternatively, a metal oxide target having In:Ga:Zn=1:1:2 can be used. Alternatively, the film may be formed using a target containing 2% by weight or more and 10% by weight or less of SiO2. In addition, the filling rate of the metal oxide target containing In, Ga, and Zn is 90% or more. 0% or less, preferably 95% or more and 99.9% or less. By using the hot plate, the oxide semiconductor layer formed becomes a dense film.

[0136] Next, the gate insulating layer 44 is partially etched to form a contact that reaches the electrode layer 43B. Then, a source electrode or a drain electrode is formed on the oxide semiconductor layer 45. Conductive layers used as electrodes (including wiring formed on the same layer) are formed by sputtering or vacuum deposition. After forming it by vapor deposition, the conductive layer is patterned by etching or the like, thereby forming the conductive layer shown in FIG. As shown in C), a source electrode 46A and a drain electrode 46B are formed on the oxide semiconductor layer 45. and electrode 46C are formed.

[0137] The conductive layer that will become the source electrode and the drain electrode (including the wiring formed in the same layer) The material is an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, or the above-mentioned Examples of the alloy include an alloy containing the above elements as a component, and an alloy film made of a combination of the above elements. High melting point metals such as Cr, Ta, Ti, Mo, W, etc. are placed on the top or bottom of a metal film such as Al, Cu, etc. It may also be configured by laminating metal films. Elements such as d, Sc, and Y are added to prevent the occurrence of hillocks and whiskers in Al films. By using Al material, it is possible to improve heat resistance.

[0138] The conductive layer may have a single layer structure or a laminated structure of two or more layers. a single-layer structure of aluminum film containing titanium; a two-layer structure of titanium film laminated on aluminum film; An i-film is layered on top of the Ti film, and an aluminum film is then layered on top of that, and a Ti film is then formed on top of that. Examples include a three-layer structure.

[0139] Next, as shown in FIG. 10(A), a source electrode 46A and a drain electrode 46B, and Insulating layers 47, 48 and 49 are formed to cover electrode 46C.

[0140] The insulating layers 47, 48 and 49 may be made of a silicon oxide film, a silicon oxynitride film, or the like. silicon nitride film, silicon nitride film, aluminum oxide film, hafnium oxide film, Yttrium oxide film, zirconium oxide film, gallium oxide film, tantalum oxide film, magnesium oxide film Insulation containing one or more of: neodymium oxide, lanthanum oxide, cerium oxide, and neodymium oxide Each layer can be used.

[0141] Next, as shown in FIG. 10(A), the desired regions of the insulating layers 47, 48 and 49 are An opening is formed in the insulating layer 49, reaching the electrode 46C. The conductive layer 50 is made of an ITSO film having a thickness of 10 nm and a reflective metal film having a thickness of 200 nm. film (here, a metal film having silver, palladium, and copper) and a 10 nm thick ITSO film. The ITSO film is an oxide film containing indium, tin, and silicon ( (also known as ITSO).

[0142] Next, as shown in FIG. 10(A), an island-shaped insulating layer 51 is formed on the insulating layer 49 and the conductive layer 50. The insulating layer 51 is made of a photosensitive polyimide organic resin film having a thickness of 1.5 μm. There are.

[0143] Next, as shown in FIG. 10(B), an EL layer 52 is formed on the conductive layer 50 and the insulating layer 49. Then, the insulating layer 49 and the conductive layer 53 are formed on the EL layer 52 to form a light-emitting element. do.

[0144] The EL layer 52 has at least a light-emitting layer. The EL layer 52 has a hole a substance with high injection properties, a substance with high hole transport properties, a hole blocking material, a substance with high electron transport properties, Substances with high electron injection properties or bipolar substances (substances with high electron transport properties and hole transport properties) ) and the like.

[0145] The EL layer 52 can be made of either a low molecular weight compound or a high molecular weight compound. The layers constituting the EL layer 52 may each be formed by evaporation (vacuum evaporation) The method may include a transfer method, a printing method, an inkjet method, a coating method, etc. .

[0146] When a white light emitting element is used as the light emitting element, two or more kinds of It is preferable to have a configuration in which a luminescent material is included. For example, two or more luminescent materials emit light of complementary colors. White light can be obtained by selecting a luminescent material so that the following relationship holds. For example, they are luminous materials that emit light of R (red), G (green), B (blue), Y (yellow), O (orange), etc. A substance or a sac of luminescent material that emits light containing spectral components of two or more of the colors R, G, and B. It is preferable that the spectrum of light emitted from the light emitting element is in the visible light region. A light-emitting element having two or more peaks within a wavelength range (e.g., 350 nm to 750 nm) It is preferable to apply the emission spectrum of a material having a peak in the yellow wavelength region. The filter is preferably a material that also has spectral components in the green and red wavelength regions.

[0147] The EL layer 52 is a layer including a light-emitting material that emits light of one color and a layer including a light-emitting material that emits light of another color. For example, the EL layer 52 may have a structure in which a light-emitting layer containing The light-emitting layers may be stacked in contact with each other, or may have an area that does not contain any light-emitting material. For example, the fluorescent-emitting layer and the phosphorescent-emitting layer may be laminated with the fluorescent-emitting layer and the phosphorescent-emitting layer interposed therebetween. The layer may contain the same material (for example, a host material or an assist material) as the light-emitting layer or the phosphorescent layer, and A region containing no light-emitting material may be provided. This facilitates the operation and reduces the driving voltage.

[0148] The light-emitting element EL may be a single element having one EL layer 52, or may be a light-emitting element having multiple EL layers. The EL layer 52 may be a tandem element in which the EL layer 52 is stacked via a charge generating layer.

[0149] The conductive layer 53 is made of a metal, alloy, or conductive compound having a small work function (work function of 3.8 eV or less). It is preferable to use a material such as a material of the periodic table or a mixture thereof. Elements belonging to Group 1 or 2 of the table, i.e., alkali metals such as Li and Cs, Mg, Ca Other examples of cathode materials include alkaline earth metals such as Sr and alkali metals. Alloys containing lithium metals and alkaline earth metals (Mg:Ag, Al:Li) or metal compounds (Li iF, CsF, CaF2) or transition metals including rare earth metals can be used. It is also possible.

[0150] Through the above steps, the display device shown in FIG. 2 can be formed.

[0151] Note that the structures and methods described in this embodiment mode may be combined as appropriate with structures and methods described in other embodiment modes. They can be used in combination.

[0152] (Embodiment 3) In this embodiment, an example of a display module to which the display device of one embodiment of the present invention can be applied will be described. A display module including a display device of one embodiment of the present invention will be described with reference to FIG. The display module includes a display device according to one embodiment of the present invention, and therefore, can display an extremely high-resolution image. This allows for a highly accurate display unit.

[0153] The display module 800 shown in FIG. 11 has an upper cover 801 and a lower cover 802. , a touch panel 804 connected to an FPC 803, and a display panel connected to an FPC 805. 806, a frame 809, a printed circuit board 810, and a battery 811.

[0154] The display device of one embodiment of the present invention can be used for the display panel 806, for example. Therefore, it is possible to provide a display with extremely high definition.

[0155] The upper cover 801 and the lower cover 802 are connected to a touch panel 804 and a display panel 806. The shape and dimensions can be changed as needed to suit the size of the device.

[0156] The touch panel 804 is a resistive or capacitive touch panel, and the display panel 8 806. In addition, the opposing substrate (sealing substrate) of the display panel 806 It is also possible to provide a touch panel function. It is also possible to provide an optical sensor in each pixel to create an optical touch panel.

[0157] The frame 809 not only protects the display panel 806 but also protects the display panel 806 from light by the operation of the printed circuit board 810. It also functions as an electromagnetic shield to block electromagnetic waves generated by the frame 8. 09 may also function as a heat sink.

[0158] The printed circuit board 810 includes a power supply circuit, a signal circuit for outputting a video signal, and a clock signal. The power supply to the power supply circuit can be an external commercial power supply or Alternatively, the power source may be a separately provided battery 811. If a power supply is used, this can be omitted.

[0159] In addition, the display module 800 includes additional components such as a polarizing plate, a retardation plate, and a prism sheet. It may also be provided as follows.

[0160] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0161] (Fourth embodiment) In this embodiment, examples of electronic devices to which the display device of one embodiment of the present invention can be applied will be described. do.

[0162] An electronic device can be manufactured using the display device of one embodiment of the present invention. By using the device, electronic devices having extremely high-definition display portions can be manufactured.

[0163] Examples of electronic devices include television sets, desktop or notebook PCs, etc. Personal computers, computer monitors, digital cameras, digital video cameras, digital photo frames, mobile phones, portable game consoles, personal digital assistants, audio equipment Examples include playback devices, large game machines such as pachinko machines, etc.

[0164] The electronic device according to one embodiment of the present invention is suitable for use in an interior or exterior wall of a house or building, or in an automobile. It can be incorporated along the curved surface of the interior or exterior of the vehicle.

[0165] The electronic device of one embodiment of the present invention may include a secondary battery and may be powered by wireless power transmission. It is preferable that the secondary battery can be charged.

[0166] As the secondary battery, for example, a lithium polymer battery (lithium ion battery) using a gel electrolyte is used. Lithium-ion secondary batteries such as lithium-ion polymer batteries, nickel-metal hydride batteries, nickel-cadmium batteries, organic Examples include radical batteries, lead-acid batteries, secondary air batteries, nickel-zinc batteries, and silver-zinc batteries. do.

[0167] The electronic device according to one embodiment of the present invention may include an antenna. By doing so, it is possible to display images, information, etc. on the display unit. If the device has a secondary battery, the antenna may be used for contactless power transmission.

[0168] The electronic device according to one embodiment of the present invention includes a sensor (force, displacement, position, velocity, acceleration, angular velocity, rotation Number, distance, light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, voltage, power (including the ability to measure radiation, flow rate, humidity, gradient, vibration, odor or infrared) It may have.

[0169] The electronic device of one embodiment of the present invention can have various functions. (still images, videos, text images, etc.) on the display, touch panel function, calendar Functions such as displaying date and time, running various software (programs) functions, wireless communication functions, and functions to read programs or data recorded on recording media. It can have functions etc.

[0170] Furthermore, in an electronic device having a plurality of display units, one display unit is mainly used for displaying image information. and one display unit mainly displays text information, or multiple displays By displaying images that take parallax into consideration, it is possible to have a function for displaying a three-dimensional image. Furthermore, electronic devices with an image receiving unit have the function of taking still or moving images, Functions for automatically or manually correcting captured images, and for storing captured images on a recording medium (external or electronic) It can have functions such as saving the captured image to a memory card (built into the device) and displaying the captured image on the display. Note that the functions of the electronic device of one embodiment of the present invention are not limited to those described above, and various functions can be used. It can have:

[0171] 12(A), (B), (C), (D), and (E) show electronic devices having a curved display unit 7000. The display unit 7000 has pixels each having a light-emitting element, so that the display surface is curved. The display unit 700 is curved, and can display information along the curved display surface. The 0 may be flexible.

[0172] The display unit 7000 includes a display device or the like according to one embodiment of the present invention. It is possible to provide an electronic device having a display unit with extremely high definition.

[0173] An example of a mobile phone is shown in Figures 12(A) and 12(B). 12B. Each of the mobile phone 7100 and the mobile phone 7110 shown in FIG. 12B includes a housing 7101, a display unit 7102, and a 000, operation button 7103, external connection port 7104, speaker 7105, microphone 71 12B further includes a camera 7107. Has.

[0174] Each mobile phone has a touch sensor on the display unit 7000. All operations, such as entering text, can be performed by touching the display 7000 with a finger or a stylus. It can be done.

[0175] In addition, by operating the operation button 7103, the power can be turned on and off, and the display unit 7000 For example, from the email creation screen, you can change the type of image displayed. You can switch to the main menu screen.

[0176] Also, a detection device such as a gyro sensor or an acceleration sensor may be provided inside the mobile phone. The orientation of the mobile phone (portrait or landscape) is then determined and the orientation of the screen display of the display unit 7000 is automatically adjusted. The screen orientation can be dynamically switched. Touching 7000, operating the operation button 7103, or using the microphone 7106 This can also be done by inputting, etc.

[0177] 12(C) and (D) show examples of the portable information terminal. The portable information terminal shown in FIG. The portable information terminal 7200 and the portable information terminal 7210 shown in FIG. 12D each include a housing 7201 and a It has a display unit 7000. It also has operation buttons, an external connection port, a speaker, a microphone, and an The display unit 7000 may have an antenna, a camera, a battery, etc. The mobile information terminal is operated by touching the display unit 7000 with a finger or a stylus. This can be done.

[0178] The portable information terminal exemplified in this embodiment is, for example, a telephone, a notebook, an information viewing device, etc. Specifically, as a smartphone, The portable information terminal exemplified in this embodiment can be, for example, a mobile phone, a telephone E-mail, viewing and writing text, playing music, internet communication, computer games, etc. A variety of applications can be executed.

[0179] The portable information terminal 7200 and the portable information terminal 7210 are configured to display text and image information on a plurality of For example, as shown in Figure 12(C) and (D), three operation buttons can be displayed on the screen. A button 7202 can be displayed on one side, and rectangular information 7203 can be displayed on the other side. FIG. 12(C) shows an example in which information is displayed on the top surface of the mobile information terminal, and FIG. 12(D) Here is an example of information being displayed on the side of a mobile information terminal. The information may be displayed on the

[0180] Examples of such information include notifications from social networking services (SNS). , display notifying you of incoming e-mails or phone calls, subject of e-mails or sender name , date and time, battery level, antenna reception strength, etc. Instead of information, operation buttons, icons, etc. may be displayed at the position where the information is displayed.

[0181] For example, the user of the mobile information terminal 7200 may place the mobile information terminal 7200 in the breast pocket of his / her clothes. When the item is stored, the display (information 7203 in this example) can be confirmed.

[0182] Specifically, the telephone number or name of the caller of the incoming call is recorded on the mobile information terminal 7200. The user can take the mobile information terminal 7200 out of his / her pocket and You can check the display and decide whether to answer the call without taking it out.

[0183] FIG. 12(E) shows an example of a television device. The television device 7300 has a housing 7 The display unit 7000 is built into the housing 7301. 301 is shown as a supported configuration.

[0184] The television device 7300 shown in FIG. 12E is operated by an operation switch provided in the housing 7301. This can be done by a separate remote control 7311 or the display unit 70. The display unit 7000 may be provided with a touch sensor, and the operation can be performed by touching the display unit 7000 with a finger or the like. The remote control operator 7311 may display information to be output from the remote control operator 7311. The remote control unit 7311 may have a display unit that displays the operation keys or touch panel. The channel and volume can be controlled by the touch panel, and the information displayed on the display unit 7000 can be displayed. You can control the video that is displayed.

[0185] The television device 7300 includes a receiver, a modem, and the like. The receiver can receive general television broadcasts. By connecting to a wireless communication network, it can be transmitted in one direction (sender to receiver) or It is also possible to communicate information in both directions (between sender and receiver, or between receivers). be.

[0186] 13(A) to 13(I) show a flexible, bendable display unit 70. 1 shows an example of a mobile information terminal having a .01.

[0187] The display portion 7001 includes a display device or the like according to one embodiment of the present invention. The mobile information terminal may be provided with a touch sensor, and the mobile information terminal can be operated by touching the display unit 7001 with a finger or the like. According to one aspect of the present invention, an electronic device having a display with extremely high resolution can be manufactured. We can provide the equipment.

[0188] 13A and 13B are perspective views showing an example of a portable information terminal. 00 denotes a housing 7501, a display unit 7001, a drawer member 7502, an operation button 7503, etc. It has.

[0189] The portable information terminal 7500 has a flexible display unit rolled up in a housing 7501. The display unit 7001 can be pulled out using a pull-out member 7502. do.

[0190] In addition, the mobile information terminal 7500 can receive video signals using a built-in control unit. The portable information terminal 7500 can display the captured image on the display unit 7001. The housing 7501 is equipped with a terminal for connecting a connector, The image signal and power may be supplied directly from the outside via wires.

[0191] In addition, the operation button 7503 can be used to turn the power on and off and to switch the displayed image. 13(A) and 13(B), the mobile information terminal 7500 In this example, the operation buttons 7503 are arranged on the surface of the mobile information terminal 7500. It may be placed on the same surface (front surface) as the display surface or on the back surface.

[0192] FIG. 13B shows a portable information terminal 7500 with the display portion 7001 pulled out. In this state, an image can be displayed on the display unit 7001. 13(A) in a rolled state and FIG. 13(B) in which the display unit 7001 is pulled out. The portable information terminal 7500 may be configured to display different images depending on the state. For example, as shown in FIG. In the state (A), the rolled-up part of the display unit 7001 is hidden. This allows the power consumption of the portable information terminal 7500 to be reduced.

[0193] When the display unit 7001 is pulled out, the display surface of the display unit 7001 is made flat. To fix the display unit 7001, a reinforcing frame may be provided on the side of the display unit 7001.

[0194] In addition to this configuration, a speaker is provided on the housing, and the audio signal received together with the video signal is output. The configuration may be such that sound is output.

[0195] An example of a foldable mobile information terminal is shown in FIG. 13(C) to FIG. 13(E). In Figure 13(C), the unfolded state, and in Figure 13(D), the unfolded or folded state. In Figure 13(E), the mobile phone is in a folded state. The portable information terminal 7600 is highly portable when folded. When unfolded, the seamless, large display area provides excellent visibility.

[0196] The display unit 7001 is supported by three housings 7601 connected by hinges 7602. By bending the two housings 7601 via the hinge 7602, the portable information The terminal 7600 can be reversibly transformed from an unfolded state to a folded state.

[0197] Figures 13(F) and (G) show an example of a foldable mobile information terminal. In FIG. 13(G), the display unit 7001 is folded inward. The mobile information terminal 7650 is shown folded with the side 7001 facing outwards. The terminal 7650 has a display portion 7001 and a non-display portion 7651. When not in use, the display unit 7001 can be folded inward. This can prevent the surface from getting dirty and scratched.

[0198] FIG. 13(H) shows an example of a flexible portable information terminal. The device has a housing 7701 and a display portion 7001. , 7703b, speakers 7704a and 7704b as audio output means, and external connection port 7 The portable information terminal 7700 may have a flexible The battery 7709 may be mounted on the display unit 7. It may be placed overlapping with 001.

[0199] The housing 7701, the display portion 7001, and the battery 7709 are flexible. The portable information terminal 7700 can be bent into a desired shape and twisted. For example, the display portion 7001 of the portable information terminal 7700 is Alternatively, the portable information terminal 7700 can be folded so that the outer side faces outward. The display unit 7701 and the housing 7701 can be rolled up and used. Since the mobile information terminal 7700 can freely deform, even if it is dropped, This has the advantage that it is less likely to be damaged even when an external force is applied to it unintentionally.

[0200] In addition, since the portable information terminal 7700 is lightweight, the upper part of the housing 7701 can be held with a clip or the like. Do not use it by holding it and hanging it, or by fixing the housing 7701 to the wall with a magnet or the like. It can be conveniently used in a variety of situations.

[0201] FIG. 13(I) shows an example of a wristwatch-type portable information terminal. The device has a keyboard 7801, a display unit 7001, an input / output terminal 7802, an operation button 7803, etc. The handheld terminal 7801 functions as a housing. The battery 7805 may be mounted on the display unit 70. It may be arranged overlapping with band 01 or band 7801, etc.

[0202] The band 7801, the display portion 7001, and the battery 7805 are flexible. Therefore, it is easy to bend the portable information terminal 7800 into a desired shape.

[0203] The operation button 7803 is used to set the time, turn the power on and off, and turn wireless communication on and off. It has various functions such as auto-start, silent mode activation and deactivation, power saving mode activation and deactivation, etc. For example, the operating system built into the portable information terminal 7800 can be Depending on the system, the functions of the operation buttons 7803 can be freely set.

[0204] In addition, by touching an icon 7804 displayed on the display unit 7001 with a finger or the like, the application You can launch the application.

[0205] The portable information terminal 7800 can also perform short-distance wireless communication in accordance with a communication standard. For example, by communicating with a wireless headset, You can also make calls using Lee.

[0206] The portable information terminal 7800 may also have an input / output terminal 7802. If the device has 802, it can directly exchange data with other information terminals via a connector. Charging can also be performed via the input / output terminal 7802. The charging operation of the mobile information terminal shown in the example is performed by non-contact power transmission without using input / output terminals. You may go.

[0207] FIG. 14(A) shows the exterior of the automobile 7900. FIG. 14(B) shows the driver's seat of the automobile 7900. The automobile 7900 includes a body 7901, wheels 7902, a windshield 7903, It has lights 7904, fog lights 7905, etc.

[0208] The display device of one embodiment of the present invention can be used for a display portion of an automobile 7900, for example. For example, the display units 7910 to 7917 in FIG. 14B may be used in conjunction with display devices of one embodiment of the present invention. A location can be provided.

[0209] The display portion 7910 and the display portion 7911 are provided in a part of the windshield of the automobile. Therefore, the visibility is not obstructed when driving the automobile 7900. A display device of one embodiment can be installed on a portion of the windshield of the automobile 7900.

[0210] The display unit 7912 is provided on the pillar. The display unit 7913 is provided on the dashboard. For example, an image from an imaging means provided on the vehicle body is displayed on the display unit 7912. By doing so, it is possible to compensate for the visibility obstructed by the pillar. In the 913, it is possible to complement the view obstructed by the dashboard, and in the display unit 7914, This can complement the view blocked by the door. By projecting the image from the imaging means, blind spots can be compensated for and safety can be improved. In addition, by projecting images that complement the invisible parts, safety checks can be performed more naturally and without discomfort. This can be done.

[0211] The display unit 7917 is provided on the handle. 6, or display 7917 displays navigation information, speedometer, tachometer, It can provide various information such as distance traveled, fuel amount, gear status, air conditioning settings, and more. In addition, the display items and layout displayed on the display can be customized to suit the user's preferences. The above information can be displayed on the display units 7910 to 7914. can also be displayed.

[0212] The display portion to which the display device of one embodiment of the present invention is applied may be flat. The display device of one embodiment may have a configuration that does not have a curved surface or flexibility.

[0213] Figure 14 (C) and (D) show the digital signage. The digital signage includes a housing 8000, a display unit 8001, and a screen. It also has a speaker 8003, etc., and an LED lamp, operation keys (power switch, or operation It may have a variety of functions, including a switch, connection terminals, various sensors, a microphone, etc.

[0214] Figure 14(D) shows a digital signage attached to a cylindrical pillar.

[0215] The larger the display section 8001, the more information can be displayed at once. The wider the display part 8001 is, the more easily it is noticed by people, and for example, the more effective the advertisement is. can.

[0216] By applying a touch panel to the display unit 8001, images or videos can be displayed on the display unit 8001. It is not only a display but also allows users to operate it intuitively, which is desirable. Or when used to provide information such as traffic information, intuitive operation is required. This can improve usability.

[0217] The portable game machine shown in FIG. 14E includes a housing 8101, a housing 8102, a display portion 8103, and a display unit 8104. , a display unit 8104, a microphone 8105, a speaker 8106, operation keys 8107, It has Tyrus 8108 etc.

[0218] The portable game machine shown in FIG. 14(E) has two display units (display unit 8103 and display unit 810 Note that the number of display units included in the electronic device of one embodiment of the present invention is limited to two. If an electronic device has multiple display units, at least one At least one display portion may include the display device of one embodiment of the present invention.

[0219] FIG. 14(F) shows a notebook personal computer, which includes a housing 8111 and a display unit 811 2, a keyboard 8113, a pointing device 8114, etc.

[0220] The display device of one embodiment of the present invention can be applied to the display portion 8112.

[0221] FIG. 15(A) shows the appearance of the camera 8400 with the viewfinder 8500 attached. show.

[0222] The camera 8400 includes a housing 8401, a display unit 8402, an operation button 8403, a shutter The camera 8400 has a button 8404 and the like. The camera 8400 also has a detachable lens 8406. It is attached.

[0223] Here, the camera 8400 is a camera in which the lens 8406 is removed from the housing 8401 and replaced. However, the lens 8406 and the housing may be integrated.

[0224] The camera 8400 can capture an image by pressing the shutter button 8404. The display portion 8402 also functions as a touch panel. It is also possible to take an image by

[0225] The housing 8401 of the camera 8400 has a mount with electrodes, and a viewfinder 850 In addition to the 0, strobe devices etc. can also be connected.

[0226] The finder 8500 includes a housing 8501, a display unit 8502, a button 8503, and the like. .

[0227] The housing 8501 has a mount that engages with the mount of the camera 8400, The mount can be attached to the camera 8400. The image received from the camera 8400 through the electrode is displayed on the display unit 8502. It can be done.

[0228] The button 8503 functions as a power button. The 8502 display can be switched on and off.

[0229] The display unit 8402 of the camera 8400 and the display unit 8502 of the finder 8500 are The display device according to one embodiment of the present invention can be applied.

[0230] In FIG. 15(A), the camera 8400 and the finder 8500 are separate electronic devices. However, these are configured to be detachable. The camera may also have a built-in viewfinder with a similar display device.

[0231] FIG. 15B shows the appearance of the head mounted display 8200.

[0232] The head-mounted display 8200 includes a mounting part 8201, a lens 8202, and a main body 82 8203, a display unit 8204, a cable 8205, etc. It has a built-in 8206 battery.

[0233] A cable 8205 supplies power from a battery 8206 to the main body 8203. 03 is equipped with a wireless receiver and the like, and image information such as received image data is displayed on a display unit 8204. In addition, the camera installed in the main body 8203 can record the movements of the user's eyeballs and eyelids. By capturing the user's viewpoint and calculating the coordinates of the user's viewpoint based on that information, It can be used as an input means.

[0234] Furthermore, the wearing unit 8201 may be provided with a plurality of electrodes at positions that come into contact with the user. The main body 8203 detects the current flowing through the electrodes in accordance with the movement of the user's eyeballs, The device may have a function to recognize the user's point of view. By doing so, the attachment part 82 may have a function of monitoring the pulse of the user. O1 may have various sensors such as a temperature sensor, a pressure sensor, an acceleration sensor, etc. The display unit 8204 may have a function to display the user's biological information. It detects head movements and changes the image displayed on the display unit 8204 according to those movements. That's fine.

[0235] The display device of one embodiment of the present invention can be applied to the display portion 8204.

[0236] 15(C) and (D) show the appearance of the head mounted display 8300. .

[0237] The head-mounted display 8300 includes a housing 8301, two display units 8302, and an operation unit. It has a button 8303 and a band-like fastener 8304 .

[0238] The head mounted display 8300 is the same as the head mounted display 8200. In addition to the functions it has, it also has two displays.

[0239] By having two displays 8302, the user can see one display per eye. This allows for high-resolution images to be displayed even when using parallax for 3D display. The display portion 8302 can display an image. This keeps the distance from the user's eyes to the display surface constant. This allows users to see more natural images. Even if the image changes depending on the viewing angle, the image is displayed in the normal direction to the display surface. Since the user's eyes are positioned, the effect can be virtually ignored, resulting in a more realistic look. It is possible to display images with

[0240] The operation button 8303 has a function such as a power button. The display may have a button.

[0241] As shown in FIG. 15(E), a lens is provided between the display unit 8302 and the user's eyes. The lens 8305 allows the user to magnify the display portion 8302. This increases the sense of realism, as shown in Figure 15(E). , and may have a dial 8306 that changes the position of the lens for diopter adjustment.

[0242] The display device of one embodiment of the present invention can be applied to the display portion 8302. Such a display device can achieve extremely high resolution, so it can be used in a lens-type display as shown in Figure 15(E). Even when enlarged using the 8305 lens, the pixels are not visible to the user, providing a more realistic image. It is possible to display high-quality images.

[0243] 16(A) to 16(C) show examples in which one display unit 8302 is provided. By adopting such a configuration, the number of parts can be reduced.

[0244] The display unit 8302 has two areas, one for the right eye and one for the left eye, each of which has a different image. Images can be displayed side by side, allowing for stereoscopic images to be displayed using binocular parallax. It is possible.

[0245] In addition, even if a single image that can be viewed by both eyes is displayed across the entire area of the display unit 8302, This makes it possible to display a panoramic image across both ends of the field of view, The sense of realism increases.

[0246] 16C, a lens 8305 may be provided. Alternatively, one image may be displayed on the display unit 8302 and the other image may be displayed on the display unit 8303. The same image may be viewed with both eyes via the lenses 8305.

[0247] 16D, the housing 8301 may include another electronic device, for example, The mobile phone 7110 shown may be inserted to view the displayed image.

[0248] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination. [Explanation of symbols]

[0249] C1 Capacitor element M1 transistor M2 transistor M3 transistor M11 transistor M12 transistor M13 transistor M14 transistor 10 Display device 11 Drive circuit 12 Drive circuit 13 Display section 20 Pixel circuit 20A pixel circuit 21 Device layer 21B Element layer 21C Device Layer 22 Device Layer 23 Element Layer 31 Base board 33 Insulating layer 35 Semiconductor layer 36 Semiconductor layer 36A Impurity region 36B Impurity region 37 Channel formation region 38 Gate insulating layer 39 gate electrode layer 40 insulating layer 41 Insulating layer 42 Insulating layer 43A Electrode layer 43B Electrode layer 43C gate electrode layer 44 Gate insulating layer 45 Oxide semiconductor layer 46A source electrode 46B Drain electrode 46C electrode 47 Insulating layer 48 Insulating Layer 49 Insulating Layer 50 Conductive layer 51 Insulating layer 52 EL layer 53 Conductive layer 61 Shift Register 62 Buffer circuit 63 Video voltage generation circuit 64 Buffer Circuit 71 Impurity elements 80 Bonded substrate 82 Embrittlement layer 84 Semiconductor layer 85 Semiconductor layer 7000 Display 7001 Display section 7100 Mobile Phone 7101 Housing 7103 Operation button 7104 External connection port 7105 Speaker 7106 Microphone 7107 Camera 7110 Mobile phone 7200 Personal Digital Assistant 7201 Case 7202 Operation button 7203 Information 7210 Mobile Information Terminal 7300 Television equipment 7301 Housing 7303 Stand 7311 Remote control device 7500 Mobile Information Terminal 7501 Case 7502 Materials 7503 Operation button 7600 Personal Digital Assistant 7601 Case 7602 Hinge 7650 Personal Digital Assistant 7651 Hidden part 7700 Personal Digital Assistant 7701 Housing 7703a Button 7703b Button 7704a Speaker 7704b Speaker 7705 External connection port 7706 Mike 7709 Battery 7800 Mobile Information Terminal 7801 band 7802 Input / output terminal 7803 Operation button 7804 Icons 7805 Battery 7900 Automobiles 7901 Car body 7902 Wheel 7903 Windshield 7904 Light 7905 Fog lamp 7910 Display section 7911 Display section 7912 Display section 7913 Display section 7914 Display section 7915 Display section 7916 Display section 7917 Display section 800 Display Module 8000 chassis 801 Top cover 8001 Display section 802 Lower cover 803 FPC 8003 Speaker 804 Touch Panel 805 FPC 806 Display Panel 809 frames 810 Printed Circuit Board 811 Battery 8101 Housing 8102 Housing 8103 Display section 8104 Display section 8105 Microphone 8106 Speaker 8107 Operation key 8108 Stylus 8111 Housing 8112 Display section 8113 keyboard 8114 Pointing Device 8200 Head Mounted Display 8201 Mounting part 8202 Lens 8203 Main unit 8204 Display section 8205 Cable 8206 Battery 8300 Head Mounted Display 8301 Housing 8302 Display section 8303 Operation button 8304 Fixtures 8305 Lens 8306 Dial 8400 Camera 8401 Housing 8402 Display section 8403 Operation button 8404 Shutter button 8406 Lens 8500 Finder 8501 Housing 8502 Display section 8503 Button

Claims

[Claim 1] a pixel circuit and a light-emitting element, the pixel circuit includes a first element layer having a first transistor and a second element layer having a second transistor; the first transistor has silicon in a channel formation region; the first transistor has a function of driving the light-emitting element, the second transistor has a function of a switch, the second transistor has a metal oxide in a channel formation region; The metal oxide has a semiconductor function, The display device, wherein the second element layer is provided above the first element layer.

Citation Information

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