Image sensor and operating method thereof

Abstract

To provide an image sensor for improving image quality and an operating method of the image sensor.SOLUTION: An image sensor includes: a first pixel group formed by arranging a plurality of first micro lenses on a plurality of first pixels, respectively; a second pixel group formed by arranging a second micro lens on at least two of a plurality of second pixels; and a timing controller. The timing controller is configured to: control, in a first sensing readout period included in a readout period, first image signals generated from the first pixels and second image signals generated from the second pixels to be output; and control, in a second sensing readout period, third image signals generated from the first pixels and fourth image signals generated from the second pixels to be output.SELECTED DRAWING: Figure 8

Description

[Technical Field]

[0001] The present invention relates to an image sensor, and more particularly to an image sensor including a normal pixel and an autofocus pixel, and a readout method thereof. [Background technology]

[0002] An image sensor is a device that captures two-dimensional or three-dimensional images of an object. Image sensors generate image data of the object using photoelectric conversion elements that react to the intensity of light reflected or emitted from the object.

[0003] Recently, autofocusing (AF), which automatically detects the focus of an image sensor, has been widely used. In particular, due to its characteristics such as fast focus detection speed, phase difference autofocus technology has been extensively studied. For example, in phase difference autofocus, light passing through a photographing lens is split and detected at different positions, and a focusing lens is automatically driven to adjust the focal length so that the detection signals have the same phase and intensity.

[0004] In an image sensor including normal pixels and autofocus pixels, a technique is required to improve image quality while performing autofocus detection operations. Summary of the Invention [Problem to be solved by the invention]

[0005] SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional techniques, and an object of the present invention is to provide an image sensor and an operating method thereof that improve image quality. [Means for solving the problem]

[0006] In order to achieve the above object, an image sensor according to one aspect of the present invention includes: a first pixel group including a plurality of first pixels, each having a plurality of first microlenses arranged above the first pixels; a second pixel group including a plurality of second pixels, each having a second microlens arranged above at least two of the second pixels; and a timing controller, wherein the timing controller controls a first image signal generated from each of the first pixels and a second image signal generated from a first portion of the second pixels to be output in a first sensing readout section included in a readout section, and controls a third image signal generated from each of the first pixels and a fourth image signal generated from each of the second pixels to be output in a second sensing readout section following the first sensing readout section included in the readout section.

[0007] In order to achieve the above object, an image sensor according to another aspect of the present invention includes a first pixel group including a plurality of first pixels arranged in a matrix, a second pixel group including a plurality of second pixels arranged in a matrix, a plurality of first microlenses arranged on top of the plurality of first pixels, a second microlens arranged on top of at least two of the plurality of second pixels and having a diameter larger than that of the first microlens of the plurality of first microlenses, and a readout circuit, wherein the readout circuit sequentially outputs, in a readout section, a first pixel value generated based on each of the plurality of first pixels and a third pixel value generated based on each of the plurality of first pixels, and sequentially outputs, in the readout section, a second pixel value generated based on a first portion of the plurality of second pixels of the plurality of second pixels and a fourth pixel value generated based on each of the plurality of second pixels.

[0008] In order to achieve the above object, one aspect of the present invention provides an operating method of an image sensor including a first pixel group including a first pixel, a second pixel group including a second pixel, first microlenses arranged in each of the first pixels, and second microlenses arranged in at least two of the second pixels, the operating method comprising the steps of: outputting a first reset signal for the first pixel and a second reset signal for the second pixel; outputting a first image signal generated from each of the first pixels and a second image signal generated from a first portion of the second pixels; and outputting a third image signal generated from the first pixel and a fourth image signal generated from each of the second pixels. [Effects of the Invention]

[0009] According to the image sensor of the present invention, when reading out first image signals generated from all first pixels included in the first pixel group, second image signals generated from some second pixels of the second pixel group are read out, thereby generating an image with an improved signal-to-noise ratio (SNR) using the first and third image signals, and performing an auto focus detection operation using the second and fourth image signals. The image sensor of the present invention can perform an auto focus detection operation and improve the signal-to-noise ratio (SNR), thereby improving image quality.

[0010] In addition, according to the image sensor of the present invention, during the readout operation for auto focus detection, the image signal of the normal pixel is read out according to the conversion gain, thereby generating a high dynamic range (HDR) image and improving the image quality.

[0011] The effects obtained from the embodiments of the present invention are not limited to the effects described above, and other effects not mentioned will be clearly derived and understood by a person skilled in the art to which the present invention pertains from the following description. In other words, unintended effects resulting from implementing the embodiments of the present invention will also be derived from the embodiments of the present invention by a person skilled in the art. [Brief explanation of the drawings]

[0012] [Figure 1] 1 is a diagram illustrating the structure of a digital imaging device according to one embodiment of the present invention; [Figure 2] 1 is a block diagram illustrating an image sensor according to an embodiment of the present invention. [Figure 3] FIG. 2 illustrates a first example of a pixel array according to an embodiment of the present invention. [Figure 4] 4 is a diagram illustrating an image signal according to an embodiment of the present invention; [Figure 5A] FIG. 2 illustrates a second example of a pixel array according to an embodiment of the present invention. [Figure 5B] FIG. 10 illustrates a third example of a pixel array according to an embodiment of the present invention. [Figure 5C] FIG. 10 illustrates a fourth example of a pixel array according to an embodiment of the present invention. [Figure 6] FIG. 3 is a circuit diagram for one pixel included in the pixel array of FIG. 2. [Figure 7] 2 is a circuit diagram of a pixel included in an image sensor according to an embodiment of the present invention; [Figure 8] FIG. 2 is a timing diagram of an example image sensor for reading out pixel signals according to an embodiment of the present invention. [Figure 9] 4 is a flowchart illustrating an operation method of an image sensor according to an embodiment of the present invention. [Figure 10] 1 is a circuit diagram illustrating an example of a pixel according to an embodiment of the present invention; [Figure 11]FIG. 4 is a timing diagram of another example of an image sensor for reading out pixel signals according to an embodiment of the present invention. [Figure 12] 4 is a diagram illustrating an image signal of a first pixel group according to an embodiment of the present invention. [Figure 13] 1 is a block diagram illustrating an electronic device according to one embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0013] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, specific examples of embodiments of the present invention will be described in detail with reference to the drawings. The same reference numerals are used to designate the same components in the drawings, and redundant description thereof will be omitted.

[0014] Hereinafter, when an element or layer is referred to as being "on," "connected to," or "coupled to" another element or layer, it is understood that the element is directly on, connected to, or coupled to the other element or layer, or that an intervening element or layer is present. In contrast, when an element is referred to as being "directly on," "directly coupled," or "directly coupled" to another element or layer, there is no intervening element or layer present. The embodiments described herein are exemplary embodiments, and therefore the present invention is not limited thereto and may be embodied in various other forms. Each embodiment provided in the following description does not exclude association with one or more features of other embodiments provided herein or not provided herein but consistent with the present invention.

[0015] 1 is a diagram showing the structure of a digital imaging device according to one embodiment of the present invention. The digital imaging device 1 performs an autofocusing (AF) function.

[0016] A digital imaging device 1 according to an embodiment of the present invention includes an imaging unit 200, an image sensor 100, and a processor 300. The digital imaging device 1 has a focus detection function. The digital imaging device 1 is an electronic device having an image or light sensing function. For example, the electronic device may be any one of a camera, a smartphone, a wearable device, an Internet of Things (IoT), a tablet PC (Personal Computer), a PDA (Personal Digital Assistant), a PMP (Portable Multimedia Player), and a navigation device. For example, the electronic device may be a device provided as a component in a vehicle, furniture, manufacturing equipment, a door, various measuring instruments, etc.

[0017] The operation of the digital imaging device 1 is controlled by a processor 300. The processor 300 provides control signals for the operation of each component, such as the lens driver 220, the aperture driver 240, and the timing controller 120.

[0018] The imaging unit 200 is a component that receives light, and includes a lens 210, a lens driving unit 220, an aperture 230, and an aperture driving unit 240. The lens 210 includes a plurality of lenses.

[0019] The lens driver 220 communicates information related to focus detection with the processor 300 and adjusts the position of the lens 210 according to a control signal provided by the processor 300. The lens driver 220 moves the lens 210 in a direction that increases or decreases the distance from the object 2, thereby adjusting the distance between the lens 210 and the object 2. Depending on the position of the lens 210, the object 2 is in focus or out of focus.

[0020] For example, when the distance between the lens 210 and the object 2 is relatively short, the lens 210 is out of the in-focus position for focusing on the object 2, and a phase difference occurs between the images captured by the image sensor 100. The lens driver 220 moves the lens 210 in a direction in which the distance from the object 2 increases based on a control signal provided from the processor 300.

[0021] Furthermore, when the distance between the lens 210 and the object 2 is relatively large, the lens 210 is out of focus, causing a phase difference between the images formed on the image sensor 100. The lens driver 220 moves the lens 210 in a direction that decreases the distance from the object 2 based on a control signal provided by the processor 300.

[0022] The image sensor 100 converts incident light into an image signal. The image sensor 100 includes a pixel array 110 and a timing controller 120. The optical signal transmitted through the lens 210 and the aperture 230 reaches the light receiving surface of the pixel array 110 and forms an image of the subject.

[0023] The pixel array 110 is a complementary metal oxide semiconductor image sensor (CIS) that converts optical signals into electrical signals. The sensitivity of the pixel array 110 is adjusted by a timing controller 120. The pixel array 110 includes a plurality of pixels that convert optical signals into electrical signals. Each of the plurality of pixels generates a pixel signal according to the intensity of detected light. The pixel array 110 includes pixels for performing an autofocus (AF) function or a distance measurement function. Exemplarily, some of the plurality of pixels included in the pixel array 110 are autofocus (AF) pixels that perform the AF function, and the remaining portion are normal pixels that generate image signals. For example, 50% of the plurality of pixels included in the pixel array 110 are autofocus (AF) pixels and the remaining 50% are normal pixels. However, the present invention is not limited thereto.

[0024] The image sensor 100 includes a microlens array disposed on top of the pixel array 110. The microlens array includes microlenses corresponding to a plurality of pixels included in the pixel array 110. The microlens array includes microlenses corresponding to autofocus (AF) pixels and microlenses corresponding to normal pixels.

[0025] The image sensor 100 generates image data using normal pixels and autofocus pixels. The image data includes frame-by-frame images and / or autofocus data. Exemplarily, the image sensor 100 generates autofocus data using the autofocus pixels. The image sensor 100 generates SNR image data for improving the signal-to-noise ratio using the normal pixels. The image sensor 100 generates HDR image data for generating an HDR image using the normal pixels.

[0026] The timing controller 120 controls the overall operation of the image sensor 100. The timing controller 120 controls the operation of the components included in the image sensor 100. The timing controller 120 controls the operation of the pixels included in the pixel array 110. For example, the timing controller 120 generates a plurality of control signals for controlling the operation of the pixels included in the pixel array 110.

[0027] The image sensor 100 provides image data to the processor 300. The image data includes frame-by-frame images and / or autofocusing data. The processor 300 performs a phase difference calculation for the autofocusing function using the autofocusing data. In one embodiment, the processor 300 performs the phase difference calculation based on a phase detection signal included in the autofocusing data. The processor 300 processes the image data output from the image sensor 100. The processor 300 obtains the focus position, focus direction, distance between the object 2 and the image sensor 100, etc. as a result of the phase difference calculation. The processor 300 outputs a control signal to the lens driver 220 to move the position of the lens 210 based on the result of the phase difference calculation.

[0028] In one embodiment, the processor 300 generates an image with an enhanced signal-to-noise ratio (SNR) using image data. The processor 300 receives SNR image data for enhancing the SNR ratio and generates an image with an enhanced SNR ratio based on the SNR image data.

[0029] In one embodiment, the processor 300 generates an HDR image using the image data. The processor 300 receives HDR image data for generating the HDR image, and generates the HDR image based on the HDR image data.

[0030] The processor 300 reduces noise in the input signal and performs image signal processing to improve image quality, such as gamma correction, color filter array interpolation, color matrix, color correction, and color enhancement, etc. It also compresses image data generated by performing image signal processing to improve image quality, generates an image file, and restores image data from the image file.

[0031] FIG. 2 is a block diagram illustrating an image sensor according to one embodiment of the present invention.

[0032] 2, the image sensor 100 includes a pixel array 110, a timing controller 120, a readout circuit 130, and a row driver 140. The readout circuit 130 includes an analog-to-digital conversion circuit 131 (hereinafter referred to as an ADC circuit) and a data bus 132. In one embodiment, the pixel array 110, the row driver 140, the readout circuit 130, the ramp signal generator 150, the timing controller 120, and the signal processor 160 are implemented as a single semiconductor chip or semiconductor module. In another embodiment, the pixel array 110, the row driver 140, the readout circuit 130, the ramp signal generator 150, and the timing controller 120 are implemented as a single semiconductor chip or semiconductor module, and the signal processor 160 is implemented as another semiconductor chip or semiconductor module.

[0033] The pixel array 110 includes a plurality of row lines RL, a plurality of column lines CL, and a plurality of pixels PX connected to the plurality of row lines RL and the plurality of column lines CL and arranged in a matrix. The pixel array 110 includes a plurality of pixels PX that sense light of different wavelengths. The arrangement of the pixels PX can be implemented in various ways. In one embodiment, the pixel array 110 includes normal pixels and autofocus pixels.

[0034] Each of the plurality of pixels PX includes at least one photoelectric conversion element. The pixel PX senses light using the photoelectric conversion element and outputs an image signal, which is an electrical signal based on the sensed light. For example, the photoelectric conversion element is a light-sensing element made of an organic or inorganic material, such as an inorganic photodiode, an organic photodiode, a perovskite photodiode, a phototransistor, a photogate, or a pinned photodiode. Exemplarily, each of the plurality of pixels PX includes one photoelectric conversion element. However, this is not necessarily limited thereto, and each of the plurality of pixels PX may include multiple photoelectric conversion elements, or some of the plurality of pixels PX may include multiple photoelectric conversion elements and other pixels may include one photoelectric conversion element.

[0035] A microlens for collecting light (e.g., the first microlens ML1 and the second microlens ML2 in FIG. 3) is arranged on top of each of the plurality of pixels PX or on top of each of pixels composed of adjacent pixels PX. Exemplarily, a microlens corresponding to each of the pixels PX is arranged on top of each of some of the pixels PX included in the pixel array 110. A microlens corresponding to each of the pixel groups is arranged on top of each of some of the pixel groups composed of adjacent pixels PX in the pixel array 110. The pixels PX sense light in a specific spectral region from the light received through the microlens arranged on top of them.

[0036] The pixel array 110 includes a first pixel group and a second pixel group. The pixel array 110 has a structure in which the first pixel group and the second pixel group are alternately and repeatedly arranged in a matrix. The first pixel group includes a plurality of first pixels. A first microlens is disposed on each of the first pixels. A first microlens corresponding to each of the first pixels is disposed on each of the first pixels included in the first pixel group.

[0037] For example, the first pixel group includes four first pixels arranged in a 2x2 matrix. A first microlens is disposed above each of the four first pixels. That is, the first pixel group includes four first pixels, and each of the four first microlenses is disposed to correspond to a first pixel. One first microlens is disposed per first pixel. However, this is merely an example and is not necessarily limited thereto. The first pixels included in the same first pixel group sense the same color. The first pixels are also referred to as normal pixels.

[0038] The second pixel group includes a plurality of second pixels. The second pixels are also called focus pixels. An autofocus pixel is a pixel having a circuit or physical structure for autofocusing. A second microlens is disposed on top of the second pixels. A second microlens is disposed on top of at least two of the second pixels included in the second pixel group. Exemplarily, the second pixel group includes a plurality of second pixels, and a corresponding second microlens is disposed on each second pixel group. For example, the second pixel group includes four second pixels arranged in a 2x2 array. The four second pixels included in the second pixel group are adjacent to each other, and one second microlens is disposed on top of the four second pixels. One second microlens is disposed for every four second pixels. However, this is not necessarily limited thereto. The second pixels included in the same second pixel group sense the same color.

[0039] According to an embodiment, the second pixel group includes a plurality of second pixels, and the second pixel group includes a subpixel group including at least two adjacent second pixels. A second microlens is disposed on top of the subpixel group. For example, the second pixel group includes two subpixel groups, each including two second pixels. One second microlens is disposed on top of each subpixel group. One second microlens is disposed for every two second pixels. However, this is not necessarily limited thereto.

[0040] For example, the number of second pixels included in one second pixel group is the same as the number of first pixels included in one first pixel group. For example, the first pixel group may include four first pixels, and the second pixel group may include four second pixels. However, this is not necessarily limited to this, and the first pixel group may include 16 first pixels, and the second pixel group may include 16 second pixels. Each of the first pixel group and the second pixel group may include various numbers of pixels.

[0041] The first pixel group outputs a first image signal generated from all first pixels included in the first pixel group. The second pixel group outputs a second image signal generated from some second pixels included in the second pixel group. During a period in which the first image signal is output, the second image signal is also output. When the first image signal is output from the first pixel group, the second image signal is output from the second pixel group.

[0042] In one embodiment, the first image signal and the second image signal are output in a first sensing readout section included in the readout section. In the first sensing readout section, a first image signal obtained by summing image signals of all first pixels included in the first pixel group is output. In the first sensing readout section, a second image signal obtained by summing image signals of some second pixels included in the second pixel group is output. Exemplarily, a second image signal obtained by summing image signals of second pixels arranged in adjacent different rows and the same column in the second pixel group is output. However, this is not necessarily limited thereto, and a second image signal obtained by summing image signals of second pixels arranged in adjacent different columns and the same row in the second pixel group may also be output.

[0043] The first pixel group outputs a third image signal generated from all first pixels included in the first pixel group. The third image signal is output after the first image signal. The second pixel group outputs a fourth image signal generated from all second pixels included in the second pixel group. The fourth image signal is output after the second image signal. During the period in which the third image signal is output, the fourth image signal is also output. When the third image signal is output from the first pixel group, the fourth image signal is output from the second pixel group.

[0044] In one embodiment, the third image signal and the fourth image signal are output in a second sensing readout section included in the readout section. The second sensing readout section follows the first sensing readout section. In the second sensing readout section, a third image signal obtained by adding up image signals of all first pixels included in the first pixel group is output. In the second sensing readout section, a fourth image signal obtained by adding up image signals of all second pixels included in the second pixel group is output.

[0045] In one embodiment, the first image signal and the third image signal are used to generate image data for improving the signal-to-noise ratio (SNR). The first image signal and the third image signal are image signals output from the first pixel group. The first image signal and the third image signal are output sequentially during the readout period. Exemplarily, each of the first image signal and the third image signal includes an image signal obtained by adding up image signals of all first pixels included in the first pixel group in one frame, but includes noise signals that are different from each other or the same. That is, the first image signal includes a first noise signal, and the third image signal includes a second noise signal, and the first noise signal and the second noise signal are different from each other. SNR image data used to generate an image with an improved signal-to-noise ratio (SNR) is generated based on the first image signal and the third image signal.

[0046] In one embodiment, the first image signal and the third image signal are used to generate a high dynamic range (HDR) image. The first pixel operates in dual conversion gain. The dual conversion gain includes a low conversion gain (LCG) and a high conversion gain (HCG). For convenience of explanation, the operation mode for generating an image signal using the high conversion gain (HCG) will be referred to as the high conversion gain (HCG) mode, and the operation mode for generating an image signal using the low conversion gain (LCG) will be referred to as the low conversion gain (LCG) mode. Each of the first pixels operates in the high conversion gain (HCG) mode and the low conversion gain (LCG) mode.

[0047] Exemplarily, the first image signal is an image signal generated from all first pixels included in the first pixel group in a high conversion gain (HCG) mode. The third image signal is an image signal generated from all first pixels included in the first pixel group in a low conversion gain (LCG) mode. In the read-out section, the first image signal in the high conversion gain (HCG) mode and the third image signal in the low conversion gain (LCG) mode are output in sequence. HDR image data used for generating an HDR image is generated based on the first image signal and the third image signal.

[0048] In one embodiment, the second and fourth image signals are used to generate phase detection data for autofocusing. The second and fourth image signals are image signals output from a second pixel group. The second and fourth image signals are output in sequence during a readout period. Autofocusing data used in phase difference calculation for the autofocusing function is generated based on the second and fourth image signals. The fourth image signal is also used to generate images in frame units.

[0049] A color filter for transmitting light in a specific spectral region is disposed on each of the pixels PX, and the color that the pixel can sense is determined by the color filter disposed on each of the pixels PX. However, the pixel array 110 may include pixels that convert light in other spectral regions in addition to red, green, and blue into electrical signals. For example, a color filter that senses cyan, yellow, or magenta may be disposed on each of the pixels PX.

[0050] The timing controller 120 controls the overall operation of the image sensor 100. The timing controller 120 controls the operations of the components included in the image sensor 100. Exemplarily, the timing controller 120 controls the row driver 140 to control the operations of the pixels included in the pixel array 110. For example, the timing controller 120 controls the row driver 140 so that the pixels PX output image signals during a read-out period. The timing controller 120 generates control signals. The timing controller 120 generates a control signal RCS for controlling the row driver 140.

[0051] The timing controller 120 controls the first pixel group to output a first image signal and the second pixel group to output a second image signal during the first sensing readout period. Exemplarily, the timing controller 120 generates a control signal RCS for controlling the row driver 140 to output the first image signal and the second image signal during the first sensing readout period.

[0052] The timing controller 120 controls the first pixel group to output a third image signal and the second pixel group to output a fourth image signal during the second sensing readout period. Exemplarily, the timing controller 120 generates a control signal RCS for controlling the row driver 140 to output the third image signal and the fourth image signal during the second sensing readout period.

[0053] The row driver 140 generates a plurality of control signals for controlling the operation of the pixels PX arranged in each row under the control of the timing controller 120. The row driver 140 provides a plurality of control signals to each of the pixels PX in the pixel array 110 through a plurality of row lines RL. In response to the control signals provided by the row driver 140, the pixel array 110 is driven row by row. That is, the pixels PX in the pixel array 110 sequentially output pixel signals PXS row by row. At this time, the pixel signals PXS include a reset signal indicating a reset level of the pixel PX and an image signal generated from the pixel PX.

[0054] The row driver 140 transmits a control signal for outputting the pixel signal PXS to the pixel array 110, and the pixel PX operates in response to the control signal to output the pixel signal PXS. For example, the row driver 140 generates a control signal for controlling the pixel PX to output the pixel signal PXS in a readout period and provides the generated control signal to the pixel array 110. The row driver 140 controls the pixel array 110 to output the first and second image signals in a first sensing readout period and to output the third and fourth image signals in a second sensing readout period.

[0055] The readout circuit 130 includes an ADC circuit 131 and a data bus 132. It reads out pixel signals PXS from pixels PX of a row selected by the row driver 140 among the plurality of pixels PX. At this time, the pixel signals PXS include a reset signal or an image signal (or a sensing signal). The readout circuit 130 converts the reset signal and image signal received from the pixel array 110 through the plurality of column lines CL into digital signals based on the ramp signal from the ramp signal generator, thereby generating and outputting pixel values ​​pdt corresponding to the plurality of pixels PX on a row-by-row basis.

[0056] The readout circuit 130 outputs a pixel value pdt based on the pixel signal PXS. During the first sensing readout period, the readout circuit 130 outputs a first pixel value based on the first image signal of the first pixel group and outputs a second pixel value based on the second image signal of the second pixel group. During the second sensing readout period, the readout circuit 130 outputs a third pixel value based on the third image signal of the first pixel group and outputs a fourth pixel value based on the fourth image signal of the second pixel group. During the readout period, the readout circuit 130 sequentially outputs the first and third pixel values ​​from the first pixel group and sequentially outputs the second and fourth pixel values ​​from the second pixel group.

[0057] The ADC circuit 131 includes at least one ADC (analog-to-digital converter). Exemplarily, the ADC circuit 131 includes a plurality of ADCs corresponding to a plurality of column lines CL. The ADCs compare the reset signal and image signal received through the corresponding column lines CL with the ramp signal, respectively, and generate pixel values ​​pdt based on the comparison results. For example, the ADC removes the reset signal from the image signal and generates pixel values ​​pdt indicating the amount of light sensed from the pixel PX. The pixel values ​​pdt generated by the ADC circuit 131 are output via a data bus 132.

[0058] The ADC circuit 131 includes a plurality of correlated double sampling (CDS) circuits and a plurality of counter circuits. The ADC circuit 131 converts pixel signals PXS input from the pixel array 110 into pixel values ​​pdt, which are digital signals. Each pixel signal PXS received through each of the plurality of column lines CL is converted into a pixel value pdt, which is a digital signal, by the CDS circuit and the counter circuit.

[0059] The CDS circuit compares the pixel signal PXS received through the column line CL with the ramp signal RAMP and outputs the comparison result. When the level of the ramp signal RAMP is the same as the level of the pixel signal PXS, the CDS circuit outputs a comparison signal that transitions from a first level (e.g., logic high) to a second level (e.g., logic low). The point in time at which the level of the comparison signal transitions is determined by the level of the pixel signal PXS.

[0060] The CDS circuit samples and holds the pixel signal PXS provided from the pixel PX according to the CDS method, double samples the level of a specific noise (e.g., a reset signal) and the level due to the image signal, and generates a comparison signal based on the level corresponding to the difference.

[0061] The data bus 132 temporarily stores and then outputs the pixel values ​​pdt output from the ADC circuit 131. The data bus 132 includes a plurality of column memories and a column decoder. The pixel values ​​pdt stored in the plurality of column memories are output to a signal processor 160 inside the image sensor 100 or to an image signal processor outside the image sensor 100 under the control of the column decoder.

[0062] The ramp signal generator 150 generates a ramp signal (e.g., a ramp voltage) whose level rises or falls at a predetermined gradient under the control of the timing controller 120. The ramp signal RAMP is provided to the readout circuit 130. Exemplarily, the ramp signal RAMP is provided to the ADC circuit 131.

[0063] According to an embodiment, the image sensor 100 further includes a signal processor 160. The signal processor 160 receives pixel values ​​pdt from the readout circuit 130 and performs signal processing on the received pixel values ​​pdt. The signal processor 160 performs signal processing on the pixel values ​​pdt to generate image data IDT. The image data IDT includes frame-by-frame images, autofocusing data, SNR image data, HDR image data, etc.

[0064] The signal processor 160 generates SNR image data for improving the signal-to-noise ratio based on the first pixel value and the third pixel value generated from the first pixel group. Exemplarily, a processor (e.g., the processor 300 of FIG. 1) generates an image with improved SNR based on the SNR image data. The processor generates the image with improved SNR based on an average value of the first pixel value and the third pixel value. However, this is not necessarily limited thereto, and the signal processor 160 may also be embodied to generate an image with improved SNR.

[0065] Furthermore, when the pixel PX operates in a dual conversion gain mode including a high conversion gain (HCG) mode and a low conversion gain (LCG) mode, the signal processor 160 generates HDR image data for generating an HDR image based on the first pixel value and the third pixel value generated from the first pixel group. Exemplarily, the first pixel value is a pixel value in the high conversion gain (HCG) mode, and the third pixel value is a pixel value in the low conversion gain (LCG) mode, and the processor generates the HDR image based on the HDR image data. However, this is not necessarily limited thereto, and the signal processor 160 may also be embodied to generate an HDR image.

[0066] The signal processor 160 generates autofocusing data based on second and fourth pixel values ​​generated from the second pixel group. Exemplarily, the processor performs an autofocusing operation based on the autofocusing data. The signal processor 160 generates the autofocusing data used in the phase difference calculation based on second pixel values ​​output from at least two pixels arranged in different adjacent rows and the same column in the second pixel group, and fourth pixel values ​​output from all second pixels included in the second pixel group.

[0067] Furthermore, the signal processor 160 performs noise reduction, gain adjustment, waveform normalization, interpolation, white balance, gamma correction, edge enhancement, binning, etc. on the pixel values ​​pdt. In other embodiments, the signal processor 160 may be provided in a processor external to the image sensor 100 (e.g., processor 300 in FIG. 1).

[0068] Figure 3 is a diagram showing a first example of a pixel array according to an embodiment of the present invention. A pixel array 110a in Figure 3 corresponds to the pixel array 110 in Figure 2. Content that overlaps with the content described above will be omitted.

[0069] 3, the pixel array 110a includes pixel groups PXG, each including two or more adjacent pixels PX. The pixel array 110a includes a first pixel group PXG1 and a second pixel group PXG2. The pixel array 110a has a structure in which the first pixel group PXG1 and the second pixel group PXG2 are alternately and repeatedly arranged in a matrix.

[0070] Referring to FIG. 3, each pixel group PXG is illustrated as including four pixels PX, but this is not necessarily limited thereto, and each pixel group PXG may include various numbers of pixels PX, such as nine or sixteen. For example, the pixel array 110a includes a plurality of pixel groups PXG, each including pixels PX arranged in an n×n matrix (n is a positive integer). However, the present invention is not limited thereto, and the pixel array 110a may include a plurality of pixel groups PXG, each including pixels PX arranged in a 2n×2n matrix (n is a positive integer). Although FIG. 3 illustrates 64 pixels PX, this is merely an example for convenience of explanation. The number of pixels PX is determined by the resolution of the pixel array 110a. Furthermore, an image sensor (e.g., the image sensor 100 of FIG. 2) may also be applied to a pixel array having a pattern different from the pixel array 100a and the pattern of the microlenses (ML1, ML2) illustrated in FIG. 3.

[0071] The pixel array 110a includes color filters to sense various colors. In one embodiment, the same color filter is included in each pixel group. That is, four adjacent pixels PX in the pixel array 110a include the same color filter. The same color filter is disposed on the n×n pixels included in each pixel group.

[0072] Exemplarily, the first pixel group PXG1_1, the first pixel group PXG1_2, the second pixel group PXG2_1, and the second pixel group PXG2_2 each include one of a green (G) color filter, a red (R) color filter, and a blue (B) color filter. For example, the first pixel group PXG1_1 and the first pixel group PXG1_2 include a green (G) color filter, the second pixel group PXG2_1 includes a red (R) color filter, and the second pixel group PXG2_2 includes a blue (B) color filter. In one embodiment, the arrangement ratio of the red (R) color filter, the green (G) color filter, and the blue (B) color filter in the pixel array 110a is 1:2:1.

[0073] However, this is not necessarily limited to this, and each of the first pixel group (PXG1_1, PXG1_2) and the second pixel group (PXG2_1, PXG2_2) may include at least one of a white color filter, a yellow color filter, a cyan color filter, and a magenta color filter. Alternatively, each of the first pixel group (PXG1_1, PXG1_2) and the second pixel group (PXG2_1, PXG2_2) may include one of a white color filter, a yellow color filter, a green (G) color filter, a red (R) color filter, and a blue (B) color filter.

[0074] The pixel having the first microlens ML1 disposed thereon is the first pixel PX1, and the first pixel group PXG1 includes the first pixel PX1. A first microlens ML1 corresponding to each first pixel PX1 is disposed above each first pixel PX1 included in the first pixel group PXG1. Exemplarily, a green (G) filter is disposed in the first pixel group PXG1. Exemplarily, the first pixel group PXG1_1 includes a first green pixel Gr1, a second green pixel Gr2, a third green pixel Gr3, and a fourth green pixel Gr4. The first green pixel Gr1, the second green pixel Gr2, the third green pixel Gr3, and the fourth green pixel Gr4 are the first pixel PX1. A first microlens ML1 is disposed above each of the first green pixel Gr1, the second green pixel Gr2, the third green pixel Gr3, and the fourth green pixel Gr4.

[0075] For example, the first pixel group PXG1_2 includes a first green pixel Gb1, a second green pixel Gb2, a third green pixel Gb3, and a fourth green pixel Gb4. The first green pixel Gb1, the second green pixel Gb2, the third green pixel Gb3, and the fourth green pixel Gb4 form the first pixel PX1. A first microlens ML1 is disposed above each of the first green pixel Gb1, the second green pixel Gb2, the third green pixel Gb3, and the fourth green pixel Gb4.

[0076] The pixel having the second microlens ML2 disposed thereon is the second pixel PX2, and the second pixel group PXG2 includes the second pixels PX2. The second microlens ML2 is disposed on top of at least two of the second pixels PX2 included in the second pixel group PXG2. Exemplarily, the second pixel group PXG2 includes a plurality of second pixels PX2, and a second microlens ML2 corresponding to the second pixel group PXG2 is disposed thereon.

[0077] In one embodiment, the diameter of the second microlens ML2 is longer than the diameter of the first microlens ML1. Here, the diameter of a microlens refers to the length of the longest part of the widest cross section of the microlens. For example, the diameter of the first microlens ML1 is r1, and the diameter of the second microlens ML2 is r2. r2 is longer than r1.

[0078] A second microlens ML2 corresponding to the second pixel group PXG2 is disposed on top of the second pixel group PXG2. For example, the second pixel group PXG2 includes four second pixels PX2 arranged in a 2x2 matrix. The four second pixels PX2 included in the second pixel group PXG2 are adjacent to each other, and one second microlens ML2 is disposed on top of the four second pixels PXG2. However, this is not necessarily limited to this. The first pixel group PXG1_1 is adjacent to the second pixel group PXG2_1 in the first direction X, and the first pixel group PXG1_1 is adjacent to the second pixel group PXG2_2 in the second direction Y. The first pixel group PXG1_2 is adjacent to the second pixel group PXG2_2 in the first direction X and adjacent to the second pixel group PXG2_1 in the second direction Y. Such pixel groups PXG are repeatedly arranged within the pixel array 110a.

[0079] For example, the second pixel group PXG2 may have a red (R) color filter or a blue (B) color filter. For example, the second pixel group PXG2_1 includes a first red pixel R1, a second red pixel R2, a third red pixel R3, and a fourth red pixel R4. The first red pixel R1, the second red pixel R2, the third red pixel R3, and the fourth red pixel R4 constitute the second pixel PX2. A second microlens ML2 is disposed on top of the second pixel group PXG2_1. For example, the second pixel group PXG2_2 includes a first blue pixel B1, a second blue pixel B2, a third blue pixel B3, and a fourth blue pixel B4. The first blue pixel B1, the second blue pixel B2, the third blue pixel B3, and the fourth blue pixel B4 constitute the second pixel PX2. A second microlens ML2 is disposed on top of the second pixel group PXG2_2.

[0080] 4 is a diagram for explaining an image signal according to an embodiment of the present invention, and the same content as that described above will be omitted.

[0081] 4, the pixel array 110a includes a first pixel group PXG1_1 and a second pixel group PXG2_1. For convenience of explanation, the first pixel group PXG1_1 and the second pixel group PXG2_1 are shown in FIG. 4, but the description of FIG. 4 also applies to the other pixel groups in FIG. 3. It also applies to pixel arrays of various patterns and the first pixel group and second pixel group included in the pixel array.

[0082] The pixels PX operate in response to transmission control signals. Exemplarily, the first pixel PX1 included in the first pixel group PXG1_1 operates in response to a plurality of first transmission control signals (TS1_1, TS1_2, TS1_3, TS1_4), and the second pixel PX2 included in the second pixel group PXG2_1 operates in response to a plurality of second transmission control signals (TS2_1, TS2_2, TS2_3, TS2_4). Here, the operation of the first pixel PX1 and the second pixel PX2 means that photocharges generated in the photoelectric conversion elements (e.g., photodiodes PD in FIG. 6) included in each of the first pixel PX1 and the second pixel PX2 are transmitted to the floating diffusion nodes (FD in FIG. 6) in the pixels PX.

[0083] The plurality of first transmission control signals (TS1_1, TS1_2, TS1_3, TS1_4) and the plurality of second transmission control signals (TS2_1, TS2_2, TS2_3, TS2_4) are separate signals provided from a row driver (e.g., row driver 140 of FIG. 2) through different row lines RL. The connection relationship between the row lines RL and the first pixel PX1 and the second pixel PX2 is indicated by connects CNT.

[0084] In multiple readout periods (or multiple horizontal periods), multiple rows of the pixel array 110a are read out sequentially. That is, multiple signals are read out row by row from multiple pixels PXa. Exemplarily, referring to both FIGS. 3 and 4, in the first readout period, pixel signals are output from pixel groups PXG arranged in the same row as the first pixel group PXG1_1 and the second pixel group PXG2_1. In the second readout period, pixel signals are output from pixel groups PXG arranged in the same row as the second pixel group PXG2_2 and the first pixel group PXG1_2. However, this is not limited thereto, and the order in which multiple rows are read out may be varied.

[0085] The first pixel group PXG1_1 outputs a first image signal IS1 generated from all of the first pixels PX1 included in the first pixel group PXG1_1. For example, the image signals generated from the first green pixel Gr1, the second green pixel Gr2, the third green pixel Gr3, and the fourth green pixel Gr4 are summed and output as the first image signal IS1.

[0086] The second pixel group PXG2_1 outputs a second image signal IS2 generated from some of the second pixels PX2 included in the second pixel group PXG2_1. Exemplarily, the second image signal IS2 is output from second pixels PX2 arranged in the same column but in different rows in the second pixel group PXG2_1. For example, the image signals generated from the first red pixel R1 and the third red pixel R3 are summed and output as the second image signal IS2. For example, when generating the second image signal IS2, the image signals generated from the second red pixel R2 and the fourth red pixel R4 are not included. The left image signal of the second pixel group PXG2_1 is the second image signal IS2. However, the second image signal IS2 is not necessarily limited to this. The second image signal IS2 may also be output from second pixels PX2 arranged in the same row but in different columns. In one embodiment, the first image signal IS1 and the second image signal IS2 are output in a first sensing readout section included in the readout section.

[0087] The first pixel group PXG1_1 outputs a third image signal IS3 generated from all of the first pixels PX1 included in the first pixel group PXG1_1. For example, the image signals generated from the first green pixel Gr1, the second green pixel Gr2, the third green pixel Gr3, and the fourth green pixel Gr4 are summed and output as the third image signal IS3. The third image signal IS3 is output after the first image signal IS1.

[0088] The second pixel group PXG2_1 outputs a fourth image signal IS4 generated from all second pixels PX2 included in the second pixel group PXG2_1. The fourth image signal IS4 is output after the second image signal IS2. For example, image signals generated from the first red pixel R1, the second red pixel R2, the third red pixel R3, and the fourth red pixel R4 are added together and output as the fourth image signal IS4. The third image signal IS3 and the fourth image signal IS4 are output in a second sensing readout section included in the readout section. The second sensing readout section follows the first sensing readout section. In one embodiment, autofocusing data for calculating a phase difference for adjusting the focus in the left-right direction is generated based on the second image signal IS2 and the fourth image signal IS4.

[0089] Figure 5A is a diagram illustrating a second example of a pixel array according to an embodiment of the present invention. The pixel array 110b in Figure 5A corresponds to the pixel array 110 in Figure 2. Compared to the pixel array 110a in Figure 3, the pixel array 110b in Figure 5A has two second microlenses ML2 arranged on top of the second pixel group PXG2. Details that overlap with those described above will be omitted.

[0090] 5A, the pixel array 110b includes a first pixel group PXG1 and a second pixel group PXG2. The pixel array 110b has a structure in which the first pixel group PXG1 and the second pixel group PXG2 are alternately and repeatedly arranged in a matrix.

[0091] In one embodiment, the second pixel group PXG2 includes a plurality of second pixels PX2, and the second pixel group PXG2 includes subpixel groups SPG, each of which includes at least two adjacent second pixels PX2. A second microlens ML2 is disposed on top of the subpixel groups SPG. For example, the second pixel group PXG2_1 includes two subpixel groups (SPG1, SPG2), each of which includes two second pixels PX2. The first subpixel group SPG1 includes a first red pixel R1 and a second red pixel R2, and the second subpixel group SPG2 includes a third red pixel R3 and a fourth red pixel R4. A second microlens ML2 corresponding to the first subpixel group SPG1 is disposed on top of the first subpixel group SPG1, and a second microlens ML2 corresponding to the second subpixel group SPG2 is disposed on top of the second subpixel group SPG2.

[0092] During the first sensing readout period, a first image signal is output from the first pixel group PXG1_1, and a second image signal is output from the second pixel group PXG2_1. Exemplarily, a second image signal IS2 is output from a second pixel PX2 arranged in the same column but in a different row in the second pixel group PXG2_1. For example, the image signals generated by the first red pixel R1 and the third red pixel R3 are added together and output as the second image signal IS2.

[0093] In the second sensing readout period, a third image signal is output from the first pixel group PXG1_1, and a fourth image signal is output from the second pixel group PXG2_1. For example, the image signals generated from the first green pixel G1, the second green pixel G2, the third green pixel G3, and the fourth green pixel G4 are added together to form and output a third image signal IS3. For example, the image signals generated from the first red pixel R1, the second red pixel R2, the third red pixel R3, and the fourth red pixel R4 are added together to form and output a fourth image signal IS4.

[0094] 5B illustrates a third example of a pixel array according to an embodiment of the present invention. The pixel array 110c in FIG. 5B corresponds to the pixel array 110 in FIG. 2. Compared to the pixel array 110a in FIG. 3, the pixel group PG in the pixel array 110c in FIG. 5B includes 16 pixels. Details overlapping with those described above will be omitted.

[0095] 5B, the pixel array 110c includes a first pixel group PXG1 and a second pixel group PXG2. The pixel array 110c includes a structure in which the first pixel group PXG1 and the second pixel group PXG2 are alternately arranged in a matrix. Referring to FIG. 5B, each pixel group PXG is shown to include 16 pixels PX, but this is not necessarily limited to this.

[0096] The first pixel group PXG1 includes a first pixel PX1. Exemplarily, the first pixel group PXG1 includes 16 first pixels PX1. For example, the first pixel group PXG1 includes 16 green first pixels PX1. A first microlens ML1 corresponding to each of the first pixels PX1 is disposed above each of the first pixels PX1 included in the first pixel group PXG1.

[0097] In one embodiment, the second pixel group PXG2 includes a plurality of second pixels PX2, and the second pixel group PXG2 includes a sub-pixel group SPG that includes at least two adjacent second pixels PX2. Referring to Figure 5B, the second pixel group PXG2 includes four sub-pixel groups SPG, and each sub-pixel group SPG includes four second pixels PX2.

[0098] A second microlens ML2 is disposed on top of the subpixel group SPG. For example, the second pixel group PXG2 includes four subpixel groups SPG, and each subpixel group SPG includes four second pixels PX2. A second microlens ML2 is disposed on top of each of the subpixel groups SPG.

[0099] During the first sensing readout period, a first image signal is output from the first pixel group PXG1_1, and a second image signal is output from the second pixel group PXG2_1. A first image signal is output by summing image signals from 16 first pixels PX1 included in the first pixel group PXG1_1. A second image signal is output by summing image signals from some of the second pixels PX2 included in the second pixel group PXG2. Exemplarily, a second image signal IS2 is output from second pixels PX2 arranged in the same column but different rows in the second pixel group PXG2_1. For example, image signals generated from the first red pixel R1, the third red pixel R3, the ninth red pixel R9, and the eleventh red pixel R11 and image signals generated from the fifth red pixel R5, the seventh red pixel R7, the thirteenth red pixel R13, and the fifteenth red pixel R15 are summed and output as the second image signal IS2.

[0100] In the second sensing readout period, a third image signal is output from the first pixel group PXG1_1, and a fourth image signal is output from the second pixel group PXG2_1. A third image signal obtained by adding together the image signals of the 16 first pixels PX1 included in the first pixel group PXG1_1 is output. A fourth image signal obtained by adding together the image signals of the 16 second pixels PX2 included in the second pixel group PXG2 is output.

[0101] 5C illustrates a fourth example of a pixel array according to an embodiment of the present invention. The pixel array 110d in FIG. 5C corresponds to the pixel array 110 in FIG. 2. Compared to the pixel array 110a in FIG. 3, the pixel group PG in the pixel array 110d in FIG. 5C includes 16 pixels. Details overlapping with those described above will be omitted.

[0102] 5C, the second pixel group PXG2 includes a plurality of second pixels PX2, and the second pixel group PXG2 includes a sub-pixel group SPG including at least two adjacent second pixels PX2. The second pixel group PXG2 includes eight sub-pixel groups SPG, and each sub-pixel group SPG includes two second pixels PX2.

[0103] A second microlens ML2 is disposed on top of each subpixel group SPG. For example, the second pixel group PXG2 includes eight subpixel groups SPG, each of which includes two second pixels PX2. A second microlens ML2 is disposed on top of each subpixel group SPG. For example, a second microlens ML2 is disposed on top of a subpixel group SPG including a first red pixel R1 and a second red pixel R2. While FIG. 5C illustrates the subpixel group SPG included in the second pixel group PXG2 as including a second pixel PX2 adjacent to the second pixel group SPG in the first direction X, this is not necessarily limited to this. The subpixel group SPG may also include a second pixel PX2 adjacent to the second pixel group SPG in the second direction Y.

[0104] In the first sensing readout period, the first pixel group PXG1_1 outputs a first image signal, and the second pixel group PXG2_1 outputs a second image signal. In the second sensing readout period, the first pixel group PXG1_1 outputs a third image signal, and the second pixel group PXG2_1 outputs a fourth image signal.

[0105] FIG. 6 is a circuit diagram for one pixel included in the pixel array of FIG.

[0106] 6 refers to a first pixel (e.g., the first pixel PX1 in FIG. 3) and a second pixel (e.g., the second pixel PX2 in FIG. 3). Illustratively, each of the first pixel group and the second pixel group includes a plurality of pixels PX.

[0107] 6, one pixel (e.g., one of the first pixel and the second pixel) includes a photoelectric conversion element PD, a transfer transistor TX, a selection transistor SX, a drive transistor DX, and a reset transistor RX. Depending on the embodiment, at least one of the transfer transistor TX, the selection transistor SX, the drive transistor DX, and the reset transistor RX may be omitted.

[0108] The photoelectric conversion element PD generates photocharges that vary depending on the intensity of light. For example, the photoelectric conversion element PD is a PN junction diode that generates charges, i.e., negatively charged electrons and positively charged holes, in proportion to the amount of incident light. Examples of the photoelectric conversion element PD include at least one of a phototransistor, a photogate, a pinned photodiode (PPD), and a combination thereof.

[0109] The transmission transistor TX transmits the photocharges generated in the photoelectric conversion element PD to the floating diffusion node FD in response to a transmission control signal (e.g., one of the transmission control signals TS in FIG. 4). When the transmission transistor TX is turned on, the photocharges generated in the photoelectric conversion element PD are transmitted to the floating diffusion node FD and accumulated and stored in the floating diffusion node FD.

[0110] The reset transistor RX periodically resets the charge accumulated in the floating diffusion node FD. The drain electrode of the reset transistor RX is connected to the floating diffusion node FD, and the source electrode is connected to a power supply voltage VPIX. When the reset transistor RX is turned on by a reset control signal RS, the power supply voltage VPIX connected to the reset transistor RX is transferred to the floating diffusion node FD. When the reset transistor RX is turned on, the charge accumulated in the floating diffusion node FD is discharged, resetting the floating diffusion node FD.

[0111] The amount of photocharge accumulated on the floating diffusion node FD controls the drive transistor DX. The drive transistor DX acts as a buffer amplifier and buffers the signal due to the charge stored on the floating diffusion node FD. The drive transistor DX amplifies the potential change on the floating diffusion node FD and outputs it as a pixel signal PXS to a column output line (e.g., one of the column lines CL in FIG. 2).

[0112] The selection transistor SX is connected to the drive transistor DX and outputs a pixel signal PXS to a readout circuit (e.g., the readout circuit 130 in FIG. 2) through a column output line in response to a selection signal SELS. The control signals (RS, TS, SELS) included in the pixel PX are generated by a row driver (e.g., the row driver 140 in FIG. 2).

[0113] FIG. 7 is a circuit diagram for a pixel included in an image sensor according to an embodiment of the present invention.

[0114] According to an embodiment, a pixel group PXG includes a plurality of pixels, and the plurality of pixels PX share a floating diffusion node FD. For example, the plurality of pixels PX included in one pixel group PXG share the floating diffusion node FD. While Fig. 7 shows a case where four pixels share one floating diffusion node FD, this is not necessarily limited thereto, and various numbers of pixels PX may share the floating diffusion node FD.

[0115] Assume that pixel group PXG in Figure 7 corresponds to pixel group PXG in Figure 4. Referring to Figures 4 and 7, in one embodiment, pixels having the same color filter and adjacent to each other in the first direction X and the second direction Y, such as first pixel PX1, second pixel PX2, third pixel PX3, and fourth pixel PX4, form pixel group PG, each sharing a floating diffusion node FD. For example, if pixel group PXG is first pixel group PXG1_1, first pixel PX1, second pixel PX2, third pixel PX3, and fourth pixel PX4 in Figure 7 correspond to first green pixel Gr1, second green pixel Gr2, third green pixel Gr3, and fourth green pixel Gr4, respectively, in Figure 4. If pixel group PXG is second pixel group PXG2_1, first pixel PX1, second pixel PX2, third pixel PX3, and fourth pixel PX4 in Figure 7 correspond to first red pixel R1, second red pixel R2, third red pixel R3, and fourth red pixel R4, respectively, in Figure 4.

[0116] The pixel group PXG includes a plurality of photoelectric conversion elements (PD1 to PD4), a plurality of transfer transistors (TX1 to TX4), a selection transistor SX, a drive transistor DX, and a reset transistor RX. In one embodiment, at least one of the selection transistor SX, the drive transistor DX, and the reset transistor RX is optional.

[0117] Each of the photoelectric conversion elements (PD1 to PD4) generates photocharges that vary depending on the intensity of light. Each of the transfer transistors (TX1 to TX4) transfers the generated photocharges to a floating diffusion node FD in response to a transfer control signal TS. The generated photocharges are accumulated and stored in the floating diffusion node FD. For example, when the pixel group PXG is the first pixel group PXG1_1, the transfer control signals (TS1 to TS4) in FIG. 7 correspond to the first transfer control signals (TS1_1, TS1_2, TS1_3, TS1_4) in FIG. 4, respectively. When the pixel group PXG is the second pixel group PXG2_1, the transfer control signals TS1 to TS4 in FIG. 7 correspond to the second transfer control signals (TS2_1, TS2_2, TS2_3, TS2_4) in FIG. 4, respectively.

[0118] Each of the pixels (PX1 to PX4) constituting the pixel group PXG includes a corresponding photoelectric conversion element (e.g., one of the photoelectric conversion elements (PD1 to PD4)) and a corresponding transfer transistor (e.g., one of the transfer transistors (TX1 to TX4)). For example, the first pixel PX1 constituting the pixel group PXG includes a first photoelectric conversion element PD1 and a first transfer transistor TX1, the second pixel PX2 includes a second photoelectric conversion element PD2 and a second transfer transistor TX2, the third pixel PX3 includes a third photoelectric conversion element PD3 and a third transfer transistor TX3, and the fourth pixel PX4 includes a fourth photoelectric conversion element PD4 and a fourth transfer transistor TX4.

[0119] The pixels (PX1 to PX4) that make up the pixel group PXG share one floating diffusion node FD. The concept of sharing among pixel groups PXG not only means that multiple photoelectric conversion elements (PD1 to PD4) share one floating diffusion node FD, but also means that they share the transistors (RX, DX, SX) excluding the transfer transistors (TX1 to TX4). Therefore, the photocharges generated from each of the photoelectric conversion elements (PD1 to PD4) are all accumulated in the shared floating diffusion node FD.

[0120] FIG. 8 is a timing diagram of an image sensor for reading out pixel signals according to one embodiment of the present invention.

[0121] In FIG. 8, it is assumed that each of the first pixel group and the second pixel group includes four pixels PX. However, this is for convenience of explanation, and the explanation of FIG. 8 also applies to cases where each of the first pixel group and the second pixel group includes a different number of pixels PX. In addition, it is assumed that the pixels PX included in the pixel group PXG share a floating diffusion node FD. However, this is not necessarily limited thereto, and the explanation of FIG. 8 also applies to cases where the pixels PX included in the pixel group PXG do not share a floating diffusion node FD or where the number of pixels PX sharing the floating diffusion node FD is different. Hereinafter, reference will be made to FIGS. 4, 7, and 8.

[0122] During the readout period, a plurality of pixel signals PXS are read out from a plurality of pixels PX arranged in one row of the pixel array (110a in FIG. 4). During the readout period, pixel signals (e.g., pixel signal PXS in FIG. 2) are output from a first pixel group PXG1_1, a second pixel group PXG2_1, and a pixel group PXG arranged in the same row as the first pixel group PXG1_1 and the second pixel group PXG2_1. The pixel signals output from the pixel groups PXG are subjected to analog-to-digital conversion in a readout circuit (e.g., readout circuit 130 in FIG. 2) to generate digital pixel values ​​(e.g., pixel value pdt in FIG. 2).

[0123] 8, the readout section is divided into a reset readout section rrp, a first sensing readout section srp1, and a second sensing readout section srp2 according to the signal output from the pixel PX and converted from analog to digital. The first sensing readout section srp1 follows the reset readout section rrp, and the second sensing readout section spr2 follows the first sensing readout section srp1.

[0124] During the reset readout section rrp, a reset signal rst (e.g., a reset voltage) corresponding to a reset level is output as a pixel signal PXS. During the reset readout section rrp, a reset signal rst is output from each of the first pixel group PXG1_1 and the second pixel group PXG2_1. During the first sensing readout section srp1, a first image signal IS1 generated from the first pixel group PXG1_1 and a second image signal IS2 generated from the second pixel group PXG2_1 are output. During the first sensing readout section srp1, the first image signal IS1 is output as a pixel signal PXS for the first pixel group PXG1_1, and the second image signal IS2 is output as a pixel signal PXS for the second pixel group PXG2_1. During the second sensing readout section srp2, a third image signal IS3 generated from the first pixel group PXG1_1 and a fourth image signal IS4 generated from the second pixel group PXG2_1 are output. In the second sensing readout period srp2, the third image signal IS3 is output as the pixel signal PXS for the first pixel group PXG1_1, and the fourth image signal IS4 is output as the pixel signal PXS for the second pixel group PXG2_1.

[0125] The reset level of a pixel PX varies among multiple pixels PX and also varies over time within a single pixel PX. Therefore, during the readout period, the reset signal rst is read out first from the first pixel PX1, and then the reset signal rst is subtracted from (or added to) the image signal read out later, for example, the first image signal IS1 (or the third image signal IS3). The reset signal rst is read out first from the second pixel PX2, and then the reset signal rst is subtracted from (or added to) the second image signal IS2 (or the fourth image signal IS4). This allows the actual image signal to be read out, and reduces the signal deviation between the image signals output from multiple pixels PX.

[0126] In this manner, the reset signal rst, the first image signal IS1 (or the second image signal IS2), and the third image signal IS3 (or the fourth image signal IS4) generated in the pixel PX are read out in this order during the readout period. This readout method is called an RSS (reset-signal-signal) readout method.

[0127] Figure 8 illustrates at a glance the operation of the transistors included in the first pixel group PXG1_1 and the second pixel group PXG2_1. Exemplarily, if the pixel group PXG in Figure 7 is the first pixel group PXG1_1, the transmission control signals (TS1 to TS4) in Figure 7 correspond to the first transmission control signals (TS1_1, TS1_2, TS1_3, TS1_4) in Figure 8, respectively, the reset control signal RS in Figure 7 corresponds to the first reset control signal RS1 in Figure 8, and the select signal SELS in Figure 7 corresponds to the first select signal SELS1 in Figure 8. Exemplarily, if the pixel group PXG in Figure 7 is the second pixel group PXG2_1, the transmission control signals (TS1 to TS4), the reset control signal RS, and the select signal SELS in Figure 7 correspond to the second transmission control signals (TS2_1, TS2_2, TS2_3, TS2_4), the second reset control signal RS2, and the second select signal SELS2 in Figure 8, respectively.

[0128] Referring to Figures 8, 4, and 7 together, during the readout period, the first select signal SELS1 is at an active level, e.g., logic high, and in response to the first select signal SELS1, the select transistor SX of the first pixel group PXG1_1 is turned on, and the first pixel PX1 is connected to the column line CL.

[0129] During the readout period, the second select signal SELS2 is at an active level, e.g., logic high, and the select transistor SX of the second pixel group PXG2_1 is turned on in response to the second select signal SELS2, thereby connecting the second pixel PX2 to the column line CL. Here, the active level of a signal refers to a level at which a transistor to which the signal is applied is turned on. In the present invention, it is assumed that logic high is an active level and logic low is an inactive level.

[0130] When the readout period begins, the first reset control signal RS1 transitions from logic low to logic high, turning on the reset transistor RX of the first pixel group PXG1_1 and resetting the floating diffusion node FD. During the reset readout period rrp, a first reset signal rst1 corresponding to the reset level of the floating diffusion node FD of the first pixel group PXG1_1 is output as the pixel signal PXS through the column line CL. A readout circuit (e.g., the readout circuit 130 of FIG. 2) compares the ramp signal RAMP with the pixel signal PXS and outputs the comparison result as a comparison signal. The level of the ramp signal RAMP decreases at a predetermined gradient, and when the level of the ramp signal RAMP becomes lower than the level of the pixel signal PXS, the level of the comparison signal transitions. During the reset readout period rrp, a first reset signal rst1 is output for the first pixel PX1 included in the first pixel group PXG1_1.

[0131] During the reset readout period rrp, as the second reset control signal RS2 of the second pixel group PXG2_1 transitions from logic low to logic high, the reset transistor RX of the second pixel group PXG2_1 is turned on and the floating diffusion node FD is reset. During the reset readout period rrp, a second reset signal rst2 corresponding to the reset level of the floating diffusion node FD of the second pixel group PXG2_1 is output as a pixel signal PXS through the column line CL. During the reset readout period rrp, the second reset signal rst2 for the second pixel PX2 included in the second pixel group PXG2_1 is output.

[0132] During the first sensing readout period srp1, the transfer transistors of all first pixels PX1 included in the first pixel group PXG1_1 are turned on. As the first transmission control signal TS1 transitions to an active level during the first sensing readout period srp1, charges generated in the first pixels PX1 are transferred to and stored in the floating diffusion node FD of the first pixel group PXG1_1. Signals generated from all first pixels PX1 included in the first pixel group PXG1_1 are summed to generate a first image signal IS1. The first image signal IS1 is output as a pixel signal PXS through the column line CL.

[0133] During the first sensing readout period srp1, the transfer transistors of all first pixels PX1 included in the first pixel group PXG1_1 are turned on. In one embodiment, the first transmission control signals (TS1_1 to TS1_4) are simultaneously transitioned to an active level. Exemplarily, during the first sensing readout period srp1, the first transmission control signal TS1_1 transitions to an active level, and charges generated in the first green pixel Gr1 are stored in the floating diffusion node FD. During the first sensing readout period srp1, the first transmission control signal TS1_2 transitions to an active level, and charges generated in the second green pixel Gr2 are stored in the floating diffusion node FD. During the first sensing readout period srp1, the first transmission control signal TS1_3 transitions to an active level, and charges generated in the third green pixel Gr3 are stored in the floating diffusion node FD. During the first sensing read-out period srp1, the first transmission control signal TS1_4 transitions to an active level, and the charges generated in the fourth green pixel Gr4 are stored in the floating diffusion node FD. The charges generated in the first green pixel Gr1, the second green pixel Gr2, the third green pixel Gr3, and the fourth green pixel Gr4 of the first pixel group PXG1_1 are summed and output as a first image signal IS1.

[0134] During the first sensing readout period srp1, the transfer transistors of some of the second pixels PX21 included in the second pixel group PXG2_1 are turned on, while the transfer transistors of the other pixels included in the second pixel group PXG2_1 are kept off. During the first sensing readout period srp1, as some of the second transmission control signals TS2 transition to an active level, charges generated in some of the second pixels PX2 are transferred to and stored in the floating diffusion node FD of the second pixel group PXG2_1. The signals generated from some of the second pixels PX2 included in the second pixel group PXG2_1 are summed to generate a second image signal IS2. The second image signal IS2 is output as the pixel signal PXS through the column line CL.

[0135] For example, second pixels PX2 arranged in the same column but different rows in the second pixel group PXG2_1 output second image signals IS2. During the first sensing readout period srp1, the transfer transistors of some of the second pixels PX2 included in the second pixel group PXG2_1 are turned on. In one embodiment, some of the second transmission control signals TS1_1 to TS1_4 simultaneously transition to an active level during the first sensing readout period srp1.

[0136] For example, during the first sensing readout period srp1, the second transmission control signal TS2_1 transitions to an active level, causing the charge generated in the first red pixel R1 to be stored in the floating diffusion node FD. During the first sensing readout period srp1, the second transmission control signal TS2_3 transitions to an active level, causing the charge generated in the third red pixel R3 to be stored in the floating diffusion node FD. The charges generated in the first red pixel R1 and the third red pixel R3 of the second pixel group PXG2_1 are summed and output as the second image signal IS2. During the first sensing readout period srp1, the second transmission control signals TS2_2 and TS2_4 remain at an inactive level, causing the charge generated in the second red pixel R2 and the second red pixel R4 not to be stored in the floating diffusion node FD. The left image signal of the second pixel group PXG2_1 is the second image signal IS2. However, the second image signal IS2 is not necessarily limited to this, and the second image signal IS2 may be output from the second pixel PX2 arranged in the same row but in a different column.

[0137] In the first sensing readout section srp1, the first image signal IS1 and the second image signal IS2 are output. Exemplarily, the first image signal IS1 and the second image signal IS2 are output simultaneously in the first sensing readout section srp1. However, this is not necessarily limited thereto.

[0138] During the second sensing readout period srp2, the transfer transistors of all the first pixels PX1 included in the first pixel group PXG1_1 are turned off. During the first sensing readout period srp1, the transfer transistors of all the first pixels PX1 included in the first pixel group PXG1_1 are turned on and then turned off, and during the second sensing readout period srp2, the transfer transistors of all the first pixels PX1 included in the first pixel group PXG1_1 are maintained in the turned-off state. Exemplarily, during the second sensing readout period srp2, all the first transfer control signals (TS1_1, TS1_2, TS1_3, TS1_4) are maintained at an inactive level. With the transfer transistors of the first pixel group PXG1_1 turned off, the image signals generated from all the first pixels PX1 included in the first pixel group PXG1_1 (i.e., the charges currently stored in the floating diffusion nodes FD of the first pixel group PXG1_1) are read out again.

[0139] An image signal generated based on the charges stored in the floating diffusion node FD of the first pixel group PXG1_1 during the first sensing readout period srp1 is read out during the second sensing readout period srp2. Signals generated from all the first pixels PX1 included in the first pixel group PXG1_1 are summed and read out as a third image signal IS3. The third image signal IS3 is output as a pixel signal PXS through the column line CL.

[0140] In the read-out section, the first image signal IS1 and the third image signal IS3 are output in sequence. Exemplarily, the first image signal IS1 and the third image signal IS3 each include an image signal obtained by adding up image signals of all first pixels included in the first pixel group in one frame, but each include a different noise signal. Based on the first image signal IS1 and the third image signal IS3, SNR image data used to generate an image with an improved signal-to-noise ratio (SNR) is generated. For example, the SNR image data is generated based on the difference between the first image signal IS1 and the third image signal IS3.

[0141] During the second sensing readout period srp2, the transfer transistors of all second pixels PX2 included in the second pixel group PXG2_1 are turned on. As the second transmission control signal TS2 transitions to an active level during the second sensing readout period srp2, the charges generated in the second pixels PX2 are transferred to and stored in the floating diffusion node FD of the second pixel group PXG2_1. The signals generated by all second pixels PX2 included in the second pixel group PXG2_1 are summed to generate a fourth image signal IS4. The fourth image signal IS4 is output as the pixel signal PXS through the column line CL.

[0142] For example, in the second sensing readout period srp2, the second transmission control signals TS2_1, TS2_2, TS2_3, and TS2_4 transition to an active level, and the charges generated in the first red pixel R1, the second red pixel R2, the third red pixel R3, and the fourth red pixel R4 are stored in the floating diffusion node FD. The charges generated in the first red pixel R1, the second red pixel R2, the third red pixel R3, and the fourth red pixel R4 of the second pixel group PXG2_1 are summed and output as a fourth image signal IS4.

[0143] During the read-out period, the second image signal IS2 and the fourth image signal IS4 are output in sequence. Auto-focusing data used for phase difference calculation for the auto-focusing function is generated based on the second image signal IS2 and the fourth image signal IS4. For example, a right image signal of the second pixel group PXG2_1 is acquired based on the second image signal IS2 and the fourth image signal IS4, and the auto-focusing function is performed based on the second image signal IS2 and the right image signal. The fourth image signal is also used for generating images in frame units.

[0144] An image sensor (e.g., the image sensor of FIG. 2) can generate image signals for both an autofocus operation and generating an image with an improved signal-to-noise ratio (SNR) by reading out the first image signal IS1 and the second image signal IS2 in a first sensing readout section srp1 and reading out the third image signal IS3 and the fourth image signal IS4 in a second sensing readout section srp2. The image sensor can improve the signal-to-noise ratio (SNR) while performing an autofocus operation, thereby improving image quality.

[0145] 9 is a flowchart illustrating an operation method of an image sensor according to an embodiment of the present invention. Details that overlap with those described above will be omitted. Hereinafter, reference will be made to FIG. 8.

[0146] In step S910, an image sensor (e.g., image sensor 100 of FIG. 2) outputs a first reset signal rst1 and a second reset signal rst2. The readout section includes a reset readout section rrp, and the first reset signal rst1 is output for a first pixel included in a first pixel group during the reset readout section rrp. The second reset signal rst2 is output for a second pixel included in a second pixel group during the reset readout section rrp.

[0147] In step S920, the image sensor outputs a first image signal IS1 and a second image signal IS2. The readout section includes a first sensing readout section srp1, which follows the reset readout section rrp. In the first sensing readout section srp1, signals generated from all first pixels included in the first pixel group are summed to generate a first image signal IS1.

[0148] During the first sensing readout period srp1, signals generated from some of the second pixels included in the second pixel group are summed to generate a second image signal IS2. Exemplarily, the second image signal IS2 is output from second pixels arranged in the same column but different rows in the second pixel group PXG2_1. For example, the left image signal of the second pixel group PXG2_1 is the second image signal IS2. However, the second image signal IS2 is not necessarily limited to this.

[0149] In step S930, the image sensor outputs a third image signal and a fourth image signal. The readout section includes a second sensing readout section srp2, which follows the first sensing readout section srp1. In the second sensing readout section srp2, signals generated from all first pixels included in the first pixel group are summed to generate a third image signal IS3. In the second sensing readout section srp2, image signals generated from all first pixels included in the first pixel group are read out again. In the second sensing readout section srp2, signals generated from all second pixels included in the second pixel group are summed to generate a fourth image signal IS4.

[0150] 10 is a circuit diagram illustrating an example of a pixel according to an embodiment of the present invention. The pixel PX′ of FIG. 10 operates with dual conversion gain. The pixel PX′ of FIG. 10 is applied to a first pixel (e.g., the first pixel PX1 of FIG. 3) and a second pixel (e.g., the second pixel PX2 of FIG. 3). Exemplarily, each of the first pixel group and the second pixel group includes a plurality of pixels PX′. Details that overlap with those described above in FIG. 6 will be omitted.

[0151] The pixel PX′ includes a photodiode PD, a plurality of transistors, such as a transmission transistor TX, a reset transistor RX, a drive transistor DX, a selection transistor SX, and a gain control transistor CGX (also called a conversion gain control transistor). A floating diffusion node FD connects the capacitor C H , for example, a parasitic capacitor is formed.

[0152] The transmission transistor TX, reset transistor RX, drive transistor DX, selection transistor SX, and gain control transistor CGX operate in response to control signals provided from the row driver 140, such as a reset control signal RS, a transmission control signal TS, a selection signal SELS, and a gain control signal CGS, respectively.

[0153] The charge accumulated in the floating diffusion node FD generates a voltage. That is, the charge accumulated in the floating diffusion node FD is converted into a voltage. The conversion gain is determined by the capacitance of the floating diffusion node FD and is inversely proportional to the capacitance. As the capacitance of the floating diffusion node FD increases, the conversion gain decreases, and as the capacitance decreases, the conversion gain increases.

[0154] The gain control transistor CGX is turned on or off based on a gain control signal CGS received at its gate terminal. When the gain control transistor CGX is turned off, the capacitance decreases, and when the gain control transistor CGX is turned on, the capacitance increases. When the gain control transistor CGX is turned off, the conversion gain is higher than when the gain control transistor CGX is turned on. When the gain control transistor CGX is turned off, the mode is called a high conversion gain (HCG) mode, and when the gain control transistor CGX is turned on, the mode is called a low conversion gain (LCG) mode.

[0155] The pixel PX' operates in one of a high conversion gain (HCG) mode and a low conversion gain (LCG) mode by turning on and off the gain control transistor CGX. For example, the pixel PX' operates in the HCG mode when the gain control transistor CGX is turned off, and the pixel PX' operates in the LCG mode when the gain control transistor CGX is turned on. The pixel PX' can provide dual conversion gain (DCG) to sense low and high light levels, thereby expanding (or increasing) the dynamic range of the image sensor (e.g., the image sensor 100 of FIG. 2).

[0156] In one embodiment, when pixel PX′ operates in dual conversion gain mode, a timing controller (e.g., timing controller 120 of FIG. 2) controls the output of a first image signal and a second image signal during a first sensing readout period. The first pixel group includes a plurality of first pixels, and the first pixels are pixel PX′ of FIG. 10. However, pixel PX′ of FIG. 10 is merely an example, and the structure of pixel PX′ is not necessarily limited thereto. The first image signal is an image signal obtained by adding up image signals generated from all first pixels included in the first pixel group operating in high conversion gain (HCG) mode.

[0157] The second pixel group includes a plurality of second pixels, which are pixels PX′ in FIG. 10, but are not necessarily limited thereto. The second image signal is an image signal obtained by adding together image signals generated from some of the second pixels included in the second pixel group that operate in low conversion gain (LCG) mode.

[0158] In one embodiment, when pixel PX′ operates in dual conversion gain mode, timing controller 120 controls to output a third image signal and a fourth image signal during a second sensing readout period. The second sensing readout period follows the first sensing readout period. The third image signal is an image signal obtained by summing image signals generated from all first pixels included in a first pixel group operating in low conversion gain (LCG) mode. The fourth image signal is an image signal obtained by summing image signals generated from all second pixels included in a second pixel group operating in low conversion gain (LCG) mode.

[0159] FIG. 11 is a timing diagram of an image sensor for reading pixel signals according to an embodiment of the present invention. In FIG. 11, it is assumed that each of the first and second pixel groups includes four pixels PX. However, this is for convenience of explanation, and the description of FIG. 11 also applies when each of the first and second pixel groups includes a different number of pixels PX. The pixel PX′ in FIG. 10 applies to each of the first and second pixels. The description of FIG. 11 also applies when pixels included in a pixel group share a floating diffusion node FD. Details that overlap with those described above will be omitted. Hereinafter, reference will be made to both FIG. 10 and FIG. 11.

[0160] When pixel PX' is a first pixel, the reset transistor RX, select transistor SX, and gain control transistor CGX of each first pixel are controlled based on a first reset control signal RS1, a first select signal SELS1, and a first gain control signal CGS1. For convenience of explanation, Fig. 11 shows only one first reset control signal RS1, first select signal SELS1, and first gain control signal CGS1. However, it is also possible for the transistors to be controlled based on the first reset control signal RS1, first select signal SELS1, and first gain control signal CGS1 of each first pixel included in the first pixel group. The first pixel group includes four first pixels, and the transmission transistors TX of each of the four first pixels are controlled based on the first transmission control signals (TS1_1, TS1_2, TS1_3, TS1_4).

[0161] When pixel PX' is a second pixel, the reset transistor RX, select transistor SX, and gain control transistor CGX of each second pixel are controlled based on a second reset control signal RS2, a second select signal SELS2, and a second gain control signal CGS2. For convenience of explanation, Fig. 11 shows only one second reset control signal RS2, second select signal SELS2, and second gain control signal CGS2. However, it is also possible for the transistors to be controlled based on the second reset control signal RS2, second select signal SELS2, and second gain control signal CGS2 of each second pixel included in the second pixel group. The second pixel group includes four second pixels, and the transmission transistor TX of each of the four second pixels is controlled based on a respective second transmission control signal (TS2_1, TS2_2, TS2_3, TS2_4).

[0162] Referring to Figures 4, 10, and 11 together, during the read-out section, pixel signals (e.g., pixel signal PXS in Figure 2) are output from the first pixel group PXG1_1, the second pixel group PXG2_1, and pixel groups PXG arranged in the same row as the first pixel group PXG1_1 and the second pixel group PXG2_1.

[0163] The lead-out section is divided into a reset lead-out section (rrp), a first sensing lead-out section (srp1), and a second sensing lead-out section (srp2). The reset lead-out section (rrp) includes a first sub-reset lead-out section (srrp1) and a second sub-reset lead-out section (srrp2). The second sub-reset lead-out section (srrp2) follows the first sub-reset lead-out section (srrp1). In the lead-out section, the first sub-reset signal (srst1_LCG) (or the second sub-reset signal (srst2_LCG)), the third sub-reset signal (srst3_HCG) (or the fourth sub-reset signal (srst4_HCG)), the first image signal (IS1_HCG) (or the second image signal (IS2_LCG)), and the third image signal (IS3_LCG) (or the fourth image signal (IS4_LCG)) generated in pixel PX′ are read out in order. Such a read-out method is called an RRSS (reset-reset-signal-signal) read-out method.

[0164] During the readout period, the second select signal SELS2 and the first select signal SEL1 are at an active level, e.g., logic high. During the first sub-reset readout period srrp1, the first sub-reset signal srst1_LCG and the second sub-reset signal srst2_LCG are output. The first sub-reset signal srst1_LCG is a reset signal for the low conversion gain (LCG) mode output from the first pixel group PXG1_1. The second sub-reset signal srst2_LCG is a reset signal for the low conversion gain (LCG) mode output from the second pixel group PXG2_1.

[0165] During the first sub-reset readout period srrp1, the first reset control signal RS1 transitions from logic low to logic high, and the first gain control signal CGS1 transitions from logic low to logic high. During the first sub-reset readout period srrp1, a first sub-reset signal srst1_LCG of a low conversion gain (LCG) mode for the first pixel PX1 included in the first pixel group PXG1_1 is output.

[0166] During the first sub-reset readout period srrp1, the second reset control signal RS2 transitions from logic low to logic high, and the second gain control signal CGS2 transitions from logic low to logic high. During the first sub-reset readout period srrp1, a second sub-reset signal srst2_LCG of a low conversion gain (LCG) mode for the second pixel PX2 included in the second pixel group PXG2_1 is output.

[0167] In the second sub-reset read-out section srrp2, a third sub-reset signal srst3_HCG and a fourth sub-reset signal srst4_HCG are read out. The third sub-reset signal srst3_HCG is a reset signal in high conversion gain (HCG) mode output from the first pixel group PXG1_1. The fourth sub-reset signal srst4_HCG is a reset signal in high conversion gain (HCG) mode output from the second pixel group PXG2_1.

[0168] During the second sub-reset readout period srrp2, the first reset control signal RS1 and the first gain control signal CGS1 are in a logic low state, and the second reset control signal RS21 and the second gain control signal CGS2 are in a logic low state. During the second sub-reset readout period srrp2, a third sub-reset signal srst3_HCG in a high conversion gain (HCG) mode is output for the first pixel PX1 included in the first pixel group PXG1_1. Also, during the second sub-reset readout period srrp2, a fourth sub-reset signal srst4_HCG in a high conversion gain (HCG) mode is output for the second pixel PX2 included in the second pixel group PXG2_1.

[0169] During the first sensing readout period srp1, a first image signal IS1_HCG is output from the first pixel group PXG1_1, and a second image signal IS2_LCG is output from the second pixel group PXG2_1. During the first sensing readout period srp1, the transfer transistors of all first pixels PX1 included in the first pixel group PXG1_1 are turned on. During the first sensing readout period srp1, the first transfer control signals TS1_1, TS1_2, TS1_3, and TS1_4 transition to an active level, and the first gain control signal CGS1 is in a logic low state. During the first sensing readout period srp1, the first pixels operate in a high conversion gain (HCG) mode. Signals generated from all first pixels PX1 included in the first pixel group PXG1_1 are summed to generate a first image signal IS1_HCG.

[0170] During the first sensing readout period srp1, the transfer transistors of some of the second pixels PX2 included in the second pixel group PXG2_1 are turned on. During the first sensing readout period srp1, some of the second transmission control signals (TS2_1, TS2_3) transition to an active level, and the second gain control signal CGS2 transitions from logic low to logic high. During the first sensing readout period srp1, the second pixels PX2 operate in a low conversion gain (LCG) mode. Signals generated by some of the second pixels PX2 included in the second pixel group PXG2_1 are summed and output as a second image signal IS2_LCG.

[0171] During the second sensing readout period srp2, a third image signal IS3_LCG is output from the first pixel group PXG1_1, and a fourth image signal IS4_LCG is output from the second pixel group PXG2_1. During the second sensing readout period srp2, the transfer transistors of all first pixels PX1 included in the first pixel group PXG1_1 remain turned off. During the second sensing readout period srp2, the first transfer control signals TS1_1, TS1_2, TS1_3, and TS1_4 are at a logic low state, and the first gain control signal CGS1 transitions from logic low to logic high. During the second sensing readout period srp2, because the first gain control signal CGS1 is at an active level, the first pixel PX1 operates in low conversion gain (LCG) mode. The signals generated by all first pixels PX1 included in the first pixel group PXG1_1 are summed to generate the third image signal IS3_LCG.

[0172] During the second sensing readout period srp2, the transfer transistors of all second pixels PX2 included in the second pixel group PXG2_1 are turned on. During the second sensing readout period srp2, the second transmission control signals TS2_1, TS2_2, TS2_3, and TS2_4 transition from logic low to logic high, and the second gain control signal CGS2 maintains a logic high state. During the second sensing readout period srp2, because the second gain control signal CGS2 is at an active level, the second pixels PX2 operate in a low conversion gain (LCG) mode. The signals generated by all second pixels PX2 included in the second pixel group PXG2_1 are summed to generate a fourth image signal IS4_LCG.

[0173] In the lead-out section, the first image signal IS1_HCG and the third image signal IS3_LCG are output in sequence. The second image signal IS2_LCG and the fourth image signal IS4_LCG are output in sequence. Image data used to generate an HDR image for the first pixel group PXG1_1 is generated based on the first image signal IS1_HCG and the third image signal IS3_LCG. Also, image data used to generate an HDR image for the second pixel group PXG2_1 is generated based on the fourth image signal IS4_LCG.

[0174] An image sensor (e.g., the image sensor of FIG. 2) can generate image signals for both an autofocus operation and generating an HDR image by reading out the first image signal IS1_HCG and the second image signal IS2_LCG in a first sensing readout section srp1 and reading out the third image signal IS3_LCG and the fourth image signal IS4_LCG in a second sensing readout section srp2. The image sensor can perform an HDR operation while performing an autofocus detection operation, thereby improving image quality.

[0175] 12 is a diagram illustrating an image signal of a first pixel group according to an embodiment of the present invention, and will not be repeated as described above with reference to FIG.

[0176] Referring to FIG. 12, in the read-out section, an image signal is read out once from the first pixel group PXG1_1.

[0177] During the first sensing readout period, the first pixel group PXG1_1 outputs a first image signal IS1 generated from all of the first pixels PX1 included in the first pixel PX1, and the second pixel group PXG2_1 outputs a second image signal IS2 generated from some of the second pixels PX2 included in the second pixel group PXG2_1.

[0178] In the second sensing readout section, no image signal is read out from the first pixel group PXG1_1, and the fourth image signal IS4 generated from all the second pixels PX2 included in the second pixel group PXG2_1 is read out from the second pixel group PXG2_1.

[0179] However, this is not necessarily limited to this, and in the first sensing readout period, no image signal may be read out from the first pixel group PXG1_1, and a second image signal IS2 generated from some of the second pixels PX2 included in the second pixel group PXG2_1 may be read out from the second pixel group PXG2_1. In the second sensing readout period, a first image signal IS1 generated from all of the first pixels PX1 included in the first pixel group PXG1_1 may be read out, and a fourth image signal IS4 generated from all of the second pixels PX2 included in the second pixel group PXG2_1 may be read out from the second pixel group PXG2_1.

[0180] An image sensor (e.g., image sensor 10 of FIG. 2) reads out a first image signal IS1 from a first pixel group PXG1_1 in one of a first sensing readout period and a second sensing readout period, reads out a second image signal IS2 from a second pixel group PXG2_1 in the first sensing readout period, and reads out a fourth image signal IS4 in the second sensing readout period. The image sensor can reduce power consumption by reading out the combined image signals from each of the first pixels included in the first pixel group PXG1_1 once in the readout period.

[0181] 13 is a block diagram illustrating an electronic device according to an embodiment of the present invention, for example, an electronic device 1000, such as a portable terminal.

[0182] 13, an electronic device 1000 according to an embodiment of the present invention includes an application processor 1200, an image sensor 1100, a display device 1300, a memory 1400, a storage 1500, a user interface 1600, and a wireless transceiver 1700. The description of the image sensor and the operation method of the image sensor according to an embodiment of the present invention described above with reference to FIGS.

[0183] The image sensor 1100 generates image data, for example, image data, based on the received optical signal and provides the image data to the application processor 1200. The image data includes autofocusing data, SNR image data, HDR image data, and the like.

[0184] The image sensor 1100 reads out first image signals generated from all first pixels included in the first pixel group and second image signals generated from some of the second pixels included in the second pixel group during a first sensing readout period for one frame. In the first sensing readout period, the number of transfer transistors of the first pixels turned on and the number of transfer transistors of the second pixels turned on are different. For example, in the first sensing readout period, the transfer transistors of four first pixels are turned on, the transfer transistors of two of the four second pixels are turned on, and the transfer transistors of the other two of the four second pixels are turned off. In a second sensing readout period following the first sensing readout period, the image sensor 1100 reads out third image signals generated from all first pixels included in the first pixel group and fourth image signals generated from all second pixels included in the second pixel group. An autofocusing operation is performed based on the second and fourth image signals.

[0185] The application processor 1200 is provided as a system-on-chip (SoC) that controls the overall operation of the electronic device 1000 and runs application programs, an operating system, and the like.

[0186] The application processor 1200 receives the output data from the image sensor 1100 .

[0187] The memory 1400 may be implemented as a volatile memory such as a dynamic random access memory (DRAM) or a static random access memory (SRAM), or a non-volatile resistive memory such as a ferroelectric random access memory (FeRAM), a resistive random access memory (ReRAM), or a phase-change random access memory (PRAM). The memory 1400 stores programs and / or data to be processed or executed by the application processor 1200.

[0188] The storage 1500 is embodied as a non-volatile memory device such as a NAND flash or a resistive memory, and for example, the storage 1500 is provided as a memory card (multimedia card (MMC), embedded MMC (eMMC), secure digital (SD), microSD), etc. The storage 1500 stores data and / or programs for executing algorithms that control the image processing operations of the image sensor 1100, and the data and / or programs are loaded into the memory 1400 when the image processing operations are performed. In one embodiment, the storage 1500 stores output image data generated by the image sensor 1100, such as corrected image data or post-processed image data.

[0189] The user interface 1600 may be implemented by various devices capable of receiving user input, such as a keyboard, a curtain key panel, a touch panel, a fingerprint sensor, a microphone, etc. The user interface 1600 receives the user input and provides a signal corresponding to the received user input to the application processor 1200.

[0190] The wireless transceiver unit 1700 includes a transceiver 1720 , a modem 1710 , and an antenna 1730 .

[0191] Although the embodiments of the present invention have been described in detail above with reference to the drawings, the present invention is not limited to the above-described embodiments and can be modified in various ways without departing from the technical concept of the present invention. [Explanation of symbols]

[0192] 1. Digital imaging device 2. Objects 100 image sensors 110, 110a, 110b, 110c, 110d pixel array 120 Timing Controller 130 Readout circuit 131 Analog-to-Digital Conversion (ADC) Circuit 132 data bus 140 Row Driver 150 Ramp Signal Generator 160 Signal Processor 200 Imaging unit 210 Lens 220 Lens drive unit 230 aperture 240 Aperture drive unit 300 processors 1000 electronic devices 1100 image sensor 1200 Application Processor 1300 display device 1400 memory 1500 Storage 1600 User Interface 1700 Radio Transmitter / Receiver 1710 modem 1720 Transceiver 1730 Antenna B1~B4 1st~4th blue pixels CGS Gain control signal CGX Gain Control Transistor C H (parasitic) capacitor CL Column Line CNT Connect CS control signal DX drive transistor FD Floating Diffusion Node Gb1~Gb4 1st to 4th green pixels Gr1~Gr4 1st to 4th green pixels IS1~IS4 1st to 4th image signals IS1_HCG, IS3_HCG 1st and 3rd image signals IS2_LCG, IS4_LCG 2nd and 4th image signals ML1, ML2 1st and 2nd microlenses PD Photoelectric conversion element (photodiode) PD1 to PD4 First to fourth photoelectric conversion elements pdt pixel value PX, PX' pixels PX1~PX4 1st to 4th pixels PXG Pixel Group PXG1, PXG2 1st and 2nd pixel groups PXG1_1, PXG1_2 1st pixel group PXG2_1, PXG2_2 Second pixel group PXS Pixel Signal R1~R16 1st to 16th red pixels RAMP Ramp signal RCS control signal RL Lowline rrp Reset lead-out section RS Reset control signal RS1, RS2 First and second reset control signals rst1, rst2 First and second reset signals RX reset transistor SELS Selection signal SELS1, SELS2 First and second selection signals SPG Subpixel Group SPG1, SPG2 First and second subpixel groups srp1 First sensing readout section srp2 Second sensing readout section srrp1, srrp2 1st and 2nd sub-reset read-out sections srst1_LCG, srst2_LCG 1st and 2nd sub-reset signals srst3_HCG, srst4_HCG 3rd and 4th sub-reset signals SX select transistor TS transmission control signal TS1~TS4 transmission control signals TS1_1, TS1_2, TS1_3, TS1_4 First transmission control signal TS2_1, TS2_2, TS2_3, TS2_4 Second transmission control signal TX Transistor TX1~TX4 1st~4th transmission transistors VPIX power supply voltage

Claims

1. a first pixel group including a plurality of first pixels, and a plurality of first microlenses disposed on each of the plurality of first pixels; a second pixel group including a plurality of second pixels, and a second microlens disposed on at least two of the second pixels; a timing controller; The timing controller In a first sensing readout section included in a readout section, a first image signal generated from each of the plurality of first pixels and a second image signal generated from a first portion of the plurality of second pixels are controlled to be output; and controlling the readout interval so that a third image signal generated from each of the plurality of first pixels and a fourth image signal generated from each of the plurality of second pixels are output in a second sensing readout interval following a first sensing readout interval included in the readout interval.

2. Each of the plurality of first pixels and each of the plurality of second pixels a photoelectric conversion element that senses light and generates photocharges; a transfer transistor that transfers photocharges generated in the photoelectric conversion element to a floating diffusion node, In the first sensing readout section, a transfer transistor of each of the plurality of first pixels is turned on; a transfer transistor of each of a first portion of the plurality of second pixels is turned on; 2. The image sensor of claim 1, wherein the transfer transistors of each of the second portions of the plurality of second pixels are turned off.

3. In the second sensing readout section, a transfer transistor of each of the plurality of first pixels is turned off; 3. The image sensor of claim 2, wherein a transfer transistor of each of the second pixels is turned on.

4. the lead-out section further includes a reset lead-out section preceding the first sensing lead-out section, The timing controller 2. The image sensor of claim 1, wherein, in the reset readout section, a first reset signal is output for the first pixels and a second reset signal is output for the second pixels.

5. 2. The image sensor of claim 1, wherein the timing controller controls the first image signals generated from the plurality of first pixels operating in a high conversion gain (HCG) mode and the second image signals generated from the first portion of the plurality of second pixels operating in a low conversion gain (LCG) mode to be output during the first sensing readout period.

6. 6. The image sensor of claim 5, wherein the timing controller controls the second sensing readout section so that a third image signal generated from each of the plurality of first pixels operating in the low conversion gain (LCG) mode and a fourth image signal generated from all of the second pixels included in the second pixel group operating in the low conversion gain (LCG) mode are output.

7. the lead-out section further includes a first sub-reset lead-out section preceding the first sensing lead-out section and a second sub-reset lead-out section following the first sub-reset lead-out section; The timing controller In the first sub-reset readout section, a first sub-reset signal for the plurality of first pixels operating in the low conversion gain (LCG) mode and a second sub-reset signal for the plurality of second pixels operating in the low conversion gain (LCG) mode are controlled to be output; 7. The image sensor of claim 6, wherein, during the second sub-reset readout period, a third sub-reset signal for the plurality of first pixels operating in the high conversion gain (HCG) mode and a fourth sub-reset signal for the plurality of second pixels operating in the low conversion gain (LCG) mode are output.

8. the plurality of first pixels includes four first pixels; the plurality of first microlenses includes four first microlenses; the first portion of the plurality of second pixels includes two adjacent second pixels; the plurality of second pixels includes four second pixels; the second microlens extends across the four second pixels; The timing controller In the first sensing readout section, the first image signal obtained by summing the image signals of the four first pixels and the second image signal obtained by summing the image signals of the two adjacent second pixels are output, 2. The image sensor of claim 1, wherein the third image signal obtained by summing the image signals of the four first pixels and the fourth image signal obtained by summing the image signals of the four second pixels are output during the second sensing readout period.

9. a first pixel group including a plurality of first pixels arranged in a matrix; a second pixel group including a plurality of second pixels arranged in a matrix; a plurality of first microlenses disposed above the plurality of first pixels; a second microlens disposed above at least two pixels of the plurality of second pixels and having a diameter larger than that of a first microlens of the plurality of first microlenses; a readout circuit; The readout circuit In a lead-out section, a first pixel value generated based on each of the plurality of first pixels and a third pixel value generated based on each of the plurality of first pixels are sequentially output; and sequentially outputting, in the read-out section, second pixel values ​​generated based on a first portion of the plurality of second pixels among the plurality of second pixels, and fourth pixel values ​​generated based on each of the plurality of second pixels.

10. 1. A method for operating an image sensor including a first pixel group including first pixels, a second pixel group including second pixels, first microlenses disposed in the first pixels, and second microlenses disposed in at least two of the second pixels, outputting a first reset signal for the first pixel and a second reset signal for the second pixel; outputting first image signals generated from each of the first pixels and second image signals generated from a first portion of the second pixels; outputting a third image signal generated from the first pixel and a fourth image signal generated from each of the second pixels.

Images