Light-emitting device

Abstract

To provide a display device that is capable of displaying a high quality image.SOLUTION: A display device has a first light-emitting element, a second light-emitting element, a first protective layer, a second protective layer, and voids. The first light-emitting element has a first lower electrode, a first EL layer on the first lower electrode, and a first upper electrode on the first EL layer, and the second light-emitting element has a second lower electrode, a second EL layer on the second lower electrode, and a second upper electrode on the second EL layer. The first light-emitting element and the second light-emitting element are adjacent to each other. The first protective layer has a region that is provided on the first light-emitting element and on the second light-emitting element and is in contact with a side surface of the first EL layer and a side surface of the second EL layer. The second protective layer is provided on the first protective layer. The voids are provided between the first EL layer and the second EL layer and between the first protective layer and the second protective layer.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] BACKGROUND OF THE INVENTION 1. Field of the Invention One embodiment of the present invention relates to a display device and a manufacturing method thereof.

[0002] Note that one embodiment of the present invention is not limited to the above technical field. The technical field of one embodiment of the invention disclosed in this specification relates to an object, a method, or a manufacturing method. Alternatively, one embodiment of the present invention relates to a process, a machine, a manufacture, or a composition of matter. Therefore, more specifically, examples of the technical field of one embodiment of the present invention disclosed in this specification include a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, a driving method thereof, or a manufacturing method thereof. [Background technology]

[0003] In recent years, display devices are expected to be used in a variety of applications. For example, applications of large display devices include home television devices (also called televisions or television receivers), digital signage, and public information displays (PIDs). In addition, development of smartphones and tablet devices equipped with touch panels as mobile information terminals is progressing.

[0004] There is also a demand for higher resolution display devices. Devices requiring high resolution display devices, such as devices for virtual reality (VR), augmented reality (AR), substitutional reality (SR), and mixed reality (MR), are being actively developed.

[0005] As a display device, for example, a light-emitting device having a light-emitting element (also referred to as a light-emitting device) has been developed. In particular, a light-emitting element (also referred to as an EL element or an EL device) utilizing the electroluminescence (hereinafter referred to as EL) phenomenon has features such as being easily thin and lightweight, being capable of high-speed response to input signals, and being capable of being driven by a DC constant voltage power supply, and is therefore applied to a display device.

[0006] Patent Document 1 discloses a display device for VR that uses an organic EL element (also called an organic EL device). [Prior art documents] [Patent documents]

[0007] [Patent Document 1] International Publication No. 2018 / 087625 Summary of the Invention [Problem to be solved by the invention]

[0008] An object of one embodiment of the present invention is to provide a display device that displays a high-quality image.An object of one embodiment of the present invention is to provide a display device with high light extraction efficiency.An object of one embodiment of the present invention is to provide a display device with a high aperture ratio.An object of one embodiment of the present invention is to provide a high-resolution display device.An object of one embodiment of the present invention is to provide a low-cost display device.An object of one embodiment of the present invention is to provide a highly reliable display device.An object of one embodiment of the present invention is to provide a novel display device.

[0009] Another object of one embodiment of the present invention is to provide a manufacturing method of a display device that displays a high-quality image.Another object of one embodiment of the present invention is to provide a manufacturing method of a display device with high light extraction efficiency.Another object of one embodiment of the present invention is to provide a manufacturing method of a display device with a high aperture ratio.Another object of one embodiment of the present invention is to provide a manufacturing method of a high-resolution display device.Another object of one embodiment of the present invention is to provide a manufacturing method of a display device with simple steps.Another object of one embodiment of the present invention is to provide a manufacturing method of a highly reliable display device.Another object of one embodiment of the present invention is to provide a manufacturing method of a novel display device.

[0010] Note that the description of these problems does not preclude the existence of other problems. Note that one embodiment of the present invention does not necessarily solve all of these problems. Note that problems other than these will become apparent from the description of the specification, drawings, claims, etc., and it is possible to extract other problems from the description of the specification, drawings, claims, etc. [Means for solving the problem]

[0011] One embodiment of the present invention is a display device including a first light-emitting element, a second light-emitting element, a first protective layer, a second protective layer, and a gap. The first light-emitting element has a first lower electrode, a first EL layer on the first lower electrode, and a first upper electrode on the first EL layer. The second light-emitting element has a second lower electrode, a second EL layer on the second lower electrode, and a second upper electrode on the second EL layer. The first light-emitting element and the second light-emitting element are adjacent to each other. The first protective layer is provided over the first light-emitting element and the second light-emitting element and has a region in contact with a side surface of the first EL layer and a side surface of the second EL layer. The second protective layer is provided on the first protective layer. The gap is provided between the first EL layer and the second EL layer and between the first protective layer and the second protective layer.

[0012] Alternatively, in the above embodiment, the distance between the side surface of the first EL layer and the side surface of the second EL layer may be 1 μm or less in an area.

[0013] Alternatively, in the above embodiment, the voids may contain one or more elements selected from nitrogen, oxygen, carbon dioxide, and Group 18 elements.

[0014] Alternatively, in the above embodiment, the Group 18 element may be any one or more selected from helium, neon, argon, xenon, and krypton.

[0015] Alternatively, in the above embodiment, the refractive index of the first protective layer may be higher than the refractive index of the void.

[0016] Alternatively, in the above aspect, a microlens array may be provided on the second protective layer.

[0017] Alternatively, in the above embodiment, the first EL layer and the second EL layer may have the function of emitting light of different colors.

[0018] Alternatively, the above embodiment may include a first transistor and a second transistor, one of a source or a drain of the first transistor being electrically connected to a first lower electrode, one of a source or a drain of the second transistor being electrically connected to a second lower electrode, and the first transistor and the second transistor each having silicon or metal oxide in a channel formation region.

[0019] An electronic device including the display device of one embodiment of the present invention and a lens is also one embodiment of the present invention.

[0020] Another embodiment of the present invention is a method for manufacturing a display device, comprising: forming a first light-emitting element having a first bottom electrode, a first EL layer over the first bottom electrode, and a first upper electrode over the first EL layer; and forming a second light-emitting element adjacent to the first light-emitting element, the second light-emitting element having a second bottom electrode, a second EL layer over the second bottom electrode, and a second upper electrode over the second EL layer. A first protective layer is formed over the first light-emitting element and the second light-emitting element and has a region in contact with a side surface of the first EL layer and a side surface of the second EL layer. The second protective layer is formed so that a gap is provided between the first EL layer and the second EL layer.

[0021] Alternatively, in the above embodiment, the first protective layer may be formed using an ALD method, and the second protective layer may be formed using a sputtering method or a CVD method.

[0022] Alternatively, in the above embodiment, a microlens array may be formed on the second protective layer.

[0023] Alternatively, in the above embodiment, the refractive index of the first protective layer may be higher than the refractive index of the void.

[0024] Alternatively, in the above embodiment, the first EL layer and the second EL layer may have the function of emitting light of different colors. [Effects of the Invention]

[0025] According to one embodiment of the present invention, a display device that displays a high-quality image can be provided. According to one embodiment of the present invention, a display device with high light extraction efficiency can be provided. According to one embodiment of the present invention, a display device with a high aperture ratio can be provided. According to one embodiment of the present invention, a high-definition display device can be provided. According to one embodiment of the present invention, a low-cost display device can be provided. According to one embodiment of the present invention, a highly reliable display device can be provided. According to one embodiment of the present invention, a novel display device can be provided.

[0026] According to one embodiment of the present invention, a method for manufacturing a display device that displays a high-quality image can be provided. According to one embodiment of the present invention, a method for manufacturing a display device with high light extraction efficiency can be provided. According to one embodiment of the present invention, a method for manufacturing a display device with a high aperture ratio can be provided. According to one embodiment of the present invention, a method for manufacturing a high-resolution display device can be provided. According to one embodiment of the present invention, a method for manufacturing a display device with simple steps can be provided. According to one embodiment of the present invention, a method for manufacturing a highly reliable display device can be provided. According to one embodiment of the present invention, a novel method for manufacturing a display device can be provided.

[0027] Note that the description of these effects does not preclude the existence of other effects. Note that one embodiment of the present invention does not necessarily have all of these effects. Note that effects other than these will become apparent from the description in the specification, drawings, claims, etc., and it is possible to extract other effects from the description in the specification, drawings, claims, etc. [Brief explanation of the drawings]

[0028] [Figure 1] FIG. 1 is a cross-sectional view showing an example of the configuration of a display device. [Figure 2] 2A to 2C are cross-sectional views showing examples of the structure of a transistor. [Figure 3] FIG. 3 is a cross-sectional view showing an example of the configuration of a display device. [Figure 4] 4A and 4B are top views showing configuration examples of the display device. [Figure 5] FIG. 5 is a perspective view showing an example of the configuration of a display device. [Figure 6] FIG. 6 is a perspective view showing an example of the configuration of a display device. [Figure 7] 7A to 7E are cross-sectional views showing an example of a method for manufacturing a display device. [Figure 8] FIG. 8 is a cross-sectional view showing an example of the configuration of a display device. [Figure 9] FIG. 9 is a cross-sectional view showing an example of the configuration of a display device. [Figure 10]FIG. 10 is a cross-sectional view showing an example of the configuration of a display device. [Figure 11] FIG. 11 is a cross-sectional view showing an example of the configuration of a display device. [Figure 12] FIG. 12 is a cross-sectional view showing an example of the configuration of a display device. [Figure 13] FIG. 13 is a cross-sectional view showing an example of the configuration of a display device. [Figure 14] FIG. 14 is a cross-sectional view showing an example of the configuration of a display device. [Figure 15] FIG. 15 is a cross-sectional view showing an example of the configuration of a display device. [Figure 16] FIG. 16 is a cross-sectional view showing an example of the configuration of a display device. [Figure 17] FIG. 17 is a cross-sectional view showing an example of the configuration of a display device. [Figure 18] Fig. 18A is a perspective view showing an example of the configuration of a display device, and Fig. 18B and Fig. 18C are cross-sectional views showing an example of the configuration of a display device. [Figure 19] Fig. 19A is a perspective view illustrating an example of a method for manufacturing a display device, and Fig. 19B and Fig. 19C are cross-sectional views illustrating an example of a method for manufacturing a display device. [Figure 20] 20A1, 20A2, 20B1, 20B2, 20C1, and 20C2 are cross-sectional views showing an example of a method for manufacturing a display device. [Figure 21] Fig. 21A is a perspective view illustrating an example of a method for manufacturing a display device, and Fig. 21B and Fig. 21C are cross-sectional views illustrating an example of a method for manufacturing a display device. [Figure 22] Fig. 22A is a perspective view illustrating an example of a method for manufacturing a display device, and Fig. 22B and Fig. 22C are cross-sectional views illustrating an example of a method for manufacturing a display device. [Figure 23] 23A1, 23A2, 23B1, and 23B2 are cross-sectional views showing an example of a method for manufacturing a display device. [Figure 24] Fig. 24A is a perspective view showing an example of the configuration of a display device, and Fig. 24B and Fig. 24C are cross-sectional views showing an example of the configuration of a display device. [Figure 25]Fig. 25A is a perspective view illustrating an example of a method for manufacturing a display device, and Fig. 25B and Fig. 25C are cross-sectional views illustrating an example of a method for manufacturing a display device. [Figure 26] 26A1, 26A2, 26B1, 26B2, 26C1, and 26C2 are cross-sectional views showing an example of a method for manufacturing a display device. [Figure 27] Fig. 27A is a perspective view illustrating an example of a method for manufacturing a display device, and Fig. 27B and Fig. 27C are cross-sectional views illustrating an example of a method for manufacturing a display device. [Figure 28] FIG. 28 is a cross-sectional view showing an example of the configuration of a display device. [Figure 29] FIG. 29 is a cross-sectional view showing an example of the configuration of a display device. [Figure 30] Fig. 30A is a block diagram showing an example of the configuration of a display device, and Fig. 30B is a circuit diagram showing an example of the configuration of a pixel. [Figure 31] 31A is a top view illustrating an example of the structure of a transistor, and FIGS. 31B and 31C are cross-sectional views illustrating an example of the structure of a transistor. [Figure 32] 32A to 32C are cross-sectional views showing examples of the configuration of a light-emitting element. [Figure 33] Fig. 33A is a diagram explaining the classification of IGZO crystal structures, Fig. 33B is a diagram explaining the XRD spectrum of a CAAC-IGZO film, and Fig. 33C is a diagram explaining the electron microbeam diffraction pattern of a CAAC-IGZO film. [Figure 34] 34A to 34D are diagrams showing an example of an electronic device. [Figure 35] 35A and 35B are diagrams showing an example of an electronic device. [Figure 36] 36A to 36C are diagrams showing a method for producing a sample according to an embodiment. [Figure 37] 37A, 37B1, and 37B2 are STEM images of the sample according to the example. DETAILED DESCRIPTION OF THE INVENTION

[0029] In this specification, a semiconductor device is a device that utilizes semiconductor characteristics, and refers to a circuit including a semiconductor element (transistor, diode, photodiode, etc.), a device having such a circuit, etc. It also refers to any device that can function by utilizing semiconductor characteristics. For example, an integrated circuit, a chip including an integrated circuit, and an electronic component in which a chip is housed in a package are examples of semiconductor devices. Furthermore, memory devices, display devices, light-emitting devices, lighting devices, electronic devices, etc. are themselves semiconductor devices and may include semiconductor devices.

[0030] Furthermore, when it is stated in this specification that X and Y are connected, it is understood that the following cases are disclosed in this specification: when X and Y are electrically connected, when X and Y are functionally connected, and when X and Y are directly connected. Therefore, it is not limited to a predetermined connection relationship, for example, a connection relationship shown in a figure or text, and it is understood that connections other than those shown in a figure or text are also disclosed in a figure or text. X and Y are understood to be objects (e.g., a device, an element, a circuit, wiring, an electrode, a terminal, a conductive film, or a layer, etc.).

[0031] As an example of a case where X and Y are electrically connected, one or more elements (for example, a switch, a transistor, a capacitance element, an inductor, a resistance element, a diode, a display element, a light-emitting element, or a load) that enable the electrical connection between X and Y can be connected between X and Y. The switch has a function of controlling its on and off states. In other words, the switch has a function of being in a conductive state (on state) or a non-conductive state (off state), and controls whether or not a current flows.

[0032] As an example of a case where X and Y are functionally connected, one or more circuits that enable the functional connection between X and Y (for example, logic circuits (inverters, NAND circuits, NOR circuits, etc.), signal conversion circuits (digital-analog conversion circuits, analog-digital conversion circuits, gamma correction circuits, etc.), potential level conversion circuits (power supply circuits (boosting circuits, step-down circuits, etc.), level shifter circuits that change the potential level of signals, etc.), voltage sources, current sources, switching circuits, amplifier circuits (circuits that can increase signal amplitude or current, etc., operational amplifiers, differential amplifier circuits, source follower circuits, buffer circuits, etc.), signal generation circuits, memory circuits, control circuits, etc.) can be connected between X and Y. As an example, even if another circuit is sandwiched between X and Y, if a signal output from X is transmitted to Y, X and Y are considered to be functionally connected.

[0033] When it is explicitly stated that X and Y are electrically connected, this includes the case where X and Y are electrically connected (i.e., the case where X and Y are connected with another element or circuit between them) and the case where X and Y are directly connected (i.e., the case where X and Y are connected without another element or circuit between them).

[0034] Note that even when independent components are shown electrically connected in a circuit diagram, one component may have the functions of multiple components. For example, if part of a wiring also functions as an electrode, one conductive film has the functions of both wiring and an electrode. Therefore, the term "electrically connected" in this specification also includes such cases where one conductive film has the functions of multiple components.

[0035] In addition, in this specification, etc., the term "node" can be rephrased as a terminal, wiring, electrode, conductive layer, conductor, impurity region, etc. depending on the circuit configuration, device structure, etc. Furthermore, a terminal or wiring, etc. can be rephrased as a "node."

[0036] Furthermore, in this specification and the like, the terms "voltage" and "potential" can be interchanged as appropriate. "Voltage" refers to the potential difference from a reference potential. For example, if the reference potential is the ground potential (earth potential), then "voltage" can be interchanged with "potential." Note that ground potential does not necessarily mean 0 V. Furthermore, potential is relative, and as the reference potential changes, the potential applied to wiring, the potential applied to a circuit, or the potential output from a circuit also changes, for example.

[0037] Furthermore, in this specification, the ordinal numbers "first," "second," and "third" are used to avoid confusion between components. Therefore, they do not limit the number of components. Furthermore, they do not limit the order of the components. For example, a component referred to as "first" in one embodiment of this specification may be a component referred to as "second" in another embodiment, in the claims, etc. Furthermore, for example, a component referred to as "first" in one embodiment of this specification may be omitted in another embodiment, in the claims, etc.

[0038] Furthermore, in this specification, terms indicating position, such as "above," "below," "upward," or "belowward," may be used for convenience in describing the positional relationship between components with reference to the drawings. Furthermore, the positional relationship between components changes as appropriate depending on the direction in which each configuration is depicted. Therefore, the terms are not limited to those described in this specification, and can be rephrased appropriately depending on the situation. For example, the expression "insulator located on the upper surface of a conductor" can be rephrased as "insulator located on the lower surface of a conductor" by rotating the orientation of the drawing 180 degrees.

[0039] Furthermore, in this specification and the like, terms such as "film" and "layer" can be interchanged depending on the situation. For example, the term "conductive layer" may be changed to the term "conductive film." Or, for example, the term "insulating film" may be changed to the term "insulating layer." Or, in some cases or depending on the situation, terms such as "film" and "layer" may not be used and may be replaced with other terms. For example, the terms "conductive layer" or "conductive film" may be changed to the term "conductor." Or, for example, the terms "insulating layer" and "insulating film" may be changed to the term "insulator."

[0040] Furthermore, in this specification and the like, terms such as "electrode," "wiring," and "terminal" do not limit the functionality of these components. For example, an "electrode" may be used as part of a "wiring," and vice versa. Furthermore, the terms "electrode" and "wiring" include cases where multiple "electrodes" or "wirings" are integrally formed. Furthermore, for example, a "terminal" may be used as part of a "wiring" or "electrode," and vice versa. Furthermore, the term "terminal" includes cases where, for example, multiple "electrodes," "wirings," or "terminals" are integrally formed. Therefore, for example, an "electrode" can be part of a "wiring" or "terminal," and, for example, a "terminal" can be part of a "wiring" or "electrode." Furthermore, terms such as "electrode," "wiring," and "terminal" may sometimes be replaced with the term "region," for example.

[0041] In this specification, "parallel" refers to a state in which two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it also includes cases where the angle is -5° or more and 5° or less. Furthermore, "substantially parallel" or "roughly parallel" refers to a state in which two straight lines are arranged at an angle of -30° or more and 30° or less. Furthermore, "perpendicular" refers to a state in which two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes cases where the angle is 85° or more and 95° or less. Furthermore, "substantially perpendicular" or "approximately perpendicular" refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0042] In this specification and the like, the term "metal oxide" refers to an oxide of a metal in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as "oxide semiconductors" or simply "OSs"). For example, when a metal oxide is used in a semiconductor layer of a transistor, the metal oxide may be referred to as an oxide semiconductor. That is, when a metal oxide can form a channel formation region of a transistor having at least one of an amplifying function, a rectifying function, and a switching function, the metal oxide can be referred to as a metal oxide semiconductor. Furthermore, the term "OS transistor" can be rephrased as a transistor having a metal oxide or an oxide semiconductor.

[0043] In this specification and the like, nitrogen-containing metal oxides may also be collectively referred to as metal oxides. Nitrogen-containing metal oxides may also be referred to as metal oxynitrides. In this specification and the like, voids refer to regions containing gas.

[0044] In this specification and the like, the configurations shown in each embodiment can be combined as appropriate with the configurations shown in other embodiments to form one aspect of the present invention. In addition, when multiple configuration examples are shown in one embodiment, the configuration examples can be combined as appropriate with each other.

[0045] The embodiments described in this specification will be described with reference to the drawings. However, it will be readily understood by those skilled in the art that the embodiments can be implemented in many different ways, and that various changes in form and details can be made without departing from the spirit and scope of the invention. Therefore, the present invention should not be interpreted as being limited to the description of the embodiments. Note that in the configuration of the invention of the embodiments, the same reference numerals are used in different drawings for the same parts or parts having similar functions, and repeated description thereof may be omitted. Furthermore, to make the drawings easier to understand, the illustration of some components may be omitted in perspective views, top views, etc.

[0046] In addition, in the drawings of this specification, the size, layer thickness, or region may be exaggerated for clarity. Therefore, the size, aspect ratio, etc. are not necessarily limited to the size or aspect ratio. Note that the drawings are schematic illustrations of ideal examples and are not limited to the shapes or values ​​shown in the drawings. For example, variations in signal, voltage, or current due to noise, or variations in signal, voltage, or current due to timing deviations, etc. may be included.

[0047] In this specification, etc., a device fabricated using a metal mask or FMM (fine metal mask, high-resolution metal mask) may be referred to as a device with an MM (metal mask) structure. Also, in this specification, etc., a device fabricated without using a metal mask or FMM may be referred to as a device with an MML (metal maskless) structure.

[0048] (Embodiment 1) In this embodiment, a display device according to one embodiment of the present invention and a manufacturing method thereof will be described with reference to drawings.

[0049] One aspect of the present invention relates to a display device in which pixels each having a light-emitting element such as an organic EL element are arranged in a matrix. In the display device of one aspect of the present invention, the light-emitting elements provided in adjacent pixels are separated by a gap containing a gas such as air. Light emitted from the light-emitting element in an oblique direction can be totally reflected by the gap. This prevents the light emitted from the light-emitting element from entering adjacent pixels.

[0050] <Display device configuration example 1> Fig. 1 is a cross-sectional view showing an example of the configuration of a display device 10. In Fig. 1, the left end of the cross-sectional view is designated as A1, and the right end is designated as A2.

[0051] The display device 10 includes a transistor 80 and an element isolation layer 86 on a substrate 81. In addition, on the substrate 81, an insulating layer 131, an insulating layer 133, an insulating layer 135, and an insulating layer 137 are provided.

[0052] The display device 10 also includes an insulating layer 71 on the insulating layer 137, an insulating layer 61 on the insulating layer 71, light-emitting elements 20R, 20G, and 20B on the insulating layer 61, a protective layer 31 on the light-emitting elements 20R, 20G, and 20B, a protective layer 33 on the protective layer 31, a microlens array 35 on the protective layer 33, an adhesive layer 41 on the microlens array 35, a light-shielding layer 43 on the adhesive layer 41, an insulating layer 45 on the adhesive layer 41 and the light-shielding layer 43, and a substrate 47 on the insulating layer 45. The microlens array 35, the insulating layer 45, and the light-shielding layer 43 are bonded together by the adhesive layer 41. While FIG. 1 illustrates a configuration in which the insulating layer 71 is provided, this is not limiting. For example, the insulating layer 61 may be provided on the insulating layer 137 without providing the insulating layer 71.

[0053] Furthermore, the display device 10 has a conductive layer 63, a conductive layer 65, a conductive layer 67, and a conductive layer 69. Here, the conductive layer 67 is embedded in the insulating layer 131, the insulating layer 133, the insulating layer 135, and the insulating layer 137, the conductive layer 69 is embedded in the insulating layer 71, and the conductive layer 63 and the conductive layer 65 are embedded in the insulating layer 61. Also, the height of the conductive layer 67 and the height of the insulating layer 137 can be made approximately the same, the height of the conductive layer 69 and the height of the insulating layer 71 can be made approximately the same, and the height of the conductive layer 65 and the height of the insulating layer 61 can be made approximately the same.

[0054] 1, the A1-A2 direction is the x direction, and the height direction of the display device 10 is the z direction. The direction perpendicular to the xz plane is the y direction. Similar expressions may be used in other figures.

[0055] In this specification and the like, for example, when it is said that "B is on A" or "B is below A," A and B do not necessarily have to have an area where they contact each other.

[0056] In addition, in this specification and the like, the term "element" can sometimes be replaced with "device." For example, a light-emitting element can be called a light-emitting device.

[0057] Furthermore, in this specification and the like, when describing matters common to the light-emitting element 20R, the light-emitting element 20G, and the light-emitting element 20B, or when there is no need to distinguish between the three, they may be simply referred to as "light-emitting element 20." The same applies to other elements.

[0058] 1, the light-emitting element 20 and the transistor 80 are stacked. Here, the layer where the light-emitting element 20 is provided is referred to as a layer 121, and the layer where the transistor 80 is provided is referred to as a layer 125.

[0059] The light-emitting element 20R has a lower electrode 21, an EL layer 23R, and an upper electrode 25. The light-emitting element 20G has a lower electrode 21, an EL layer 23G, and an upper electrode 25. The light-emitting element 20B has a lower electrode 21, an EL layer 23B, and an upper electrode 25. The light-emitting element 20 can be a top-emission type light-emitting element. When the light-emitting element 20 is a top-emission type light-emitting element, the lower electrode 21 has a function of reflecting visible light, and the upper electrode 25 has a function of transmitting visible light. The lower electrode 21 also functions as a pixel electrode of the display device 10.

[0060] The display device 10 includes a pixel 50R, a pixel 50G, and a pixel 50B. The pixel 50R includes a light-emitting element 20R, the pixel 50G includes a light-emitting element 20G, and the pixel 50B includes a light-emitting element 20B. Each of the pixels 50R, 50G, and 50B includes a transistor 80. One of a source and a drain of the transistor 80 is electrically connected to the lower electrode 21 of the light-emitting element 20R, the lower electrode 21 of the light-emitting element 20G, or the lower electrode 21 of the light-emitting element 20B via a conductive layer 67, a conductive layer 69, a conductive layer 63, and a conductive layer 65.

[0061] Here, the conductive layer 63 functions as, for example, a wiring. The conductive layer 69 functions as, for example, a plug for electrically connecting the conductive layer 67 and the conductive layer 63, and the conductive layer 65 functions as, for example, a plug for electrically connecting the conductive layer 63 and the lower electrode 21.

[0062] In this specification and the like, the wiring and the plug electrically connected to the wiring may be integral with each other, that is, a part of the conductive layer may function as the wiring and another part may function as the plug.

[0063] The layer 125 can include transistors included in a driver circuit such as a scan line driver circuit, in addition to the transistors included in the pixel 50. In this specification and the like, the transistor provided in the layer 125 is referred to as a transistor 80.

[0064] The transistor 80 can be a transistor having silicon in a channel formation region (a Si transistor). The silicon in a Si transistor can be single crystal silicon, polycrystalline silicon (polysilicon), amorphous silicon, or the like. In particular, the channel formation region of the transistor 80 is preferably formed from single crystal silicon.

[0065] The transistor 80 includes a conductive layer 82 that functions as a gate electrode, an insulating layer 83 that functions as a gate insulating layer, and a part of a substrate 81. The transistor 80 also includes a semiconductor region including a channel formation region, a low-resistance region 85a that functions as one of a source region and a drain region, and a low-resistance region 85b that functions as the other of the source region and the drain region. The transistor 80 may be either a p-channel type or an n-channel type. Alternatively, the transistor 80 may be a so-called CMOS (Complementary Metal Oxide Semiconductor) transistor that combines an n-channel type transistor and a p-channel type transistor.

[0066] The transistor 80 is electrically isolated from other transistors by an isolation layer 86. Fig. 1 shows a case where the transistors 80 are electrically isolated from each other by the isolation layer 86. The isolation layer 86 can be formed by using a LOCOS (LOCal Oxidation of Silicon) method, an STI (Shallow Trench Isolation) method, or the like.

[0067] FIG. 2A is a cross-sectional view showing a configuration example of the transistor 80 shown in FIG. 1 in the channel width direction (direction A3-A4).

[0068] 1 and 2A, the semiconductor region of the transistor 80 has a convex shape. The side and top surfaces of the semiconductor region are covered with a conductive layer 82 via an insulating layer 83. The conductive layer 82 can be made of a material that adjusts the work function.

[0069] A transistor having a convex semiconductor region, such as transistor 80 shown in FIGS. 1 and 2A, is called a fin transistor because it utilizes a convex portion of a semiconductor substrate. An insulator that functions as a mask for forming the convex portion may be provided in contact with the top of the convex portion. While FIG. 1 shows a configuration in which the convex portion is formed by processing a portion of substrate 81, a convex semiconductor may also be formed by processing an SOI (Silicon On Insulator) substrate.

[0070] 2B and 2C are cross-sectional views illustrating an example of the configuration of a transistor 80 in the channel length direction (the A1-A2 direction in FIG. 1), which is a variation of the transistor 80 illustrated in FIG. 1. The transistor 80 illustrated in FIG. 2B differs from the transistor 80 illustrated in FIG. 1 in that it is a planar transistor. The configuration illustrated in FIG. 2C also differs from the configuration illustrated in FIG. 1 in that an insulating layer 88 is provided on a substrate 81, and the transistor 80 is provided on the insulating layer 88.

[0071] The transistor 80 shown in FIG. 2C includes a semiconductor layer 87. The semiconductor layer 87 may be a thin film, such as a thin film containing silicon. Specifically, the semiconductor layer 87 may be a thin film containing amorphous silicon or low-temperature polysilicon. Alternatively, the semiconductor layer 87 may be a single-crystal silicon (SOI) layer formed on an insulating layer 88.

[0072] 1 function as interlayer films. The insulating layer 131, the insulating layer 133, the insulating layer 135, the insulating layer 137, the insulating layer 71, and the insulating layer 61 may also function as planarization layers that cover uneven shapes below the insulating layer 131, the insulating layer 133, the insulating layer 135, the insulating layer 137, the insulating layer 71, and the insulating layer 61.

[0073] The EL layer 23R, the EL layer 23G, and the EL layer 23B each include at least a light-emitting layer. The light-emitting layers can emit light of different colors. For example, the light-emitting layer of the EL layer 23R emits red light, the light-emitting layer of the EL layer 23G emits green light, and the light-emitting layer of the EL layer 23B emits blue light. The light-emitting layer of the EL layer 23R, the light-emitting layer of the EL layer 23G, and the light-emitting layer of the EL layer 23B may emit light of cyan, magenta, yellow, or the like. Although FIG. 1 shows three types of EL layers 23, the display device 10 may include four or more types of EL layers 23. For example, the display device 10 may include an EL layer 23 that emits white light in addition to the EL layer 23R that emits red light, the EL layer 23G that emits green light, and the EL layer 23B that emits blue light.

[0074] In this specification and the like, for example, light emitted by a light-emitting layer included in an EL layer may be simply referred to as light emitted by the EL layer.

[0075] A structure in which the EL layer 23R, the EL layer 23G, and the EL layer 23B each emit light of a different color is said to be an SBS (Side By Side) structure for the light-emitting element 20. By using an SBS structure for the light-emitting element 20, the power consumption of the display device 10 can be reduced compared to when all the EL layers 23 emit light of the same color.

[0076] A light-shielding layer 43 is provided at the boundary between adjacent pixels 50 and in the periphery thereof. This makes it possible to prevent light of different colors from mixing, thereby enabling the display device 10 to display a high-quality image. Note that, although the present embodiment has been described as an example of a configuration in which the light-shielding layer 43 is provided, the present invention is not limited to this, and a configuration in which the light-shielding layer 43 is not provided may also be used.

[0077] The protective layer 31 has regions in contact with the side surfaces of the light-emitting element 20R, the light-emitting element 20G, and the light-emitting element 20B. Specifically, the protective layer 31 has regions in contact with the side surfaces of the lower electrode 21, the side surfaces of the EL layer 23R, the side surfaces of the EL layer 23G, the side surfaces of the EL layer 23B, and the side surfaces of the upper electrode 25. The protective layer 31 is formed so as to cover the openings separating adjacent light-emitting elements 20. The protective layer 31 may be an insulating layer, and for example, a metal oxide film or a metal nitride film may be used. The metal oxide film may be, for example, a layer containing aluminum oxide or hafnium oxide. The metal nitride film may be, for example, a layer containing aluminum nitride or hafnium nitride.

[0078] The protective layer 31 is a layer that is difficult for impurities such as water and hydrogen to diffuse into. Alternatively, the protective layer 31 is a layer that can capture (also called gettering) impurities such as water and hydrogen. This can prevent impurities from entering the light-emitting element 20, specifically, for example, the EL layer 23. This can improve the reliability of the display device 10.

[0079] The protective layer 33 is formed on the protective layer 31. The protective layer 33 can be an insulating layer, and for example, an oxide, a nitride, or an oxynitride can be used. The oxide can be a layer containing silicon oxide, aluminum oxide, or hafnium oxide. The nitride can be a layer containing silicon nitride or aluminum nitride. The oxynitride can be a layer containing silicon oxynitride, silicon nitride oxide, aluminum oxynitride, or aluminum nitride oxide.

[0080] In this specification, silicon oxynitride refers to a material whose composition contains more oxygen than nitrogen, silicon nitride oxide refers to a material whose composition contains more nitrogen than oxygen, aluminum oxynitride refers to a material whose composition contains more oxygen than nitrogen, and aluminum nitride oxide refers to a material whose composition contains more nitrogen than oxygen.

[0081] The protective layer 33 may be a semiconductor layer, for example, a layer containing a metal oxide (also called IGZO) containing In, Ga, and Zn. Furthermore, the protective layer 33 may have a laminated structure of two or more layers. For example, it may have a laminated structure of an insulating layer and a semiconductor layer, or a laminated structure of a layer containing silicon nitride and a layer containing metal oxide. Specifically, the protective layer 33 may have a two-layer laminated structure, for example, a lower layer containing silicon nitride and an upper layer containing metal oxide.

[0082] When the above-mentioned IGZO is used for the protective layer 33, it can be processed using a wet etching method or a dry etching method. For example, when IGZO is used for the protective layer 33, a chemical solution such as oxalic acid, phosphoric acid, or a mixed chemical solution (for example, a mixed chemical solution of phosphoric acid, acetic acid, nitric acid, and water (also called a mixed acid aluminum etching solution)) can be used. The mixed acid aluminum etching solution can have a volume ratio of phosphoric acid:acetic acid:nitric acid:water of approximately 53.3:6.7:3.3:36.7.

[0083] The protective layer 33 is preferably a layer that is difficult for impurities such as water and hydrogen to diffuse into, or a layer that can capture (also called gettering) impurities such as water and hydrogen, similar to the protective layer 31. This can improve the reliability of the display device 10.

[0084] The protective layer 33 is preferably formed by a method that provides lower coverage than the protective layer 31. For example, the protective layer 31 is formed by atomic layer deposition (ALD) and the protective layer 33 is formed by sputtering or chemical vapor deposition (CVD). As a result, the openings separating adjacent light-emitting elements 20 are not covered by the protective layer 33, and gaps 30 are formed.

[0085] The shorter the distance between the lower electrodes 21, for example, in the x direction, the higher the aspect ratio of the opening (distance in the z direction / distance in the x direction), and therefore the easier it is to form the void 30. For example, when the distance in the x direction is 1 μm or less, preferably 500 nm or less, and more preferably 200 nm or less, 100 nm or less, 90 nm or less, 70 nm or less, 50 nm or less, 30 nm or less, 20 nm or less, 15 nm or less, or 10 nm, the void 30 can be suitably formed. In other words, the distance between the side surface of the EL layer 23R and the side surface of the EL layer 23G, or the distance between the side surface of the EL layer 23G and the side surface of the EL layer 23B has a region of 1 μm or less, preferably a region of 0.5 μm (500 nm), more preferably a region of 200 nm or less, or a region of 100 nm or less, and even more preferably a region of 90 nm or less.

[0086] The voids 30 contain, for example, one or more selected from air, nitrogen, oxygen, carbon dioxide, and Group 18 elements. The voids 30 may also contain, for example, a gas used when forming the protective layer 33. For example, when the protective layer 33 is formed by sputtering, the voids 30 may contain a Group 18 element (typically, helium, neon, argon, xenon, krypton, etc.). When the voids 30 contain a gas, the gas can be identified by, for example, gas chromatography. When the protective layer 33 is formed by sputtering, the gas used during sputtering may also be contained in the protective layer 33. In this case, when the protective layer 33 is analyzed by, for example, energy dispersive X-ray analysis (EDX analysis), elements such as argon may be detected.

[0087] When the refractive index of the void 30 is lower than the refractive index of the protective layer 31, light 51 emitted from the EL layer 23 and incident on the interface between the protective layer 31 and the void 30 is totally reflected. This prevents the light 51 from entering adjacent pixels 50. Specifically, for example, the light 51 emitted from the EL layer 23G can be prevented from entering the pixel 50R or the pixel 50B. This prevents light of different colors from mixing, allowing the display device 10 to display high-quality images.

[0088] Furthermore, when the refractive index of the adhesive layer 41 is lower than the refractive index of the microlenses included in the microlens array 35, the microlenses can condense the light emitted by the EL layer 23. This can prevent the light emitted by the EL layer 23 from entering the light-shielding layer 43 while suppressing color mixing of the light. Therefore, the display device 10 can display high-quality images while improving the light extraction efficiency of the display device 10. Therefore, a bright image can be viewed, particularly when a user of the display device 10 views the display surface of the display device 10 from directly in front of the display surface.

[0089] The following describes materials that can be used for the elements shown in FIG. 1, for example.

[0090] [substrate] There are no significant limitations on the materials used for the substrate 81 and the substrate 47. The materials may be determined depending on the purpose, taking into consideration the presence or absence of light transmission and the heat resistance sufficient to withstand heat treatment. For example, glass substrates such as barium borosilicate glass and aluminoborosilicate glass, ceramic substrates, quartz substrates, sapphire substrates, etc. may be used. Alternatively, semiconductor substrates, flexible substrates, laminated films, base films, etc. may also be used.

[0091] Examples of the semiconductor substrate include a semiconductor substrate made of silicon or germanium, or a compound semiconductor substrate made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. The semiconductor substrate may be a single-crystal semiconductor or a polycrystalline semiconductor.

[0092] In order to increase the flexibility of the display device 10, the substrate 81 and the substrate 47 may be made of a flexible substrate, a laminate film, a base film, or the like.

[0093] Examples of materials that can be used for the flexible substrate, lamination film, and base film include polyester resins such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN), polyacrylonitrile resin, acrylic resin, polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PES) resin, polyamide resin (nylon, aramid, etc.), polysiloxane resin, cycloolefin resin, polystyrene resin, polyamideimide resin, polyurethane resin, polyvinyl chloride resin, polyvinylidene chloride resin, polypropylene resin, polytetrafluoroethylene (PTFE) resin, ABS resin, or cellulose nanofiber.

[0094] By using the above materials for the substrate, a lightweight display device can be provided.Furthermore, by using the above materials for the substrate, a display device that is resistant to impact can be provided.Furthermore, by using the above materials for the substrate, a display device that is less likely to break can be provided.

[0095] The lower the linear expansion coefficient of the flexible substrate used for the substrate 81 and the substrate 47, the more preferable it is, since deformation due to the environment is suppressed. For example, the linear expansion coefficient of the flexible substrate used for the substrate 81 and the substrate 47 is 1×10 -3 / K or less, 5×10 -5 / K or less, or 1×10 -5 / K or less. Aramid is particularly preferable as a flexible substrate because it has a low linear expansion coefficient.

[0096] [Insulating layer] Each insulating layer is made of a single layer or a stack of layers of a material selected from aluminum nitride, aluminum oxide, aluminum nitride oxide, aluminum oxynitride, magnesium oxide, silicon nitride, silicon oxide, silicon nitride oxide, silicon oxynitride, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, aluminum silicate, etc. Alternatively, a mixture of two or more materials selected from oxide materials, nitride materials, oxynitride materials, and nitride oxide materials may be used.

[0097] In this specification, an oxynitride refers to a compound containing more nitrogen than oxygen. An oxynitride refers to a compound containing more oxygen than nitrogen. The content of each element can be measured, for example, by Rutherford backscattering spectrometry (RBS).

[0098] Alternatively, for example, the surface of the insulating layer may be subjected to CMP treatment, which reduces the unevenness of the sample surface and improves the coverage of the insulating layer and conductive layer to be formed subsequently.

[0099] [Conductive layer] Conductive materials that can be used for conductive layers such as the gate, source, and drain of a transistor, as well as various wirings, plugs, and electrodes that constitute a display device, include metal elements selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium (Hf), vanadium (V), niobium (Nb), manganese, magnesium, zirconium, and beryllium, alloys containing the above metal elements, and alloys combining the above metal elements. Semiconductors, such as polycrystalline silicon containing impurity elements such as phosphorus, and silicides, such as nickel silicide, may also be used. The method for forming the conductive material is not particularly limited, and various formation methods, such as vapor deposition, CVD, sputtering, and spin coating, may be used.

[0100] Examples of conductive materials that can be used for the conductive layer include conductive materials containing oxygen, such as indium tin oxide (ITO), indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, and indium tin oxide to which silicon oxide has been added. Also, conductive materials containing nitrogen, such as titanium nitride, tantalum nitride, and tungsten nitride, can be used. A layered structure can also be formed by appropriately combining conductive materials containing oxygen, conductive materials containing nitrogen, and materials containing the aforementioned metal elements.

[0101] The conductive material that can be used for the conductive layer may have a single-layer structure or a stacked structure of two or more layers. For example, there is a single-layer structure of an aluminum layer containing silicon, a two-layer structure in which a titanium layer is stacked on an aluminum layer, a two-layer structure in which a titanium layer is stacked on a titanium nitride layer, a two-layer structure in which a tungsten layer is stacked on a titanium nitride layer, a two-layer structure in which a tungsten layer is stacked on a tantalum nitride layer, or a three-layer structure in which a titanium layer is stacked on an aluminum layer and a titanium layer is further stacked on the titanium layer. Furthermore, an aluminum alloy containing one or more elements selected from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and scandium may be used as the conductive material.

[0102] When the light-emitting element 20 is a top-emission light-emitting element, the lower electrode 21 is preferably formed using a conductive material that efficiently reflects light emitted from the EL layer 23. The configuration of the lower electrode 21 is not limited to a single layer, and it may also have a stacked structure of multiple layers. For example, when the lower electrode 21 is used as an anode, a layer in contact with the EL layer 23 may be a light-transmitting layer such as indium tin oxide, and a highly reflective layer (such as aluminum, an alloy containing aluminum, or silver) may be provided in contact with that layer. Furthermore, by forming the upper electrode 25 using a light-transmitting conductive material, light emitted from the EL layer 23 can be efficiently extracted to the outside of the display device 10.

[0103] Examples of conductive materials that reflect visible light include metal materials such as aluminum, gold, platinum, silver, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, and palladium, as well as alloys containing these metal materials. Lanthanum, neodymium, germanium, and the like may be added to the above metal materials and / or alloys. Aluminum alloys (aluminum alloys) such as an aluminum-titanium alloy, an aluminum-nickel alloy, or an aluminum-neodymium alloy may also be used. Silver alloys such as a silver-copper alloy, a silver-palladium-copper alloy, or a silver-magnesium alloy may also be used. Silver-copper alloys are preferred because of their high heat resistance. Furthermore, a metal film or alloy film and a metal oxide film may be stacked. For example, stacking a metal film or metal oxide film in contact with an aluminum alloy film can suppress oxidation of the aluminum alloy film. Other examples of metal films and metal oxide films include titanium and titanium oxide. As described above, a light-transmitting conductive film and a film made of a metal material may be stacked. For example, a laminated film of silver and indium tin oxide, or a laminated film of an alloy of silver and magnesium and indium tin oxide can be used.

[0104] Examples of light-transmitting conductive materials include conductive oxides such as indium oxide, indium tin oxide, indium zinc oxide, zinc oxide, and zinc oxide doped with gallium, or graphene. Alternatively, oxide conductors can be used as light-transmitting conductive materials. Metal materials such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, and titanium, and alloy materials containing these metal materials can be used. Alternatively, nitrides of these metal materials (e.g., titanium nitride) can be used. When using metal materials or alloy materials (or their nitrides), they should be thin enough to have light-transmitting properties. A stacked film of the above materials can be used as a conductive layer. For example, a stacked film of an alloy of silver and magnesium and indium tin oxide is preferable because it can enhance conductivity. These can also be used for conductive layers such as various wirings and electrodes constituting a display device, and conductive layers (conductive layers functioning as a lower electrode or an upper electrode) of light-emitting elements.

[0105] Here, an oxide conductor, which is a type of metal oxide, will be described. In this specification and the like, an oxide conductor may be referred to as an OC (Oxide Conductor). For example, an oxide conductor can be formed by forming oxygen vacancies in a metal oxide (typically IGZO) that is an oxide containing at least indium or zinc, and adding hydrogen to the oxygen vacancies to form donor levels near the conduction band. As a result, the metal oxide becomes highly conductive and becomes a conductor. A metal oxide that has become a conductor can be called an oxide conductor. In general, metal oxides that function as semiconductors (oxide semiconductors) have a large energy gap and are therefore transparent to visible light. On the other hand, an oxide conductor is a metal oxide that has a donor level near the conduction band. Therefore, an oxide conductor is less affected by absorption due to the donor level and has the same level of transparency to visible light as an oxide semiconductor.

[0106] [EL layer] As described above, the EL layer 23 includes at least a light-emitting layer. The EL layer 23 may also include a layer other than the light-emitting layer, such as a layer containing a substance with high hole-injection properties, a substance with high hole-transport properties, a hole-blocking material, a substance with high electron-transport properties, a substance with high electron-injection properties, or a bipolar substance (a substance with high electron-transport properties and high hole-transport properties).

[0107] Either a low molecular weight compound or a high molecular weight compound can be used for the EL layer 23. The layers constituting the EL layer 23 can be formed using a method such as a vapor deposition method (including a vacuum deposition method), a transfer method, a printing method, or a coating method.

[0108] The EL layer 23 may contain an inorganic compound such as quantum dots. For example, quantum dots can be used in the light-emitting layer to function as a light-emitting material.

[0109] [Adhesive layer] The adhesive layer 41 can be made of various curable adhesives, such as a photo-curable adhesive (e.g., an ultraviolet curable adhesive), a reactive curable adhesive, a thermosetting adhesive, or an anaerobic adhesive. Examples of such adhesives include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin. In particular, a material with low moisture permeability, such as epoxy resin, is preferable. Alternatively, a two-component resin may be used. Alternatively, an adhesive sheet may be used.

[0110] [Light blocking layer] Materials that can be used for the light-shielding layer include carbon black, titanium black, metals, metal oxides, and composite oxides containing solid solutions of multiple metal oxides. The light-shielding layer may be a film containing a resin material or a thin film of an inorganic material such as a metal. The light-shielding layer may also be a laminated film of films containing the material of the colored layer. For example, a laminated structure may be used in which a film containing the material used for a colored layer that transmits light of one color and a film containing the material used for a colored layer that transmits light of another color. Using a common material for the colored layer and the light-shielding layer is preferred because it allows for the use of common equipment and simplifies the process.

[0111] Fig. 3 is a cross-sectional view showing an example of the configuration of display device 10, which is a modified example of display device 10 shown in Fig. 1. Display device 10 shown in Fig. 3 differs from the display device shown in Fig. 1 in that layer 123 is provided between layer 121 and layer 125.

[0112] The layer 123 includes a transistor 70. The transistor 70 is provided in each of the pixels 50R, 50G, and 50B. In the display device 10 shown in FIG. 3 , one of the source and the drain of the transistor 70 is electrically connected to the lower electrode 21 of the light-emitting element 20R, the lower electrode 21 of the light-emitting element 20G, or the lower electrode 21 of the light-emitting element 20B via the conductive layer 63 and the conductive layer 65.

[0113] The transistor 70 can be a transistor having a metal oxide in a channel formation region (OS transistor). The metal oxide of the OS transistor preferably contains at least indium or zinc. In particular, it preferably contains indium and zinc. Furthermore, it preferably contains aluminum, gallium, yttrium, tin, or the like in addition to these. Furthermore, the metal oxide may contain one or more elements selected from the group consisting of boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt, and the like.

[0114] Fig. 4A is a schematic top view in the xy direction of the display device 10. Fig. 4A shows the light-emitting element 20R, the light-emitting element 20G, and the light-emitting element 20B, and the gap 30. Fig. 1 is a cross-sectional view corresponding to the dashed dotted line A1-A2 in Fig. 4A.

[0115] In the configuration shown in FIG. 4A, the light-emitting elements 20R, 20G, and 20B are sequentially arranged in the x direction. Meanwhile, the light-emitting elements 20 emitting the same color are arranged in the y direction. Here, even if light of the same color mixes, it does not significantly affect the quality of the image displayed on the display device 10. Therefore, as shown in FIG. 4A, a configuration can be adopted in which no gap 30 is provided between the light-emitting elements 20 emitting the same color. In other words, a configuration can be adopted in which the gap 30 is provided in the direction extending in the y direction, but no gap 30 is provided in the direction extending in the x direction. In the configuration shown in FIG. 4A, the length of the gap 30 in the x direction is not particularly limited. For example, the length of the gap 30 in the x direction can be shorter than the length of the light-emitting element 20 in the x direction. The same applies to the structures described below.

[0116] Fig. 4B is a modified example of Fig. 4A, and differs from the configuration shown in Fig. 4A in that gaps 30 are provided not only between light-emitting elements 20 emitting light of different colors but also between light-emitting elements 20 emitting light of the same color. That is, in the configuration shown in Fig. 4B, gaps 30 are provided not only in the direction extending in the y direction but also in the direction extending in the x direction. Note that, although the gaps 30 extending in the y direction and the gaps 30 extending in the x direction are connected in Fig. 4B, they do not have to be connected.

[0117] The arrangement of the gap 30 is not limited to the configuration shown in Fig. 4A or 4B. For example, a configuration may be adopted in which an independent gap 30 is provided between each two adjacent light emitting elements 20R.

[0118] Fig. 5 is a perspective view showing an example of the configuration of the display device 10 shown in Fig. 1. As shown in Fig. 5, a layer 121 is provided on a layer 125, and a microlens array 35 is provided on the layer 121. In addition, a gap 30 is provided between adjacent pixels 50.

[0119] Fig. 6 is a perspective view showing an example of the configuration of the display device 10 shown in Fig. 3. As shown in Fig. 6, a layer 123 is provided on a layer 125, a layer 121 is provided on the layer 123, and a microlens array 35 is provided on the layer 121. In addition, a gap 30 is provided between adjacent pixels 50.

[0120] <Example of a display device manufacturing method_1> An example of a method for manufacturing the display device 10 shown in FIG. 1 will be described below with reference to the drawings.

[0121] The insulating layers, semiconductor layers, and conductive layers for forming electrodes and wiring that constitute the display device can be formed using a sputtering method, a CVD method, a vacuum evaporation method, a pulsed laser deposition (PLD) method, an ALD method, a plasma enhanced ALD (PEALD) method, or the like. The CVD method may be a plasma enhanced chemical vapor deposition (PECVD) method or a thermal CVD method. An example of a thermal CVD method is a metal organic chemical vapor deposition (MOCVD) method.

[0122] Furthermore, insulating layers, semiconductor layers, and conductive layers for forming electrodes and wiring that constitute the display device may be formed by methods such as spin coating, dipping, spray coating, inkjet printing, dispensing, screen printing, offset printing, slit coating, roll coating, curtain coating, and knife coating.

[0123] The PECVD method can produce high-quality films at relatively low temperatures. When using a film formation method that does not use plasma during film formation, such as the MOCVD method, the ALD method, or the thermal CVD method, damage to the surface on which the film is formed is less likely to occur. For example, wiring, electrodes, or elements (transistors, capacitors, etc.) included in a semiconductor device may become charged up by receiving electric charge from the plasma. In this case, the accumulated electric charge may destroy the wiring, electrodes, or elements included in the semiconductor device. On the other hand, film formation methods that do not use plasma do not cause such plasma damage, thereby increasing the yield of semiconductor devices. Furthermore, since plasma damage does not occur during film formation, films with fewer defects can be obtained.

[0124] When forming an oxide semiconductor by sputtering, the chamber of the sputtering device is evacuated to a high vacuum (5×10) using an adsorption-type vacuum pump such as a cryopump to remove as much water as possible, which is an impurity in the oxide semiconductor. -7 Pa to 1 x 10 -4 In particular, when the sputtering device is in standby mode, it is preferable to evacuate the chamber to a partial pressure of 1×10 Pa or less for gas molecules equivalent to HO (gas molecules equivalent to m / z=18). -4 Pa or less, and 5×10 -5 The film formation temperature is preferably RT (room temperature) or higher and 500°C or lower, more preferably RT or higher and 300°C or lower, and even more preferably RT or higher and 200°C or lower.

[0125] In addition, the sputtering gas must be highly purified. For example, oxygen gas and argon gas used as sputtering gases are highly purified to have a dew point of −40° C. or lower, preferably −80° C. or lower, more preferably −100° C. or lower, and even more preferably −120° C. or lower, so that moisture and the like can be prevented from being introduced into the oxide semiconductor film as much as possible.

[0126] When an insulating layer, a conductive layer, a semiconductor layer, or the like is formed by sputtering, oxygen can be supplied to the layer to be formed by using a sputtering gas containing oxygen. The more oxygen contained in the sputtering gas, the more oxygen is likely to be supplied to the layer to be formed.

[0127] The layers (thin films) constituting the display device can be processed using, for example, photolithography. Alternatively, island-shaped layers may be formed by a film formation method using a masking mask. Alternatively, the layers may be processed by nanoimprinting, sandblasting, lift-off, or the like. Photolithography includes a method in which a resist mask is formed on the layer (thin film) to be processed, and a portion of the layer (thin film) is selectively removed using the resist mask, and then the resist mask is removed; and a method in which a photosensitive layer is formed, and then the layer is exposed to light and developed to be processed into a desired shape.

[0128] When light is used in photolithography, the light used for exposure may be, for example, i-line (wavelength 365 nm), g-line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture of these. Other light sources that can be used include ultraviolet light, KrF laser light, and ArF laser light. Exposure may also be performed by immersion exposure technology. Extreme ultraviolet light (EUV) or X-rays may also be used as the light used for exposure. An electron beam may also be used instead of light used for exposure. Extreme ultraviolet light, X-rays, or an electron beam are preferred because they enable extremely fine processing. When exposure is performed by scanning a beam such as an electron beam, a photomask is not required.

[0129] The layer (thin film) can be removed (etched) by dry etching or wet etching, or by a combination of these etching methods.

[0130] 1, an element isolation layer 86, a transistor 80, insulating layers 131, 133, 135, and 137 are first formed over a substrate 81, and a conductive layer 67 is then formed to be electrically connected to the transistor 80. Next, an insulating layer 71 is formed over the conductive layer 67 and the insulating layer 137. After that, an opening that reaches the conductive layer 67 is formed in the insulating layer 71, and a conductive layer 69 is formed in the opening. Note that when the display device 10 shown in FIG. 3 is manufactured, the transistor 70 is formed over the insulating layer 71.

[0131] Next, the conductive layer 63 is formed so as to be electrically connected to the transistor 80. Note that in the case of manufacturing the display device 10 shown in FIG. 3, the conductive layer 63 is formed so as to be electrically connected to the transistor 70.

[0132] Thereafter, an insulating layer 61 is formed. Next, an opening reaching the conductive layer 63 is formed in the insulating layer 61, and a conductive layer 65 is formed in the opening (FIG. 7A). Note that layers below the insulating layer 61 are omitted in FIG. 7A. The same applies to other drawings showing examples of the method for manufacturing the display device 10.

[0133] Thereafter, light-emitting elements 20R, 20G, and 20B are formed (FIG. 7B). Preferably, EL layers 23R, 23G, and 23B are formed without using a metal mask, specifically, a fine metal mask. For example, after forming the layer that will become lower electrode 21, the layer that will become EL layer 23, and the layer that will become upper electrode 25, a resist mask is formed, and these layers are etched and then removed. This allows the lower electrode 21, EL layer 23, and upper electrode 25 to be individually formed for each light-emitting element 20. Forming the EL layer 23 without using a fine metal mask can improve the productivity of the display device 10. Furthermore, by forming the layer that will become lower electrode 21, the layer that will become EL layer 23, and the layer that will become upper electrode 25, a resist mask is formed, and these layers are collectively etched, thereby reducing manufacturing costs. By carrying out this process, the positions of the side surfaces of the lower electrode 21, the EL layer 23, and the upper electrode 25 are formed at approximately the same positions in a top view. However, due to the etching conditions, the EL layer 23 may be formed at a position inside the lower electrode 21 and the upper electrode 25 in a top view.

[0134] Furthermore, when the light-emitting elements 20 are formed using a fine metal mask, it is difficult to make the distance between the light-emitting elements 20 20 μm or less due to constraints on dimensional accuracy. According to one embodiment of the present invention, the distance between adjacent light-emitting elements 20 can be made 20 μm or less. Specifically, the distance between adjacent light-emitting elements 20 can be made 0.5 μm or more and 15 μm or less, preferably 0.5 μm or more and 10 μm or less, and more preferably 0.5 μm or more and 5 μm or less. This makes it possible to achieve an improved pixel aperture ratio, higher definition, and smaller size.

[0135] When the distance between the light-emitting elements 20 is set to 100 nm or less, typically 90 nm or less, an optimal exposure device must be used. Examples of the exposure device that can be used include a stepper and a scanner. Examples of wavelengths of the light source that can be used in the exposure device include 13 nm (EUV: Extreme Ultra Violet), 157 nm (F2), 193 nm (ArF), 248 nm (KrF), 308 nm (XeCl), 365 nm (i-line), and 436 nm (g-line). By using a light source with a short wavelength, a display device with high definition or finer detail can be obtained.

[0136] Next, the protective layer 31 is formed (FIG. 7C). The protective layer 31 is formed using a film formation method with high coverage. For example, the protective layer 31 is formed using the ALD method. As a result, the protective layer 31 is formed so as to cover the openings separating adjacent light-emitting elements 20. In other words, the protective layer 31 is formed so as to have regions in contact with the side surfaces of the upper electrode 25, the EL layer 23, the lower electrode 21, and the top surface of the insulating layer 61 in the openings. As described above, the protective layer 31 can be an insulating layer containing, for example, aluminum oxide.

[0137] Thereafter, the protective layer 33 is formed (FIG. 7D). The protective layer 33 is formed by a method that provides lower coverage than the protective layer 31. For example, the protective layer 33 is formed using a sputtering method or a CVD method. As a result, the openings separating adjacent light-emitting elements 20 are not covered by the protective layer 33, and gaps 30 are formed. In particular, when the protective layer 33 is formed using the PECVD method, the film can be formed at a low temperature, specifically, for example, at 100°C or below or at room temperature, which is preferable because it can suppress thermal degradation of the EL layer 23. As described above, the protective layer 33 can have a laminated structure of, for example, a layer containing silicon nitride and a layer containing a metal oxide containing In, Ga, and Zn.

[0138] Next, the microlens array 35 is formed (FIG. 7E). The microlens array 35 can be formed by forming a resist pattern by, for example, photolithography, and then heating the substrate 81 to reflow the resist.

[0139] Thereafter, a substrate 47 is prepared, an insulating layer 45 is formed on the substrate 47, and a light-shielding layer 43 is formed on the insulating layer 45. Next, an adhesive layer 41 is formed on the insulating layer 45 and the light-shielding layer 43, and the microlens array 35 is bonded to the insulating layer 45 and the light-shielding layer 43 by the adhesive layer 41. The adhesive layer 41 can be formed by a screen printing method, a dispensing method, or the like. In this manner, the display device 10 shown in FIG. 1 can be fabricated.

[0140] <Display device configuration example 2> Fig. 8 is a cross-sectional view showing an example of the configuration of a display device 10, which is a modified example of the display device 10 shown in Fig. 1. The display device 10 shown in Fig. 8 differs from the display device 10 shown in Fig. 1 in that the length (height) in the z direction of the insulating layer 61 in the region where it contacts the protective layer 31 is shorter than the length (height) in the z direction of the insulating layer 61 in the region where it contacts the lower electrode 21. In the display device 10 shown in Fig. 8, in the opening separating adjacent light-emitting elements 20, the protective layer 31 has a region in contact with not only a portion of the top surface of the insulating layer 61 but also a region in contact with the side surface of the insulating layer 61.

[0141] 9 is a cross-sectional view illustrating a configuration example of a display device 10, which is a variation of the display device 10 illustrated in FIG. 8. The display device 10 illustrated in FIG. 9 differs from the display device 10 illustrated in FIG. 8 in that it includes a transistor 70 that can be, for example, an OS transistor.

[0142] FIG. 10 is a cross-sectional view showing an example of the configuration of a display device 10, which is a modification of the display device 10 shown in FIG. 1. The display device 10 shown in FIG. 10 differs from the display device 10 shown in FIG. 1 in that it does not have a microlens array 35. Since the display device 10 does not have a microlens array 35, the manufacturing process of the display device 10 can be simplified. This reduces the manufacturing cost of the display device 10 and increases the yield. As a result, the price of the display device 10 can be reduced.

[0143] Fig. 11 is a cross-sectional view showing an example of the configuration of a display device 10, which is a modification of the display device 10 shown in Fig. 1. The display device 10 shown in Fig. 11 differs from the display device 10 shown in Fig. 1 in that a partition wall 37 is provided on an insulating layer 61. The partition wall 37 can be, for example, an insulating layer.

[0144] The partitions 37 are provided between adjacent pixels 50 so as to cover the edges of the lower electrodes 21. In the display device 10 shown in FIG. 11 , the EL layers 23 are provided on the lower electrodes 21 and on the partitions 37. The protective layer 31 is provided on the light-emitting elements 20 and on the partitions 37. The provision of the partitions 37 can prevent electrical short circuits that may occur between the EL layers 23. On the other hand, a configuration without the partitions 37 can achieve a higher aperture ratio. For example, in a configuration without the partitions 37, the aperture ratio of the pixel can be set to 70% or more, preferably 80% or more, and more preferably 90% or more.

[0145] Fig. 12 is a cross-sectional view illustrating a configuration example of a display device 10, which is a variation of the display device 10 illustrated in Fig. 11. The display device 10 illustrated in Fig. 12 differs from the display device 10 illustrated in Fig. 11 in that it includes a transistor 70 that can be, for example, an OS transistor.

[0146] Fig. 13 is a cross-sectional view showing an example of the configuration of display device 10, which is a modified example of display device 10 shown in Fig. 1. Display device 10 shown in Fig. 13 differs from display device 10 shown in Fig. 1 in that it does not have protective layer 33 but has insulating layer 38.

[0147] The insulating layer is provided on the protective layer 31. The gap 30 is provided so as to contact not only the side surface of the protective layer 31 but also the side surface of the insulating layer .

[0148] 13, the height (length in the z direction) of the gap 30 can be increased by thickening the insulating layer 38. Increasing the height of the gap 30 can prevent light 51 emitted from the EL layer 23 from entering adjacent pixels 50. This prevents light of different colors from mixing, allowing the display device 10 to display high-quality images.

[0149] The thickness of the insulating layer 38 on the light-emitting element 20 is preferably, for example, at least 1 time, preferably at least 2 times, preferably at least 3 times, preferably at least 4 times, preferably at least 5 times, preferably at least 6 times, preferably at least 10 times, more ... For example, if the maximum sum of the thickness of the lower electrode 21, the thickness of the EL layer 23, and the thickness of the upper electrode 25 is 300 nm, the minimum thickness of the insulating layer 38 on the light-emitting element 20 is preferably 300 nm or more, preferably 1000 nm or more, preferably 1500 nm or more, preferably 1800 nm or more, and preferably 2000 nm or more.

[0150] To form the void 30 shown in FIG. 13 , first, the insulating layer 38 is formed after the protective layer 31 is formed. This forms the void 30 in a region of the void 30 that contacts the side surface of the protective layer 31. Next, an opening reaching the void 30 is formed in the insulating layer 38. This opening can be formed using, for example, photolithography and etching. By forming the opening in the insulating layer 38, the void 30 in a region of the void 30 that contacts the side surface of the insulating layer 38 is formed. This makes it possible to form the void 30 that has not only a region that contacts the side surface of the protective layer 31 but also a region that contacts the side surface of the insulating layer 38. Note that the void 30 in the region that contacts the side surface of the protective layer 31 is referred to as void 30a, and the void 30 in the region that contacts the side surface of the insulating layer 38 is referred to as void 30b.

[0151] Here, when the insulating layer 38 is formed, the insulating layer 38 may get inside the void 30. Even in such a case, when forming an opening in the insulating layer 38, the insulating layer 38 included in the void 30 in the region that contacts the side surface of the protective layer 31 can be removed. Therefore, it is possible to prevent the void 30 in the region that contacts the side surface of the protective layer 31 from being blocked by the insulating layer 38.

[0152] The insulating layer 38 may contain a resin. For example, the insulating layer 38 may contain one or more of acrylic resin, polyimide resin, epoxy resin, polyamide resin, polyimideamide resin, siloxane resin, benzocyclobutene-based resin, phenolic resin, novolac resin, and precursors of these resins. When the insulating layer 38 contains a resin, the insulating layer 38 may be formed using, for example, spin coating, dipping, spray coating, inkjet printing, dispensing, screen printing, offset printing, doctor knife, slit coating, roll coating, curtain coating, or knife coating. The insulating layer 38 preferably contains a resin because it can be thickened. The insulating layer 38 may contain the same material as the protective layer 33. In this case, the insulating layer 38 may be formed using the same film formation method as the protective layer 33.

[0153] Fig. 14 is a cross-sectional view illustrating a configuration example of a display device 10, which is a variation of the display device 10 illustrated in Fig. 13. The display device 10 illustrated in Fig. 14 differs from the display device 10 illustrated in Fig. 13 in that it includes a transistor 70 that can be, for example, an OS transistor.

[0154] Fig. 15 is a cross-sectional view showing an example of the configuration of the display device 10, which is a modified example of the display device 10 shown in Fig. 13. The display device 10 shown in Fig. 15 differs from the display device 10 shown in Fig. 13 in that a colored layer 49R is provided in the pixel 50R, a colored layer 49G is provided in the pixel 50G, and a colored layer 49B is provided in the pixel 50B.

[0155] The colored layer 49 is provided on the protective layer 31. Furthermore, the insulating layer 38 is provided on the colored layer 49. In the display device 10 shown in Fig. 15, the insulating layer 38 is formed after the colored layer 49 is formed.

[0156] The coloring layer 49 can change the hue of light that passes through it. For example, the hue of light that passes through the coloring layer 49R can be red, the hue of light that passes through the coloring layer 49G can be green, and the hue of light that passes through the coloring layer 49B can be blue. Note that the coloring layer 49 may change the hue of the light that passes through it to cyan, magenta, yellow, or the like.

[0157] By providing the colored layer 49 in the display device 10, it is not necessary to create EL layers 23 for each color. For example, all of the EL layers 23 can be layers that emit white light. This simplifies the manufacturing process of the display device 10. This reduces the manufacturing cost of the display device 10 and increases the yield. As a result, the price of the display device 10 can be reduced. Note that when all of the EL layers 23 are layers that emit white light, for example, the EL layers 23 can have a tandem structure (stack structure), for example. For example, by forming the EL layer 23 into a stacked structure of a layer that emits yellow light and a layer that emits blue light, the EL layer 23 can emit white light.

[0158] Materials that can be used for the colored layer 49 include metal materials, resin materials, and resin materials containing pigments or dyes.

[0159] Fig. 16 is a cross-sectional view illustrating a configuration example of a display device 10, which is a variation of the display device 10 illustrated in Fig. 15. The display device 10 illustrated in Fig. 16 differs from the display device 10 illustrated in Fig. 15 in that it includes a transistor 70 that can be, for example, an OS transistor.

[0160] Fig. 17 is a cross-sectional view showing an example of the configuration of display device 10, which is a modified example of display device 10 shown in Fig. 13. Display device 10 shown in Fig. 17 differs from display device 10 shown in Fig. 13 in that a protective layer 39 is provided on insulating layer 38.

[0161] The protective layer 39 can be made of the same material as the protective layer 33. Similarly to the protective layer 33, the protective layer 39 is preferably formed by, for example, a sputtering method or a CVD method. As described above, the coverage of a film formed by a sputtering method or a CVD method is lower than the coverage of a film formed by, for example, an ALD method. Therefore, the voids 30 can be prevented from being covered by the protective layer 39.

[0162] By providing the protective layer 39 on the insulating layer 38, it is possible to prevent the microlens array 35 or the adhesive layer 41 from entering the gap 30. Therefore, it can be said that the protective layer 39 protects the light emitting element 20.

[0163] <Display device configuration example 3> Fig. 18A is a perspective view showing an example of the configuration of the display device 10. Fig. 18B is a cross-sectional view in the x direction showing the example of the configuration of the display device 10. Fig. 18C is a cross-sectional view in the y direction showing the example of the configuration of the display device 10.

[0164] 18A shows only the lower electrode 21, the EL layer 23, and the upper electrode 25 of the light-emitting element 20, and omits other elements. 18B and 18C omit the layers below the insulating layer 61, but the layers below the insulating layer 61 may have the same configuration as that shown in FIG. 1, etc. 18B and 18C omit the conductive layers 63 and 65, but the conductive layers 63 and 65 may be formed inside the insulating layer 61, for example.

[0165] 18A to 18C has a protective layer 32, a protective layer 36, and a colored layer 49 (colored layer 49R, colored layer 49G, and colored layer 49B) in addition to the elements shown in FIG. 1. In addition, in the display device 10 shown in FIGS. 18A to 18C, the protective layer 32 is provided on the EL layer 23. Furthermore, an upper electrode 25 is provided on the protective layer 32 and the protective layer 36, and a protective layer 31 is provided on the upper electrode 25. The colored layer 49 is provided between the light-shielding layers 43.

[0166] As described above, by providing the colored layer 49 in the display device 10, it is not necessary to create separate EL layers 23 for each color. For example, all of the EL layers 23 can be layers that emit white light. This simplifies the manufacturing process of the display device 10. This reduces the manufacturing cost of the display device 10 and increases the yield. As a result, the price of the display device 10 can be reduced.

[0167] The protective layer 32 is preferably a layer that does not easily diffuse impurities such as water and hydrogen, or a layer that can capture (also called getter) impurities such as water and hydrogen, similar to the protective layer 31. This can improve the reliability of the display device 10.

[0168] Here, by making the protective layer 32 sufficiently thin, even if the protective layer 32 is an insulating layer, the upper electrode 25 and the EL layer 23 can be electrically connected to each other. For example, by making the thickness of the protective layer 32 5 nm or less, 3 nm or less, or 1 nm or less, even if the protective layer 32 is an insulating layer, the upper electrode 25 and the EL layer 23 can be electrically connected to each other.

[0169] The protective layer 32 may have the same material as the protective layer 31 and may be formed using the same film formation method as the protective layer 31. That is, the protective layer 32 may be a layer having aluminum oxide formed by, for example, an ALD method. The protective layer 36 may have the same material as the protective layer 33 and may be formed using the same film formation method as the protective layer 33. That is, the protective layer 36 may be a layer having silicon nitride formed by, for example, a sputtering method.

[0170] As shown in FIG. 18B , when viewed in a cross section in the x direction, the protective layer 31 has regions in contact with the side surfaces of the lower electrode 21, the EL layer 23, the protective layer 32, and the upper electrode 25. A gap 30 is provided between the protective layer 31 and the protective layer 33. On the other hand, as shown in FIG. 18C , when viewed in a cross section in the y direction, the protective layer 32 has regions in contact with the side surfaces of the lower electrode 21, the EL layer 23, and the protective layer 36. A gap 30 is provided between the protective layer 32 and the protective layer 36. Here, by providing the protective layer 36, it is possible to prevent the upper electrode 25 from entering the opening separating adjacent light-emitting elements 20. Therefore, it can be said that the protective layer 36 protects the light-emitting elements 20.

[0171] 18A to 18C, different upper electrodes 25 are used among the light-emitting elements 20 arranged in the x direction, while a common upper electrode is used among the light-emitting elements 20 arranged in the y direction.

[0172] <Example of a display device manufacturing method_2> An example of a method for manufacturing the display device 10 shown in FIGS. 18A to 18C will be described below with reference to the drawings.

[0173] First, a layer to become the lower electrode 21 and a layer to become the EL layer 23 are formed on the insulating layer 61. Next, these layers are processed using, for example, photolithography and etching. The layer to become the EL layer 23 is processed to form the layer 23A, and the layer to become the lower electrode 21 is processed to form the layer 21A (FIGS. 19A to 19C). As shown in FIGS. 19A to 19C, the layer 21A and the layer 23A have openings extending in the x-direction.

[0174] Next, a layer 32A that will become the protective layer 32 is formed (FIGS. 20A1 and 20A2). The layer 32A is formed using a film formation method with high coverage. For example, the layer 32A is formed using the ALD method. As a result, the layer 32A is formed so as to cover the opening that separates adjacent light-emitting elements 20 in the y direction. In other words, the layer 32A is formed so as to have regions in contact with the side surfaces of the layer 21A, the side surfaces of the layer 23A, and the upper surface of the insulating layer 61 in the opening. The layer 32A can be, for example, an insulating layer containing aluminum oxide.

[0175] Thereafter, a layer 36A that will become the protective layer 36 is formed (FIGS. 20B1 and 20B2). The layer 36A is formed by a method that provides lower coverage than the layer 32A. For example, the layer 36A is formed using a sputtering method or a CVD method. As a result, the openings that separate adjacent light-emitting elements 20 are not covered by the layer 36A, and gaps 30 are formed.

[0176] Next, the layer 36A on the layer 32A is processed. For example, the layer 36A is etched using the layer 32A as an etching stopper. This forms the protective layer 36 (FIGS. 20C1 and 20C2).

[0177] Thereafter, layer 25A, which will become upper electrode 25, is formed (FIGS. 21A to 21C). Next, layer 25A, layer 32A, layer 23A, and layer 21A are processed using, for example, photolithography and etching. Upper electrode 25 is formed by processing layer 25A, protective layer 32 is formed by processing layer 32A, EL layer 23 is formed by processing layer 23A, and lower electrode 21 is formed by processing layer 21A (FIGS. 22A to 22C). In the steps shown in FIGS. 22A to 22C, an opening extending in the y direction is formed.

[0178] 19A to 19C, openings extending in the x direction are formed, and openings extending in the y direction are formed in the steps shown in Figures 22A to 22C. In this way, the light emitting element 20 is formed.

[0179] By forming the light emitting element 20 by the method described above, the EL layer 23 can be formed without using a fine metal mask, thereby improving the productivity of the display device 10.

[0180] Next, a protective layer 31 is formed (FIGS. 23A1 and 23A2). After that, a protective layer 33 is formed (FIGS. 23B1 and 23B2). The openings separating adjacent light-emitting elements 20 are not covered by the protective layer 33, and gaps 30 are formed.

[0181] Next, the microlens array 35 is formed. Thereafter, a substrate 47 is prepared, an insulating layer 45 is formed on the substrate 47, and a light-shielding layer 43 and a colored layer 49 are formed on the insulating layer 45. Next, an adhesive layer 41 is formed on the colored layer 49 and the light-shielding layer 43, and the microlens array 35, the colored layer 49, and the light-shielding layer 43 are bonded together by the adhesive layer 41. In this manner, the display device 10 shown in FIGS. 18A to 18C can be fabricated.

[0182] <Display device configuration example 4> FIG. 24A is a perspective view showing an example of the configuration of the display device 10. FIG. 24B is a cross-sectional view in the x direction showing an example of the configuration of the display device 10. FIG. 24C is a cross-sectional view in the y direction showing an example of the configuration of the display device 10. The display device 10 shown in FIGS. 24A to 24C is a modified example of the display device 10 shown in FIGS. 18A to 18C. The display device 10 shown in FIGS. 24A to 24C differs from the display device 10 shown in FIGS. 18A to 18C in that a common upper electrode 25 is used not only between the light-emitting elements 20 arranged in the y direction but also between the light-emitting elements 20 arranged in the x direction. In other words, in the display device 10 shown in FIGS. 24A to 24C, the upper electrode 25 can be said to be a common electrode.

[0183] 24A to 24C does not have protective layer 31 or protective layer 33, but has protective layer 34. Protective layer 34 is provided on upper electrode 25. A microlens array 35 is provided on protective layer 34. Protective layer 34 may have the same material as protective layer 31 or protective layer 33, and may be formed using the same film formation method as protective layer 31 or protective layer 33. Protective layer 34 may have a laminated structure of a layer corresponding to protective layer 31 and a layer corresponding to protective layer 33.

[0184] 24B, when viewed from the cross section in the x direction, as when viewed from the cross section in the y direction, the protective layer 32 has regions in contact with the side surfaces of the lower electrode 21, the EL layer 23, and the protective layer 36. A gap 30 is provided between the protective layer 32 and the protective layer 36.

[0185] <Example of a display device manufacturing method_3> An example of a method for manufacturing the display device 10 shown in FIGS. 24A to 24C will be described below with reference to the drawings.

[0186] First, a layer to become the lower electrode 21 and a layer to become the EL layer 23 are formed on the insulating layer 61. Next, these layers are processed using, for example, photolithography and etching. The EL layer 23 is formed by processing the layer to become the EL layer 23, and the lower electrode 21 is formed by processing the layer to become the lower electrode 21 (FIGS. 25A to 25C). As shown in FIGS. 25A to 25C, the lower electrode 21 and the EL layer 23 have openings extending in the x and y directions.

[0187] By forming the EL layer 23 by the method described above, it is possible to form the EL layer 23 without using a fine metal mask, thereby improving the productivity of the display device 10.

[0188] Thereafter, the protective layer 32 is formed (FIGS. 26A1 and 26A2). The protective layer 32 is formed using a film formation method with high coverage. For example, the protective layer 32 is formed using the ALD method. As a result, the protective layer 32 is formed so as to cover the openings separating adjacent light-emitting elements 20. In other words, the protective layer 32 is formed so as to have regions in contact with the side surfaces of the lower electrode 21, the side surfaces of the EL layer 23, and the upper surface of the insulating layer 61 in the openings. The protective layer 32 can be, for example, an insulating layer containing aluminum oxide.

[0189] Next, a layer 36A that will become the protective layer 36 is deposited (FIGS. 26B1 and 26B2). As described above, the layer 36A is deposited by a method that provides lower coverage than the protective layer 32. For example, the layer 36A is formed using a sputtering method or a CVD method. As a result, the openings that separate adjacent light-emitting elements 20 are not covered by the layer 36A, and gaps 30 are formed.

[0190] Thereafter, the layer 36A on the protective layer 32 is processed. For example, the layer 36A is etched using the protective layer 32 as an etching stopper. This forms the protective layer 36 (FIGS. 26C1 and 26C2).

[0191] Next, the upper electrode 25 is formed. After that, the protective layer 34 is formed (FIGS. 27A to 27C). The protective layer 34 can be formed using the ALD method or the sputtering method. The protective layer 34 can also have a laminated structure of a layer formed by the ALD method and a layer formed by the sputtering method.

[0192] Thereafter, the microlens array 35 is formed. Next, a substrate 47 is prepared, an insulating layer 45 is formed on the substrate 47, and a light-shielding layer 43 and a colored layer 49 are formed on the insulating layer 45. Thereafter, an adhesive layer 41 is formed on the colored layer 49 and the light-shielding layer 43, and the microlens array 35, the colored layer 49, and the light-shielding layer 43 are bonded together by the adhesive layer 41. In this manner, the display device 10 shown in FIGS. 24A to 24C can be fabricated.

[0193] <Display device configuration example 5> FIG. 28 is a cross-sectional view showing an example of the configuration of the display device 10, and in addition to the configuration shown in FIG. 1, shows a sealing material 91, a connection electrode 93, an anisotropic conductive layer 95, an FPC (Flexible Printed Circuit) 97, and the like.

[0194] 28, the substrate 47 and the insulating layer 61 are bonded together with a sealing material 91. Furthermore, a connection electrode 93 is provided on the insulating layer 61 and on the conductive layer 65 so as to be electrically connected to, for example, one of the source or drain of the transistor 80. Furthermore, an anisotropic conductive layer 95 is provided so as to be electrically connected to the connection electrode 93, and an FPC 97 is provided so as to be electrically connected to the anisotropic conductive layer 95. For example, various signals are supplied to the display device 10 from outside the display device 10 via the FPC 97. Note that the sealing material 91 may be omitted, and the FPC 97 may be wire-bonded.

[0195] Fig. 29 is a cross-sectional view illustrating a configuration example of a display device 10, which is a variation of the display device 10 illustrated in Fig. 28. The display device 10 illustrated in Fig. 29 differs from the display device 10 illustrated in Fig. 28 in that it includes a transistor 70 that can be, for example, an OS transistor.

[0196] 30A is a block diagram showing an example of the configuration of the display device 10. The display device 10 has a display unit 100, a scanning line driving circuit 101, and a data line driving circuit 103. The display unit 100 has pixels 50 arranged in a matrix. The scanning line driving circuit 101 and the data line driving circuit 103 can be configured to include transistors 80.

[0197] The scanning line driving circuit 101 is electrically connected to the pixels 50 via wiring 105. The data line driving circuit 103 is electrically connected to the pixels 50 via wiring 107. The wiring 105 and the wiring 107 can be configured to extend in directions perpendicular to each other.

[0198] The scanning line driving circuit 101 has a function of generating a selection signal for selecting the pixel 50 to which image data is written. The data line driving circuit 103 has a function of generating a signal (data signal) representing the image data. The selection signal is supplied to the pixel 50 via a wiring 105, and the data signal is supplied to the pixel 50 via a wiring 107.

[0199] 30B is a circuit diagram showing an example of the configuration of the pixel 50. The pixel 50 includes a light-emitting element 20 and a pixel circuit 110.

[0200] The pixel circuit 110 includes a transistor 111, a transistor 140, a transistor 113, and a capacitor 115. The pixel circuit 110 is electrically connected to one electrode of the light-emitting element 20. Here, the transistor 140 can be the transistor 80 shown in FIG. 1 or the like or the transistor 70 shown in FIG. 3 or the like.

[0201] One of the source or drain of the transistor 111 is electrically connected to the gate of the transistor 140. The gate of the transistor 140 is electrically connected to one electrode of the capacitor 115. One of the source or drain of the transistor 140 is electrically connected to one of the source or drain of the transistor 113. One of the source or drain of the transistor 113 is electrically connected to the other electrode of the capacitor 115. The other electrode of the capacitor 115 is electrically connected to one electrode of the light-emitting element 20. Here, a node where one of the source or drain of the transistor 111, the gate of the transistor 140, and one electrode of the capacitor 115 are electrically connected is referred to as node 117. Further, a node where one of the source or drain of the transistor 140, one of the source or drain of the transistor 113, the other electrode of the capacitor 115, and one electrode of the light-emitting element 20 are electrically connected is referred to as node 119.

[0202] The other of the source and the drain of the transistor 111 is electrically connected to the wiring 107. The gate of the transistor 111 and the gate of the transistor 113 are electrically connected to the wiring 105. The other of the source and the drain of the transistor 140 is electrically connected to the potential supply line VL_a. The other of the source and the drain of the transistor 113 is electrically connected to the potential supply line VL0. The other electrode of the light-emitting element 20 is electrically connected to the potential supply line VL_b.

[0203] The transistor 111 has a function of controlling writing of image data to the node 117. The capacitor 115 functions as a storage capacitor for holding data written to the node 117.

[0204] In a display device having the pixel circuits 110 , the pixel circuits 110 in each row are sequentially selected by the scanning line driver circuit 101 , and the transistors 111 and 113 are turned on to write image data to the nodes 117 .

[0205] The pixel circuit 110, in which image data is written to the node 117, is in a holding state when the transistors 111 and 113 are turned off. Furthermore, the amount of current flowing between the drain and source of the transistor 140 is controlled in accordance with the potential of the node 119, and the light-emitting element 20 emits light with a luminance corresponding to the amount of current. By performing this process sequentially for each row, an image can be displayed on the display unit 100.

[0206] <Transistor configuration example> 31A, 31B, and 31C are a top view and a cross-sectional view of the transistor 70 and the periphery of the transistor 70. FIG.

[0207] FIG. 31A is a top view of the transistor 70. FIGS. 31B and 31C are cross-sectional views of the transistor 70. FIG. 31B is a cross-sectional view of the portion indicated by the dashed dotted line X1-X2 in FIG. 31A, and is also a cross-sectional view of the transistor 70 in the channel length direction. FIG. 31C is a cross-sectional view of the portion indicated by the dashed dotted line Y1-Y2 in FIG. 31A, and is also a cross-sectional view of the transistor 70 in the channel width direction. Note that in the top view of FIG. 31A, some elements are omitted for clarity.

[0208] As shown in Figures 31A, 31B, and 31C, transistor 70 has a metal oxide 230a disposed on a substrate (not shown), a metal oxide 230b disposed on the metal oxide 230a, a conductor 242a and a conductor 242b disposed spaced apart from each other on the metal oxide 230b, an insulator 280 disposed on the conductors 242a and 242b and having an opening formed between the conductors 242a and 242b, a conductor 260 disposed in the opening, an insulator 250 disposed among the metal oxide 230b, the conductors 242a, 242b, and the insulator 280, and the conductor 260, and a metal oxide 230c disposed among the metal oxide 230b, the conductors 242a, 242b, the insulator 280, and the insulator 250. 31B and 31C, it is preferable that the top surface of the conductor 260 substantially coincides with the top surfaces of the insulator 250, the metal oxide 230c, and the insulator 280. Note that, hereinafter, the metal oxide 230a, the metal oxide 230b, and the metal oxide 230c may be collectively referred to as the metal oxide 230. Furthermore, the conductor 242a and the conductor 242b may be collectively referred to as the conductor 242.

[0209] In the transistor 70, the angle formed between the side surface and the bottom surface of the conductor 242a and the conductor 242b can be 10° to 80°, preferably 30° to 60°. Furthermore, the opposing side surfaces of the conductor 242a and the conductor 242b may have multiple surfaces.

[0210] 31B and 31C, it is preferable that insulator 254 be disposed between insulator 224, metal oxide 230a, metal oxide 230b, conductor 242a, conductor 242b, and metal oxide 230c and insulator 280. Here, it is preferable that insulator 254 be in contact with the side surface of metal oxide 230c, the top and side surfaces of conductor 242a, the top and side surfaces of conductor 242b, the side surfaces of metal oxide 230a and metal oxide 230b, and the top surface of insulator 224, as shown in FIG.

[0211] Although the transistor 70 has a three-layer structure of the metal oxide 230a, the metal oxide 230b, and the metal oxide 230c in and around a region where a channel is formed (hereinafter also referred to as a channel formation region), the present invention is not limited to this. For example, a two-layer structure of the metal oxide 230b and the metal oxide 230c or a stacked structure of four or more layers may be provided. Furthermore, the conductor 260 of the transistor 70 has a two-layer structure, but the present invention is not limited to this. For example, the conductor 260 may have a single-layer structure or a stacked structure of three or more layers. Furthermore, each of the metal oxide 230a, the metal oxide 230b, and the metal oxide 230c may have a stacked structure of two or more layers.

[0212] For example, when metal oxide 230c has a layered structure consisting of a first metal oxide and a second metal oxide on the first metal oxide, it is preferable that the first metal oxide has a composition similar to that of metal oxide 230b, and the second metal oxide has a composition similar to that of metal oxide 230a.

[0213] Here, the conductor 260 functions as the gate electrode of the transistor, and the conductors 242a and 242b function as the source electrode and drain electrode, respectively. As described above, the conductor 260 is formed so as to be embedded in the opening of the insulator 280 and in the region sandwiched between the conductors 242a and 242b. Here, the arrangement of the conductors 260, 242a, and 242b is selected in a self-aligned manner with respect to the opening of the insulator 280. That is, in the transistor 70, the gate electrode can be arranged between the source electrode and the drain electrode in a self-aligned manner. Therefore, the conductor 260 can be formed without providing an alignment margin, thereby reducing the area occupied by the transistor 70. This allows for a high-resolution display device. Furthermore, the display device can have a narrow frame.

[0214] As shown in FIG. 31B, it is preferable that the conductor 260 has a conductor 260a provided inside the insulator 250 and a conductor 260b provided so as to be embedded inside the conductor 260a.

[0215] The transistor 70 preferably includes an insulator 214 disposed on a substrate (not shown), an insulator 216 disposed on the insulator 214, a conductor 205 disposed so as to be embedded in the insulator 216, an insulator 222 disposed on the insulator 216 and the conductor 205, and an insulator 224 disposed on the insulator 222. A metal oxide 230a is preferably disposed on the insulator 224.

[0216] An insulator 274 and an insulator 281, which function as interlayer films, are preferably disposed over the transistor 70. Here, the insulator 274 is preferably disposed in contact with top surfaces of the conductor 260, the insulator 250, the metal oxide 230c, and the insulator 280.

[0217] It is preferable that the insulators 222, 254, and 274 have the function of suppressing the diffusion of hydrogen (e.g., at least one of hydrogen atoms and hydrogen molecules). For example, it is preferable that the insulators 222, 254, and 274 have lower hydrogen permeability than the insulators 224, 250, and 280. It is also preferable that the insulators 222 and 254 have the function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms and oxygen molecules). For example, it is preferable that the insulators 222 and 254 have lower oxygen permeability than the insulators 224, 250, and 280.

[0218] Here, the insulator 224, the metal oxide 230, and the insulator 250 are separated by the insulators 280 and 281, and the insulators 254 and 274. Therefore, impurities such as hydrogen contained in the insulators 280 and 281, or excess oxygen, can be prevented from being mixed into the insulators 224, the metal oxide 230a, the metal oxide 230b, and the insulator 250.

[0219] It is preferable that a conductor 240 (conductor 240a and conductor 240b) electrically connected to the transistor 70 and functioning as a plug is provided. Note that an insulator 241 (insulator 241a and insulator 241b) is provided in contact with the side surface of the conductor 240 functioning as a plug. That is, the insulator 241 is provided in contact with the inner wall of the opening of the insulators 254, 280, 274, and 281. Alternatively, a first conductor of the conductor 240 may be provided in contact with the side surface of the insulator 241, and a second conductor of the conductor 240 may be provided further inside. Here, the height of the top surface of the conductor 240 and the height of the insulator 281 can be made approximately the same. Note that, in the transistor 70, a structure in which the first conductor of the conductor 240 and the second conductor of the conductor 240 are stacked is described, but the present invention is not limited to this. For example, the conductor 240 may be configured to have a single layer or a laminated structure of three or more layers. When the structure has a laminated structure, it may be distinguished by assigning an ordinal number to the order of formation.

[0220] The transistor 70 preferably uses a metal oxide that functions as an oxide semiconductor (hereinafter also referred to as an oxide semiconductor) for the metal oxide 230 (metal oxide 230a, metal oxide 230b, and metal oxide 230c) including the channel formation region. For example, the metal oxide that forms the channel formation region of the metal oxide 230 preferably has a band gap of 2 eV or more, preferably 2.5 eV or more.

[0221] The metal oxide preferably contains at least indium (In) or zinc (Zn). In particular, it is preferable that it contains indium (In) and zinc (Zn). In addition to these, it is preferable that it contains element M. As element M, one or more of aluminum (Al), gallium (Ga), yttrium (Y), tin (Sn), boron (B), titanium (Ti), iron (Fe), nickel (Ni), germanium (Ge), zirconium (Zr), molybdenum (Mo), lanthanum (La), cerium (Ce), neodymium (Nd), hafnium (Hf), tantalum (Ta), tungsten (W), magnesium (Mg), and cobalt (Co) can be used. In particular, element M is preferably one or more of aluminum (Al), gallium (Ga), yttrium (Y), and tin (Sn). Furthermore, it is more preferable that element M contains either or both of Ga and Sn.

[0222] 31B, the film thickness of the metal oxide 230b in the region that does not overlap with the conductor 242 may be thinner than the film thickness of the region that overlaps with the conductor 242. This is formed by removing a portion of the upper surface of the metal oxide 230b when forming the conductors 242a and 242b. When a conductive film that will become the conductor 242 is formed on the upper surface of the metal oxide 230b, a low-resistance region may be formed near the interface with the conductive film. In this way, by removing the low-resistance region located between the conductors 242a and 242b on the upper surface of the metal oxide 230b, it is possible to prevent a channel from being formed in that region.

[0223] According to one embodiment of the present invention, a display device having high definition and a small transistor can be provided. Alternatively, a display device having high luminance and a transistor with high on-state current can be provided. Alternatively, a display device having high-speed operation and a transistor with stable electrical characteristics can be provided. Alternatively, a display device having low power consumption and a transistor with low off-state current can be provided.

[0224] A detailed structure of the transistor 70 that can be used in the display device of one embodiment of the present invention will be described.

[0225] The conductor 205 is disposed so as to have an overlapping region with the metal oxide 230 and the conductor 260. The conductor 205 is preferably embedded in the insulator 216.

[0226] The conductor 205 includes conductor 205a, conductor 205b, and conductor 205c. The conductor 205a is provided in contact with the bottom surface and sidewall of an opening provided in the insulator 216. The conductor 205b is provided so as to be embedded in a recess formed in the conductor 205a. Here, the upper surface of the conductor 205b is lower than the upper surface of the conductor 205a and the upper surface of the insulator 216. The conductor 205c is provided in contact with the upper surface of the conductor 205b and the side surface of the conductor 205a. Here, the height of the upper surface of the conductor 205c is approximately the same as the height of the upper surface of the conductor 205a and the height of the upper surface of the insulator 216. In other words, the conductor 205b is configured to be enclosed by the conductors 205a and 205c.

[0227] The conductors 205a and 205c are preferably made of a conductive material that has a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (NO, NO, NO, etc.), copper atoms, etc. Alternatively, it is preferable to use a conductive material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules, etc.).

[0228] By using a conductive material that can reduce hydrogen diffusion for the conductor 205a and the conductor 205c, it is possible to prevent impurities such as hydrogen contained in the conductor 205b from diffusing into the metal oxide 230 via the insulator 224 or the like. Furthermore, by using a conductive material that can reduce oxygen diffusion for the conductor 205a and the conductor 205c, it is possible to prevent the conductor 205b from being oxidized and its conductivity from decreasing. Examples of conductive materials that can reduce oxygen diffusion include titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, and ruthenium oxide. Therefore, the conductor 205a may be a single layer or a multilayer of the above conductive materials. For example, the conductor 205a may be made of titanium nitride.

[0229] The conductor 205b is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component, for example, tungsten.

[0230] Here, the conductor 260 may function as a first gate (also referred to as a top gate) electrode. The conductor 205 may function as a second gate (also referred to as a bottom gate) electrode. In this case, the threshold voltage of the transistor 70 can be controlled by changing the potential applied to the conductor 205 independently of the potential applied to the conductor 260. In particular, applying a negative potential to the conductor 205 can increase the threshold voltage of the transistor 70 above 0 V and reduce the off-state current. Therefore, applying a negative potential to the conductor 205 can reduce the drain current when the potential applied to the conductor 260 is 0 V compared to not applying a negative potential to the conductor 205.

[0231] The conductor 205 is preferably provided to be larger than the channel formation region of the metal oxide 230. In particular, as shown in Fig. 31C, the conductor 205 preferably extends also in a region outside the end portion intersecting with the channel width direction of the metal oxide 230. In other words, the conductor 205 and the conductor 260 preferably overlap with each other with an insulator interposed therebetween on the outside of the side surface of the metal oxide 230 in the channel width direction.

[0232] With the above structure, the channel formation region of the metal oxide 230 can be electrically surrounded by the electric field of the conductor 260 that functions as a first gate electrode and the electric field of the conductor 205 that functions as a second gate electrode.

[0233] 31C, the conductor 205 is extended to function as wiring. However, the present invention is not limited to this, and a conductor that functions as wiring may be provided below the conductor 205.

[0234] The insulator 214 preferably functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the transistor 70 from the substrate side. Therefore, the insulator 214 is preferably made of an insulating material that has a function of preventing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (such as NO, NO, or NO), or copper atoms (i.e., the impurities are less likely to permeate through the material). Alternatively, the insulator 214 is preferably made of an insulating material that has a function of preventing the diffusion of oxygen (e.g., at least one of oxygen atoms and oxygen molecules) (i.e., the oxygen is less likely to permeate through the material).

[0235] For example, aluminum oxide, silicon nitride, or the like is preferably used as the insulator 214. This can prevent impurities such as water or hydrogen from diffusing from the substrate side of the insulator 214 to the transistor 70 side. Alternatively, it can prevent oxygen contained in the insulator 224 or the like from diffusing from the insulator 214 to the substrate side.

[0236] The insulators 216, 280, and 281, which function as interlayer films, preferably have a lower dielectric constant than the insulator 214. Using a material with a low dielectric constant as the interlayer film can reduce parasitic capacitance between wirings. For example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine has been added, silicon oxide to which carbon has been added, silicon oxide to which carbon and nitrogen have been added, silicon oxide having vacancies, or the like can be used as appropriate for the insulators 216, 280, and 281.

[0237] The insulators 222 and 224 function as gate insulators.

[0238] Here, the insulator 224 in contact with the metal oxide 230 preferably releases oxygen upon heating. In this specification, oxygen released upon heating is sometimes referred to as excess oxygen. For example, the insulator 224 may be made of silicon oxide, silicon oxynitride, or the like as appropriate. By providing an insulator containing oxygen in contact with the metal oxide 230, oxygen vacancies in the metal oxide 230 can be reduced, and the reliability of the transistor 70 can be improved.

[0239] Specifically, it is preferable to use an oxide material from which a portion of oxygen is released by heating as the insulator 224. The oxide material from which oxygen is released by heating is an oxide material from which the amount of released oxygen converted into oxygen atoms is 1.0×10 in TDS (Thermal Desorption Spectroscopy) analysis. 18 atoms / cm 3 or more, preferably 1.0 × 10 19 atoms / cm 3 More preferably, 2.0 × 10 19 atoms / cm 3 or more, or 3.0 x 10 20 atoms / cm 3 The oxide film is one having the above properties. The surface temperature of the film during the TDS analysis is preferably in the range of 100°C or higher and 700°C or lower, or 100°C or higher and 400°C or lower.

[0240] 31C, the thickness of the region of insulator 224 that does not overlap with insulator 254 and metal oxide 230b may be thinner than the thickness of the other region. It is preferable that the thickness of the region of insulator 224 that does not overlap with insulator 254 and metal oxide 230b is a thickness that allows sufficient diffusion of the oxygen.

[0241] Like the insulator 214 and the like, the insulator 222 preferably functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the transistor 70 from the substrate side. For example, the insulator 222 preferably has lower hydrogen permeability than the insulator 224. By surrounding the insulator 224, the metal oxide 230, the insulator 250, and the like with the insulators 222, 254, and 274, impurities such as water or hydrogen can be prevented from entering the transistor 70 from the outside.

[0242] Furthermore, the insulator 222 preferably has a function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms and oxygen molecules) (i.e., the oxygen is less likely to permeate). For example, the insulator 222 preferably has lower oxygen permeability than the insulator 224. The insulator 222 preferably has a function of suppressing the diffusion of oxygen or impurities, which can reduce the diffusion of oxygen contained in the metal oxide 230 toward the substrate side. Furthermore, the conductor 205 can be prevented from reacting with oxygen contained in the insulator 224 or oxygen contained in the metal oxide 230.

[0243] The insulator 222 may be an insulator containing an oxide of one or both of insulating materials, aluminum and hafnium. Aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like is preferably used as the insulator containing an oxide of one or both of aluminum and hafnium. When the insulator 222 is formed using such a material, the insulator 222 functions as a layer that suppresses oxygen release from the metal oxide 230 and the intrusion of impurities such as hydrogen from the periphery of the transistor 70 into the metal oxide 230.

[0244] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to these insulators. Alternatively, these insulators may be nitrided. Silicon oxide, silicon oxynitride, or silicon nitride may be stacked on the above insulators.

[0245] The insulator 222 may be a single layer or a multilayer insulator containing a so-called high-k material, such as aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST). As transistors become smaller and more highly integrated, thinning of the gate insulator can cause problems such as leakage current. Using a high-k material for the insulator that functions as the gate insulator allows for a reduction in the gate potential during transistor operation while maintaining the physical film thickness.

[0246] The insulator 222 and the insulator 224 may have a stacked structure of two or more layers. In this case, the stacked structure is not limited to the stacked structure made of the same material, and may be a stacked structure made of different materials. For example, an insulator similar to the insulator 224 may be provided below the insulator 222.

[0247] The metal oxide 230 includes a metal oxide 230a, a metal oxide 230b on the metal oxide 230a, and a metal oxide 230c on the metal oxide 230b. By providing the metal oxide 230a below the metal oxide 230b, it is possible to suppress the diffusion of impurities from structures formed below the metal oxide 230a to the metal oxide 230b. Furthermore, by providing the metal oxide 230c on the metal oxide 230b, it is possible to suppress the diffusion of impurities from structures formed above the metal oxide 230c to the metal oxide 230b.

[0248] The metal oxide 230 preferably has a stacked structure of multiple oxide layers with different atomic ratios of each metal atom. For example, when the metal oxide 230 contains at least indium (In) and the element M, the ratio of the number of atoms of the element M contained in the metal oxide 230a to the number of atoms of all elements constituting the metal oxide 230a is preferably higher than the ratio of the number of atoms of the element M contained in the metal oxide 230b to the number of atoms of all elements constituting the metal oxide 230b. Furthermore, the atomic ratio of the element M contained in the metal oxide 230a to In is preferably higher than the atomic ratio of the element M contained in the metal oxide 230b to In. Here, the metal oxide 230c can be any metal oxide that can be used for the metal oxide 230a or the metal oxide 230b.

[0249] The energy of the conduction band minimum of the metal oxide 230a and the metal oxide 230c is preferably higher than the energy of the conduction band minimum of the metal oxide 230b. In other words, the electron affinity of the metal oxide 230a and the metal oxide 230c is preferably lower than the electron affinity of the metal oxide 230b. In this case, the metal oxide 230c is preferably a metal oxide that can be used for the metal oxide 230a. Specifically, the ratio of the number of atoms of the element M contained in the metal oxide 230c to the number of atoms of all elements constituting the metal oxide 230c is preferably higher than the ratio of the number of atoms of the element M contained in the metal oxide 230b to the number of atoms of all elements constituting the metal oxide 230b. Furthermore, the atomic ratio of the element M contained in the metal oxide 230c to In is preferably higher than the atomic ratio of the element M contained in the metal oxide 230b to In.

[0250] Here, the energy level of the conduction band minimum changes smoothly at the junction between the metal oxide 230a, the metal oxide 230b, and the metal oxide 230c. In other words, the energy level of the conduction band minimum at the junction between the metal oxide 230a, the metal oxide 230b, and the metal oxide 230c changes continuously or can be said to be a continuous junction. To achieve this, it is advisable to reduce the defect level density of the mixed layer formed at the interface between the metal oxide 230a and the metal oxide 230b and the interface between the metal oxide 230b and the metal oxide 230c.

[0251] Specifically, the metal oxide 230a and the metal oxide 230b, and the metal oxide 230b and the metal oxide 230c, may have a common element other than oxygen (as a main component), thereby forming a mixed layer with a low density of defect states. For example, when the metal oxide 230b is an In-Ga-Zn oxide, the metal oxide 230a and the metal oxide 230c may be made of an In-Ga-Zn oxide, a Ga-Zn oxide, gallium oxide, or the like. The metal oxide 230c may also have a stacked structure. For example, a stacked structure of an In-Ga-Zn oxide and a Ga-Zn oxide on the In-Ga-Zn oxide, or a stacked structure of an In-Ga-Zn oxide and a gallium oxide on the In-Ga-Zn oxide, may be used. In other words, the metal oxide 230c may have a stacked structure of an In-Ga-Zn oxide and an oxide that does not contain In.

[0252] Specifically, metal oxide 230a may have an atomic ratio of In:Ga:Zn=1:3:4, 1:1:0.5, or a similar ratio. Metal oxide 230b may have an atomic ratio of In:Ga:Zn=4:2:3, 3:1:2, or a similar ratio. Metal oxide 230c may have an atomic ratio of In:Ga:Zn=1:3:4, 4:2:3, 2:1, 2:5, or a similar ratio. Specific examples of the metal oxide 230c having a layered structure include a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] or its vicinity and Ga:Zn=2:1 [atomic ratio] or its vicinity, a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] or its vicinity and Ga:Zn=2:5 [atomic ratio] or its vicinity, and a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] or its vicinity and gallium oxide.

[0253] In this case, the main carrier path is the metal oxide 230b. By configuring the metal oxide 230a and the metal oxide 230c as described above, the defect level density at the interface between the metal oxide 230a and the metal oxide 230b and at the interface between the metal oxide 230b and the metal oxide 230c can be reduced. This reduces the effect of interface scattering on carrier conduction, allowing the transistor 70 to achieve a high on-state current and high frequency characteristics. Note that, when the metal oxide 230c has a stacked structure, in addition to the effect of reducing the defect level density at the interface between the metal oxide 230b and the metal oxide 230c, it is expected that the diffusion of constituent elements of the metal oxide 230c toward the insulator 250 can be suppressed. More specifically, by configuring the metal oxide 230c as a stacked structure and positioning an oxide that does not contain In above the stacked structure, it is possible to suppress In diffusion toward the insulator 250. Because the insulator 250 functions as a gate insulator, diffusion of In can cause poor transistor characteristics. Therefore, by forming the metal oxide 230c into a laminated structure, it is possible to provide a highly reliable display device.

[0254] Conductors 242 (conductors 242a and 242b) functioning as a source electrode and a drain electrode are provided on the metal oxide 230b. Conductor 242 is preferably made of a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, or lanthanum, or an alloy containing any of the above metal elements, or an alloy combining any of the above metal elements. For example, tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, or an oxide containing lanthanum and nickel is preferably used. In addition, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferred because they are conductive materials that are resistant to oxidation or materials that maintain conductivity even when they absorb oxygen.

[0255] By providing the conductor 242 so as to be in contact with the metal oxide 230, the oxygen concentration may decrease in the vicinity of the conductor 242 of the metal oxide 230. Furthermore, a metal compound layer containing the metal contained in the conductor 242 and components of the metal oxide 230 may be formed in the vicinity of the conductor 242 of the metal oxide 230. In such a case, the carrier density increases in the region of the metal oxide 230 in the vicinity of the conductor 242, and this region becomes a low-resistance region.

[0256] Here, the region between the conductor 242a and the conductor 242b is formed to overlap the opening of the insulator 280. This allows the conductor 260 to be arranged in a self-aligned manner between the conductor 242a and the conductor 242b.

[0257] The insulator 250 functions as a gate insulator. The insulator 250 is preferably disposed in contact with the upper surface of the metal oxide 230c. The insulator 250 can be made of silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide doped with fluorine, silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen, or silicon oxide having vacancies. Silicon oxide and silicon oxynitride are particularly preferred because they are stable against heat.

[0258] The insulator 250 preferably has a reduced concentration of impurities such as water or hydrogen, similar to the insulator 224. The thickness of the insulator 250 is preferably 1 nm or more and 20 nm or less.

[0259] A metal oxide may be provided between the insulator 250 and the conductor 260. The metal oxide preferably suppresses oxygen diffusion from the insulator 250 to the conductor 260. This makes it possible to suppress oxidation of the conductor 260 due to oxygen in the insulator 250.

[0260] The metal oxide may function as part of the gate insulator. Therefore, when silicon oxide or silicon oxynitride is used for the insulator 250, it is preferable to use a metal oxide that is a high-k material with a high dielectric constant. By forming the gate insulator into a stacked structure of the insulator 250 and the metal oxide, it is possible to achieve a stacked structure that is thermally stable and has a high dielectric constant. Therefore, it is possible to reduce the gate potential applied during transistor operation while maintaining the physical thickness of the gate insulator. In addition, it is possible to reduce the equivalent oxide thickness (EOT) of the insulator that functions as the gate insulator.

[0261] Specifically, it is possible to use a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, etc. In particular, it is preferable to use an insulator containing an oxide of either or both of aluminum and hafnium, such as aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate).

[0262] Although the conductor 260 is shown as having a two-layer structure in FIGS. 31B and 31C, it may have a single-layer structure or a laminated structure of three or more layers.

[0263] The conductor 260a is preferably made of a conductor having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (NO, NO, NO, etc.), copper atoms, etc. Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules, etc.).

[0264] The conductor 260a has a function of suppressing oxygen diffusion, which can suppress a decrease in conductivity due to oxidation of the conductor 260b caused by oxygen contained in the insulator 250. As a conductive material having a function of suppressing oxygen diffusion, it is preferable to use, for example, tantalum, tantalum nitride, ruthenium, ruthenium oxide, or the like.

[0265] The conductor 260b is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. Furthermore, since the conductor 260 also functions as wiring, it is preferable to use a conductor with high conductivity. For example, a conductive material containing tungsten, copper, or aluminum as a main component can be used. Furthermore, the conductor 260b may have a layered structure, such as a layered structure of titanium or titanium nitride and the above-mentioned conductive material.

[0266] 31C, in a region of the metal oxide 230b that does not overlap with the conductor 242, in other words, in the channel formation region of the metal oxide 230, the side surface of the metal oxide 230 is arranged to be covered with the conductor 260. This makes it easier for the electric field of the conductor 260, which functions as the first gate electrode, to act on the side surface of the metal oxide 230. This increases the on-current of the transistor 70 and improves its frequency characteristics.

[0267] Like the insulator 214, the insulator 254 preferably functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the transistor 70 from the insulator 280 side. For example, the insulator 254 preferably has lower hydrogen permeability than the insulator 224. Furthermore, as shown in FIGS. 31B and 31C , the insulator 254 preferably contacts the side surface of the metal oxide 230c, the top and side surfaces of the conductor 242a, the top and side surfaces of the conductor 242b, the side surfaces of the metal oxide 230a and the metal oxide 230b, and the top surface of the insulator 224. This configuration can prevent hydrogen contained in the insulator 280 from entering the metal oxide 230 from the top or side surfaces of the conductor 242a, the conductor 242b, the metal oxide 230a, the metal oxide 230b, and the insulator 224.

[0268] Furthermore, the insulator 254 preferably has a function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms and oxygen molecules) (i.e., the oxygen is less likely to permeate). For example, the insulator 254 preferably has lower oxygen permeability than the insulator 280 or the insulator 224.

[0269] The insulator 254 is preferably formed by sputtering. By forming the insulator 254 by sputtering in an oxygen-containing atmosphere, oxygen can be added to the insulator 224 near the region where the insulator 254 is in contact with the insulator 254. This allows oxygen to be supplied from this region to the metal oxide 230 through the insulator 224. The insulator 254 has a function of suppressing upward oxygen diffusion, thereby preventing oxygen from diffusing from the metal oxide 230 to the insulator 280. The insulator 222 has a function of suppressing downward oxygen diffusion, thereby preventing oxygen from diffusing from the metal oxide 230 toward the substrate. In this way, oxygen is supplied to the channel formation region of the metal oxide 230. This reduces oxygen vacancies in the metal oxide 230 and suppresses the transistor from becoming normally on.

[0270] For example, an insulator containing an oxide of one or both of aluminum and hafnium may be formed as the insulator 254. Note that as the insulator containing an oxide of one or both of aluminum and hafnium, it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like.

[0271] By covering the insulator 224 and the metal oxide 230 with the insulator 254, which has a barrier property against hydrogen, the insulator 280 is separated from the insulator 224 and the metal oxide 230 by the insulator 254. This can prevent impurities such as hydrogen from penetrating from the outside of the transistor 70, thereby providing the transistor 70 with good electrical characteristics and reliability.

[0272] The insulator 280 is provided over the insulator 224 and the conductor 242 with the insulator 254 interposed therebetween. For example, the insulator 280 preferably includes silicon oxide, silicon oxynitride, silicon nitride oxide, silicon oxide doped with fluorine, silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen, silicon oxide having vacancies, or the like. Silicon oxide and silicon oxynitride are particularly preferred because they are thermally stable. Materials such as silicon oxide, silicon oxynitride, and silicon oxide having vacancies are particularly preferred because they can easily form a region containing oxygen that is released by heating.

[0273] It is preferable that the concentration of impurities such as water or hydrogen is reduced in the insulator 280. The top surface of the insulator 280 may be flattened.

[0274] Similar to the insulator 214, the insulator 274 preferably functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the insulator 280 from above. As the insulator 274, for example, an insulator that can be used for the insulator 214, the insulator 254, or the like may be used.

[0275] An insulator 281 functioning as an interlayer film is preferably provided over the insulator 274. Like the insulator 224 and the like, the insulator 281 preferably has a reduced concentration of impurities such as water or hydrogen.

[0276] The conductor 240a and the conductor 240b are arranged in openings formed in the insulator 281, the insulator 274, the insulator 280, and the insulator 254. The conductor 240a and the conductor 240b are arranged opposite each other with the conductor 260 interposed therebetween. The upper surfaces of the conductor 240a and the conductor 240b may be flush with the upper surface of the insulator 281.

[0277] Note that insulator 241a is provided in contact with the inner walls of the openings of insulators 281, 274, 280, and 254, and a first conductor of conductor 240a is formed in contact with the side surface of insulator 241a. Conductor 242a is located on at least a portion of the bottom of the openings, and conductor 240a is in contact with conductor 242a. Similarly, insulator 241b is provided in contact with the inner walls of the openings of insulators 281, 274, 280, and 254, and a first conductor of conductor 240b is formed in contact with the side surface of insulator 241b. Conductor 242b is located on at least a portion of the bottom of the openings, and conductor 240b is in contact with conductor 242b.

[0278] The conductors 240a and 240b are preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. The conductors 240a and 240b may have a layered structure.

[0279] When the conductor 240 has a layered structure, it is preferable to use the above-mentioned conductors that have the function of suppressing the diffusion of impurities such as water or hydrogen for the conductors in contact with the conductor 242, the insulator 254, the insulator 280, the insulator 274, and the insulator 281. For example, it is preferable to use tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, or ruthenium oxide. Furthermore, the conductive material that has the function of suppressing the diffusion of impurities such as water or hydrogen may be used in a single layer or a layered structure. By using such a conductive material, it is possible to suppress the absorption of oxygen added to the insulator 280 by the conductors 240a and 240b. It is also possible to suppress the intrusion of impurities such as water or hydrogen from layers above the insulator 281 into the metal oxide 230 through the conductors 240a and 240b.

[0280] The insulators 241a and 241b may be, for example, an insulator that can be used for the insulator 254. The insulators 241a and 241b are provided in contact with the insulator 280, and therefore can prevent impurities such as water or hydrogen from the insulator 280 from being mixed into the metal oxide 230 through the conductors 240a and 240b. Furthermore, oxygen contained in the insulator 280 can be prevented from being absorbed by the conductors 240a and 240b.

[0281] Although not shown, a conductor functioning as wiring may be disposed in contact with the upper surface of the conductor 240a and the upper surface of the conductor 240b. The conductor functioning as wiring is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. The conductor may also have a layered structure, for example, a layered structure of titanium or titanium nitride and the above-mentioned conductive material. The conductor may be formed so as to be embedded in an opening provided in an insulator.

[0282] <Configuration example of light-emitting element> 32A, the EL layer 23 of the light-emitting element 20 can be composed of a plurality of layers, such as a layer 4420, a light-emitting layer 4411, and a layer 4430. The layer 4420 can have, for example, a layer containing a substance with high electron-injecting properties (electron-injecting layer) and a layer containing a substance with high electron-transporting properties (electron-transporting layer). The light-emitting layer 4411 contains, for example, a light-emitting compound. The layer 4430 can have, for example, a layer containing a substance with high hole-injecting properties (hole-injecting layer) and a layer containing a substance with high hole-transporting properties (hole-transporting layer).

[0283] A structure including the layer 4420, the light-emitting layer 4411, and the layer 4430 provided between a pair of electrodes can function as a single light-emitting unit, and the structure of FIG. 32A is referred to as a single structure in this specification.

[0284] Note that a configuration in which a plurality of light-emitting layers (light-emitting layer 4411, light-emitting layer 4412, light-emitting layer 4413) are provided between layer 4420 and layer 4430 as shown in FIG. 32B is also a variation of the single structure.

[0285] Furthermore, as shown in Figure 32C, a configuration in which a plurality of light-emitting units (EL layer 23a, EL layer 23b) are connected in series via an intermediate layer (charge generating layer) 4440 is referred to as a tandem structure in this specification. Note that, although the configuration shown in Figure 32C is referred to as a tandem structure in this specification, the present invention is not limited to this, and for example, the tandem structure may also be referred to as a stack structure. Note that by using a tandem structure, a light-emitting element capable of emitting light with high brightness can be obtained.

[0286] Furthermore, when comparing the above-mentioned white light-emitting element (single structure or tandem structure) with the above-mentioned light-emitting element with the SBS structure, the light-emitting element with the SBS structure can reduce power consumption compared to the white light-emitting element. If it is desired to keep power consumption low, it is preferable to use a light-emitting element with the SBS structure. On the other hand, the white light-emitting element is preferable because the manufacturing process is simpler than that of the light-emitting element with the SBS structure, allowing for lower manufacturing costs or higher manufacturing yields.

[0287] The light-emitting element 20 can emit light in red, green, blue, cyan, magenta, yellow, white, or the like, depending on the material of the EL layer 23. Furthermore, the color purity can be further improved by providing the light-emitting element 20 with a microcavity structure.

[0288] A light-emitting element that emits white light preferably has a structure in which two or more light-emitting substances are contained in the light-emitting layer. To obtain white light emission, light-emitting substances are selected such that the respective emissions of the two or more light-emitting substances are in a complementary color relationship.

[0289] The light-emitting layer preferably contains two or more light-emitting materials that emit light of R (red), G (green), B (blue), Y (yellow), O (orange), or the like.

[0290] This embodiment mode can be implemented by appropriately combining at least a part thereof with other embodiment modes or examples described in this specification.

[0291] (Embodiment 2) In this embodiment, a metal oxide that can be used for the OS transistor described in the above embodiment will be described.

[0292] <Classification of crystal structures> First, classification of crystal structures in oxide semiconductors will be described with reference to Fig. 33A. Fig. 33A is a diagram illustrating classification of crystal structures of oxide semiconductors, typically IGZO (a metal oxide containing In, Ga, and Zn).

[0293] As shown in FIG. 33A, oxide semiconductors are broadly classified into "Amorphous," "Crystalline," and "Crystal." "Amorphous" includes completely amorphous. "Crystalline" includes c-axis-aligned crystalline (CAAC), nanocrystalline (nc), and cloud-aligned composite (CAC). The "Crystalline" classification excludes single crystal, polycrystal, and completely amorphous (excluding single crystal and polycrystal). "Crystal" includes single crystal and polycrystal.

[0294] The structure within the bold frame in Figure 33A is an intermediate state between "Amorphous" and "Crystal" and belongs to a new boundary region (New crystalline phase). In other words, this structure can be said to be completely different from the energetically unstable "Amorphous" and "Crystal."

[0295] The crystalline structure of a film or substrate can be evaluated using X-ray diffraction (XRD) spectroscopy. Figure 33B shows an XRD spectrum obtained by GIXD (Grazing-Incidence XRD) measurement of a CAAC-IGZO film classified as "Crystalline." The GIXD method is also known as the thin-film method or the Seemann-Bohlin method. Hereinafter, the XRD spectrum obtained by GIXD measurement shown in Figure 33B will be simply referred to as the XRD spectrum. The composition of the CAAC-IGZO film shown in Figure 33B is In:Ga:Zn=4:2:3 [atomic ratio] or nearby. The thickness of the CAAC-IGZO film shown in Figure 33B is 500 nm.

[0296] In Figure 33B, the horizontal axis is 2θ [deg.] and the vertical axis is intensity [au]. As shown in Figure 33B, a clear peak indicating crystallinity is detected in the XRD spectrum of the CAAC-IGZO film. Specifically, a peak indicating c-axis orientation is detected at or near 2θ = 31° in the XRD spectrum of the CAAC-IGZO film. Note that, as shown in Figure 33B, the peak at or near 2θ = 31° is asymmetric with respect to the angle at which the peak intensity is detected.

[0297] The crystalline structure of a film or substrate can be evaluated by a diffraction pattern (also called a nanobeam electron diffraction pattern) observed by nanobeam electron diffraction (NBED). The diffraction pattern of a CAAC-IGZO film is shown in Figure 33C. Figure 33C shows a diffraction pattern observed by NBED, in which an electron beam is incident parallel to the substrate. The composition of the CAAC-IGZO film shown in Figure 33C is In:Ga:Zn=4:2:3 [atomic ratio] or nearby. In nanobeam electron diffraction, electron diffraction is performed using a probe diameter of 1 nm.

[0298] As shown in Figure 33C, multiple spots indicating c-axis orientation are observed in the diffraction pattern of the CAAC-IGZO film.

[0299] [Structure of oxide semiconductor] Note that oxide semiconductors may be classified differently from those shown in FIG. 33A when focusing on their crystal structures. For example, oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include the above-mentioned CAAC-OS and nc-OS. Non-single-crystal oxide semiconductors include polycrystalline oxide semiconductors, amorphous-like oxide semiconductors (a-like OSs), and amorphous oxide semiconductors.

[0300] Here, the above-mentioned CAAC-OS, nc-OS, and a-like OS will be described in detail.

[0301] [CAAC-OS] CAAC-OS is an oxide semiconductor having multiple crystalline regions, each with its c-axis aligned in a specific direction. The specific direction can be the thickness direction of the CAAC-OS film, the normal direction to the surface on which the CAAC-OS film is formed, or the normal direction to the surface of the CAAC-OS film. A crystalline region is a region with periodic atomic arrangement. Considering an atomic arrangement as a lattice arrangement, a crystalline region can also be a region with a uniform lattice arrangement. Furthermore, CAAC-OS has a region where multiple crystalline regions are connected in the ab-plane direction, and the region may have distortion. The distortion refers to a location where the lattice orientation changes between a region with a uniform lattice arrangement and a region with a different uniform lattice arrangement in the region where multiple crystalline regions are connected. In other words, CAAC-OS is an oxide semiconductor with a c-axis aligned but no clear orientation in the ab-plane direction.

[0302] Each of the multiple crystalline regions is composed of one or more minute crystals (crystals with a maximum diameter of less than 10 nm). When a crystalline region is composed of one minute crystal, the maximum diameter of the crystalline region is less than 10 nm. When a crystalline region is composed of many minute crystals, the size of the crystalline region may be several tens of nm.

[0303] In an In-M-Zn oxide (wherein element M is one or more elements selected from aluminum, gallium, yttrium, tin, titanium, etc.), the CAAC-OS tends to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium (In) and oxygen (hereinafter referred to as an In layer) and a layer containing element M, zinc (Zn), and oxygen (hereinafter referred to as an (M, Zn) layer) are stacked. Note that indium and element M are mutually substituted. Therefore, the (M, Zn) layer may contain indium. Furthermore, the In layer may contain element M. Furthermore, the In layer may contain Zn. The layered structure is observed as a lattice image in a high-resolution TEM image, for example.

[0304] When the CAAC-OS film is subjected to structural analysis using, for example, an XRD apparatus, a peak indicating c-axis orientation is detected at or near 2θ=31° in out-of-plane XRD measurement using θ / 2θ scan. Note that the position of the peak indicating c-axis orientation (2θ value) may vary depending on the type or composition of the metal elements constituting the CAAC-OS.

[0305] For example, in the electron diffraction pattern of a CAAC-OS film, multiple bright spots are observed, and the spots are observed at positions that are point-symmetric with respect to the spot of the incident electron beam that has passed through the sample (also called the direct spot).

[0306] When the crystalline region is observed from the specific direction, the lattice arrangement in the crystalline region is basically a hexagonal lattice, but the unit cell is not necessarily a regular hexagon and may be non-regular hexagonal. The distortion may also have a pentagonal or heptagonal lattice arrangement. In the CAAC-OS, no clear grain boundaries can be observed even near the distortion. This indicates that the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This is thought to be because the CAAC-OS can tolerate distortion due to the lack of close-packed oxygen atom arrangement in the ab-plane direction and the change in interatomic bond distance caused by metal atom substitution.

[0307] A crystal structure in which clear grain boundaries are observed is called polycrystalline. Grain boundaries act as recombination centers, trapping carriers and potentially causing a decrease in the on-state current or field-effect mobility of a transistor. Therefore, CAAC-OS, which lacks clear grain boundaries, is one of the crystalline oxides with a crystal structure suitable for use in the semiconductor layer of a transistor. Zn is preferred for use in CAAC-OS. For example, In-Zn oxide and In-Ga-Zn oxide are suitable because they can suppress the generation of grain boundaries more effectively than In oxide.

[0308] The CAAC-OS is an oxide semiconductor with high crystallinity and no clear grain boundaries. Therefore, it can be said that the CAAC-OS is less susceptible to a decrease in electron mobility due to grain boundaries. Furthermore, since the crystallinity of an oxide semiconductor can be reduced by the inclusion of impurities or the generation of defects, the CAAC-OS can also be said to be an oxide semiconductor with few impurities or defects (such as oxygen vacancies). Therefore, oxide semiconductors with CAAC-OS have stable physical properties. Therefore, oxide semiconductors with CAAC-OS are heat-resistant and highly reliable. Furthermore, the CAAC-OS is stable even under high temperatures (so-called thermal budget) during the manufacturing process. Therefore, using a CAAC-OS for an OS transistor can increase the flexibility of the manufacturing process.

[0309] [nc-OS] The nc-OS has periodic atomic arrangement in a microscopic region (e.g., a region of 1 nm to 10 nm, particularly a region of 1 nm to 3 nm). In other words, the nc-OS has microcrystals. Note that the size of the microcrystals is, for example, 1 nm to 10 nm, particularly 1 nm to 3 nm, and therefore the microcrystals are also called nanocrystals. Furthermore, the nc-OS exhibits no regularity in the crystal orientation between different nanocrystals. Therefore, no orientation is observed throughout the film. Therefore, depending on the analytical method, the nc-OS may be indistinguishable from an a-like OS or an amorphous oxide semiconductor. For example, when a structural analysis of an nc-OS film is performed using an XRD apparatus, no peaks indicating crystallinity are detected in out-of-plane XRD measurements using θ / 2θ scanning. Furthermore, when an nc-OS film is subjected to electron diffraction (also known as selected-area electron diffraction) using an electron beam with a probe diameter larger than that of nanocrystals (e.g., 50 nm or larger), a halo-like diffraction pattern is observed. On the other hand, when electron diffraction (also called nanobeam electron diffraction) is performed on an nc-OS film using an electron beam with a probe diameter close to or smaller than the size of the nanocrystals (for example, 1 nm to 30 nm), an electron diffraction pattern can be obtained in which multiple spots are observed within a ring-shaped region centered on the direct spot.

[0310] [a-like OS] The a-like OS is an oxide semiconductor having a structure between the nc-OS and the amorphous oxide semiconductor. The a-like OS has a pore or low-density region. That is, the a-like OS has lower crystallinity than the nc-OS and CAAC-OS. Furthermore, the a-like OS has a higher hydrogen concentration in the film than the nc-OS and CAAC-OS.

[0311] [Oxide semiconductor composition] Next, the above-mentioned CAC-OS will be described in detail, which relates to the material composition.

[0312] [CAC-OS] CAC-OS is a material structure in which elements constituting a metal oxide are unevenly distributed in a size range of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or in the vicinity thereof. Note that, hereinafter, a metal oxide in which one or more metal elements are unevenly distributed and the regions containing the metal elements are mixed in a size range of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or in the vicinity thereof, is also referred to as a mosaic or patch state.

[0313] Furthermore, CAC-OS has a mosaic structure in which the material is separated into first and second regions, and the first regions are distributed throughout the film (hereinafter also referred to as a cloud structure). That is, CAC-OS is a composite metal oxide having a structure in which the first and second regions are mixed.

[0314] Here, the atomic ratios of In, Ga, and Zn to the metal elements constituting the CAC-OS in the In-Ga-Zn oxide are denoted as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS in the In-Ga-Zn oxide, the first region is a region where [In] is larger than [In] in the composition of the CAC-OS film. The second region is a region where [Ga] is larger than [Ga] in the composition of the CAC-OS film. Alternatively, for example, the first region is a region where [In] is larger than [In] in the second region and [Ga] is smaller than [Ga] in the second region. The second region is a region where [Ga] is larger than [Ga] in the first region and [In] is smaller than [In] in the first region.

[0315] Specifically, the first region is a region whose main component is indium oxide, indium zinc oxide, or the like. The second region is a region whose main component is gallium oxide, gallium zinc oxide, or the like. In other words, the first region can be rephrased as a region whose main component is In. The second region can be rephrased as a region whose main component is Ga.

[0316] It should be noted that there are cases where a clear boundary between the first region and the second region cannot be observed.

[0317] For example, in the case of CAC-OS in In-Ga-Zn oxide, EDX mapping obtained using EDX (Energy Dispersive X-ray spectroscopy) confirms that the CAC-OS has a structure in which a region mainly composed of In (first region) and a region mainly composed of Ga (second region) are unevenly distributed and mixed.

[0318] When CAC-OS is used in a transistor, the conductivity due to the first region and the insulating property due to the second region act in a complementary manner, thereby providing the CAC-OS with a switching function (the ability to turn on and off). In other words, CAC-OS has a conductive function in part of the material and an insulating function in part of the material, and the material as a whole functions as a semiconductor. By separating the conductive function from the insulating function, both functions can be maximized. Therefore, by using CAC-OS in a transistor, a high on-current (I on ), high field-effect mobility (μ), and good switching behavior can be achieved.

[0319] Oxide semiconductors have a variety of structures, each with different characteristics. The oxide semiconductor of one embodiment of the present invention may include two or more of an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-like OS, a CAC-OS, an nc-OS, and a CAAC-OS.

[0320] <Transistors containing oxide semiconductors> Next, a case where the oxide semiconductor is used in a transistor will be described.

[0321] By using the oxide semiconductor for a transistor, a transistor with high field-effect mobility and high reliability can be realized.

[0322] For the transistor, an oxide semiconductor with a low carrier concentration is preferably used. For example, the carrier concentration of the oxide semiconductor is 1×10 17 cm -3 Less than 1 × 10 15 cm -3 or less, more preferably 1 × 10 13 cm -3 Less than or equal to 1×10 11 cm -3 or less, more preferably 1 × 10 10 cm -3 Less than 1 x 10 -9 cm -3 The above is the case. Note that in order to reduce the carrier concentration of an oxide semiconductor film, the impurity concentration in the oxide semiconductor film may be reduced to reduce the density of defect states. In this specification and the like, a semiconductor having a low impurity concentration and a low density of defect states is referred to as a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor. Note that an oxide semiconductor having a low carrier concentration may also be referred to as a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor.

[0323] A highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states, and therefore, the density of trap states may also be low.

[0324] Charges trapped in the trap states of an oxide semiconductor take a long time to dissipate and may behave like fixed charges. Therefore, a transistor in which a channel formation region is formed in an oxide semiconductor with a high density of trap states may have unstable electrical characteristics.

[0325] Therefore, in order to stabilize the electrical characteristics of a transistor, it is effective to reduce the impurity concentration in the oxide semiconductor. Furthermore, in order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in a nearby film. The impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, and the like.

[0326] <Impurities> Here, the influence of each impurity in an oxide semiconductor will be described.

[0327] When an oxide semiconductor contains silicon or carbon, which is one of the Group 14 elements, defect levels are formed in the oxide semiconductor. Therefore, the concentration of silicon or carbon in the oxide semiconductor and the concentration of silicon or carbon near the interface with the oxide semiconductor (concentration obtained by secondary ion mass spectrometry (SIMS)) are calculated to be 2×10 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following applies.

[0328] When an oxide semiconductor contains an alkali metal or alkaline earth metal, defect levels may be formed and carriers may be generated. Therefore, a transistor using an oxide semiconductor containing an alkali metal or alkaline earth metal is likely to have normally-on characteristics. For this reason, when the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor obtained by SIMS is 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 Do the following:

[0329] When nitrogen is contained in an oxide semiconductor, electrons serving as carriers are generated, the carrier concentration increases, and the semiconductor is likely to become n-type. As a result, a transistor using an oxide semiconductor containing nitrogen as a semiconductor tends to have normally-on characteristics. Alternatively, when nitrogen is contained in an oxide semiconductor, trap states may be formed. As a result, the electrical characteristics of the transistor may become unstable. For this reason, the nitrogen concentration in the oxide semiconductor obtained by SIMS is set to 5×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm3 Less than 5 × 10, more preferably 17 atoms / cm 3 Do the following:

[0330] Hydrogen contained in an oxide semiconductor reacts with oxygen bonded to a metal atom to form water, which may form an oxygen vacancy. When hydrogen enters the oxygen vacancy, electrons serving as carriers may be generated. Furthermore, some of the hydrogen may bond with oxygen bonded to a metal atom to generate electrons serving as carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen is likely to have normally-on characteristics. For this reason, it is preferable to reduce the amount of hydrogen in the oxide semiconductor as much as possible. Specifically, when the hydrogen concentration in an oxide semiconductor obtained by SIMS is 1×10 20 atoms / cm 3 Less than 1 x 10 19 atoms / cm 3 less than 5 × 10 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 Make it less than.

[0331] When an oxide semiconductor with sufficiently reduced impurities is used for a channel formation region of a transistor, stable electrical characteristics can be obtained.

[0332] This embodiment mode can be implemented by appropriately combining at least a part thereof with other embodiment modes or examples described in this specification.

[0333] (Embodiment 3) In this embodiment, an electronic device including a display device according to one embodiment of the present invention will be described.

[0334] FIG. 34A is a diagram showing the appearance of the head mounted display 8200.

[0335] The head-mounted display 8200 includes a mounting portion 8201, a lens 8202, a main body 8203, a display portion 8204, and a cable 8205. The mounting portion 8201 has a built-in battery 8206.

[0336] A cable 8205 supplies power from a battery 8206 to the main body 8203. The main body 8203 includes, for example, a wireless receiver, and can display, for example, an image corresponding to received image data on a display portion 8204. In addition, a camera provided in the main body 8203 captures the movement of the user's eyeballs or eyelids, and calculates the coordinates of the user's line of sight based on the information, thereby allowing the user's line of sight to be used as an input means.

[0337] The wearing unit 8201 may be provided with a plurality of electrodes at positions that come into contact with the user. The main body 8203 may have a function of recognizing the user's line of sight by detecting a current flowing through the electrodes in accordance with the movement of the user's eyeballs. The main body 8203 may also have a function of monitoring the user's pulse by detecting the current flowing through the electrodes. The wearing unit 8201 may also have various sensors such as a temperature sensor, a pressure sensor, or an acceleration sensor, and may have a function of displaying biological information of the user on the display unit 8204. For example, the movement of the user's head may be detected, and an image displayed on the display unit 8204 may be changed in accordance with the movement.

[0338] The display device of one embodiment of the present invention can be applied to the display portion 8204. Accordingly, high-quality images can be displayed on the display portion 8204.

[0339] 34B, 34C, and 34D are diagrams showing the appearance of a head mounted display 8300. The head mounted display 8300 includes a housing 8301, a display unit 8302, a band-shaped fixture 8304, and a pair of lenses 8305. A battery 8306 is built into the housing 8301, and power can be supplied from the battery 8306 to, for example, the display unit 8302.

[0340] A user can view the display on the display portion 8302 through the lens 8305. Note that it is preferable to arrange the display portion 8302 in a curved manner. By arranging the display portion 8302 in a curved manner, a user can feel a high sense of presence. Note that although the configuration in which one display portion 8302 is provided has been illustrated in this embodiment, the present invention is not limited thereto, and for example, a configuration in which two display portions 8302 are provided may also be used. In this case, if one display portion is provided for one eye of the user and the other display portion is provided for the other eye, it becomes possible to perform three-dimensional display using parallax, for example.

[0341] Note that the display device of one embodiment of the present invention can be applied to the display portion 8302. Accordingly, high-quality images can be displayed in the display portion 8302.

[0342] Next, an example of an electronic device different from the electronic device shown in FIGS. 34A to 34D is shown in FIGS. 35A and 35B.

[0343] The electronic device shown in Figures 35A and 35B has a housing 9000, a display unit 9001, a speaker 9003, operation keys 9005 (including a power switch or an operation switch), a connection terminal 9006, a sensor 9007 (including a function to measure force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared rays), and a battery 9009.

[0344] The electronic device shown in FIGS. 35A and 35B has various functions. For example, it may have a function to display various information (still images, videos, text images, etc.) on a display unit, a touch panel function, a function to display a calendar, date, or time, a function to control processing using various software (programs), a wireless communication function, a function to connect to various computer networks using the wireless communication function, a function to send or receive various data using the wireless communication function, a function to read programs or data recorded on a recording medium and display them on a display unit, etc. Note that the functions that the electronic device shown in FIGS. 35A and 35B can have are not limited to these, and it may have various other functions. Also, although not shown in FIGS. 35A and 35B, the electronic device may be configured to have multiple display units. Furthermore, the electronic device may be equipped with a camera or the like to capture still images, capture videos, save the captured images on a recording medium (external or built-in to the camera), display the captured images on a display unit, etc.

[0345] The electronic device shown in FIGS. 35A and 35B will be described in detail below.

[0346] FIG. 35A is a perspective view showing a mobile information terminal 9101. The mobile information terminal 9101 has one or more functions selected from, for example, a telephone, a notebook, an information viewing device, and the like. Specifically, it can be used as a smartphone. The mobile information terminal 9101 can display text or images on multiple surfaces thereof. For example, operation buttons 9050 (also referred to as operation icons or simply icons) can be displayed on one surface of the display unit 9001. Information 9051, indicated by a dashed rectangle, can be displayed on the other surface of the display unit 9001. Examples of the information 9051 include a display notifying an incoming email, SNS (social networking service), or phone call, the title of the email or SNS, the name of the sender of the email or SNS, the date and time, the remaining battery level, and the strength of the antenna reception. Alternatively, the operation buttons 9050, etc., may be displayed in place of the information 9051.

[0347] The display device of one embodiment of the present invention can be applied to the portable information terminal 9101. Accordingly, high-quality images can be displayed on the display portion 9001.

[0348] FIG. 35B is a perspective view showing a wristwatch-type mobile information terminal 9200. The mobile information terminal 9200 can execute various applications such as mobile phone calls, e-mail, document browsing and creation, music playback, internet communication, and computer games. The display unit 9001 has a curved display surface, and can display information along the curved display surface. FIG. 35B shows an example in which time 9251, operation buttons 9252 (also referred to as operation icons or simply icons), and content 9253 are displayed on the display unit 9001. The content 9253 can be, for example, a video.

[0349] The mobile information terminal 9200 can also perform short-distance wireless communication according to a communication standard. For example, hands-free conversation is also possible by mutual communication with a wireless headset. The mobile information terminal 9200 also has a connection terminal 9006, and can directly exchange data with other information terminals via a connector. Charging can also be performed via the connection terminal 9006. Note that charging may also be performed by wireless power supply without using the connection terminal 9006.

[0350] The display device of one embodiment of the present invention can be applied to the portable information terminal 9200. This allows high-quality images to be displayed on the display portion 9001.

[0351] This embodiment mode can be implemented by appropriately combining at least a part thereof with other embodiment modes or examples described in this specification. [Example]

[0352] In this example, a sample was prepared and images were taken using a scanning transmission electron microscope (STEM).

[0353] 36A to 36C are diagrams illustrating a method for fabricating a sample according to this example. In this example, a 500 nm silicon oxynitride layer was first formed on substrate 151, which is a semiconductor substrate (silicon substrate) made of silicon, by PECVD (FIG. 36A). This silicon oxynitride layer is referred to as layer 153A.

[0354] Next, layer 153A was processed by etching so that an opening having a length L1 of 90 nm in the cross-sectional direction was formed in layer 153A, thereby forming insulating layer 153 (FIG. 36B).

[0355] Thereafter, a 20 nm silicon nitride layer was formed at room temperature using a sputtering method. This silicon nitride layer was used as insulating layer 155. Next, a 50 nm aluminum oxide layer was formed at 100°C using an ALD method. This aluminum oxide layer was used as protective layer 157. Thereafter, a 50 nm silicon nitride layer was formed at room temperature using a sputtering method. This silicon nitride layer was used as protective layer 159 (Figure 36C). A sample was fabricated using the above method.

[0356] 37A is a scanning transmission electron microscope (STEM) image of a cross section of the prepared sample. As shown in FIG. 37A, it was confirmed that voids 160 were formed in the sample according to this example so as to be surrounded by protective layer 157.

[0357] Figure 37B1 is an enlarged view of region 161 shown in Figure 37A. The thickness L2 of insulating layer 155 on insulating layer 153, the thickness L3 of protective layer 157, and the thickness L4 of protective layer 159 were 20 nm, 48 nm, and 45 nm, respectively.

[0358] Fig. 37B2 is an enlarged view of region 162 shown in Fig. 37A. The length L5 of protective layer 157 in the cross-sectional direction was 29 nm.

[0359] At least a part of this embodiment can be implemented in appropriate combination with other embodiment modes or embodiments described in this specification. [Explanation of symbols]

[0360] 10: display device, 20B: light-emitting element, 20G: light-emitting element, 20R: light-emitting element, 20: light-emitting element, 21A: layer, 21: lower electrode, 23a: EL layer, 23A: layer, 23B: EL layer, 23b: EL layer, 23G: EL layer, 23R: EL layer, 23: EL layer, 25A: layer, 25: upper electrode, 30a: gap, 30b: gap, 30: gap, 31: protective layer, 32A: layer, 32: protective layer, 33: protective layer, 34: protective layer, 35: microlens array, 36A: layer, 36: protective layer, 37: partition wall, 38: insulating layer, 39: protective layer, 41: adhesive layer, 43: light-shielding layer, 45: insulating layer, 47: Substrate, 49B: colored layer, 49G: colored layer, 49R: colored layer, 49: colored layer, 50B: pixel, 50G: pixel, 50R: pixel, 50: pixel, 51: light, 61: insulating layer, 63: conductive layer, 65: conductive layer, 67: conductive layer, 69: conductive layer, 70: transistor, 71: insulating layer, 80: transistor, 81: substrate, 82: conductive layer, 83: insulating layer, 85a: low resistance region, 85b: low resistance region, 86: element isolation layer, 87: semiconductor layer, 88: insulating layer, 91: sealing material, 93: connection electrode, 95: anisotropic conductive layer, 97: FPC, 100: display unit, 101: scanning line driving circuit, 103: detector data line driving circuit, 105: wiring, 107: wiring, 110: pixel circuit, 111: transistor, 113: transistor, 115: capacitor, 117: node, 119: node, 121: layer, 123: layer, 125: layer, 131: insulating layer, 133: insulating layer, 135: insulating layer, 137: insulating layer, 140: transistor, 151: substrate, 153A: layer, 153: insulating layer, 155: insulating layer, 157: protective layer, 159: protective layer, 160: gap, 161: region, 162: region, 205a: conductor, 205b: conductor, 205c: conductor, 205: conductor, 214: insulator, 21 6: insulator, 222: insulator, 224: insulator, 230a: metal oxide, 230b: metal oxide, 230c: metal oxide, 230: metal oxide, 240a: conductor, 240b: conductor, 240: conductor, 241a: insulator, 241b: insulator, 241: insulator, 242a: conductor, 242b: conductor, 242: conductor, 250: insulator, 254: insulator, 260a: conductor, 260b: conductor, 260: conductor, 274: insulator, 280: insulator, 281: insulator, 4411: light-emitting layer, 4412: light-emitting layer, 4413: light-emitting layer, 4420: layer, 4430: layer,8200: Head-mounted display, 8201: Mounting part, 8202: Lens, 8203: Main body, 8204: Display part, 8205: Cable, 8206: Battery, 8300: Head-mounted display, 8301: Housing, 8302: Display part, 8304: Fixture, 8305: Lens, 8306: Battery, 9000: Housing, 9001: Display part, 9003: Speaker, 9005: Operation keys, 9006: Connection terminal, 9007: Sensor, 9009: Battery, 9050: Operation buttons, 9051: Information, 9101: Portable information terminal, 9200: Portable information terminal, 9251: Time, 9252: Operation buttons, 9253: Content,

Claims

[Claim 1] a flexible substrate; a first light-emitting element, a second light-emitting element, a gap, a first light-collecting portion, and a second light-collecting portion on the flexible substrate; the first light collecting portion is provided at a position overlapping the first light emitting element, the second light collecting portion is provided at a position overlapping the second light emitting element, the gap is provided between the first light-emitting element and the second light-emitting element, and is provided at a position overlapping with a region between the first light-collecting portion and the second light-collecting portion.

Images