Light-emitting device

Abstract

To provide a light-emitting device that can suppress breaking of the hermetic seal of a light-emitting element, and a manufacturing method thereof.SOLUTION: A light-emitting device includes: a substrate structure 11 having a first substrate 21 comprising single-crystal silicon and including a first insulating film 24 that is a thermally-oxidized film formed on upper and lower surfaces thereof, and a second substrate 22 comprising single-crystal silicon, bonded to the upper surface of the first substrate 21, and having an opening exposing one area on the upper surface of the first substrate 21; a light-emitting element 13 disposed across a first upper surface electrode 31 and a second upper surface electrode 32 on the one area; and a translucent member 15 with translucency formed on an upper surface of the second substrate 22 and sealing a space including the opening. Respective <110> orientations of silicon crystals of the first substrate 21 and the second substrate 22 are offset from one another in a planar view from a direction perpendicular to the upper surface of the first substrate.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a light emitting device. [Background technology]

[0002] As a light emitting device that irradiates ultraviolet light, a light emitting device that uses a semiconductor light emitting element such as a light emitting diode (LED) as a light source has been disclosed. For example, Patent Document 1 discloses a light emitting device in which a light emitting element made of aluminum gallium nitride (AlGaN) is placed on a mounting substrate and the light emitting element is hermetically sealed on the mounting substrate with a translucent member. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2022-040769 Summary of the Invention [Problem to be solved by the invention]

[0004] In the light-emitting device disclosed in Patent Document 1, for example, the temperature rise and fall process during mounting of the light-emitting element on the mounting substrate may cause cracks in the mounting substrate due to the difference in thermal expansion coefficient between the mounting substrate and the electrodes provided on the mounting substrate.

[0005] For example, if a crack occurs in the mounting substrate, the crack may spread across the surface exposed to the space hermetically sealed by the translucent member and the surface exposed to the external space, causing the gas that hermetically seals the light-emitting element to leak and allowing gas from the external space, i.e., outside air, to enter the hermetically sealed space. This can cause problems such as early deterioration of the light-emitting element due to exposure to humid outside air.

[0006] The present invention has been made in view of the above-mentioned points, and has an object to provide a light emitting device that can prevent the airtight sealing of a light emitting element from being broken. [Means for solving the problem]

[0007] The light emitting device according to the present invention comprises a substrate structure including a first substrate made of single crystal silicon including thermal oxide films formed on its upper and lower surfaces, and a second substrate made of single crystal silicon bonded to the upper surface of the first substrate and having an opening exposing one region of the upper surface of the first substrate, the first substrate having a first through-hole group including one or more through-holes penetrating from a first partial region within the one region to the lower surface of the first substrate, and a second through-hole group including one or more through-holes penetrating from a second partial region within the one region to the lower surface of the first substrate, the second through-hole group being arranged so as to form a gap extending along one direction between the first partial region and the second partial region within the one region; a first upper surface electrode formed on a first group of through holes in the first region; a second upper surface electrode formed on a second group of through holes in the first region so as to face the first upper surface electrode; a light emitting element provided on the first region so as to straddle the first upper surface electrode and the second upper surface electrode; a first lower surface electrode formed on the first group of through holes on the lower surface of the first substrate; a second lower surface electrode formed on the second group of through holes on the lower surface of the first substrate so as to face the first lower surface electrode; and a light-transmitting member formed on the upper surface of the second substrate and sealing a space including the opening, wherein, in a plan view perpendicular to the upper surface of the first substrate, the first substrate and the second substrate are made of silicon crystals <110> They are characterized by their misaligned orientations. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a top view of a light emitting device according to Example 1 of the present invention. [Figure 2] FIG. 1 is a cross-sectional view of a light emitting device according to a first embodiment of the present invention. [Figure 3] 1 is a cross-sectional view of a step during the manufacturing of the light emitting device according to Example 1 of the present invention. [Figure 4]1 is a top view of a light emitting device according to a first embodiment of the present invention at one step during manufacturing. [Figure 5] 1 is a top view of a light emitting device according to a first embodiment of the present invention at one step during manufacturing. [Figure 6] 1 is a cross-sectional view of a step during the manufacturing of the light emitting device according to Example 1 of the present invention. [Figure 7] 1 is a cross-sectional view of a step during the manufacturing of the light emitting device according to Example 1 of the present invention. [Figure 8] 1 is a cross-sectional view of a step during the manufacturing of the light emitting device according to Example 1 of the present invention. [Figure 9] 1 is a cross-sectional view of a step during the manufacturing of the light emitting device according to Example 1 of the present invention. [Figure 10] 1 is a cross-sectional view of a step during the manufacturing of the light emitting device according to Example 1 of the present invention. [Figure 11] 1 is a cross-sectional view of a step during the manufacturing of the light emitting device according to Example 1 of the present invention. [Figure 12] 1 is a cross-sectional view of a step during the manufacturing of the light emitting device according to Example 1 of the present invention. [Figure 13] 1 is a cross-sectional view of a step during the manufacturing of the light emitting device according to Example 1 of the present invention. [Figure 14] 1 is a cross-sectional view of a step during the manufacturing of the light emitting device according to Example 1 of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0009] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In the following description and accompanying drawings, substantially the same or equivalent parts are designated by the same reference numerals. [Example]

[0010] [Outline of Light-Emitting Device 100] The configuration of a light emitting device 100 according to Example 1 will be described with reference to Figures 1 and 2. Figure 1 is a top view of the light emitting device 100 according to Example 1. Figure 2 is a cross-sectional view of the light emitting device 100 shown in Figure 1 taken along line 2-2.

[0011] The light emitting device 100 is configured to include a substrate structure 11, a light emitting element 13 arranged on the substrate structure 11, and a light-transmitting member 15 that hermetically seals the light emitting element 13 on the substrate structure 11. Note that the light-transmitting member 15 is omitted in Fig. 1 to clearly show the structure and positional relationship of each component. Furthermore, in Fig. 2, the explanation will be given assuming that the up-down direction in the figure is the height direction of the light emitting device 100 and the left-right direction in the figure is the width direction of the light emitting device 100.

[0012] [Substrate structure 11] First, we will explain the configuration of the substrate structure 11. The substrate structure 11 has a first substrate 21 that is a flat plate with a rectangular upper surface shape, and a frame-shaped second substrate 22 that is formed along the outer edge of the upper surface of the first substrate 21 and has an opening 22O that exposes a central area CA (hereinafter also referred to as the central area CA) of the upper surface of the first substrate 21. In other words, the substrate structure 11 is a concave structure that is configured so that the central area CA of the first substrate 21 is exposed by the second substrate 22.

[0013] In the substrate structure 11, the first substrate 21 and the second substrate 22 are both silicon substrates made of single-crystal silicon (Si) whose main surfaces are (100) planes. The substrate structure 11 is a so-called SOI (Silicon On Insulator) substrate in which the first substrate 21 and the second substrate 22 are bonded together via a first insulating film 24, which is a buried oxide film (BOX).

[0014] In the SOI substrate, the first insulating film 24 is a thermal oxide film made of silicon oxide (SiO 2 ) formed on the upper surface of the first substrate 21 by subjecting the first substrate 21 to a thermal oxidation treatment.

[0015] The first substrate 21 has a plurality of through holes 21H that each penetrate the first substrate 21 from a central region CA of the upper surface of the first substrate 21 exposed from the second substrate 22 to the lower surface of the first substrate 21.

[0016] 1, the plurality of through holes 21H are divided into a first through hole group TG1 arranged in a left region within the central region CA of the first substrate 21 and a second through hole group TG2 arranged in a right region within the central region CA and spaced apart from the first through hole group TG1. In other words, the first through hole group TG1 and the second through hole group TG2 are respectively formed in a first partial region within the central region CA and a second partial region arranged so as to form a gap G extending in the up-down direction in FIG. 1 between the first partial region and the second partial region.

[0017] In each of the first through-hole group TG1 and the second through-hole group TG2, the plurality of through-holes 21H are arranged in a regular triangular lattice pattern. In the light emitting device 100, the spacing between the through-holes 21H is the same in the first through-hole group TG1 and the second through-hole group TG2, and the first through-hole group TG has a larger area where the through-holes 21H are formed than the second through-hole group TG2. As a result, the first through-hole group TG1 has a larger number of through-holes 21H than the second through-hole group TG2.

[0018] As described above, the first substrate 21 has the first insulating film 24 formed in a region of the upper surface of the first substrate 21 facing the lower surface of the second substrate 22, i.e., in a region overlapping with the second substrate 22 in a top view. In addition, the first substrate 21 has the second insulating film 25 formed from the central region CA to the inner side surfaces of each of the through holes 21H and the lower surface of the first substrate 21.

[0019] That is, on the upper surface of the first substrate 21, a second insulating film 25 is formed in a central region CA, which is one region, and a first insulating film 24 is formed in another region surrounding the central region CA. Like the first insulating film 24, the second insulating film 25 is an insulating film made of SiO2 formed by subjecting the first substrate 21 to a thermal oxidation treatment.

[0020] The first substrate 21 has columnar through electrodes 26 made of Cu that are filled inside each of the through holes 21H via a second insulating film 25 so as to penetrate the first substrate 21. That is, the through electrodes 26 are insulated from each other by the second insulating film 25 formed on the inner surface of each of the through holes 21H, and are exposed from a central region CA of the upper surface of the first substrate 21 and the lower surface of the first substrate 21.

[0021] The first substrate 21 has a first lower surface electrode 28 and a second lower surface electrode 29, each having a rectangular upper surface shape, formed and spaced apart from each other on the lower surface of the first substrate 21. When viewed from a direction perpendicular to the lower surface of the first substrate 21, the first lower surface electrode 28 is electrically connected to each of the through electrodes 26 arranged in the through holes 21H belonging to the first through hole group TG1 so as to cover each of the through holes 21H.

[0022] Further, the second lower surface electrode 29 is electrically connected to each of the through electrodes 26 arranged in the through holes 21H so as to cover each of the through holes 21H belonging to the second through hole group TG2 when viewed from a direction perpendicular to the lower surface of the first substrate 21. That is, the first lower surface electrode 28 and the second lower surface electrode 29 are arranged with a gap G extending in the up-down direction in FIG.

[0023] The first lower electrode 28 and the second lower electrode 29 are formed by laminating titanium (Ti), copper (Cu), nickel (Ni), and gold (Au) in this order from the lower surface side of the first substrate 21. The first lower electrode 28 and the second lower electrode 29 function as mounting electrodes when the light emitting device 100 is mounted on a mounting substrate (not shown).

[0024] The first substrate 21 has a first upper surface electrode 31 and a second upper surface electrode 32, each having a rectangular upper surface shape, formed to be spaced apart from each other in a central region CA of the upper surface of the first substrate 21. When viewed from a direction perpendicular to the upper surface of the first substrate 21, the first upper surface electrode 31 is electrically connected to each of the through electrodes 26 arranged in the through holes 21H belonging to the first through hole group TG1 so as to cover each of the through holes 21H.

[0025] Moreover, the second upper surface electrode 32 is electrically connected to each of the through electrodes 26 arranged in the through holes 21H so as to cover each of the through holes 21H belonging to the second through hole group TG2 when viewed from a direction perpendicular to the upper surface of the first substrate 21. That is, the first upper surface electrode 31 and the second upper surface electrode 32 are arranged with a gap G extending in the up-down direction in FIG.

[0026] Therefore, the first upper surface electrode 31 is electrically connected to the first lower surface electrode 28 via each of the through electrodes 26 in the first through hole group TG1. The second upper surface electrode 32 is electrically connected to the second lower surface electrode 29 via each of the through electrodes 26 in the second through hole group TG2. The first upper surface electrode 31 and the second upper surface electrode 32 are formed by laminating Ti / Cu / Ni in this order from the upper surface side of the first substrate 21.

[0027] The Cu film included in each of the first lower electrode 28, the second lower electrode 29, the first upper electrode 31, and the second upper electrode 32 has a sufficient thickness to dissipate heat generated when the light-emitting element 13 described below is driven. For example, the Cu film included in each electrode has a thickness of about 20 to 30 μm.

[0028] In a plan view of the substrate structure 11 from above, the Si crystal of the first substrate 21 <110> The orientation has an angle other than 0° and 90° with respect to the extension direction of the gap G (the vertical direction in FIG. 1). <110> The orientation has an angle other than 45° with the extension direction of the gap G.

[0029] Within the (100) plane of the Si crystal, <110> Orientation and <100> Therefore, in the substrate structure 11 of the light emitting device 100, the Si crystal of the first substrate 21 <100> The orientation also has an angle with the extension direction of the gap G other than 0° and 90°.

[0030] As described above, the second substrate 22 has an opening 22O that exposes the central region CA of the upper surface of the first substrate 21. The inner surface of the second substrate 22 that forms the opening 22O is inclined so as to widen from the lower surface toward the upper surface of the second substrate 22. In other words, the recess of the substrate structure 11 has the shape of an inverted truncated quadrangular pyramid.

[0031] In the light emitting device 100, the inner surface of the second substrate 22 is inclined at an angle of approximately 54.7° with respect to the upper surface of the first substrate 21. The (111) plane of the Si crystal appears on the inner surface inclined at this angle.

[0032] In a plan view of the substrate structure 11 from above, the Si crystal of the second substrate 22 <110> The orientation of the first substrate 21 is at an angle of 0° or 90° with respect to the direction of extension of the gap G. <110> Since the orientation and the extension direction of the gap G have an angle other than 0° and 90° as described above, in a plan view of the substrate structure 11 viewed from above, the first substrate 21 and the second substrate 22 are <110> The directions are different from each other.

[0033] The second substrate 22 has a thermal oxide film 34 formed on the top surface and inner surface thereof. Like the first insulating film 24, the thermal oxide film 34 is an insulating film made of SiO2 and formed by subjecting the second substrate 22 to a thermal oxidation treatment.

[0034] [Light-emitting element 13] Next, the configuration of the light-emitting element 13 will be described. The light-emitting element 13 is a light-emitting diode with a rectangular top surface provided in a central region CA of the top surface of the first substrate 21. In other words, the light-emitting element 13 is provided on the bottom surface of a recess in the substrate structure 11. The light-emitting element 12 is configured to include a semiconductor structure layer 41, a transparent substrate 42, an n-electrode 43, and a p-electrode 44.

[0035] The semiconductor structure layer 41 is a semiconductor laminate including an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer (none of which are shown), each of which is made primarily of AlGaN. When the light emitting device 100 is driven, the light emitting layer of the semiconductor structure layer 41 emits light having a wavelength in the deep ultraviolet region, for example, a wavelength of 100 to 280 nm.

[0036] The transparent substrate 42 is a flat substrate provided on the semiconductor structure layer 41. The transparent substrate 42 is made of a material such as aluminum nitride (AlN) that is transparent to ultraviolet light emitted from the light emitting layer of the semiconductor structure layer 41. The transparent substrate 42 also serves as a growth substrate for growing semiconductor crystals that will become the semiconductor structure layer 41 described above.

[0037] The n-electrode 43 and the p-electrode 44 are electrodes formed by plating Cu with Au, which is connected to the n-type semiconductor layer and the p-type semiconductor layer, respectively, of the semiconductor structure layer 41. The n-electrode 43 and the p-electrode 44 are bonded to the first upper surface electrode 31 and the second upper surface electrode 32, respectively, via a bonding layer 46 made of gold-tin (AuSn). That is, in the light-emitting device 100, the light-emitting element 13 is flip-chip mounted on the first substrate 21 of the substrate structure 11.

[0038] The bonding layer 46 is heated, melted, and solidified to bond the light emitting element 13 to the first upper electrode 31 and the second upper electrode 32. The Ni layer constituting the first upper electrode 31 and the second upper electrode 32 functions as a barrier layer that prevents the Cu layer below the Ni layer and the AuSn constituting the bonding layer 46 from diffusing and mixing when the bonding layer 46 is heated and melted.

[0039] [Translucent member 15] Next, the configuration of the light-transmitting member 15 will be described. The light-transmitting member 15 is a plate-like body with a rectangular upper surface that is bonded to the upper surface of the second substrate 22 via a glass bonding layer 48 made of a paste containing powdered glass frit. The light-transmitting member 15 is made of glass that is made mainly of SiO2 and that transmits deep ultraviolet light emitted from the light-emitting element 13.

[0040] In the light emitting device 100, ultraviolet light emitted from the light emitting element 13 enters the light-transmitting member 15 from the lower surface thereof and exits from the upper surface thereof. That is, the upper surface of the light-transmitting member 15 functions as a light extraction surface of the light emitting device 100.

[0041] The light-transmitting member 15 is bonded to the upper surface of the second substrate 22 via a glass bonding layer 48, thereby hermetically sealing the light-emitting element 13 disposed in the opening 22O. Specifically, the light-transmitting member 15 and the substrate structure 11 define a space SP (see FIG. 2) that is an accommodation space, and by sealing the space SP with a gas that is not altered by ultraviolet light, such as nitrogen (N2) gas, the light-emitting element 13 is prevented from being exposed to the outside air.

[0042] Note that, in bonding between the light-transmitting member 15 and the second substrate 22, a bonding layer made of, for example, AuSn may be used instead of using the glass bonding layer 48. In this case, metallized layers in which Ni and Au are laminated in this order are formed on the lower surface of the light-transmitting member 15 and the upper surface of the second substrate 22, respectively, and a layer made of AuSn is disposed between the metallized layers, thereby bonding the light-transmitting member 15 and the second substrate 22.

[0043] [Suppression of sealing gas leakage] Here, the suppression of leakage of the sealing gas sealing the light emitting element 13, which is achieved by the light emitting device 100 of this embodiment, will be described with reference to FIGS.

[0044] In the light emitting device 100, the silicon crystal of the first substrate 21 <110> As described above, the orientation has an angle excluding 0°, 45°, and 90° with respect to the extension direction of the gap G. As a result, in the light emitting device 100 of this embodiment, even if brittle fracture occurs in the second insulating film 25 formed in the central region CA on the upper surface or on the lower surface of the first substrate 21, it is possible to suppress the propagation of cracks from the second insulating film 25 into the first substrate 21.

[0045] When mounting the light-emitting element 13 on the first substrate 21, the light-emitting element 13 is placed on a bonding layer 46 made of AuSn, and the temperature is raised from room temperature to approximately 260°C to 320°C to melt and solidify the bonding layer 46, thereby bonding the light-emitting element 13 to the first upper electrode 31 and the second upper electrode 32.

[0046] Here, Cu contained in each of the first lower surface electrode 28, the second lower surface electrode 29, the first upper surface electrode 31, and the second upper surface electrode 32 has a relatively large thermal expansion coefficient and expands significantly with increasing temperature, particularly in a temperature range near the melting point of the above-mentioned bonding layer 46. On the other hand, Si constituting the first substrate 21 has a smaller thermal expansion coefficient than Cu, and therefore expands less than Cu at the same temperature.

[0047] When the light-emitting element 13 is mounted, such a situation occurs, causing the first lower electrode 28, the second lower electrode 29, the first upper electrode 31, and the second upper electrode 32 to expand and contract, resulting in thermal stress on the first substrate 21.

[0048] Specifically, for example, on the underside of the first substrate 21, when the thermally expanded first lower electrode 28 and second lower electrode 29 contract as the temperature drops, tensile stresses are generated that pull them in opposite directions relative to the first substrate 21, and on the upper side of the first substrate 21, when the thermally expanded first upper electrode 31 and second upper electrode 32 contract as the temperature drops, tensile stresses are generated that pull them in opposite directions relative to the first substrate 21.

[0049] When such tensile stress occurs in the first substrate 21, a large force is likely to be applied to, for example, the area AR shown surrounded by the two-dot chain line in Figure 2, i.e., the area between the first bottom electrode 28 and the second bottom electrode 29 and the area between the first top electrode 31 and the second top electrode 32.

[0050] For example, when the first substrate 21 is subjected to the above-mentioned tensile stress, the fracture toughness value of SiO2 is 0.3 MPa m 1 / 2Since the area AR is relatively small, brittle fracture occurs in the second insulating film 25 in the region AR, causing a crack in the second insulating film 25. The generated crack propagates, for example, along the vertical direction in FIG. 1 through the gap G between the first through hole group TG1 and the second through hole group TG2.

[0051] Cracks tend to propagate from the second insulating film 25, which is a thermal oxide film formed by thermally oxidizing Si, to the first substrate 21 made of Si. <100> Orientation and <110> The direction parallel or perpendicular to the orientation is a direction in which, once a crack occurs in the Si crystal, the crack immediately propagates in the vertical direction in FIG. 2, and is therefore prone to cleavage.

[0052] Therefore, within the (100) plane of the Si crystal, for example, <100> Orientation and <110> If the orientation forms an angle of 0° or 90° with the extension direction of the gap G, that is, if the extension direction of the gap G is parallel or perpendicular to the crystal orientation that facilitates cleavage of the Si crystal, when a crack propagates from the second insulating film 25 to the first substrate 21 as described above, the crack may continue to propagate so as to penetrate the first substrate 21. In other words, there is a risk that the first substrate 21 may break.

[0053] Furthermore, even if a crack occurs in only one of the regions AR in FIG. 2, the crack may eventually penetrate through the first substrate 21 as it propagates from one side to the other.

[0054] For example, if a crack penetrates the first substrate 21, there is a risk that the gas that hermetically seals the light emitting element 13 may leak to the outside. If this occurs, for example, external air containing moisture may enter the space SP of the substrate structure 11, which may cause early deterioration of the light emitting element 13.

[0055] In the light emitting device 100 of this embodiment, as described above, the Si crystal of the first substrate 21 <110> The orientation forms an angle excluding 0°, 45°, and 90° with the extension direction of the gap G. In other words, the extension direction of the gap G forms an angle that is neither parallel nor perpendicular to the crystal orientation in which cleavage of the Si crystal of the first substrate 21 can occur when viewed from above. This makes it difficult for cleavage to occur in the first substrate 21, even if a crack propagates from the second insulating film 25.

[0056] Therefore, according to the light-emitting device 100 of this embodiment, by using a first substrate 21 on which an electrode having a gap G at an angle that is not parallel or perpendicular to the crystal orientation in which cleavage can occur in the Si crystal, even if a crack occurs in the second insulating film 25 due to thermal stress on the first substrate 21, the crack can be prevented from progressing within the first substrate 21.

[0057] Therefore, according to the light emitting device 100 of this embodiment, it is possible to prevent the airtight seal of the light emitting element 13 from being broken, causing the sealing gas to leak and the light emitting element 13 to be exposed to humid outside air.

[0058] In the light emitting device 100 of this embodiment, the Si crystal of the second substrate 22 <110> As described above, the orientation of the second substrate 22 has an angle of 0° or 90° with respect to the direction of extension of the gap G. <110> Only the orientation is parallel or perpendicular to the extension direction of the gap G.

[0059] In manufacturing the light emitting device 100, an opening 22O exposing the (111) plane is formed in the second substrate 22 by performing crystal anisotropic etching on the second substrate 22. For example, <110> If the orientation has an angle other than 0°, 45°, or 90° with the extension direction of the gap G, as with the first substrate 21, the crystal anisotropic etching will not work well and a smooth (111) plane will not be exposed on the inner surface.

[0060] In the light emitting device 100 of this embodiment, the Si crystal of the second substrate 22 <110> Since only the orientation is parallel or perpendicular to the extension direction of gap G, a smooth (111) plane can be exposed on the inner surface where opening 22O is formed by crystal anisotropic etching. Therefore, according to light emitting device 100 of this embodiment, recesses can be formed in second substrate 22 by crystal anisotropic etching while suppressing crack propagation in first substrate 21.

[0061] Since the (111) plane of the Si crystal is an extremely smooth surface, for example, ultraviolet light emitted from the light-emitting element 13 and traveling in the left-right direction in FIG. 2 is specularly reflected by the inner surface of the second substrate 22 rather than scattered, thereby increasing the efficiency with which the light is incident on the light-transmitting member 15. In other words, the amount of light incident on the light-transmitting member 15 can be increased.

[0062] Therefore, according to the light emitting device 100 of this embodiment, by making the inner surface of the second substrate 22 a (111) plane, the amount of light incident on the light-transmitting member 15 increases, thereby improving the light extraction efficiency of the light emitting device 100.

[0063] Furthermore, according to the light emitting device 100 of this embodiment, each of the plurality of through holes 21H belonging to the first through hole group TG1 and the second through hole group TG2 is formed in the shape of a regular triangular lattice. That is, each of the plurality of through electrodes 26 is arranged on a lattice point of a regular triangle in the central region CA. Each of the plurality of through electrodes 26 is formed as a cylinder with a diameter of 30 μm, for example, and the distance between the centers of adjacent through electrodes 26 is 60 μm.

[0064] In the light-emitting device 100 of this embodiment, it is possible to form a greater number of through electrodes 26 than when the through electrodes 26 are arranged in a square lattice pattern, for example, and therefore, more heat generated when the light-emitting element 13 is driven can be released to the outside than when the through electrodes 26 are arranged in a square lattice pattern such as a square lattice.

[0065] In the light emitting device 100 of this embodiment, only the first substrate 21 of the substrate structure 11 is made of Si crystal. <110> Although the orientation has been described as having an angle other than 0°, 45°, and 90° with respect to the extension direction of the gap G, this is not limited to this. For example, <110> The orientation may also be set to an angle other than 0° or 90° with respect to the extension direction of the gap G. In this case, the opening 22O of the second substrate 22 is formed by a technique such as dry etching.

[0066] In the light emitting device 100 of this embodiment, the first substrate 21 of the substrate structure 11 is made of Si crystal. <110> Although the orientation has been described as having an angle other than 0°, 45°, and 90° with respect to the extension direction of the gap G, it is sufficient that the orientation has an angle other than at least 0° and 90°. For example, in the case of a Si crystal, <110> The orientation may be at an angle of 45° with respect to the extension direction of the gap G. That is, for example, in the first substrate 21, <100> The orientation and the extension direction of the gap G may form an angle of 0° or 90°.

[0067] Here, the surface free energy of each crystal plane of Si (J / m 2 ) is, for example, 1.15 for the (111) plane, 1.41 for the (110) plane, and 1.99 for the (100) plane. The smaller the surface free energy of the crystal plane, the more easily the cleavage of the Si crystal occurs. <111> direction, <110> direction, <100> It is easier to cleave in the order of the directions. <100> Cleavage is more likely to occur than orientation <110> By at least shifting the orientation from the extension direction of the gap G, it is possible to suppress the occurrence of cleavage due to the development of cracks.

[0068] The orientation of the Si crystal plane with (100) plane orientation is <100> Orientation and <110> There are only two directions, <111> The orientation is at an angle of 54.7° from the (100) plane, so it is thought that it does not have much to do with the surface crack phenomenon.

[0069] Furthermore, in the light-emitting device 100 of this embodiment, the upper surface of the first substrate 21 is the (100) plane of a Si crystal, but this is not limited to this, and for example, the upper surface of the first substrate 21 may be the (111) plane of a Si crystal.

[0070] In the light emitting device 100 of this embodiment, a plurality of through holes 21H are formed in each of the first through hole group TG1 and the second through hole group TG2 in the first substrate 21, but this is not limited thereto, and the number of through holes 21H may be one in each through hole group. In this case, the diameter of one through hole 21H may be set to be large.

[0071] [verification] Here, we will explain the verification performed on the light emitting device 100 of this example and the verification results. In this verification, a 2.6 mm square silicon substrate simulating the first substrate 21 was prepared, an insulating film made of SiO2 and having a thickness of 0.3 μm was formed on the top and bottom surfaces of the prepared silicon substrate, and two Cu electrodes each having a thickness of 25 μm were formed spaced apart only on the bottom surface of the silicon substrate, i.e., a sample having the gap G in the light emitting device 100 was used.

[0072] In this verification, the Si crystal <110> The first sample was a sample using a silicon substrate whose orientation was at an angle of 10° to the extension direction of the gap G. <110> A sample using a silicon substrate whose orientation was parallel to the extension direction of the gap G was designated as the second sample.

[0073] In addition, the Si crystal <110> The orientation of the Si crystal is at an angle of 45° to the direction of the gap G. <100> The third sample was a sample using a silicon substrate whose orientation was parallel to the extension direction of the gap G. That is, the first, second, and third samples were different in the orientation of the Si crystal. <110> Only the orientation is different.

[0074] In this verification, 27 samples each of the first, second and third samples described above were prepared, and each sample was placed on a hot plate heated to 260°C for 2 minutes, then placed on a heat sink to rapidly cool, and the presence or absence of cracks in the silicon substrate was confirmed using an optical microscope.

[0075] The number of samples in which cracks occurred in this verification, Sample 1, Sample 2, and Sample 3, is shown in Table 1. From the results shown in Table 1, it can be seen that no cracks were found in any of the 27 samples of Sample 1. On the other hand, in Sample 2 (Comparative Example 1), cracks were found in 15 of the 27 samples, and in Sample 3 (Comparative Example 2), cracks were found in 2 of the 27 samples.

[0076] [Table 1]

[0077] From the above results, the Si crystal <110> It can be seen that by using a silicon substrate configured so that its orientation forms an angle other than 0°, 45°, and 90° with respect to the extension direction of the gap G, cracks do not occur in the silicon substrate.

[0078] Also, for example, in the case of a Si crystal <110> Even if the orientation of the gap G has an angle of 45° with the extension direction of the gap G, <110> It can be seen that the occurrence of cracks can be suppressed compared to when the orientation is parallel or perpendicular to the extension direction of the gap G.

[0079] Therefore, as in the light emitting device 100, <110> By using a first substrate 21 configured so that its orientation has an angle with respect to the gap G other than 0°, 45°, and 90°, it is possible to prevent cracks from occurring in the first substrate 21, for example, when mounting the light-emitting element 13.

[0080] [Method of manufacturing a light-emitting device] Next, a method for manufacturing the light emitting device 100 according to Example 1 of the present application will be described with reference to Figures 2 to 14. Each of Figures 3 and 6 to 14 is a cross-sectional view at one step during the manufacturing of the light emitting device 100. In each of Figures 3 and 6 to 14, the cross section taken along line 2-2 shown in Figure 1 will be used for the description, as in Figure 2.

[0081] In this embodiment, the light emitting device 100 is manufactured in a wafer level package (WLP) manner in which a plurality of light emitting devices 100 are manufactured collectively on a wafer-shaped substrate structure 11, and then the light emitting devices 100 are diced into individual pieces. Each of Figures 3 to 14 shows division lines CL, which are division lines for dividing the light emitting devices 100 into individual pieces by dicing.

[0082] 3, a substrate structure 11 is prepared in which a first substrate 21 made of single crystal Si and a second substrate 22 made of single crystal Si are bonded together, the first substrate 21 having a first insulating film 24 made of SiO2 formed on its upper surface as a buried oxide film (Step S1: Substrate structure preparation step). Note that a SiO2 film, which is a natural oxide film, is formed on the lower surface of the first substrate 21 and the upper surface of the second substrate 22, but the natural oxide film is not shown in the present description.

[0083] Here, the substrate structure 11 shown in Fig. 3 will be described with reference to Fig. 4 and Fig. 5. Fig. 4 is a top view of the silicon wafer 21Wa, which is the base material of the first substrate 21. Fig. 5 is a top view of the silicon wafer 22Wa, which is the base material of the second substrate 22.

[0084] The substrate structure 11 in the light emitting device 100 of this embodiment is manufactured by bonding a silicon wafer 21Wa and a silicon wafer 22Wa together and then dicing them in the final process. The silicon wafer 21Wa is made of a silicon crystal as shown in FIG. <110> The orientation is configured to have an angle θ with an orientation flat OF1 provided on the silicon wafer 21Wa that is an angle other than 0°, 45°, and 90°.

[0085] As a result, when electrodes are formed on the upper or lower surface of the silicon wafer 21Wa along the parting lines CL in a process to be described later, the Si crystal <110> The angle between the azimuth and the direction in which the gap G extends is angle θ.

[0086] As shown in FIG. 5, the silicon wafer 22Wa is a silicon crystal. <110> The orientation is configured to be parallel to the orientation flat OF2 provided on the silicon wafer 22Wa. As a result, when an electrode is formed on the upper or lower surface of the silicon wafer 21Wa along the parting line CL in a process described later, the orientation of the Si crystal is <110> The orientation and the extension direction of the gap G described above are parallel to each other.

[0087] The orientation flat OF1 on the silicon wafer 21Wa is <110> The angle θ between the orientation and the silicon wafer 21Wa is preferably set to 2.5° to 42.5° or 47.5° to 87.5°, taking into consideration the precision tolerance when forming the orientation flat OF1 on the silicon wafer 21Wa.

[0088] 6, etching is performed from the underside of the first substrate 21 to form a plurality of columnar holes 21HA that will become a plurality of through holes 21H in a step described later (step S2: hole forming step). Each of the plurality of holes 21HA is formed using, for example, deep reactive ion etching (DREI) according to the Bosch process. In forming the plurality of holes 21HA, the first insulating film 24 functions as an etching stop layer.

[0089] Although not shown, this process includes a step of applying photoresist to the lower surface of first substrate 21 and a step of removing the photoresist after etching to form multiple holes 21HA.

[0090] 7, a thermal oxide film 34A made of SiO2 is formed from the lower surface of first substrate 21 to the inner surfaces of holes 21HA and over the upper surface of first substrate 21 by wet thermal oxidation, which involves heating at 1100°C in a water vapor atmosphere for 7 hours or more (step S3: thermal oxide film formation step). The thermal oxide film 34A formed in this step serves as an etching stop layer on the inner surfaces of holes 21HA when etching is performed in the next step.

[0091] 8, wet etching is performed using a tetramethylammonium hydroxide aqueous solution (TMAH) until the first insulating film 24 formed on the upper surface of the first substrate 21 is exposed from the upper surface of the second substrate 22, thereby forming an opening 22O (step S4: opening formation step). That is, a recess is formed in the substrate structure 11. In forming the opening 22O, the first insulating film 24 functions as an etching stop layer.

[0092] In this process, as described above, so-called crystal anisotropic etching is performed, which utilizes the difference in etching rate depending on the crystal plane of Si. As a result, as the etching progresses, the (111) plane appears on the inner surface of the second substrate 22, which is less susceptible to etching than the (100) plane, i.e., has a slower etching rate.

[0093] 9, the thermal oxide film 34A and the first insulating film 24 exposed in the central region CA of the upper surface of the first substrate 21 are removed using buffered hydrofluoric acid (BHF) (step S5: oxide film removal step). By removing the first insulating film 24 exposed in the central region CA of the upper surface of the first substrate 21, each of the holes 21HA formed in step S2 communicates with the central region CA, forming a plurality of through-holes 21H. Furthermore, this step leaves the first insulating film 24 only in the peripheral region surrounding the central region CA of the upper surface of the first substrate 21.

[0094] 10, a second insulating film 25 is formed over the central region CA of the upper surface of the first substrate 21, the inner surfaces of the through holes 21H, and the lower surface of the first substrate 21, and a thermal oxide film 34 is formed over the upper surface and inner surfaces of the second substrate 22 (step S6: thermal oxide film formation process). The second insulating film 25 and the thermal oxide film 34 are formed, for example, by wet thermal oxidation in which the central region CA of the upper surface of the first substrate 21 and the lower surface of the first substrate 21 are masked and heated at 1100°C in a water vapor atmosphere for 7 hours or more.

[0095] 11, a plurality of through electrodes 26 made of Cu are formed inside each of the plurality of through holes 21H (step S7: through electrode forming process). The through electrodes 26 are formed, for example, by forming a seed layer (not shown) in which Ti and Cu are laminated in this order on the lower surface of the first substrate 21 and on a part of the inner surface of the through hole 21H, and then masking the lower surface of the first substrate 21, and then filling Cu onto the seed layer from the lower surface to the upper surface of the first substrate 21 by electrolytic plating.

[0096] Next, as shown in FIG. 12, a first upper surface electrode 31 and a second upper surface electrode 32 are formed in the central region CA of the upper surface of the first substrate 21, a first lower surface electrode 28 and a second lower surface electrode 29 are formed on the lower surface of the first substrate 21, and an AuSn layer 46A that serves as the base material of the bonding layer 46 is formed on the first lower surface electrode 28 and the second lower surface electrode 29 (step S8: electrode formation process).

[0097] In step S8, a seed layer (not shown) of Ti / Cu is formed by sputtering over a central region CA of the upper surface of first substrate 21, and after masking the portions excluding the respective upper surface electrodes with resist, a Cu / Ni layer and an AuSn layer 46A are respectively deposited by electrolytic plating. Thereafter, the resist used for the mask is removed, and the remaining seed layer is etched, thereby forming first upper surface electrode 31, second upper surface electrode 32, and AuSn layer 46A.

[0098] In addition, in step S8, the first lower surface electrode 28 and the second lower surface electrode 29 are formed by masking the portions of the lower surface of the first substrate 21 other than the respective lower surface electrodes with resist, and then laminating Ni / Au in this order by electrolytic plating.

[0099] 13, the light emitting element 13 is mounted in the central region CA of the upper surface of the first substrate 21 (step S9: element mounting process). The light emitting element 13 is mounted by, for example, heating the substrate structure 11 on which the light emitting element 13 is mounted at 340°C for 30 seconds in a nitrogen (N2) atmosphere, and eutectic bonding the Au layers formed on the surfaces of the n-electrode 43 and the p-electrode 44 with the AuSn layer 46A.

[0100] 14, the light-transmitting member 15 is bonded to the upper surface of the second substrate 22 (step S10: light-transmitting member bonding step). In this step, a glass bonding layer 48 is formed in advance on the light-transmitting member 15, and the light-transmitting member 15 on which the glass bonding layer 48 has been formed is disposed so as to cover the opening 22O.

[0101] In this process, the glass bonding layer 48 is applied to the lower surface of the translucent member 15 at a position corresponding to the upper surface of the second substrate 22, so as to surround the opening 22O and to a size that does not overlap with the dividing line CL of the substrate structure 11.

[0102] Thereafter, in an N2 atmosphere, laser light having a near-infrared wavelength is irradiated onto glass bonding layer 48 from above light-transmitting member 15 placed on the upper surface of second substrate 22, locally heating and melting glass bonding layer 48, thereby bonding light-transmitting member 15 to the upper surface of second substrate 22. At this time, the melted glass bonding layer 48 and the thermal oxide film 34 formed on the upper surface of second substrate 22 interdiffuse to form an interdiffusion layer (not shown). As a result, opening 22O is filled with N2, an inert gas, and a space SP is formed that is airtightly sealed.

[0103] The laser light irradiated onto the glass bonding layer 48 is scanned along the shape of the upper surface of the second substrate 22. The scanning time of the laser light is approximately 2 to 3 seconds per light emitting device 100. Therefore, in each light emitting device 100, the glass bonding layer 48 is heated locally and in a short time by the laser light. This prevents the bonding layer made of AuSn that bonds the light emitting element 13 from remelting due to overheating.

[0104] In conventional light emitting devices, hermetic sealing is achieved twice using AuSn eutectic bonding: once for bonding the light emitting element and once for bonding the light-transmitting member to the AlN substrate. During this process, the bonding layer 46 bonding the light emitting element may re-melt during the second AuSn eutectic bonding for bonding the light-transmitting member, potentially resulting in manufacturing defects such as misalignment of the light emitting element.

[0105] In the manufacturing method of the light emitting device 100 of this embodiment, as described above, the glass bonding layer 48 is locally and quickly heated using laser light to achieve airtight sealing. This prevents the bonding layer 46 that bonds the light emitting element 13 from remelting, and suppresses manufacturing defects such as misalignment of the light emitting element.

[0106] Finally, the substrate structure 11 to which the light-transmitting member 15 is bonded is set in a dicer device, and the light-transmitting member 15 and the substrate structure 11 are cut along the division lines CL to separate the light-emitting devices 100 (step S11: singulation step). Through the above steps, the light-emitting device 100 as shown in FIG. 2 can be obtained.

[0107] As described above, the light emitting device 100 of this embodiment can be manufactured as a wafer-level package in which the light emitting devices 100 are formed in a lattice pattern on a silicon wafer. Conventionally, individual AlN substrates have been used and the substrates have had to be hermetically sealed one by one, which has caused problems in terms of takt time and cost during manufacturing.

[0108] In the manufacturing method of the light-emitting device 100 of this embodiment, the substrate structure 11 to which the light-transmitting member 15 is bonded is set in a dicer device and cut, so that multiple light-emitting devices 100 can be manufactured at once, thereby making it possible to shorten the takt time during manufacturing and reduce costs. [Explanation of symbols]

[0109] 100 Light-emitting device 11 Substrate structure 13 Light-emitting element 15 Translucent material 21 First substrate 22 Second board 24 First insulating film 25 Second insulating film 26 Through electrode 28 First lower electrode 29 Second lower electrode 31 First upper electrode 32 second upper electrode 34 Thermal oxide film 41 Semiconductor structural layer 42 Transparent substrate 43 n electrode 44p electrode 46 Bonding layer 48 Glass bonding layer

Claims

1. a substrate structure including a first substrate made of single crystal silicon including thermal oxide films formed on its upper and lower surfaces; and a second substrate made of single crystal silicon bonded to the upper surface of the first substrate and having an opening exposing one region of the upper surface of the first substrate, wherein the first substrate has a first through-hole group including one or more through-holes penetrating from a first partial region within the one region to the lower surface of the first substrate, and a second through-hole group including one or more through-holes penetrating from a second partial region within the one region to the lower surface of the first substrate, the second through-hole group being arranged to form a gap extending along one direction between the first partial region and the second partial region; a first upper surface electrode formed on the first group of through holes in the first region; a second upper surface electrode formed on the second group of through holes in the first region so as to face the first upper surface electrode; a light-emitting element provided on the one region so as to straddle the first upper surface electrode and the second upper surface electrode; a first lower surface electrode formed on the lower surface of the first substrate and above the first group of through holes; a second lower surface electrode formed on the lower surface of the first substrate above the second group of through holes so as to face the first lower surface electrode; a light-transmitting member formed on the upper surface of the second substrate and sealing a space including the opening, A light emitting device, characterized in that, in a plan view of the substrate structure seen from above, the first substrate and the second substrate have silicon crystals with <110> orientations that are misaligned with each other.

2. In the plan view, the <110> orientation of the silicon crystal of the first substrate has an angle excluding 0° and 90° with respect to the direction of 1, 2. The light emitting device according to claim 1, wherein, in the plan view, the <110> orientation of the silicon crystal of the second substrate forms an angle of 0° or 90° with the direction of 1.

3. 3. The light emitting device according to claim 2, wherein, in the plan view, the <110> orientation of the silicon crystal of the first substrate forms an angle other than 45° with respect to the direction 1.

4. 4. The light emitting device according to claim 1, wherein the upper surface of the first substrate is a (100) or (111) plane of silicon crystal.

5. the second substrate has the thermal oxide film formed on an upper surface thereof; 3. The light-emitting device according to claim 1, wherein the translucent member is bonded to the upper surface of the second substrate via a glass bonding layer made of the thermal oxide film and glass frit disposed on the thermal oxide film.

6. 3. The light emitting device according to claim 1, wherein the inner surface of the second substrate forming the opening is a (111) plane of silicon crystal.

7. 3. The light emitting device according to claim 1, wherein each of the one or more through holes belonging to the first through hole group and the second through hole group is formed in a triangular lattice pattern.

Images