Exposure head and image forming apparatus including the exposure head
The staggered adhesive application on the substrate of exposure heads addresses the issue of adhesive overflow-induced positional inaccuracies, improving the mounting precision of light-emitting chips in image forming apparatuses.
Patent Information
- Application Number
- JP2024088425
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-05-30
- Publication Date
- 2025-12-11
AI Technical Summary
The application of excessive adhesive during the mounting of light-emitting chips on a substrate can lead to positional inaccuracies due to adhesive overflow, affecting the mounting precision of adjacent chips in exposure heads.
The exposure head design incorporates a substrate with a staggered adhesive application, featuring a larger first overhang region on one side and a smaller second overhang region on the other side of each light-emitting chip, ensuring the adhesive does not overlap with the chip when viewed perpendicularly, thereby reducing the risk of positional deviation.
This configuration minimizes the risk of decreased mounting accuracy of light-emitting chips, enhancing the precision of the exposure process in image forming apparatuses.
Smart Images

Figure 2025180822000001_ABST
Abstract
Description
[Technical Field]
[0001] The present disclosure relates to an exposure head and an image forming apparatus including the exposure head. [Background technology]
[0002] In electrophotographic printers, a method is generally known in which a photosensitive drum is exposed to light using an exposure head equipped with light-emitting elements such as LEDs or organic EL elements to form a latent image. Some of these exposure heads are equipped with light-emitting chips having a plurality of light-emitting elements arranged along the rotation axis of the photosensitive drum, and the light-emitting chips are arranged in a staggered pattern on a substrate.
[0003] Patent Document 1 discloses a method for die-bonding the above-mentioned light-emitting chips in a staggered arrangement. According to Patent Document 1, some of the light-emitting chips are positioned at absolute positions and mounted. Then, the remaining light-emitting chips are positioned at positions relative to the light-emitting chips positioned at absolute positions and mounted. As a result, it is possible to reduce the relative positional deviation between the light-emitting chips. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2004-167872 Summary of the Invention [Problem to be solved by the invention]
[0005] When mounting a light-emitting chip on a substrate, an adhesive is applied to the substrate to bond and fix the light-emitting chip to the substrate. At this time, in order to reliably bond the light-emitting chip to the substrate, it is preferable to apply a sufficient amount of adhesive so that the adhesive overflows from the light-emitting chip when the light-emitting chip is bonded to the substrate. By applying the adhesive as described above, the adhesive is reliably applied between the light-emitting chip and the substrate, enabling the light-emitting chip to be firmly bonded to the substrate. However, when multiple light-emitting chips are mounted on a substrate as in Patent Document 1, the overflowing adhesive may come into contact with adjacent light-emitting chips, which may affect the mounting position accuracy of the light-emitting chips on the substrate.
[0006] In view of the above-mentioned problems, an object of the present invention is to reduce the risk of a decrease in the accuracy of the mounting position of a light-emitting chip in an exposure head including a substrate on which the light-emitting chip is mounted. [Means for solving the problem]
[0007] The exposure head of the present invention comprises a light-emitting chip that emits light to expose a photosensitive body and has a plurality of light-emitting elements arranged along the rotational axis direction of the photosensitive body, a long substrate on which the light-emitting elements are mounted, and an adhesive that is applied to the surface of the substrate and bonds the substrate to the light-emitting chip, wherein the adhesive is applied to the surface of the substrate and includes an overhang region that does not overlap with the light-emitting chip when viewed from a direction perpendicular to the surface of the substrate, and the overhang region includes a first overhang region located on one side of the light-emitting chip in the short direction of the substrate and a second overhang region located on the other side of the light-emitting chip, and the area of the first overhang region is larger than the area of the second overhang region. [Effects of the Invention]
[0008] According to the present invention, in an exposure head including a substrate on which light-emitting chips are mounted, it is possible to reduce the risk of a decrease in the accuracy of the mounting position of the light-emitting chips. [Brief explanation of the drawings]
[0009] [Figure 1] 1 is a diagram illustrating a schematic configuration of an image forming apparatus according to an embodiment. [Figure 2] FIG. 2 is an explanatory diagram of the configuration of a photosensitive member and an exposure head according to an embodiment. [Figure 3] FIG. 2 is an explanatory diagram illustrating the configuration of a printed circuit board of an exposure head according to an embodiment. [Figure 4] 1A and 1B are explanatory diagrams of a light-emitting chip and a light-emitting element array in the light-emitting chip according to an embodiment. [Figure 5] FIG. 1 is a plan view showing a schematic configuration of a light-emitting chip according to an embodiment. [Figure 6] FIG. 1 is a cross-sectional view showing a schematic configuration of a light-emitting chip according to an embodiment. [Figure 7] FIG. 2 is a circuit diagram showing the control configuration of an exposure apparatus according to an embodiment. [Figure 8] 10 is a signal chart related to access to a register of a light-emitting chip according to an embodiment; [Figure 9] 10 is a signal chart related to the transmission of image data to a light-emitting chip according to an embodiment. [Figure 10] FIG. 2 is a functional block diagram showing a detailed configuration of a light-emitting chip according to an embodiment. [Figure 11] FIG. 10 is an explanatory diagram of multiple exposure using light-emitting elements arranged in a stepped pattern. [Figure 12A] FIG. 10 is an explanatory diagram of light emission control based on input image data. [Figure 12B] FIG. 10 is an explanatory diagram of light emission control based on input image data. [Figure 12C] FIG. 10 is an explanatory diagram of light emission control based on input image data. [Figure 12D] FIG. 10 is an explanatory diagram of light emission control based on input image data. [Figure 13] FIG. 1 is a plan view showing a schematic configuration of a light emitting chip attached to a printed circuit board according to an embodiment. [Figure 14] FIG. 10 is a plan view illustrating an outline of deviation in accuracy in attaching a light-emitting chip to a printed circuit board according to an embodiment. [Figure 15A]1A and 1B are plan views illustrating a die bonding process according to an embodiment. [Figure 15B] 1A and 1B are plan views illustrating a die bonding process according to an embodiment. [Figure 15C] 1A and 1B are plan views illustrating a die bonding process according to an embodiment. [Figure 15D] 1A and 1B are plan views illustrating a die bonding process according to an embodiment. [Figure 15E] 1A and 1B are plan views illustrating a die bonding process according to an embodiment. [Figure 15F] 1A and 1B are plan views illustrating a die bonding process according to an embodiment. [Figure 16] 1A to 1C are cross-sectional views illustrating a die bonding process according to an embodiment. [Figure 17A] FIG. 10 is a plan view illustrating a die bonding process when a small amount of adhesive is applied according to an embodiment. [Figure 17B] FIG. 10 is a plan view illustrating a die bonding process when a small amount of adhesive is applied according to an embodiment. [Figure 18] 1A and 1B are plan views illustrating a die bonding process according to an embodiment. [Figure 19] 1A to 1C are cross-sectional views illustrating a die bonding process according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0010] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. Note that the following embodiments do not limit the scope of the invention claimed. Although multiple features are described in the embodiments, not all of these multiple features are necessarily essential to the invention, and multiple features may be combined arbitrarily. Furthermore, in the accompanying drawings, the same reference numerals are used to designate the same or similar components, and redundant explanations will be omitted.
[0011] 1. General Configuration of Image Forming Apparatus 1 shows an example of a schematic configuration of an image forming apparatus 1 according to an embodiment. The image forming apparatus 1 includes a reading unit 100, an image creating unit 103, a fixing unit 104, and a conveying unit 105. The reading unit 100 optically reads an original placed on a platen and generates read image data. The image creating unit 103 forms an image on a sheet based on the read image data generated by the reading unit 100 or based on print image data received from an external device via a network, for example.
[0012] The image forming unit 103 includes image forming units 101a, 101b, 101c, and 101d. The image forming units 101a, 101b, 101c, and 101d form black, yellow, magenta, and cyan toner images, respectively. The image forming units 101a, 101b, 101c, and 101d have the same configuration and are collectively referred to as the image forming unit 101 below. The photoconductor 102 of the image forming unit 101 is rotated clockwise in the drawing during image formation. The charger 107 charges the photoconductor 102. The exposure head 106 exposes the photoconductor 102 to light to form an electrostatic latent image on the surface of the photoconductor 102. The developer 108 develops the electrostatic latent image on the photoconductor 102 with toner to form a toner image. The toner image formed on the surface of the photoreceptor 102 is transferred onto a sheet transported on a transfer belt 111. By transferring the toner images of the four photoreceptors 102 onto the sheet in an overlapping manner, a color image containing four color components, namely black, yellow, magenta, and cyan, can be formed.
[0013] The conveying unit 105 controls the feeding and transport of sheets. Specifically, the conveying unit 105 feeds a sheet from a designated unit among the internal storage units 109a and 109b, the external storage unit 109c, and the manual feed unit 109d to a transport path of the image forming apparatus 1. The fed sheet is transported to the registration rollers 110. The registration rollers 110 transport the sheet onto the transfer belt 111 at an appropriate timing so that the toner images on the photoconductors 102 are transferred to the sheet. As described above, the toner image is transferred to the sheet while the sheet is transported on the transfer belt 111. The fixing unit 104 fixes the toner image to the sheet by applying heat and pressure to the sheet to which the toner image has been transferred. After the toner image is fixed, the sheet is discharged to the outside of the image forming apparatus 1 by the discharge rollers 112. An optical sensor 113 is disposed opposite the transfer belt 111. The optical sensor 113 optically reads the test chart formed on the transfer belt 111 by the image forming unit 101. If a positional deviation is detected in the test chart read by the optical sensor 113, the image controller 700 (described later) performs control to compensate for the positional deviation when a subsequent job is executed.
[0014] Although an example has been described here in which a toner image is directly transferred from each photoconductor 102 to a sheet on the transfer belt 111, the toner image may also be indirectly transferred from each photoconductor 102 to a sheet via an intermediate transfer body. Also, although an example has been described here in which a color image is formed using toners of multiple colors, the technology according to the present disclosure is also applicable to an image forming apparatus that forms a monochrome image using toner of a single color.
[0015] 2. Exposure head configuration example 2(A) and 2(B) show the photoconductor 102 and the exposure head 106. The exposure head 106 includes a light-emitting element array 201, a long printed circuit board 202 on which the light-emitting element array 201 is mounted, a rod lens array 203, and a housing 204 that holds the rod lens array 203 and the printed circuit board 202. The photoconductor 102 has a cylindrical shape. The exposure head 106 is disposed such that its longitudinal direction is parallel to the axial direction D1 of the photoconductor 102 and the surface on which the rod lens array 203 is attached faces the surface of the photoconductor 102. While the photoconductor 102 rotates in the circumferential direction D2, the light-emitting element array 201 of the exposure head 106 emits light, and the rod lens array 203 focuses the light on the surface of the photoconductor 102.
[0016] 3(A) and 3(B) show an example of the configuration of the printed circuit board 202. Note that Fig. 3(A) shows the surface on which the connector 305 is mounted, and Fig. 3(B) shows the surface on which the light-emitting element array 201 is mounted (the surface opposite to the surface on which the connector 305 is mounted). Fig. 4 schematically shows the light-emitting chip 400 and the arrangement of light-emitting elements 602 in the light-emitting chip 400.
[0017] In this embodiment, the light-emitting element array 201 includes a plurality of light-emitting elements arranged two-dimensionally. The light-emitting element array 201 includes, as a whole, N columns of light-emitting elements in the axial direction D1 and M rows of light-emitting elements in the circumferential direction D2 of the photoconductor, where M and N are integers equal to or greater than 2. In the example shown in FIG. 3B, the light-emitting element array 201 is divided into 20 light-emitting chips 400-1 to 400-20, each including a subset of the entire plurality of light-emitting elements, and the light-emitting chips 400-1 to 400-20 are arranged in a staggered pattern along the axial direction D1. The light-emitting chips 400-1 to 400-20 are also collectively referred to as light-emitting chips 400. As shown in FIG. 3B, the area occupied by all of the light-emitting elements of the 20 light-emitting chips in the axial direction D1 is wider than the area occupied by the maximum width W0 of the input image data. Therefore, some light-emitting elements located at both ends in the axial direction D1 may not be used to expose the photoconductor 102 unless image misalignment is detected. Each light-emitting chip 400 on the printed circuit board 202 is connected to the image controller 700 (FIG. 7) via a connector 305. For convenience of explanation, the side with the smaller branch number of the light-emitting chips 400-1 to 400-20 arranged along the axial direction D1 may be referred to as the "left" and the side with the larger branch number as the "right." For example, the light-emitting chip 400-1 is the leftmost light-emitting chip 400, and the light-emitting chip 400-20 is the rightmost light-emitting chip.
[0018] The number J (J=N / 20) of light-emitting elements 602 arranged in each row of one light-emitting chip 400 may be equal to, for example, 748 (J=748). Meanwhile, the number M of light-emitting elements 602 arranged in each column of one light-emitting chip 400 may be equal to, for example, 4 (M=4). That is, in the exemplary embodiment, each light-emitting chip 400 has 748 light-emitting elements 602 in the axial direction D1 and 4 light-emitting elements 602 in the circumferential direction D2, totaling 2992 (=748×4) light-emitting elements 602. The interval P between the center points of the light-emitting elements 602 adjacent to each other in the circumferential direction D2 is Cmay be, for example, approximately 21.16 μm, corresponding to a resolution of 1200 dpi. The spacing between the center points of adjacent light-emitting elements 602 in the axial direction D1 may also be approximately 21.16 μm, in which case 748 light-emitting elements 602 occupy a length of approximately 15.8 mm in the axial direction D1. Note that, for convenience of explanation, FIG. 4 shows an example in which the light-emitting elements 602 in each light-emitting chip 400 are arranged in a complete grid pattern, but in reality, M (M=4) light-emitting elements 602 in each column are arranged in a staircase pattern. This point will be explained further below.
[0019] 5 is a plan view showing a schematic configuration of the light-emitting chip 400. The plurality of light-emitting elements 602 of each light-emitting chip 400 are formed on a light-emitting substrate 402, which is, for example, a silicon substrate. A circuit unit 406 for driving the plurality of light-emitting elements 602 is provided on the light-emitting substrate 402. Signal lines for communicating with the image controller 700, power lines for connecting to a power source, and ground lines for connecting to ground are connected to the pads 408-1 to 408-9. The signal lines, power lines, and ground lines may be wires made of, for example, gold.
[0020] FIG. 6 shows a portion of the cross section taken along line AA in FIG. 5. A plurality of lower electrodes 504 are formed on the light-emitting substrate 402. A gap of length d is provided between two adjacent lower electrodes 504. A light-emitting layer 506 is provided on the lower electrodes 504, and an upper electrode 508 is provided on the light-emitting layer 506. The upper electrode 508 is a common electrode for the plurality of lower electrodes 504. When a voltage is applied between the lower electrode 504 and the upper electrode 508, a current flows from the lower electrode 504 to the upper electrode 508, causing the light-emitting layer 506 to emit light. Therefore, one lower electrode 504 and a partial region of the light-emitting layer 506 and upper electrode 508 corresponding to the lower electrode 504 constitute one light-emitting element 602. That is, in this embodiment, the light-emitting substrate 402 includes a plurality of light-emitting elements 602.
[0021] The light-emitting layer 506 may be, for example, an organic EL film. The upper electrode 508 is formed of a transparent electrode such as indium tin oxide (ITO) so as to transmit the emission wavelength of the light-emitting layer 506. In this embodiment, the entire upper electrode 508 transmits the emission wavelength of the light-emitting layer 506; however, the entire upper electrode 508 does not need to transmit the emission wavelength. Specifically, it is sufficient that a partial region through which light from each light-emitting element 602 passes transmits the emission wavelength. While FIG. 6 shows a single continuous light-emitting layer 506, multiple light-emitting layers 506 each having a width equal to the width W of the lower electrode 504 may be formed on the lower electrode 504. Furthermore, in FIG. 6, the upper electrode 508 is a single common electrode for multiple lower electrodes 504; however, multiple upper electrodes 508 each having a width equal to the width W of the lower electrode 504 may be formed corresponding to each lower electrode 504. Furthermore, among the lower electrodes 504 of each light-emitting chip 400, a first plurality of lower electrodes 504 may be covered with a first light-emitting layer 506, and the second plurality of lower electrodes 504 may be covered with a second light-emitting layer 506. Furthermore, among the lower electrodes 504 of each light-emitting chip 400, a first upper electrode 508 may be commonly formed corresponding to the first plurality of lower electrodes 504, and a second upper electrode 508 may be commonly formed corresponding to the second plurality of lower electrodes 504. Even in such a configuration, one lower electrode 504 and the region of the light-emitting layer 506 and upper electrode 508 corresponding to the lower electrode 504 constitute one light-emitting element 602.
[0022] FIG. 7 is a circuit diagram related to a control configuration for controlling the light-emitting chip 400. The image controller 700 is a control circuit that communicates with the printed circuit board 202 via multiple signal lines (wires). The image controller 700 includes a CPU 701, a clock generation unit 702, an image data processing unit 703, a register access unit 704, and a light-emitting control unit 705. The light-emitting control unit 705 is a component that constitutes an exposure device together with the exposure head 106. The light-emitting control unit 705 terminates the signal line between the image controller 700 and the printed circuit board 202. The n-th light-emitting chip 400-n (n is an integer from 1 to 20) on the printed circuit board 202 is connected to the light-emitting control unit 705 via a signal line DATAn and a signal line WRITEn. The signal line DATAn is used to transmit image data from the image controller 700 to the light-emitting chip 400-n. The signal line WRITEn is used by the image controller 700 to write control data to the register of the light-emitting chip 400-n.
[0023] One signal line CLK, one signal line SYNC, and one signal line EN are further provided between the light-emitting control unit 705 and each light-emitting chip 400. The signal line CLK is used to transmit a clock signal for transmitting data on the signal lines DATAn and WRITEn. The light-emitting control unit 705 outputs a clock signal generated based on a reference clock signal from the clock generation unit 702 to the signal line CLK. The signals transmitted to the signal lines SYNC and EN will be described later.
[0024] The CPU 701 controls the entire image forming apparatus 1. The image data processing unit 703 performs image processing on image data received from the reading unit 100 or an external device to generate binary bitmap image data for controlling the on / off of light emission of the light-emitting elements 602 of the light-emitting chips 400 on the printed circuit board 202. This image processing may include, for example, raster conversion, tone correction, color conversion, and halftone processing. The image data processing unit 703 transmits the generated image data to the light-emission control unit 705 as input image data. The register access unit 704 receives control data to be written to the registers in each light-emitting chip 400 from the CPU 701 and transmits it to the light-emission control unit 705.
[0025] FIG. 8 shows the transition of the signal level of each signal line when control data is written to the register of the light-emitting chip 400. An enable signal that is at high level during communication and indicates that communication is in progress is output to the signal line EN. The light-emitting control unit 705 transmits a start bit to the signal line WRITEn in synchronization with the rising edge of the enable signal. Next, the light-emitting control unit 705 transmits a write identification bit indicating a write operation, and then transmits the address of the register to which the control data is to be written (4 bits in this example) and the control data (8 bits in this example). When writing to the register, the light-emitting control unit 705 sets the frequency of the clock signal transmitted to the signal line CLK to, for example, 3 MHz.
[0026] FIG. 9 shows the transition of the signal level of each signal line when image data is transmitted to each light-emitting chip 400. A periodic line synchronization signal indicating the exposure timing of each line on the photoconductor 102 is output to the signal line SYNC. If the peripheral speed of the photoconductor 102 is 200 mm / s and the peripheral resolution is 1200 dpi (approximately 21.16 μm), the line synchronization signal is output at a period of approximately 105.8 μs. The light-emitting control unit 705 transmits image data to the signal lines DATA1 to DATA20 in synchronization with the rising edge of the line synchronization signal. In this embodiment, each light-emitting chip 400 has 2992 light-emitting elements 602, and therefore, image data indicating the light-emitting or non-light-emitting status of each of the total 2992 light-emitting elements 602 must be transmitted to each light-emitting chip 400 within a period of approximately 105.8 μs. Therefore, in this example, as shown in FIG. 9, when transmitting image data, the light-emitting control unit 705 sets the frequency of the clock signal transmitted to the signal line CLK to 30 MHz.
[0027] FIG. 10 is a functional block diagram showing a detailed configuration of one light-emitting chip 400 (the n-th light-emitting chip 400-n). As also shown in FIG. 5, the light-emitting chip 400 has nine pads 408-1 to 408-9. The pads 408-1 and 408-2 are connected to a power supply voltage VCC via a power supply line. Power is supplied from this power supply voltage VCC to each circuit of the circuit unit 406 of the light-emitting chip 400. The pads 408-3 and 408-4 are connected to ground via a ground line. Each circuit of the circuit unit 406 and the upper electrode 508 are connected to ground via the pads 408-3 and 408-4. The signal line CLK is connected to the transfer unit 1003, the register 1102, and the latch units 1004-001 to 1004-748 via the pad 408-5. The signal lines SYNC and DATAn are connected to the transfer unit 1003 via the pads 408-6 and 408-7. The signal lines EN and WRITEn are connected via pads 408-8 and 408-9 to a register 1102. The register 1102 stores control data indicating the desired light emission intensity of the light emitting element 602, for example.
[0028] The transfer unit 1003 receives input image data from signal line DATAn, including a series of pixel values each indicating whether one light-emitting element 602 emits light or not, in synchronization with a clock signal from signal line CLK, starting from a line synchronization signal from signal line SYNC. The transfer unit 1003 performs serial-to-parallel conversion on the series of pixel values serially received from signal line DATAn in units of M (e.g., M=4) pixel values. For example, the transfer unit 1003 has four cascade-connected D flip-flops, which parallelize pixel values DATA-1, DATA-2, DATA-3, and DATA-4 input over four clocks and output them to latch units 1004-0001 to 1004-748. The transfer unit 1003 also has four D flip-flops for delaying the line synchronization signal, and outputs a first latch signal to the latch unit 1004-001 via signal line LAT1 four clocks after the line synchronization signal is input.
[0029] The kth latch unit 1004-k (k is an integer from 1 to 748) holds, in a latch circuit, four pixel values DATA-1, DATA-2, DATA-3, and DATA-4 input from the transfer unit 1003 simultaneously with the input of the kth latch signal. Except for the final latch unit 1004-748, the kth latch unit 1004-k delays the kth latch signal by four clocks and outputs the (k+1)th latch signal to the latch unit 1004-(k+1) via the signal line LAT(k+1). The kth latch unit 1004-k continues to output a drive signal based on the four pixel values held in the latch circuit to the current drive unit 1104 during the signal period of the kth latch signal. For example, there is a four-clock delay between the timing at which the first latch signal is input to the latch unit 1004-1 and the timing at which the second latch signal is input to the latch unit 1004-2. Therefore, the latch unit 1004-1 outputs drive signals based on the first, second, third, and fourth pixel values to the current driver 1104, while the latch unit 1004-2 outputs drive signals based on the fifth, sixth, seventh, and eighth pixel values to the current driver 1104. Generally speaking, the latch unit 1004-k outputs drive signals based on the (4k-3), (4k-2), (4k-1), and (4k)th pixel values to the current driver 1104. Therefore, in the embodiment shown in FIG. 10 , 748 latch units 1004-001 to 1004-748 output 2992 drive signals for controlling the driving of 2992 (=748×4) light-emitting elements 602 in approximately parallel to the current driver 1104. Each drive signal is a binary signal indicating a high level or a low level.
[0030] The current driver 1104 has 2992 light-emitting drive circuits corresponding to the 2992 light-emitting elements 602, each of which includes a partial region of the light-emitting layer 506. Each light-emitting drive circuit applies a drive voltage corresponding to the light-emitting intensity indicated by the control data in the register 1102 to the light-emitting layer 506 of the corresponding light-emitting element 602 while the corresponding drive signal indicates a high level, which means that light is on. This causes a current to flow through the light-emitting layer 506, causing the light-emitting element 602 to emit light. Note that the control data may indicate one individual light-emitting intensity for each light-emitting element 602, one light-emitting intensity for each group of light-emitting elements 602, or one light-emitting intensity common to all light-emitting elements 602.
[0031] 3. Controlling multiple exposures Although Fig. 4 shows an example in which the light emitting elements 602 are completely arranged in a grid pattern in each light emitting chip 400, in reality, in this embodiment, the M light emitting elements 602 in each row can be arranged in a stepped pattern at a constant pitch. Fig. 11 is an explanatory diagram of multiple exposure using light emitting elements arranged in a stepped pattern. Here, an example of the arrangement of light emitting elements in the light emitting chip 400-1 when M=4 is partially shown. R in the figure j_m (j={0,1,...,J-1}, m={0,1,2,3}) represents the light emitting element 602 in the j-th column from the left in the axial direction and in the m-th row from the top in the circumferential direction. C As mentioned above, the distance between two adjacent light-emitting elements in each row of M light-emitting elements, i.e., the axial pitch P of the light-emitting elements, A may be about 5 μm, which corresponds to a resolution of 4800 dpi.
[0032] By arranging the four light-emitting elements in each column in a stepped manner in this way, any two adjacent light-emitting elements among the four light-emitting elements occupy areas that partially overlap in the axial direction. Then, the four light-emitting elements in the column corresponding to each pixel position of the input image data sequentially emit light while the photoconductor 102 is rotating, forming spots corresponding to each pixel position on the surface of the photoconductor 102. In the example of Figure 11, when the pixel value at the left end of the ith line of the input image data indicates that light is on, the light-emitting element R 0_0 , R 0_1 , R 0_2 , R 0_3 is a line L on the surface of the photoreceptor 102. i As a result, the line L i Similarly, when the j-th pixel value from the left of the ith line of the input image data indicates that light is emitted, the light-emitting element R j_0 , R j_1 , R j_2 , R j_3 is a line L on the surface of the photoreceptor 102. i As a result, the line L i The jth spot area from the left of is multiplexed and the corresponding spot SP j is formed.
[0033] 11, in this embodiment, the light-emitting elements in two axially adjacent rows also occupy areas that partially overlap in the axial direction. Similarly, of the two axially adjacent light-emitting chips 400, the light-emitting elements in the rightmost row of the left light-emitting chip 400 and the light-emitting elements in the leftmost row of the right light-emitting chip 400 also occupy areas that partially overlap in the axial direction. The axial pitch P of the light-emitting elements across all 20 light-emitting chips 400 is Ais a constant value of about 5 μm. By sequentially emitting light at appropriate times from the four light-emitting elements in each row of these light-emitting chips 400, smooth lines of an electrostatic latent image can be formed on the surface of the photoreceptor 102, each consisting of a series of spots that are partially overlapping each other and have a constant spot spacing. As a result of these lines being continuously formed in the circumferential direction, a two-dimensional electrostatic latent image is created.
[0034] 12A to 12D are explanatory diagrams of the procedure for controlling light emission based on input image data. During image formation, the light emission control unit 705 receives input image data IM1 in a binary bitmap format from the image data processing unit 703. On the left side of FIG. 12A, the j-th pixel value from the left on the i-th line from the top of the input image data IM1, which is a two-dimensional pixel value array, is represented as (j, i) (j = {0, 1, 2, ...}, i = {0, 1, 2, ...}). The light emission control unit 705 adds dummy pixel values for (M-1) lines to the beginning of the input image data IM1. When M = 4, including the added dummy pixel values, the range of pixel value index i is {-3, -2, -1, 0, 1, 2, ...}. The dummy pixel value may be, for example, zero, which indicates that light emission is off. The light emission control unit 705 may add dummy pixel values to the left and right of the input image data IM1 so that the number of pixel values in one line is equal to the number of light emitting elements in the axial direction, but for simplicity of explanation, only effective pixel values are shown here in the axial direction.
[0035] In the first line period t0 of image formation, the light-emitting control unit 705 reads out pixel values of the top four lines of the input image data IM1 and outputs a subset of 2992 (=748×4) of the read pixel values to the light-emitting chip 400-n via the signal line DATAn. Focusing on the light-emitting chip 400-1 shown on the right in FIG. 12A, image data within a read range RD including pixel values from (0,-3) to (748,0) is input via the signal line DATA1 during the line period t0. The light-emitting chip 400-1 serial-to-parallel converts the input image data and supplies drive signals based on these pixel values to each of the 2992 light-emitting elements. For example, drive signals based on pixel values (0,-3), (0,-2), (0,-1), (0,0), and (1,-3) are output to the light-emitting element R. 0_0 , R 0_1 , R 0_2 , R 0_3 and R 1_0 In particular, as shown by the broken line in the figure, the light emitting element R 0_3 A drive signal based on the effective pixel value of line DL0 of index i=0 in the input image data IM1 is supplied to the light-emitting elements in the fourth row, including line L0. As a result, line L0 on the surface of photoconductor 102 is exposed in accordance with the set of pixel values of line DL0 in the input image data IM1. However, at this point, multiple exposure is still in progress, and the formation of the electrostatic latent image of line L0 is not complete.
[0036] FIG. 12B shows how the light-emitting chip 400-1 is driven during the next line period t0+1. In the line period t0+1, the light-emitting control unit 705 moves the readout range RD of the input image data IM1 down by one line, reads out pixel values from (0,-2) to (748,1), and outputs them to the light-emitting chip 400-1 via the signal line DATA1. The light-emitting chip 400-1 supplies drive signals based on the input pixel values to the 2992 light-emitting elements. For example, drive signals based on pixel values (0,-2), (0,-1), (0,0), (0,1), and (1,-2) are supplied to the light-emitting elements R. 0_0 , R 0_1 , R 0_2 , R 0_3 and R 1_0In the line period t0+1, the light emitting element R 0_2 A drive signal based on the effective pixel values of line DL0 of the input image data IM1 is supplied to the light-emitting elements in the third row, including line L0. At this time, since the photoconductor 102 is rotating in the circumferential direction, line L0 on the surface of the photoconductor 102 faces the light-emitting elements in the third row of the light-emitting chip 400-1. As a result, line L0 on the surface of the photoconductor 102 is again exposed in accordance with the set of pixel values of line DL0 of the input image data IM1.
[0037] FIG. 12C shows how the light-emitting chip 400-1 is driven during the next line period t0+2. In the line period t0+2, the light-emitting control unit 705 moves the readout range RD of the input image data IM1 further down by one line, reads out pixel values from (0, -1) to (748, 2), and outputs them to the light-emitting chip 400-1 via the signal line DATA1. The light-emitting chip 400-1 supplies drive signals based on the input pixel values to the 2992 light-emitting elements. In the line period t0+2, the light-emitting elements R 0_1 A drive signal based on the effective pixel value of line DL0 of the input image data IM1 is supplied to the light-emitting elements of the second row including line L0 on the surface of the photoconductor 102. At this time, line L0 on the surface of the photoconductor 102 faces the light-emitting elements of the second row of light-emitting chip 400-1. As a result, line L0 on the surface of the photoconductor 102 is exposed a third time in accordance with the pixel value set of line DL0 of the input image data IM1.
[0038] FIG. 12D shows how the light-emitting chip 400-1 is driven during the next line period t0+3. In the line period t0+3, the light-emitting control unit 705 moves the read range RD of the input image data IM1 further down by one line, reads out pixel values from (0,0) to (748,3), and outputs them to the light-emitting chip 400-1 via the signal line DATA1. The light-emitting chip 400-1 supplies drive signals based on the input pixel values to the 2992 light-emitting elements. In the line period t0+3, the light-emitting elements R 0_0A drive signal based on the effective pixel value of line DL0 of the input image data IM1 is supplied to the light-emitting elements of the first row, including the light-emitting elements of the light-emitting chip 400-1. At this time, line L0 on the surface of the photoconductor 102 faces the light-emitting elements of the first row of the light-emitting chip 400-1. As a result, line L0 on the surface of the photoconductor 102 is exposed a fourth time according to the set of pixel values of line DL0 of the input image data IM1. At this point, multiple exposure has been performed by the four light-emitting elements of each column of the light-emitting chip 400, and the formation of line L0 of the electrostatic latent image is completed. Lines subsequent to line L0 of the electrostatic latent image can also be formed on the surface of the photoconductor 102 in a similar manner through repetition of this line period. In this manner, in this embodiment, each pixel value from (0,0) to (748,3) is input to four light-emitting elements. Specifically, for example, the pixel value of (0,0) is input to four light-emitting elements R 0_0、 R 0_1 , R 0_2 , R 0_3 For example, the pixel value of (1,0) is input to the four light-emitting elements R 1_0、 R 1_1 , R 1_2 , R 1_3 That is, the spot on the photoconductor corresponding to the pixel value of (0,0) is input to the four light-emitting elements R 0_0、 R 0_1 , R 0_2 , R 0_3 The spot on the photoconductor corresponding to the pixel value of (1,0) is formed by the four light-emitting elements R 1_0、 R 1_1 , R 1_2 , R 1_3 is formed by
[0039] As can be understood from the above explanation, the light emission control unit 705 causes the plurality of light emitting elements 602 to emit light based on pixel values read from a read range spanning M lines of the input image data IM1. The read range moves by one line per line period. Such control of the read range is also performed in the same way to compensate for positional misalignment.
[0040] [First embodiment] A first embodiment of the present invention will be described below with reference to Figs. 13 to 17. Fig. 13 is a plan view showing a schematic configuration of a light-emitting chip 400 on a printed circuit board 202. Fig. 14 is a plan view showing an outline of a case where the attachment position of the light-emitting chip 400 on the printed circuit board 202 deviates from the design value. Figs. 15A to 15F are plan views showing a die bonding process according to the first embodiment. Fig. 16 is a cross-sectional view showing the die bonding process according to the first embodiment. Fig. 17 is a plan view showing a die bonding process according to the first embodiment when the amount of adhesive applied is small.
[0041] 13, the light emitting chips 400 are arranged in a staggered pattern on the printed circuit board 202 along a reference line 1303 that extends in the longitudinal direction of the printed circuit board 202. In addition, adhesive 1303 is applied in a staggered pattern to the surface of the printed circuit board 202, similar to the light emitting chips 400. As will be described in detail later, each of the light emitting chips 400 is adhered to the printed circuit board 202 by the staggered adhesive 1301.
[0042] Note that when multiple light-emitting chips 400 are mounted on the printed circuit board 202, there is a risk that the mounting positions of the light-emitting chips 400 may deviate from the design values. In particular, when adjacent light-emitting chips are mounted shifted in the direction away from each other in the longitudinal direction of the printed circuit board 202, there is a risk that the photosensitive material may not be exposed in the area between the light-emitting chips 400. For this reason, in this embodiment, the light-emitting chips 400 are arranged in a staggered pattern, and ends of adjacent light-emitting chips 400 overlap in the longitudinal direction of the printed circuit board 202. By configuring the ends of the light-emitting chips 400 to overlap in the longitudinal direction and the light-emitting elements 602 of the light-emitting chips 400 to also overlap, it is possible to reduce the risk of an area where the photosensitive material is not exposed at the boundary between adjacent light-emitting chips 400, even if the mounting positions of the light-emitting chips 400 deviate from the design values.
[0043] Furthermore, in this embodiment, the light emitted by the light emitting element 602 is collected using a rod lens array in which a plurality of rod lenses are arranged in two rows along the longitudinal direction of the printed circuit board 202. In this case, the light collecting efficiency is increased when the light emitting element 602 is located as close as possible to the two rows of rod lenses in the lateral direction of the printed circuit board 202. Therefore, from the perspective of the light collecting efficiency of the rod lens array, it is preferable to align the center line of the two rows of rod lenses with the center line of the staggered light emitting chips, and further to place each of the light emitting chips 400 as close to the center line as possible. Therefore, in order to reduce the risk of a decrease in the light collecting efficiency of the rod lens array, it is necessary to mount the light emitting chips 400 with high precision while keeping them close to the center line.
[0044] In this embodiment, each of the light-emitting chips 400 is die-bonded so that the position of the chip alignment mark 1302 present in the light-emitting chip 400 falls within a predetermined range with respect to the target position. Specifically, the mounting position of the light-emitting chip 400, which is the first chip positioned at the outermost position of the printed circuit board 202 in the X direction, is determined based on a predetermined position on the printed circuit board 202. Meanwhile, the second and subsequent chips adjacent to the first chip in the X direction are relatively positioned so that the distance ΔX between the chip alignment marks 1302 of adjacent light-emitting chips 400 falls within a predetermined range. Regarding the accuracy of the mounting position in the Y direction, the mounting position of the light-emitting chip 400 is determined so that the distance Y from the reference line 1303 to the chip alignment mark 1302 falls within a predetermined range. Two chip alignment marks 1302 are provided at the ends of the light-emitting chip 400 in the longitudinal direction (X direction), and both chip alignment marks 1302 are set to fall within the predetermined Y range. It is also possible to calculate θ, which is the mounting angle of the light-emitting chip 400 relative to the reference line, by using two chip alignment marks 1302. If the Y of the chip alignment mark 1302 on one side is misaligned, adjust θ of the light-emitting chip 400 so that both chip alignment marks 1302 fall within a predetermined Y range.
[0045] In order to meet these required precision, after the light-emitting chip 400 is landed on the printed circuit board 202, the position of the chip alignment mark 1302 is checked with a camera, and if it is deviated from the specified range, the position of the light-emitting chip 400 is corrected and a post-landing correction operation is performed to correct the XYθ position.
[0046] In this embodiment, in order to reliably bond the light emitting chip 400 to the printed circuit board 202, a sufficient amount of adhesive 1301 is applied to bond the light emitting chip 400. At this time, when the light emitting chip 400 is mounted, the adhesive 1301 may overflow outside the light emitting chip 400. FIG. 14 shows a diagram of the case where the adhesive 1301 has overflowed outside the light emitting chip 400. As shown in FIG. 14, when the adhesive 1301 overflows outside the light emitting chip 400, the light emitting chips 400 are arranged in a staggered pattern, and the adhesive 1301 may come into contact with adjacent light emitting chips 400 across the center line. In this case, the adhesive 1301 in contact with the light emitting chip 400 may harden and shrink, which may cause a deviation in precision of the light emitting chip 400 after die bonding.
[0047] On the other hand, if the amount of adhesive applied is reduced to avoid contact with the adhesive 1301, the adhesive 1301 will not spread to the periphery of the light-emitting chip 400, which could result in a decrease in adhesive strength or the light-emitting chip 400 peeling off from the periphery. Furthermore, the pads 408 are located on the chip end opposite the side where the first and second rows of the staggered arrangement of light-emitting chips 400 face each other. When electrically connecting the printed circuit board 202 and the light-emitting chip 400 by wire bonding, if the amount of adhesive 1301 applied is insufficient, the space below the chip on the pad 408 will not be filled with adhesive 1301 and will be hollow. This could result in the ultrasonic force not being transmitted, which could reduce the stability of the wire bonding.
[0048] In this embodiment, as shown in FIG. 13 , the amount of adhesive 1301 protruding from the light-emitting chips 400 is greater on the side opposite to where the first and second rows of the staggered light-emitting chips 400 face each other than the side where they face each other. This configuration reduces the amount of adhesive 1301 protruding between the first and second rows of the staggered light-emitting chips 400, thereby reducing the possibility of misalignment of the light-emitting chips 400 due to contact with the adhesive 1301. Furthermore, the amount of adhesive 1301 protruding is greater on the side opposite to where the first and second rows of the staggered light-emitting chips 400 face each other, so that the area under the chips is filled with adhesive. As a result, the light-emitting chips 400 and the printed circuit board 202 are reliably bonded, reducing the risk of the light-emitting chips 400 peeling off. Furthermore, the adhesive is also filled under the pads 408. This also improves the stability of wire bonding.
[0049] Next, a die bonding process for realizing the protruding structure of the adhesive 1301 of this embodiment will be described.
[0050] First, adhesive 1301 for bonding the printed circuit board 202 and the light emitting chips 400 is applied. The adhesive 1301 is applied in a staggered arrangement at positions corresponding to each of the light emitting chips 400. More specifically, as shown in FIG. 15A, the first row side of the staggered arrangement is applied in the positive direction in the X direction, and then as shown in FIG. 15B, the second row side of the staggered arrangement is applied in the negative direction in the X direction. Note that the adhesive 1301 may be applied to the first row side of the staggered arrangement in the number corresponding to the light emitting chips 400, and then the second row side. Furthermore, the adhesive 1301 may be applied alternately to the first row side, the second row side, and the first row side.
[0051] Imaginary line 1501 is a reference position for die bonding and is the center line of the light emitting chip 400 to be mounted. Imaginary line 1502 is shown at a position offset by Y1 from imaginary line 1501 in the direction separating the first and second rows of the staggered arrangement. The position of adhesive 1301 in the Y direction is applied using imaginary line 1502 as a reference.
[0052] Next, the light emitting chips 400 are die-bonded onto the printed circuit board 202. The first bonding is performed in a staggered arrangement, one chip at a time for each adhesive 1301. As mentioned above, the mounting positions of adjacent light emitting chips 400 need to be relatively positioned so that they fall within a predetermined range. Therefore, die bonding is performed alternately, such as on the first row side, the second row side, and then the first row side.
[0053] First, die bonding on the first row side will be described in detail. Fig. 15C is a diagram showing a case where the light emitting chip 400 is mounted on the printed circuit board 202. The position in the Y direction when the light emitting chip 400 is landed on the printed circuit board 202 is determined based on the imaginary line 1502, as in the case where the adhesive 1301 is applied to the printed circuit board 202. That is, die bonding is performed with a target position where the center of the area where the adhesive 1301 is applied overlaps with the center of the light emitting chip 400 in the Y direction. When die bonding is performed, bonding is performed with an appropriate load applied to the light emitting chip 400 so as to prevent voids from forming between the light emitting chip 400 and the printed circuit board 202.
[0054] As described above, the virtual line 1501 is the target for the final mounting position of the light-emitting chip. In this embodiment, as shown in FIG. 15D , first, the light-emitting chip 400 is landed on the printed circuit board 202 with the virtual line 1502 as the target. Note that the virtual lines 1501 and 1502 are spaced apart in the Y direction by a distance Y1. Thereafter, a Y-pushing operation is performed in which the light-emitting chip 400 that has landed on the printed circuit board 202 is moved in the Y direction by Y1 toward the virtual line 1501. If the position of the light-emitting chip 400 is not within a predetermined range after the Y-pushing operation, the above-described XYθ post-landing correction operation is performed.
[0055] On the second row side, as with the first row side, the light emitting chips 400 are landed on the printed circuit board 202 with the imaginary line 1502 as the target. Thereafter, a Y-shifting operation is performed to move the light emitting chips 400 in the Y direction by Y1 toward the imaginary line 1501, which is the target for the final mounting position. If the position of the light emitting chip 400 is not within the predetermined range after the Y-shifting operation, an XYθ post-landing correction operation is performed as described above.
[0056] By the die bonding process described above, the light emitting chips 400 in the first and second rows of the staggered arrangement are mounted while being moved toward the reference line 1303 by the Y-pushing operation. At this time, when the light emitting chips 400 are bonded to the adhesive 1301 applied to the printed circuit board 202, the amount of adhesive 1301 that protrudes outside the light emitting chip 400 is defined as the protruding amount. Because the protruding adhesive 1301 is located outside the light emitting chip 400, it does not overlap with the protruding area of the adhesive 1301 of the light emitting chip 400 when viewed from a direction perpendicular to the surface of the printed circuit board 202.
[0057] In the Y direction, the long side of the light-emitting chip 400 that is farther from the reference line 1303 is moved toward the center where the adhesive 1301 is applied. On the other hand, the long side of the light-emitting chip 400 that is closer to the reference line 1303 is moved away from the center where the adhesive 1301 is applied. For this reason, when the amount of adhesive 1301 that protrudes from the light-emitting chip 400 on the side opposite the reference line 1303 with respect to the light-emitting chip 400 in the Y direction is compared with the amount of adhesive 1301 that protrudes from the light-emitting chip 400 on the side where the light-emitting chips 400 in the first and second rows of the staggered arrangement face each other, the amount of adhesive 1301 that protrudes is greater in the former direction. The region where the adhesive 1301 is applied to the light-emitting chip 400 on the side opposite to the reference line 1303 in the Y direction is defined as a first overflow region, and the region where the adhesive 1301 is applied to the light-emitting chip 400 on the side where the first and second rows of the staggered arrangement of light-emitting chips 400 face each other is defined as a second overflow region. As described above, when the area of the first overflow region is compared with the area of the second overflow region, the area of the first overflow region is larger. In other words, when the first overflow region located on one side of the light-emitting chip 400 is compared with the second overflow region located on the other side in the short-side direction of the printed circuit board 202, the area of the first overflow region is larger than the area of the second overflow region.
[0058] Next, the length in the X direction of the adhesive 1301 applied to the printed circuit board 202 will be described. In this embodiment, when the length of the adhesive 1301 applied to the printed circuit board 202 is compared with the length of the light emitting chip 400 in the X direction, the adhesive 1301 is longer. In other words, the adhesive 1301 is applied to the printed circuit board 202 over a length in the X direction that is longer than the X direction length of the light emitting chip 400. This is to ensure that the light emitting chip 400 is securely attached to the printed circuit board 202. By applying the adhesive 1301 over a length longer than the length of the light emitting chip 400 in the X direction, it is possible to securely attach the end of the light emitting chip 400 in the X direction to the printed circuit board 202 and reduce the risk of the light emitting chip 400 peeling off from the printed circuit board 202. In this embodiment, the adhesive 1301 is applied to the printed circuit board 202 in an area longer than the length of the light-emitting chip 400 in the X direction, but the application area of the adhesive 1301 may be shorter than the length of the light-emitting chip 400 if sufficient adhesive strength can be ensured.
[0059] Next, we will explain the difference in the amount of adhesive 1301 applied. Although the adhesive 1301 is applied at a position away from the target position for die bonding, the greater the amount of adhesive applied, the higher the possibility that the adhesive 1301 will come into contact between the light-emitting chips 400 in the first and second rows of the staggered arrangement after the Y-positioning operation.
[0060] As shown in FIG. 16 , the adhesive 1301a and 1301b that overflow when the light-emitting chips 400 are placed on the printed circuit board 202 is absorbed under the chips during the Y-motion operation. It has been confirmed that the amount of adhesive absorbed during this operation is largely absorbed from the adhesive 1301b that overflows on the side opposite the Y-motion operation, i.e., the side opposite the side where the first and second rows of staggered light-emitting chips 400 face each other. Although the adhesive 1301a that overflows on the side where the first and second rows of staggered light-emitting chips 400 face each other is absorbed under the chips during the Y-motion operation, the overflowing adhesive is still dragged along. Therefore, if the amount of adhesive 1301 that overflows when the chips are placed is too large, the adhesive 1301 will come into contact with the first and second rows of staggered light-emitting chips 400 after the Y-motion operation. Therefore, it is desirable to limit the amount of adhesive 1301 applied to a level that prevents the adhesive 1301 from coming into contact with the first and second rows of staggered light-emitting chips 400 after the Y-motion operation.
[0061] Next, we will explain the case where the amount of adhesive 1301 applied is small. As shown in FIG. 17A , when the light-emitting chip 400 is placed on the printed circuit board 202, the adhesive 1301 protrudes less from the light-emitting chip 400. In this state, the adhesive 1301 does not spread to the outer periphery of the light-emitting chip 400, raising concerns about the aforementioned peeling and the stability of wire bonding. However, by performing the Y-pushing operation as shown in FIG. 17B , the light-emitting chip 400 slides on the adhesive 1301, and the sides opposite the sides where the first and second rows of the staggered light-emitting chips 400 face each other are pushed toward the center of the adhesive application, so that the adhesive fills the area under the chip. Although the entire area under the chip is not filled with adhesive 1301, the possibility of peeling starting from the outer periphery is reduced compared to the state shown in FIG. 17A , where the two outer edges of the light-emitting chip 400 are not filled with adhesive 1301. Furthermore, the adhesive 1301 fills the area under the pads 408, improving the stability of wire bonding. In addition, there is little overflow when the chips land, and there is no concern that the side where the first and second rows of staggered light-emitting chips 400 face each other will drag overflowing adhesive 1301a during the Y-pushing operation, so there is almost no possibility of adhesive 1301 coming into contact between the first and second rows of staggered light-emitting chips 400.
[0062] In this way, it is desirable to limit the amount of adhesive 1301 to an amount that prevents the adhesive 1301 from coming into contact between the first and second rows of staggered light-emitting chips 400 after the Y-pushing operation, while ensuring that the side where the first and second rows of staggered light-emitting chips 400 face each other and the opposite side thereof reach the area of the adhesive 1301 after the Y-pushing operation. This is determined by the relationship between the Y-direction width and Y-pushing amount of the light-emitting chips 400, the physical properties of the adhesive 1301, and the Y-direction width after crushing, so it is important to deal with the situation appropriately.
[0063] As described above, in this embodiment, the adhesive 1301 is applied to a position away from the target position for die bonding, and the light-emitting chip 400 is then landed. After the chip is landed, the Y-positioning operation is performed. As a result, the amount of adhesive 1301 protruding from the light-emitting chip 400 is greater on the side opposite the side where the first and second rows of the staggered arrangement of light-emitting chips 400 face each other than the side where the first and second rows of the staggered arrangement of light-emitting chips 400 face each other. Therefore, the amount of adhesive 1301 protruding between the first and second rows of the staggered arrangement of light-emitting chips 400 is small, reducing the possibility of misalignment of the light-emitting chip 400 due to contact with the adhesive 1301. Furthermore, the amount of adhesive 1301 protruding is greater on the side opposite the side where the first and second rows of the staggered arrangement of light-emitting chips 400 face each other, and the area under the chip is filled with adhesive. This ensures adhesion between the light-emitting chip 400 and the printed circuit board 202 and prevents the light-emitting chip 400 from peeling off from the periphery. Similarly, the adhesive is also filled under the pads 408, which also improves the stability of wire bonding.
[0064] [Second embodiment] A second embodiment of the present invention will be described below with reference to Figures 18 and 19. Figure 18 is a plan view showing the die bonding process according to the second embodiment. Figure 19 is a cross-sectional view showing the die bonding process according to the second embodiment. In this embodiment, the die bonding process is different from that in the first embodiment, so only the differences will be described.
[0065] 18, the Y position of the adhesive 1301 is on an imaginary line 1801 that is offset by Y2 in the direction away from the first and second rows of the staggered arrangement with respect to an imaginary line 1501 that is the center of the light-emitting chip 400 at the target position for die bonding. Furthermore, die bonding is performed so that the Y position of the light-emitting chip 400 overlaps with the imaginary line 1501 that is the target position for die bonding. In other words, die bonding is performed by shifting the application center of the adhesive 1301 from the center of the light-emitting chip 400. If the position of the light-emitting chip 400 is not within the predetermined range, an XYθ post-landing correction operation is performed as described above.
[0066] In this configuration, the center of application of the adhesive 1301 during die bonding is misaligned with the center of the light-emitting chip 400. As shown in FIG. 19 , there is a concern that the reaction force of the adhesive 1301 may cause the light-emitting chip 400 to tilt when the light-emitting chip 400 lands on the printed circuit board 202. If the light-emitting chip 400 tilts, the chip alignment mark 1302 may become unrecognizable, potentially making it impossible to perform post-landing correction. Furthermore, because the adhesive does not collapse, the force of the adhesive 1301 may cause the adhesive to gradually penetrate after die bonding, potentially resulting in a deviation in the accuracy of the light-emitting chip 400. Therefore, although there is a concern that accuracy problems may occur in this embodiment compared to the first embodiment, there is an advantage in that the process is simplified by eliminating the need for a Y-positioning operation.
[0067] As described above, in this embodiment, the adhesive 1301 is applied to a position offset from the target position for die bonding in the direction separating the first and second rows of the staggered arrangement. As a result, the amount of adhesive 1301 protruding from the light-emitting chip 400 is greater on the side opposite the side where the light-emitting chips 400 in the first and second rows of the staggered arrangement face each other than the side where they face each other. Therefore, the amount of adhesive 1301 protruding between the first and second rows of the staggered arrangement is small, reducing the possibility of misalignment of the light-emitting chip 400 due to contact with the adhesive 1301. Furthermore, the amount of adhesive 1301 protruding is greater on the side opposite the side where the light-emitting chips 400 in the first and second rows of the staggered arrangement face each other, filling the area under the chip with adhesive. This ensures adhesion between the light-emitting chip 400 and the printed circuit board 202 and prevents the light-emitting chip 400 from peeling off from the periphery. Similarly, the adhesive is also filled under the pads 408, which also improves the stability of wire bonding. [Explanation of symbols]
[0068] 202 Printed Circuit Board 400 light-emitting chips 408 Pad 602 Light-emitting element 1301 Adhesive 1302 Chip alignment mark 1303 Virtual Y reference line
Claims
1. a light-emitting chip that emits light to expose a photosensitive member and has a plurality of light-emitting elements arranged along the rotation axis direction of the photosensitive member; a long substrate on which the light-emitting element is mounted; an adhesive applied to a surface of the substrate to bond the substrate and the light emitting chip; Equipped with the adhesive is applied to a surface of the substrate and includes a protruding region that does not overlap the light emitting chip when viewed in a direction perpendicular to the surface of the substrate; the protruding region includes a first protruding region located on one side of the light-emitting chip in a short-side direction of the substrate, and a second protruding region located on the other side of the light-emitting chip; The area of the first protrusion region is larger than the area of the second protrusion region. An exposure head characterized by:
2. the exposure head includes a plurality of the light-emitting chips; 2. The exposure head according to claim 1, wherein the plurality of light-emitting chips are arranged in a staggered pattern along the longitudinal direction of the substrate.
3. the plurality of light emitting chips are arranged in a staggered pattern around a reference line extending in a longitudinal direction of the substrate; 2. The image forming apparatus according to claim 1, wherein the distance between the first protrusion region and the reference line in the short-side direction is longer than the distance between the second protrusion region and the reference line.
4. the photoreceptor; The exposure head according to claim 1 ; The image forming apparatus according to claim 1 , further comprising:
5. 2. The exposure head according to claim 1, wherein the plurality of light-emitting elements are organic EL elements.
6. a light-emitting chip that emits light to expose a photosensitive member and has a plurality of light-emitting elements arranged along the rotation axis direction of the photosensitive member; a long substrate on which the light-emitting element is mounted; an adhesive applied to a surface of the substrate to bond the substrate and the light emitting chip; Equipped with the adhesive is applied to a surface of the substrate and includes a protruding region that does not overlap the light emitting chip when viewed in a direction perpendicular to the surface of the substrate; At least a part of the protruding region is located on one side of the light-emitting chip in the short-side direction of the light-emitting chip, and is not located on the other side of the light-emitting chip. An exposure head characterized by:
7. the exposure head includes a plurality of the light-emitting chips; 7. The exposure head according to claim 6, wherein the plurality of light-emitting chips are arranged in a staggered pattern along the longitudinal direction of the substrate.
8. the photoreceptor; an exposure head according to claim 6; An image forming apparatus comprising:
9. 7. The exposure head according to claim 6, wherein the plurality of light-emitting elements are organic EL elements.
Citation Information
Patent Citations
Manufacturing method for LED substrate
JP2004167872A