Image forming device

Abstract

To provide an image forming device capable of reducing wiring for connecting a controller and an LD substrate.SOLUTION: A plurality of terminals of an ASIC 72 are connected respectively to a plurality of terminals of an LD driver 79 via a harness 73. An LD substrate 75 has: a common terminal 107 which is connected to a controller terminal 101 of the ASIC 72 via first wiring 105 included in the harness 73; LD wiring 109 connecting an LD driver terminal 111 of the LD driver 79 and the common terminal 107; and memory wiring 117 connecting a writing prohibition terminal 115 of a nonvolatile memory 82 mounted on the LD substrate 75 and the common terminal 107. The ASIC 72 outputs an enable signal ENABLE to the LD driver 79 via the first wiring 105 and outputs a write protect signal WP to the nonvolatile memory 82.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present application relates to an image forming apparatus including a laser unit having an LD driver and a memory for controlling the light emission amount of a semiconductor laser, and a controller for controlling the laser unit. [Background technology]

[0002] Conventionally, there is an image forming apparatus that includes a laser unit consisting of a semiconductor laser, a polygon mirror that deflects light from the semiconductor laser, an LD driver that controls the light emission amount of the semiconductor laser, and an LD substrate on which a memory is mounted, and a controller that controls the laser unit. Patent Document 1 describes an image forming apparatus in which an optical scanning device (corresponding to a laser unit) has an EEPROM, and an EEPROM control unit controls reading and writing to the EEPROM. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2010-39416 Summary of the Invention [Problem to be solved by the invention]

[0004] The controller that controls the laser unit is connected to the LD substrate by a harness containing multiple wires in order to control the LD driver and memory mounted on the LD substrate. Because the LD driver and memory are each connected to the controller by multiple wires, the large number of wires connecting the controller and the LD substrate was a problem.

[0005] The present application has been proposed in view of the above-mentioned problems, and aims to provide an image forming apparatus that can reduce the number of wires connecting the controller and the LD substrate. [Means for solving the problem]

[0006] In order to achieve the above object, the image forming apparatus of the present application comprises a laser unit having a semiconductor laser, a polygon mirror that deflects light from the semiconductor laser, and an LD substrate on which a memory can be mounted and which has a plurality of terminals and on which an LD driver that controls the light emission amount of the semiconductor laser is mounted; a photosensitive drum that is exposed by the light deflected by the polygon mirror; and a main substrate on which a controller that has a plurality of terminals including a controller terminal and controls the laser unit is mounted and which is connected to the LD substrate via a harness, wherein the plurality of terminals of the controller are connected to the plurality of terminals of the LD driver by a plurality of wires included in the harness that correspond to the plurality of terminals of the LD driver, and the LD substrate is mounted with a common terminal that is connected to the controller terminal via a first wire that is one of the plurality of wires, an LD wire that connects an LD driver terminal of the LD driver to the common terminal, and a memory wire that connects the memory to the common terminal when the memory is mounted on the LD substrate.

[0007] According to this, the controller can input and output control signals between the controller terminal and a common terminal mounted on the LD substrate. The common terminal mounted on the LD substrate is connected to the LD driver terminal of the LD driver by LD wiring and to the memory by memory wiring. Compared to wiring the LD driver terminal of the LD driver and the memory to two terminals of the controller, by mounting the common terminal on the LD substrate, the wiring between the controller and the LD substrate can be shared, and the number of wirings and the number of terminals of the controller can be reduced.

[0008] In order to achieve the above object, the image forming apparatus of the present application includes a laser unit having a semiconductor laser, a polygon mirror that deflects light from the semiconductor laser, an LD substrate on which a memory can be mounted and an LD driver that controls the amount of light emitted from the semiconductor laser is mounted, a polygon motor that rotates the polygon mirror, and a polygon motor substrate on which a motor driver that has a plurality of terminals including a motor driver control terminal and that rotates the polygon motor is mounted, a photosensitive drum that is exposed by light deflected by the polygon mirror, and a controller that has a plurality of terminals including a controller terminal and controls the laser unit. a main board mounted on the polygon motor board and connected to the polygon motor board via a harness, wherein a plurality of terminals of the controller are connected to a plurality of terminals of the motor driver by a plurality of wires included in the harness, respectively; the laser unit is mounted with a common terminal connected to the controller terminal via a first wire that is one of the plurality of wires; the polygon motor board is mounted with a motor driver wire that connects the motor driver control terminal and the common terminal; and the LD board is mounted with a memory wire that connects the memory and the common terminal when the memory is mounted on the LD board.

[0009] According to this, the controller can input and output control signals between the controller terminal and a common terminal mounted on the polygon motor substrate. The common terminal mounted on the laser unit is connected to the motor driver control terminal of the motor driver by motor driver wiring and to the memory by memory wiring. Compared to wiring the motor driver control terminal of the motor driver and the memory to two terminals of the controller, by mounting the common terminal on the laser unit, the wiring between the controller and the LD substrate, etc. can be shared, thereby reducing the number of wirings and the number of terminals on the controller.

[0010] The controller may also be configured to transmit a control signal from the controller terminal to the common terminal at a timing when the semiconductor laser of the laser unit is not to emit light.

[0011] This allows writing to and reading from the memory to be performed when the semiconductor laser is not emitting light and image formation is not being performed. The controller can access the memory through the first wiring when the LD driver is not in use. This also eliminates the impact of memory access on image formation.

[0012] The memory may also have a clock signal input terminal to which a clock signal is input, a data signal input / output terminal to which a data signal is input / output, and a write prohibition terminal to prohibit writing to the memory, the LD driver terminal being an ENABLE terminal to which a control signal for switching between a state in which the LD driver is driven and a state in which the LD driver is stopped can be input from the controller, and the common terminal is connected to the ENABLE terminal by the LD wiring, and is also connected to the write prohibition terminal by the memory wiring.

[0013] According to this, the common terminal is connected to the ENABLE terminal of the LD driver by the LD wiring and to the write-protect terminal of the memory by the memory wiring. The controller can prohibit writing to the memory while the LD driver is driven by outputting an ON signal control signal from the controller terminal. This makes it possible to prevent data from being written to the memory during image formation processing, etc. In addition, the controller can write to and read from the memory while stopping the driving of the LD driver by outputting an OFF signal control signal from the controller terminal. This allows writing to and reading from the memory after stopping the image formation process. can be executed.

[0014] The LD substrate may also be configured such that the LD drivers corresponding to each of the multiple colors are mounted on the LD substrate, and the common terminal is connected to the ENABLE terminals of the multiple LD drivers, respectively, and is connected to the write-protect terminal by the memory wiring.

[0015] According to this, the common terminal is connected to the ENABLE terminal of the LD driver corresponding to each of the multiple colors by the memory wiring. The wiring connecting the write protection terminal of the memory and the ENABLE terminals of the multiple LD drivers to the controller terminal of the controller can be made common using the first wiring. The number of wirings and the number of terminals of the controller can be further reduced.

[0016] The laser unit may further include a polygon motor that rotates the polygon mirror, and a motor driver that has a plurality of terminals including a motor driver control terminal and drives the polygon motor to rotate, and the laser unit may be configured to be equipped with a polygon motor control terminal that is the controller terminal and a second common terminal that is connected via a second wiring that is one of the plurality of wirings, a motor driver wiring that connects the motor driver control terminal and the second common terminal, and a second memory wiring that connects the memory and the second common terminal when the memory is mounted on the LD substrate.

[0017] According to this, the controller can input and output control signals between the polygon motor control terminal and the second common terminal mounted on the LD substrate. The second common terminal mounted on the LD substrate is connected to the motor driver control terminal of the motor driver by the motor driver wiring and to the memory by the second memory wiring. Compared to wiring the motor driver control terminal of the motor driver and the memory to two terminals of the controller, by mounting the second common terminal on the laser unit, it is possible to share the wiring between the controller and the LD substrate and the motor driver, thereby reducing the number of terminals of the controller.

[0018] The controller may also be configured to transmit a control signal from the controller terminal to the memory at a timing when the semiconductor laser of the laser unit is not to emit light.

[0019] This allows writing to and reading from the memory to be performed when the semiconductor laser is not emitting light, the polygon motor is not rotating, and image formation is not being performed. The controller can access the memory through the first wiring and the second wiring when the LD driver and the motor driver are not being used.

[0020] The memory may also have a clock signal input terminal to which a clock signal is input, a data signal input / output terminal to which a data signal is input / output, and a write prohibition terminal to prohibit writing to the memory; the motor driver may have an ON signal terminal to which an ON signal is input that switches the motor driver between a driving state and a driving stopped state, a motor clock signal terminal to which a motor clock signal is input, and a LOCKn signal terminal to output a LOCKn signal that indicates whether the polygon motor has rotated to a predetermined number of rotations; and the laser unit may have two second common terminals, a first second common terminal connected to the ON signal terminal by the motor driver wiring and connected to the data signal input / output terminal by the second memory wiring, and a second second common terminal connected to the LOCKn signal terminal by the motor driver wiring and connected to the clock signal input terminal by the second memory wiring.

[0021] According to this, the first and second common terminals of the laser unit are connected to the ON signal terminal of the motor driver by the motor driver wiring and to the data signal input / output terminal of the memory by the second memory wiring, respectively. The controller can write to and read from the memory using the wiring connected to the motor driver. The second second common terminal is connected to the LOCKn signal terminal by a motor driver wiring and to the clock signal input terminal by a second memory wiring. The controller can determine whether the polygon motor has rotated a predetermined number of times based on the LOCKn signal without accessing the memory.

[0022] Furthermore, the main board may have a main body memory capable of storing correction data for image formation, and the image forming device may be configured such that, when the memory is mounted on the LD substrate of the mounted laser unit, the controller reads out the correction data from the memory via the common terminal and the first wiring and uses it for control, and when the memory is not mounted on the LD substrate of the mounted laser unit, the controller reads out the correction data from the main body memory and uses it for control.

[0023] According to this, when a laser unit with a memory mounted on the LD substrate is installed, the correction data can be read from the memory on the LD substrate and used for control. Also, when a laser unit without a memory mounted on the LD substrate is installed, the correction data can be read from the main body memory of the image forming apparatus and used for control. Appropriate correction data can be used for image formation depending on whether or not memory is available.

[0024] In addition, the controller may be configured to attempt to access the memory of the laser unit when starting to read the correction data, and if access to the memory is successful, read the correction data from the memory and use it for control, and if access to the memory is unsuccessful, read the correction data from the main memory and use it for control.

[0025] This allows the controller to automatically change the read destination of the correction data based on the result of accessing the memory of the laser unit. Therefore, when installing the laser unit in the image forming apparatus, the user does not need to configure the image forming apparatus to determine whether the laser unit has memory or not. This improves usability. [Effects of the Invention]

[0026] According to the image forming apparatus of the present application, the number of wires connecting the controller and the LD substrate can be reduced. [Brief explanation of the drawings]

[0027] [Figure 1] 1 is a cross-sectional view showing a schematic configuration of a color laser printer according to a first embodiment of the present invention. [Figure 2] FIG. 2 is a block diagram showing the electrical connection relationship between the main board and the laser unit according to the first embodiment. [Figure 3] 3 is a block diagram showing the connection relationship between the LD driver, the nonvolatile memory, and the polygon motor substrate according to the first embodiment. FIG. [Figure 4] FIG. 2 is a diagram showing the laser unit according to the first embodiment as viewed from above, illustrating the path of a beam emitted from a semiconductor laser until it reaches a BD sensor. [Figure 5] 10 is a flowchart showing an access process. [Figure 6] FIG. 10 is a block diagram showing the connection relationship between an LD driver, a nonvolatile memory, and a polygon motor substrate according to the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0028] (First embodiment) A color laser printer according to a first embodiment, which is an embodiment of the image forming apparatus of the present application, will be described below with reference to FIG. 1. FIG. 1 is a cross-sectional view showing the schematic configuration of a color laser printer 10 according to the first embodiment. The color laser printer 10 is an example of the image forming apparatus of the present application. Hereinafter, the color laser printer 10 will be abbreviated to printer 10. The printer 10 includes a main body housing 2, a conveying unit 3, a processing unit 4, and a fixing device 5. For ease of explanation, the up-down direction and the front-rear direction of the printer 10 will be defined as indicated by the arrows in FIG. 1. The front side of the paper will be defined as the right, and the far side of the paper will be defined as the left.

[0029] The main body housing 2 has an openable front cover 11 and a rear cover 12, a supply tray 13, a discharge tray 15, and a transport path 17. The supply tray 13 is detachably attached to the bottom of the main body housing 2. Sheets S are placed on the supply tray 13. The sheets S are standard-sized paper such as A4 size. The sheets S are not limited to paper media such as plain paper or cardboard, and may be other recording media such as overhead projector film. The discharge tray 15 is provided at the top of the main body housing 2, and sheets S on which images have been formed are placed on the discharge tray 15.

[0030] The conveying unit 3 includes a pickup roller 21, a separation roller 22, and a plurality of conveying rollers 23. The pickup roller 21 picks up the sheets S in the supply tray 13 and conveys them toward the conveying path 17. The separation roller 22 separates the sheets S picked up by the pickup roller 21 one by one. The plurality of conveying rollers 23 eject the sheets S separated by the separation roller 22 along the conveying path 17, passing them through the process unit 4 and the fixing device 5 in this order, and onto the discharge tray 15. The conveying unit 3 rotates each roller based on the drive of a main motor (not shown) provided inside the main body housing 2.

[0031] The conveying unit 3 also includes a plurality of switchback rollers 25 that reverse the sheet S printed on one side, and a reverse conveying path 27. The printer 10 can switch the conveying destination of the sheet S between the discharge tray 15 and the reverse conveying path 27 indicated by the dashed line by swinging a flapper 28 provided downstream of the fixing device 5 on the conveying path 17. The conveying unit 3 swings the flapper 28 to the position indicated by the two-dot chain line based on the drive of the main motor, and rotates the plurality of switchback rollers 25, thereby conveying the sheet S upward along the reverse conveying path 27. The conveying unit 3 reversely rotates the switchback rollers 25 to convey the sheet S conveyed upward along the reverse conveying path 27, passing below the supply tray 13 and conveying it to the front side. As a result, the sheet S is reversed and conveyed to the base end of the conveying path 17. The printer 10 performs double-sided printing by printing on the top side of the reversed sheet S (the side opposite to the side printed the first time). Furthermore, the printer 10 is capable of printing even with the rear cover 12 open, and the printed sheet S can be discharged onto the open rear cover 12.

[0032] The process unit 4 has a function of forming an image on the sheet S, and transfers a toner image onto the sheet S. The process unit 4 includes a laser unit 31, a drum unit 32, four developing cartridges 33Y, 33M, 33C, and 33K, and a transfer unit 34.

[0033] The laser unit 31 is disposed in the upper part of the main body housing 2, and exposes the surface of the photosensitive drum 41 by emitting laser light indicated by the dashed line onto the surface of the photosensitive drum 41 of the drum unit 32. Details of the laser unit 31 will be described later.

[0034] The drum unit 32 is provided in the main body housing 2 with the supply tray 13 and the laser unit 31. and is provided with four photosensitive drums 41, four chargers 43, and a support frame 45 that supports the photosensitive drums 41, etc. The drum unit 32 is detachable from the main body housing 2 when the front cover 11 is open.

[0035] The developer cartridges 33Y, 33M, 33C, and 33K correspond to four colors: yellow (Y), magenta (M), cyan (C), and black (K), respectively, and are detachably mounted in the drum unit 32 in that order from the front to the rear of the printer 10. Each of the developer cartridges 33Y, 33M, 33C, and 33K includes a developer roller 51, a supply roller 52, and a toner storage section 53. Note that the four developer cartridges 33Y, 33M, 33C, and 33K differ in toner color but are otherwise identical in configuration. For this reason, in the following description, the four developer cartridges 33Y, 33M, 33C, and 33K corresponding to each color will be collectively referred to as developer cartridges 33. In addition, other devices (such as semiconductor laser 77) corresponding to the colors yellow, magenta, cyan, and black may be described individually with the letters Y, M, C, and K added after their reference numbers, or collectively without reference numbers, just like the developing cartridge 33.

[0036] The transfer unit 34 is disposed between the supply tray 13 and the drum unit 32 inside the main body housing 2, and includes a drive roller 61, a driven roller 62, a conveyor belt 63, and four transfer rollers 64. The conveyor belt 63 is stretched between the drive roller 61 and the driven roller 62, and its upper surface is in contact with the photosensitive drum 41. The four transfer rollers 64 are disposed inside the conveyor belt 63 so as to sandwich the conveyor belt 63 between themselves and the corresponding photosensitive drum 41.

[0037] The charger 43 is provided above the photosensitive drum 41 and is, for example, a scorotron charger having a charging wire or grid. The process unit 4 generates a corona discharge using the charger 43, uniformly positively charging the surface of the photosensitive drum 41. The laser unit 31 irradiates the surface of the photosensitive drum 41 with laser light to expose it, thereby forming an electrostatic latent image based on image data on the surface of the photosensitive drum 41. Note that the device that charges the photosensitive drum 41 is not limited to a scorotron charger, and may be another device such as a roller-type charging roller. Furthermore, the polarity with which the photosensitive drum 41 is charged is not limited to positive charging, and may be negative charging.

[0038] Furthermore, the process unit 4 supplies toner in the toner storage unit 53 to the supply roller 52, which then supplies the toner to the development roller 51. The toner supplied to the development roller 51 is carried on the development roller 51 as the development roller 51 rotates. The development roller 51 is rotated by the rotational driving force of the main motor, supplies toner to the photosensitive drum 41, develops the electrostatic latent image formed on the surface of the photosensitive drum 41, and carries a toner image. The toner carried on the development roller 51 moves to the electrostatic latent image on the photosensitive drum 41 due to the potential difference between the development roller 51 and the electrostatic latent image formed on the photosensitive drum 41, and forms a toner image. This toner image is transferred to the sheet S by applying a negative voltage to the transfer roller 64 while the photosensitive drum 41 is in contact with the sheet S on the transport path 17.

[0039] The fixing device 5 is disposed behind the process unit 4 within the main body housing 2. The sheet S onto which the toner image has been transferred is transported to the fixing device 5. The fixing device 5 has a heating roller 67 that heats the sheet S and a pressure unit 68 that sandwiches the sheet S between the heating roller 67 and the sheet S. The heating roller 67 has a heater 69 therein that heats the heating roller 67. The pressure unit 68 has an endless belt, a pressure pad that sandwiches the endless belt between the heating roller 67 and the pressure pad, a holder that supports the pressure pad, a belt guide, etc. The pressure unit 68 is rotated by the rotational driving force transmitted from the main motor, and presses the sheet S against the heating roller 67 to apply pressure to the sheet S. In this way, the fixing device 5 fixes the toner image to the sheet S.

[0040] (Regarding laser unit 31) Next, the laser unit 31 will be described. As shown in FIG. 2, the printer 10 is provided with a main board 71 that controls the laser unit 31. The main board 71 has an ASIC 72. The ASIC 72 is an Application Specific Integrated Circuit and includes a CPU and the like. The ASIC 72 reads and executes a control program from a storage device (e.g., a ROM) and performs overall control of the printer 10. The storage device that stores the control program may be the main memory 76, which will be described later. The configuration of the main board 71 shown in FIG. 2 is one example. For example, the main board 71 may include an SoC (System on a Chip) as a controller instead of an ASIC.

[0041] The main board 71 is connected to the laser unit 31 via a harness 73. The harness 73 is, for example, a flexible flat cable and has a plurality of wires. The main board 71 controls the operation of the laser unit 31 via the harness 73.

[0042] The laser unit 31 also has an LD substrate 75, four semiconductor lasers 77Y, 77M, 77C, and 77K corresponding to the respective colors, and a polygon motor substrate 78. The LD substrate 75 has four LD drivers 79Y, 79M, 79C, and 79K corresponding to the respective colors, four generation circuits 81Y, 81M, 81C, and 81K corresponding to the respective colors, a nonvolatile memory 82, a first BD sensor 83, and a second BD sensor 84.

[0043] The LD driver 79, semiconductor laser 77, and generation circuit 81 corresponding to each color have the same configuration. Therefore, in the following description, they will be referred to as the LD driver 79, semiconductor laser 77, and generation circuit 81. As shown in FIG. 2, the semiconductor laser 77 has a first laser diode LD1, a second laser diode LD2, and a photodiode PD. Note that FIG. 2 illustrates the first laser diode LD1 and the like only for the semiconductor laser 77K corresponding to black. The semiconductor laser 77 is, for example, a unitized unit in which the first and second laser diodes LD1 and LD2 and the photodiode PD are housed in a cap and electrically connected to the LD substrate 75. The first and second laser diodes LD1 and LD2 are, for example, edge-emitting elements that emit laser light from two end faces of the element. The first laser diode LD1 of the semiconductor laser 77 emits laser light L from the end face facing the polygon mirror 92 (the upper end face in FIG. 4) and emits back laser light (not shown) from the opposite end face. The second laser diode LD2 has the same configuration as the first laser diode LD1. The photodiode PD is attached in the unit at a position where it can receive the back laser light from both the first and second laser diodes LD1 and LD2.

[0044] The first and second laser diodes LD1 and LD2 are examples of the semiconductor laser of the present application. The semiconductor laser of the present application is not limited to an edge-emitting element, but may be a surface-emitting element. Furthermore, the element that receives laser light such as back laser light is not limited to a photodiode, but may be another light-receiving element that can convert light into an electrical signal, such as a CMOS image sensor.

[0045] The LD driver 79 is a driver circuit that causes the semiconductor laser 77 to emit light, and includes, for example, a light intensity control circuit (APC), a modulation circuit, and a current mirror circuit corresponding to each of the first and second laser diodes LD1 and LD2. Therefore, in the following description, the first laser diode LD1 will be mainly described, and the description of the second laser diode LD2 will be omitted as appropriate.

[0046] The photodiode PD detects a back laser beam when the first laser diode LD1 emits light. When light is received, a photocurrent Ipd corresponding to the amount of received back laser light is generated. The LD driver 79 detects a detection voltage corresponding to the magnitude of the photocurrent Ipd using a current mirror circuit, compares the detection voltage detected by the current mirror circuit with a reference voltage Vref1 input from the generation circuit 81 using a light intensity adjustment circuit, and controls the current Ild1 flowing through the first laser diode LD1 so that the voltage value of the detection voltage becomes the reference voltage Vref1. As a result, the current Ild1 is adjusted based on the reference voltage Vref1 and the detection voltage, and the light emission intensity of the first laser diode LD1 is adjusted. Note that the LD driver 79 can also adjust the light emission intensity of the first laser diode LD1 by changing the resistance value of the fixed resistor R1 connected between the output terminal that outputs the detection voltage of the current mirror circuit and ground. As shown in Figure 4 (described later), the optical path lengths of the laser light L of each color are different. Alternatively, the number of lenses through which the laser light L passes and the number of lenses from which it reflects vary depending on the color. Therefore, by changing the resistance value of the fixed resistor R1, such as when manufacturing the printer 10, the LD board 75 can adjust the light emission amount of the first laser diode LD1 according to the optical path and number of lenses for each color.

[0047] The generating circuit 81 includes a smoothing circuit and the like. The ASIC 72 outputs a voltage based on PWM signals (pulse width modulation signals) PWM1 and PWM2 to the generating circuit 81 via a harness 73. The PWM signals PWM1 and PWM2 are pulse width modulation signals that are repeatedly turned on and off at a predetermined frequency. When the PWM signals PWM1 and PWM2 are on, the ASIC 72 applies a predetermined voltage to the smoothing circuit, and when the PWM signals PWM1 and PWM2 are off, the ASIC 72 does not apply a voltage to the smoothing circuit. The duty ratio of the PWM signals PWM1 and PWM2 is the proportion of the time during which the voltage application is on during one period of the pulse width modulation signals. The generation circuit 81 smoothes the voltage based on the PWM signals PWM1 and PWM2 in a smoothing circuit, and outputs the smoothed voltage to the LD driver 79 as a reference voltage Vref1. As a result, the ASIC 72 changes the duty ratio of the PWM signal PWM1, thereby changing the voltage value of the reference voltage Vref1 and controlling the light emission amount of the first laser diode LD1. Similarly, the ASIC 72 changes the reference voltage Vref2 using the PWM signal PWM2 to control the light emission amount of the second laser diode LD2.

[0048] The light intensity adjustment circuit of the LD driver 79 is connected to the anode of the first laser diode LD1 via a modulation circuit. This modulation circuit turns the light emission of the first laser diode LD1 on and off by turning on and off the current Ild1 based on the binary video signal VS1 input from the ASIC 72. As a result, the LD driver 79 switches the first and second laser diodes LD1 and LD2 between an on-state and an off-state based on the video signals VS1 and VS2 input from the ASIC 72.

[0049] For example, during printing, the ASIC 72 changes the video signals VS1 and VS2 based on image data and turns on and off the first and second laser diodes LD1 and LD2 to form an electrostatic latent image on the photosensitive drum 41. The printer 10 of this embodiment can simultaneously perform exposure using two laser diodes. Specifically, the first and second laser diodes LD1 and LD2 are, for example, arranged at offset positions. The laser beams L of the first and second laser diodes LD1 and LD2 are reflected by the reflective surfaces of a polygon mirror 92 (see FIG. 4) at offset positions in the direction of the rotation axis of the polygon mirror 92 (first direction, described below). Therefore, by rotating at high speed, the polygon mirror 92 periodically deflects the laser beams L emitted from the first and second laser diodes LD1 and LD2, thereby simultaneously forming two scanning lines on the surface of the photosensitive drum 41 in a direction perpendicular to the rotation direction of the photosensitive drum 41, i.e., parallel to the main scanning direction. The laser unit 31 may be configured to include only one laser diode, or three or more laser diodes. Therefore, the number of light intensity adjustment circuits, modulation circuits, etc. included in the LD substrate 75 may be changed depending on the number of laser diodes.

[0050] The nonvolatile memory 82 shown in FIG. 2 is, for example, an EEPROM (Electrically The nonvolatile memory 82 is a rewritable memory such as an Erasable Programmable Read-Only Memory (EEPROM). The nonvolatile memory 82 is not limited to an EEPROM, but may be another type of nonvolatile memory such as a flash memory or an EPROM. The nonvolatile memory 82 stores, for example, characteristic values ​​relating to the individual characteristics of the laser unit 31. These characteristic values ​​may be correction data used for image formation. Specifically, the nonvolatile memory 82 may store correction data for adjusting the light emission amount of the semiconductor laser 77 by changing the duty ratio of the PWM signals PWM1 and PWM2 output by the ASIC 72. Furthermore, the correction data for the PWM signals PWM1 and PWM2 may use values ​​corresponding to the fixed resistors R1 and R2 connected to the LD drivers 79 for each color. Alternatively, the nonvolatile memory 82 may store correction data for adjusting the rotation speed of the polygon motor 89 to adjust the scanning position. The information stored in the non-volatile memory 82 is not limited to correction data, but may also include information on the serial number of the printer 10, log data storing the operating status of the printer 10, historical information on the laser unit 31 used in the past, etc.

[0051] Furthermore, a main memory 76 is mounted on the main board 71. The main memory 76 is a nonvolatile memory, such as an NVRAM, similar to the nonvolatile memory 82 of the LD board 75. The main memory 76 stores the same type of data as the nonvolatile memory 82. For example, the main memory 76 stores initial values ​​of correction data stored at the time of shipment from the factory and correction data read from the nonvolatile memory 82 of the attached laser unit 31.

[0052] (Connections between the main board 71, non-volatile memory 82, and polygon motor board 78) Next, the connection between the main board 71, the nonvolatile memory 82, and the polygon motor board 78 will be described. Figure 3 shows the connection relationship between the LD driver 79K, the nonvolatile memory 82, and the polygon motor board 78. Note that the connections of the LD drivers 79C, 79M, and 79Y are the same as those of the LD driver 79K, and therefore are not shown. Also, in Figure 3, some terminals and the like are not shown to avoid cluttering the drawing.

[0053] As shown in Fig. 3, the main substrate 71 has a controller terminal 101, two memory terminals 106 and 108, and three polygon motor control terminals 102, 103, and 104. The controller terminal 101 is connected to a common terminal 107 of the LD substrate 75 via a first wiring 105 included in the harness 73. The common terminal 107 is also connected to an LD driver terminal 111 of each of the four LD drivers 79 via an LD wiring 109. Note that Fig. 3 only shows the LD driver terminal 111 of the LD driver 79K. The ASIC 72 outputs an enable signal ENABLE from the controller terminal 101 to the LD driver terminal 111 of each LD driver 79.

[0054] The enable signal ENABLE is a control signal that switches the LD driver 79 between an operating state and a stopped state. For example, when a high-level enable signal ENABLE is input, the LD driver 79 operates and drives the light intensity adjustment circuit and the current mirror circuit. When a low-level enable signal ENABLE is input, the LD driver 79 stops each circuit and stops driving. In the printer 10 of this embodiment, the four LD drivers 79Y, 79M, 79C, and 79K share a wiring for receiving the enable signal ENABLE from the ASIC 72. Specifically, the enable signal ENABLE is output from one controller terminal 101 of the ASIC 72 and transmitted through a common first wiring 105 in the harness 73. The enable signal ENABLE is input from a common terminal 107 on the LD board 75 to each of the four LD drivers 79Y, 79M, 79C, and 79K via the LD wiring 109. The common terminal 107 is, for example, a connector mounted on the LD substrate 75, and is connectable to the harness 73. The wiring 109 may be a circuit pattern formed on the LD substrate 75, or may be a wiring (signal line) connecting two connectors on the LD substrate 75, or may be a combination of these. The same applies to other wiring described later.

[0055] The nonvolatile memory 82 also has a clock signal input terminal 113 to which a clock signal CKL1 is input, a data signal input / output terminal 114 to which a data signal DATA is input / output, and a write-protect terminal 115 to prohibit writing to the nonvolatile memory 82. The clock signal CLK1, the data signal DATA, and the write-protect signal WP are input / output to / from the nonvolatile memory 82 from the ASIC 72 via the harness 73.

[0056] The clock signal CLK1 is a synchronization signal that synchronizes the timing of writing data to or reading data from the nonvolatile memory 82. The ASIC 72 outputs the clock signal CLK1 from the memory terminal 106 to the clock signal input terminal 113 via the harness 73. The data signal DATA is data to be written to the nonvolatile memory 82 or data read from the nonvolatile memory 82. The memory terminal 108 of the ASIC 72 is connected to the data signal input / output terminal 114 via the harness 73. The ASIC 72 inputs and outputs the data signal DATA between the memory terminal 108 and the data signal input / output terminal 114.

[0057] The write protect signal WP is a control signal that indicates whether or not to prohibit writing to the nonvolatile memory 82. For example, when a high-level write protect signal WP is input to the write prohibit terminal 115, the nonvolatile memory 82 prohibits writing to the nonvolatile memory 82, and when a low-level write protect signal WP is input to the write prohibit terminal 115, the nonvolatile memory 82 allows writing to the nonvolatile memory 82.

[0058] The write protect terminal 115 is connected to the common terminal 107 via a memory wiring 117 mounted on the LD substrate 75. Therefore, in the printer 10 of this embodiment, the wiring in the harness 73 that transmits the write protect signal WP is also used as the wiring (first wiring 105) that transmits the enable signal ENABLE to the LD driver 79. This makes it possible to reduce the number of wirings included in the harness 73, i.e., the number of wirings connecting the main substrate 71 and the LD substrate 75, and also to reduce the number of terminals of the ASIC 72. The wiring for the write protect signal WP and the wiring for the enable signal ENABLE may be separate wirings.

[0059] Furthermore, the LD driver terminals 111 of the four LD drivers 79Y, 79M, 79C, and 79K are connected to the common terminal 107 via the LD wiring 109. Therefore, in this embodiment, not only is the wiring for the write protect signal WP and the enable signal ENABLE shared, but the wiring for the enable signal ENABLE of the four LD drivers 79Y, 79M, 79C, and 79K is also shared, thereby reducing the number of wirings. Note that the wiring for outputting the enable signal ENABLE to the four LD drivers 79Y, 79M, 79C, and 79K may be separate wirings. The types of signals input to and output from the nonvolatile memory 82 and the number of terminals described above are merely examples. For example, the nonvolatile memory 82 may be provided with a write enable terminal to which a write enable signal WP for enabling writing is input, instead of the write disable terminal 115 to which the write protect signal WP is input. In this case, a circuit for inverting the signal level may be provided between the common terminal 107 and the write enable terminal.

[0060] The polygon motor board 78 also has a motor driver 87 and a polygon motor 89. The polygon motor board 78 is connected to the main board 71 via a harness 73. The harness 73 connecting the LD board 75 and the main board 71 may be a harness separate from the harness 73 connecting the polygon motor board 78 and the main board 71.

[0061] The motor driver 87 has an ON signal terminal 121 to which an ON signal ON is input, a motor clock signal terminal 122 to which a motor clock signal CLK2 is input, and a LOCKn signal terminal 123 to which a LOCKn signal LOCKn is output. The ON signal ON is a control signal that switches the motor driver 87 between a driving state and a driving stopped state. The ON signal terminal 121 is connected to the polygon motor control terminal 102 of the ASIC 72 via a second wiring 125 included in the harness 73, and receives the ON signal ON. The motor clock signal terminal 122 is connected to the polygon motor control terminal 103 of the ASIC 72 via a second wiring 126 included in the harness 73, and receives the motor clock signal CLK2. The LOCKn signal terminal 123 is connected to the polygon motor control terminal 104 via a second wiring 127 included in the harness 73, and outputs the LOCKn signal LOCKn.

[0062] The polygon motor 89 is, for example, a DC brushless motor. The motor driver 87 has, for example, multiple switch elements that switch the current supplied to the windings of the polygon motor 89. The motor clock signal CLK2 is a control signal for switching the switch elements of the motor driver 87 on and off. For example, when a high-level ON signal ON is input, the motor driver 87 drives each circuit and controls the switch elements on and off based on the motor clock signal CLK2. This causes the polygon motor 89 to start rotating. The ASIC 72 can control the rotation speed, etc. of the polygon motor 89 by changing the frequency, etc., of the motor clock signal CLK2. Furthermore, when a low-level ON signal ON is input, the motor driver 87 stops each circuit and enters a drive-stop state. The motor driver 87 may be provided on the main board 71.

[0063] The LOCKn signal LOCKn is a control signal indicating whether the polygon motor 89 has rotated to a predetermined number of rotations (a predetermined number of rotations or rotational speed). For example, the motor driver 87 outputs a high-level LOCKn signal LOCKn from the LOCKn signal terminal 123 until the number of rotations per unit time of the polygon motor 89 reaches a predetermined number of rotations, and when it detects that the number of rotations per unit time has reached the predetermined number of rotations, it outputs a low-level LOCKn signal LOCKn from the LOCKn signal terminal 123. This allows the ASIC 72 to detect whether the polygon motor 89 has rotated to a predetermined number of rotations based on the LOCKn signal LOCKn. Note that the predetermined number of rotations in this application is not limited to the number of rotations per unit time, but may also refer to a state in which the rotational speed of the motor reaches a predetermined rotational speed.

[0064] 4 is a top view of the laser unit 31, showing the path of the beam LB emitted from the semiconductor laser 77 until it reaches the first and second BD sensors 83 and 84. As shown in FIG. 4, the laser unit 31 includes four collimating lenses (which may also be referred to as coupling lenses) 91Y, 91M, 91C, and 91K, a polygon mirror 92, two fθ lenses (which may also be referred to as scanning lenses) 93YM and 93CK, four reflecting mirrors 94Y, 94M, 94C, and 94K corresponding to each color, a first mirror 95, a second mirror 96, and a frame 97. The collimating lens 91 and other components are attached to the frame 97. In the following description, a direction parallel to the rotation axis X1 of the polygon mirror 92 (a direction perpendicular to the plane of FIG. 4) is referred to as a "first direction." Furthermore, the direction perpendicular to the first direction, in which the polygon mirror 92 and the fθ lenses 93YM and 93CK are aligned (the left-right direction in FIG. 4), is referred to as the "second direction." Furthermore, the direction perpendicular to the first and second directions is referred to as the "third direction." The third direction corresponds to the main scanning direction, and the first direction corresponds to the sub-scanning direction. Arrows indicating each direction in the drawings point to one side in each direction.

[0065] The LD substrate 75 is attached to a side surface of the frame 97 in the third direction. The four semiconductor lasers 77 are attached to the center of the LD substrate 75 in the first and second directions. Each of the four collimating lenses 91 is connected to a semiconductor laser 77 corresponding to each color and a third semiconductor laser 77. The polygon mirror 92, the collimating lens 91, and the semiconductor laser 77 are arranged in opposing positions in the third direction. The polygon mirror 92, the collimating lens 91, and the semiconductor laser 77 are arranged side by side along the third direction. The collimating lens 91 converts the laser light L from the semiconductor laser 77 into a beam LB and emits it toward the polygon mirror 92. In the following explanation, to avoid complication, the beam LB may be referred to as laser light L. For example, the laser light L emitted from the semiconductor laser 77 toward the polygon mirror 92 refers to the beam LB emitted from the semiconductor laser 77, converted by the collimating lens 91, and emitted toward the polygon mirror 92. The above-described optical system configuration is one example. The laser unit 31 may include an aperture plate and a condenser lens through which the laser light L passes.

[0066] The laser unit 31 converts the laser light L emitted from the semiconductor laser 77 into a beam LB, and the beam LB deflected by a polygon mirror 92 is directed toward and exposes the photosensitive drum 41 of the developer cartridge 33. The polygon mirror 92 is a rotating polygonal mirror, and is shaped, for example, like a regular pentagonal prism, with five reflective surfaces constituting each side of the pentagonal prism. The polygon mirror 92 is driven to rotate by a polygon motor 89 (see FIG. 2) and deflects the laser light L from the semiconductor laser 77. The polygon mirror 92 rotates, for example, clockwise in FIG. 4, and deflects the beam LB incident from the collimator lens 91 in the main scanning direction.

[0067] The fθ lens 93 focuses the beam LB reflected by the polygon mirror 92. The reflecting mirrors 94 are provided corresponding to each color and are arranged side by side in the second direction. The four reflecting mirrors 94 are arranged side by side in the order of 94Y, 94M, 94C, and 94K from one side in the second direction (the right side in FIG. 4). The polygon mirror 92 is arranged between the reflecting mirrors 94C and 94M in the second direction. The fθ lens 93YM is shared by the beams LB of the semiconductor lasers 77Y and 77M and is arranged between the reflecting mirror 94M and the polygon mirror 92 in the second direction. The fθ lens 93CK is shared by the beams LB of the semiconductor lasers 77C and 77K and is arranged between the reflecting mirror 94C and the polygon mirror 92 in the second direction.

[0068] The four reflecting mirrors 94 are attached, for example, at different positions and in different orientations in the first direction, and focus the beams LB emitted from the four semiconductor lasers 77 and focused by the fθ lenses 93 onto the surfaces of the photosensitive drums 41 of the respective colors. Therefore, the optical distances (optical paths) of the beams LB corresponding to the respective colors from the semiconductor lasers 77 to the photosensitive drums 41 are different. When the polygon mirror 92 rotates in conjunction with the rotation of the polygon motor 89, the angle of the reflecting surface relative to the emission direction of the beam LB from the collimator lens 91 periodically changes. As a result, the beams LB are periodically deflected by the reflecting surface of the polygon mirror 92, forming scan lines on the surface of the photosensitive drums 41.

[0069] The first BD sensor 83 and the second BD sensor 84 are disposed at positions that are opposite ends of the LD substrate 75 in the second direction. The first BD sensor 83 is a sensor that detects the beam LBY corresponding to yellow out of the beams LB deflected by the polygon mirror 92. The first mirror 95 is disposed at a position between the polygon mirror 92 and the first BD sensor 83 in the third direction, and reflects the beam LBY, which is irradiated from the polygon mirror 92 via an fθ lens 93YM, toward the first BD sensor 83 when the reflective surface of the polygon mirror 92 is at a specific angle. Note that the first effective scanning range RA1 shown in FIG. 4 indicates the scanning range used to form an image of the beam LBY corresponding to yellow, and the second effective scanning range RA2 indicates the scanning range used to form an image of the beam LBK corresponding to black.

[0070] The first BD sensor 83 includes, for example, a photodiode and a comparison circuit. When the amount of light received by the beam LBY on the first BD sensor 83 is equal to or less than a predetermined threshold, the first BD sensor 83 outputs a high-level detection signal Vo1 (see FIG. 2), and when the amount of light received is greater than the predetermined threshold, the first BD sensor 83 outputs a low-level detection signal Vo1. The first BD sensor 83 outputs the detection signal Vo1 to the ASIC 72 on the main board 71 via the harness 73. The ASIC 72 detects a predetermined timing after writing of the beam LBY to the photosensitive drum 41 corresponding to yellow is completed based on the detection signal Vo1 of the first BD sensor 83.

[0071] Furthermore, the second BD sensor 84 and the second mirror 96 have the same configuration as the first BD sensor 83 and the first mirror 95, and therefore detailed description thereof will be omitted. Similar to the first BD sensor 83, the second BD sensor 84 receives the beam LBK that is irradiated from the polygon mirror 92 via an fθ lens 93CK and reflected by the second mirror 96 when the reflective surface of the polygon mirror 92 is at a specific angle. The second BD sensor 84 outputs a detection signal Vo2 to the ASIC 72 according to the amount of received beam LBK.

[0072] As described above, the ASIC 72 outputs the video signals VS1 and VS2 that switch the light emission state of the semiconductor laser 77 to each of the four LD drivers 79 via the harness 73. For example, the ASIC 72 changes the video signals VS1 and VS2 that are output to the LD drivers 79 of each color based on the time when the second BD sensor 84 detects the beam LBK, and controls the timing when the LD substrate 75 starts exposing the photosensitive drum 41. In this way, by determining the write start position of the image for each color depending on the timing when the beam LBK reaches the second BD sensor 84, it is possible to reduce positional deviation when generating an electrostatic latent image on each photosensitive drum 41.

[0073] The ASIC 72 also corrects thermal expansion of the laser unit 31 (frame 97, lens, etc.) based on the detection signals Vo1 and Vo2 of the first and second BD sensors 83 and 84. The ASIC 72 calculates a correction value for thermal expansion based on the detection timing of the first BD sensor 83 and the second BD sensor 84, for example, and corrects the write timing, etc. The printer 10 may be configured to include only one of the first BD sensor 83 or the second BD sensor 84.

[0074] (Regarding access to nonvolatile memory 82) Next, a process in which the main board 71 accesses the nonvolatile memory 82 will be described. In the following, a process in which correction data is read from the nonvolatile memory 82 will be described as an example of the access process. The printer 10 is detachable, and the laser unit 31 can be replaced in the event of a malfunction or deterioration over time. The printer 10 is also mountable with two laser units 31: one with a nonvolatile memory 82 mounted on the LD board 75, and one without a nonvolatile memory 82 mounted on the LD board 75. The ASIC 72 changes the readout destination for the correction data depending on whether the nonvolatile memory 82 is mounted on the LD board 75 of the laser unit 31 mounted on the printer 10. The laser unit 31 may be one in which the nonvolatile memory 82 is detachable from the laser unit 31.

[0075] FIG. 5 shows a flowchart of the access process. The ASIC 72 starts the process of FIG. 5 when the printer 10 is powered on. The condition for starting the process of FIG. 5 is not limited to the power being turned on, but may also be the laser unit 31 being replaced, for example. When the process of FIG. 5 starts, the ASIC 72 sets the shared wiring to access the nonvolatile memory 82 in step (hereinafter simply referred to as S) 1. Specifically, the ASIC 72 sets the signals output from the controller terminal 101 (in this embodiment, the enable signal ENABLE and the write protect signal WP) to a low level (S1). This makes it possible to write to and read from the nonvolatile memory 82. In this example, only reading of the correction data is executed, but by setting the write protect signal WP to low level, the ASIC 72 can set the enable signal ENABLE that shares the first wiring 105 to low level and stop driving all of the LD drivers 79, and can also set the write protect signal WP to low level, thereby enabling writing to the nonvolatile memory 82. Note that the ASIC 72 may set the write protect signal WP to high level in S1 and execute only reading of the correction data from the nonvolatile memory 82.

[0076] Next, the ASIC 72 executes a process of reading out the correction data from the nonvolatile memory 82 of the LD substrate 75 (S2). The ASIC 72 outputs a predetermined clock signal CLK1 from the memory terminal 106 to the clock signal input terminal 113 of the nonvolatile memory 82, and reads out the data signal DATA from the data signal input / output terminal 114 to the memory terminal 108, thereby reading out the correction data from the nonvolatile memory 82.

[0077] Next, the ASIC 72 determines whether or not the reading of the correction data executed in S2 was successful (S3). If the reading of the correction data from the nonvolatile memory 82 was successful (S3: YES), the ASIC 72 overwrites the correction data stored in the main body memory 76 with the correction data read from the nonvolatile memory 82. This allows correction based on the correction data read from the nonvolatile memory 82 to be executed in the image formation process after startup. Note that the ASIC 72 may store the correction data read from the nonvolatile memory 82 in a storage area separate from the originally stored correction data and use it for control, without overwriting the correction data in the main body memory 76. After executing S4, the ASIC 72 executes S5.

[0078] On the other hand, if the ASIC 72 fails to read the correction data from the nonvolatile memory 82 (S3: NO), it executes S7. For example, if the nonvolatile memory 82 is not mounted on the LD board 75 of the laser unit 31, the ASIC 72 fails to read the correction data. Alternatively, even if the nonvolatile memory 82 is mounted on the LD board 75, if a malfunction or the like occurs in the nonvolatile memory 82, the ASIC 72 fails to read the correction data. In such a case, the ASIC 72 executes control using the correction data in the main body memory 76.

[0079] In S7, the ASIC 72 determines whether or not it is possible to read the correction data from the main body memory 76. If the ASIC 72 has successfully read the correction data from the main body memory 76 (S7: YES), it executes S5. If no correction data is stored in the main body memory 76 or if data cannot be read from the main body memory 76, the ASIC 72 makes a negative determination in S7 (S7: NO), reports an error, and terminates the processing shown in FIG. 5 (S8). The ASIC 72 stops the process of starting up the printer 10 and displays an error on the touch panel or the like (S8). This allows the user to take appropriate action, such as replacing the laser unit 31 or checking the correction data in the main body memory 76.

[0080] In S5, the ASIC 72 cancels the setting executed in S1. For example, the ASIC 72 stops the output of the clock signal CLK1 from the memory terminal 106 and sets the write protect signal WP to a high level. As a result, the clock signal CLK1 is stopped, thereby restricting access to the nonvolatile memory 82. Furthermore, as the write protect signal WP becomes a high level, writing to the nonvolatile memory 82 is prohibited. Furthermore, as the enable signal ENABLE becomes a high level, the four LD drivers 79 are activated. In other words, until S5 is executed, the ASIC 72 sets the enable signal ENABLE to a low level, does not drive the LD drivers 79, and does not cause the semiconductor laser 77 to emit light. During this period when the semiconductor laser 77 is not caused to emit light, the ASIC 72 executes S1 to S4 of FIG. 5 and outputs a control signal (such as the write protect signal WP) to the nonvolatile memory 82, thereby accessing the nonvolatile memory 82.

[0081] After executing S5, the ASIC 72 completes the process of starting up the printer 10 (S10). When the ASIC 72 receives a print job or the like instructing to print an image, it executes the image formation process using the correction data stored in the main memory 76. If the correction data stored in the main memory 76 is read from the nonvolatile memory 82 of the laser unit 31, the correction data stored in the nonvolatile memory 82 becomes the correction data of the nonvolatile memory 82, and if the read fails, the correction data stored in the main memory 76 before startup becomes the correction data. In this way, the ASIC 72 can switch the correction data to be used depending on whether the nonvolatile memory 82 is mounted on the LD board 75 of the laser unit 31.

[0082] As described above, the first embodiment provides the following effects. (1) The LD substrate 75 of this embodiment is mounted with a common terminal 107 connected to the controller terminal 101 of the ASIC 72 via a first wiring 105 included in the harness 73, an LD wiring 109 connecting the LD driver terminal 111 of the LD driver 79 to the common terminal 107, and a memory wiring 117 connecting the write-protect terminal 115 of the non-volatile memory 82 mounted on the LD substrate 75 to the common terminal 107.

[0083] This allows the ASIC 72 to input and output control signals (enable signal ENABLE, write protect signal WP) between the controller terminal 101 and a common terminal 107 mounted on the LD substrate 75. The common terminal 107 mounted on the LD substrate 75 is connected to an LD driver terminal 111 by an LD wiring 109 and to a write protect terminal 115 by a memory wiring 117. As a result, compared to wiring the LD driver terminal 111 of the LD driver 79 and the write-protect terminal 115 of the non-volatile memory 82 to two terminals of the ASIC 72, by mounting the common terminal 107 on the LD substrate 75, the wiring between the ASIC 72 and the LD substrate 75 can be made common, thereby reducing the number of wirings and the number of terminals of the ASIC 72.

[0084] (2) In addition, by executing the process of Figure 5 at startup, the ASIC 72 sends a write protect signal WP from the controller terminal 101 to the write protection terminal 115 via the common terminal 107 at a timing when the semiconductor laser 77 of the laser unit 31 is not to emit light.

[0085] This allows writing to and reading from the nonvolatile memory 82 at a timing when the semiconductor laser 77 is not emitting light and when image formation is not being performed. The ASIC 72 can access the nonvolatile memory 82 through the first wiring 105 at a timing when the LD driver 79 is not being used. In addition, it is possible to eliminate the influence of access to the nonvolatile memory 82 on image formation.

[0086] (3) The LD driver terminal 111 is an ENABLE terminal to which an enable signal ENABLE, which switches the LD driver 79 between a driving state and a stopping state, can be input from the ASIC 72. The common terminal 107 is connected to the LD driver terminal 111 by the LD wiring 109, and is also connected to the write-protect terminal 115 by the memory wiring 117.

[0087] According to this, the ASIC 72 can prohibit writing to the nonvolatile memory 82 while the LD driver 79 is driven by outputting a high-level ON signal from the controller terminal 101. This makes it possible to prevent data from being written to the nonvolatile memory 82 when an image formation process is being executed, etc. In addition, the ASIC 72 outputs a low-level off signal from the controller terminal 101 to stop writing to the nonvolatile memory 82 while stopping the driving of the LD driver 79. It is possible to write data to the nonvolatile memory 82 and read data from the nonvolatile memory 82. This allows data to be written to the nonvolatile memory 82 after the image formation process has been stopped.

[0088] (4) Furthermore, LD drivers 79Y, 79M, 79C, and 79K corresponding to each of the multiple colors are mounted on the LD substrate 75. The common terminal 107 is connected to LD driver terminals 111 of the multiple LD drivers 79Y, 79M, 79C, and 79K, respectively, and is connected to a write-protect terminal 115 by a memory wiring 117.

[0089] According to this, the first wiring 105 can be used as a common wiring for connecting the write protection terminal 115 of the nonvolatile memory 82 and the LD driver terminals 111 of the plurality of LD drivers 79Y, 79M, 79C, and 79K with the controller terminal 101 of the ASIC 72. This makes it possible to further reduce the number of wirings and the number of terminals of the ASIC 72.

[0090] (5) Furthermore, if a nonvolatile memory 82 is mounted on the LD board 75 of the laser unit 31 mounted on the printer 10 (S3: YES), the ASIC 72 reads out correction data from the nonvolatile memory 82 and uses it for control (S4, S10). Furthermore, if a nonvolatile memory 82 is not mounted on the LD board 75 of the mounted laser unit 31 (S3: NO), the ASIC 72 reads out correction data from the main body memory 76 and uses it for control (S7: YES, S10).

[0091] According to this, when a laser unit 31 having a nonvolatile memory 82 mounted on the LD board 75 is mounted, the correction data can be read from the nonvolatile memory 82 and used for control. Also, when a laser unit 31 not having a nonvolatile memory 82 mounted on the LD board 75 is mounted, the correction data can be read from the main body memory 76 of the printer 10 and used for control. Depending on whether or not the nonvolatile memory 82 is present, appropriate correction data can be used for image formation.

[0092] (6) Also, when the ASIC 72 starts up, it executes the access process of FIG. 5, and when it starts reading out the correction data, it attempts to access the nonvolatile memory 82 of the laser unit 31 (S2). If the access to the nonvolatile memory 82 is successful (S3: YES), it reads out the correction data from the nonvolatile memory 82 and uses it. If the access is unsuccessful (S3: NO), it reads out the correction data from the main memory 76 and uses it.

[0093] According to this, the ASIC 72 automatically changes the read destination of the correction data based on the result of accessing the nonvolatile memory 82 of the laser unit 31. Therefore, when the user installs the laser unit 31 in the printer 10, the user does not need to set in the printer 10 whether or not the laser unit 31 has a nonvolatile memory 82. Usability can be improved.

[0094] (Second embodiment) Next, a second embodiment of the present invention will be described. In the first embodiment described above, a write protect signal WP was used as the control signal of the present invention, and the first wiring 105 transmitting the write protect signal WP was also used as the wiring for the enable signal ENABLE. In contrast, the second embodiment differs from the first embodiment in that in addition to the write protect signal WP, the wiring for the clock signal CLK1 and the data signal DATA of the nonvolatile memory 82 is also shared. FIG. 6 is a diagram corresponding to FIG. 3 of the first embodiment, and is a block diagram showing the connection relationship between the LD driver 79K, nonvolatile memory 82, and polygon motor substrate 78 according to the second embodiment. In the following description, the same components as those in the first embodiment are designated by the same reference numerals, and their description will be omitted as appropriate.

[0095] As shown in FIG. 6 , the laser unit 31A of the second embodiment includes two second common terminals 131 and 132. The second common terminal 131 is connected to the polygon motor control terminal 102 of the ASIC 72 via a second wiring 125 included in the harness 73. The second common terminal 131 is also connected to the ON signal terminal 121 via a motor driver wiring 133 provided in the laser unit 31A. The ASIC 72 outputs an ON signal ON to the ON signal terminal 121 via the polygon motor control terminal 102, the second wiring 125, and the motor driver wiring 133. The second common terminal 131 is also connected to the data signal input / output terminal 114 of the nonvolatile memory 82 via a second memory wiring 135 provided in the laser unit 31A. Therefore, in the second embodiment, the second wiring 125 of the harness 73 is shared as the wiring connected to the data signal input / output terminal 114 of the nonvolatile memory 82 and the wiring connected to the ON signal terminal 121 of the motor driver 87.

[0096] The second common terminal 132 is connected to the polygon motor control terminal 104 of the ASIC 72 via a second wiring 127 included in the harness 73. The second common terminal 132 is connected to the LOCKn signal terminal 123 via a motor driver wiring 134 provided in the laser unit 31A. A LOCKn signal LOCKn is input to the ASIC 72 via the motor driver wiring 134, the second common terminal 132, and the second wiring 127. The second common terminal 132 is connected to the clock signal input terminal 113 of the nonvolatile memory 82 via a second memory wiring 136 provided in the laser unit 31A. Therefore, in the second embodiment, the second wiring 126 of the harness 73 is shared as the wiring connected to the clock signal input terminal 113 of the nonvolatile memory 82 and the wiring connected to the LOCKn signal terminal 123 of the motor driver 87. This makes it possible to further reduce the number of wirings connecting the main board 71 and the laser unit 31 and the number of terminals of the ASIC 72. Specifically, the memory terminals 106 and 108 of the ASIC 72 shown in FIG. 3 and the wiring connected to the memory terminals 106 and 108 can be eliminated.

[0097] (Regarding access to nonvolatile memory 82) Next, the access processing in the second embodiment will be described. The flow of the access processing is the same as that in Fig. 5. Therefore, the following description of the access processing in the second embodiment will be made using Fig. 5, and the description of the same content as that in the access processing in the first embodiment will be omitted as appropriate.

[0098] 5 is started, in S1, the ASIC 72 sets each shared line to access the nonvolatile memory 82. Specifically, as in the first embodiment, the ASIC 72 sets the write protect signal WP output from the controller terminal 101 to low level (S1).

[0099] The ASIC 72 also accesses the data signal input / output terminal 114 from the polygon motor control terminal 102 and executes settings to input / output the data signal DATA. For example, the ASIC 72 executes changes to the program that controls the transistor connected to the polygon motor control terminal 102, or changes to the power supply connected to the polygon motor control terminal 102. The ASIC 72 also executes settings to output the clock signal CLK1 from the polygon motor control terminal 104. The ASIC 72 also executes settings to not output the motor clock signal CLK2 from the polygon motor control terminal 103.

[0100] Then, in S2, the ASIC 72 outputs a clock signal CLK1 of a predetermined frequency from the polygon motor control terminal 104 to the clock signal input terminal 113 of the nonvolatile memory 82 via the second wiring 127. The ASIC 72 reads the data signal DATA from the data signal input / output terminal 114 to the polygon motor control terminal 102 via the second wiring 125, thereby reading the correction data from the nonvolatile memory 82. Therefore, the ASIC 72 of the second embodiment Even in this case, at the timing when the LD driver 79 is not driven and the semiconductor laser 77 is not emitting light, a low-level write protect signal WP is output to the nonvolatile memory 82, thereby stopping the LD driver 79. Furthermore, since the semiconductor laser 77 is not emitting light and the image formation process is not performed, there is no need to rotate the polygon motor 89, and there is no need to control the motor driver 87. The ASIC 72 accesses the nonvolatile memory 82 using the second wiring 125, 127 connected to the motor driver 87 at the timing when the polygon motor 89 is not rotating (while rotation is stopped).

[0101] Note that, from S3 onwards, the ASIC 72 executes the same processing as in the first embodiment, and changes the correction data to be used depending on whether or not the correction data has been successfully read from the nonvolatile memory 82. Furthermore, in S5, the ASIC 72 changes the settings of the polygon motor control terminals 102, 104 used to access the nonvolatile memory 82 to settings used to control the motor driver 87. As a result, the ASIC 72 can send and receive control signals (ON signal, etc.) using the polygon motor control terminals 102, 103, 104, rotate the polygon motor 89 via the motor driver 87, and perform image formation based on the correction data.

[0102] As described above, the second embodiment provides the same effects as the first embodiment. Furthermore, the second embodiment provides the following effects. (1) The laser unit 31A of the second embodiment is implemented with a second common terminal 131 connected to the polygon motor control terminal 102 of the ASIC 72 via a second wiring 125, a motor driver wiring 133 connecting the ON signal terminal 121 of the motor driver 87 to the second common terminal 131, and a second memory wiring 135 connecting the data signal input / output terminal 114 to the second common terminal 131. The laser unit 31A also includes a second common terminal 132 connected to the polygon motor control terminal 104 of the ASIC 72 via a second wiring 127, a motor driver wiring 134 connecting the LOCKn signal terminal 123 of the motor driver 87 to the second common terminal 132, and a second memory wiring 136 connecting the clock signal input terminal 113 to the second common terminal 132.

[0103] According to this, compared to wiring the ON signal terminal 121 and LOCKn signal terminal 123 of the motor driver 87 and the clock signal input terminal 113 and data signal input / output terminal 114 of the non-volatile memory 82 to terminals of the ASIC 72, by implementing the second common terminals 131, 132 in the laser unit 31, the wiring between the laser unit 31 and the LD board 75 and the motor driver 87 can be made common, and the number of terminals of the ASIC 72 can be reduced. Furthermore, in the second embodiment, the second wiring 126 for the motor clock signal CLK2 of the motor driver 87 is not shared with other wiring, thereby suppressing an increase in the capacitance component connected to the second wiring 126. This suppresses the waveform of the motor clock signal CLK2 from becoming increasingly rounded. As a result, the rotation of the polygon motor 89 can be controlled with high precision.

[0104] (2) In addition, at the timing when the semiconductor laser 77 of the laser unit 31 is not to emit light, the ASIC 72 transmits a write protect signal WP from the controller terminal 101 to the write inhibit terminal 115, transmits and receives a data signal DATA between the polygon motor control terminal 102 and the data signal input / output terminal 114, and transmits a clock signal CLK1 from the polygon motor control terminal 104 to the clock signal input terminal 113.

[0105] This allows data to be written to and read from the nonvolatile memory 82 at a timing when the semiconductor laser 77 is not emitting light, the polygon motor 89 is not rotating, and no image formation is being performed. When the motor driver 87 is not in use, the nonvolatile memory 82 can be accessed via the first wiring 105 and the second wirings 125 and 127.

[0106] (3) Furthermore, the laser unit 31A has two second common terminals 131 and 132. The second common terminal 131 is connected to the ON signal terminal 121 by a motor driver wiring 133, and is also connected to the data signal input / output terminal 114 by a second memory wiring 135. This allows the ASIC 72 to write to and read from the nonvolatile memory 82 using the wiring connected to the motor driver 87. Furthermore, the second common terminal 132 is connected to the LOCKn signal terminal 123 by a motor driver wiring 134, and is also connected to the clock signal input terminal 113 by a second memory wiring 136. This allows the ASIC 72 to determine whether or not the polygon motor 89 has rotated to a predetermined number of revolutions by the LOCKn signal LOCKn, without accessing the nonvolatile memory 82.

[0107] The present invention is not limited to the above-described embodiments, and various modifications are possible without departing from the spirit of the present invention. For example, the circuit configurations of the above embodiments are merely examples, and the wiring for the video signal VS1 and the wiring for the write protect signal WP may be shared. In the second embodiment, the wiring for the write protect signal WP does not have to be shared with the wiring for the enable signal ENABLE. Therefore, the second wirings 125 and 127 of the second embodiment can also be used as the first wiring of the present invention. The second common terminals 131 and 132 can also be used as the common terminals of the present invention. Furthermore, the semiconductor laser 77 is configured to include two light-emitting elements, the first laser diode LD1 and the second laser diode LD2, but is not limited to this. The semiconductor laser 77 may be configured to include only one light-emitting element, or three or more light-emitting elements. Furthermore, a variable resistor may be provided in place of or in addition to the fixed resistor R1, whereby the light emission amounts of the first and second laser diodes LD1 and LD2 can be adjusted by changing the resistance value of the variable resistor. Furthermore, the memory of the present invention is not limited to a nonvolatile memory, but may be a volatile memory.

[0108] Furthermore, in the above-described embodiments, a color laser printer capable of color printing is employed as the image forming apparatus of the present application, but this is not limited thereto. The image forming apparatus of the present application may also be a monochrome laser printer. Therefore, the image forming apparatus of the present application may be configured to include only one set of an LD driver and a semiconductor laser. Furthermore, the laser unit of the present application is not limited to a device used for printing, but may also be a device used for scanning, such as a laser scanner. Therefore, the image forming apparatus of the present application is not limited to a printer, but may also be a scanner or a fax machine. Furthermore, the image forming apparatus of the present application may also be a multifunction device equipped with multiple functions, such as a printing function, a copying function, a fax function, and a scanning function. Therefore, the configuration of the laser unit is appropriately changed depending on the functions of the image forming apparatus. [Explanation of symbols]

[0109] 10 Color laser printer (image forming device), 31, 31A Laser unit, 41 Photosensitive drum, 71 main board, 72 ASIC (controller), 73 harness, 75 LD board, 76 main memory, 77, 77Y, 77M, 77C, 77K semiconductor laser, 79, 79Y, 79M, 79C, 79K LD driver, 82 non-volatile memory (memory), 87 motor driver, 89 polygon motor, 92 polygon mirror, 101 controller terminal (terminal), 102, 103, 104 polygon motor control terminal (controller terminal, terminal), 106, 108 memory terminal (terminal), 105 first wiring, 107 common terminal, 109 LD wiring, 111 LD driver terminal (terminal), 113 clock signal input terminal, 114 data signal input / output terminal, 115 write protection terminal, 1 17 Memory wiring, 121 ON signal terminal (motor driver control terminal), 122 Motor clock signal terminal, 123 LOCKn signal terminal (motor driver control terminal), 125, 127 Second wiring (first wiring), 131 Second common terminal (common terminal, first second common terminal), 132 Second common terminal (common terminal, second second common terminal), 133, 134 Motor driver wiring, 135, 136 Second memory wiring, CLK1 Clock signal (control signal), CLK2 Motor clock signal, DATA Data signal (control signal), ENABLE Enable signal (control signal), LOCKn LOCKn signal, WP Write protect signal (control signal), ON ON signal.

Claims

1. a laser unit including a semiconductor laser, a polygon mirror that deflects light from the semiconductor laser, and an LD substrate on which a memory can be mounted and an LD driver that has a plurality of terminals and controls the amount of light emitted from the semiconductor laser is mounted; a photosensitive drum exposed to light deflected by the polygon mirror; a main board on which a controller having a plurality of terminals including a controller terminal and for controlling the laser unit is mounted and which is connected to the LD board via a harness; Equipped with a plurality of terminals of the controller are connected to a plurality of terminals of the LD driver by a plurality of wires included in the harness, The LD substrate is a common terminal connected to the controller terminal via a first wiring that is one of the plurality of wirings; an LD wiring that connects an LD driver terminal of the LD driver to the common terminal; and a memory wiring that connects the memory to the common terminal when the memory is mounted on the LD substrate. Image forming device.

2. a laser unit including a semiconductor laser, a polygon mirror that deflects light from the semiconductor laser, an LD substrate on which a memory can be mounted and an LD driver that controls the amount of light emitted from the semiconductor laser is mounted, a polygon motor that rotates the polygon mirror, and a polygon motor substrate on which a motor driver that has a plurality of terminals including a motor driver control terminal and that rotationally drives the polygon motor is mounted; a photosensitive drum exposed to light deflected by the polygon mirror; a main board on which a controller for controlling the laser unit is mounted, the main board having a plurality of terminals including a controller terminal, and connected to the polygon motor board via a harness; a plurality of terminals of the controller are connected to a plurality of terminals of the motor driver by a plurality of wires included in the harness, The laser unit includes: a common terminal is mounted and connected to the controller terminal via a first wiring that is one of the plurality of wirings; The polygon motor substrate is a motor driver wiring is mounted to connect the motor driver control terminal and the common terminal; The LD substrate is a memory wiring is mounted on the LD substrate, the memory wiring connecting the memory and the common terminal when the memory is mounted on the LD substrate; Image forming device.

3. The controller transmitting a control signal from the controller terminal to the common terminal at a timing when the semiconductor laser of the laser unit is not to emit light; 3. The image forming apparatus according to claim 1.

4. The memory includes: a clock signal input terminal to which a clock signal is input; a data signal input / output terminal for inputting and outputting a data signal; a write protection terminal for prohibiting writing to the memory; and the LD driver terminal is an ENABLE terminal to which a control signal for switching between a driving state of the LD driver and a stopping state of the LD driver can be input from the controller, The common terminal is the LD wiring is connected to the ENABLE terminal, and the memory wiring is connected to the write protection terminal; The image forming apparatus according to claim 1 .

5. The LD substrate is mounted with the LD drivers corresponding to each of a plurality of colors, the common terminal is connected to the ENABLE terminals of the plurality of LD drivers, respectively, and is connected to the write protection terminal by the memory wiring; The image forming apparatus according to claim 4 .

6. The laser unit includes: a polygon motor that rotates the polygon mirror; a motor driver having a plurality of terminals including a motor driver control terminal and configured to rotate the polygon motor; Further provided with The laser unit includes: a second common terminal connected to the polygon motor control terminal, which is the controller terminal, via a second wiring, which is one of the plurality of wirings; a motor driver wiring that connects the motor driver control terminal and the second common terminal; and a second memory wiring that connects the memory and the second common terminal when the memory is mounted on the LD substrate; has been implemented, The image forming apparatus according to claim 1 .

7. The controller transmitting a control signal from the controller terminal to the memory at a timing when the semiconductor laser of the laser unit is not to emit light; The image forming apparatus according to claim 6 .

8. The memory includes: a clock signal input terminal to which a clock signal is input; a data signal input / output terminal for inputting and outputting a data signal; a write protection terminal for prohibiting writing to the memory; and The motor driver an ON signal terminal to which an ON signal is input, which switches the motor driver between a driving state and a driving stop state; a motor clock signal terminal to which a motor clock signal is input; a LOCKn signal terminal for outputting a LOCKn signal indicating whether the polygon motor has rotated to a predetermined number of revolutions; and The laser unit includes: two second common terminals; The first second common terminal is the motor driver wiring is connected to the ON signal terminal, and the second memory wiring is connected to the data signal input / output terminal; The second common terminal is The motor driver wiring is connected to the LOCKn signal terminal, and the front the second memory wiring is connected to the clock signal input terminal; The image forming apparatus according to claim 6 .

9. The main board is a main body memory capable of storing correction data for image formation; the image forming apparatus, As the laser unit, the laser unit in which the memory is not mounted on the LD substrate can be mounted, The controller When the memory is mounted on the LD substrate of the attached laser unit, the correction data is read from the memory via the common terminal and the first wiring and used for control; 2. The image forming apparatus according to claim 1, wherein when the memory is not mounted on the LD board of the attached laser unit, the correction data is read from the main body memory and used for control.

10. The controller When starting to read the correction data, an attempt is made to access the memory of the laser unit, and if the access to the memory is successful, the correction data is read from the memory and used for control; 10. The image forming apparatus according to claim 9, wherein, if access to said memory fails, said correction data is read from said main body memory and used for control.

Images