Block-level reference picture adaptation for video coding

JP2025504294A5Pending Publication Date: 2025-12-19QUALCOMM INC
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Patent Information

Application Number
JP2024536276
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-12-20
Filing Date
2022-12-21
Publication Date
2025-12-19

AI Technical Summary

Technical Problem

The existing video encoding technology fails to achieve block-level adaptive adjustment in reference picture list management, resulting in excessive signaling overhead and insufficient reduction of encoding gain.

Method used

By implementing an adaptive reference picture reordering process in the video decoder, a new reference picture list order is generated without adding signaling overhead, and block-level reference picture list adjustment is achieved.

Benefits of technology

The number of signaling bits is effectively reduced while maintaining encoding quality, avoiding encoding gain loss due to increased signaling overhead.

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Abstract

The video decoder may be configured to generate a first ordering of reference pictures in a reference picture list for a first block of the slice, where generating the first ordering of reference pictures for the first block includes assigning indexes to the reference pictures; generate a second ordering of reference pictures in the reference picture list for a second block of the slice based on an adaptive reference picture reordering process, where the first ordering differs from the second ordering; generating the second ordering of reference pictures for the second block includes assigning at least some of the indexes to the reference pictures that differ from the first ordering; decode the first block using the first ordering of reference pictures and decode the second block using the second ordering of reference pictures.
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Description

[Technical field]

[0001]

[0001] This application claims priority to U.S. Provisional Patent Application No. 63 / 266,389, filed January 4, 2022, U.S. Provisional Patent Application No. 63 / 316,102, filed March 3, 2022, U.S. Provisional Patent Application No. 63 / 324,926, filed March 29, 2022, U.S. Provisional Patent Application No. 63 / 343,980, filed May 19, 2022, and U.S. Patent Application No. 18 / 068,809, filed December 20, 2022. U.S. Patent Application No. 18 / 068,809 claims the benefit of U.S. Provisional Patent Application No. 63 / 266,389, U.S. Provisional Patent Application No. 63 / 316,102, U.S. Provisional Patent Application No. 63 / 324,926, and U.S. Provisional Patent Application No. 63 / 343,980, each of which is incorporated by reference in its entirety herein.

[0002]

[0002] This disclosure relates to video encoding and decoding. [Background technology]

[0003]

[0003] Digital video capabilities may be incorporated into a wide range of devices, including digital televisions, digital direct broadcast systems, wireless broadcast systems, personal digital assistants (PDAs), laptop or desktop computers, tablet computers, e-book readers, digital cameras, digital recording devices, digital media players, video gaming devices, video game consoles, cellular or satellite wireless telephones, so-called "smartphones," video teleconferencing devices, video streaming devices, and the like. Digital video devices implement video coding techniques, such as those described in standards defined by MPEG-2, MPEG-4, ITU-T H.263, ITU-T H.264 / MPEG-4, Part 10, Advanced Video Coding (AVC), ITU-T H.265 / High Efficiency Video Coding (HEVC), ITU-T H.266 / Versatile Video Coding (VVC), and extensions to such standards, as well as proprietary video codecs / formats, such as AOMedia Video 1 (AV1) developed by the Alliance for Open Media. Video devices may implement such video coding techniques to more efficiently transmit, receive, encode, decode, and / or store digital video information.

[0004]

[0004] Video coding techniques include spatial (intra-picture) prediction and / or temporal (inter-picture) prediction to reduce or remove redundancy inherent in video sequences. For block-based video coding, a video slice (e.g., a video picture or a portion of a video picture) may be divided into video blocks, which may also be referred to as coding tree units (CTUs), coding units (CUs), and / or coding nodes. Video blocks in an intra-coded (I) slice of a picture are encoded using spatial prediction with respect to reference samples in neighboring blocks in the same picture. Video blocks in an inter-coded (P or B) slice of a picture may use spatial prediction with respect to reference samples in neighboring blocks in the same picture or temporal prediction with respect to reference samples in other reference pictures. A picture may be referred to as a frame, and a reference picture may be referred to as a reference frame. Summary of the Invention

[0005]

[0005] Techniques of this disclosure are directed to inter-prediction in video codecs, and more particularly to signaling of reference pictures and management of reference picture lists of reference picture lists for inter-coded blocks. With existing techniques, video decoders use high-level signaling, such as at the picture level or slice level, to maintain reference picture lists for inter-prediction. However, these techniques do not include block-level adaptation to reference picture lists, such as reordering. Including additional signaling to enable such block-level adaptation may be undesirable, as the increased signaling overhead outweighs the coding gain achieved by reference picture list adaptation. This disclosure describes techniques for performing block-level reference picture list adaptation without increasing signaling overhead. Specifically, a video decoder may be configured to perform an adaptive reference picture reordering process to generate a new ordering of reference pictures in a reference picture list without signaling overhead. By reordering reference pictures in a reference picture list using an adaptive reference picture list reordering process, the bits required to signal which reference pictures in the reference picture list should be used for inter prediction can be reduced without increasing distortion.

[0006]

[0006] According to one example of the present disclosure, a method for decoding video data includes generating a first ordering of reference pictures in a reference picture list for a first block of a slice, where generating the first ordering of reference pictures for the first block includes assigning indexes to the reference pictures; decoding the first block using the first ordering of reference pictures; generating a second ordering of reference pictures in the reference picture list for a second block of the slice based on an adaptive reference picture reordering process, where the first ordering differs from the second ordering, and generating the second ordering of reference pictures for the second block includes assigning at least some of the indexes to reference pictures different from the first ordering; decoding the second block using the second ordering of reference pictures; and outputting decoded video data including decoded versions of the first block and the second block.

[0007]

[0007] According to one example of the present disclosure, a device for decoding video data includes a memory configured to store the video data; and one or more processors implemented in circuitry configured to: generate a first ordering of reference pictures in a reference picture list for a first block of a slice, where generating the first ordering of reference pictures for the first block includes assigning indices to the reference pictures; generate a second ordering of reference pictures in the reference picture list for a second block of the slice based on an adaptive reference picture reordering process, where the first ordering is different from the second ordering; generating the second ordering of reference pictures for the second block includes assigning at least some of the indices to reference pictures different from the first ordering; decode the first block using the first ordering of reference pictures and decode the second block using the second ordering of reference pictures; and output decoded video data including decoded versions of the first block and the second block.

[0008]

[0008] According to one example of the present disclosure, a computer-readable storage medium stores instructions that, when executed by one or more processors, cause the one or more processors to generate a first ordering of reference pictures in a reference picture list for a first block of a slice, where generating the first ordering of reference pictures for the first block includes assigning indices to the reference pictures, generate a second ordering of reference pictures in the reference picture list for a second block of the slice based on an adaptive reference picture reordering process, where the first ordering is different from the second ordering, where generating the second ordering of reference pictures for the second block includes assigning at least some of the indices to reference pictures that differ from the first ordering, decode the first block using the first ordering of reference pictures and decode the second block using the second ordering of reference pictures, and output decoded video data including decoded versions of the first block and the second block.

[0009]

[0009] According to one example of the present disclosure, an apparatus for decoding video data includes means for generating a first ordering of reference pictures in a reference picture list for a first block of a slice, where generating the first ordering of reference pictures for the first block includes assigning indexes to the reference pictures; means for decoding the first block using the first ordering of reference pictures; means for generating a second ordering of reference pictures in the reference picture list for a second block of the slice based on an adaptive reference picture reordering process, where the first ordering differs from the second ordering, and where generating the second ordering of reference pictures for the second block includes means for assigning at least some of the indexes to reference pictures that differ from the first ordering; means for decoding the second block using the second ordering of reference pictures; and means for outputting decoded video data including decoded versions of the first block and the second block.

[0010]

[0010] The details of one or more examples are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will become apparent from the description, drawings, and claims. [Brief description of the drawings]

[0011] [Figure 1]

[0011] FIG. 1 is a block diagram illustrating an example video encoding and decoding system that may implement the techniques of this disclosure. [Diagram 2]

[0012] 1 illustrates an example of a template that may be used in conjunction with the techniques described herein. [Diagram 3]

[0013] 1 is a block diagram illustrating an example video encoder that may implement the techniques of this disclosure. [Figure 4]

[0014] 1 is a block diagram illustrating an example video decoder that may perform the techniques of this disclosure. [Diagram 5]

[0015] 11 is a flowchart illustrating an example process for encoding a current block in accordance with techniques of this disclosure. [Figure 6]

[0016] 11 is a flowchart illustrating an example process for decoding a current block in accordance with techniques of this disclosure. [Figure 7]

[0017] 11 is a flowchart illustrating an example process for decoding a current block in accordance with techniques of this disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012]

[0018] Video coding (e.g., video encoding and / or video decoding) typically involves predicting blocks of video data from either already coded blocks of video data in the same picture (e.g., intra prediction) or from already coded blocks of video data in a different picture (e.g., inter prediction). In some instances, the video encoder also calculates residual data by comparing the predicted block to the original block. The residual data thus represents the difference between the predicted block and the original block. To reduce the number of bits required to signal the residual data, the video encoder transforms and quantizes the residual data and signals the transformed and quantized residual data in the encoded bitstream. The compression achieved by the transform and quantization process may be lossy, meaning that the transform and quantization process may introduce distortion into the decoded video data.

[0013]

[0019] A video decoder decodes the residual data and adds it to the predictive block to generate a reconstructed video block that matches the original video block more closely than the predictive block alone. Due to losses introduced by transforming and quantizing the residual data, the initial reconstructed block may have distortions or artifacts. One common type of artifact or distortion is referred to as blockiness, where boundaries of blocks used to code the video data are visible.

[0014]

[0020] To further improve the quality of the decoded video, the video decoder may perform one or more filtering operations on the reconstructed video blocks. Examples of these filtering operations include deblocking filtering, sample adaptive offset (SAO) filtering, and adaptive loop filtering (ALF). Parameters for these filtering operations may either be determined by the video encoder and explicitly signaled in the encoded video bitstream, or may be implicitly determined by the video decoder without the parameters having to be explicitly signaled in the encoded video bitstream.

[0015]

[0021] Techniques of this disclosure are directed to inter prediction in video codecs, and more particularly to signaling of reference pictures and management of reference picture lists of reference picture lists for inter-coded blocks. With existing techniques, video decoders use high-level signaling, such as at the picture level or slice level, to maintain reference picture lists for inter prediction. However, these techniques do not include block-level adaptation to reference picture lists, such as reordering. Including additional signaling to enable such block-level adaptation may be undesirable because the increased signaling overhead outweighs the coding gain achieved by reference picture list adaptation. This disclosure describes techniques for performing block-level reference picture list adaptation without increasing signaling overhead. Specifically, a video decoder may be configured to perform an adaptive reference picture reordering process to generate a new ordering of reference pictures in a reference picture list without signaling overhead. By reordering reference pictures in a reference picture list using an adaptive reference picture list reordering process, the bits required to signal which reference pictures in the reference picture list should be used for inter prediction can be reduced without increasing distortion.

[0016]

[0022] The term video coding, as used in this disclosure, generally refers to either video encoding or video decoding. Similarly, the term video coder may generally refer to a video encoder or a video decoder. Furthermore, certain techniques described in this disclosure with respect to video decoding may also be applied to video encoding, and vice versa. For example, often a video encoder and a video decoder are configured to perform the same process or an inverse process. Also, a video encoder typically performs video decoding (also called reconstruction) as part of the process of determining how to encode video data. For example, the block level reference picture list management techniques described in this disclosure may be performed by both a video encoder and a video decoder such that both maintain the same reference picture list with little or no signaling overhead.

[0017]

[0023] 1 is a block diagram illustrating an example video encoding and decoding system 100 that may perform techniques of this disclosure. The techniques of this disclosure are generally directed to coding (encoding and / or decoding) video data. In general, video data includes any data for processing video. Thus, video data may include raw uncoded video, coded video, decoded (e.g., reconstructed) video, and video metadata, such as signaling data.

[0018]

[0024] 1, in this example, system 100 includes a source device 102 that provides encoded video data to be decoded and displayed by a destination device 116. Specifically, source device 102 provides the video data to destination device 116 via a computer-readable medium 110. Source device 102 and destination device 116 may comprise any of a wide range of devices, including desktop computers, notebook (i.e., laptop) computers, mobile devices, tablet computers, set-top boxes, telephone handsets such as smartphones, televisions, cameras, display devices, digital media players, video gaming consoles, video streaming devices, broadcast receiver devices, and the like. In some cases, source device 102 and destination device 116 may be capable of wireless communication and thus may be referred to as wireless communication devices.

[0019]

[0025] In the example of FIG. 1, source device 102 includes a video source 104, memory 106, video encoder 200, and output interface 108. Destination device 116 includes an input interface 122, a video decoder 300, memory 120, and a display device 118. According to this disclosure, the video encoder 200 of source device 102 and the video decoder 300 of destination device 116 may be configured to apply techniques for block-level reference picture list adaptation as described herein. Thus, source device 102 represents an example of a video encoding device, while destination device 116 represents an example of a video decoding device. In other examples, the source device and destination device may include other components or configurations. For example, source device 102 may receive video data from an external video source, such as an external camera. Similarly, destination device 116 may interface with an external display device rather than including an integrated display device.

[0020]

[0026] The system 100 as shown in FIG. 1 is merely an example. In general, any digital video encoding and / or decoding device may implement techniques for block-level reference picture list adaptation as described herein. The source device 102 and the destination device 116 are merely examples of coding devices, such that the source device 102 generates coded video data for transmission to the destination device 116. This disclosure refers to a "coding" device as a device that performs coding (encoding and / or decoding) of data. Thus, the video encoder 200 and the video decoder 300 represent examples of coding devices, specifically, video encoders and video decoders, respectively. In some examples, the source device 102 and the destination device 116 may operate in a substantially symmetrical manner, such that each of the source device 102 and the destination device 116 includes video encoding and decoding components. Thus, system 100 may support one-way or two-way video transmission between source device 102 and destination device 116, for example, video streaming, video playback, video broadcasting, or video telephony.

[0021]

[0027] In general, video source 104 represents a source of video data (e.g., raw, unencoded video data) and provides a continuous series of pictures (also referred to as “frames”) of the video data to video encoder 200, which encodes the data for the pictures. Video source 104 of source device 102 may include a video capture device, such as a video camera, a video archive containing previously captured raw video, and / or a video feed interface for receiving video from a video content provider. As a further alternative, video source 104 may generate computer graphics-based data as source video, or a combination of live video, archived video, and computer-generated video. In each case, video encoder 200 encodes the captured video data, pre-captured video data, or computer-generated video data. Video encoder 200 may reorder the pictures from the order in which they are received (sometimes referred to as “display order”) to a coding order for coding. Video encoder 200 may generate a bitstream including the encoded video data. The source device 102 may then output the encoded video data via the output interface 108 to a computer-readable medium 110 , for receipt and / or retrieval by, for example, an input interface 122 of the destination device 116 .

[0022]

[0028] The memory 106 of the source device 102 and the memory 120 of the destination device 116 represent general purpose memories. In some examples, the memories 106, 120 may store raw video data, e.g., raw video from the video source 104 and raw decoded video data from the video decoder 300. Additionally or alternatively, the memories 106, 120 may store software instructions executable by, e.g., the video encoder 200 and the video decoder 300, respectively. Although the memories 106 and 120 are shown in this example separately from the video encoder 200 and the video decoder 300, it should be understood that the video encoder 200 and the video decoder 300 may also include internal memories for functionally similar or equivalent purposes. Additionally, the memories 106, 120 may store encoded video data, e.g., output from the video encoder 200 and input to the video decoder 300. In some examples, portions of the memories 106, 120 may be allocated as one or more video buffers, for example, for storing raw decoded and / or encoded video data.

[0023]

[0029] The computer-readable medium 110 may represent any type of medium or device capable of transferring encoded video data from the source device 102 to the destination device 116. In one example, the computer-readable medium 110 represents a communication medium for enabling the source device 102 to transmit encoded video data directly to the destination device 116 in real time, for example, via a radio frequency network or a computer-based network. The output interface 108 may modulate a transmission signal including the encoded video data, and the input interface 122 may demodulate a received transmission signal according to a communication standard, such as a wireless communication protocol. The communication medium may comprise any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form part of a packet-based network, such as a local area network, a wide area network, or a global network such as the Internet. The communication medium may include routers, switches, base stations, or any other equipment that may be useful to facilitate communication from the source device 102 to the destination device 116.

[0024]

[0030] In some examples, source device 102 may output the encoded data from output interface 108 to storage device 112. Similarly, destination device 116 may access the encoded data from storage device 112 via input interface 122. Storage device 112 may include any of a variety of distributed or locally accessed data storage media, such as a hard drive, Blu-ray disc, DVD, CD-ROM, flash memory, volatile or non-volatile memory, or any other suitable digital storage medium for storing encoded video data.

[0025]

[0031] In some examples, source device 102 may output the encoded video data to a file server 114 or another intermediate storage device, which may store the encoded video data generated by source device 102. Destination device 116 may access the stored video data from file server 114 via streaming or download.

[0026]

[0032] The file server 114 may be any type of server device capable of storing encoded video data and transmitting the encoded video data to a destination device 116. The file server 114 may represent a web server (e.g., for a website), a server configured to provide file transfer protocol services (such as File Transfer Protocol (FTP) or File Delivery over Unidirectional Transport (FLUTE) protocol), a content delivery network (CDN) device, a hypertext transfer protocol (HTTP) server, a Multimedia Broadcast Multicast Service (MBMS) or Enhanced MBMS (eMBMS) server, and / or a network attached storage (NAS) device. The file server 114 may additionally or alternatively implement one or more HTTP streaming protocols, such as Dynamic Adaptive Streaming over HTTP (DASH), HTTP Live Streaming (HLS), Real Time Streaming Protocol (RTSP), HTTP Dynamic Streaming, etc.

[0027]

[0033] Destination device 116 may access the encoded video data from file server 114 through any standard data connection, including an Internet connection. This may include a wireless channel (e.g., a Wi-Fi connection), a wired connection (e.g., a digital subscriber line (DSL), a cable modem, etc.), or a combination of both that is suitable for accessing the encoded video data stored on file server 114. Input interface 122 may be configured to operate according to any one or more of the various protocols discussed above for retrieving or receiving media data from file server 114, or other such protocols for retrieving media data.

[0028]

[0034] Output interface 108 and input interface 122 may represent wireless transmitters / receivers, modems, wired network components (e.g., Ethernet cards), wireless communication components operating according to any of the various IEEE 802.11 standards, or other physical components. In examples in which output interface 108 and input interface 122 comprise wireless components, output interface 108 and input interface 122 may be configured to transfer data, such as encoded video data, according to cellular communication standards such as 4G, 4G-LTE (Long-Term Evolution), LTE Advanced, 5G, etc. In some examples in which output interface 108 comprises a wireless transmitter, output interface 108 and input interface 122 may be configured to transfer data, such as encoded video data, according to other wireless standards such as the IEEE 802.11 specification, the IEEE 802.15 specification (e.g., ZigBee™), the Bluetooth™ standard, etc. In some examples, source device 102 and / or destination device 116 may include respective system-on-a-chip (SoC) devices. For example, source device 102 may include a SoC device for performing functions attributed to video encoder 200 and / or output interface 108, and destination device 116 may include a SoC device for performing functions attributed to video decoder 300 and / or input interface 122.

[0029]

[0035] The techniques of this disclosure may be applied to video coding to support any of a variety of multimedia applications, such as over-the-air television broadcast, cable television transmission, satellite television transmission, Internet streaming video transmission such as Dynamic Adaptive Streaming over HTTP (DASH), digital video encoded on a data storage medium, decoding of digital video stored on a data storage medium, or other applications.

[0030]

[0036] An input interface 122 of the destination device 116 receives an encoded video bitstream from a computer-readable medium 110 (e.g., a communication medium, a storage device 112, a file server 114, etc.). The encoded video bitstream may include signaling information defined by the video encoder 200 that is also used by the video decoder 300, such as syntax elements having values ​​that describe characteristics and / or processing of video blocks or other coded units (e.g., slices, pictures, groups of pictures, sequences, etc.). The display device 118 displays decoded pictures of the decoded video data to a user. The display device 118 may represent any of a variety of display devices, such as a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or another type of display device.

[0031]

[0037] Although not shown in FIG. 1, in some examples, the video encoder 200 and the video decoder 300 may each be integrated with an audio encoder and / or audio decoder and may include appropriate MUX-DEMUX units or other hardware and / or software to handle multiplexed streams containing both audio and video in a common data stream.

[0032]

[0038] The video encoder 200 and the video decoder 300 may each be implemented as any of a variety of suitable encoder and / or decoder circuits, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, software, hardware, firmware, or any combination thereof. When the techniques are implemented partially in software, a device may store instructions for the software on a suitable non-transitory computer-readable medium and execute the instructions in hardware using one or more processors to perform the techniques of this disclosure. Each of the video encoder 200 and the video decoder 300 may be included in one or more encoders or decoders, any of which may be integrated as part of a combined encoder / decoder (CODEC) in the respective device. The device including the video encoder 200 and / or the video decoder 300 may include an integrated circuit, a microprocessor, and / or a wireless communication device such as a cellular phone.

[0033]

[0039] The video encoder 200 and the video decoder 300 may operate according to a video coding standard, such as ITU-T H.265, also referred to as High Efficiency Video Coding (HEVC), or an extension standard thereof, such as multiview and / or scalable video coding extensions. Alternatively, the video encoder 200 and the video decoder 300 may operate according to other proprietary or industry standards, such as ITU-T H.266, also referred to as Versatile Video Coding (VVC). In other examples, the video encoder 200 and the video decoder 300 may operate according to a proprietary video codec / format, such as AOMedia Video 1 (AV1), an extension of AV1, and / or a successor version of AV1 (e.g., AV2). In other examples, the video encoder 200 and the video decoder 300 may operate according to other proprietary formats or industry standards. However, the techniques of this disclosure are not limited to any particular coding standard or format. In general, video encoder 200 and video decoder 300 may be configured to perform the techniques of this disclosure in combination with any video coding technique that uses reference picture lists for inter prediction.

[0034]

[0040] In general, the video encoder 200 and the video decoder 300 may perform block-based coding of pictures. The term “block” generally refers to a structure that includes data to be processed (e.g., encoded, decoded, or otherwise used in an encoding and / or decoding process). For example, a block may include a two-dimensional matrix of samples of luminance and / or chrominance data. In general, the video encoder 200 and the video decoder 300 may code video data represented in a YUV (e.g., Y, Cb, Cr) format. That is, rather than coding red, green, and blue (RGB) data for samples of a picture, the video encoder 200 and the video decoder 300 may code luminance and chrominance components, which may include both red and blue chrominance components. In some examples, the video encoder 200 converts received RGB formatted data to a YUV representation before encoding, and the video decoder 300 converts the YUV representation to an RGB format. Alternatively, pre-processing and post-processing units (not shown) may perform these transformations.

[0035]

[0041] This disclosure may generally refer to coding (e.g., encoding and decoding) a picture as including a process of encoding or decoding data for a picture. Similarly, this disclosure may refer to coding a block of a picture as including a process of encoding or decoding data for the block, such as predictive and / or residual coding. A coded video bitstream generally includes a set of values ​​for syntax elements that represent coding decisions (e.g., coding modes) and division of a picture into blocks. Thus, references to coding a picture or a block should generally be understood as coding values ​​for the syntax elements that form the picture or block.

[0036]

[0042] HEVC defines various blocks, including coding units (CUs), prediction units (PUs), and transform units (TUs). According to HEVC, a video coder (such as the video encoder 200) divides a coding tree unit (CTU) into CUs according to a quadtree structure. That is, the video coder divides the CTUs and CUs into four equal non-overlapping squares, and each node of the quadtree has either zero or four child nodes. A node with no child nodes may be referred to as a "leaf node", and a CU of such a leaf node may include one or more PUs and / or one or more TUs. The video coder may further divide the PUs and TUs. For example, in HEVC, a residual quadtree (RQT) represents the division of a TU. In HEVC, a PU represents inter-predicted data, and a TU represents residual data. An intra-predicted CU includes intra-prediction information, such as an intra-mode indication.

[0037]

[0043] As another example, the video encoder 200 and the video decoder 300 may be configured to operate according to VVC. According to VVC, a video coder (such as the video encoder 200) divides a picture into multiple coding tree units (CTUs). The video encoder 200 may divide the CTUs according to a tree structure, such as a quadtree-binary tree (QTBT) structure or a Multi-Type Tree (MTT) structure. The QTBT structure eliminates the concept of multiple division types, such as the separation between CUs, PUs, and TUs in HEVC. The QTBT structure includes two levels, a first level divided according to a quadtree division and a second level divided according to a binary tree division. The root node of the QTBT structure corresponds to a CTU. The leaf nodes of the binary tree correspond to coding units (CUs).

[0038]

[0044] In the MTT partitioning structure, blocks may be partitioned using quadtree (QT) partitioning, binary tree (BT) partitioning, and one or more types of triple tree (TT) (also called ternary tree (TT)) partitioning. A triple tree partitioning or ternary tree partitioning is a partitioning in which a block is divided into three subblocks. In some examples, a triple tree partitioning or ternary tree partitioning divides a block into three subblocks without splitting the original block through the center. The partitioning types in MTT (e.g., QT, BT, and TT) may be symmetric or asymmetric.

[0039]

[0045] When operating according to the AV1 codec, the video encoder 200 and the video decoder 300 may be configured to code video data in blocks. In AV1, the largest coding block that may be processed is called a superblock. In AV1, a superblock may be either 128×128 luma samples or 64×64 luma samples. However, in successor video coding formats (e.g., AV2), a superblock may be defined by a different (e.g., larger) luma sample size. In some examples, a superblock is the top level of a block quadtree. The video encoder 200 may further divide the superblock into smaller coding blocks. The video encoder 200 may divide the superblock and other coding blocks into smaller blocks using square or non-square partitioning. The non-square blocks may include N / 2×N, N×N / 2, N / 4×N, and N×N / 4 blocks. The video encoder 200 and the video decoder 300 may perform separate prediction and transformation processes for each of the coding blocks.

[0040]

[0046] AV1 also defines tiles of video data. A tile is a rectangular array of superblocks that may be coded independently of other tiles. That is, video encoder 200 and video decoder 300 may encode and decode coding blocks within a tile, respectively, without using video data from other tiles. However, video encoder 200 and video decoder 300 may perform filtering across tile boundaries. Tiles may be uniform or non-uniform in size. Tile-based coding may enable parallel processing and / or multi-threading for encoder and decoder implementations.

[0041]

[0047] In some examples, the video encoder 200 and the video decoder 300 may use a single QTBT or MTT structure to represent each of the luminance and chrominance components, while in other examples, the video encoder 200 and the video decoder 300 may use two or more QTBT or MTT structures, such as one QTBT / MTT structure for the luminance component and another QTBT / MTT structure for both chrominance components (or two QTBT / MTT structures for each chrominance component).

[0042]

[0048] Video encoder 200 and video decoder 300 may be configured to use quadtree partitioning, QTBT partitioning, MTT partitioning, superblock partitioning, or other partitioning structures.

[0043]

[0049] In some examples, the CTU includes a coding tree block (CTB) of luma samples, two corresponding CTBs of chroma samples for a picture with three sample arrays, or a CTB of samples for a picture coded using three separate color planes and syntax structures used to code a monochrome picture or sample. The CTB may be an N×N block of samples for some value of N that divides the components into CTBs. A component is an array or a single sample from one of the three arrays (luma and two chroma) that make up a picture in 4:2:0, 4:2:2, or 4:4:4 color format, or an array or a single sample of an array that makes up a picture in monochrome format. In some examples, the coding block is an M×N block of samples for some value of M and N that divides the CTB into coding blocks.

[0044]

[0050] Blocks (e.g., CTUs or CUs) may be grouped in various ways within a picture. As an example, a brick may refer to a rectangular region of a CTU row within a particular tile within a picture. A tile may be a rectangular region of CTUs within a particular tile column and a particular tile row within a picture. A tile column refers to a rectangular region of CTUs with a height equal to the height of the picture and a width specified by a syntax element (e.g., in a picture parameter set). A tile row refers to a rectangular region of CTUs with a height specified by a syntax element (e.g., in a picture parameter set) and a width equal to the width of the picture.

[0045]

[0051] In some examples, a tile may be divided into multiple bricks, each of which may include one or more CTU rows within the tile. A tile that is not divided into multiple bricks may also be referred to as a brick. However, a brick that is a true subset of a tile may not be referred to as a tile. Bricks in a picture may also be arranged as slices. A slice may be an integer number of bricks of a picture that may be contained exclusively within a single network abstraction layer (NAL) unit. In some examples, a slice includes either several complete tiles or only a series of contiguous complete bricks of a tile.

[0046]

[0052] This disclosure may use "NxN" and "N by N", e.g., 16x16 samples or 16 by 16 samples, interchangeably to refer to the sample dimensions of a block (such as a CU or other video block) in the vertical and horizontal dimensions. In general, a 16x16 CU has 16 samples in the vertical direction (y=16) and 16 samples in the horizontal direction (x=16). Similarly, an NxN CU generally has N samples in the vertical direction and N samples in the horizontal direction, where N represents a non-negative integer value. Samples in a CU may be arranged in rows and columns. Moreover, a CU does not necessarily have to have the same number of samples in the horizontal direction as in the vertical direction. For example, a CU may comprise NxM samples, where M is not necessarily equal to N.

[0047]

[0053] The video encoder 200 encodes video data for a CU that represents prediction and / or residual information, as well as other information. The prediction information indicates how the CU will be predicted to form a predictive block for the CU. The residual information generally represents sample-by-sample differences between samples of the CU before encoding and the predictive block.

[0048]

[0054] To predict a CU, the video encoder 200 may generally form a predictive block for the CU through inter prediction or intra prediction. Inter prediction generally refers to predicting a CU from data of a previously coded picture, and intra prediction generally refers to predicting a CU from previously coded data of the same picture. To perform inter prediction, the video encoder 200 may generate a predictive block using one or more motion vectors. The video encoder 200 may generally perform a motion search to identify a reference block that closely matches the CU, for example, in terms of the difference between the CU and the reference block. The video encoder 200 may calculate a difference metric using a sum of absolute difference (SAD), sum of squared differences (SSD), mean absolute difference (MAD), mean squared differences (MSD), or other such difference calculation to determine whether the reference block closely matches the current CU. In some examples, the video encoder 200 may predict the current CU using unidirectional prediction or bidirectional prediction.

[0049]

[0055] Some examples of VVC also provide an affine motion compensation mode, which may be considered an inter-prediction mode. In an affine motion compensation mode, video encoder 200 may determine two or more motion vectors that represent non-translational motion, such as zooming in or out, rotation, perspective movement, or other irregular motion types.

[0050]

[0056] To perform intra prediction, the video encoder 200 may select an intra prediction mode to generate a prediction block. Some examples of VVC provide 67 intra prediction modes, including various orientation modes, as well as a planar mode and a DC mode. In general, the video encoder 200 selects an intra prediction mode that describes neighboring samples for a current block (e.g., a block of a CU) and predicts samples of the current block therefrom. Assuming that the video encoder 200 codes the CTUs and CUs in raster scan order (left to right, top to bottom), such samples may generally be above, above and to the left, or to the left of the current block in the same picture as the current block.

[0051]

[0057] The video encoder 200 encodes data representing a prediction mode for the current block. For example, in the case of an inter prediction mode, the video encoder 200 may encode data representing which of various available inter prediction modes is used as well as motion information for the corresponding mode. In the case of unidirectional or bidirectional inter prediction, for example, the video encoder 200 may encode motion vectors using an advanced motion vector prediction (AMVP) mode or a merge mode. The video encoder 200 may use a similar mode to encode motion vectors for an affine motion compensation mode.

[0052]

[0058] For blocks coded in merge mode, video encoder 200 and video decoder 300 may be configured to maintain a candidate list, with each candidate in the list including a full set of motion information (e.g., a motion vector, a motion direction, and a reference picture index). For blocks coded in AMVP mode, video encoder 200 and video decoder 300 may be configured to similarly maintain a candidate list, but instead of complete motion information, each candidate in the list includes only a motion vector predictor (MVP). Video decoder 300 may receive the motion vector differential (MVD) separately and determine a motion vector for predicting the block that is the MVP plus the MVD.

[0053]

[0059] AV1 includes two general techniques for encoding and decoding coding blocks of video data. The two general techniques are intra prediction (e.g., intra-frame prediction or spatial prediction) and inter prediction (e.g., inter-frame prediction or temporal prediction). In the context of AV1, when predicting a block of a current frame of video data using an intra prediction mode, the video encoder 200 and the video decoder 300 do not use video data from other frames of the video data. In most intra prediction modes, the video encoder 200 encodes a block of the current frame based on a difference between a sample value in the current block and a predicted value generated from a reference sample in the same frame. The video encoder 200 determines a predicted value generated from a reference sample based on the intra prediction mode.

[0054]

[0060] Following prediction, such as intra- or inter-prediction, of a block, the video encoder 200 may calculate residual data for the block. The residual data, such as a residual block, represents sample-by-sample differences between a block and a prediction block for that block formed using a corresponding prediction mode. The video encoder 200 may apply one or more transforms to the residual block to generate transform data in a transform domain rather than the sample domain. For example, the video encoder 200 may apply a discrete cosine transform (DCT), an integer transform, a wavelet transform, or a conceptually similar transform to the residual video data. In addition, the video encoder 200 may apply a secondary transform, such as a mode-dependent non-separable secondary transform (MDNSST), a signal-dependent transform, a Karhunen-Loeve transform (KLT), etc., following the initial transform. The video encoder 200 generates transform coefficients following application of the one or more transforms.

[0055]

[0061] As described above, following any transformation to generate transform coefficients, the video encoder 200 may perform quantization of the transform coefficients. Quantization generally refers to a process in which transform coefficients are quantized to possibly reduce the amount of data used to represent the transform coefficients, providing further compression. By performing a quantization process, the video encoder 200 may reduce the bit depth associated with some or all of the transform coefficients. For example, the video encoder 200 may round an n-bit value to an m-bit value during quantization, where n is greater than m. In some examples, to perform quantization, the video encoder 200 may perform a bitwise right shift of the value to be quantized.

[0056]

[0062] Following quantization, the video encoder 200 may scan the transform coefficients, generating a one-dimensional vector from the two-dimensional matrix including the quantized transform coefficients. The scan may be designed to place transform coefficients of higher energy (and therefore lower frequency) at the front of the vector and transform coefficients of lower energy (and therefore higher frequency) at the back of the vector. In some examples, the video encoder 200 may use a predefined scan order for scanning the quantized transform coefficients to generate a serialized vector and then entropy code the quantized transform coefficients of the vector. In other examples, the video encoder 200 may perform an adaptive scan. After scanning the quantized transform coefficients to form a one-dimensional vector, the video encoder 200 may entropy code the one-dimensional vector, for example, according to context-adaptive binary arithmetic coding (CABAC). The video encoder 200 may also entropy code values ​​for syntax elements that describe metadata associated with the encoded video data for use by the video decoder 300 in decoding the video data.

[0057]

[0063] To perform CABAC, the video encoder 200 may assign a context in a context model to a symbol to be transmitted. The context may relate, for example, to whether neighboring values ​​of the symbol are zero-valued or not. The probability decision may be based on the context assigned to the symbol.

[0058]

[0064] Video encoder 200 may further generate syntax data, such as block-based syntax data, picture-based syntax data, and sequence-based syntax data, for example in a picture header, a block header, a slice header, or other syntax data, such as a sequence parameter set (SPS), a picture parameter set (PPS), or a video parameter set (VPS), to video decoder 300. Video decoder 300 may similarly decode such syntax data to determine how to decode corresponding video data.

[0059]

[0065] In this manner, video encoder 200 may generate a bitstream including encoded video data, e.g., syntax elements that describe division of a picture into blocks (e.g., CUs) and prediction and / or residual information for the blocks. Finally, video decoder 300 may receive the bitstream and may decode the encoded video data.

[0060]

[0066] In general, video decoder 300 performs a reciprocal process to that performed by video encoder 200 to decode encoded video data of a bitstream. For example, video decoder 300 may decode values ​​for syntax elements of a bitstream using CABAC in a manner substantially similar to, but reciprocal to, the CABAC encoding process of video encoder 200. The syntax elements may define partitioning information for partitioning a picture into CTUs and partitioning each CTU according to a corresponding partitioning structure, such as a QTBT structure, to define CUs of the CTU. The syntax elements may further define prediction and residual information for blocks of video data (e.g., CUs).

[0061]

[0067] The residual information may be represented, for example, by quantized transform coefficients. The video decoder 300 may dequantize and inverse transform the quantized transform coefficients of the block to reconstruct a residual block for the block. The video decoder 300 forms a predictive block for the block using the signaled prediction mode (intra-prediction or inter-prediction) and associated prediction information (e.g., motion information for inter-prediction). The video decoder 300 may then combine the predictive block and the residual block (sample by sample) to reconstruct the original block. The video decoder 300 may perform additional processing, such as performing a deblocking process to reduce visual artifacts along block boundaries.

[0062]

[0068] This disclosure may generally refer to "signaling" certain information, such as a syntax element. The term "signaling" may generally refer to communication of values ​​for the syntax elements and / or other data used to decode the encoded video data. That is, the video encoder 200 may signal values ​​for the syntax elements in a bitstream. In general, signaling refers to generating values ​​in the bitstream. As noted above, the source device 102 may transfer the bitstream to the destination device 116 in substantially real-time or non-real-time, which may occur, such as when storing the syntax elements in the storage device 112 for later retrieval by the destination device 116.

[0063]

[0069] Video codecs such as HEVC and VVC use inter prediction to derive a prediction signal from reference pictures other than the current coded picture. The reference pictures are organized into one or two reference picture lists. The two lists are denoted as List 0 and List 1. Each of the reference picture lists may contain one or more reference pictures. The video encoder 200 encodes a syntax element indicating an inter prediction direction that identifies whether List 0, List 1, or both lists are used for inter prediction of the current coded block. The video encoder 200 also encodes another syntax element indicating a reference index (for each reference list used) to identify which of the reference pictures in the list is used for inter prediction. In merge mode, the video decoder 300 derives the inter prediction direction and reference index along with the motion vector information from the selected merge candidate. In AMVP mode, additional syntax elements indicating the inter prediction direction and reference index are signaled in the bitstream for the inter coded block.

[0064]

[0070] When signaling the inter prediction direction, the video encoder 200 signals a first bin to indicate whether the inter prediction mode (e.g., prediction direction) is a bi-prediction mode or a uni-prediction mode. If the mode is uni-prediction, a second bin is signaled to indicate whether list 0 or list 1 is used. If the mode is bi-prediction, no additional bin is needed since both list 0 and list 1 are used. The corresponding reference index is then signaled in the bitstream. When bi-prediction is used, both list 0 and list 1 are used for inter prediction, and reference indexes for both lists need to be signaled in the bitstream. The reference index, which ranges from 0 to N-1, is binarized using truncated unary coding, where N is the number of reference pictures in the list. CABAC may be applied to code some of the bins.

[0065]

[0071] Both HEVC and VVC support a flexible reference picture structure that can be signaled as part of the high-level syntax that allows each slice / picture to have a different reference picture list. That is, the video encoder 200 and the video decoder 300 are configured to maintain the same reference picture list with the same pictures and the same ordering. To enable the video encoder 200 and the video decoder 300 to maintain the same reference picture list, the video encoder 200 includes some signaling in the bitstream, and the video decoder 300 uses the signaling to determine which pictures to keep in the reference picture list and in which order. However, flexibility is not supported at the block level due to the increased signaling overhead that would be incurred to signal the reference picture structure for each block.

[0066]

[0072] In HEVC, the spatial resolution of a picture cannot change unless a new sequence using a new SPS starts with an intra random access point (IRAP) picture. VVC allows changing picture resolution in a sequence at a certain position without encoding an IRAP picture, which is always intra-coded. This feature is sometimes called reference picture resampling (RPR) because it involves resampling of a reference picture used for inter prediction when the reference picture has a different resolution than the current picture being decoded. To avoid additional processing steps, the RPR process in VVC is incorporated into the motion compensation process and performed at the block level. In the motion compensation stage, a scaling ratio is used together with the motion information to locate reference samples in the reference picture used in the interpolation process.

[0067]

[0073] In VVC, the scaling ratio is limited to be greater than or equal to 1 / 2 (2x downsampling from reference picture to current picture) and less than or equal to 8 (8x upsampling). Three sets of resampling filters with different frequency cutoffs are specified to handle various scaling ratios between the reference picture and the current picture. The three sets of resampling filters are applied to scaling ratios ranging from 1 / 2 to 1 / 1.75, 1 / 1.75 to 1 / 1.25, and 1 / 1.25 to 8, respectively. Each set of resampling filters has 16 phases for luma and 32 phases for chroma, which is the same as for the motion compensated interpolation filters. The filter set for normal MC interpolation is used for the case of scaling ratios ranging from 1 / 1.25 to 8. The normal MC interpolation process is a special case of the resampling process with scaling ratios ranging from 1 / 1.25 to 8. In addition to the conventional translational block motion, the affine mode has three sets of 6-tap interpolation filters used for the luma component to cover different scaling ratios in RPR. The horizontal and vertical scaling ratios are derived based on the picture width and height, and the left, right, top, and bottom scaling offsets specified for the reference and current pictures.

[0068]

[0074] To support this feature, the picture resolution and the corresponding adaptation window are signaled in the PPS but not in the SPS, while in the SPS the maximum picture resolution is signaled.

[0069]

[0075] This disclosure describes techniques for block-level reference picture adaptation. Video encoder 200 and video decoder 300 may be configured to adaptively organize reference pictures at the block level, for example, without signaling overhead. That is, each block may have a different ordering of reference pictures in a reference picture list. In general, the reference pictures are ordered (reordered) such that smaller indices (fewer numbers of bins) are assigned to a reference picture (or set of multiple reference pictures) that is more likely to be selected for the current block, which may result in a reduction in bits required to signal reference picture indexes and thus improve overall coding performance.

[0070]

[0076] The video encoder 200 and the video decoder 300 may be configured to determine the likelihood for a particular reference index based on the template matching cost. For a reference picture with a higher likelihood, a smaller index may be assigned. That is, for a reference picture hypothesis with a smaller template matching cost, the video encoder 200 and the video decoder 300 may be configured to assign a smaller index to the associated reference picture that results in a smaller template matching cost. The video encoder 200 and the video decoder 300 may be configured to calculate the template matching cost based on the distortion between the reconstructed signal of the neighboring samples in the template and the prediction signal generated by the reference hypothesis and the corresponding motion information of the current block. For each reference hypothesis, the video encoder 200 and the video decoder 300 may be configured to do the following: 1) Given a reference hypothesis and other motion information syntax elements (eg, MVP, MVD, motion vector resolution, etc.), derive the corresponding motion information. 2) performing inter prediction on the template according to the motion information derived in step (1) to generate a prediction signal of the template. 3) Obtain the reconstructed signal of the template (previously decoded adjacent samples). 4) Calculate the distortion between the reconstructed signal and the predicted signal.

[0071]

[0077] With respect to step 1 above, the video decoder 300 may be configured to receive syntax elements indicating AMVP candidates and MVD, for example, before performing block-level reference picture list adaptation. Thus, for each reference hypothesis, the video decoder 300 may determine an actual motion vector to be used to predict the block and use that motion vector to determine the reference hypothesis. Because different reference pictures may utilize different motion vector scaling or other reference picture-based derivation processes, the actual motion vector used for each reference hypothesis may be different even if the MVP and MVD are the same.

[0072]

[0078] For example, using steps 1-4 above, video encoder 200 and video decoder 300 may be configured to generate a first ordering of reference pictures in a reference picture list for a first block of a slice and a second ordering of reference pictures in a reference picture list for a second block of the slice. By using such an adaptive reference picture reordering process at the block level, video encoder 200 and video decoder 300 may reduce signaling overhead associated with signaling reference picture indexes in certain coding modes, such as AMVP mode.

[0073]

[0079] In one example, video encoder 200 and / or video decoder 300 may be configured to reorder the reference pictures within each reference list separately. The syntax design for reference pictures may be the same as that of HEVC and VVC, with the difference that the same reference index value may indicate different reference pictures for different blocks.

[0074]

[0080] In one example, the video encoder 200 and the video decoder 300 may be configured to reorder the reference pictures in both reference lists together. When signaling the inter-prediction direction, in some examples, only one bin may be coded in the bitstream to indicate whether the prediction mode for the block is bi-predictive or non-predictive. For uni-predictive modes, the index ref_idx_uni may be coded in the bitstream to indicate a reference picture selected from a joint list of reference pictures that includes reference pictures from both list 0 and list 1. The reference pictures in the joint list are ordered according to ascending order of template cost. In some examples, there may not need to be a second bin to indicate list 0 or list 1, and instead may be implicitly determined by the index. For bi-predictive modes, the index ref_idx_bi may be coded in the bitstream to indicate a selected pair of reference pictures.

[0075]

[0081] In some examples, the video encoder 200 and the video decoder 300 may be configured to reorder reference pictures from both reference lists together for uni-predictive modes, but separately within each reference list for bi-predictive modes.

[0076]

[0082] The video encoder 200 and the video decoder 300 may be configured to determine a cost criterion. According to one example of this disclosure, the cost is the distortion between the template prediction signal and the reconstructed signal. The distortion measure may be the Sum of Absolute Difference (SAD), the Sum of the Absolute Transformed Difference (SATD), the Sum of the Square Error (SSE), or another such cost determination.

[0077]

[0083] In some examples, the cost may be a combination of the distortion between the template prediction signal and the reconstructed signal and a regularization term determined by the index of the reference picture hypothesis in the initial list. The regularization term may be derived as index × scale. The scale value may be a predetermined constant integer or may be a value that depends on the block size.

[0078]

[0084] In another example, when the coding mode is bi-predictive, the video encoder 200 and the video decoder 300 may be configured to determine the cost as a sum of the distortion between each of the prediction signals and the reconstructed signal. A regularization term may be applied as described above.

[0079]

[0085] The video encoder 200 and the video decoder 300 may be configured to perform binarization of the index. In some examples, a shortened unary code may be used to code the index. In some examples, a Golomb-Rice code may be used. The Golomb-Rice code is a variable-length coding process, which is formed by a shortened unary coded prefix code and a fixed-length coded suffix code. The length of each of the prefix code and the suffix code is controlled by a parameter, a coded divisor D, where D is a positive power of 2 (e.g., 1, 2, 4, 8, ...), and is not greater than the total number of symbols to be coded. When there are N different symbols to be coded by using the Golomb-Rice code with divisor D, the indexes of these N different symbols are decomposed into N / D groups, each group having D symbols. The group index (e.g., 0, 1, 2, 3, ..., N / D-1) is coded by using a shortened unary code, which is the prefix code mentioned above. The indices of the D symbols in the group (e.g., 0, 1, 2, 3, ..., D-1) are then coded by using the aforementioned suffix codes, shortened binary codes (when D is not a power of 2) or fixed-length binary codes (when D is a power of 2). In some examples, shortened unary codes are used for ref_idx_uni and Golomb-Rice codes are used for ref_idx_bi. The number of combinations of different pairs of reference pictures in bi-prediction can be large, thus using a large number of index values. However, shortened unary codes may not be efficient for relatively large index values. In some examples, whether shortened unary codes or Golomb-Rice codes should be used depends on the total number of index values. If the number is greater than a threshold, Golomb-Rice codes are used. Otherwise, shortened unary codes are used.

[0080]

[0086] Figure 2 shows an example of a template. The template generally corresponds to or locates a coded area immediately adjacent to a current block, such as current block 140 in Figure 2. Samples of the template are decoded before the current block is decoded.

[0081]

[0087] In some examples, the templates include a left template 142 to the left of the current block 140 and / or a top template 144 above the current block 140, as illustrated in FIG. 2. If the width and height of the current block 140 are denoted as W and H, the size of the left template may be N×H and the size of the top template may be W×N, where N is a predefined value, such as 1, 2, 4, or some other integer value. Other templates may also be used. For example, the size of the left template may be N×2H and the size of the top template may be 2W×N.

[0082]

[0088] The video encoder 200 and the video decoder 300 may be configured to perform prediction signal generation for the template. As described above, a motion vector is first derived according to the reference picture hypothesis and other relative motion information, and then motion compensation is performed to generate a prediction signal for the template. The video encoder 200 and the video decoder 300 may be configured to use the determined motion vector to locate a sample in the reference picture that corresponds to the template. The video encoder 200 and the video decoder 300 may then determine a template matching cost by comparing the template sample of the current picture with the corresponding sample in the reference picture.

[0083]

[0089] In some examples, the video encoder 200 and the video decoder 300 may be configured to apply an interpolation filter used for motion compensation of the current block for template motion compensation. In some examples, the video encoder 200 and the video decoder 300 may apply a simplified interpolation filter to reduce complexity. For example, a bilinear interpolation filter is used instead of a typical longer tap (e.g., 6-tap, 8-tap, 12-tap) filter. In some examples, the video encoder 200 and the video decoder 300 may be configured to round the motion vector to the nearest integer for template motion compensation.

[0084]

[0090] The video encoder 200 and the video decoder 300 may be configured to perform the generation of the initial list. Next, the case of uni-prediction will be described. In some examples, the video encoder 200 and the video decoder 300 may be configured to generate an initial joint list of reference pictures by interleaving reference pictures from list 0 and list 1. The j reference pictures in list i (i=0, 1) become 2×j+i reference pictures in the joint list when j is smaller than the number of reference pictures in list 0 and smaller than the number of reference pictures in list 1. When j is equal to or larger than the number of reference pictures in list 0 or equal to or larger than the number of reference pictures in list 1, the index in the joint list is N+j, where N is the minimum value between the number of reference pictures in list 0 and the number of reference pictures in list 1.

[0085]

[0091] In some examples, the video encoder 200 and the video decoder 300 may be configured to generate the initial joint list of reference pictures by first adding the reference picture to list 0 and then adding the reference picture to list 1. Or, in some examples, the video encoder 200 and the video decoder 300 may be configured to generate the initial joint list of reference pictures by first adding the reference picture to list 1 and then adding the reference picture to list 0. In some examples, the video encoder 200 and the video decoder 300 may be configured to generate the reference pictures in the joint list according to an ascending order of the distance between the reference picture and the current picture.

[0086]

[0092] Next, the bi-prediction case will be described. In one example, in the bi-prediction case, the video encoder 200 and the video decoder 300 may be configured to generate an initial list of reference picture pairs as follows. Loop over reference picture i in list 0 Loop over reference picture j in list 1 Inserts the pair (i,j) into the list.

[0087] The list may be reordered according to ascending order of i+j.

[0088]

[0093] In another example, the video encoder 200 and the video decoder 300 may be configured to subsequently apply a sorting process, in which a cost is assigned to each pair of reference pictures and the list is sorted based on ascending order of cost. In one example, the cost is calculated as abs(pocDist0)+abs(pocDist1)+abs(pocDist0-pocDist1), where pocDist0 represents the difference in picture order count (POC) between the current picture and reference picture 0, pocDist1 represents the difference in POC between reference picture 1 and the current picture, and abs() is an operator that calculates the absolute value. In another example, the cost may be calculated as abs(pocDist0)+abs(pocDist1)+c, where c is set to 0 if pocDist0 and pocDist1 have different signs, and is set to a predefined large positive value otherwise. In this way, a larger cost is assigned to a reference picture pair that has both forward reference pictures or both backward references.

[0089]

[0094] Video encoder 200 and video decoder 300 may be configured to process duplicated reference pictures. The same reference picture may be inserted in both list 0 and list 1. Duplicate reference pictures may exist when creating a joint list for reordering reference pictures for uni-prediction. In some examples, a predefined large cost may be assigned to the duplicated reference picture. For example, the cost is set to a maximum value. In some examples, the template cost for the duplicated reference picture is scaled by a predefined value, for example, 2, 4, 8, 16, etc. Similarly, the same process may be applied to duplicated pairs of reference pictures in bi-prediction mode.

[0090]

[0095] Various techniques described herein may be used in combination with MVD code prediction. The MVD code may be predicted based on template matching costs, as described in JVET-X0132 (24th Conference, Teleconference, October 6-15, 2021) and JVET-K0067 (11th Conference: Ljubljana, SI, July 10-18, 2018). In some examples, the reference picture index and the MVD code may be coded together as an index, where the index value indicates a certain combination of the reference picture hypothesis and the MVD code hypothesis. All possible combinations may be ordered according to the template matching costs, as discussed above.

[0091]

[0096] In some examples, MVD sign prediction and reference picture adaptation may be mutually exclusive: the two tools can be controlled by high-level syntax, and only one of the two tools can be applied to the current coded picture / slice.

[0092]

[0097] In some examples, MVD sign prediction and reference picture adaptation are mutually exclusive at the block level. The two tools can be controlled by the magnitude of the MVD. If the magnitude of the MVD is below a certain threshold, reference picture adaptation is applied. Otherwise, MVD sign prediction is applied.

[0093]

[0098] In another example, as discussed above, the code prediction of the MVD and the reference picture adaptation may be used together. When performing reference picture reordering, the video encoder 200 and the video decoder 300 may be configured to assign a minimum cost among all possible hypotheses of the MVD to a reference picture hypothesis for reference picture reordering. Then, given the reordered reference picture list and the decoded index, the video encoder 200 and the video decoder 300 may determine a selected reference picture, which may then be used for code prediction of the MVD. The costs calculated during the reference picture reordering process may be stored, and the costs associated with the determined reference picture may be reused for code prediction.

[0094]

[0099] In another example, as discussed above, MVD code prediction and the proposed reference picture adaptation may be used together. When performing MVD code prediction, the video encoder 200 and the video decoder 300 may be configured to assign the minimum cost among all possible hypotheses of the reference picture to the MVD code hypothesis. Then, given the reordered code hypotheses and the decoded code index, the video encoder 200 and the video decoder 300 may determine the actual MVD, which may then be used for reference picture reordering. The costs calculated during the code prediction process may be stored, and the costs associated with the determined MVD may be reused for reference picture reordering.

[0095]

[0100] In another example, the code prediction of MVD and reference picture adaptation as proposed above may be used together. When performing reference picture reordering, the video encoder 200 and the video decoder 300 may assign the minimum cost among all possible hypotheses of the MVD to the hypothesis of the reference picture for the reordering of the reference pictures. Then, given the reordered reference picture list and the decoded index, the video encoder 200 and the video decoder 300 may determine the selected reference picture. When performing code prediction of MVD, the video encoder 200 and the video decoder 300 may assign the minimum cost among all possible hypotheses of the reference picture to the hypothesis of the code of the MVD. Then, given the reordered code hypotheses and the decoded code index, the video encoder 200 and the video decoder 300 may determine the actual MVD.

[0096]

[0101] The techniques described above may be similarly applied to combinations of reference picture adaptation and other syntax predictions, such as IMV indexes, local illumination compensation (LIC) flags, bi-prediction with CU-level weights (BCW) indexes, etc.

[0097]

[0102] Next, a technique for simplifying MVD code prediction is described. As described above, the combination of reference picture reordering and MVD code prediction may involve testing the costs of all possible combinations of different hypotheses, which may impose significant computational complexity for bi-prediction with multiple MVDs, especially for affine mode when there are at most three MVDs in each direction. The following technique may be applied to simplify the process.

[0098]

[0103] In one example, the video encoder 200 and the video decoder 300 may be configured to disable MVD code prediction for a bi-predictive mode. A certain condition may be set for the disablement. As an exemplary condition, the mode is not an SMVD mode for the disablement, and the MVDs in list 0 and list 1 are symmetric. As another exemplary condition, the mode is an affine mode.

[0099]

[0104] In another example, the video encoder 200 and the video decoder 300 may be configured to disable MVD code prediction for one of the directions in the case of bi-prediction. For example, the MVD in list 1 may be disabled in the case of bi-prediction. A certain condition may be set for the disablement. For example, if the MVD in list 0 is non-zero, the MVD code prediction for list 1 is disabled. It should be noted that the magnitude of the MVD in both directions (list 0 and list 1) may be pre-coded, and then it can be determined whether the MVD code prediction is disabled for one of the lists.

[0100]

[0105] In yet another example, the video encoder 200 and the video decoder 300 may be configured to limit the number of predicted MVD codes. The number may be configurable and signaled in a high-level syntax. In one example, a counter may be set for the MVD codes, and when the number of predicted MVD codes reaches a predefined number, the remaining MVD codes are coded periodically, e.g., using one bin to indicate negative or positive signs instead of predicted. In another example, the MVDs are sorted in descending order based on magnitude. Then, up to N MVDs in the sorted list are predicted, and resets are not predicted. Note that in both examples, the magnitude of the MVDs in both list 0 and list 1 may be pre-coded.

[0101]

[0106] The techniques described above may be applied independently for MVD code prediction, or may be conditioned on whether a reference reordering technique (or other syntax element prediction technique) is applied.

[0102]

[0107] The video encoder 200 and the video decoder 300 may be configured to determine a bilateral matching cost for a bi-predictive mode. For a bi-predictive mode, a bilateral matching cost may be used, where the cost is the distortion between the list 0 predictor and the list 1 predictor. The list 0 predictor is obtained by motion compensation using the motion information derived (according to the reference picture hypothesis) in list 0, and the list 1 predictor is obtained by motion compensation using the motion information derived (according to the reference picture hypothesis) in list 1.

[0103]

[0108] In some examples, the video encoder 200 and the video decoder 300 may be configured to determine the bilateral matching cost instead of the template matching cost in a bi-predictive mode and then use the bilateral matching cost to reorder the reference picture list. In some examples, the video encoder 200 and the video decoder 300 may be configured to use the bilateral matching cost together with the template matching cost in a bi-predictive mode. For example, the video encoder 200 and the video decoder 300 may be configured to reorder the reference pictures based on a weighted sum of the bilateral matching cost and the template matching cost.

[0104]

[0109] Next, aspects of the interaction with reference picture resampling are described. When RPR is applied to a reference picture, typically the decoder-side derivation process is disabled. For example, the video decoder 300 may be configured to disable template matching mode and Linear Illuminance Compensation (LIC) when RPR is applied to a selected reference picture. Correspondingly, the LIC flag (indicating LIC on / off) is not signaled in the bitstream and is presumed to be false (off). Meanwhile, the MVP index may be signaled in the bitstream instead of being implicitly derived by template matching when RPR is applied to a selected reference picture. However, when a block-level reference reordering process is applied, the selected reference picture may be unknown during the parsing stage (because the reordering of reference pictures is performed during the construction stage, which is typically much slower than parsing syntax elements and therefore occurs behind the parsing of relative syntax elements). Therefore, whether RPR is applied to the selected reference picture may be unknown when determining whether the LIC flag (or MVP index) is present. To solve such a problem, techniques related to the interaction between reference picture reordering and RPR are described below.

[0105]

[0110] In one example technique, the video decoder 300 may be configured such that reference picture reordering and RPR are exclusive. In one example, if the SPS-level RPR enable flag is true, then the SPS-level reference picture reordering enable flag is inferred or constrained to be false.

[0106]

[0111] In another example technique, if a reference picture or one of the paired reference pictures is scaled (e.g., RPR is applied), the video decoder 300 is configured to set the corresponding cost in the reference picture or reference picture pair reordering process to the maximum value. In this way, the scaled reference picture may always be behind the reordered list, e.g., the scaled reference picture always has an index greater than the index of the non-scaled reference picture. At the slice level or picture level, the number of non-scaled reference pictures (or reference picture pairs) may be pre-computed, as indicated as NumNonScaled. After parsing the index of the selected reference picture in the reordered list, the video decoder 300 may determine whether the selected reference picture is a scaled picture by comparing the index value to N (without performing the reordering process). Thus, if the index is greater than or equal to NumNonScaled, the selected reference may be determined to be a scaled reference picture, or otherwise determined to be non-scaled.

[0107]

[0112] 3 is a block diagram illustrating an example video encoder 200 that may perform techniques of this disclosure. FIG. 3 is provided for purposes of explanation and should not be considered as limiting the techniques broadly illustrated and described in this disclosure. For purposes of explanation, this disclosure describes a video encoder 200 according to VVC (ITU-T H.266 under development) and HEVC (ITU-T H.265) techniques. However, the techniques of this disclosure may be implemented by video encoding devices configured for other video coding standards and video coding formats, such as AV1 and successor video coding formats to AV1.

[0108]

[0113] 3, the video encoder 200 includes a video data memory 230, a mode selection unit 202, a residual generation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transform processing unit 212, a reconstruction unit 214, a filter unit 216, a decoded picture buffer (DPB) 218, and an entropy coding unit 220. Any or all of the video data memory 230, the mode selection unit 202, the residual generation unit 204, the transform processing unit 206, the quantization unit 208, an inverse quantization unit 210, an inverse transform processing unit 212, a reconstruction unit 214, a filter unit 216, a DPB 218, and an entropy coding unit 220 may be implemented in one or more processors or processing circuits. For example, the units of the video encoder 200 may be implemented as one or more circuits or logic elements as part of a hardware circuit, or as part of a processor, an ASIC, or an FPGA. Moreover, video encoder 200 may include additional or alternative processors or processing circuitry for performing these and other functions.

[0109]

[0114] The video data memory 230 may store video data to be encoded by the components of the video encoder 200. The video encoder 200 may receive the video data stored in the video data memory 230 from, for example, the video source 104 (FIG. 1). The DPB 218 may function as a reference picture memory that stores reference video data for use in predicting subsequent video data by the video encoder 200. The video data memory 230 and the DPB 218 may be formed by any of a variety of memory devices, such as DRAM, including synchronous dynamic random access memory (SDRAM), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. The video data memory 230 and the DPB 218 may be provided by the same memory device or separate memory devices. In various examples, the video data memory 230 may be on-chip with other components of the video encoder 200, as illustrated, or may be off-chip relative to those components.

[0110]

[0115] In this disclosure, references to video data memory 230 should not be construed as limited to memory internal to video encoder 200, unless specifically stated as such, or to memory external to video encoder 200, unless specifically stated as such. Rather, references to video data memory 230 should be understood as a reference memory that stores video data that video encoder 200 receives for encoding (e.g., video data for a current block to be encoded). Memory 106 of FIG. 1 may also provide temporary storage of outputs from various units of video encoder 200.

[0111]

[0116] The various units in FIG. 3 are illustrated to aid in understanding the operations performed by the video encoder 200. The units may be implemented as fixed-function circuits, programmable circuits, or a combination thereof. A fixed-function circuit refers to a circuit that provides a specific function, and the operations that may be performed are predefined. A programmable circuit refers to a circuit that may be programmed to perform various tasks, and provides flexible functionality in the operations that may be performed. For example, a programmable circuit may execute software or firmware that causes the programmable circuit to operate in a manner defined by the software or firmware instructions. Although a fixed-function circuit may execute software instructions (e.g., to receive parameters or to output parameters), the types of operations that the fixed-function circuit performs are generally invariant. In some examples, one or more of the units may be different circuit blocks (fixed function or programmable), and in some examples, one or more of the units may be an integrated circuit.

[0112]

[0117] Video encoder 200 may include arithmetic logic units (ALUs), elementary function units (EFUs), digital circuits, analog circuits, and / or a programmable core formed from programmable circuits. In examples in which the operations of video encoder 200 are performed using software executed by programmable circuits, memory 106 (FIG. 1) may store software instructions (e.g., object code) that video encoder 200 receives and executes, or another memory (not shown) within video encoder 200 may store such instructions.

[0113]

[0118] The video data memory 230 is configured to store the received video data. The video encoder 200 may retrieve pictures of the video data from the video data memory 230 and provide the video data to the residual generation unit 204 and the mode selection unit 202. The video data in the video data memory 230 may be raw video data to be encoded.

[0114]

[0119] The mode selection unit 202 includes a motion estimation unit 222, a motion compensation unit 224, and an intra prediction unit 226. The mode selection unit 202 may include additional functional units for performing video prediction according to other prediction modes. By way of example, the mode selection unit 202 may include a palette unit, an intra block copy unit (which may be part of the motion estimation unit 222 and / or the motion compensation unit 224), an affine unit, a linear model (LM) unit, etc.

[0115]

[0120] The mode selection unit 202 typically coordinates multiple encoding passes to test combinations of encoding parameters and the resulting rate-distortion values ​​for such combinations. The encoding parameters may include division of CTUs into CUs, prediction modes for CUs, transform types for residual data of CUs, quantization parameters for residual data of CUs, etc. The mode selection unit 202 may ultimately select a combination of encoding parameters that has a better rate-distortion value than the other tested combinations.

[0116]

[0121] Video encoder 200 may divide a picture retrieved from video data memory 230 into a series of CTUs and may encapsulate one or more CTUs within a slice. Mode selection unit 202 may divide the CTUs of a picture according to a tree structure, such as the MTT structure, QTBT structure, superblock structure, or quadtree structure described above. As described above, video encoder 200 may form one or more CUs from dividing the CTUs according to the tree structure. Such CUs may also be generally referred to as "video blocks" or "blocks."

[0117]

[0122] In general, the mode selection unit 202 also controls its components (e.g., the motion estimation unit 222, the motion compensation unit 224, and the intra prediction unit 226) to generate a prediction block for a current block (e.g., the current CU, or in HEVC, the overlapping portion of the PU and TU). In the case of inter prediction of the current block, the motion estimation unit 222 may perform motion search to identify one or more closely matching reference blocks among one or more reference pictures (e.g., one or more previously coded pictures stored in the DPB 218). Specifically, the motion estimation unit 222 may calculate a value representing how similar a potential reference block is to the current block according to, for example, a sum of absolute differences (SAD), a sum of squared differences (SSD), a mean absolute difference (MAD), a mean squared difference (MSD), etc. The motion estimation unit 222 may generally perform these calculations using a sample-by-sample difference between the current block and the reference block under consideration. Motion estimation unit 222 may identify the reference block having the lowest value resulting from these calculations, which indicates the reference block that best matches the current block.

[0118]

[0123] The motion estimation unit 222 may form one or more motion vectors (MVs) that define the position of a reference block in a reference picture relative to the position of a current block in a current picture. The motion estimation unit 222 may then provide the motion vectors to the motion compensation unit 224. For example, in the case of unidirectional inter prediction, the motion estimation unit 222 may provide a single motion vector, while in the case of bidirectional inter prediction, the motion estimation unit 222 may provide two motion vectors. The motion compensation unit 224 may then generate a predictive block using the motion vectors. For example, the motion compensation unit 224 may use the motion vectors to retrieve data of a reference block. As another example, if the motion vectors have fractional sample precision, the motion compensation unit 224 may interpolate values ​​for the predictive block according to one or more interpolation filters. Moreover, in the case of bidirectional inter prediction, the motion compensation unit 224 may retrieve data for two reference blocks identified by the respective motion vectors and combine the retrieved data, for example, through a sample-wise average or a weighted average.

[0119]

[0124] When operating according to the AV1 video coding format, the motion estimation unit 222 and the motion compensation unit 224 may be configured to encode coding blocks of video data (e.g., both luma coding blocks and chroma coding blocks) using translational motion compensation, affine motion compensation, overlapped block motion compensation (OBMC), and / or synthetic inter-intra prediction.

[0120]

[0125] As part of determining how to code a block, and then as part of later decoding the coded block, the motion estimation unit 222 and the motion compensation unit 224 may be configured to perform various techniques of this disclosure. For example, the motion estimation unit 222 and / or the motion compensation unit 224 may be configured to generate a first ordering of reference pictures in a reference picture list for a first block of a slice based on an adaptive reference picture reordering process, and then generate a second, different ordering of reference pictures in a reference picture list for a second block of the slice. The motion compensation unit 224 may be configured to decode the first block using the first ordering of reference pictures and decode the second block using the second ordering of reference pictures.

[0121]

[0126] As another example, in the case of intra prediction or intra predictive coding, the intra prediction unit 226 may generate a predictive block from neighboring samples to the current block. For example, in the case of a directional mode, the intra prediction unit 226 may generally mathematically combine values ​​of neighboring samples and populate these calculated values ​​in a defined direction across the current block to produce the predictive block. As another example, in the case of a DC mode, the intra prediction unit 226 may calculate an average of neighboring samples to the current block and generate a predictive block to include this resulting average for each sample of the predictive block.

[0122]

[0127] When operating according to the AV1 video coding format, the intra prediction unit 226 may be configured to encode coding blocks of video data (e.g., both luma coding blocks and chroma coding blocks) using directional intra prediction, non-directional intra prediction, recursive filter intra prediction, chroma-from-luma (CFL) prediction, intra block copy (IBC), and / or color palette modes. The mode selection unit 202 may include additional functional units for performing video prediction according to other prediction modes.

[0123]

[0128] The mode select unit 202 provides the prediction block to the residual generation unit 204. The residual generation unit 204 receives a raw uncoded version of the current block from the video data memory 230 and receives the prediction block from the mode select unit 202. The residual generation unit 204 calculates sample-by-sample differences between the current block and the prediction block. The resulting sample-by-sample differences define a residual block for the current block. In some examples, the residual generation unit 204 may also determine differences between sample values ​​in the residual block to generate the residual block using residual differential pulse code modulation (RDPCM). In some examples, the residual generation unit 204 may be formed using one or more subtractor circuits that perform binary subtraction.

[0124]

[0129] In an example where the mode selection unit 202 splits a CU into PUs, each PU may be associated with a luma prediction unit and a corresponding chroma prediction unit. The video encoder 200 and the video decoder 300 may support PUs having various sizes. As mentioned above, the size of a CU may refer to the size of the luma coding block of the CU, and the size of a PU may refer to the size of the luma prediction unit of the PU. Assuming that the size of a particular CU is 2N×2N, the video encoder 200 may support a PU size of 2N×2N or N×N for intra prediction, and a symmetric PU size of 2N×2N, 2N×N, N×2N, N×N, or similar for inter prediction. The video encoder 200 and the video decoder 300 may also support asymmetric splitting for PU sizes of 2N×nU, 2N×nD, nL×2N, and nR×2N for inter prediction.

[0125]

[0130] In examples where the mode select unit 202 does not further divide the CUs into PUs, each CU may be associated with a luma coding block and a corresponding chroma coding block. As noted above, the size of a CU may refer to the size of the luma coding block of the CU. The video encoder 200 and the video decoder 300 may support CU sizes of 2N×2N, 2N×N, or N×2N.

[0126]

[0131] For other video coding techniques, such as intra block copy mode coding, affine mode coding, and linear model (LM) mode coding, as some examples, the mode select unit 202 generates a predictive block for the current block being coded via a respective unit associated with the coding technique. In some examples, such as palette mode coding, the mode select unit 202 may not generate a predictive block, but instead generate syntax elements that indicate a scheme for reconstructing the block based on a selected palette. In such modes, the mode select unit 202 may provide these syntax elements to the entropy coding unit 220 to be coded.

[0127]

[0132] As described above, the residual generation unit 204 receives the video data for a current block and a corresponding predictive block. The residual generation unit 204 then generates a residual block for the current block. To generate the residual block, the residual generation unit 204 calculates the sample-by-sample difference between the predictive block and the current block.

[0128]

[0133] Transform processing unit 206 applies one or more transforms to the residual block to generate a block of transform coefficients (referred to herein as a "transform coefficient block"). Transform processing unit 206 may apply various transforms to the residual block to form the transform coefficient block. For example, transform processing unit 206 may apply a discrete cosine transform (DCT), a directional transform, a Karhunen-Loeve transform (KLT), or a conceptually similar transform to the residual block. In some examples, transform processing unit 206 may perform multiple transforms on the residual block, e.g., a linear transform and a secondary transform, such as a rotation transform. In some examples, transform processing unit 206 does not apply a transform to the residual block.

[0129]

[0134] When operating according to AV1, transform processing unit 206 may apply one or more transforms to the residual block to generate a block of transform coefficients (referred to herein as a "transform coefficient block"). Transform processing unit 206 may apply various transforms to the residual block to form the transform coefficient block. For example, transform processing unit 206 may apply a horizontal / vertical transform combination, which may include a discrete cosine transform (DCT), an asymmetric discrete sine transform (ADST), an inverse ADST (e.g., ADST in reverse order), or an identity transform (IDTX). When using an identity transform, the transform is skipped in one of the vertical or horizontal directions. In some examples, the transform process may be skipped.

[0130]

[0135] The quantization unit 208 may quantize the transform coefficients in the transform coefficient block to generate a quantized transform coefficient block. The quantization unit 208 may quantize the transform coefficients of the transform coefficient block according to a quantization parameter (QP) value associated with the current block. The video encoder 200 (e.g., via the mode selection unit 202) may adjust the degree of quantization applied to the transform coefficient block associated with the current block by adjusting the QP value associated with the CU. Quantization may result in loss of information, and thus the quantized transform coefficients may be less accurate than the original transform coefficients generated by transform processing unit 206.

[0131]

[0136] Inverse quantization unit 210 and inverse transform processing unit 212 may apply inverse quantization and inverse transform, respectively, to the quantized transform coefficient block to reconstruct a residual block from the transform coefficient block. Reconstruction unit 214 may generate a reconstructed block that corresponds to the current block (possibly with some distortion) based on the reconstructed residual block and the predictive block generated by mode selection unit 202. For example, reconstruction unit 214 may add samples of the reconstructed residual block to corresponding samples from the predictive block generated by mode selection unit 202 to generate the reconstructed block.

[0132]

[0137] Filter unit 216 may perform one or more filter operations on the reconstructed blocks. For example, filter unit 216 may perform a deblocking operation to reduce blockiness artifacts along edges of a CU. The operations of filter unit 216 may be skipped in some examples.

[0133]

[0138] When filter unit 216 operates according to AV1, it may perform one or more filter operations on the reconstructed blocks. For example, filter unit 216 may perform a deblocking operation to reduce blockiness artifacts along the edges of a CU. In other examples, filter unit 216 may apply a constrained directional enhancement filter (CDEF), which may be applied after deblocking and may include application of a non-separable, non-linear, low-pass directional filter based on the estimated edge direction. Filter unit 216 may also include a loop restoration filter, which may be applied after CDEF and may include a separable symmetric normalized Wiener filter or a dual autoinduction filter.

[0134]

[0139] Video encoder 200 stores the reconstructed blocks in DPB 218. For example, in examples where the operations of filter unit 216 are not performed, reconstruction unit 214 may store the reconstructed blocks in DPB 218. In examples where the operations of filter unit 216 are performed, filter unit 216 may store the filtered reconstructed blocks in DPB 218. Motion estimation unit 222 and motion compensation unit 224 may retrieve reference pictures formed from the reconstructed (and possibly filtered) blocks from DPB 218 to inter predict blocks of a later coded picture. In addition, intra prediction unit 226 may use the reconstructed blocks of the current picture in DPB 218 to intra predict other blocks in the current picture.

[0135]

[0140] In general, entropy encoding unit 220 may entropy encode syntax elements received from other functional components of video encoder 200. For example, entropy encoding unit 220 may entropy encode quantized transform coefficient blocks from quantization unit 208. As another example, entropy encoding unit 220 may entropy encode predictive syntax elements (e.g., motion information for inter prediction or intra mode information for intra prediction) from mode selection unit 202. Entropy encoding unit 220 may perform one or more entropy encoding operations on syntax elements, which are another example of video data, to generate entropy encoded data. For example, entropy encoding unit 220 may perform a context-adaptive variable length coding (CAVLC) operation, a CABAC operation, a variable-to-variable (V2V) coding operation, a syntax-based context-adaptive binary arithmetic coding (SBAC) operation, a Probability Interval Partitioning Entropy (PIPE) coding operation, an Exponential-Golomb coding operation, or another type of entropy coding operation on the data. In some examples, entropy encoding unit 220 may operate in a bypass mode in which syntax elements are not entropy coded.

[0136]

[0141] The video encoder 200 may output a bitstream that includes entropy coding syntax elements needed to reconstruct blocks of a slice or picture. In particular, the entropy coding unit 220 may output the bitstream.

[0137]

[0142] The entropy encoding unit 220 may be configured as a symbol-to-symbol adaptive multi-symbol arithmetic coder in accordance with AV1. A syntax element in AV1 includes an alphabet of N elements, and a context (e.g., a probability model) includes a set of N probabilities. The entropy encoding unit 220 may store the probabilities as n-bit (e.g., 15-bit) cumulative distribution functions (CDFs). The entropy encoding unit 22 may perform recursive scaling with an update factor based on the alphabet size to update the context.

[0138]

[0143] The operations described above are described with respect to blocks. Such descriptions should be understood as being operations for a luma coding block and / or a chroma coding block. As described above, in some examples, the luma coding block and the chroma coding block are the luma component and the chroma component of a CU. In some examples, the luma coding block and the chroma coding block are the luma component and the chroma component of a PU.

[0139]

[0144] In some examples, operations performed with respect to luma coding blocks do not need to be repeated for chroma coding blocks. As an example, operations to identify motion vectors (MVs) and reference pictures for luma coding blocks do not need to be repeated to identify MVs and reference pictures for chroma blocks. Rather, MVs for luma coding blocks may be scaled to determine MVs for chroma blocks, and the reference pictures may also be the same. As another example, the intra prediction process may be the same for luma coding blocks and chroma coding blocks.

[0140]

[0145] Video encoder 200 represents an example of a device configured to encode video data, the device including a memory configured to store the video data, and one or more processing units implemented in circuitry configured to generate a first ordering of reference pictures in a reference picture list for a first block and to generate a second ordering of reference pictures in a reference picture list for a second block, the first ordering being different from the second ordering.

[0141]

[0146] 4 is a block diagram illustrating an example video decoder 300 that may perform techniques of this disclosure. FIG. 4 is provided for purposes of explanation and not to limit the techniques illustrated and described broadly in this disclosure. For purposes of explanation, this disclosure describes a video decoder 300 according to VVC (ITU-T H.266 under development) and HEVC (ITU-T H.265) techniques. However, the techniques of this disclosure may be performed by video coding devices configured according to other video coding standards.

[0142]

[0147] In the embodiment of FIG. 4, the video decoder 300 includes a coded picture buffer (CPB) memory 320, an entropy decoding unit 302, a prediction processing unit 304, an inverse quantization unit 306, an inverse transform processing unit 308, a reconstruction unit 310, a filter unit 312, and a decoded picture buffer (DPB) 314. Any or all of the CPB memory 320, the entropy decoding unit 302, the prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, the filter unit 312, and the DPB 314 may be implemented in one or more processors or in processing circuits. For example, the units of the video decoder 300 may be implemented as one or more circuits or logic elements as part of a hardware circuit, or as part of a processor, ASIC, or FPGA. Moreover, the video decoder 300 may include additional or alternative processors or processing circuits for performing these and other functions.

[0143]

[0148] Prediction processing unit 304 includes a motion compensation unit 316 and an intra prediction unit 318. Prediction processing unit 304 may include additional units for performing prediction according to other prediction modes. By way of example, prediction processing unit 304 may include a palette unit, an intra block copy unit (which may form part of motion compensation unit 316), an affine unit, a linear model (LM) unit, etc. In other examples, video decoder 300 may include more, fewer, or different functional components.

[0144]

[0149] When operating according to AV1, the motion compensation unit 316 may be configured to decode coding blocks of video data (e.g., both luma coding blocks and chroma coding blocks) using translational motion compensation, affine motion compensation, OBMC, and / or synthetic inter-intra prediction, as described above. The intra prediction unit 318 may be configured to decode coding blocks of video data (e.g., both luma coding blocks and chroma coding blocks) using directional intra prediction, non-directional intra prediction, recursive filter intra prediction, CFL, intra block copy (IBC), and / or color palette mode, as described above.

[0145]

[0150] The motion compensation unit 316 may be configured to perform various techniques of this disclosure. For example, the motion compensation unit 316 may be configured to generate a first ordering of reference pictures in a reference picture list for a first block of a slice based on an adaptive reference picture reordering process, and then generate a second, different ordering of reference pictures in a reference picture list for a second block of the slice. The motion compensation unit 316 may be configured to decode the first block using the first ordering of reference pictures and decode the second block using the second ordering of reference pictures.

[0146]

[0151] The CPB memory 320 may store video data, such as an encoded video bitstream, to be decoded by components of the video decoder 300. The video data stored in the CPB memory 320 may be obtained, for example, from the computer-readable medium 110 (FIG. 1). The CPB memory 320 may include a CPB that stores encoded video data (e.g., syntax elements) from the encoded video bitstream. The CPB memory 320 may also store video data other than syntax elements of coded pictures, such as temporary data representing output from various units of the video decoder 300. The DPB 314 generally stores decoded pictures that the video decoder 300 may output and / or use as reference video data when decoding subsequent data or pictures of the encoded video bitstream. The CPB memory 320 and the DPB 314 may be formed by any of a variety of memory devices, such as DRAM, including SDRAM, MRAM, RRAM, or other types of memory devices. The CPB memory 320 and the DPB 314 may be provided by the same memory device or by separate memory devices. In various examples, the CPB memory 320 may be on-chip with other components of the video decoder 300 or off-chip relative to those components.

[0147]

[0152] Additionally or alternatively, in some examples, video decoder 300 may retrieve coded video data from memory 120 (FIG. 1). That is, memory 120 may store data as discussed above for CPB memory 320. Similarly, memory 120 may store instructions to be executed by video decoder 300 when some or all of the functionality of video decoder 300 is implemented in software to be executed by processing circuitry of video decoder 300.

[0148]

[0153] The various units shown in FIG. 4 are illustrated to aid in understanding the operations performed by the video decoder 300. The units may be implemented as fixed function circuits, programmable circuits, or a combination thereof. As with FIG. 3, fixed function circuits refer to circuits that provide a particular function and are predefined in the operations that may be performed. Programmable circuits refer to circuits that may be programmed to perform various tasks and provide flexible functionality in the operations that may be performed. For example, a programmable circuit may execute software or firmware that causes the programmable circuit to operate in a manner defined by the software or firmware instructions. Although a fixed function circuit may execute software instructions (e.g., to receive parameters or to output parameters), the types of operations that the fixed function circuit performs are generally invariant. In some examples, one or more of the units may be different circuit blocks (fixed function or programmable), and in some examples, one or more of the units may be an integrated circuit.

[0149]

[0154] The video decoder 300 may include a programmable core formed from ALUs, EFUs, digital circuits, analog circuits, and / or programmable circuits. In examples in which the operations of the video decoder 300 are performed by software executing on programmable circuits, on-chip or off-chip memory may store instructions (e.g., object code) of the software that the video decoder 300 receives and executes.

[0150]

[0155] The entropy decoding unit 302 may receive the encoded video data from the CPB and entropy decode the video data to recover the syntax elements. The prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, and the filter unit 312 may generate decoded video data based on the syntax elements extracted from the bitstream.

[0151]

[0156] In general, the video decoder 300 reconstructs a picture on a block-by-block basis. The video decoder 300 may perform a reconstruction operation on each block individually (the block currently being reconstructed, i.e., the block being decoded, may be referred to as the “current block”).

[0152]

[0157] The entropy decoding unit 302 may entropy decode syntax elements that specify the quantized transform coefficients of the quantized transform coefficient block as well as transform information, such as a quantization parameter (QP) and / or a transform mode indication. The inverse quantization unit 306 may use the QP associated with the quantized transform coefficient block to determine the degree of quantization, and similarly the degree of inverse quantization that the inverse quantization unit 306 should apply. The inverse quantization unit 306 may perform a bitwise left shift operation, for example, to inverse quantize the quantized transform coefficients. The inverse quantization unit 306 may thereby form a transform coefficient block including the transform coefficients.

[0153]

[0158] After the inverse quantization unit 306 forms the transform coefficient blocks, the inverse transform processing unit 308 may apply one or more inverse transforms to the transform coefficient blocks to generate a residual block associated with the current block. For example, the inverse transform processing unit 308 may apply an inverse DCT, an inverse integer transform, an inverse Karhunen-Loeve transform (KLT), an inverse rotational transform, an inverse transform, or another inverse transform to the transform coefficient blocks.

[0154]

[0159] Further, prediction processing unit 304 generates a prediction block according to the prediction information syntax element entropy decoded by entropy decoding unit 302. For example, if the prediction information syntax element indicates that the current block is inter predicted, motion compensation unit 316 may generate a prediction block. In this case, the prediction information syntax element may indicate a reference picture in DPB 314 from which to retrieve a reference block, as well as a motion vector that identifies the location of the reference block in the reference picture relative to the location of the current block in the current picture. Motion compensation unit 316 may generally perform the inter prediction process in a manner substantially similar to that described with respect to motion compensation unit 224 (FIG. 3).

[0155]

[0160] As another example, if the prediction information syntax element indicates that the current block is intra predicted, the intra prediction unit 318 may generate a prediction block according to the intra prediction mode indicated by the prediction information syntax element. Again, the intra prediction unit 318 may generally perform an intra prediction process in a manner substantially similar to that described with respect to the intra prediction unit 226 (FIG. 3). The intra prediction unit 318 may retrieve data of samples neighboring the current block from the DPB 314.

[0156]

[0161] The reconstruction unit 310 may reconstruct the current block using the predictive block and the residual block. For example, the reconstruction unit 310 may add samples of the residual block to corresponding samples of the predictive block to reconstruct the current block.

[0157]

[0162] Filter unit 312 may perform one or more filter operations on the reconstructed blocks. For example, filter unit 312 may perform a deblocking operation to reduce blockiness artifacts along edges of the reconstructed blocks. The operations of filter unit 312 need not be performed in all instances.

[0158]

[0163] The video decoder 300 may store the reconstructed blocks in the DPB 314. For example, in examples where the operations of the filter unit 312 are not performed, the reconstruction unit 310 may store the reconstructed blocks in the DPB 314. In examples where the operations of the filter unit 312 are performed, the filter unit 312 may store the filtered reconstructed blocks in the DPB 314. As discussed above, the DPB 314 may provide reference information to the prediction processing unit 304, such as samples of the current picture for intra prediction and previously decoded pictures for subsequent motion compensation. Additionally, the video decoder 300 may output decoded pictures (e.g., decoded video) from the DPB 314 for later display on a display device, such as the display device 118 of FIG. 1.

[0159]

[0164] In this manner, video decoder 300 represents an example of a video decoding device that includes a memory configured to store video data and one or more processing units implemented in circuitry configured to generate a first ordering of reference pictures in a reference picture list for a first block and to generate a second ordering of reference pictures in a reference picture list for a second block, where the first ordering differs from the second ordering.

[0160]

[0165] 5 is a flowchart illustrating an example process for encoding a current block according to the techniques of this disclosure. The current block may comprise a current CU. Although described with respect to video encoder 200 (FIGS. 1 and 3), it should be understood that other devices may be configured to perform a process similar to that of FIG.

[0161]

[0166] In this example, the video encoder 200 may first predict a current block (350). For example, the video encoder 200 may form a predictive block for the current block. The video encoder 200 may then calculate a residual block for the current block (352). To calculate the residual block, the video encoder 200 may calculate a difference between an original uncoded block and a predictive block for the current block. The video encoder 200 may then transform the residual block and quantize transform coefficients of the residual block (354). The video encoder 200 may then scan the quantized transform coefficients of the residual block (356). During or following the scan, the video encoder 200 may entropy code the transform coefficients (358). For example, the video encoder 200 may code the transform coefficients using CAVLC or CABAC. The video encoder 200 may then output entropy coded data for the block (360).

[0162]

[0167] 6 is a flowchart illustrating an example process for decoding a current block of video data in accordance with the techniques of this disclosure. The current block may comprise a current CU. Although described with respect to video decoder 300 (FIGS. 1 and 4), it should be understood that other devices may be configured to perform a process similar to that of FIG.

[0163]

[0168] The video decoder 300 may receive entropy coded data for the current block, such as the entropy coded prediction information and the entropy coded data of the transform coefficients of the residual block corresponding to the current block (370). The video decoder 300 may entropy decode the entropy coded data to determine prediction information for the current block and reconstruct the transform coefficients of the residual block (372). The video decoder 300 may predict the current block, e.g., using an intra prediction mode or an inter prediction mode as indicated by the prediction information for the current block, to compute a prediction block for the current block (374). The video decoder 300 may then inverse scan the reconstructed transform coefficients to create a block of quantized transform coefficients (376). The video decoder 300 may then dequantize the transform coefficients and apply an inverse transform to the transform coefficients to generate a residual block (378). The video decoder 300 may finally decode the current block by combining the prediction block and the residual block (380).

[0164]

[0169] 7 is a flow chart illustrating an example process for decoding a current block of video data in accordance with the techniques of this disclosure. The block may comprise a CU. Although described with respect to video decoder 300 (FIGS. 1 and 4), it should be understood that other devices may be configured to perform a process similar to that of FIG. 7. Furthermore, it should be understood that a video decoding loop of a video encoder, such as video encoder 200, may also perform the process of FIG. 7.

[0165]

[0170] In the example of Figure 7, the video decoder 300 generates a first ordering of reference pictures in a reference picture list for a first block of a slice (400). To generate the first ordering of reference pictures for the first block, the video decoder 300 may assign indexes to the reference pictures.

[0166]

[0171] The video decoder 300 decodes the first block using the first ordering of the reference pictures (402). To decode the first block using the first ordering of the reference pictures, the video decoder 300 may, for example, determine a first reference picture for the first block based on the first ordering of the reference pictures and inter-predict the first block from a block in the first reference picture. To inter-predict the first block, the video decoder 300 may, for example, determine a motion vector using AMVP and then use the motion vector to locate the predictive block in the first reference picture.

[0167]

[0172] The video decoder 300 generates a second ordering of the reference pictures in the reference picture list for the second block of the slice based on the adaptive reference picture reordering process (404). The first block and the second block may, for example, belong to the same picture or slice and may be spatially adjacent blocks. The first ordering is different from the second ordering. To generate the second ordering of the reference pictures for the second block, the video decoder 300 assigns at least some of the indexes to a reference picture different from the first ordering. In some examples, one or both of the first and second blocks may be bi-predictive blocks, in which case the video decoder 300 maintains two lists for the blocks and determines a final predicted block based on two predictive blocks from two different reference pictures.

[0168]

[0173] As described above, in some examples, the adaptive reference picture reordering process may include a template matching process. In some examples, in the case of a bi-predictive block, the adaptive reference picture reordering process may include a bilateral matching process. In some examples, the adaptive reference picture reordering process may include comparing a picture order count (POC) of a picture in a first reference picture list with a POC of a picture in a second reference picture list.

[0169]

[0174] The video decoder 300 decodes the second block using the second ordering of the reference pictures (406). To decode the second block using the second ordering of the reference pictures like the first block, the video decoder 300 may, for example, determine a second reference picture for the second block based on the second ordering of the reference pictures and inter-predict the second block from a block in the second reference picture. To inter-predict the second block, the video decoder 300 may, for example, determine a motion vector using AMVP and then use the motion vector to locate the predictive block in the second reference picture.

[0170]

[0175] To decode the second block using the second ordering of the reference pictures, the video decoder 300 may, for example, receive a first syntax element identifying a motion vector predictor, a second syntax element identifying an MVD, and a third syntax element identifying an index of the reference picture in the reference picture list. The video decoder 300 may determine a motion vector by adding the motion vector predictor to the MVD. The video decoder 300 may identify a reference picture in the reference picture list based on the index of the reference picture and the second ordering, locate a predictive block in the reference picture based on the motion vector, and decode the second block using the predictive block.

[0171]

[0176] The video decoder 300 outputs the decoded video data including the decoded versions of the first block and the second block (408). The video decoder 300 may output the pictures of the decoded video data, e.g., for storage, transmission, or display. In an example, if the process of FIG. 7 is performed by a video encoder, the video encoder may output the decoded video data for storage in a decoded picture buffer so that the decoded pictures can be used to encode other pictures of the video data.

[0172]

[0177] The following numbered clauses illustrate one or more aspects of the devices and techniques described in this disclosure.

[0173]

[0178] Clause 1A. A method for coding video data, comprising: generating a first ordering of reference pictures in a reference picture list for a first block; and generating a second ordering of reference pictures in a reference picture list for a second block, wherein the first ordering is different from the second ordering.

[0174]

[0179] Clause 2A. The method of clause 1A, wherein the first block and the second block belong to the same slice.

[0175]

[0180] Clause 3A. The method of clause 1A or 2A, wherein the first block and the second block belong to the same picture and are spatially adjacent blocks.

[0176]

[0181] Clause 4A. A method according to any of clauses 1A to 3A, wherein generating a first ordering of reference pictures for a first block includes assigning indices to the reference pictures, and generating a second ordering of reference pictures for a second block includes assigning at least some of the indices to reference pictures that differ from the first ordering.

[0177]

[0182] Clause 5A. The method of any of clauses 1A to 3A, wherein generating a first ordering of reference pictures for the first block includes assigning indices to the reference pictures, and generating a second ordering of reference pictures for the second block includes assigning at least some of the indices to reference pictures that differ from the first ordering based on whether the reference pictures are scaled or not.

[0178]

[0183] Clause 6A. The method of clause 1A, wherein generating a first ordering of reference pictures in a reference picture list for a first block includes generating the first ordering based on applying a template matching process to reference pictures in the reference picture list, and generating a second ordering of reference pictures in the reference picture list for a second block includes generating the second ordering based on applying a template matching process to reference pictures in the reference picture list.

[0179]

[0184] Clause 7A. The method of any of clauses 1A-6A, wherein the second block comprises a bi-predictive block.

[0180]

[0185] Clause 8A. The method of clause 7A, wherein the reference picture list is a first reference picture list, the method further comprising maintaining a second reference picture list.

[0181]

[0186] Clause 9A. The method of clause 8A, wherein generating a second ordering of reference pictures in the reference picture list for the second block includes comparing picture order counts (POCs) of pictures in the first reference picture list with POCs of pictures in the second reference picture list.

[0182]

[0187] Clause 10A. The method of any of clauses 1A to 9A, further comprising: determining a first reference picture for a first block based on a first ordering of reference pictures; inter-predicting the first block based on the first reference picture; determining a second reference picture for a second block based on a second ordering of reference pictures; and inter-predicting the second block based on the second reference picture.

[0183]

[0188] Clause 11A. The method of clause 10A, further including determining a sign prediction for the motion vector differential based on generating a second ordering of reference pictures in the reference picture list for the second block.

[0184]

[0189] Clause 12A. The method of any of clauses 1A to 10A, further comprising disabling symbol prediction based on a condition.

[0185]

[0190] Clause 13A. The method of any of clauses 1A-10A, further comprising, in response to the number of predicted symbols exceeding a threshold number, regularly coding subsequent symbols.

[0186]

[0191] Clause 14A. A method of coding video data, comprising: determining, for a plurality of blocks of the video data, that reference picture resampling is enabled; and determining, in response to determining that reference picture resampling is enabled, that reference picture reordering is disabled.

[0187]

[0192] Clause 15A. The method of clause 14A, wherein determining that reference picture resampling is enabled includes receiving a syntax element, and determining that reference picture reordering is disabled includes inferring that reference picture reordering is disabled based on a value of the syntax element.

[0188]

[0193] Clause 16A. The method of any one of clauses 1A to 15A, wherein coding includes encoding.

[0189]

[0194] Clause 17A. The method of any of clauses 1A to 15A, wherein the coding includes decoding.

[0190]

[0195] Clause 18A. A device for coding video data, comprising one or more means for performing the method according to any of clauses 1A to 17A.

[0191]

[0196] Clause 19A. A device as described in clause 18A, wherein the one or more means comprise one or more processors implemented in circuitry.

[0192]

[0197] Clause 20A. The device of any of clauses 18A and 19A, further comprising a memory for storing video data.

[0193]

[0198] Clause 21A. The device of any of clauses 18A to 20A, further comprising a display configured to display the decoded video data.

[0194]

[0199] Clause 22A. The device of any of clauses 18A to 21A, wherein the device comprises one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

[0195]

[0200] Clause 23A. The device of any one of clauses 18A to 22A, wherein the device comprises a video decoder.

[0196]

[0201] Clause 24A. The device of any one of clauses 18A to 23A, wherein the device comprises a video encoder.

[0197]

[0202] Clause 25A. A computer-readable storage medium having instructions stored thereon that, when executed, cause one or more processors to perform any of the methods of clauses 1A to 17A.

[0198]

[0203] Clause 1B: A method for decoding video data, the method comprising: generating a first ordering of reference pictures in a reference picture list for a first block of a slice, where generating the first ordering of reference pictures for the first block includes assigning indexes to the reference pictures; decoding the first block using the first ordering of reference pictures; generating a second ordering of reference pictures in the reference picture list for a second block of the slice based on an adaptive reference picture reordering process, where the first ordering is different from the second ordering, and generating the second ordering of reference pictures for the second block includes assigning at least some of the indexes to reference pictures that differ from the first ordering; decoding the second block using the second ordering of reference pictures; and outputting decoded video data including decoded versions of the first block and the second block.

[0199]

[0204] Clause 2B: The method described in clause 1B, wherein the adaptive reference picture reordering process includes a template matching process, and the method further includes determining a template matching cost for at least a first reference picture and a second reference picture in the reference picture list, and generating a second ordering of reference pictures in the reference picture list for a second block of the slice based on a comparison of the template matching cost for the first reference picture and the template matching cost for the second reference picture.

[0200]

[0205] Clause 3B: The method of clause 1B or 2B, wherein the adaptive reference picture reordering process includes a bilateral matching process.

[0201]

[0206] Clause 4B: A method as described in any of clauses 1B to 3B, wherein the adaptive reference picture reordering process includes comparing a picture order count (POC) of a first picture in the reference picture list with a POC of a second picture in the reference picture list.

[0202]

[0207] Clause 5B: The method according to any one of clauses 1B to 4B, wherein the first block and the second block belong to a same picture and are spatially adjacent blocks.

[0203]

[0208] Clause 6B: The method described in any of clauses 1B to 5B, wherein the second block includes a bi-predictive block, the reference picture list is a first reference picture list, and further comprising: maintaining a second reference picture list; and decoding the second block using the first reference picture list and the second reference picture list.

[0204]

[0209] Clause 7B: The method of any of clauses 1B to 6B, wherein decoding a first block using a first ordering of reference pictures includes determining a first reference picture for the first block based on the first ordering of reference pictures and inter-predicting the first block based on the first reference picture, and decoding a second block using a second ordering of reference pictures includes determining a second reference picture for the second block based on the second ordering of reference pictures and inter-predicting the second block based on the second reference picture.

[0205]

[0210] Clause 8B: The method of any of clauses 1B to 7B, further comprising determining a sign prediction of the motion vector differential based on generating a second ordering of reference pictures in the reference picture list for the second block.

[0206]

[0211] Clause 9B: The method of any of clauses 1B to 8B, further comprising receiving a first syntax element identifying a motion vector predictor, receiving a second syntax element identifying a motion vector differential, receiving a third syntax element identifying an index of a reference picture in a reference picture list, identifying a reference picture in the reference picture list based on the index of the reference picture and the second ordering, locating a predictive block in the reference picture based on the motion vector predictor and the motion vector differential, and decoding the second block using the predictive block.

[0207]

[0212] Clause 10B: The method of any of clauses 1B-9B, further comprising determining that the second block is coded using an advanced motion vector predictor mode.

[0208]

[0213] Clause 11B: The method of any of clauses 1B to 8B or 10B, wherein the decoding method is performed as part of a video encoding process.

[0209]

[0214] Clause 12B: A device for decoding video data, comprising: a memory configured to store the video data; and one or more processors implemented in circuitry configured to: generate a first ordering of reference pictures in a reference picture list for a first block of a slice, where generating the first ordering of reference pictures for the first block includes assigning indexes to the reference pictures; generate a second ordering of reference pictures in the reference picture list for a second block of the slice based on an adaptive reference picture reordering process, where the first ordering is different from the second ordering, where generating the second ordering of reference pictures for the second block includes assigning at least some of the indexes to the reference pictures that differ from the first ordering; decode the first block using the first ordering of reference pictures and decode the second block using the second ordering of reference pictures; and output decoded video data comprising decoded versions of the first block and the second block.

[0210]

[0215] Clause 13B: The device described in Clause 12B, wherein the adaptive reference picture reordering process includes a template matching process, and the one or more processors are further configured to determine a template matching cost for at least a first reference picture and a second reference picture in the reference picture list, and generate a second ordering of the reference pictures in the reference picture list for a second block of the slice based on a comparison of the template matching cost for the first reference picture and the template matching cost for the second reference picture.

[0211]

[0216] Clause 14B: The device of clause 12B or 13B, wherein the adaptive reference picture reordering process includes a bilateral matching process.

[0212]

[0217] Clause 15B: A device as described in any of clauses 12B to 14B, wherein the adaptive reference picture reordering process includes comparing a picture order count (POC) of a first picture in the reference picture list with a POC of a second picture in the reference picture list.

[0213]

[0218] Clause 16B: The device according to any one of clauses 12B to 15B, wherein the first block and the second block belong to a same picture and are spatially adjacent blocks.

[0214]

[0219] Clause 17B: A device described in any of clauses 12B to 16B, wherein the second block includes a bi-predictive block, the reference picture list is a first reference picture list, and the one or more processors are further configured to maintain a second reference picture list and decode the second block using the first reference picture list and the second reference picture list.

[0215]

[0220] Clause 18B: The device of any of clauses 12B to 17B, wherein, to decode a first block using a first ordering of reference pictures, the one or more processors are further configured to determine a first reference picture for the first block based on the first ordering of reference pictures and inter-predict the first block based on the first reference picture; and, to decode a second block using a second ordering of reference pictures, the one or more processors are further configured to determine a second reference picture for the second block based on the second ordering of reference pictures and inter-predict the second block based on the second reference picture.

[0216]

[0221] Clause 19B: A device described in any of clauses 12B to 18B, wherein the one or more processors are further configured to determine a code prediction for the motion vector differential based on generating a second ordering of reference pictures in the reference picture list for the second block.

[0217]

[0222] Clause 20B: A device described in any of Clauses 12B to 19B, wherein the one or more processors are further configured to receive a first syntax element identifying a motion vector predictor, receive a second syntax element identifying a motion vector differential, receive a third syntax element identifying an index of a reference picture in a reference picture list, identify a reference picture in the reference picture list based on the reference picture index and the second ordering, locate a predictive block in the reference picture based on the motion vector predictor and the motion vector differential, and decode a second block using the predictive block.

[0218]

[0223] Clause 21B: The device of any of clauses 1B to 202B, wherein the one or more processors are further configured to determine that the second block is encoded using an advanced motion vector predictor mode.

[0219]

[0224] Clause 22B: The device of any of clauses 12B to 21B, further comprising a wireless communication device, the device further comprising a receiver configured to receive encoded video data.

[0220]

[0225] Clause 23B: The device of clause 22B, wherein the wireless communication device comprises a telephone handset, and the receiver is configured to demodulate a signal including the encoded video data in accordance with a wireless communication standard.

[0221]

[0226] Clause 24B: The device of any of clauses 12B to 23B, further comprising a display configured to display the decoded video data.

[0222]

[0227] Clause 25B: The device of any of clauses 12B to 24B, wherein the device comprises one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

[0223]

[0228] Clause 26B: A device according to any one of clauses 12B to 25B, wherein the device is equipped with a camera.

[0224]

[0229] Clause 27B: A computer-readable storage medium storing instructions that, when executed by one or more processors, cause the one or more processors to generate a first ordering of reference pictures in a reference picture list for a first block of the slice, where generating the first ordering of reference pictures for the first block includes assigning indexes to the reference pictures, generate a second ordering of reference pictures in the reference picture list for a second block of the slice based on an adaptive reference picture reordering process, where the first ordering is different from the second ordering, where generating the second ordering of reference pictures for the second block includes assigning at least some of the indexes to reference pictures that differ from the first ordering, decode the first block using the first ordering of reference pictures, decode the second block using the second ordering of reference pictures, and output decoded video data including decoded versions of the first block and the second block.

[0225]

[0230] Clause 28B: The computer-readable storage medium of clause 27B, wherein the adaptive reference picture reordering process includes a template matching process, and the instructions further cause the one or more processors to determine a template matching cost for at least a first reference picture and a second reference picture in the reference picture list, and generate a second ordering of the reference pictures in the reference picture list for a second block of the slice based on a comparison of the template matching cost for the first reference picture and the template matching cost for the second reference picture.

[0226]

[0231] Clause 29B: The computer-readable storage medium of clause 27B or 28B, wherein the adaptive reference picture reordering process includes a bilateral matching process.

[0227]

[0232] Clause 30B: A computer-readable storage medium as described in any of clauses 27B to 29B, wherein the adaptive reference picture reordering process includes comparing a picture order count (POC) of a first picture in the reference picture list with a POC of a second picture in the reference picture list.

[0228]

[0233] Clause 31B: The computer-readable storage medium of any of clauses 27B to 30B, wherein the first block and the second block belong to a same picture and are spatially adjacent blocks.

[0229]

[0234] Clause 32B: A computer-readable storage medium described in any of clauses 27B to 31B, wherein the second block includes a bi-predictive block, the reference picture list is a first reference picture list, and the instructions further cause the one or more processors to maintain a second reference picture list and decode the second block using the first reference picture list and the second reference picture list.

[0230]

[0235] Clause 33B: A computer-readable storage medium as described in any of clauses 27B to 32B, wherein, for decoding a first block using a first ordering of reference pictures, the instructions further cause the one or more processors to determine a first reference picture for the first block based on the first ordering of reference pictures and inter-predict the first block based on the first reference picture, and for decoding a second block using a second ordering of reference pictures, the instructions further cause the one or more processors to determine a second reference picture for the second block based on the second ordering of reference pictures and inter-predict the second block based on the second reference picture.

[0231]

[0236] Clause 34B: A computer-readable storage medium as described in any of clauses 27B to 33B, wherein the instructions further cause the one or more processors to determine a code prediction for the motion vector differential based on generating a second ordering of reference pictures in the reference picture list for the second block.

[0232]

[0237] Clause 35B: A computer-readable storage medium of any of clauses 27B to 34B, wherein the instructions further cause the one or more processors to receive a first syntax element identifying a motion vector predictor, receive a second syntax element identifying a motion vector differential, receive a third syntax element identifying an index of a reference picture in the reference picture list, identify a reference picture in the reference picture list based on the reference picture index and the second ordering, locate a predictive block in the reference picture based on the motion vector predictor and the motion vector differential, and decode a second block using the predictive block.

[0233]

[0238] Clause 36B: A computer-readable storage medium according to any one of clauses 27B to 35B, wherein the instructions further cause the one or more processors to determine that the second block is encoded using an advanced motion vector predictor mode.

[0234]

[0239] Clause 37B: An apparatus for decoding video data, comprising: means for generating a first ordering of reference pictures in a reference picture list for a first block of a slice, where generating the first ordering of reference pictures for the first block includes assigning indexes to the reference pictures; means for decoding the first block using the first ordering of reference pictures; means for generating a second ordering of reference pictures in the reference picture list for a second block of the slice based on an adaptive reference picture reordering process, where the first ordering differs from the second ordering, and where generating the second ordering of reference pictures for the second block includes means for assigning at least some of the indexes to reference pictures that differ from the first ordering; means for decoding the second block using the second ordering of reference pictures; and means for outputting decoded video data including decoded versions of the first block and the second block.

[0235]

[0240] It should be appreciated that, depending on the example, certain acts or events of any of the techniques described herein may be performed in a different order, or may be added, combined, or omitted entirely (e.g., not all acts or events described may be required to practice the techniques). Moreover, in certain examples, acts or events may be performed in parallel rather than sequentially, for example, through multi-threaded processing, interrupt processing, or multiple processors.

[0236]

[0241] In one or more examples, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted via a computer-readable medium as one or more instructions or code and executed by a hardware-based processing unit. A computer-readable medium may include a computer-readable storage medium, which corresponds to a tangible medium, such as a data storage medium, or a communication medium, which includes any medium that facilitates transfer of a computer program from one place to another, for example, according to a communication protocol. As such, a computer-readable medium may generally correspond to (1) a tangible computer-readable storage medium that is non-transitory, or (2) a communication medium, such as a signal or carrier wave. A data storage medium may be any available medium that can be accessed by one or more computers or one or more processors to retrieve instructions, code, and / or data structures for implementing the techniques described in this disclosure. A computer program product may include a computer-readable medium.

[0237]

[0242] By way of example, and not limitation, such computer-readable storage media may comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, flash memory, or any other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer. Also, any connection is properly termed a computer-readable medium. For example, if instructions are transmitted from a website, server, or other remote source using coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included within the definition of medium. However, it should be understood that computer-readable storage media and data storage media do not include connections, carrier waves, signals, or other transitory media, but instead cover non-transitory tangible storage media. As used herein, disk and disc include compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk, and Blu-ray disc, where disks typically reproduce data magnetically while discs reproduce data optically using a laser. Combinations of the above should also be included within the scope of computer readable media.

[0238]

[0243] The instructions may be executed by one or more processors, such as one or more DSPs, general-purpose microprocessors, ASICs, FPGAs, or other equivalent integrated or discrete logic circuits. Thus, the terms "processor" and "processing circuitry" as used herein may refer to any of the above structures, or any other structures suitable for implementing the techniques described herein. In addition, in some aspects, the functionality described herein may be provided within dedicated hardware and / or software modules configured for encoding and decoding, or may be incorporated into a combined codec. The techniques may also be fully implemented in one or more circuits or logic elements.

[0239]

[0244] The techniques of this disclosure may be implemented in a wide variety of devices or apparatuses, including a wireless handset, an integrated circuit (IC), or a set of ICs (e.g., a chipset). Various components, modules, or units are described in this disclosure to highlight functional aspects of devices configured to perform the disclosed techniques, but they do not necessarily require realization by different hardware units. Rather, as described above, the various units may be combined in a codec hardware unit or may be provided by a collection of interoperable hardware units, including one or more processors as described above, in conjunction with suitable software and / or firmware.

[0240]

[0245] Various examples have been described. These and other examples are within the scope of the following claims.

Claims

1. 1. A method for decoding video data, comprising: generating a first ordering of reference pictures in a reference picture list for a first block of a slice, and generating the first ordering of the reference pictures for the first block includes assigning indexes to the reference pictures. decoding the first block using the first ordering of the reference pictures; generating a second ordering of the reference pictures in the reference picture list for a second block of the slice based on an adaptive reference picture reordering process, the first ordering being different from the second ordering, and generating the second ordering of reference pictures for the second block includes assigning at least some of the indexes to reference pictures different from the first ordering, the adaptive reference picture reordering process including a template matching process, the method comprising: determining a template matching cost for at least a first reference picture and a second reference picture in the reference picture list; generating the second ordering of the reference pictures in the reference picture list for the second block of the slice based on a comparison of a template matching cost for the first reference picture and a template matching cost for the second reference picture; Further comprising: decoding the second block using the second ordering of the reference pictures; and outputting decoded video data including decoded versions of the first block and the second block; A method comprising:

2. The method of claim 1 , wherein the first block and the second block belong to the same picture and are spatially adjacent blocks.

3. the second block comprises a bi-predictive block, the reference picture list is a first reference picture list, and the method further comprises: maintaining a second reference picture list; decoding the second block using the first reference picture list and the second reference picture list; The method of claim 1 further comprising:

4. Decoding the first block using the first ordering of the reference pictures includes: determining a first reference picture for the first block based on the first ordering of the reference pictures; inter-predicting the first block based on the first reference picture; Decoding the second block using the second ordering of the reference pictures includes: determining a second reference picture for the second block based on the second ordering of the reference pictures; and inter predicting the second block based on the second reference picture. The method of claim 1.

5. determining a sign prediction for a motion vector differential based on the generating a second ordering of the reference pictures in the reference picture list for the second block; The method of claim 1 further comprising:

6. receiving a first syntax element identifying a motion vector predictor; receiving a second syntax element identifying a motion vector differential; receiving a third syntax element identifying an index of a reference picture in the reference picture list; identifying a reference picture in the reference picture list based on the index of the reference picture and the second ordering; locating a prediction block in the reference picture based on the motion vector predictor and the motion vector differential; decoding the second block using the predicted block; and The method of claim 1 further comprising:

7. determining that the second block is coded using an advanced motion vector predictor mode; The method of claim 1 further comprising:

8. The method of claim 1 , wherein the decoding method is performed as part of a video encoding process.

9. 1. A device for decoding video data, comprising: a memory configured to store video data; and one or more processors implemented in circuitry, said one or more processors: generating a first ordering of reference pictures in a reference picture list for a first block of a slice, and generating the first ordering of the reference pictures for the first block includes assigning indexes to the reference pictures. generating a second ordering of the reference pictures in the reference picture list for a second block of the slice based on an adaptive reference picture reordering process, the first ordering being different from the second ordering, and generating the second ordering of reference pictures for the second block including assigning at least some of the indexes to reference pictures different from the first ordering, the adaptive reference picture reordering process including a template matching process, and the one or more processors: determining a template matching cost for at least a first reference picture and a second reference picture in the reference picture list; generating the second ordering of the reference pictures in the reference picture list for the second block of the slice based on a comparison of a template matching cost for the first reference picture and a template matching cost for the second reference picture; decoding the first block using the first ordering of the reference pictures; decoding the second block using the second ordering of the reference pictures; and outputting decoded video data including decoded versions of the first block and the second block; configured to: device.

10. The device of claim 9 , wherein the first block and the second block belong to the same picture and are spatially adjacent blocks.

11. the second block comprises a bi-predictive block, the reference picture list is a first reference picture list, and the one or more processors: maintaining a second reference picture list; The device of claim 9 , further configured to: decode the second block using the first reference picture list and the second reference picture list.

12. To decode the first block using the first ordering of the reference pictures, the one or more processors: determining a first reference picture for the first block based on the first ordering of the reference pictures; further configured to inter-predict the first block based on the first reference picture; To decode the second block using the second ordering of the reference picture, the one or more processors: determining a second reference picture for the second block based on the second ordering of the reference pictures; The device of claim 9 , further configured to inter-predict the second block based on the second reference picture.

13. the one or more processors 10. The device of claim 9, further configured to determine a sign prediction for a motion vector differential based on the generating the second ordering of the reference pictures in the reference picture list for the second block.

14. the one or more processors receiving a first syntax element identifying a motion vector predictor; receiving a second syntax element identifying a motion vector differential; receiving a third syntax element identifying an index of a reference picture in the reference picture list; identifying a reference picture in the reference picture list based on the index of the reference picture and the second ordering; locating a prediction block in the reference picture based on the motion vector predictor and the motion vector differential; The device of claim 9 , further configured to decode the second block using the predicted block.

15. 9. A computer readable storage medium storing instructions that, when executed by one or more processors, cause the one or more processors to perform the method of any one of claims 1 to 8.