Adaptive adjustment of boost converter input current limit

Abstract

Apparatus and techniques for adaptively adjusting an input current limit of a boost converter that supplies power to a load, such as an amplifier. An exemplary circuit for supplying power generally includes a boost converter having an output coupled to the load, and logic configured to adaptively adjust the input current limit of the boost converter and apply the input current limit to the boost converter based on an estimated output power of the boost converter. One exemplary method for supplying power generally includes converting an input voltage to an output voltage by a boost converter to power a load for the boost converter, adaptively adjusting the input current limit of the boost converter based on the estimated output power of the boost converter, and applying the input current limit to the boost converter during conversion.

Description

[Technical field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims the benefit of and priority to U.S. Patent Application No. 17 / 699,902, filed March 21, 2022, which is incorporated by reference herein in its entirety.

[0002] Several aspects of the present disclosure relate generally to electronic circuits, and more particularly, to power supply circuits that include a boost converter. [Background technology]

[0003] A speaker is a transducer that generates pressure waves in response to an input electrical signal, thus producing sound. The speaker input signal may be generated by an audio amplifier (also called a "power amplifier"), which receives a relatively low-voltage analog audio signal and produces an amplified (with a relatively high voltage) signal to drive the speaker. Dynamic loudspeakers typically consist of a lightweight diaphragm (cone) connected to a rigid basket (frame) via a flexible suspension (often called a "spider") that constrains the voice coil to move axially through a cylindrical magnetic gap. When an input electrical signal is applied to the voice coil, a magnetic field is generated by the current in the coil, thereby forming a linear electric motor. By varying the electrical signal from the audio amplifier, the mechanical force generated by the interaction between the magnet and the voice coil is modulated, causing the cone to move back and forth, thereby producing pressure waves that are interpreted as sound.

[0004] An amplifier (such as an audio amplifier) ​​may be powered by a voltage regulator such as a boost converter. For example, a boost converter is a type of switched mode power supply (SMPS) for stepping up a voltage (and stepping down a current) from an input to an output. A boost converter may be used to step up an input voltage (e.g., from a battery) to generate a larger output voltage that may be supplied to a device such as an amplifier. A boost converter typically includes (1) an inductor coupled between an input supply node and a switching node, (2) a switch coupled between the switching node and a reference potential node, and (3) another switch (or diode) coupled between the switching node and a load (e.g., represented by a shunt capacitive element). The switch is typically implemented using a power transistor.

[0005] A voltage regulator (e.g., a boost converter) may be controlled by (or at least partially contained within) a power management integrated circuit (power management IC or PMIC). A PMIC may be used to manage the power requirements of a host system and may be used in battery-operated devices such as cell phones, tablets, laptops, wearables, etc. to control the flow and direction of power within the device. A PMIC may perform a variety of functions for the device, such as DC-DC conversion (e.g., using a voltage regulator as described above), battery charging, power source selection, voltage scaling, power sequencing, etc. Summary of the Invention

[0006] The systems, methods, and devices of the present disclosure each have several aspects, no one of which is solely responsible for its desirable attributes. Without limiting the scope of the present disclosure as expressed by the following claims, several features will now be briefly discussed. After considering this discussion, and in particular after reading the section entitled "Description of the Preferred Embodiments," one will understand how the features of the present disclosure provide the advantages described herein.

[0007] Certain aspects of the present disclosure generally relate to apparatus and techniques for adaptively adjusting an input current limit of a boost converter.

[0008] Certain aspects of the present disclosure are directed to a method of supplying power that generally includes converting an input voltage to an output voltage by a boost converter to power a load for the boost converter, adaptively adjusting an input current limit of the boost converter based on an estimated output power of the boost converter, and applying the input current limit to the boost converter during conversion.

[0009] Certain aspects of the present disclosure are directed to a circuit for powering a load. The circuit generally includes logic and a boost converter having an output coupled to the load. The logic is generally configured to adaptively adjust an input current limit of the boost converter based on an estimated output power of the boost converter and to apply the input current limit to the boost converter.

[0010] Certain aspects of the present disclosure are directed to an apparatus for providing power that generally includes means for converting an input voltage to an output voltage greater than the input voltage to power a load for the means for converting, means for adaptively adjusting an input current limit of the means for converting based on an estimated output power of the means for converting, and means for applying the input current limit to the means for converting.

[0011] To the accomplishment of the foregoing and related ends, the one or more aspects comprise the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative features of the one or more aspects. These features are indicative, however, of only a few of the various ways in which the principles of the various aspects may be employed.

[0012] So that the above-mentioned features of the present disclosure may be understood in detail, a more particular description thereof, briefly summarized above, may be had by reference to the embodiments, some of which are illustrated in the accompanying drawings, in which it is to be noted, however, that the accompanying drawings show only certain exemplary embodiments of the present disclosure, and therefore should not be considered as limiting the scope of the present disclosure, since the present description may admit of other equally effective embodiments. [Brief description of the drawings]

[0013] [Figure 1] FIG. 1 shows a block diagram of an example device including a switched mode power supply (SMPS) circuit in which aspects of the disclosure may be implemented. [Diagram 2] FIG. 1 is a block diagram of an example audio system in which aspects of the present disclosure may be implemented. [Figure 3A] FIG. 1 is a block diagram of an example power supply circuit with a boost converter and a feedback control circuit in which aspects of the present disclosure may be implemented. [Figure 3B] 3B illustrates an example implementation of the feedback control circuit of FIG. 3A in which aspects of the present disclosure may be implemented. [Figure 4A] FIG. 2 is a block diagram of an example power supply circuit including a boost converter and capable of adaptively adjusting an input current limit of the boost converter in accordance with some aspects of the disclosure. [Figure 4B] 4B illustrates an example implementation of the boost converter and logic of FIG. 4A in accordance with certain aspects of the disclosure. [Figure 5A] 4C is a plot of the input current limit over time of the boost converter of FIG. 4B based on the frequency of the input signal for an amplifier powered by the boost converter in accordance with some aspects of the disclosure. [Figure 5B] 4C is a plot of the input current limit over time of the boost converter of FIG. 4B based on the frequency of the input signal for an amplifier powered by the boost converter in accordance with some aspects of the disclosure. [Figure 6]4C is a graph illustrating an example input current limit of the boost converter of FIG. 4B versus frequency at various output power levels in accordance with some embodiments of the disclosure. [Figure 7] 4 is a flow diagram of an example operation for providing power according to some aspects of the disclosure.

[0014] For ease of understanding, the same reference numbers have been used, where possible, to designate identical elements common to the figures. It is contemplated that elements disclosed in one embodiment may be beneficially utilized on other embodiments without specific recitation. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] Certain aspects of the present disclosure provide circuits and techniques for dynamically adjusting the input current limit of a boost converter. Such circuits and techniques can reduce power losses and thereby improve the efficiency of the boost converter.

[0016] Various aspects of the present disclosure will now be described more fully with reference to the accompanying drawings. However, the present disclosure may be embodied in many different forms and should not be construed as limited to any specific structure or function presented throughout the present disclosure. Rather, these aspects are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art. Based on the teachings herein, those skilled in the art will understand that the scope of the present disclosure is intended to encompass all aspects of the present disclosure disclosed herein, regardless of whether they are implemented independently of or in combination with any other aspects of the present disclosure. For example, an apparatus can be implemented or a method can be practiced using any number of the aspects described herein. In addition, the scope of the present disclosure is intended to encompass such an apparatus or method that is practiced using other structures, functions, or structures and functions in addition to or other than the various aspects of the present disclosure described herein. It will be understood that any aspect of the present disclosure disclosed herein can be embodied by one or more elements of a claim.

[0017] As used herein, the term "connected with" in various tenses of the verb "connect" can mean that element A is directly connected to element B, or that other elements may be connected between element A and element B (i.e., element A is indirectly connected to element B). In the case of electrical components, the term "connected with" can also be used herein to mean electrically connecting element A and element B (and any components electrically connected between them) using a wire, trace, or other conductive material. Exemplary Devices and Audio Systems

[0018] 1 illustrates an example device 100 in which aspects of the disclosure may be implemented. Device 100 may be a battery-operated device such as a cellular telephone, a personal digital assistant (PDA), a handheld device, a wireless device, a laptop computer, a tablet, a smartphone, a wearable device, etc.

[0019] The device 100 may include a processor 104 that controls the operation of the device 100. The processor 104 may also be referred to as a central processing unit (CPU). The memory 106 may include both read-only memory (ROM) and random access memory (RAM) and provides instructions and data to the processor 104. A portion of the memory 106 may also include non-volatile random access memory (NVRAM). The processor 104 typically performs logical and arithmetic operations based on program instructions stored in the memory 106.

[0020] In some aspects, the device 100 also includes a housing 108 that may include a transmitter 110 and a receiver 112 to enable transmission and reception of data between the device 100 and a remote location. In some aspects, the transmitter 110 and the receiver 112 may be combined into a transceiver 114. One or more antennas 116 may be attached to or otherwise coupled to the housing 108 and electrically connected to the transceiver 114. The device 100 may also include multiple transmitters, multiple receivers, and / or multiple transceivers (not shown).

[0021] The device 100 may also include a signal detector 118 that may be used to detect and quantify the level of signals received by the transceiver 114. The signal detector 118 may detect such signal parameters as total energy, energy per subcarrier per symbol, and power spectral density, among others. The device 100 may also include a digital signal processor (DSP) 120 for use in processing the signals.

[0022] The device 100 may further include a battery 122 used to power various components of the device 100. The device 100 may also include a power management integrated circuit (power management IC or PMIC) 124 for managing power from the battery to various components of the device 100. The PMIC 124 may perform various functions for the device, such as DC-DC conversion, battery charging, power source selection, voltage scaling, power sequencing, etc. In some aspects, the PMIC 124 may include at least a portion of a power supply circuit, which may include a switch mode power supply circuit 125. The switch mode power supply circuit 125 may be implemented by any of a variety of suitable switch mode power supply circuit topologies, such as a boost converter. In some aspects, the power supply circuit may include a boost converter circuit having a feedback control circuit, as described below. Among other functions, the feedback control circuit may be used to adaptively adjust an input current limit of the boost converter circuit, as described below.

[0023] Device 100 may further include one or more speakers (not shown) for converting electrical signals into audio signals, in which case device 100 may include one or more amplifiers for driving the speaker(s), which may be powered by one or more power supply circuits that may be part of the PMIC or receive power supply voltage rails generated by the PMIC.

[0024] The various components of the device 100 may be coupled together by a bus system 126, which may include a power bus, a control signal bus, and / or a status signal bus in addition to a data bus.

[0025] FIG. 2 is a block diagram of an example audio system 200 in which aspects of the disclosure may be implemented. The audio system 200 may be incorporated into any of a variety of suitable devices, such as the device 100. As shown, a digital signal processor (DSP) 202 may receive and process an audio signal 214 (e.g., a digital audio signal), for example, by applying a digital filter aimed at improving audio quality and / or adjusting certain audio characteristics. A processed digital signal 218 (or a further processed version of that signal) generated by the DSP may be converted to an analog signal 220 using a digital-to-analog converter (DAC) 208. In some aspects, the DAC 208 may be implemented as part of the DSP 202. The analog signal 220 may be amplified using an amplifier 210 to generate an amplified signal 222. For example, the amplifier 210 may be a switching amplifier, such as a class D amplifier. The amplified signal 222 may drive a speaker 212 to generate an acoustic output 224 (e.g., sound waves). The power supply voltage for amplifier 210 (V supply ) may be generated by a switching power supply 230 (eg, a switched mode power supply circuit 125).

[0026] As described herein, the switching power supply 230 may include a boost converter and logic configured to adaptively adjust an input current limit of the boost converter. Example Boost Converter Circuit with Feedback Control

[0027] FIG. 3A illustrates an example power supply circuit 300 (also referred to herein as a “boost converter circuit”) in which aspects of the disclosure may be implemented. The power supply circuit 300 is implemented with a boost converter including an inductive element 302 (e.g., inductor L1) and a switch 306 coupled to a node 304 (also referred to as a “switching node”). The power supply circuit 300 also includes a switch 308 coupled between the node 304 and an output node 310 of the boost converter. The switches 306 and / or 308 may each be implemented by one or more transistors, as shown in FIG. 3A, which may be n-type field-effect transistors (NFETs) or p-type field-effect transistors (PFETs). For example, while the switch 308 is illustrated in FIG. 3A as being implemented by a PFET, the reader should understand that the switch 308 may be implemented as an NFET in other embodiments, in which case the gate drive polarity may be reversed. The output node 310 is connected to an energy storage device (e.g., a capacitor C boost 3B ) and an amplifier (e.g., amplifier 210) in FIG. 3A and a resistor R load and a load represented by

[0028] The switch 306 switches the voltage across the capacitive element 312 (i.e., the voltage V boost_out ) can be controlled by a pulse width modulation (PWM) signal to open and close the switch 306 in order to regulate the voltage V at the input node 309. For example, during a first period, the switch 306 is closed and in and series resistance R s3. The switch 306 may transfer energy from an input voltage source 318 (having a voltage between 0 and 1 V) and store the energy in the inductive element 302. The switch 306 may be opened during a second period of time to transfer the energy stored in the inductive element 302 to the capacitive element 312 via the switch 308. In some aspects, the switch 308 may be replaced with a diode 316 and the energy stored in the inductive element 302 may be transferred to the capacitive element 312 via the diode 316.

[0029] As shown, power supply circuit 300 also includes a current-mode feedback control circuit 314 having an input coupled to output node 310 and having an output coupled to the control input of switch 306 (and possibly the control input of switch 308). Feedback control circuit 314 controls the voltage V at output node 310. boost_out and the current through switch 306. For example, feedback control circuit 314 may generate a current sense signal I sense I sense I also represents the current through the inductive element 302 during the first period when the switch 306 is closed. In some cases, however, the feedback control circuit 314 may directly sense the current through the inductive element 302. sense and V boost_out Based on this, the feedback control circuit 314 may control the current through the inductive element 302 by controlling the duty cycle of the PWM signal used to drive the switch 306 (and switch 308).

[0030] 3B illustrates an example implementation of the feedback control circuit 314 of FIG. 3A in accordance with some aspects of the disclosure. As shown, the feedback control circuit 314 includes an amplifier 352 (e.g., a transconductance (Gm) amplifier) ​​having a negative input coupled to a tap 357 of a voltage divider 354. The voltage divider 354 outputs a voltage V boost_outThus, amplifier 352 couples the stepped-down voltage at tap 357 to a reference voltage source ("V ref " and coupled to the positive input of the amplifier to generate an output current. The output of amplifier 352 may be coupled to an impedance 353 that may be used to convert the output current of amplifier 352 to a voltage. In some embodiments, impedance 353 may be coupled to a capacitor C c A resistor R in series with c It can be implemented using

[0031] The output of amplifier 352 may provide an output voltage at node 355, which may affect the duty cycle of the boost converter. Feedback control circuit 314 may also include a comparator 356 (e.g., a signal comparator) having an input coupled to the output of amplifier 352. Another input of comparator 356 is connected to I sense For example, the current I sense (e.g., "R i " to a current sense voltage via a current sense circuit 358 (which may include a current-to-voltage converter labeled "Current-Sense Voltage Converter"). In some aspects, a compensation ramp signal may be combined with (e.g., added to) the current sense voltage for slope compensation and to stabilize the current loop feedback.

[0032] In some aspects, the feedback control circuit 314 may be configured to control a comparator 376 (e.g., a maximum current (I max ) comparator) and the maximum current reference voltage (I max_ref ) (i.e., a reference voltage representative of a maximum input current for the boost converter). A comparator 376 generates I sense For example, the current I sense (e.g., "R snsThe sensed current (I sense ) is greater than a threshold current (eg, a maximum input current, also called an "input current limit"), a logic high signal can be effectively output.

[0033] In some aspects, the feedback control circuit 314 also includes a flip-flop 360 (e.g., a set-reset (SR) flip-flop) for outputting a PWM signal at an output Q to control the switch 306 (and switch 308). For example, a set (S) input of the flip-flop 360 may be coupled to an output of a pulse generator 364, and a reset (R) input of the flip-flop 360 may be coupled to an output of a logic OR gate 377 having inputs coupled to the outputs of the comparator 356 and the comparator 376. The pulse generator 364 may generate a pulse signal for driving the S input of the flip-flop 360. The pulse signal may have a periodic waveform with a duty cycle of, for example, about 1% to 2%. In this manner, the duty cycle of the PWM signal output by the flip-flop 360 may be set to a value equal to or greater than I. sense and V boost_out is controlled based on Example Boost Converter Circuit with Dynamic Input Current Limit Control

[0034] A boost converter (such as the boost converter of FIGS. 3A and 3B) may be configured to convert an input voltage (e.g., from a battery in a portable device) to an output voltage by drawing an input current from the input voltage source to generate a desired output power. In some cases, this input current is reduced to a constant value (e.g., I ) determined by the maximum current allowed from the input source (e.g., a battery) for a particular application. max_refThat is, the input current limit may be set based on the peak output power. The input current of the boost converter may be clamped to the input current limit whenever the boost converter attempts to exceed the input current limit. If the output voltage can be allowed to droop slightly, it may be possible to increase the efficiency of the boost converter and still provide sufficient headroom for the load.

[0035] Some aspects of the present disclosure provide techniques and apparatus for adaptively adjusting an input current limit of a boost converter based on an estimated power (e.g., average expected output power) of the boost converter. In some aspects, the input current limit may be based on a frequency of an input signal to a load being powered by the boost converter. The input current limit may be determined before an input signal peak occurs (and is held). Adaptively adjusting the input current limit based on the estimated power may reduce conduction losses in the boost converter (e.g., through switches 306 and / or 308), thereby improving the efficiency of the boost converter.

[0036] 4A is a block diagram of an example power supply circuit 400 in accordance with some aspects of the disclosure. The power supply circuit 400 can generally include a boost converter 410, a delay element 420, a supply reference generator 430, logic 440, and an amplifier 450. The power supply circuit 400 includes an input current limit (I lim ) can be adaptively adjusted. In other words, if the input current is kept at a constant maximum value (e.g., I max_ref ), the input current is limited by the input voltage (V in ") and a value based on the estimated output power (e.g., average predicted output power) (e.g., I lim ) In some aspects, the input current limit may also be adaptively adjusted based on the frequency content of the input signal being amplified. Although FIG. 4A includes a boost converter 410, the reader should understand that some aspects of the disclosure may be applied to other switched mode power supplies, such as a buck converter.

[0037] The delay element 420 may be implemented by any of a variety of suitable components that add delay to a signal, such as one or more buffers, one or more inverters, or a combination thereof. The delay element 420 may be implemented as a separate component (as shown in FIG. 4A ) or as part of another digital component (e.g., logic 440 or DSP 120). The delay element 420 may receive an input signal (e.g., a digital input signal) at an input node (labeled “D_in”). For example, the input signal may be a digital audio signal output by a DSP (e.g., DSP 120 of FIG. 1 or DSP 202 of FIG. 2 ). The delay element 420 may be configured to delay the input signal by a delay time to generate a delayed version of the input signal at the output of the delay element. By delaying the input signal, the delay element 420 allows the logic 440 to effectively implement a look-ahead function (e.g., a predicted output power of the boost converter) and adjust the input current limit (I ) of the boost converter 410 based on this predicted output power of the boost converter 410. lim ) may be adaptively adjusted. Adaptively adjusting the input current limit of boost converter 410 may be performed continuously and may be based on a point in the input signal before amplifier 450 amplifies the point in the input signal (or in this case a delayed version thereof).

[0038] 4A, it is understood that a DAC (e.g., DAC 208) may be present between the output of the delay element 420 and the input of the amplifier 450. Such a DAC may be used to convert a delayed version of a digital input signal to an analog signal that is amplified by the amplifier 450. In other aspects, the DAC may be considered to be part of the delay element 420 or part of the amplifier 450.

[0039] The supply reference generator 430 has a first input coupled to the input node D_in, a second input coupled to the output of the delay element 420, and a reference voltage Vref of the boost converter 410 ("V ref"). The supply reference generator 430 compares signals at the first and second inputs (e.g., an input signal at D_in and a delayed input signal) and provides a reference voltage V to the boost converter 410 based on the comparison. ref For example, supply reference generator 430 may be configured to provide boost converter 410 with an output voltage at the output of boost converter 410 ("V") to provide sufficient headroom for amplifier 450 to generate an amplified signal by amplifying the delayed input signal based on the larger of the voltages at the first and second inputs of supply reference generator 430. boost_out ") at the voltage level that generates the reference voltage V ref The signal processing unit may be configured to generate

[0040] The boost converter 410 may be similar to the boost converter in the power supply circuit 300 of FIGS. 3A and 3B, but includes an input current limit (I lim ). The boost converter 410 may have an output coupled to a power supply input of a load (e.g., amplifier 450). In some aspects, amplifier 450 may be similar to amplifier 210 of FIGS. 2 and 3A and may function as (or include) a speaker driver, a headphone amplifier, or another type of amplifier (e.g., not related to audio signals). In other aspects, amplifier 450 may include additional components and implement additional functions, such as digital-to-analog conversion by a DAC (e.g., DAC 208 of FIG. 2). Amplifier 450 may couple a delayed version of the input signal to an output node ("V out "). In some aspects, the amplifier 450 may include a speaker driver and the input signal may include an audio signal (e.g., a delayed digital audio signal).

[0041] Logic 440 (also referred to as a “logic circuit”) may have a first input coupled to input node D_in and an input of delay element 420, and an output coupled to a control input of boost converter 410. Logic 440 may determine an input current limit (I lim ) and apply an input current limit to the boost converter 410. The estimated power may be an estimated output power or an estimated input power, where the estimated input power is equal to the estimated output power divided by the efficiency (η). In some aspects, the logic 440 may also be configured to determine an average expected output (or input) power of the boost converter 410 as the estimated power. In some aspects, the estimated power may be determined based on the power level and frequency content of the input signal amplified by the amplifier 450 (or at least a delayed version thereof).

[0042] FIG. 4B illustrates an example implementation of the boost converter 410 and logic 440 of FIG. 4A in accordance with some aspects of the disclosure.

[0043] The boost converter 410 may be similar to the boost converter in the power supply circuit 300 of FIGS. 3A and 3B, but has an input current limit (I lim , or indeed in this implementation, "I lim_ref As shown, the boost converter 410 has a reference voltage V ref The output of the amplifier 352 may affect the duty cycle of the boost converter 410 (as described above with respect to FIG. 3B).

[0044] As shown, the boost converter 410 may include a transistor (implementing the switch 306) and a current sense circuit having an input coupled to a branch of the boost converter 410 with the transistor. The boost converter 410 also has a first input (e.g., the positive terminal of the comparator 376) coupled to an output of the current sense circuit, and an output of logic 440 (e.g., I lim_ref ), and an output coupled to the control input of the transistor (e.g., via other logic components as described with respect to FIG. 3B ).

[0045] The power supply circuit 400 also supplies the input voltage (V in ) and provide the sampled voltage to logic 440. In some aspects, the input voltage V in is the battery voltage (e.g., V bat Logic 440 may be configured to calculate the estimated output power of boost converter 410 and the input voltage V in and may be configured to adaptively adjust the input current limit based on (as described in more detail below).

[0046] The logic 440 may generally include circuitry for calculating an input current limit for the boost converter 410. In a first squaring stage 441, the logic 440 may be configured to square samples (instances) of a digital input signal (e.g., “Data 1”, “Data 2”, etc.). In a summing stage 442, the logic 440 may take the sum of the squared samples.

[0047] Logic 440 may include a multiplexer 443 having a plurality of data inputs coupled to samples (sometimes called “taps” or “data points”) of a digital input signal and a control input (labeled “Tap_sel”). The value of the control input may be preselected or programmable. Multiplexer 443 may be configured to select one of the input signal samples for output based on the control input Tap_sel. In some cases, Tap_sel may indicate that multiplexer 443 selects a portion of the input signal sample above a threshold frequency (e.g., Tap_sel may indicate a cutoff frequency for filtering out a portion of the input signal, such as a high frequency portion). In a second squaring stage 444, logic 440 may be configured to square the output of multiplexer 443. In a subtraction stage 445, logic 440 may be configured to subtract the squared output of multiplexer 443 from the sum of the squared input signal samples (e.g., the output of summation stage 442). Thus, subtraction stage 445 may act as a filter by filtering out a portion of the input signal samples selected by multiplexer 443. In some cases (e.g., when high frequency portions of the input signal samples are filtered out), subtraction stage 445 may act as a low pass filter. The output of subtraction stage 445 may be referred to as the filtered input signal.

[0048] The logic 440 calculates the mean square value of the input signal

[0049]

number

[0050] That is, stage 446 may be configured to divide the sum of the squared input signal voltages (e.g., the output of summation stage 442) by the number of input signal samples actually used. In some cases, logic 440 may be configured to determine the mean square value of the filtered input signal (e.g., the output of subtraction stage 445) as the mean square value of the input signal.

[0051] Logic 440 may further include a stage 447 for calculating an estimated input (or output) power of power supply circuit 400 based on the mean square value of the input signal (e.g., the output of stage 446), the gain of amplifier 450, and the resistance of the load (e.g., the resistance of speaker 212, which may in some cases be added to the resistance of the output stage of amplifier 450). Stated differently, stage 447 may be configured to calculate an estimated output power (e.g., the output power of a 50% duty cycle square wave) as follows:

[0052]

number

[0053] Here, the formula

[0054]

number

[0055] is the filtered mean square value of the input signal output from stage 446 (e.g., the processed value of the input signal from input node D_in), Gain is the gain of amplifier 450, and R is the impedance of the load (e.g., the output resistance of amplifier 450 and the speaker resistance).

[0056] The efficiency (Eff or η) of the power supply circuit 400 (eg, including the efficiency of the boost converter 410 and the efficiency of the amplifier 450) may be calculated as follows:

[0057]

number

[0058] Here, Power in is the estimated input power of the power supply circuit 400, and Power out is the estimated output power of the power supply circuit 400. In some cases, the efficiency of the power supply circuit 400 may be known. Thus, stage 447 may divide the estimated output power by the efficiency of at least one of the boost converter 410 or the load (e.g., amplifier 450) to generate the estimated input power. In other words, stage 447 may calculate the estimated input power as follows:

[0059]

number

[0060] In stage 448, logic 440 multiplies the estimated input power by the sampled input voltage (V in ) to determine the input current limit of the boost converter 410. In other words, the logic 440 calculates the input current as follows:

[0061]

number

[0062] Input current limit I in In this manner, logic 440 can adaptively calculate the input current limit based on the power output by amplifier 450. in is the battery voltage (e.g., V bat ).

[0063] In some cases, logic 440 may include a step of calculating the estimated input power Power in is the input voltage V inIt may further be configured to add some margin to the result of division by . For example, since the input current limit may be determined based on the average expected output power, the margin may include a ripple value to account for the inductor current ripple at the converter output.

[0064] In some aspects, logic 440 may be further configured to hold the input current limit for a hold time before applying the input current limit to boost converter 410. The hold time may be designed to prevent the input current limit (and available converter output power) from decreasing before the peak of the amplifier input signal is reached. The hold time may be preset or programmable and may be based on the amount of look-ahead available (e.g., the delay time provided by delay element 420).

[0065] The samples of the digital input signal during a given time window may be continually updated, and logic 440 may continue to operate on the updated samples. In this manner, logic 440 may continually determine the average expected output power as the time window is moved sample by sample.

[0066] Logic 440 (e.g., stage 448) may be further configured to limit the input current limit to at least one of an upper limit of a maximum input current limit or a lower limit of a minimum input current limit (further described with respect to FIG. 6 ) before applying the input current limit to the boost converter 410.

[0067] As mentioned above, logic 440 (e.g., stage 448) controls the input current limit (I lim ) to a corresponding voltage (e.g., I lim_ref ) can be converted to

[0068] In situations where the input current limit is selected based on the average expected output power, the limited input current may not always be sufficient to prevent the output signal from sagging. For example, in some cases, the input signal contains relatively high frequencies (e.g., ≥ 1 kHz). In this case, the output capacitor at the output of the boost converter (e.g., C boost ) may be able to provide sufficient auxiliary current at the output to prevent a sagging of the output voltage signal. However, in situations where the input signal includes a relatively low frequency (e.g., <1 kHz, such as about 200 Hz), the output capacitor may not be able to provide enough current, which may result in a sagging of the output voltage signal.

[0069] Accordingly, some aspects of the present disclosure provide methods for adjusting an input current limit of a boost converter based on the frequency content and the estimated power of the input signal to be amplified by the amplifier. In these aspects, the input current limit may be based on the average expected output power when the input signal includes relatively high frequency content, but may be based on the instantaneous peak power when the input signal includes relatively low frequency content.

[0070] 5A and 5B are plots over time of the input current limit 515 of the boost converter of FIG. 4B based on the frequency of the input signal for an amplifier powered by the boost converter, according to some aspects of the disclosure. Signal 510 shows an example instantaneous input current signal. Signal 505 shows an example filtered input current signal, representing a low-pass filtered version of the instantaneous input current signal 510. Signal 520 shows an example voltage signal at the output of amplifier 450.

[0071] Plot 500A of FIG. 5A illustrates a situation where the input signal includes relatively low frequencies. In this case, the filtered input current signal 505 and the instantaneous input current signal 510 may closely track each other, as shown. Again, the input current limit 515 may be based on an estimated instantaneous peak output power of the boost converter. As shown, the input current limit 515 may precede the instantaneous input current signal 510 such that the peak of the input current limit 515 may be calculated and provided before the instantaneous input current signal 510 reaches its peak value.

[0072] In some aspects, logic (e.g., logic 440) may be configured to hold the input current limit 515 at a value for a hold time (e.g., hold time 525). The hold time 525 may be based on a delay time before the input current limit 515 is applied to the boost converter (e.g., based on a look-ahead time provided by delay element 420). In some cases, the hold time 525 may be approximately equal to the amount of the delay time or slightly longer than the amount of the delay time.

[0073] Plot 500B of Figure 5B illustrates a situation where the input signal includes a relatively high frequency. In this case, the input current limit 515 may be based on the average expected output power of the boost converter (the calculations for which are described above with respect to Figure 4B). For example, as shown, the input current limit 515 may have a constant (or at least approximately constant) value 530 based on the average expected output power of the boost converter.

[0074] As shown, in some cases, the instantaneous input current signal 510 may exceed the input current limit 515. However, as discussed above, the output capacitor at the output of the boost converter (e.g., C boost ) may provide enough boosted output current to compensate for the difference between the value of the instantaneous input current signal 510 and the value of the input current limit 515 during these instances so that the output voltage signal 520 may remain sinusoidal (e.g., without sagging).

[0075] 6 is a graph 600 illustrating an example input current limit of the boost converter of FIG. 4B versus frequency at various output power levels, according to some aspects of the disclosure. Each curve of graph 600 illustrates an example input current limit as a function of frequency for a boost converter providing a different output power level. For example, curve 610 may represent the input current limit versus frequency for a boost converter operating at an output power level of 10 W, and curve 620 may represent the input current limit versus frequency for a boost converter operating at an output power level of 2 W. Other curves in between may represent the input current limit versus frequency for a boost converter operating at various output power levels between the power levels represented by curves 610 and 620 (e.g., 8 W, 6 W, and 4 W from the top to the bottom of graph 600).

[0076] As shown and described above, the input current limit may vary based on the frequency of the input data signal. For lower frequencies, the input current limit may be based on the instantaneous peak output power, but as the frequency increases (e.g., above 1 kHz), the input current limit may decrease since the input current limit is based on the average expected output power. As shown, the input current limit may be higher when the input signal includes relatively low frequencies and lower when the input signal includes relatively high frequencies.

[0077] In some aspects, the input current limit may be limited by an upper limit and / or a lower limit. The graph of FIG. 6 illustrates an input current limit being limited by both an upper limit and a lower limit. For example, the input current limit may be limited to at least one of an upper limit of a maximum input current limit (e.g., Ilim_max) or a lower limit of a minimum input current limit (e.g., Ilim_min). Thus, while the boost converter is operating at a higher power level, the logic circuit (e.g., logic 440, more specifically stage 448) may determine that the calculated input current limit is greater than Ilim_max and may limit the input current limit to Ilim_max. Similarly, while the boost converter is operating at a lower power level (or at a higher frequency), the logic circuit may determine that the calculated input current limit is less than Ilim_min and may prevent the input current limit from dropping below Ilim_min. This may function to prevent the boost converter from drawing an amount of current above a first operating threshold or below a second operating threshold. Exemplary Operations for Providing Power

[0078] 7 is a flow diagram of example operations 700 for providing power in accordance with some aspects of the disclosure. The operations 700 may be performed by a power supply circuit, such as the power supply circuit 400 of FIGS. 4A and 4B.

[0079] The operations 700 begin in block 702 with a circuit, more specifically, for example, a boost converter (e.g., boost converter 410 of FIGS. 4A and 4B ), configured to provide a load for the boost converter (e.g., R load 4A and 4B) to power the amplifier 450. in ) to the output voltage (e.g., V boost_out) in block 704. In block 704, circuitry (more particularly, logic such as, for example, logic 440 in FIGS. 4A and 4B) may adaptively adjust an input current limit of the boost converter based on an estimated output power of the boost converter (e.g., divided by the efficiency or the estimated input power). In block 706, circuitry (more particularly, logic such as, in some cases, logic 440 in FIGS. 4A and 4B) may apply an input current limit to the boost converter during conversion.

[0080] According to some aspects, the operations 700 may further involve determining an average expected output power of the boost converter as the estimated output power.

[0081] In some aspects, the operations 700 may further involve sensing the input voltage (e.g., with the analog-to-digital converter 490), in which case the input current limit may be adaptively adjusted based on the estimated output power of the boost converter and the input voltage.

[0082] According to some aspects, the load may include an amplifier (e.g., amplifier 450 of FIGS. 4A and 4B). The estimated output power may be determined based on a power level and a frequency content of an input signal amplified by the amplifier (e.g., based on a digital signal at an input node D_in, such as analog signal 220). In some aspects, the amplifier may include a speaker driver and the input signal may include an audio signal. In some aspects, the operations 700 may include determining an input voltage (e.g., V in ) and / or the mean square value of the input signal (e.g.

[0083]

number

[0084] In some aspects, the operations 700 may further involve calculating an estimated output power based on a mean square value of the input signal, a gain of the amplifier, and a resistive value of the load, and dividing the estimated output power by an efficiency of at least one of the boost converter or the load to generate an estimated input power. In some aspects, the operations 700 may further involve determining an input current limit by dividing the estimated input power by the input voltage. In some aspects, determining the input current limit may further involve adding a ripple value to a result of dividing the estimated input power by the input voltage. In some aspects, the mean square value of the input signal (e.g.,

[0085]

number

[0086] Determining may involve filtering the input signal and determining a mean square value of the filtered input signal as the mean square value of the input signal. In some aspects, the operations 700 may also involve delaying the input signal with a delay time, amplifying the delayed input signal with an amplifier, and holding the input current limit based on the delay time before applying the input current limit to the boost converter.

[0087] According to some aspects, when the input signal includes a relatively high frequency, the input current limit can be based on the average expected output power of the boost converter, and when the input signal includes a relatively low frequency, the input current limit can be based on the estimated instantaneous peak output power of the boost converter. The input current limit can be higher when the input signal includes a relatively low frequency and lower when the input signal includes a relatively high frequency.

[0088] According to some aspects, the operations 700 may further involve limiting the input current limit to at least one of an upper limit of a maximum input current limit (e.g., Ilim_max) or a lower limit of a minimum input current limit (e.g., Ilim_min) prior to applying the input current limit to the boost converter in block 706. Exemplary Aspects

[0089] In addition to the various aspects described above, specific combinations of aspects are within the scope of the present disclosure, some of which are detailed below.

[0090] Aspect 1: A method of supplying power, comprising: converting an input voltage to an output voltage by a boost converter to power a load for the boost converter; adaptively adjusting an input current limit of the boost converter based on an estimated output power of the boost converter; and applying the input current limit to the boost converter during conversion.

[0091] Aspect 2: The method of aspect 1, further comprising determining an average expected output power of the boost converter as the estimated output power.

[0092] Aspect 3: The method of aspect 1 or 2, further comprising sensing an input voltage, wherein the input current limit is adaptively adjusted based on the estimated output power of the boost converter and the input voltage.

[0093] Aspect 4: A method according to any of aspects 1 to 3, wherein the load includes an amplifier and the estimated output power is determined based on a power level and a frequency component of an input signal amplified by the amplifier.

[0094] Aspect 5: The method of aspect 4, wherein when the input signal includes a relatively high frequency, the input current limit is based on an average expected output power of the boost converter, and when the input signal includes a relatively low frequency, the input current limit is based on an estimated instantaneous peak output power of the boost converter.

[0095] Aspect 6: The method of aspect 4 or 5, further comprising: sensing an input voltage of the boost converter; determining a mean square value of the input signal; calculating an estimated output power based on the mean square value of the input signal, the gain of the amplifier, and the resistance of the load; dividing the estimated output power by an efficiency of at least one of the boost converter or the load to generate an estimated input power; and determining an input current limit by dividing the estimated input power by the input voltage.

[0096] Aspect 7: The method of aspect 6, wherein determining the input current limit further includes adding a ripple value to a result of dividing the estimated input power by the input voltage.

[0097] Aspect 8: The method of aspect 6 or 7, wherein determining the mean-square value includes filtering the input signal and determining the mean-square value of the filtered input signal as the mean-square value of the input signal.

[0098] Aspect 9: The method of any of aspects 6 to 8, further comprising: delaying the input signal by a delay time; amplifying the delayed input signal using an amplifier; and holding the input current limit based on the delay time before applying the input current limit to the boost converter.

[0099] Aspect 10: The method of any of aspects 4 to 9, wherein the amplifier includes a speaker driver and the input signal includes an audio signal.

[0100] Aspect 11: The method of any of aspects 4 to 10, wherein the input current limit is higher when the input signal includes a relatively low frequency and is lower when the input signal includes a relatively high frequency.

[0101] Aspect 12: The method of any one of aspects 1 to 11, further comprising limiting the input current limit to at least one of an upper limit of a maximum input current limit or a lower limit of a minimum input current limit before applying the input current limit to the boost converter.

[0102] Aspect 13: A circuit for supplying power to a load, comprising: a boost converter having an output coupled to the load; and logic configured to adaptively adjust an input current limit of the boost converter and apply the input current limit to the boost converter based on an estimated output power of the boost converter.

[0103] Aspect 14: The circuit of aspect 13, wherein the logic is further configured to determine an average expected output power of the boost converter as the estimated output power.

[0104] Aspect 15: The circuit of aspect 13 or 14, wherein the boost converter includes a transistor, a current sense circuit having an input coupled to a branch of the boost converter having the transistor, and a comparator having a first input coupled to an output of the current sense circuit, a second input coupled to an output of logic configured to provide an input current limit, and an output coupled to a control input of the transistor.

[0105] Aspect 16: The circuit of any of aspects 13 to 15, further comprising an analog-to-digital converter configured to sample the input voltage of the boost converter, and the logic configured to adaptively adjust the input current limit based on the estimated output power and the input voltage of the boost converter.

[0106] Aspect 17: A circuit described in any of aspects 13 to 16, wherein the load includes an amplifier configured to amplify an input signal, and the estimated output power is determined based on a power level and a frequency component of the input signal amplified by the amplifier.

[0107] Aspect 18: The circuit of aspect 17, wherein when the input signal includes a relatively high frequency, the input current limit is based on an average expected output power of the boost converter, and when the input signal includes a relatively low frequency, the input current limit is based on an estimated instantaneous peak output power of the boost converter.

[0108] Aspect 19: The circuit of aspect 17 or 18, further comprising an analog-to-digital converter configured to sample the input voltage of the boost converter, and to adaptively adjust the input current limit, the logic is configured to determine a mean square value of the input signal, calculate an estimated output power based on the mean square value of the input signal, the gain of the amplifier, and the resistance of the load, divide the estimated output power by an efficiency of at least one of the boost converter or the load to generate an estimated input power, and determine the input current limit by dividing the estimated input power by the sampled input voltage.

[0109] Aspect 20: The circuit of aspect 19, wherein to determine the input current limit, the logic is further configured to add a ripple value to a result of dividing the estimated input power by the input voltage.

[0110] Example 21: The circuit of example 19 or 20, wherein to determine the mean square value, the logic is configured to filter the input signal and determine the mean square value of the filtered input signal as the mean square value of the input signal.

[0111] Aspect 22: The circuit of any of aspects 19 to 21, further comprising a delay element configured to delay the input signal by a delay time, the amplifier configured to amplify the delayed input signal, and the logic further configured to hold the input current limit based on the delay time before applying the input current limit to the boost converter.

[0112] Example 23: The circuit of any of Examples 17 to 22, wherein the amplifier includes a speaker driver and the input signal includes an audio signal.

[0113] Example 24: The circuit of any of examples 17 to 23, wherein the input current limit is higher when the input signal includes a relatively low frequency and lower when the input signal includes a relatively high frequency.

[0114] Aspect 25: A circuit described in any of aspects 13 to 24, wherein the logic is further configured to limit the input current limit to at least one of an upper limit of a maximum input current limit or a lower limit of a minimum input current limit before applying the input current limit to the boost converter.

[0115] Aspect 26: An apparatus for supplying power, comprising: means for converting an input voltage to an output voltage greater than the input voltage for powering a load for the means for converting; means for adaptively adjusting an input current limit of the means for converting based on an estimated output power of the means for converting; and means for applying the input current limit to the means for converting.

[0116] Example 27: The apparatus of example 26, further comprising means for determining an average predicted output power of the means for converting as the estimated output power.

[0117] Aspect 28: The apparatus of aspect 26 or 27, further comprising a means for sensing an input voltage, wherein the means for adaptively adjusting is configured to adaptively adjust the input current limit based on the estimated output power of the means for converting and the input voltage.

[0118] Aspect 29: An apparatus as described in any of aspects 26 to 28, wherein the load includes a means for amplifying, and the estimated output power is determined based on a power level and a frequency component of the input signal amplified by the means for amplifying, and when the input signal includes a relatively high frequency, the input current limit is based on an average predicted output power of the means for converting, and when the input signal includes a relatively low frequency, the input current limit is based on an estimated instantaneous peak output power of the means for converting.

[0119] Aspect 30: The apparatus of aspect 29, further including a means for sensing an input voltage, wherein the means for adaptively adjusting further includes means for filtering the input signal, means for determining a mean square value of the filtered input signal, means for calculating an estimated output power based on the mean square value of the filtered input signal, a gain of the means for amplifying, and a resistance value of the load, means for dividing the estimated output power by an efficiency of at least one of the means for converting or the load to generate an estimated input power, means for dividing the estimated input power by the input voltage, and means for adding a ripple value to a result of dividing the estimated input power by the input voltage to generate an input current limit. Additional Considerations

[0120] Some aspects of the present disclosure provide a boost converter circuit with dynamic input current limit control. The dynamic input current limit control works, for example, by determining the input current limit of the boost converter before an input signal peak occurs. Thus, by dynamically adjusting the input current limit, power loss can be reduced, thereby improving the efficiency of the boost converter. If the input signal (e.g., of an audio amplifier) ​​includes a relatively low frequency, the input current limit can be based on the estimated instantaneous peak output power of the boost converter. In this case, the input current limit can be held until a signal peak occurs (e.g., so that the speaker driver signal remains clean). If the input signal includes a relatively high frequency, the input current limit can be based on the average expected output power of the boost converter. In this case, when a signal peak occurs, the battery current is limited, but the speaker driver signal may still likely be clean because the boost capacitor can provide a remainder of the charge.

[0121] The various operations of the methods described above may be performed by any suitable means capable of performing the corresponding functions, which may include various hardware and / or software component(s) including, but not limited to, circuits, application-specific integrated circuits (ASICs), or processors, and / or various hardware and / or software module(s). Generally, when operations are illustrated in figures, the operations may have corresponding equivalent means-plus-function components that are similarly numbered.

[0122] For example, the means for converting the input voltage to the output voltage may include a voltage regulator, such as the boost converter in the power supply circuit 300 shown in Figures 3A and 3B, or the boost converter 410 depicted in Figures 4A and 4B. The means for adaptively adjusting the input current limit may include logic, such as logic 440 shown in Figures 4A and 4B. The means for applying the input current limit may include logic, such as comparator 376, gate 377, and flip-flop 360 shown in Figures 3B and 4B. The means for amplifying may include an amplifier, such as amplifier 210 shown in Figure 2, or amplifier 450 shown in Figures 4A and 4B. For example, the means for delaying may include a delay element, such as delay element 420 shown in Figures 4A and 4B.

[0123] The means for determining the average expected output power may include logic such as logic 440 shown in Figures 4A and 4B. The means for sensing the input voltage may include a voltage sensing circuit such as analog-to-digital converter 490, which may be preceded by a buffer (not shown). The means for filtering the input signal may include a digital filter (implemented in logic) such as logic 440 implemented by multiplexer 443 and subtraction stage 445. The means for determining the mean square value of the filtered input signal may include logic such as logic 440 having stage 446. The means for calculating the estimated output power may include logic such as logic 440 having stage 447. The means for dividing may include logic such as logic 440 having stages 447 and 448. The means for adding may include logic such as logic 440 in stage 448.

[0124] As used herein, the term "determining" encompasses a wide variety of actions. For example, "determining" can include calculating, computing, processing, deriving, investigating, searching (e.g., looking up in a table, database, or another data structure), ascertaining, and the like. "Determining" can also include receiving (e.g., receiving information), accessing (e.g., accessing data in a memory), and the like. "Determining" can also include resolving, selecting, choosing, establishing, and the like.

[0125] As used herein, a phrase referring to "at least one of" a list of items refers to any combination of those items, including single members. By way of example, "at least one of a, b, or c" is intended to encompass a, b, c, ab, ac, bc, and abc, as well as any combination having multiples of the same element (e.g., aa, aaa, aab, aac, abb, acc, bb, bbb, bbc, cc, and ccc, or any other permutation of a, b, and c).

[0126] The methods disclosed herein include one or more steps or actions for achieving the described method. The steps and / or actions of those methods may be interchanged with one another without departing from the scope of the claims. In other words, unless a specific order of steps or actions is specified, the order of specific steps and / or actions and / or the use of those steps and / or actions may be modified without departing from the scope of the claims.

[0127] It should be understood that the claims are not limited to the precise configuration and components illustrated above. Various modifications, changes and variations may be made in the arrangement, operation and details of the methods and apparatus described above without departing from the scope of the claims.

Claims

1. 1. A method of supplying electrical power, comprising: converting an input voltage to an output voltage by a boost converter to power a load for the boost converter; adaptively adjusting an input current limit of the boost converter based on an estimated output power of the boost converter; applying the input current limit to the boost converter during the conversion; Including, the load includes an amplifier; the estimated output power is determined based on a power level and frequency components of an input signal (D_in) amplified by the amplifier; when the input signal contains a relatively high frequency, the input current limit is based on an average expected output power of the boost converter; when the input signal contains a relatively low frequency, the input current limit is based on an estimated instantaneous peak output power of the boost converter; method.

2. The method of claim 1 , further comprising determining an average expected output power of the boost converter as the estimated output power.

3. The method of claim 1 , further comprising sensing the input voltage, and wherein the input current limit is adaptively adjusted based on the estimated output power of the boost converter and the input voltage.

4. sensing the input voltage of the boost converter; determining a mean square value of the input signal; calculating the estimated output power based on the mean square value of the input signal, the gain of the amplifier, and the resistance of the load; Dividing the estimated output power by an efficiency of at least one of the boost converter or the load to generate an estimated input power; determining the input current limit by dividing the estimated input power by the input voltage; The method of claim 1 further comprising:

5. determining the input current limit further comprises adding a ripple value to a result of dividing the estimated input power by the input voltage; or Determining the mean square value filtering the input signal; determining the mean square value of the filtered input signal as the mean square value of the input signal; Including, The method of claim 4.

6. delaying the input signal by a delay time; amplifying the delayed input signal with the amplifier; holding the input current limit based on the delay time before applying the input current limit to the boost converter; The method of claim 4 further comprising:

7. 2. The method of claim 1, wherein the input current limit is higher when the input signal includes a relatively low frequency and lower when the input signal includes a relatively high frequency.

8. 2. The method of claim 1, further comprising limiting the input current limit to at least one of a maximum input current limit upper limit or a minimum input current limit lower limit before applying the input current limit to the boost converter.

9. 1. A circuit for supplying power to a load, comprising: a boost converter having an output coupled to the load; adaptively adjusting an input current limit of the boost converter based on an estimated output power of the boost converter; applying the input current limit to the boost converter; The logic is structured as follows: Including, the load includes an amplifier configured to amplify an input signal (D_in), and the estimated output power is determined based on a power level and a frequency component of the input signal amplified by the amplifier; when the input signal contains a relatively high frequency, the input current limit is based on an average expected output power of the boost converter; when the input signal contains a relatively low frequency, the input current limit is based on an estimated instantaneous peak output power of the boost converter; circuit.

10. The boost converter comprises: A transistor, a current sensing circuit having an input coupled to a branch of the boost converter having the transistor; a comparator having a first input coupled to an output of the current sense circuit, a second input coupled to an output of the logic configured to provide the input current limit, and an output coupled to a control input of the transistor; 10. The circuit of claim 9, comprising:

11. 10. The circuit of claim 9, further comprising an analog-to-digital converter configured to sample an input voltage of the boost converter, and wherein the logic is configured to adaptively adjust the input current limit based on the estimated output power and the input voltage of the boost converter.

12. and an analog-to-digital converter configured to sample an input voltage of the boost converter, wherein to adaptively adjust the input current limit, the logic: determining a mean square value of the input signal; calculating the estimated output power based on the mean square value of the input signal, the gain of the amplifier, and the resistance of the load; dividing the estimated output power by an efficiency of at least one of the boost converter or the load to generate an estimated input power; determining the input current limit by dividing the estimated input power by the sampled input voltage; 10. The circuit of claim 9, configured to:

13. 13. The circuit of claim 12, further comprising a delay element configured to delay the input signal by a delay time, the amplifier configured to amplify the delayed input signal, and the logic further configured to maintain the input current limit based on the delay time before applying the input current limit to the boost converter.

14. 10. The circuit of claim 9, wherein the amplifier comprises a speaker driver and the input signal comprises an audio signal.

15. 10. The circuit of claim 9, wherein the input current limit is higher when the input signal includes a relatively low frequency and lower when the input signal includes a relatively high frequency.

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