Different pixel refresh characteristics at different refresh rates

Abstract

Generally, the subject matter described in this disclosure can be embodied in a method, a system, and a program product for operating a display device. The pixels of the display device are refreshed by turning off the light emission of the LED, programming a driving transistor that drives the LED, and turning on the light emission of the LED with a first time delay after programming the driving transistor while the display device is operating at a first refresh rate. The pixels of the display device are refreshed by turning off the light emission of the LED, programming a driving transistor that drives the LED, and turning on the light emission of the LED with a second time delay after programming the driving transistor while the display device is operating at a second refresh rate.

Description

Technical Field

[0001] This document generally relates to display devices.

Background Art

[0002] An electronic device can include a display device on which visual images are displayed. The electronic device can change a refresh rate presented by a display panel when new image data is provided to the display panel. A high refresh rate can provide a smoother presentation of content to a user, but requires additional power consumption for a lower refresh rate.

Summary of the Invention

[0003] This document describes techniques, methods, systems, and other mechanisms for providing a display device in which pixel refresh characteristics are different at different refresh rates.

[0004] As additional explanation of the embodiments described below, the present disclosure describes the following embodiments.

[0005] Embodiment 1 is a method for operating a display device. The method includes turning off the light emission of an LED while the display device is operating at a first refresh rate at which the light emission of the pixel's LED remains on during a first period; programming a driving transistor that drives the LED while the light emission of the LED remains off and the display device is operating at the first refresh rate; and turning on the light emission of the LED with a first time delay after programming the driving transistor while the display device is operating at the first refresh rate, thereby refreshing the pixel of the display device. The method further includes turning off the light emission of the LED while the display device is operating at a second refresh rate at which the light emission of the LED remains on during a second period different from the first period; programming the driving transistor that drives the LED while the light emission of the LED remains off and the display device is operating at the second refresh rate; and turning on the light emission of the LED with a second time delay different from the first time delay after programming the driving transistor while the display device is operating at the second refresh rate, thereby refreshing the pixel of the display device.

[0006] Embodiment 2 is the method according to Embodiment 1, wherein the first refresh rate is a refresh rate of 60 Hz, and the second refresh rate is a refresh rate of 90 Hz or 120 Hz.

[0007] Embodiment 3 is the method according to any one of Embodiments 1 and 2, wherein the second refresh rate is higher than the first refresh rate such that the second period is shorter than the first period, and the second time delay is greater than the first time delay.

[0008] Embodiment 4 is the method according to Embodiment 3, wherein programming the driving transistor while the display device is operating at a first refresh rate includes providing a first voltage to the gate of the driving transistor, and the first voltage provided to the gate of the driving transistor decreases at a first rate during a first time delay after programming of the LED while the display device is operating at the first refresh rate; programming the driving transistor while the display device is operating at a second refresh rate includes providing a second voltage to the gate of the driving transistor, and the second voltage provided to the gate of the driving transistor decreases at a second rate during a second time delay after programming of the LED while the display device is operating at the second refresh rate, and as a result of the second time delay being greater than the first time delay, the second rate is a greater rate than the first rate.

[0009] Embodiment 5 is the method according to Embodiment 4, wherein the same intensity level is programmed to the pixel both during programming of the driving transistor while the display device is operating at a first refresh rate and during programming of the driving transistor while the display device is operating at a second refresh rate, and as a result, the first voltage is the same as the second voltage; the LED has a first peak intensity when the light emission of the LED turns on after the first voltage is programmed to the gate of the driving transistor while the display device is operating at the first refresh rate; the LED has a second peak intensity when the light emission of the LED turns on after the second voltage is programmed to the gate of the driving transistor while the display device is operating at the second refresh rate; and the first peak intensity of the LED is greater than the second peak intensity of the LED.

[0010] Embodiment 6 is the method according to Embodiment 4, in which while the display device is operating at the first refresh rate so that the first time delay is zero, the light emission of the LED is turned on simultaneously with the completion of programming the driving transistor.

[0011] Embodiment 7 is the method according to any one of Embodiments 1 to 6, in which programming the driving transistor while the display device is operating at the first refresh rate includes applying a first voltage to the gate of the driving transistor during a programming period. Programming the driving transistor while the display device is operating at the second refresh rate includes applying a second voltage to the gate of the driving transistor during the same programming period. It is the method according to any one of Embodiments 1 to 6.

[0012] Embodiment 8 is the method according to any one of Embodiments 1 to 7, in which refreshing the pixels of the display device while the display device is operating at the first refresh rate includes (i) the pre-emission of the LED preceding immediately before the pixel refresh at the first refresh rate remaining on for a first period, and (ii) the post-emission of the LED following immediately after the pixel refresh at the first refresh rate remaining on for the first period, and refreshing the pixels of the display device while the display device is operating at the second refresh rate includes (i) the pre-emission of the LED preceding immediately before the pixel refresh at the second refresh rate remaining on for a second period, and (ii) the post-emission of the LED following immediately after the pixel refresh at the second refresh rate remaining on for the second period.

[0013] Embodiment 9 is the method according to any one of Embodiments 1 to 8, wherein refreshing the pixels of the display device while the display device is operating at the first refresh rate includes that the LED emission is off during the refresh period, and refreshing the pixels of the display device while the display device is operating at the second refresh rate includes that the LED emission is off during the same refresh period.

[0014] Embodiment 10 is the method according to Embodiment 9, wherein the second time delay is greater than the first time delay, the programming of the driving transistor occurs at a first position within the refresh period while the display device is operating at the first refresh rate, the programming of the driving transistor occurs at a second position within the refresh period while the display device is operating at the second refresh rate, and the first position is arranged later within the refresh period relative to the second position.

[0015] Embodiment 11 is the method according to any one of Embodiments 1 to 10, wherein refreshing the pixels of the display device while the display device is operating at the first refresh rate includes that the pixel emission remains off during the first refresh period, and refreshing the pixels of the display device while the display device is operating at the second refresh rate includes that the pixel emission remains off during a second refresh period longer than the first refresh period.

[0016] Embodiment 12 is the method according to Embodiment 11, wherein the second time delay is greater than the first time delay, the programming of the driving transistor starts a waiting period after the pixel emission turns off while the display device is operating at the first refresh rate, and the programming of the driving transistor is performed during the same waiting period after the pixel emission turns off while the display device is operating at the second refresh rate.

[0017] Embodiment 13 is a method according to any one of Embodiments 1 to 10, including programming a driving transistor during a programming period while the display device is operating at a first refresh rate, and programming the driving transistor during the same programming period while the display device is operating at a second refresh rate.

[0018] Embodiment 14 is a method according to any one of Embodiments 1 to 13, in which the first time delay remains different from the second time delay regardless of various levels of ambient light incident on the computing device including the display device.

[0019] Embodiment 15 is a method according to any one of Embodiments 1 to 14, including programming a driving transistor after initialization to an initialization voltage while the display device is operating at a first refresh rate, and programming the driving transistor after initialization to an initialization voltage while the display device is operating at a second refresh rate.

[0020] Embodiment 16 is a method according to any one of Embodiments 1 to 15, in which the first time delay represents the time delay after the programming of the transistor has ended while the display device is operating at a second refresh rate, and the second time delay represents the time delay after the programming of the transistor has ended while the display device is operating at a second refresh rate.

[0021] Embodiment 17 is a computing device that includes a display device and a circuit associated with the display device, and the circuit is configured to cause the display device to execute the method according to any one of Embodiments 1 to 16 by interacting with the display device.

[0022] Embodiment 18 is a method of operating a display panel, including operating a plurality of pixels of the display panel at a first refresh rate, turning on at least one pixel among the plurality of pixels after providing a signal to a driving transistor of the pixel with a first time delay while the display operates at the first refresh rate, and switching the operation of the plurality of pixels to a second refresh rate, where the second refresh rate is higher than the first refresh rate. The method further includes turning on the pixel with a second time delay after providing a signal to the driving transistor of the pixel while the display operates at the second refresh rate, and the second time delay is longer than the first time delay.

[0023] Details of one or more embodiments are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will be apparent from the description and drawings, and from the claims.

Brief Description of the Drawings

[0024]

Figure 1

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DETAILED DESCRIPTION OF THE INVENTION

[0025] Like reference symbols in the various drawings refer to like elements. This document generally describes a mechanism for providing a display device in which pixel refresh characteristics are different at different refresh rates. For example, at different refresh rates, the programmed intensity values programmed into the pixels can be allowed to decay for different periods.

[0026] The display device may be configured to operate at different refresh rates (e.g., 60 Hz and 120 Hz). While video content may present higher fluidity at a high refresh rate, energy consumption may be lower at a low refresh rate. It is common for the display device to operate at a higher refresh rate when presenting video content (e.g., animation or video) and at a lower refresh rate when presenting static content (e.g., static user interface or photo).

[0027] The luminance of the pixels of the display device may decay during the emission period of a single frame (e.g., 1 / 60 second, 1 / 120 second). A lower refresh rate correlates with a longer emission time, and thus, the time at the decayed intensity is longer. As a result, the average luminance for a given intensity setting may be greater at a higher refresh rate compared to a lower refresh rate. The user may perceive this difference in intensity as a step change (e.g., flicker) in the intensity of the display device that occurs when the display device changes from one refresh rate to another.

[0028] To compensate for this difference, the display device may be adjusted or calibrated to output different initial luminances for different refresh rates for a given programmed pixel value. As a simple example, when the display device is operating at its highest refresh rate (e.g., the shortest frame time), the programmed pixel value of each pixel may be reduced by 5% for operation at the lowest refresh rate.

[0029] The problem is that the presence of strong ambient light can increase the amount of luminance decay occurring in each frame. Photons from strong ambient light can interact with semiconductor components within the display device, which can cause current leakage and an increase in luminance decay. In this way, luminance adjustment or calibration may not compensate as accurately for the difference in luminance between refresh rates when the display device is in the presence of strong ambient light. This means that an individual using a computing device outdoors on a sunny day may sometimes be likely to see "flicker" when the refresh rate of the computing device is changed.

[0030] A mechanism for reducing the impact of ambient light on the intensity of a device having a variable refresh rate can include varying the amount of time delay for different refresh rates between (1) pixels programmed with new image data and (2) those pixels adjusted to be on to emit the image data. During this delay between a programmed pixel (while the pixel is off) and an on pixel, the intensity level programmed for each pixel decays.

[0031] Allowing the luminance value programmed for a pixel to decay for a certain period before turning these pixels on can result in a decrease in the initial luminance output by the pixels of the display device. Also, since the decay is logarithmic, the most significant luminance changes between pixel emissions in a less ambient light environment and those in a more ambient light environment occur early in the decay. Thus, by implementing different time delays between programming and emission at different refresh rates, the appearance of "flicker" in the variable refresh rate due to strong ambient light incident on the display device can be reduced.

[0032] In the following description of the figures, additional details regarding such mechanisms for reducing flicker of a variable refresh rate are provided. The descriptions of FIGS. 1 and 2A - B provide an overview of the operation of the display device and components therein, and FIGS. 3A - 8B illustrate how such components may operate to reduce flicker of a variable refresh rate in the presence of strong ambient light.

[0033] FIG. 1 is a diagram showing an example of a display system 100 of a computing device 190. The display system 100 is an OLED display system including an array 112 of light - emitting pixels. Each light - emitting pixel includes an OLED. The OLED display is driven by drivers including a SCAN / EM driver 108 and a data driver 110. The SCAN / EM driver 108 can be an integrated, i.e., stacked, row - line driver. Generally, the SCAN / EM driver 108 selects rows of pixels of the display, and the data driver 110 provides data signals (e.g., voltage data (VDATA)) to the pixels of the selected rows to turn on the OLEDs of the selected rows according to the image data specified by the voltage data. Signal lines such as scan lines, EM (emission) lines, and data lines can be used when controlling the pixels to display an image on the display. FIG. 1 shows a display system 100 having the SCAN / EM driver 108 on a single side of the display, but the SCAN / EM driver 108 can be arranged on both the left and right sides of the display to improve driving performance (e.g., speed).

[0034] The pixel array 112 includes a plurality of light-emitting pixels, such as pixels P11 to P43 for example. A pixel is a small element of a display that can change color based on the image data supplied to the pixel. Each pixel includes an OLED and a circuit for addressing and driving the OLED (for example, the components shown in FIG. 2A). Each pixel within the pixel array 112 can be individually addressed to generate various color intensities. Each pixel maintains a substantially stable luminance throughout the frame time and displays light corresponding to the supplied image data. The frame time, or frame period, is the amount of time between the start of a frame and the start of the next frame. The frame time can be the reciprocal of the frame rate of the display system. For example, a frame rate of 60 frames per second (fps) corresponds to a frame time of 1 / 60 second, that is, 0.0167 seconds.

[0035] The pixel array 112 extends in a plane and includes rows and columns. Each row extends horizontally across the pixel array 112. For example, the first row 120 of the pixel array 112 includes pixels P11, P12, and P13. Each column extends vertically downward across the pixel array 112. For example, the first column 130 of the pixel array 112 includes pixels P11, P21, P31, and P41. Only a few pixels are shown in FIG. 1 for the sake of simplicity. In reality, there may be thousands or millions of pixels in the pixel array 112. Increasing the number of pixels within a display of the same size increases the resolution of the image.

[0036] Display system 100 includes a display driver integrated circuit (DDIC) 106 that receives display input data 102. The DDIC 106 can be, for example, a semiconductor integrated circuit or a state machine. The DDIC 106 generates signals with appropriate voltage, current, timing, and demultiplexing to display an image on the display 104 according to the display input data 102. In some examples, the DDIC can be a microcontroller and can incorporate RAM, flash memory, EEPROM, ROM, etc.

[0037] The DDIC 106 includes a timing controller 134, a clock signal generator 136, and a data signal generator 138. The DDIC 106 generates a clock signal 142. The clock signal 142 can be, for example, a signal that controls the display frame start time and the display frame stop time of each frame presented by the display panel 104, and a frame represents a single image within a series of images presented by the display panel 104. In an example where each frame presented by the display panel includes a plurality of emission cycles, the clock signal 142, or another signal not shown in FIG. 1, can control the display emission start time and the display emission stop time of each emission cycle of the display panel 104. In some examples, the SCAN / EM driver 108, the data driver 110, or both can be integrated with the DDIC 106.

[0038] The SCAN / EM driver supplies a SCAN signal and an EM signal to the rows of the pixel array 112. For example, the SCAN / EM driver 108 supplies a scan signal to the rows of pixels via scan lines S1 - S4 and an EM signal via EM lines E1 - E4.

[0039] The data driver 110 supplies signals to the columns of the pixel array 112. For example, based on the image data signal 144 from the DDIC 106, the data driver 110 supplies data to the columns of pixels via data lines D1 to D3, and the data is provided to a single row at a time based on which row is currently selected by the scan / EM signal. For example, the data driver 110 specifies a data voltage for each pixel of the currently selected row being used according to the image data signal 144. The data driver 110 applies the selected data voltage via the data lines D1 to D3.

[0040] The clock signal 142 can be used to drive the SCAN / EM driver 108 and the data driver 110. Thus, the DDIC 106 controls the timing of the scan signal, the EM signal, and the data signal.

[0041] The display system 100 includes a power supply 150. The power supply 150 provides a first supply voltage ELVDD and a second supply voltage ELVSS, both of which are applied to each pixel of the pixel array 112. In some examples, the power supply 150 can be integrated with the DDIC 106.

[0042] Each pixel of the pixel array 112 can be addressed by a horizontal scan line, a horizontal EM line, and a vertical data line. For example, pixel P11 can be addressed by scan line S1, EM line E1, and data line D1. In another example, pixel P32 can be addressed by scan line S3, EM line E3, and data line D2.

[0043] The SCAN / EM driver 108 and the data driver 110 provide signals to the pixels that enable the pixels to generate an image on the display. The SCAN / EM driver 108 and the data driver 110 provide signals to the pixels via scan lines, emission lines, and data lines. To provide signals to the pixels, the SCAN / EM driver 108 selects scan lines and controls the emission operation of the pixels. The data driver 110 provides data signals to the pixels addressable by the selected scan line to turn on the selected OLEDs at the intensity specified by the image data.

[0044] The scan lines are sequentially addressed for each frame. The scan direction determines the order in which the scan lines are addressed. In the display system 100, the scan direction is from the top to the bottom of the pixel array 112. For example, scan line S1 is addressed first, followed by scan line S2, then S3, and so on.

[0045] FIG. 1 shows that each row is addressed by a single scan line and a single emission line, but each row may be addressed by multiple scan lines (e.g., nSCAN and pSCAN). FIG. 1 shows exemplary components of an OLED display, but the techniques described may be applied to other flat panel display technologies including arrays of pixels. For example, the present technology may be applied to light emitting diodes (LEDs), liquid crystal displays (LCDs), and plasma display panels (PDPs).

[0046] FIG. 2A shows a diagram of a pixel circuit of a display device, which pixel circuit includes an LED and a corresponding drive circuit of the pixel circuit. For example, FIG. 2A may show a more detailed diagram of a single pixel from the pixel array shown in FIG. 1. Although the present disclosure may refer to the components shown in FIG. 2A as a "pixel circuit", the present disclosure may also simply refer to such components as a "pixel". Further, the pixel shown in FIG. 2A may represent a sub-pixel.

[0047] The pixel circuit may be an active matrix organic light emitting diode (AMOLED) pixel circuit. The pixel circuit receives a light emission signal EM, a SCAN signal, and a data voltage VDATA signal. The pixel circuit 200 receives a first supply voltage ELVDD, a second supply voltage ELVSS, and an initial reference voltage VINIT.

[0048] The pixel circuit includes an organic light emitting diode (OLED). The OLED includes a layer of an organic compound that emits light in response to a current, IOLED. The organic layer is disposed between two electrodes, namely an anode and a cathode. The OLED receives a supply voltage ELVDD and is driven by a drive transistor T1 that functions as a current source to drive the OLED to emit light.

[0049] The pixel also includes a storage capacitor C-ST and transistors T2 to T7. The operation of the pixel is defined by the states of the control signals SCAN, EM, and VDATA. The OLED current, IOLED, is set by the voltage present at the gate terminal of the drive transistor T1, which is referred to as the "G" node. For example, the drive transistor T1 has a threshold voltage VTH between the gate terminal and the source terminal of the drive transistor T1, and a voltage between the gate terminal and the source terminal that exceeds the threshold voltage VTH causes a conductive path to be formed in the drive transistor T1 from the source terminal to the drain terminal.

[0050] FIG. 2B shows a timing diagram of the control signals of the pixel shown in FIG. 2A. These control signals repeat transitions during the operation of the display device 100 between an initialization stage, a programming stage, and a light emission stage.

[0051] At the end of the light emission stage, the EM signal transitions to an off state (e.g., by changing from a low state to a high state). This transition turns off transistors T5 and T6, thereby blocking the current provided from ELVDD to the OLED, and thus stopping the light emission by the OLED.

[0052] During the initialization stage, the SCAN[n - 1] signal becomes on (e.g., by changing from a high state to a low state), thereby turning on transistor T4 for a certain period and initializing the G node to the initialization voltage VINIT. The SCAN[n - 1] signal may be the SCAN[n] signal provided to the previous row by the state machine of the SCAN / EM driver 108.

[0053] During the programming stage, the SCAN[n] signal becomes on (e.g., by going low), thereby turning on transistors T2, T3, and T7 for a certain period. As a result, the voltage value on the voltage data VDATA line passes through transistors T2, T1, and T3 to the G node, setting the G node to a value based on the VDATA line (e.g., a value obtained by subtracting the effect of the transistor threshold voltage from the voltage at VDATA).

[0054] During the emission stage, the EM signal turns on (e.g., by going low), thereby turning on transistors T5 and T6. Current flows from ELVDD through transistors T5, T1, and T6 to the anode of the OLED, and the current level is determined by the voltage present at the G node. Thus, after the pixel transitions to the emission stage of the frame, the level of the current IOLED flowing through the OLED is based on the voltage set at the G node of the driving transistor (e.g., the voltage level of the G node is programmed by the voltage data VDATA line). The intensity or brightness of the light emitted by the OLED is directly correlated to the amount of current IOLED applied to the OLED, and a higher current corresponds to a greater intensity of light compared to a lower current. The storage capacitor C-ST maintains the voltage at the G node so that the OLED continues to emit light at approximately the same level during the duration of the emission stage.

[0055] The voltage at the G node may slightly decrease during the emission stage. Thus, the current IOLED applied to the OLED and the intensity of the light emitted by the OLED may slightly decrease during the emission stage.

[0056] Figures 3A - B show the luminance of a pixel over a single frame time for different refresh rates. As described above, the display of a computing device may support multiple refresh rates. For example, high refresh rates (e.g., 120Hz, 90Hz) may be used for moving images to provide high display performance, while low refresh rates (e.g., 60Hz or less) may be used for still images or slow moving images. In this way, the computing device can optimize the refresh rate for the presented content to provide both a high-quality user experience and good battery life.

[0057] The luminance provided by the pixels of a display device may decay during the emission of each frame time. Due to this non-ideal (non-flat) luminance response of the display over the frame time, a luminance delta may exist between refresh rates. This delta is shown in FIG. 3A, which shows a luminance graph 300 indicating the luminance of a pixel programmed to a specific intensity value (e.g., full intensity) over the emission period of a single frame time.

[0058] In graph 300, a first pixel luminance 310 occurring during a 120 Hz refresh rate results in a first average luminance intensity 312 over the 120 Hz frame time, while a second pixel luminance 320 occurring during a 60 Hz refresh rate results in a second average luminance intensity 322 over the 60 Hz frame time. The second average luminance intensity 322 is lower than the first average luminance intensity 312. This difference in average luminance intensity is manifested as flicker during a refresh rate transition (also called variable refresh rate flicker or VRR flicker) when the system transitions from one refresh rate to another.

[0059] The display device is often adjusted or calibrated so that the pixels output different initial luminance levels for the same given image data at different refresh rates in order to reduce VRR flicker. FIG. 3B shows a luminance graph 350 that is adjusted or calibrated such that a first pixel luminance 360 occurring during a 120 Hz refresh rate starts its emission in the frame with a lower intensity value than a second pixel luminance 370 occurring during a 60 Hz refresh rate, even though the luminance of both pixels presents the same image data at different times.

[0060] This results in a first average luminance intensity 362 at a refresh rate of 120 Hz, which corresponds to (e.g., is the same as) a second average luminance intensity 372 at a refresh rate of 60 Hz. For example, if the video output by the display device is such that a given pixel continuously outputs at exactly the same intensity level (e.g., an intensity of 52%), the calibration of the refresh rate may lower the value programmed for a given pixel in the display device circuit when the display device operates at 120 Hz in order to reduce VRR flicker. In other words, amplitude control specific to the refresh rate may be employed to reduce VRR flicker.

[0061] The transistors of the pixels that control the individual pixel emission current / brightness (e.g., T1 in FIG. 2A and / or other transistors) may be photosensitive. For example, when strong light is incident, the leakage current in the off state may increase. As shown in FIG. 4A, the pixel transistors can be optically shielded from the strong light illuminating from the front side of the display (e.g., photons 400 are blocked by component 402). However, the optical shield does not provide adequate protection at all angles (e.g., as shown by photons 406 that avoid any optical shield), and there may also be reflected light on the back side (e.g., shown by photons 404). In this way, the pixel emission current, IOLED, can decrease when the display is exposed to strong ambient light.

[0062] FIG. 4B shows a luminance graph 420 and a corresponding timing diagram 450. The luminance graph 420 shows how much greater the initial intensity of a first luminance profile 422 at a refresh rate of 60 Hz and under indoor light conditions is than the initial intensity of a second luminance profile 424 at a refresh rate of 90 Hz and under indoor light conditions. The lower initial intensity of the second luminance profile 424 is due to adjustments or calibrations applied by the computing device to produce the same average intensity for both luminance profiles 422 and 426.

[0063] The luminance graph 420 also shows how much greater the initial intensity of the third luminance profile 426 is at a refresh rate of 60 Hz and under outdoor light conditions than the initial intensity of the fourth luminance profile 428 at a refresh rate of 90 Hz and under outdoor light conditions. The luminance profiles under outdoor light conditions decay at a faster rate than those under indoor light conditions. As described above, this faster decay results in different average intensity levels when the display device is under outdoor light conditions. For example, the adjustment or calibration may have been developed for indoor light conditions and may not completely reduce VRR flicker under outdoor light conditions (or other types of light conditions different from those for which the adjustment or calibration was developed).

[0064] The timing diagram 450 of FIG. 4B is similar to the timing diagram of FIG. 2B, with the main difference being that the timing diagram 450 shows the Vsync signal, which can transition to a different state once per frame to synchronize various signals. For example, the EM signal may trigger off the Vsync signal that occurs during a specified period before or after the transition of the Vsync signal. Similarly, the SCAN signal may trigger off the Vsync signal.

[0065] Timing diagram 450 shows Δt_60[n], which represents the time delay between the programming of a pixel and the start of the emission period of that pixel when the display device is operating at a refresh rate of 60 Hz. Specifically, the Δt_60[n] period may start when the programming of the pixel is complete or ended (specified by the end of the SCAN[n] pulse), and the Δt_60[n] period may end when the emission period starts (specified by the start of the EM[n] pulse, which is executed at the falling transition of Figure 4B). Timing diagram 450 also shows Δt_90[n], which represents the time delay between the programming of a pixel and the start of the emission period of that pixel when the display device is operating at a refresh rate of 90 Hz. In this example, for instance, since the SCAN[n] signal pulses at the same position within the "off" portion of the EM signal both during the 60 Hz refresh rate and during the 90 Hz refresh rate, Δt_60[n] and Δt_90[n] are the same. In other words, the time gap between the Vsync signal and the SCAN signal is the same for both the high and low refresh rates.

[0066] The attenuation of the luminance during pixel emission is, at least in part, the result of the current leakage of transistor T3 (see Figure 2B) after VDATA has been programmed into the pixel (e.g., after T3 has turned off). In this way, regardless of whether the pixel is emitting light or not, when the VDATA programming period ends (e.g., when the VSYNC pulse ends), the voltage of the G electrode begins to decay.

[0067] Accordingly, the initial luminance value of a pixel can be reduced by providing a time delay between (1) the end of the VDATA programmed into the pixel and (2) the pixel's emission turning on. When this time delay is greater at a high refresh rate (e.g., 90 Hz) than at a low refresh rate (e.g., 60 Hz), the luminance delta between the high and low refresh rates under strong ambient light is reduced. In other words, a display device configured to provide different such time delays at different refresh rates and adjusted or calibrated to reduce VRR flicker under indoor light conditions may provide moderate or indistinguishable VRR flicker under outdoor light conditions.

[0068] The use of different time delays is shown in FIG. 5A by different periods of delay Δt_60[n] and Δt_90[n]. Since the time delay is greater at 90 Hz, the initial luminance value at 90 Hz is different between indoor and outdoor light conditions. As a result of this larger time delay set, the average luminance at a 90 Hz refresh rate under outdoor conditions more closely matches the average luminance at a 60 Hz refresh rate under outdoor conditions than when the time delays at different refresh rates are the same.

[0069] The 90 Hz time delay Δt_90[n] can be implemented regardless of the level of ambient light detected by the computing device. In other words, the 90 Hz time delay Δt_90[n] can be implemented for all 90 Hz refresh rates. When the computing device detects the level of ambient light, that information may not be used when selecting when to implement the 90 Hz time delay Δt_90[n]. In some examples, the 60 Hz time delay Δt_60[n] is negligible or equal to zero, so the emission period starts at (or even before) the end of the SCAN programming period.

[0070] FIG. 5B includes a first set of graphs 560 showing how a display device having the same refresh characteristics at different refresh rates has a luminance difference of 29 nits between different refresh rates during outdoor operation. FIG. 5B also includes a second set of graphs 580 showing how the same display device having an operation modified as described above to have different refresh characteristics at different refresh rates (e.g., different Δt_60[n] and Δt_90[n]) has a luminance difference of 11 nits between different refresh rates during outdoor operation. By reducing the luminance difference in nits due to the modified operation, as a result, flicker is less likely to be perceived under strong ambient light conditions.

[0071] FIG. 6A shows a timing diagram of a pixel or row of the display device when the display device is operating at a refresh rate of 60 Hz. In this figure, Δt_60[n] represents the time delay between the end of programming of data to the pixel or row and the start of the emission period.

[0072] FIG. 6C shows a timing diagram of the same pixel or row of the display device when the display device is operating at a refresh rate of 90 Hz. In this figure, Δt_90[n] represents the time delay between the end of programming of data and the start of the emission period. The luminance shown in FIG. 5A can be achieved by operating according to the timing schemes shown for 60 Hz and 90 Hz in FIGS. 6A and 6C, respectively. Different refresh rates may be used.

[0073] As shown in FIGS. 6A and 6C, the timing delay at 90 Hz is greater than the timing delay at 60 Hz, such that the voltage programmed to the G node decays more before emission starts at 90 Hz than at 60 Hz. The use of these two different timing schemes is achieved with the same refresh period (e.g., the same period during which emission of a pixel or row of pixels is off), but the SCAN programming pulses at 90 Hz occur earlier in the refresh period than those at 60 Hz.

[0074] Alternatively, the display device may use both of the timing schemes of FIGS. 6B and 6C at a refresh rate of 60 Hz and 90 Hz, respectively. In this combination of timing schemes, the 90 Hz time delay Δt_90[n] is still greater than the 60 Hz time delay Δt_60[n], but the lengths of the refresh periods are different. In this example, the SCAN programming pulses during both the 60 Hz and 90 Hz refresh periods start at the same length of time after their respective refresh periods start, but the 60 Hz refresh period is shorter than the 90 Hz refresh period.

[0075] FIGS. 7A - B show a flowchart of a process for operating a display device having different pixel refresh characteristics at different refresh rates. The process may be implemented by a display device, or a computing device including the display device, to achieve the luminance output shown, for example, by the set 580 of tables of FIGS. 5A and 5B.

[0076] In block 700, the display device operates at a first refresh rate. For example, the display device described with respect to FIGS. 1 and 2A - B can operate at a refresh rate of 60 Hz to repeatedly present frames, each frame including an initialization period, a programming period, and an emission period (as shown in FIGS. 2B, 6A, and 6B).

[0077] In box 710, during the first period, the LED of the pixel emits light. For example, pixel P11 (FIG. 1) may be on during the emission period labeled in FIG. 2B, which is shown without a label in FIGS. 6A - B.

[0078] In box 712, the emission of the pixel is on for the same period in the frames preceding and following the refresh of the pixel. For example, the refresh of the pixel shown in FIG. 2B (including the initialization period and the programming period) may be preceded by an emission period and followed by an emission period of the same length. The frames may be repeated several hundred times in sequence with the same emission period as a result of the display device operating continuously at the same refresh rate for a long period. A similar operation is shown in the timing diagrams of FIGS. 6A - B.

[0079] In box 720, the emission of the LED of the pixel is turned off. For example, the EM signal (see FIG. 2B) goes "off" by transitioning from low to high. Due to this transition of the signal, the LED stops emitting light as described in the description of FIGS. 2A - B. A similar operation is shown in the timing diagrams of FIGS. 6A - B.

[0080] In box 722, the pixel is initialized. For example, the SCAN[n - 1] signal (see FIG. 2B) can initialize various components of the pixel as described with respect to FIGS. 2A - B. A similar operation is shown in the timing diagrams of FIGS. 6A - B.

[0081] In box 724, a value is programmed into the drive transistor that drives the LED. For example, the DATA signal (FIG. 2B) can be sent to the G node (FIG. 2A) of the T1 transistor by the VDATA line as described with respect to FIGS. 2A - B. A similar operation is shown in the timing diagrams of FIGS. 6A - B.

[0082] In box 730, the LED emission is turned on with a first time delay after the programming of the driving transistor is completed, as explained with reference to FIGS. 2A - B. Different examples of such time delays are shown by Δt_60[n] in FIGS. 6A - B.

[0083] In box 732, the voltage programmed into the driving transistor decreases at a first rate over the first time delay. For example, the luminance graph of FIG. 5A shows indoor and outdoor luminance lines that decrease slightly over the period of Δt_60[n] (note that the pixel emission is off during Δt_60[n] even though the indoor and outdoor luminance lines of FIG. 5A are present during this period).

[0084] In box 734, the LED emission is turned on simultaneously with the completion of programming such that the first delay is zero. For example, the period Δt_60[n] in FIGS. 6A - B can be zero, and as a result, the SCAN falling transition occurs simultaneously with the EM falling transition.

[0085] In box 740, a decision is made as to whether to switch to a different refresh rate. For example, when high - speed video content is presented, the computing device or the display device disposed therein may decide to switch to a higher refresh rate. If the display device does not switch the refresh rate, the operation of box 700 is executed again. If the display device switches to a different refresh rate, the operation of box 760 is executed.

[0086] In box 750, the display device operates at a second refresh rate different from the first refresh rate. For example, the display device described with reference to FIGS. 1 and 2A - B can operate at a refresh rate of 90 Hz or 120 Hz to repeatedly present frames that include an initialization period, a programming period, and an emission period (as shown in FIGS. 2B and 6C).

[0087] In box 760, during the first period, the LED of the pixel emits light. For example, pixel P11 (FIG. 1) may be on during the light emission period labeled in FIG. 2B, which is shown without a label in FIG. 6C.

[0088] In box 762, the second refresh rate is higher than the first refresh rate. For example, a second refresh rate of 90 Hz or 120 Hz may be higher than the first refresh rate of 60 Hz.

[0089] In box 770, the light emission of the pixel LED is turned off. For example, the EM signal (see FIG. 2B) turns "off" by transitioning from low to high. Due to this signal transition, the LED stops emitting light as described in the description of FIGS. 2A - B. A similar operation is shown in the timing diagram of FIG. 6C.

[0090] In box 722, the pixel is initialized. For example, the SCAN[n - 1] signal (see FIG. 2B) can initialize various components of the pixel as described with respect to FIGS. 2A - B. A similar operation is shown in the timing diagram of FIG. 6C.

[0091] In box 724, a value is programmed into the drive transistor that drives the LED. For example, the DATA signal (FIG. 2B) can be sent to the G node (FIG. 2A) of the T1 transistor by the VDATA line as described with respect to FIGS. 2A - B. A similar operation is shown in the timing diagram of FIG. 6C.

[0092] In box 780, as described with respect to FIGS. 2A - B, the light emission of the LED is turned on with a second time delay after the programming of the drive transistor is completed. An example of such a time delay is shown by Δt_90[n] in FIG. 6C.

[0093] In box 782, the voltage programmed into the drive transistor decreases at a second rate over a second time delay, and the second rate is greater than the first rate. For example, the luminance graph of FIG. 5A shows indoor and outdoor luminance lines that decrease over the Δt_90[n] period and decrease at a greater rate than the decrease over the Δt_60[n] period (note that the pixel emission is off during Δt_90[n] even though the indoor and outdoor luminance lines of FIG. 5A are present during this period).

[0094] In box 784, the peak intensity of the LED emission is lower during a second refresh rate than during a first refresh rate for the same original display pixel value (e.g., 100% programmed intensity in the image data before any display or refresh rate specific adjustments or calibrations). For example, FIG. 5A shows how much higher the initial intensity of the LED is at 90 Hz than at 60 Hz.

[0095] In box 790, a decision is made as to whether to switch to a different refresh rate. For example, when high-speed video content ends and a still image is presented, the computing device or a display device disposed therein may decide to switch to a lower refresh rate. If the display device does not switch the refresh rate, the operation of box 750 is executed again. If the display device switches to a different refresh rate, the operation of box 700 is executed.

[0096] In some embodiments, the ambient light detected by the light sensor may be used to trigger a change in the characteristics of the refresh period. For example, when the level of ambient light increases, a computing device (e.g., a display device within the computing device) may reduce the "on" time of the emission to reduce VRR flicker. FIG. 8A shows a luminance graph 810 and a corresponding timing diagram 820. As the detected level of ambient light increases, the computing device may reduce the emission time at 90 Hz (tEM90). Since the reduced "on" time of the emission may be relatively small (e.g., about 0.2 ms out of 11.1 ms for 90 Hz), the impact on the OLED lifespan may be negligible.

[0097] The amount of reduced "on" time of the emission (tEM90) may follow the look-up table in FIG. 8B. Even when the detected ambient light level changes, the "on" time of the emission at the low refresh rate of 60 Hz may not change. For the efficiency and accuracy of brightness control, when reducing the "on" time of the emission at a high refresh rate, instead of shifting the falling edge of the waveform, the rising edge of the luminance waveform may be changed. Still, the falling edge of the waveform may shift in some embodiments.

[0098] FIG. 9 shows a block diagram of computing devices 900, 950 that may be used either as a client or as a server or multiple servers to implement the systems and methods described in this document. Computing device 900 is intended to represent various forms of digital computers, such as a laptop, desktop, workstation, personal digital assistant, server, blade server, mainframe, and other appropriate computers. Computing device 950 is intended to represent various forms of mobile devices, such as a personal digital assistant, cellular phone, smartphone, and other similar computing devices. The components shown here, their connections and relationships, and their functions are intended only as examples and are not intended to be limitations of the embodiments described and / or claimed in this document.

[0099] Computing device 900 includes a processor 902, a memory 904, a storage device 906, a high-speed controller 908 connected to memory 904 and high-speed expansion port 910, and a low-speed controller 912 connected to low-speed expansion port 914 and storage device 906. Each of the components 902, 904, 906, 908, 910, and 912 is interconnected using various buses and may be attached to a common motherboard or in other manners as required. Processor 902 can process instructions for execution within computing device 900, including instructions to display graphical information for a GUI on an external input / output device such as display 916 coupled to high-speed controller 908 and stored in memory 904 or storage device 906. In other embodiments, multiple memories and multiple types of memories may be used, along with multiple processors and / or multiple buses as required. Also, multiple computing devices 900 may be connected such that each device provides a portion of the required operations of the multiple operations (e.g., as a server bank, a group of blade servers, or a multiprocessor system).

[0100] Memory 904 stores information within computing device 900. In one embodiment, memory 904 is a volatile memory unit(s). In another embodiment, memory 904 may also be a non-volatile memory unit(s). Memory 904 may also be another form of computer-readable medium, such as a magnetic disk or an optical disk.

[0101] Storage device 906 can provide large-capacity storage to computing device 900. In one embodiment, storage device 906 may be a computer-readable medium, such as a floppy (registered trademark) disk device, a hard disk device, an optical disk device, or a tape device, a flash memory or other similar solid-state memory device, or an array of devices including a storage area network or other configured devices, or may include such media. A computer program product may be tangibly embodied in an information carrier. A computer program product may also include instructions that execute one or more of the methods as described above when executed. The information carrier is a computer-readable medium or a machine-readable medium, such as memory 904, storage device 906, or memory on processor 902.

[0102] The high-speed controller 908 manages the bandwidth-intensive operations of the computing device 900, and the low-speed controller 912 manages the low-bandwidth-intensive operations. Such a function assignment is just an example. In one embodiment, the high-speed controller 908 is coupled to a high-speed expansion port 910 that can accept a memory 904, a display 916 (e.g., via a graphics processor or accelerator), and various expansion cards (not shown). In this embodiment, the low-speed controller 912 is coupled to a storage device 906 and a low-speed expansion port 914. The low-speed expansion port, which may include various communication ports (e.g., USB, Bluetooth®, Ethernet®, wireless Ethernet), may be coupled to one or more input / output devices such as a keyboard, a pointing device, a scanner, etc., or may be coupled to a network device such as a switch or a router, e.g., via a network adapter.

[0103] As shown in the figure, the computing device 900 can be implemented in many different forms. For example, it may be implemented as a standard server 920, or may be implemented multiple times in a group of such servers. Also, it may be implemented as part of a rack server system 924. Additionally, it may be implemented in a personal computer such as a laptop computer 922. Alternatively, the components of the computing device 900 may be combined with other components within a mobile device (not shown) such as the device 950. Each of such devices may include one or more of the computing devices 900, 950, and the entire system may be composed of a plurality of computing devices 900, 950 that communicate with each other.

[0104] Computing device 950 includes, among other components, a processor 952, a memory 964, input / output devices such as a display 954, a communication interface 966, and a transceiver 968. The device 950 may also be provided with a storage device such as a microdrive or other device to provide additional storage. Each of the components 950, 952, 964, 954, 966, and 968 is interconnected using various buses, and some of the components may be attached to a common motherboard or attached in other manners as required.

[0105] Processor 952 can execute instructions within computing device 950, including instructions stored in memory 964. The processor may be implemented as a chipset of chips including a plurality of separate analog and digital processors. Further, the processor may be implemented using any of several architectures. For example, the processor may be a CISC (Complex Instruction Set Computer) processor, a RISC (Reduced Instruction Set Computer) processor, or a MISC (Minimal Instruction Set Computer) processor. The processor may provide coordination of other components of device 950, such as, for example, control of the user interface, applications executed by device 950, and wireless communication by device 950.

[0106] Processor 952 may communicate with the user via a control interface 958 and a display interface 956 coupled to a display 954. The display 954 may be, for example, a TFT (Thin Film Transistor Liquid Crystal Display) display or an OLED (Organic Light Emitting Diode) display, or other suitable display technology. The display interface 956 may include appropriate circuitry for driving the display 954 to present graphic information and other information to the user. The control interface 958 may receive commands from the user and convert the commands for submission to the processor 952. Additionally, an external interface 962 may be provided to communicate with the processor 952 to enable short-range communication with other devices of the device 950. The external interface 962 may provide, for example, wired communication in some embodiments, or wireless communication in other embodiments, or multiple interfaces may be used.

[0107] Memory 964 stores information within the computing device 950. The memory 964 can be implemented as one or more of a computer-readable medium, a volatile memory unit(s), or a non-volatile memory unit(s). Also, an extended memory 974 may be provided and connected to the device 950 via an extended interface 972 that may include, for example, a SIMM (Single In-line Memory Module) card interface. Such extended memory 974 may provide additional storage space for the device 950, or may store applications or other information for the device 950. Specifically, the extended memory 974 may include instructions for performing or supplementing the aforementioned processes, and may also include secure information. Thus, for example, the extended memory 974 may be provided as a security module of the device 950 and programmed with instructions that enable secure use of the device 950. Further, secure applications may be provided via the SIMM card along with additional information, such as placing identification information in a non-hackable manner on the SIMM card.

[0108] The memory may include, for example, flash memory and / or NVRAM memory, as described below. In one embodiment, the computer program product is tangibly embodied in an information carrier. The computer program product includes instructions that, when executed, perform one or more methods as described above. The information carrier is a computer-readable or machine-readable medium such as, for example, memory 964, extended memory 974, or memory on processor 952, which may be received via transceiver 968 or external interface 962.

[0109] Device 950 may perform wireless communication via a communication interface 966 that may include a digital signal processing circuit if necessary. The communication interface 966 may provide communication in various modes or protocols, such as, among others, GSM (registered trademark) voice calls, SMS, EMS or MMS messaging, CDMA, TDMA, PDC, WCDMA (registered trademark), CDMA2000 or GPRS. Such communication may occur, for example, via radio frequency transceiver 968. Additionally, short-range communication may be performed, such as using Bluetooth, WiFi, or other such transceivers (not shown). Additionally, a GPS (Global Positioning System) receiver module 970 may provide additional navigation and location-related wireless data to device 950, which may be used as needed by an application executing on device 950.

[0110] Device 950 may also perform voice communication using an audio codec 960 that can receive voice information from a user and convert it into usable digital information. Similarly, the audio codec 960 may also generate sounds audible to the user through a speaker (e.g., within the handset of device 950). Such sounds may include sounds from a voice telephone call, may include recorded sounds (e.g., voice messages, music files, etc.), and may also include sounds generated by an application operating on device 950.

[0111] As shown in the figure, computing device 950 can be implemented in many different forms. For example, it may be implemented as a mobile phone 980. It may also be implemented as part of a smartphone 982, a personal digital assistant, or other similar mobile device.

[0112] Furthermore, computing device 900 or 950 can include a Universal Serial Bus (USB) flash drive. The USB flash drive may store an operating system and other applications. The USB flash drive can include input / output components such as a USB connector that can be inserted into a wireless transmitter or a USB port of another computing device.

[0113] The various embodiments of the systems and techniques described herein can be implemented in digital electronic circuitry, integrated circuitry, specially designed ASICs (application specific integrated circuits), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can be either special purpose or general purpose and can include at least one programmable processor, at least one input device, and at least one output device coupled to receive data and instructions from, and to transmit data and instructions to, a storage system and executable and / or interpretable in a programmable system including the same. Embodiments can include those implemented in one or more computer programs executable and / or interpretable in a programmable system including the same.

[0114] These computer programs (also known as programs, software, software applications, or code) include machine instructions for a programmable processor and can be implemented in high-level procedural and / or object-oriented programming languages, and / or in assembly / machine language. As used herein, the terms “machine-readable medium” and “computer-readable medium” refer to any computer program product, apparatus, and / or device (e.g., magnetic disks, optical disks, memory, programmable logic devices (PLDs)) used to provide machine instructions and / or data to a programmable processor including a machine-readable medium that receives the machine instructions as a machine-readable signal. The term “machine-readable signal” refers to any signal used to provide machine instructions and / or data to a programmable processor.

[0115] To provide interaction with a user, the systems and techniques described herein are implemented on a computer having a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user and a keyboard and a pointing device (e.g., a mouse or trackball) by which the user can provide input to the computer. Other types of devices can also be used to provide interaction with the user. For example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback), and the input from the user can be received in any form including acoustic, speech language, or tactile input.

[0116] The systems and techniques described herein can be implemented in a computing system that includes back-end components (e.g., as a data server), or includes middleware components (e.g., an application server), or includes front-end components (e.g., a client computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described herein), or in a combination of such back-end, middleware, or front-end components. The components of the system can be interconnected by digital data communication in any form or medium (e.g., a communication network). Examples of communication networks include local area networks ("LANs"), wide area networks ("WANs"), peer-to-peer networks (having ad hoc or static members), grid computing infrastructures, and the Internet.

[0117] A computing system can include a client and a server. The client and the server are generally far apart from each other and typically interact through a communication network. The relationship between the client and the server is created by computer programs that operate on respective computers and have a client-server relationship with each other.

[0118] Although several embodiments have been described in detail above, other modifications are possible. Further, other mechanisms may be used to implement the systems and methods described herein. Further, the logic flows shown in the figures do not require the particular order, or sequential order, shown to achieve the desired result. Further, other steps may be provided to the described flows, or steps may be eliminated from the described flows, and other components may be added to, or removed from, the described systems. Accordingly, other embodiments are within the scope of the following claims.

Claims

1. A method of operating a display device, comprising: while the display device is operating at a first refresh rate at which the LED of a pixel remains on during a first period, turning off the light emission of the LED; while the light emission of the LED remains off and the display device is operating at the first refresh rate, programming a drive transistor that drives the LED; and while the display device is operating at the first refresh rate, after programming the drive transistor, turning on the light emission of the LED with a first time delay; by including the above, refreshing the pixel of the display device; and while the display device is operating at a second refresh rate at which the light emission of the LED remains on during a second period different from the first period, turning off the light emission of the LED; while the light emission of the LED remains off and the display device is operating at the second refresh rate, programming the drive transistor that drives the LED; and while the display device is operating at the second refresh rate, after programming the drive transistor, turning on the light emission of the LED with a second time delay different from the first time delay; by including the above, refreshing the pixel of the display device; A method comprising the above.

2. The first refresh rate is a refresh rate of 60 Hz, The second refresh rate is a refresh rate of 90 Hz or a refresh rate of 120 Hz, The method according to claim 1.

3. The second refresh rate is higher than the first refresh rate such that the second period is shorter than the first period, The second time delay is greater than the first time delay, The method according to any one of claims 1 to 2.

4. Programming the drive transistor while the display device is operating at the first refresh rate includes providing a first voltage to the gate of the drive transistor, The first voltage provided to the gate of the driving transistor decreases at a first rate during the first time delay after the programming of the LED while the display device is operating at the first refresh rate. Programming the driving transistor while the display device is operating at the second refresh rate includes providing a second voltage to the gate of the driving transistor. The second voltage provided to the gate of the driving transistor decreases at a second rate during the second time delay after the programming of the LED while the display device is operating at the second refresh rate. As a result of the second time delay being greater than the first time delay, the second rate is a greater rate than the first rate. The method according to claim 3.

5. As a result of the same intensity level being programmed into the pixel both during the programming of the driving transistor while the display device is operating at the first refresh rate and during the programming of the driving transistor while the display device is operating at the second refresh rate, the first voltage is the same as the second voltage. The LED has a first peak intensity when the light emission of the LED turns on after the first voltage is programmed to the gate of the driving transistor while the display device is operating at the first refresh rate. The LED has a second peak intensity when the light emission of the LED turns on after the second voltage is programmed to the gate of the driving transistor while the display device is operating at the second refresh rate. The method according to claim 4, wherein the first peak intensity of the LED is greater than the second peak intensity of the LED.

6. The method according to claim 4, wherein the light emission of the LED turns on simultaneously with the completion of the programming of the driving transistor while the display device is operating at the first refresh rate such that the first time delay is zero.

7. While the display device is operating at the first refresh rate, programming the drive transistor includes applying a first voltage to the gate of the drive transistor during a programming period. While the display device is operating at the second refresh rate, programming the drive transistor includes applying a second voltage to the gate of the drive transistor during the same programming period. The method according to any one of claims 1 to 6.

8. While the display device is operating at the first refresh rate, refreshing the pixel of the display device includes: (i) the leading emission of the LED preceding immediately before the refresh of the pixel at the first refresh rate remaining on during the first period; (ii) the subsequent emission of the LED following immediately after the refresh of the pixel at the first refresh rate remaining on during the first period. While the display device is operating at the second refresh rate, refreshing the pixel of the display device includes: (i) the leading emission of the LED preceding immediately before the refresh of the pixel at the second refresh rate remaining on during the second period; (ii) the subsequent emission of the LED following immediately after the refresh of the pixel at the second refresh rate remaining on during the second period. The method according to any one of claims 1 to 7.

9. While the display device is operating at the first refresh rate, refreshing the pixel of the display device includes the emission of the LED being off during a refresh period. While the display device is operating at the second refresh rate, refreshing the pixel of the display device includes the emission of the LED being off during the same refresh period. The method according to any one of claims 1 to 8.

10. The second time delay is greater than the first time delay. The programming of the driving transistor occurs at a first position within the refresh period while the display device is operating at the first refresh rate, The programming of the driving transistor occurs at a second position within the refresh period while the display device is operating at the second refresh rate, The method according to claim 9, wherein the first position is arranged later within the refresh period than the second position. **Claim 11** Refreshing the pixel of the display device while the display device is operating at the first refresh rate includes a first refresh period during which the emission of the pixel remains off, Refreshing the pixel of the display device while the display device is operating at the second refresh rate includes a second refresh period that is longer than the first refresh period during which the emission of the pixel remains off, The method according to any one of claims 1 to 10. **Claim 12** The second time delay is greater than the first time delay, The programming of the driving transistor starts a waiting period after the emission of the pixel turns off while the display device is operating at the first refresh rate, The programming of the driving transistor is performed during the same waiting period after the emission of the pixel turns off while the display device is operating at the second refresh rate, The method according to claim 11. **Claim 13** Programming the driving transistor while the display device is operating at the first refresh rate includes programming the driving transistor during a programming period, Programming the driving transistor while the display device is operating at the second refresh rate includes programming the driving transistor during the same programming period, The method according to any one of claims 1 to 10. **Claim 14** The method according to any one of claims 1 to 13, wherein the first time delay remains different from the second time delay regardless of the ambient light at various levels incident on the computing device including the display device.

15. Programming the drive transistor while the display device is operating at the first refresh rate is performed after initialization to the initialization voltage of the drive transistor while the display device is operating at the first refresh rate, Programming the drive transistor while the display device is operating at the second refresh rate is performed after initialization to the initialization voltage of the drive transistor while the display device is operating at the second refresh rate. The method according to any one of claims 1 to 14.

16. The first time delay represents the time delay after the programming of the transistor is completed while the display device is operating at the second refresh rate, The second time delay represents the time delay after the programming of the transistor is completed while the display device is operating at the second refresh rate. The method according to any one of claims 1 to 15.

17. A display device and A circuit associated with the display device, the circuit interacting with the display device to cause the display device to Turn off the light emission of the LED of the pixel while the display device is operating at a first refresh rate at which the light emission of the LED of the pixel remains on during a first period, Turn off the light emission of the LED, Program the drive transistor that drives the LED while the light emission of the LED remains off and the display device is operating at the first refresh rate, and After the programming of the drive transistor while the display device is operating at the first refresh rate, turn on the light emission of the LED with a first time delay, By including, refreshing the pixel of the display device While the display device is operating at a second refresh rate at which the light emission of the LED remains on during a second period different from the first period, turning off the light emission of the LED, programming the drive transistor that drives the LED while the light emission of the LED remains off and the display device is operating at the second refresh rate, and turning on the light emission of the LED with a second time delay different from the first time delay after the programming of the drive transistor while the display device is operating at the second refresh rate, refreshing the pixel of the display device by including, A computing device configured to cause the above to be performed.

18. A method of operating a display panel, comprising: operating a plurality of pixels of the display panel at a first refresh rate; turning on at least one pixel of the plurality of pixels with a first time delay after providing a signal to a drive transistor of the pixel while the display is operating at the first refresh rate; switching the operation of the plurality of pixels to a second refresh rate, the second refresh rate being higher than the first refresh rate, the method further comprising: turning on the pixel with a second time delay after providing a signal to the drive transistor of the pixel while the display is operating at the second refresh rate, the second time delay being longer than the first time delay.

Images